1 files changed, 54 insertions, 0 deletions
diff --git a/cad/verilog/patches/patch-aa b/cad/verilog/patches/patch-aa
new file mode 100644
index 00000000000..d762afcd46e
--- /dev/null
+++ b/cad/verilog/patches/patch-aa
@@ -0,0 +1,54 @@
+$NetBSD: patch-aa,v 1.5 2001/02/07 18:26:17 dmcmahill Exp $
+
+--- tgt-null/null.c.orig	Fri Dec  1 23:50:32 2000
++++ tgt-null/null.c	Sun Feb  4 12:41:40 2001
+@@ -25,5 +25,5 @@
+  */
+ 
+-# include  <ivl_target.h>
++# include  "ivl_target.h"
+ 
+ 
+--- tgt-pal/enables.c.orig	Fri Dec  8 22:42:52 2000
++++ tgt-pal/enables.c	Sun Feb  4 12:41:50 2001
+@@ -20,3 +20,3 @@
+ 
+-# include  <ivl_target.h>
++# include  "ivl_target.h"
+ # include  <assert.h>
+--- tgt-pal/fit_log.c.orig	Thu Dec 14 18:37:47 2000
++++ tgt-pal/fit_log.c	Sun Feb  4 12:41:59 2001
+@@ -21,5 +21,5 @@
+ #endif
+ 
+-# include  <ivl_target.h>
++# include  "ivl_target.h"
+ # include  <stdio.h>
+ # include  <stdlib.h>
+--- tgt-pal/fit_reg.c.orig	Sun Jan 14 19:05:39 2001
++++ tgt-pal/fit_reg.c	Sun Feb  4 12:42:08 2001
+@@ -21,5 +21,5 @@
+ #endif
+ 
+-# include  <ivl_target.h>
++# include  "ivl_target.h"
+ # include  <stdio.h>
+ # include  <assert.h>
+--- tgt-stub/stub.c.orig	Sun Jan 14 19:47:02 2001
++++ tgt-stub/stub.c	Sun Feb  4 12:42:21 2001
+@@ -28,5 +28,5 @@
+  */
+ 
+-# include  <ivl_target.h>
++# include  "ivl_target.h"
+ # include  <stdio.h>
+ 
+--- tgt-verilog/verilog.c.orig	Sun Jan 14 19:05:39 2001
++++ tgt-verilog/verilog.c	Wed Feb  7 10:48:53 2001
+@@ -27,5 +27,5 @@
+  */
+ 
+-# include  <ivl_target.h>
++# include  "ivl_target.h"
+ # include  <stdio.h>
+ # include  <assert.h>