diff options
Diffstat (limited to 'cad')
| -rw-r--r-- | cad/verilog/Makefile | 64 | ||||
| -rw-r--r-- | cad/verilog/PLIST | 25 | ||||
| -rw-r--r-- | cad/verilog/buildlink3.mk | 10 | ||||
| -rw-r--r-- | cad/verilog/distinfo | 12 | ||||
| -rw-r--r-- | cad/verilog/patches/patch-lexor_keyword.cc | 28 | ||||
| -rw-r--r-- | cad/verilog/patches/patch-vpi_Makefile | 38 |
6 files changed, 42 insertions, 135 deletions
diff --git a/cad/verilog/Makefile b/cad/verilog/Makefile index d3ea37ec3fc..9fd5d79e591 100644 --- a/cad/verilog/Makefile +++ b/cad/verilog/Makefile @@ -1,76 +1,34 @@ -# $NetBSD: Makefile,v 1.42 2016/07/24 23:43:12 rillig Exp $ +# $NetBSD: Makefile,v 1.43 2016/10/08 22:30:43 kamil Exp $ # -DISTNAME= verilog-0.9.7 +DISTNAME= verilog-10.1.1 CATEGORIES= cad -MASTER_SITES= ftp://icarus.com/pub/eda/verilog/v0.9/ +MASTER_SITES= ftp://icarus.com/pub/eda/verilog/v10/ +# FTP has newer release than GitHub tag +#MASTER_SITES= ${MASTER_SITE_GITHUB:=steveicarus/} +#GITHUB_TAG= v${PKGVERSION_NOREV:S/./_/} MAINTAINER= dmcmahill@NetBSD.org HOMEPAGE= http://iverilog.icarus.com/ COMMENT= Verilog simulation and synthesis tool (stable release version) LICENSE= gnu-gpl-v2 -CONFLICTS+= verilog-current-[0-9]* - USE_LANGUAGES= c c++ GNU_CONFIGURE= yes USE_TOOLS+= gmake bison lex TEST_TARGET= check -INSTALLATION_DIRS+= share/ivl - -SUBST_CLASSES+= destdir -SUBST_FILES.destdir= tgt-vhdl/Makefile.in \ - tgt-fpga/Makefile.in \ - tgt-null/Makefile.in \ - tgt-pal/Makefile.in \ - tgt-stub/Makefile.in \ - tgt-verilog/Makefile.in \ - tgt-vvp/Makefile.in -SUBST_MESSAGE.destdir= Fix DESTDIR in various Makefile.in -SUBST_STAGE.destdir= pre-configure -SUBST_SED.destdir= -e 's, $$(libdir)/ivl, $$(DESTDIR)$$(libdir)/ivl,g' -# Leading TAB -SUBST_SED.destdir+= -e 's, $$(libdir)/ivl, $$(DESTDIR)$$(libdir)/ivl,g' -# target: -SUBST_SED.destdir+= -e 's,^$$(libdir)/ivl,$$(DESTDIR)$$(libdir)/ivl,' - -SUBST_CLASSES+= vpi-dest -SUBST_STAGE.vpi-dest= pre-configure -SUBST_FILES.vpi-dest= vpi/Makefile.in -SUBST_MESSAGE.vpi-dest= Fix DESTDIR in vpi/Makefile.in (watch target:) -SUBST_SED.vpi-dest= -e 's, $$(vpidir)/, $$(DESTDIR)$$(vpidir)/,g' -# Leading TAB -SUBST_SED.vpi-dest+= -e 's, $$(vpidir)/, $$(DESTDIR)$$(vpidir)/,g' -SUBST_SED.vpi-dest+= -e 's,^$$(vpidir)/,$$(DESTDIR)$$(vpidir)/,g' - -pre-build: - cd ${WRKSRC} && ${BUILD_MAKE_CMD} dep +INSTALLATION_DIRS+= share/doc/ivl -# Some missing files not installed are handled by SUBST (above) -# and rest of them are by following target. +# Additional files post-install: - (cd ${WRKSRC}; ${INSTALL_DATA} \ + cd ${WRKSRC}; ${INSTALL_DATA} \ QUICK_START.txt \ README.txt \ - ${DESTDIR}${PREFIX}/share/ivl ) -# include/iverilog - (cd ${WRKSRC}; ${INSTALL_DATA} \ - acc_user.h ivl_target.h veriuser.h vpi_user.h \ - ${DESTDIR}${PREFIX}/include/iverilog ) -# lib/ivl/include - (cd ${WRKSRC}; ${INSTALL_DATA} \ - constants.vams \ - disciplines.vams \ - ${DESTDIR}${PREFIX}/lib/ivl/include ) - -# -# 1. this should be BUILD_DEPENDS -# 2. it doesn't actually run it during the build anyhow -# -#.include "../../devel/gperf/buildlink3.mk" + ${DESTDIR}${PREFIX}/share/doc/ivl +.include "../../devel/gperf/buildlink3.mk" .include "../../devel/zlib/buildlink3.mk" .include "../../archivers/bzip2/buildlink3.mk" .include "../../mk/readline.buildlink3.mk" diff --git a/cad/verilog/PLIST b/cad/verilog/PLIST index 292f0b5b7b8..bac4b0fda9a 100644 --- a/cad/verilog/PLIST +++ b/cad/verilog/PLIST @@ -1,12 +1,16 @@ -@comment $NetBSD: PLIST,v 1.10 2014/01/07 09:43:54 mef Exp $ +@comment $NetBSD: PLIST,v 1.11 2016/10/08 22:30:43 kamil Exp $ bin/iverilog bin/iverilog-vpi bin/vvp include/iverilog/_pli_types.h include/iverilog/acc_user.h include/iverilog/ivl_target.h +include/iverilog/sv_vpi_user.h include/iverilog/veriuser.h include/iverilog/vpi_user.h +lib/ivl/blif-s.conf +lib/ivl/blif.conf +lib/ivl/blif.tgt lib/ivl/cadpli.vpl lib/ivl/include/constants.vams lib/ivl/include/disciplines.vams @@ -15,6 +19,12 @@ lib/ivl/ivlpp lib/ivl/null-s.conf lib/ivl/null.conf lib/ivl/null.tgt +lib/ivl/pcb-s.conf +lib/ivl/pcb.conf +lib/ivl/pcb.tgt +lib/ivl/sizer-s.conf +lib/ivl/sizer.conf +lib/ivl/sizer.tgt lib/ivl/stub-s.conf lib/ivl/stub.conf lib/ivl/stub.tgt @@ -22,11 +32,20 @@ lib/ivl/system.sft lib/ivl/system.vpi lib/ivl/v2005_math.sft lib/ivl/v2005_math.vpi +lib/ivl/v2009.sft +lib/ivl/v2009.vpi lib/ivl/va_math.sft lib/ivl/va_math.vpi lib/ivl/vhdl-s.conf lib/ivl/vhdl.conf lib/ivl/vhdl.tgt +lib/ivl/vhdl_sys.sft +lib/ivl/vhdl_sys.vpi +lib/ivl/vhdlpp +lib/ivl/vlog95-s.conf +lib/ivl/vlog95.conf +lib/ivl/vlog95.tgt +lib/ivl/vpi_debug.vpi lib/ivl/vvp-s.conf lib/ivl/vvp.conf lib/ivl/vvp.tgt @@ -35,5 +54,5 @@ lib/libvpi.a man/man1/iverilog-vpi.1 man/man1/iverilog.1 man/man1/vvp.1 -share/ivl/QUICK_START.txt -share/ivl/README.txt +share/doc/ivl/QUICK_START.txt +share/doc/ivl/README.txt diff --git a/cad/verilog/buildlink3.mk b/cad/verilog/buildlink3.mk index cf455dada3e..2f8fe04e793 100644 --- a/cad/verilog/buildlink3.mk +++ b/cad/verilog/buildlink3.mk @@ -1,18 +1,16 @@ -# $NetBSD: buildlink3.mk,v 1.10 2013/07/18 07:59:38 obache Exp $ +# $NetBSD: buildlink3.mk,v 1.11 2016/10/08 22:30:43 kamil Exp $ BUILDLINK_TREE+= verilog .if !defined(VERILOG_BUILDLINK3_MK) VERILOG_BUILDLINK3_MK:= -BUILDLINK_API_DEPENDS.verilog+= verilog>=0.8.1nb1 -BUILDLINK_ABI_DEPENDS.verilog+= verilog>=0.8.7nb1 +BUILDLINK_API_DEPENDS.verilog+= verilog>=10.1.1 BUILDLINK_PKGSRCDIR.verilog?= ../../cad/verilog +.include "../../devel/gperf/buildlink3.mk" .include "../../devel/zlib/buildlink3.mk" .include "../../archivers/bzip2/buildlink3.mk" -.include "../../devel/gperf/buildlink3.mk" -.include "../../mk/readline.buildlink3.mk" -.endif # VERILOG_BUILDLINK3_MK +.endif # VERILOG_BUILDLINK3_MK BUILDLINK_TREE+= -verilog diff --git a/cad/verilog/distinfo b/cad/verilog/distinfo index eb14d7cb9d3..2ba24e91035 100644 --- a/cad/verilog/distinfo +++ b/cad/verilog/distinfo @@ -1,11 +1,9 @@ -$NetBSD: distinfo,v 1.20 2015/11/03 00:21:19 agc Exp $ +$NetBSD: distinfo,v 1.21 2016/10/08 22:30:43 kamil Exp $ -SHA1 (verilog-0.9.7.tar.gz) = 714c2a605779957490cca24e3dc01d096dbc1474 -RMD160 (verilog-0.9.7.tar.gz) = 3bac03ca703465a43c5a0a8175a3d27ee00f49a7 -SHA512 (verilog-0.9.7.tar.gz) = 1a81f132c667f5cd33a11156364a366806ef9b6ef59b86f69df852af79cc92db17df8db0bace4e3c14929b0110df0aa7d83f35f664057e715842acf7bd21c1f5 -Size (verilog-0.9.7.tar.gz) = 1238088 bytes +SHA1 (verilog-10.1.1.tar.gz) = 7f4cead8cabb90cc4525951357c43866ca710749 +RMD160 (verilog-10.1.1.tar.gz) = 77c933b712ab027b13a81e3eead7ee4f565741b7 +SHA512 (verilog-10.1.1.tar.gz) = a57fdce3d870be8ce39eb3050dabd5a2d4d491c657b85ccbf775bef7fa9a6889a18bf4d2508341ef2cc17d872b5d6c802d4fd8585e4ec7952526699ebb24bfac +Size (verilog-10.1.1.tar.gz) = 1684925 bytes SHA1 (patch-aa) = cf075110416f6db0892129796cd83b8ae8de55fa SHA1 (patch-ad) = bf7d227ed3b321021d8aff54cd008f4b2a1557b9 SHA1 (patch-cadpli_Makefile) = ed21a5f529ac449c26b831cbd5fde052d9ed5466 -SHA1 (patch-lexor_keyword.cc) = 375aa534e91b0ee05615732b4bdcacdd9034ed3d -SHA1 (patch-vpi_Makefile) = 9a2d49d3d0f8005d7ab508f726374842ad322207 diff --git a/cad/verilog/patches/patch-lexor_keyword.cc b/cad/verilog/patches/patch-lexor_keyword.cc deleted file mode 100644 index bf01f79b41e..00000000000 --- a/cad/verilog/patches/patch-lexor_keyword.cc +++ /dev/null @@ -1,28 +0,0 @@ -$NetBSD: patch-lexor_keyword.cc,v 1.1 2014/06/28 21:05:11 dholland Exp $ - -Remove inline declarations that sometimes cause build failures. (Seen -in pbulk but not outside, with the same gcc versions and everything; -not at all clear why.) static is an adequate substitute here and -should produce the same results with recent compilers anyhow. - -Note that this file is gperf output -- if the build decides to run -gperf it will clobber this patch and the results might or might not -compile depending on whatever unknown factors are involved in it -failing in the first place. - ---- lexor_keyword.cc~ 2013-08-19 19:12:46.000000000 +0000 -+++ lexor_keyword.cc -@@ -108,12 +108,7 @@ keyword_hash (register const char *str, - return hval + asso_values[(unsigned char)str[len - 1]]; - } - --#ifdef __GNUC__ --__inline --#if defined __GNUC_STDC_INLINE__ || defined __GNUC_GNU_INLINE__ --__attribute__ ((__gnu_inline__)) --#endif --#endif -+static - const struct lexor_keyword * - check_identifier (register const char *str, register unsigned int len) - { diff --git a/cad/verilog/patches/patch-vpi_Makefile b/cad/verilog/patches/patch-vpi_Makefile deleted file mode 100644 index efba3548661..00000000000 --- a/cad/verilog/patches/patch-vpi_Makefile +++ /dev/null @@ -1,38 +0,0 @@ -$NetBSD: patch-vpi_Makefile,v 1.2 2015/02/18 20:12:02 joerg Exp $ - -Fix DESTDIR (before SUBST in Makefile is executed) - ---- vpi/Makefile.in~ 2013-08-20 04:10:31.000000000 +0900 -+++ vpi/Makefile.in 2013-12-20 21:58:51.000000000 +0900 -@@ -50,7 +50,7 @@ check: all - dep: - mkdir dep - --%.o: %.c vpi_config.h -+%.o: %.c vpi_config.h dep - $(CC) $(CPPFLAGS) $(CFLAGS) @DEPENDENCY_FLAG@ -c $< -o $*.o - mv $*.d dep - -@@ -133,19 +133,19 @@ $(vpidir)/system.vpi: ./system.vpi - $(INSTALL_PROGRAM) ./system.vpi "$(DESTDIR)$(vpidir)/system.vpi" - - $(vpidir)/system.sft: system.sft -- $(INSTALL_DATA) $< "$(DESTDIR)$@" -+ $(INSTALL_DATA) $< "$@" - - $(vpidir)/va_math.vpi: ./va_math.vpi - $(INSTALL_PROGRAM) ./va_math.vpi "$(DESTDIR)$(vpidir)/va_math.vpi" - - $(vpidir)/va_math.sft: va_math.sft -- $(INSTALL_DATA) $< "$(DESTDIR)$@" -+ $(INSTALL_DATA) $< "$@" - - $(vpidir)/v2005_math.vpi: ./v2005_math.vpi - $(INSTALL_PROGRAM) ./v2005_math.vpi "$(DESTDIR)$(vpidir)/v2005_math.vpi" - - $(vpidir)/v2005_math.sft: v2005_math.sft -- $(INSTALL_DATA) $< "$(DESTDIR)$@" -+ $(INSTALL_DATA) $< "$@" - - installdirs: $(srcdir)/../mkinstalldirs - $(srcdir)/../mkinstalldirs "$(DESTDIR)$(libdir)" "$(DESTDIR)$(vpidir)" |