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-rw-r--r--emulators/hercules/patches/patch-aa19
-rw-r--r--emulators/hercules/patches/patch-aj30
-rw-r--r--emulators/hercules/patches/patch-an65
-rw-r--r--emulators/hercules/patches/patch-ap378
-rw-r--r--emulators/hercules/patches/patch-aq15
-rw-r--r--emulators/hercules/patches/patch-ar17
-rw-r--r--emulators/hercules/patches/patch-as224
-rw-r--r--emulators/hercules/patches/patch-at15
-rw-r--r--emulators/hercules/patches/patch-au15
-rw-r--r--emulators/hercules/patches/patch-av15
-rw-r--r--emulators/hercules/patches/patch-aw15
11 files changed, 793 insertions, 15 deletions
diff --git a/emulators/hercules/patches/patch-aa b/emulators/hercules/patches/patch-aa
index affb00a9ebc..cf549bdc0fe 100644
--- a/emulators/hercules/patches/patch-aa
+++ b/emulators/hercules/patches/patch-aa
@@ -1,4 +1,4 @@
-$NetBSD: patch-aa,v 1.7 2005/12/09 10:46:43 joerg Exp $
+$NetBSD: patch-aa,v 1.8 2010/01/17 08:00:47 dholland Exp $
--- makefile.orig 2001-02-11 03:21:58.000000000 +0000
+++ makefile
@@ -7,7 +7,7 @@ $NetBSD: patch-aa,v 1.7 2005/12/09 10:46:43 joerg Exp $
# overridden in the make command line, as in "PREFIX=/foo make install"
# (the directory is only used when installing).
-DESTDIR = $(PREFIX)/usr/bin
-+DESTDIR = $(PREFIX)/bin
++INSTALLDIR = $(DESTDIR)$(PREFIX)/bin
# Standard flags for all architectures
CFLAGS = -Wall -fomit-frame-pointer -DVERSION=$(VERSION) -DNO_BYTESWAP_H
@@ -57,3 +57,18 @@ $NetBSD: patch-aa,v 1.7 2005/12/09 10:46:43 joerg Exp $
# Reverse the comments below to disable Compressed CKD Dasd support
#CFLAGS += -DNO_CCKD
+@@ -224,9 +226,9 @@ tar: clean
+ (cd ..; tar cvzf hercules-$(VERSION).tar.gz hercules-$(VERSION))
+
+ install: $(EXEFILES)
+- cp $(EXEFILES) $(DESTDIR)
+- cp dasdlist $(DESTDIR)
+- chown root $(DESTDIR)/hercifc
+- chmod 0751 $(DESTDIR)/hercifc
+- chmod +s $(DESTDIR)/hercifc
++ cp $(EXEFILES) $(INSTALLDIR)
++ cp dasdlist $(INSTALLDIR)
++ #chown root $(INSTALLDIR)/hercifc
++ #chmod 0751 $(INSTALLDIR)/hercifc
++ #chmod +s $(INSTALLDIR)/hercifc
+ rm hercifc
diff --git a/emulators/hercules/patches/patch-aj b/emulators/hercules/patches/patch-aj
index 2d4c961a452..c9545cb36eb 100644
--- a/emulators/hercules/patches/patch-aj
+++ b/emulators/hercules/patches/patch-aj
@@ -1,4 +1,4 @@
-$NetBSD: patch-aj,v 1.1 2001/03/23 16:20:56 agc Exp $
+$NetBSD: patch-aj,v 1.2 2010/01/17 08:00:47 dholland Exp $
Patch from Wofgang Solfrank:
@@ -7,9 +7,29 @@ At least with unproven-pthreads, the comment above that is wrong
when stating that a 1 usec timeout would be stretched to the next
system clock tick."
---- timer.c.orig Thu Feb 8 20:02:41 2001
-+++ timer.c Fri Mar 23 16:01:53 2001
-@@ -319,7 +319,7 @@
+Also, patch out no-longer-supported gcc language extensions.
+
+--- timer.c.orig 2001-02-08 20:02:41.000000000 +0000
++++ timer.c
+@@ -190,7 +190,7 @@ struct timeval tv;
+
+ /* Decrement the CPU timer if the CPU is running */
+ if(regs->cpustate == CPUSTATE_STARTED && (S64)diff > 0)
+- (S64)regs->ptimer -= (S64)diff;
++ regs->ptimer = (S64)regs->ptimer - (S64)diff;
+
+ /* Set interrupt flag if the CPU timer is negative */
+ if ((S64)regs->ptimer < 0)
+@@ -207,7 +207,7 @@ struct timeval tv;
+ {
+ /* Decrement the CPU timer if the CPU is running */
+ if( (S64)diff > 0)
+- (S64)regs->guestregs->ptimer -= (S64)diff;
++ regs->guestregs->ptimer = (S64)regs->guestregs->ptimer - (S64)diff;
+
+ /* Set interrupt flag if the CPU timer is negative */
+ if ((S64)regs->guestregs->ptimer < 0)
+@@ -319,7 +319,7 @@ struct timeval tv;
/* Calculate instructions/millisecond for this CPU */
regs->mipsrate =
(regs->instcount - regs->prevcount) / msecctr;
@@ -18,7 +38,7 @@ system clock tick."
/* Save the instruction counter */
regs->prevcount = regs->instcount;
-@@ -336,7 +336,7 @@
+@@ -336,7 +336,7 @@ struct timeval tv;
/* Sleep for one system clock tick by specifying a one-microsecond
delay, which will get stretched out to the next clock tick */
tv.tv_sec = 0;
diff --git a/emulators/hercules/patches/patch-an b/emulators/hercules/patches/patch-an
index 777dfa88dcc..359d946d54d 100644
--- a/emulators/hercules/patches/patch-an
+++ b/emulators/hercules/patches/patch-an
@@ -1,10 +1,20 @@
-$NetBSD: patch-an,v 1.1 2001/05/11 11:17:39 dmcmahill Exp $
+$NetBSD: patch-an,v 1.2 2010/01/17 08:00:47 dholland Exp $
-regparm is only for i386
+ - regparm is only for i386
+ - patch out gcc language extensions that are no longer supported
---- features.h.orig Thu Feb 1 17:56:32 2001
-+++ features.h Tue May 8 18:47:14 2001
-@@ -71,6 +71,11 @@
+--- features.h.orig 2001-02-01 22:56:32.000000000 +0000
++++ features.h
+@@ -48,6 +48,7 @@
+ #undef ET
+ #undef RADR
+ #undef GR_A
++#undef GR_Ax
+ #undef VADR
+ #undef GREG
+ #undef CREG
+@@ -70,8 +71,13 @@
+
#define ARCH_MODE ARCH_370
+#ifdef __i386__
@@ -16,7 +26,17 @@ regparm is only for i386
+#endif
#define ARCH_DEP(_name) \
-@@ -130,6 +135,11 @@
+ s370_ ## _name
+@@ -104,6 +110,7 @@ s370_ ## _name
+ #define CR(_r) CR_L(_r)
+ #define GR(_r) GR_L(_r)
+ #define GR_A(_r, _regs) ((_regs)->GR_L((_r)))
++#define GR_Ax(_r, _regs, _val) (((_regs)->GR_L((_r))) = (_val))
+ #define MONCODE MC_L
+ #define TEA EA_L
+ #define ET ET_L
+@@ -129,8 +136,13 @@ s370_ ## _name
+
#define ARCH_MODE ARCH_390
+#ifdef __i386__
@@ -28,7 +48,17 @@ regparm is only for i386
+#endif
#define ARCH_DEP(_name) \
-@@ -212,6 +222,11 @@
+ s390_ ## _name
+@@ -163,6 +175,7 @@ s390_ ## _name
+ #define CR(_r) CR_L(_r)
+ #define GR(_r) GR_L(_r)
+ #define GR_A(_r, _regs) ((_regs)->GR_L((_r)))
++#define GR_Ax(_r, _regs, _val) (((_regs)->GR_L((_r))) = (_val))
+ #define MONCODE MC_L
+ #define TEA EA_L
+ #define ET ET_L
+@@ -211,8 +224,13 @@ s390_ ## _name
+ #define SSEVENT_BIT ASCE_X
#define SSGROUP_BIT ASCE_G
+#ifdef __i386__
@@ -40,7 +70,17 @@ regparm is only for i386
+#endif
#define ARCH_DEP(_name) \
-@@ -268,6 +283,11 @@
+ z900_ ## _name
+@@ -223,6 +241,7 @@ z900_ ## _name
+ #define CR(_r) CR_G(_r)
+ #define GR(_r) GR_G(_r)
+ #define GR_A(_r, _regs) ((_regs)->psw.amode64 ? (_regs)->GR_G((_r)) : (_regs)->GR_L((_r)))
++#define GR_Ax(_r, _regs, _val) ((_regs)->psw.amode64 ? ((_regs)->GR_G((_r)) = (_val)) : ((_regs)->GR_L((_r)) = (_val)))
+ #define MONCODE MC_G
+ #define TEA EA_G
+ #define ET ET_G
+@@ -267,8 +286,13 @@ z900_ ## _name
+ #define SSEVENT_BIT ASCE_X
#define SSGROUP_BIT ASCE_G
+#ifdef __i386__
@@ -52,3 +92,12 @@ regparm is only for i386
+#endif
#define ARCH_DEP(_name) \
+ z964_ ## _name
+@@ -279,6 +303,7 @@ z964_ ## _name
+ #define CR(_r) CR_G(_r)
+ #define GR(_r) GR_G(_r)
+ #define GR_A(_r, _regs) ((_regs)->psw.amode64 ? (_regs)->GR_G((_r)) : (_regs)->GR_L((_r)))
++#define GR_Ax(_r, _regs, _val) ((_regs)->psw.amode64 ? ((_regs)->GR_G((_r)) = (_val)) : ((_regs)->GR_L((_r)) = (_val)))
+ #define MONCODE MC_G
+ #define TEA EA_G
+ #define ET ET_G
diff --git a/emulators/hercules/patches/patch-ap b/emulators/hercules/patches/patch-ap
new file mode 100644
index 00000000000..0454ccccdb3
--- /dev/null
+++ b/emulators/hercules/patches/patch-ap
@@ -0,0 +1,378 @@
+$NetBSD: patch-ap,v 1.1 2010/01/17 08:00:47 dholland Exp $
+
+Patch out gcc language extensions that are no longer supported.
+
+--- general.c.orig 2001-02-08 20:02:40.000000000 +0000
++++ general.c
+@@ -96,7 +96,7 @@ U32 n;
+ RX(inst, execflag, regs, r1, b2, effective_addr2);
+
+ /* Load 2 bytes from operand address */
+- (S32)n = (S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
++ n = (S32)(S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
+
+ /* Add signed operands and set condition code */
+ regs->psw.cc =
+@@ -124,7 +124,7 @@ U32 n;
+
+ RI(inst, execflag, regs, r1, opcd, n2);
+
+- (S32)n = (S16)n2;
++ n = (S32)(S16)n2;
+
+ /* Add signed operands and set condition code */
+ regs->psw.cc =
+@@ -682,7 +682,7 @@ S32 i, j;
+ j = (r3 & 1) ? (S32)regs->GR_L(r3) : (S32)regs->GR_L(r3+1);
+
+ /* Add the increment value to the R1 register */
+- (S32)regs->GR_L(r1) += i;
++ regs->GR_L(r1) = (S32)regs->GR_L(r1) + i;
+
+ /* Branch if result compares high */
+ if ( (S32)regs->GR_L(r1) > j )
+@@ -710,7 +710,7 @@ S32 i, j;
+ j = (r3 & 1) ? (S32)regs->GR_L(r3) : (S32)regs->GR_L(r3+1);
+
+ /* Add the increment value to the R1 register */
+- (S32)regs->GR_L(r1) += i;
++ regs->GR_L(r1) = (S32)regs->GR_L(r1) + i;
+
+ /* Branch if result compares low or equal */
+ if ( (S32)regs->GR_L(r1) <= j )
+@@ -809,7 +809,7 @@ int i,j;
+ j = (r3 & 1) ? (S32)regs->GR_L(r3) : (S32)regs->GR_L(r3+1);
+
+ /* Add the increment value to the R1 register */
+- (S32)regs->GR_L(r1) += i;
++ regs->GR_L(r1) = (S32)regs->GR_L(r1) + i;
+
+ /* Branch if result compares high */
+ if ( (S32)regs->GR_L(r1) > j )
+@@ -839,7 +839,7 @@ int i,j;
+ j = (r3 & 1) ? (S32)regs->GR_L(r3) : (S32)regs->GR_L(r3+1);
+
+ /* Add the increment value to the R1 register */
+- (S32)regs->GR_L(r1) += i;
++ regs->GR_L(r1) = (S32)regs->GR_L(r1) + i;
+
+ /* Branch if result compares low or equal */
+ if ( (S32)regs->GR_L(r1) <= j )
+@@ -924,7 +924,7 @@ U64 dreg;
+ regs->GR_L(r1) = dreg;
+
+ /* Update the operand address and length registers */
+- GR_A(r2, regs) = addr2;
++ GR_Ax(r2, regs, addr2);
+ regs->GR_L(r2+1) = len;
+
+ /* Set condition code 0 or 3 */
+@@ -1127,7 +1127,7 @@ U32 n;
+ the physical CPU on a spinlock */
+ if(regs->psw.cc && sysblk.numcpu > 1 && sysblk.brdcstncpu == 0)
+ usleep(1L);
+-#endif MAX_CPU_ENGINES > 1
++#endif /* MAX_CPU_ENGINES > 1 */
+
+ #if defined(_FEATURE_SIE)
+ if(regs->sie_state && (regs->siebk->ic[0] & SIE_IC0_CS1))
+@@ -1193,7 +1193,7 @@ U32 n1, n2;
+ the physical CPU on a spinlock */
+ if(regs->psw.cc && sysblk.numcpu > 1 && sysblk.brdcstncpu == 0)
+ usleep(1L);
+-#endif MAX_CPU_ENGINES > 1
++#endif /* MAX_CPU_ENGINES > 1 */
+
+ #if defined(_FEATURE_SIE)
+ if(regs->sie_state && (regs->siebk->ic[0] & SIE_IC0_CDS1))
+@@ -1216,7 +1216,7 @@ U32 n;
+ RX(inst, execflag, regs, r1, b2, effective_addr2);
+
+ /* Load rightmost 2 bytes of comparand from operand address */
+- (S32)n = (S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
++ n = (S32)(S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
+
+ /* Compare signed operands and set condition code */
+ regs->psw.cc =
+@@ -1552,10 +1552,10 @@ BYTE pad;
+ } /* end for(i) */
+
+ /* Update the registers */
+- GR_A(r1, regs) = addr1;
+- GR_A(r1+1, regs) = len1;
+- GR_A(r3, regs) = addr2;
+- GR_A(r3+1, regs) = len2;
++ GR_Ax(r1, regs, addr1);
++ GR_Ax(r1+1, regs, len1);
++ GR_Ax(r3, regs, addr2);
++ GR_Ax(r3+1, regs, len2);
+
+ regs->psw.cc = cc;
+
+@@ -1634,8 +1634,8 @@ BYTE termchar;
+ } /* end for(i) */
+
+ /* Set R1 and R2 to point to current character of each operand */
+- GR_A(r1, regs) = addr1;
+- GR_A(r2, regs) = addr2;
++ GR_Ax(r1, regs, addr1);
++ GR_Ax(r2, regs, addr2);
+
+ /* Set condition code */
+ regs->psw.cc = cc;
+@@ -1776,8 +1776,8 @@ S32 remlen1, remlen2;
+ if (cc < 2)
+ {
+ /* Update R1 and R2 to point to the equal substring */
+- GR_A(r1, regs) = eqaddr1;
+- GR_A(r2, regs) = eqaddr2;
++ GR_Ax(r1, regs, eqaddr1);
++ GR_Ax(r2, regs, eqaddr2);
+
+ /* Set R1+1 and R2+1 to length remaining in each
+ operand after the start of the substring */
+@@ -1787,8 +1787,8 @@ S32 remlen1, remlen2;
+ else
+ {
+ /* Update R1 and R2 to point to next bytes to compare */
+- GR_A(r1, regs) = addr1;
+- GR_A(r2, regs) = addr2;
++ GR_Ax(r1, regs, addr1);
++ GR_Ax(r2, regs, addr2);
+
+ /* Set R1+1 and R2+1 to remaining operand lengths */
+ regs->GR_L(r1+1) = (GREG)len1;
+@@ -1914,9 +1914,9 @@ BYTE utf[4];
+ len2 = nlen2;
+
+ /* Update the registers */
+- GR_A(r1, regs) = addr1;
++ GR_Ax(r1, regs, addr1);
+ regs->GR_L(r1+1) = len1;
+- GR_A(r2, regs) = addr2;
++ GR_Ax(r2, regs, addr2);
+ regs->GR_L(r2+1) = len2;
+
+ } /* end for(i) */
+@@ -2069,9 +2069,9 @@ BYTE utf[4];
+ len2 -= n + 1;
+
+ /* Update the registers */
+- GR_A(r1, regs) = addr1;
++ GR_Ax(r1, regs, addr1);
+ regs->GR_L(r1+1) = len1;
+- GR_A(r2, regs) = addr2;
++ GR_Ax(r2, regs, addr2);
+ regs->GR_L(r2+1) = len2;
+
+ } /* end for(i) */
+@@ -2153,7 +2153,7 @@ BYTE sbyte;
+ /* Result is negative if sign is X'B' or X'D' */
+ if (d == 0x0B || d == 0x0D)
+ {
+- (S64)dreg = -((S64)dreg);
++ dreg = (U64) -((S64)dreg);
+ }
+
+ /* Store low-order 32 bits of result into R1 register */
+@@ -2678,7 +2678,7 @@ VADR effective_addr2;
+ RX(inst, execflag, regs, r1, b2, effective_addr2);
+
+ /* Load operand address into register */
+- GR_A(r1, regs) = effective_addr2;
++ GR_Ax(r1, regs, effective_addr2);
+ }
+
+
+@@ -2695,7 +2695,7 @@ VADR effective_addr2;
+ RX(inst, execflag, regs, r1, b2, effective_addr2);
+
+ /* Load operand address into register */
+- GR_A(r1, regs) = effective_addr2;
++ GR_Ax(r1, regs, effective_addr2);
+
+ /* Load corresponding value into access register */
+ if ( PRIMARY_SPACE_MODE(&(regs->psw)) )
+@@ -2749,7 +2749,7 @@ int r1, r2;
+ }
+
+ /* Load complement of second operand and set condition code */
+- (S32)regs->GR_L(r1) = -((S32)regs->GR_L(r2));
++ regs->GR_L(r1) = (U32) -((S32)regs->GR_L(r2));
+
+ regs->psw.cc = (S32)regs->GR_L(r1) < 0 ? 1 :
+ (S32)regs->GR_L(r1) > 0 ? 2 : 0;
+@@ -2768,7 +2768,7 @@ VADR effective_addr2;
+ RX(inst, execflag, regs, r1, b2, effective_addr2);
+
+ /* Load rightmost 2 bytes of register from operand address */
+- (S32)regs->GR_L(r1) = (S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
++ regs->GR_L(r1) = (S32)(S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
+ }
+
+
+@@ -2785,7 +2785,7 @@ U16 i2;
+ RI(inst, execflag, regs, r1, opcd, i2);
+
+ /* Load operand into register */
+- (S32)regs->GR_L(r1) = (S16)i2;
++ regs->GR_L(r1) = (S32)(S16)i2;
+
+ }
+ #endif /*defined(FEATURE_IMMEDIATE_AND_RELATIVE)*/
+@@ -2835,7 +2835,7 @@ int r1, r2;
+ RR(inst, execflag, regs, r1, r2);
+
+ /* Load negative value of second operand and set cc */
+- (S32)regs->GR_L(r1) = (S32)regs->GR_L(r2) > 0 ?
++ regs->GR_L(r1) = (S32)regs->GR_L(r2) > 0 ?
+ -((S32)regs->GR_L(r2)) :
+ (S32)regs->GR_L(r2);
+
+@@ -2863,7 +2863,7 @@ int r1, r2;
+ }
+
+ /* Load positive value of second operand and set cc */
+- (S32)regs->GR_L(r1) = (S32)regs->GR_L(r2) < 0 ?
++ regs->GR_L(r1) = (S32)regs->GR_L(r2) < 0 ?
+ -((S32)regs->GR_L(r2)) :
+ (S32)regs->GR_L(r2);
+
+@@ -3020,8 +3020,8 @@ BYTE pad;
+ || (n <= addr2
+ && (addr1 > addr2 || addr1 <= n)))
+ {
+- GR_A(r1, regs) = addr1;
+- GR_A(r2, regs) = addr2;
++ GR_Ax(r1, regs, addr1);
++ GR_Ax(r2, regs, addr2);
+ regs->psw.cc = 3;
+ logmsg ("MVCL destructive overlap\n");
+ logmsg ("R%2.2d=%8.8X R%2.2d=%8.8X "
+@@ -3056,8 +3056,8 @@ BYTE pad;
+ len1--;
+
+ /* Update the registers */
+- GR_A(r1, regs) = addr1;
+- GR_A(r2, regs) = addr2;
++ GR_Ax(r1, regs, addr1);
++ GR_Ax(r2, regs, addr2);
+ regs->GR_LA24(r1+1) = len1;
+ regs->GR_LA24(r2+1) = len2;
+
+@@ -3142,10 +3142,10 @@ BYTE pad;
+ len1--;
+
+ /* Update the registers */
+- GR_A(r1, regs) = addr1;
+- GR_A(r1+1, regs) = len1;
+- GR_A(r3, regs) = addr2;
+- GR_A(r3+1, regs) = len2;
++ GR_Ax(r1, regs, addr1);
++ GR_Ax(r1+1, regs, len1);
++ GR_Ax(r3, regs, addr2);
++ GR_Ax(r3+1, regs, len2);
+
+ } /* end for(i) */
+
+@@ -3282,8 +3282,8 @@ BYTE termchar;
+ } /* end for(i) */
+
+ /* Set R1 and R2 to point to next character of each operand */
+- GR_A(r1, regs) = addr1;
+- GR_A(r2, regs) = addr2;
++ GR_Ax(r1, regs, addr1);
++ GR_Ax(r2, regs, addr2);
+
+ /* Set condition code 3 */
+ regs->psw.cc = 3;
+@@ -3480,7 +3480,7 @@ U32 n;
+ RX(inst, execflag, regs, r1, b2, effective_addr2);
+
+ /* Load 2 bytes from operand address */
+- (S32)n = (S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
++ n = (S32)(S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
+
+ /* Multiply R1 register by n, ignore leftmost 32 bits of
+ result, and place rightmost 32 bits in R1 register */
+@@ -3502,7 +3502,7 @@ U16 i2;
+ RI(inst, execflag, regs, r1, opcd, i2);
+
+ /* Multiply register by operand ignoring overflow */
+- (S32)regs->GR_L(r1) *= (S16)i2;
++ regs->GR_L(r1) = (S32)regs->GR_L(r1) * (S16)i2;
+
+ }
+ #endif /*defined(FEATURE_IMMEDIATE_AND_RELATIVE)*/
+@@ -3518,7 +3518,7 @@ int r1, r2;
+ RRE(inst, execflag, regs, r1, r2);
+
+ /* Multiply signed registers ignoring overflow */
+- (S32)regs->GR_L(r1) *= (S32)regs->GR_L(r2);
++ regs->GR_L(r1) = (S32)regs->GR_L(r1) * (S32)regs->GR_L(r2);
+
+ }
+
+@@ -3539,7 +3539,7 @@ U32 n;
+ n = ARCH_DEP(vfetch4) ( effective_addr2, b2, regs );
+
+ /* Multiply signed operands ignoring overflow */
+- (S32)regs->GR_L(r1) *= (S32)n;
++ regs->GR_L(r1) = (S32)regs->GR_L(r1) * (S32)n;
+
+ }
+
+@@ -4595,7 +4595,7 @@ VADR effective_addr2,
+ if(regs->psw.cc && sysblk.numcpu > 1
+ && sysblk.brdcstncpu == 0)
+ usleep(1L);
+-#endif MAX_CPU_ENGINES > 1
++#endif /* MAX_CPU_ENGINES > 1 */
+
+ }
+ }
+@@ -4644,7 +4644,7 @@ BYTE termchar;
+ code 1 and load the address of the character into R1 */
+ if (sbyte == termchar)
+ {
+- GR_A(r1, regs) = addr2;
++ GR_Ax(r1, regs, addr2);
+ regs->psw.cc = 1;
+ return;
+ }
+@@ -4656,7 +4656,7 @@ BYTE termchar;
+ } /* end for(i) */
+
+ /* Set R2 to point to next character of operand */
+- GR_A(r2, regs) = addr2;
++ GR_Ax(r2, regs, addr2);
+
+ /* Return condition code 3 */
+ regs->psw.cc = 3;
+@@ -4928,7 +4928,7 @@ U32 n;
+ n = effective_addr2 & 0x3F;
+
+ /* Shift the signed value of the R1 register */
+- (S32)regs->GR_L(r1) = n > 30 ?
++ regs->GR_L(r1) = n > 30 ?
+ ((S32)regs->GR_L(r1) < 0 ? -1 : 0) :
+ (S32)regs->GR_L(r1) >> n;
+
+@@ -5293,7 +5293,7 @@ U32 n;
+ RX(inst, execflag, regs, r1, b2, effective_addr2);
+
+ /* Load 2 bytes from operand address */
+- (S32)n = (S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
++ n = (S32)(S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
+
+ /* Subtract signed operands and set condition code */
+ regs->psw.cc =
+@@ -5723,7 +5723,7 @@ BYTE trtab[256];
+ len1--;
+
+ /* Update the registers */
+- GR_A(r1, regs) = addr1;
++ GR_Ax(r1, regs, addr1);
+ regs->GR_L(r1+1) = len1;
+
+ } /* end for(i) */
diff --git a/emulators/hercules/patches/patch-aq b/emulators/hercules/patches/patch-aq
new file mode 100644
index 00000000000..e0b1e2867b3
--- /dev/null
+++ b/emulators/hercules/patches/patch-aq
@@ -0,0 +1,15 @@
+$NetBSD: patch-aq,v 1.1 2010/01/17 08:00:47 dholland Exp $
+
+Patch out gcc language extensions that are no longer supported.
+
+--- service.c~ 2001-02-08 20:07:03.000000000 +0000
++++ service.c
+@@ -1300,7 +1300,7 @@ BYTE *xstmap;
+ }
+ }
+ mcd_len -= obj_len;
+- (BYTE*)obj_hdr += obj_len;
++ obj_hdr = (SCCB_OBJ_HDR *)((BYTE*)obj_hdr + obj_len);
+ }
+
+ #ifndef NO_CYGWIN_STACK_BUG
diff --git a/emulators/hercules/patches/patch-ar b/emulators/hercules/patches/patch-ar
new file mode 100644
index 00000000000..ed22a8ed910
--- /dev/null
+++ b/emulators/hercules/patches/patch-ar
@@ -0,0 +1,17 @@
+$NetBSD: patch-ar,v 1.1 2010/01/17 08:00:47 dholland Exp $
+
+Patch out gcc language extensions that are no longer supported.
+
+--- cmpsc.c~ 2001-02-10 11:31:39.000000000 +0000
++++ cmpsc.c
+@@ -142,8 +142,8 @@
+ /*----------------------------------------------------------------------------*/
+ #define ADJUSTREGS(r, regs, len) \
+ { \
+- GR_A ((r), (regs)) = (GR_A ((r), (regs)) + (len)) & ADDRESS_MAXWRAP((regs)); \
+- GR_A ((r) + 1, (regs)) -= (len); \
++ GR_Ax ((r), (regs), (GR_A ((r), (regs)) + (len)) & ADDRESS_MAXWRAP((regs))); \
++ GR_Ax ((r) + 1, (regs), GR_A ((r) + 1, (regs)) - (len)); \
+ }
+
+ /*----------------------------------------------------------------------------*/
diff --git a/emulators/hercules/patches/patch-as b/emulators/hercules/patches/patch-as
new file mode 100644
index 00000000000..f356e2044ae
--- /dev/null
+++ b/emulators/hercules/patches/patch-as
@@ -0,0 +1,224 @@
+$NetBSD: patch-as,v 1.1 2010/01/17 08:00:47 dholland Exp $
+
+Patch out gcc language extensions that are no longer supported.
+
+--- esame.c~ 2001-02-10 14:41:55.000000000 +0000
++++ esame.c
+@@ -945,8 +945,8 @@ U32 i2;
+
+ RIL(inst, execflag, regs, r1, opcd, i2);
+
+- GR_A(r1, regs) = ((!execflag ? (regs->psw.IA - 6) : regs->ET)
+- + 2*(S32)i2) & ADDRESS_MAXWRAP(regs);
++ GR_Ax(r1, regs, ((!execflag ? (regs->psw.IA - 6) : regs->ET)
++ + 2*(S32)i2) & ADDRESS_MAXWRAP(regs));
+ }
+
+
+@@ -1440,7 +1440,7 @@ int i,j;
+ j = (r3 & 1) ? (S64)regs->GR_G(r3) : (S64)regs->GR_G(r3+1);
+
+ /* Add the increment value to the R1 register */
+- (S64)regs->GR_G(r1) += i;
++ regs->GR_G(r1) = (S64)regs->GR_G(r1) + i;
+
+ /* Branch if result compares high */
+ if ( (S64)regs->GR_G(r1) > j )
+@@ -1468,7 +1468,7 @@ int i,j;
+ j = (r3 & 1) ? (S64)regs->GR_G(r3) : (S64)regs->GR_G(r3+1);
+
+ /* Add the increment value to the R1 register */
+- (S64)regs->GR_G(r1) += i;
++ regs->GR_G(r1) = (S64)regs->GR_G(r1) + i;
+
+ /* Branch if result compares low or equal */
+ if ( (S64)regs->GR_G(r1) <= j )
+@@ -1497,7 +1497,7 @@ S64 i, j;
+ j = (r3 & 1) ? (S64)regs->GR_G(r3) : (S64)regs->GR_G(r3+1);
+
+ /* Add the increment value to the R1 register */
+- (S64)regs->GR_G(r1) += i;
++ regs->GR_G(r1) = (S64)regs->GR_G(r1) + i;
+
+ /* Branch if result compares high */
+ if ( (S64)regs->GR_G(r1) > j )
+@@ -1525,7 +1525,7 @@ S64 i, j;
+ j = (r3 & 1) ? (S64)regs->GR_G(r3) : (S64)regs->GR_G(r3+1);
+
+ /* Add the increment value to the R1 register */
+- (S64)regs->GR_G(r1) += i;
++ regs->GR_G(r1) = (S64)regs->GR_G(r1) + i;
+
+ /* Branch if result compares low or equal */
+ if ( (S64)regs->GR_G(r1) <= j )
+@@ -1586,7 +1586,7 @@ U64 n;
+ the physical CPU on a spinlock */
+ if(regs->psw.cc && sysblk.numcpu > 1 && sysblk.brdcstncpu == 0)
+ usleep(1L);
+-#endif MAX_CPU_ENGINES > 1
++#endif /* MAX_CPU_ENGINES > 1 */
+
+ #if defined(_FEATURE_ZSIE)
+ if(regs->sie_state && (regs->siebk->ic[0] & SIE_IC0_CS1))
+@@ -1652,7 +1652,7 @@ U64 n1, n2;
+ the physical CPU on a spinlock */
+ if(regs->psw.cc && sysblk.numcpu > 1 && sysblk.brdcstncpu == 0)
+ usleep(1L);
+-#endif MAX_CPU_ENGINES > 1
++#endif /* MAX_CPU_ENGINES > 1 */
+
+ #if defined(_FEATURE_ZSIE)
+ if(regs->sie_state && (regs->siebk->ic[0] & SIE_IC0_CDS1))
+@@ -2071,7 +2071,7 @@ int r1, r2;
+ }
+
+ /* Load positive value of second operand and set cc */
+- (S64)regs->GR_G(r1) = (S64)regs->GR_G(r2) < 0 ?
++ regs->GR_G(r1) = (S64)regs->GR_G(r2) < 0 ?
+ -((S64)regs->GR_G(r2)) :
+ (S64)regs->GR_G(r2);
+
+@@ -2089,9 +2089,9 @@ int r1, r2;
+ RRE(inst, execflag, regs, r1, r2);
+
+ /* Load positive value of second operand and set cc */
+- (S64)regs->GR_G(r1) = (S32)regs->GR_L(r2) < 0 ?
++ regs->GR_G(r1) = (S64)((S32)regs->GR_L(r2) < 0 ?
+ -((S32)regs->GR_L(r2)) :
+- (S32)regs->GR_L(r2);
++ (S32)regs->GR_L(r2));
+
+ regs->psw.cc = (S64)regs->GR_G(r1) == 0 ? 0 : 2;
+ }
+@@ -2107,7 +2107,7 @@ int r1, r2;
+ RRE(inst, execflag, regs, r1, r2);
+
+ /* Load negative value of second operand and set cc */
+- (S64)regs->GR_G(r1) = (S64)regs->GR_G(r2) > 0 ?
++ regs->GR_G(r1) = (S64)regs->GR_G(r2) > 0 ?
+ -((S64)regs->GR_G(r2)) :
+ (S64)regs->GR_G(r2);
+
+@@ -2125,9 +2125,9 @@ int r1, r2;
+ RRE(inst, execflag, regs, r1, r2);
+
+ /* Load negative value of second operand and set cc */
+- (S64)regs->GR_G(r1) = (S32)regs->GR_L(r2) > 0 ?
++ regs->GR_G(r1) = (S64) ((S32)regs->GR_L(r2) > 0 ?
+ -((S32)regs->GR_L(r2)) :
+- (S32)regs->GR_L(r2);
++ (S32)regs->GR_L(r2));
+
+ regs->psw.cc = (S64)regs->GR_G(r1) == 0 ? 0 : 1;
+ }
+@@ -2160,7 +2160,7 @@ int r1, r2;
+ RRE(inst, execflag, regs, r1, r2);
+
+ /* Copy second operand and set condition code */
+- (S64)regs->GR_G(r1) = (S32)regs->GR_L(r2);
++ regs->GR_G(r1) = (S64)(S32)regs->GR_L(r2);
+
+ regs->psw.cc = (S64)regs->GR_G(r1) < 0 ? 1 :
+ (S64)regs->GR_G(r1) > 0 ? 2 : 0;
+@@ -2187,7 +2187,7 @@ int r1, r2;
+ }
+
+ /* Load complement of second operand and set condition code */
+- (S64)regs->GR_G(r1) = -((S64)regs->GR_G(r2));
++ regs->GR_G(r1) = -((S64)regs->GR_G(r2));
+
+ regs->psw.cc = (S64)regs->GR_G(r1) < 0 ? 1 :
+ (S64)regs->GR_G(r1) > 0 ? 2 : 0;
+@@ -2204,7 +2204,7 @@ int r1, r2;
+ RRE(inst, execflag, regs, r1, r2);
+
+ /* Load complement of second operand and set condition code */
+- (S64)regs->GR_G(r1) = -((S32)regs->GR_L(r2));
++ regs->GR_G(r1) = (S64) -((S32)regs->GR_L(r2));
+
+ regs->psw.cc = (S64)regs->GR_G(r1) < 0 ? 1 :
+ (S64)regs->GR_G(r1) > 0 ? 2 : 0;
+@@ -2526,9 +2526,9 @@ U64 n;
+ regs->GR_G(r1) = regs->GR_G(r3);
+
+ /* Shift the signed value of the R1 register */
+- (S64)regs->GR_G(r1) = n > 62 ?
++ regs->GR_G(r1) = (S64) (n > 62 ?
+ ((S64)regs->GR_G(r1) < 0 ? -1 : 0) :
+- (S64)regs->GR_G(r1) >> n;
++ (S64)regs->GR_G(r1) >> n);
+
+ /* Set the condition code */
+ regs->psw.cc = (S64)regs->GR_G(r1) > 0 ? 2 :
+@@ -2552,7 +2552,7 @@ U32 n;
+ n = ARCH_DEP(vfetch4) ( effective_addr2, b2, regs );
+
+ /* Multiply signed operands ignoring overflow */
+- (S64)regs->GR_G(r1) *= (S32)n;
++ regs->GR_G(r1) = (S64)regs->GR_G(r1) * (S32)n;
+
+ }
+
+@@ -2573,7 +2573,7 @@ U64 n;
+ n = ARCH_DEP(vfetch8) ( effective_addr2, b2, regs );
+
+ /* Multiply signed operands ignoring overflow */
+- (S64)regs->GR_G(r1) *= (S64)n;
++ regs->GR_G(r1) = (S64)regs->GR_G(r1) * (S64)n;
+
+ }
+
+@@ -2588,7 +2588,7 @@ int r1, r2;
+ RRE(inst, execflag, regs, r1, r2);
+
+ /* Multiply signed registers ignoring overflow */
+- (S64)regs->GR_G(r1) *= (S32)regs->GR_L(r2);
++ regs->GR_G(r1) = (S64)regs->GR_G(r1) * (S32)regs->GR_L(r2);
+
+ }
+
+@@ -2603,7 +2603,7 @@ int r1, r2;
+ RRE(inst, execflag, regs, r1, r2);
+
+ /* Multiply signed registers ignoring overflow */
+- (S64)regs->GR_G(r1) *= (S64)regs->GR_G(r2);
++ regs->GR_G(r1) = (S64)regs->GR_G(r1) * (S64)regs->GR_G(r2);
+
+ }
+
+@@ -2620,7 +2620,7 @@ U16 i2;
+ RI(inst, execflag, regs, r1, opcd, i2);
+
+ /* Load operand into register */
+- (S64)regs->GR_G(r1) = (S16)i2;
++ regs->GR_G(r1) = (S64)(S16)i2;
+
+ }
+
+@@ -2662,7 +2662,7 @@ U16 i2;
+ RI(inst, execflag, regs, r1, opcd, i2);
+
+ /* Multiply register by operand ignoring overflow */
+- (S64)regs->GR_G(r1) *= (S16)i2;
++ regs->GR_G(r1) = (S64)regs->GR_G(r1) * (S16)i2;
+
+ }
+
+@@ -2826,7 +2826,7 @@ int r1, r2;
+ RRE(inst, execflag, regs, r1, r2);
+
+ /* Copy second operand to first operand */
+- (S64)regs->GR_G(r1) = (S32)regs->GR_L(r2);
++ regs->GR_G(r1) = (S64)(S32)regs->GR_L(r2);
+ }
+
+
+@@ -3349,7 +3349,7 @@ VADR effective_addr2;
+ RXE(inst, execflag, regs, r1, b2, effective_addr2);
+
+ /* Load R1 register from second operand */
+- (S64)regs->GR_G(r1) = (S32)ARCH_DEP(vfetch4) ( effective_addr2, b2, regs );
++ regs->GR_G(r1) = (S64) (S32)ARCH_DEP(vfetch4) ( effective_addr2, b2, regs );
+ }
+
+
diff --git a/emulators/hercules/patches/patch-at b/emulators/hercules/patches/patch-at
new file mode 100644
index 00000000000..398900f10b6
--- /dev/null
+++ b/emulators/hercules/patches/patch-at
@@ -0,0 +1,15 @@
+$NetBSD: patch-at,v 1.1 2010/01/17 08:00:47 dholland Exp $
+
+Patch out mismatched decls gcc no longer accepts.
+
+--- tapemap.c~ 2001-01-28 18:05:41.000000000 +0000
++++ tapemap.c
+@@ -35,7 +35,7 @@ static BYTE buf[65500];
+ /*-------------------------------------------------------------------*/
+ /* ASCII to EBCDIC translate tables */
+ /*-------------------------------------------------------------------*/
+-static unsigned char
++unsigned char
+ ebcdic_to_ascii[] = {
+ "\x00\x01\x02\x03\xA6\x09\xA7\x7F\xA9\xB0\xB1\x0B\x0C\x0D\x0E\x0F"
+ "\x10\x11\x12\x13\xB2\xB4\x08\xB7\x18\x19\x1A\xB8\xBA\x1D\xBB\x1F"
diff --git a/emulators/hercules/patches/patch-au b/emulators/hercules/patches/patch-au
new file mode 100644
index 00000000000..3a227757178
--- /dev/null
+++ b/emulators/hercules/patches/patch-au
@@ -0,0 +1,15 @@
+$NetBSD: patch-au,v 1.1 2010/01/17 08:00:47 dholland Exp $
+
+Patch out mismatched decls gcc no longer accepts.
+
+--- tapecopy.c~ 2010-01-17 07:18:17.000000000 +0000
++++ tapecopy.c
+@@ -64,7 +64,7 @@ static BYTE buf[65500];
+ /*-------------------------------------------------------------------*/
+ /* ASCII to EBCDIC translate tables */
+ /*-------------------------------------------------------------------*/
+-static unsigned char
++unsigned char
+ ebcdic_to_ascii[] = {
+ "\x00\x01\x02\x03\xA6\x09\xA7\x7F\xA9\xB0\xB1\x0B\x0C\x0D\x0E\x0F"
+ "\x10\x11\x12\x13\xB2\xB4\x08\xB7\x18\x19\x1A\xB8\xBA\x1D\xBB\x1F"
diff --git a/emulators/hercules/patches/patch-av b/emulators/hercules/patches/patch-av
new file mode 100644
index 00000000000..21b6afc1165
--- /dev/null
+++ b/emulators/hercules/patches/patch-av
@@ -0,0 +1,15 @@
+$NetBSD: patch-av,v 1.1 2010/01/17 08:00:47 dholland Exp $
+
+Patch out mismatched decls gcc no longer accepts.
+
+--- tapelist.c~ 2001-02-11 03:20:05.000000000 +0000
++++ tapelist.c
+@@ -39,7 +39,7 @@ static BYTE buf[65500];
+ /*-------------------------------------------------------------------*/
+ /* EBCDIC to ASCII translate table */
+ /*-------------------------------------------------------------------*/
+-static unsigned char
++unsigned char
+ ebcdic_to_ascii[] = {
+ "\x00\x01\x02\x03\xA6\x09\xA7\x7F\xA9\xB0\xB1\x0B\x0C\x0D\x0E\x0F"
+ "\x10\x11\x12\x13\xB2\xB4\x08\xB7\x18\x19\x1A\xB8\xBA\x1D\xBB\x1F"
diff --git a/emulators/hercules/patches/patch-aw b/emulators/hercules/patches/patch-aw
new file mode 100644
index 00000000000..b1fa64c8634
--- /dev/null
+++ b/emulators/hercules/patches/patch-aw
@@ -0,0 +1,15 @@
+$NetBSD: patch-aw,v 1.1 2010/01/17 08:00:47 dholland Exp $
+
+Patch out mismatched decls gcc no longer accepts.
+
+--- tapesplit.c~ 2001-01-28 18:05:41.000000000 +0000
++++ tapesplit.c
+@@ -36,7 +36,7 @@ static BYTE buf[65500];
+ /*-------------------------------------------------------------------*/
+ /* ASCII to EBCDIC translate tables */
+ /*-------------------------------------------------------------------*/
+-static unsigned char
++unsigned char
+ ebcdic_to_ascii[] = {
+ "\x00\x01\x02\x03\xA6\x09\xA7\x7F\xA9\xB0\xB1\x0B\x0C\x0D\x0E\x0F"
+ "\x10\x11\x12\x13\xB2\xB4\x08\xB7\x18\x19\x1A\xB8\xBA\x1D\xBB\x1F"
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-09 03:36:42 +0000