| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2005-04-11 | Remove USE_BUILDLINK3 and NO_BUILDLINK; these are no longer used. | tv | 1 | -2/+1 | |
| 2005-03-20 | Add a missing dirrm line. Closes PR pkg/29649 by Cesar Catrian C. | jmmv | 1 | -1/+2 | |
| 2005-02-23 | Add RMD160 digests in addition to SHA1 ones. | agc | 1 | -1/+2 | |
| 2004-12-01 | update to electric-7.00 | dmcmahill | 6 | -453/+527 | |
| This is a major version bump and represents many many bug fixes and lots of improvements. The scope is fairly broad and can't really be summarized. See the ChangeLog in the distfile for a complete list of changes. | |||||
| 2004-10-03 | Libtool fix for PR pkg/26633, and other issues. Update libtool to 1.5.10 | tv | 1 | -2/+2 | |
| in the process. (More information on tech-pkg.) Bump PKGREVISION and BUILDLINK_DEPENDS of all packages using libtool and installing .la files. Bump PKGREVISION (only) of all packages depending directly on the above via a buildlink3 include. | |||||
| 2004-04-11 | Convert to buildlink3. | snj | 1 | -3/+3 | |
| 2004-01-28 | There's no need to use 'USE_X11BASE' in electric package, we'll use | xtraeme | 1 | -2/+3 | |
| USE_X11 instead, bump PKGREVISION. | |||||
| 2003-07-17 | s/netbsd.org/NetBSD.org/ | grant | 1 | -2/+2 | |
| 2003-05-06 | Drop trailing whitespace. Ok'ed by wiz. | jmmv | 1 | -12/+12 | |
| 2003-02-09 | s/${ENV}/${SETENV}/, noted by Kevin P. Neal in connection with PR 19586. | wiz | 1 | -2/+2 | |
| 2002-09-21 | buildlink1 -> buildlink2 | jlam | 1 | -4/+3 | |
| 2002-04-23 | Note explicitly that this package is USE_X11BASE. Currently, it relies on | jlam | 1 | -1/+2 | |
| motif.buildlink.mk to define it. | |||||
| 2002-03-13 | Import electric-6.05 | dmcmahill | 6 | -0/+534 | |
| ----- Electric is a sophisticated electrical CAD system that can handle many forms of circuit design, including: Custom IC layout (ASICs), Schematic drawing, Hardware description language specifications, Electro-mechanical hybrid layout Electric has these CAD operations: Design rule checking (3 options), Electrical rule checking, Simulation and simulation interface (12 options), Generation (3 options), Compaction, Compensation, Routing (4 options), VHDL compilation, Silicon compilation, Network consistency checking (LVS), Logical Effort analysis, Project Management Electric handles these types of design: MOS (6 CMOS variations, 1 nMOS variation), Bipolar and BiCMOS, Schematics and printed circuits, Digital filters, Temporal logic, Artwork Electric handles these file formats: CIF I/O, GDS I/O, EDIF I/O, DXF I/O, SDF Input, SUE Input, VHDL I/O, Verilog Output, EAGLE, PADS, and ECAD Output, PostScript, HPGL, and QuickDraw output | |||||
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index : pkgsrc | |
| [no description] | Dyson |
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