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Dinotrace is a tool designed to aid in viewing Verilog Value Change
Dump (.vcd), ASCII, Verilator, Tempest CCLI, COSMOS, Chango and Decsim
Binary simulation traces. It is optimized for rapid design debugging using
X-Windows Mosaic.
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of the cad/verilog package. Development snapshots are created quite frequently
in between stable releases.
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verilog-current pkg to track development snapshots.
This version has minor bug fixes over the previous snapshot package. Notable
$display of a memory element now works correctly and a bug in $readmemb has
been fixed.
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Gwave is a viewer for spice-like simulator output and other analog data
Gwave can read several file formats. It attempts to guess file formats
based on filename, and then tries all file formats until one succedes.
These file formats are known:
CAzM transient output (*.[BNW])
HSPICE binary and ascii formats (*.tr0, *.sw0, *.ac0)
Spice2 and Spice3 "raw" output (*.raw)
An ascii format with whitespace-seperated columns and column headings,
such as that produced by ACS (Al's circuit simulator). (*.acs, *.asc, *.ascii)
The "Export Postscript" and "Export PNM" options on the main File menu
provide the rudiments of output for inclusion in other
documentation. They and simply write out files called gwave_out.ps and
gwave_out.pnm into the current directory. In the future, a dialog box
will allow configuring the print and export output.
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converted from FreeBSD, or have been disabled since. Sorted lines
alphabetically, added some missing directories.
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Changes include:
* New dialog boxes by Matt Ettus:
- A much improved attribute edit dialog box
- A multiple attribute edit dialog box
* Improved Hierarchy Support:
- Hierarchy/Down Schematic
- Hierarchy/Down Symbol
- Hierarchy/Up
* Text alignment.
* Attributes are now required to have no spaces besides
the equals sign on each side. This shouldn't cause
any problems for anybody.
* Bunch of updates to the various gnetlist backends
(basically all submitted changes have been integrated).
Integration of JM Routoure's PCB backend work (Thanks!).
Bug fixes and improvements by Matt Ettus, Stefan
Petersen and Bas Gieltjes.
* Added a bunch of contributed symbols. Thanks to
all that have contributed! There are now 566 symbols
in the library.
* Documentation. There are the beginnings of docs now.
Here's the current list:
attributes.txt -- Master attribute list
fileformats.html -- gEDA file formats
gschem.txt -- The start of a serious user's
guide keymapping.html -- Stefan's keymapping
document netattrib.txt -- A HOWTO on the net=
attribute symbols.html -- The ever useful symbol
creation guide
* Bug fixes and improvements to some of the utils.
* Lots and lots of bug fixes (and bug introductions).
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simulation of electrical circuits
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NetBSD pkgsrc patches to the previous release. Thanks to Stephen Williams
(the author) for his willingness to accept patches!
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Cascade is a program for analyzing the noise and distortion
performance of a cascade of elements in an electronic system. A
typical application of cascade is the analysis of a receiver. A text
description of the receiver block diagram consisting of things like
amplifiers, mixers, and filters is entered into cascade. Each element
is characterized by its gain and optionally noise figure, and third
order intercept point. The program then analyzes the system and
produces a report detailing the performance at each stage.
A summary is produced which shows the relative contributions to the
total system performance of each block. This allows easy
identification of what limits system performance.
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Icarus Verilog is a Verilog simulation and synthesis tool. It operates as a
compiler, compiling source code writen in Verilog (IEEE-1364) into some target
format. For batch simulation, the compiler can generate C++ code that is
compiled and linked with a run time library (called "vvm") then executed as
a command to run the simulation. For synthesis, the compiler generates
netlists in the desired format.
The compiler proper is intended to parse and elaborate design descriptions
written to the IEEE standard IEEE Std 1364-1995. This is a fairly large and
complex standard, so it will take some time for it to get there, but that's
the goal. I'll be tracking the upcoming IEEE Std 1364-1999 revision as well,
and some -1999 features will creep in.
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ACS is a general purpose circuit simulator. It performs nonlinear
dc and transient analyses, fourier analysis, and ac analysis
linearized at an operating point. It is fully interactive and
command driven. It can also be run in batch mode or as a server.
The output is produced as it simulates. Spice compatible models
for the MOSFET (level 1,2,3,6) and diode are included in this
release.
Since it is fully interactive, it is possible to make changes and
re-simulate quickly. The interactive design makes it well suited
to the typical iterative design process used it optimizing a circuit
design. It is also well suited to undergraduate teaching where
Spice in batch mode can be quite intimidating. This version, while
still officially in beta test, should be stable enough for basic
undergraduate teaching and courses in MOS design, but not for
bipolar design.
In batch mode it is mostly Spice compatible, so it is often possible
to use the same file for both ACS and Spice.
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enhancements. Most notably, gEDA was split into several independent
modules, using a common library 'libgeda'. These modules are now separate
packages with geda now becoming a meta package.
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gEDA.
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gEDA.
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note that the version number is the date when I grabbed the
sources. There is no "official" version included in the
sources.
Xchiplogo reads an ascii bitmap file, and converts it into a
magic or cif file. It is a handy program for creating logos
of text or graphics for putting on VLSI chips. At the
moment it accepts the B&W dithered format of XV as the
input. It has got quite a few options for resizing and get-
ting rid of many design rule errors that can be found in the
bitmap file. It has a smoothing, before and after an error
correction step. The error correction step is pretty simple
,don't expect miracles, but it works quite fine and spe-
cially for text gives a reasonable output.
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- fixed program version number reported when spice is run to make it consistent
with the version of the program.
- several patches to fix compilation warnings due to missing header files and
some inconsistent variable types.
- broke out previous patch-aa which patched several files into 1 patch per file.
- fixed some code which returned the address of a local char array variable.
- added GNU readline support (a huge improvement in the interface)
- changed USE_X11BASE to USE_X11. No reason to install into X11BASE.
- removed 'x' target from package Makefile
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A Spice preprocessor for parameterized subcircuits
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