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cad
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Author
Files
Lines
2017-01-01
Updated cad/klayout to 0.24.9
mef
3
-10
/
+13
2017-01-01
Updated cad/gtkwave to 3.3.79
mef
2
-7
/
+7
2016-12-22
Don't use non-int values for scancodes. Bump revision.
joerg
3
-3
/
+24
2016-12-20
Correction of PKGNAME, GDS2-3.33 to p5-gds2-3.33
mef
1
-1
/
+2
2016-12-17
Updated cad/eagle to 7.7.0
mef
3
-15
/
+12
2016-12-16
Update to version 3.16.0 (released 2016/12/14)
plunky
9
-213
/
+802
2016-12-16
# OpenSCAD 2015.03
plunky
2
-9
/
+8
2016-12-16
Update to patch version 2.1.3
plunky
2
-8
/
+7
2016-12-10
Updated cad/gtkwave to 3.3.78
mef
2
-7
/
+7
2016-11-25
Upgrade USE_LANGUAGES=ada to use lang/gcc5-aux instead of lang/gcc-aux
marino
1
-1
/
+2
2016-11-20
Restrict a few very memory hungry files to -O1.
joerg
2
-1
/
+20
2016-10-21
distinfo was wrong or distfile updated with the same name ?
mef
1
-5
/
+5
2016-10-17
Updated cad/gtkwave to 3.3.77
mef
2
-7
/
+7
2016-10-13
verilog is no longer
jnemeth
1
-2
/
+1
2016-10-09
Add patch from John D. Baker in PR 51509 to fix 32-bit build.
dholland
2
-1
/
+18
2016-10-09
Add cad/veriwell
kamil
1
-1
/
+2
2016-10-09
Import veriwell-2.8.7 as cad/veriwell
kamil
4
-0
/
+36
2016-10-09
Update MyHDL from 0.8.1 to 0.9.0
kamil
10
-73
/
+106
2016-10-08
cad/verilog has been renamed to cad/iverilog
kamil
8
-186
/
+0
2016-10-08
Switch from cad/verilog to cad/iverilog
kamil
1
-2
/
+2
2016-10-08
Switch from cad/verilog to cad/iverilog
kamil
1
-2
/
+3
2016-10-08
Add cad/iverilog (will replace cad/verilog)
kamil
1
-1
/
+2
2016-10-08
Import iverilog (Icarus Verilog) 10.1.1 as cad/iverilog
kamil
8
-0
/
+182
2016-10-08
Update cad/verilog (icarus verilog) from 0.9.7 to 10.1.1
kamil
6
-135
/
+42
2016-10-08
Update cad/covered from 0.4.7 to 0.7.10
kamil
5
-123
/
+156
2016-10-08
Drop conflict with nonexistent covered-current
kamil
1
-3
/
+1
2016-10-08
Detach the cad/verilog-current dependency
kamil
1
-3
/
+3
2016-10-08
Drop covered-current
kamil
6
-273
/
+0
2016-10-08
Detach cad/covered-current
kamil
1
-2
/
+1
2016-10-08
Remove verilog-current
kamil
8
-183
/
+0
2016-10-08
Detach cad/verilog-current
kamil
1
-2
/
+1
2016-10-07
Revbump post boost update
adam
3
-4
/
+6
2016-09-25
add GCC_REQD+= 4.7 as the package uses -std=c++11 flag
plunky
1
-1
/
+4
2016-09-25
add gettext to USE_TOOLS
plunky
1
-2
/
+2
2016-09-22
Remove redundent/unnecessary .include lines, and PYDISTUTILSPKG= yes, thanks...
mef
1
-5
/
+1
2016-09-21
Fix reversed assignement, pointed out by he@ (thanks !)
bouyer
3
-6
/
+6
2016-09-20
Remove url2pkg marker.
wiz
1
-2
/
+1
2016-09-19
- Converting PLIST to ${EGG_INFODIR}. Also add/convert .include lang/python/...
mef
2
-8
/
+11
2016-09-16
use -delete for POSIX compliance
plunky
1
-2
/
+2
2016-09-16
Remove cad/gwave.
wiz
6
-101
/
+1
2016-09-15
Remove unsupported configure arguments.
wiz
1
-6
/
+1
2016-09-15
Change to guile20
gdt
1
-2
/
+2
2016-09-15
After guile's and guile20's installation prefixes have changed, it's time
wiz
2
-4
/
+4
2016-09-13
Updated cad/py-gds to 1.0
mef
3
-8
/
+13
2016-09-09
add pkg-config to USE_TOOLS
plunky
1
-2
/
+2
2016-09-09
add a note about using BOOST_MATH_NO_LONG_DOUBLE_MATH_FUNCTIONS
plunky
1
-1
/
+5
2016-09-09
also depends on freetype2
plunky
1
-1
/
+2
2016-09-08
Update kicad packages to 4.0.4, and apply a patch from the master branch
bouyer
41
-4165
/
+5125
2016-09-05
Update to LibreCAD 2.1.1
plunky
8
-93
/
+1516
2016-09-02
don't need to specify EIGENDIR since eigen3 pkg-config is fixed
plunky
1
-4
/
+2
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