Age | Commit message (Collapse) | Author | Files | Lines |
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A few new features have been added to allow proper simulation with
newer Xilinx UNISIM models. (They are starting to use Verilog 2001
features.) And also various bug fixes in this release.
-- Primitive and continuous assign delays can now be non-constant. This
needed some new run-time support, so vvp had a slight format change,
and certain new optimizations follow as a result.
-- Bug handling certain constant sub-expressions in concatenation
expressions. Also, allow concat expressions in constant contexts.
-- Support for wide divide expressions.
-- Fixes for stubborn compilers.
-- Fix bugs in padding of signed expressions.
-- More fixes for following the data types of expressions.
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- added autobackup (saves to backup files every <n> seconds)
- added "L" drawing support
- added embedded picture support
- added a few new symbols
- added support for spice netlisting of Josephson junction devices
- added pcbpins netlist backend for forward annotating schematic pin
names to PCB layouts.
- several odd bug fixes
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of the shlib major bump.
PKGREVISION++ for the dependencies.
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packages - specially of packages that I haven't touched for a long
while or those that other people can handle better than me.
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- fixes a bug in the cgi frontend for coupled microstrip which caused
lots of bad warning messages.
- replaces the alert dialog box with a log window which prevents multiple
alert windows from appearing.
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with DragonFly's system headers. Fix errno.
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On DragonFly, just fetch using the macros, e.g. using the slow path.
Use pkgsrc readline instead of local version. Bump revision.
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needed on DragonFly and FreeBSD 4, not hurting on other platforms.
Add DragonFly to the BSD enumeration.
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without affecting packages that are currently using it.
Packages which previously didn't set BUILDLINK_DEPMETHOD to neither "full" nor
"build" now set it to "full", but should be checked whether they really need it
(comment added). Packages which previously set it to "build" now don't set it
anymore.
Ok by jlam, wiz.
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the stupid^Wbroken configure check at the moment, but this fixes the
problem.
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access of template members without template argument, explicit
constructor vs. copy constructor.
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macro.
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of the shared libXm has changed.
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Change most pkgs to depend on either
emulators/suse_linux/Makefile.application (normal pkgs) or
Makefile.common (suse91 and suse themselves) to filter out Operating
Systems without Linux ABI support. Use CPU masks to limit the pkg to
supported platforms.
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CONFIGURE_ARGS.
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example MAKE_ENV+=FOO=${BAR} is changed to MAKE_ENV+=FOO=${BAR:Q}. Some
other changes are outlined in
http://mail-index.netbsd.org/tech-pkg/2005/12/02/0034.html
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extracting anything, but the patches for the other wcalc packages all live
in this common spot. Fixes recently noted build problems.
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delete the old cad/pcb package. The package which has lived in cad/pcb
for the last few years was horribly out of date and pcb is not making
a distinction right now between -current snapshots and normal releases.
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Note that this package still only works on systems with
a native (not emulated) matlab.
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the appropriate tool via USE_TOOLS (usually "gs:run"), and remove
ghostscript.mk. This change removes a rather out-dated file from
pkgsrc and switches packages to use the more compact implementation
of the Ghostcript-handling inside the tools framework.
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- WARN: boolean/Makefile:21: GCC_REQD should be modified using "+=".
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string terminator.
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- Replaced #defined with #none for EXTRACT_ONLY.
- Replaced #defined with yes for NO_BUILD, NO_CONFIGURE, NO_MTREE.
- Removed NO_CHECKSUM completely, as a distinfo file exists, it has the
correct checksums, and I couldn't find even a hint to why NO_CHECKSUM
was set.
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Revision history for Dinotrace
The contributors that suggested a given feature are shown in [].
* Dinotrace 9.3a 06/13/2005
*** Fix too small buttons under openmotif.
*** Fix missing keyboard accelerators under openmotif.
* Dinotrace 9.2b 05/03/2005
*** The default extension for Verilog dumps is now .vcd instead of .dmp.
**** Fix traces containing only real numbers. [Vitor Antunes]
**** Fix segfault when doing signal adds. [Guy Hutchinson]
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Revision history for Dinotrace
The contributors that suggested a given feature are shown in [].
* Dinotrace 9.3a 06/13/2005
*** Fix too small buttons under openmotif.
*** Fix missing keyboard accelerators under openmotif.
* Dinotrace 9.2b 05/03/2005
*** The default extension for Verilog dumps is now .vcd instead of .dmp.
**** Fix traces containing only real numbers. [Vitor Antunes]
**** Fix segfault when doing signal adds. [Guy Hutchinson]
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Changes are:
Ng-spice-rework-17
============
This is a bug fix release. Previous release tarball did not included
an include file necessary for compiling numparam library.
Ng-spice-rework-16
============
Rework-16 comes out after almost one year of CVS development (from
15-fixedRC3). This release improves ngspice in three ways:
- Bug fixing: most of the bugs that affected rework-15 have been fixed,
thus ngspice is more stable, especially the xspice extension, the
subcircuit (X devices) handling and the numparam library.
- New features: netlist syntax has been expandend allowing for end-of-line
comments. A ".global" card has beed added to define global nodes, i.e.
nodes that are not expanded in subcircuits. It is possible to define TC
for resistors on the instance line. The editline library can be used
instead of readline (no more GPL license violation).
- Porting: ngspice now works (with xspice extension) on Windows using
MINGW/MSYS.
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It is more consistent with the tex.buildlink3.mk name. Also, if a package
really needs latex, it just has to set TEX_ACCEPTED to latex distributions
altough today, all TEX_ACCEPTED possibilities are latex distributions
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use LATEX_DEPMETHOD=build
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use LATEX_DEPMETHOD=build, and allow version 1,2 and 3 of teTeX
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This is the stdio frontend for the Wcalc transmission
line analysis/synthesis calculator.
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This is the Matlab frontend for the Wcalc transmission
line analysis/synthesis calculator. You will need a working
matlab installed on your system. In addition, currently
only a native (non-emulation) matlab is supported.
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Wcalc is a transmission line analysis and synthesis tool. Several
structures including air core solenoid inductors, coaxial cable,
single and coupled microstrip, stripline, and metal-insulator-
semiconductor microstrip are included.
Wcalc can analyze the electrical parameters for a given physical
description of the structure or synthesize the required dimensions
to meet certain desired electrical characteristics.
Wcalc provides several different frontends for accessing the numeric
engine. Currently, there is a GTK based standalone graphical
user interface, a common gateway interface (CGI) for web access,
Scilab, Octave, and Matlab interfaces for maximum flexibility within
a scientific programming environment, and a standard input/output
(stdio) interface which allows a simple interface to other 3rd
party tools which can communicate via a pipe.
The different frontends are installed as different packages for
flexibility in deployment.
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