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2021-10-26cross: Replace RMD160 checksums with BLAKE2s checksumsnia1-3/+3
All checksums have been double-checked against existing RMD160 and SHA512 hashes The following distfiles could not be fetched (some may be fetched conditionally): ./cross/avr-gcc/distinfo isl-0.24.tar.bz2
2021-10-07cross: Remove SHA1 hashes for distfilesnia1-3/+1
2020-02-11skip host_detect_local_cpu() if CROSS_DIRECTORY_STRUCTURE.mrg1-1/+2
2019-05-12Update to 8.3.0ryoon1-9/+9
* Update GCC to 8.3.0 * Update NEWLIB to 3.1.0
2018-07-30Update to 8.2ryoon1-5/+5
Changelog: General Improvements Fixed LTO link-time performance problems caused by an overflow in the partitioning algorithm while building large binaries. Language Specific Changes C++ GCC 8.2 fixed a bug introduced in GCC 8.1 affecting passing or returning of classes with a deleted copy constructor and defaulted trivial move constructor (bug c++/86094). GCC 8.2 introduces -fabi-version=13 and makes it the default, ABI incompatibilities between GCC 8.1 and 8.2 can be reported with -Wabi=12. See C++ changes for more details. Target Specific Changes IA-32/x86-64 -mtune=native performance regression PR84413 on Intel Skylake processors has been fixed.
2018-05-26Update to 8.1.0ryoon1-5/+5
Update to latest GCC release.
2018-01-29Update to 7.3.0ryoon1-9/+9
* Use newlib-3.0.0 Changelog: Bugfixes
2017-08-16Update to 7.2ryoon1-5/+5
* Bugfixes
2017-05-16Update to 7.1.0ryoon1-5/+6
Changelog: ARM Support for the ARMv5 and ARMv5E architectures has been deprecated (which have no known implementations) and will be removed in a future GCC release. Note that ARMv5T, ARMv5TE and ARMv5TEJ architectures remain supported. The values armv5 and armv5e of -march are thus deprecated. The ARMv8.2-A architecture and the ARMv8.2-A 16-bit Floating-Point Extensions are now supported. They can be used by specifying the -march=armv8.2-a or -march=armv8.2-a+fp16 options. The 16-bit Floating-Point Extensions introduce new half-precision data processing floating-point instructions. The ARMv8-M architecture is now supported in its two architecture profiles: ARMv8-M Baseline and ARMv8-M Mainline with its DSP and Floating-Point Extensions. They can be used by specifying the -march=armv8-m.base, armv8-m.main or armv8-m.main+dsp options. Support has been added for the following processors (GCC identifiers in parentheses): ARM Cortex-A73 (cortex-a73), ARM Cortex-M23 (cortex-m23) and ARM Cortex-M33 (cortex-m33). The GCC identifiers can be used as arguments to the -mcpu or -mtune options, for example: -mcpu=cortex-a73 or -mtune=cortex-m33. A new command-line option -mpure-code has been added. It does not allow constant data to be placed in code sections. This option is only available when generating non-PIC code for ARMv7-M targets. Support for the ACLE Coprocessor Intrinsics has been added. This enables the generation of coprocessor instructions through the use of intrinsics such as cdp, ldc, and others. The configure option --with-multilib-list now accepts the value rmprofile to build multilib libraries for a range of embedded targets. See our installation instructions for details.
2017-01-22Update to 6.3.0ryoon1-9/+9
Changelog: * The default mode for C++ is now -std=gnu++14 instead of -std=gnu++98. # ARM Support for revisions of the ARM architecture prior to ARMv4t has been deprecated and will be removed in a future GCC release. The -mcpu and -mtune values that are deprecated are: arm2, arm250, arm3, arm6, arm60, arm600, arm610, arm620, arm7, arm7d, arm7di, arm70, arm700, arm700i, arm710, arm720, arm710c, arm7100, arm7500, arm7500fe, arm7m, arm7dm, arm7dmi, arm8, arm810, strongarm, strongarm110, strongarm1100, strongarm1110, fa526, fa626. The value arm7tdmi is still supported. The values of -march that are deprecated are: armv2,armv2a,armv3,armv3m,armv4. The ARM port now supports target attributes and pragmas. Please refer to the documentation for details of available attributes and pragmas as well as usage instructions. Support has been added for the following processors (GCC identifiers in parentheses): ARM Cortex-A32 (cortex-a32), ARM Cortex-A35 (cortex-a35) and ARM Cortex-R8 (cortex-r8). The GCC identifiers can be used as arguments to the -mcpu or -mtune options, for example: -mcpu=cortex-a32 or -mtune=cortex-a35.
2016-10-19Import cross-arm-none-eabi-gcc-6.2.0 as cross/arm-none-eabi-gcc.ryoon1-0/+14
GCC for bare metal ARM EABI environment with newlib.