From 30e0937c7680ed54a5ea20fa981b5dcef39a4807 Mon Sep 17 00:00:00 2001 From: dmcmahill Date: Tue, 7 Mar 2000 16:10:37 +0000 Subject: add and enable verilog-current --- cad/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'cad/Makefile') diff --git a/cad/Makefile b/cad/Makefile index cd34d0de8a5..9757f1c1b10 100644 --- a/cad/Makefile +++ b/cad/Makefile @@ -1,4 +1,4 @@ -# $NetBSD: Makefile,v 1.23 2000/03/01 18:34:13 dmcmahill Exp $ +# $NetBSD: Makefile,v 1.24 2000/03/07 16:10:37 dmcmahill Exp $ # FreeBSD Id: Makefile,v 1.8 1997/11/17 10:53:52 tg Exp # @@ -21,6 +21,7 @@ SUBDIR += spice SUBDIR += spiceprm SUBDIR += verilog + SUBDIR += verilog-current SUBDIR += vipec SUBDIR += xchiplogo -- cgit v1.2.3