From ed85ae5f6b74655dad79cdcee5841f34fadc94e4 Mon Sep 17 00:00:00 2001 From: dmcmahill Date: Wed, 26 Jan 2000 15:29:32 +0000 Subject: add and enable verilog --- cad/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'cad/Makefile') diff --git a/cad/Makefile b/cad/Makefile index b8ee1fca01b..4b42b54b90c 100644 --- a/cad/Makefile +++ b/cad/Makefile @@ -1,4 +1,4 @@ -# $NetBSD: Makefile,v 1.18 2000/01/24 22:14:13 dmcmahill Exp $ +# $NetBSD: Makefile,v 1.19 2000/01/26 15:29:32 dmcmahill Exp $ # FreeBSD Id: Makefile,v 1.8 1997/11/17 10:53:52 tg Exp # @@ -23,6 +23,7 @@ SUBDIR += pcb SUBDIR += spice SUBDIR += spiceprm + SUBDIR += verilog SUBDIR += vipec SUBDIR += xchiplogo -- cgit v1.2.3