From 4056254343667a92f8611c2720e8bea11c114978 Mon Sep 17 00:00:00 2001 From: dmcmahill Date: Fri, 27 Oct 2000 03:59:47 +0000 Subject: update to 20001021 snapshot of verilog-current from the authors announcement: ----------------------------- The loadable target module API is starting to take shape. That is the major thrust nowadays with Icarus Verilog, after all, so progress is being made here. The biggest change is in fact a philosophy change. The target module now needs only a single symbol -- target_design -- to receive the whole design. The target module can from there and using the API access the entire design randomly. So if you wanted to implement a graphical browser, you could:-) I've added support for the l-values of procedural assignments, and also back pointers to objects that reference ivl_nexus_t objects. This closes the loop so that there should be no dead-ends in the design. I've clarified and expanded the descriptions in the ivl_target.h header file. There should be just about enough documentation to properly used all the various types. (Have any of you tried to write GIMP plug-ins? Have you looked at the libgimp header files? Have you seen any comments there?-( I won't ever sink to that level, I hope.) I've also imtegrated updates to the Cygwin32 port to support loadable targets under Cygwin32. After much struggling, Venkat managed to discover the secret magic needed to get load time symbol binding to work. Hopefully I didn't break it too bad when I changed the API again. (I think it is still fine.) --- cad/verilog-current/Makefile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'cad/verilog-current/Makefile') diff --git a/cad/verilog-current/Makefile b/cad/verilog-current/Makefile index 13efab7a276..558f4066f39 100644 --- a/cad/verilog-current/Makefile +++ b/cad/verilog-current/Makefile @@ -1,8 +1,8 @@ -# $NetBSD: Makefile,v 1.7 2000/08/06 15:43:34 dmcmahill Exp $ +# $NetBSD: Makefile,v 1.8 2000/10/27 03:59:47 dmcmahill Exp $ # -DISTNAME= verilog-20000805 -PKGNAME= verilog-current-20000805 +DISTNAME= verilog-20001021 +PKGNAME= verilog-current-20001021 CATEGORIES= cad MASTER_SITES= ftp://icarus.com/pub/eda/verilog/snapshots/ -- cgit v1.2.3