From bab3be8890d768a794fdbd871efd257b31b4e5cd Mon Sep 17 00:00:00 2001 From: rillig Date: Sun, 28 May 2006 17:31:26 +0000 Subject: For building verilog, lex is indeed needed. --- cad/verilog/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'cad/verilog') diff --git a/cad/verilog/Makefile b/cad/verilog/Makefile index 9dd24b2d234..20790dbf770 100644 --- a/cad/verilog/Makefile +++ b/cad/verilog/Makefile @@ -1,4 +1,4 @@ -# $NetBSD: Makefile,v 1.28 2006/05/22 19:58:48 joerg Exp $ +# $NetBSD: Makefile,v 1.29 2006/05/28 17:31:26 rillig Exp $ # DISTNAME= verilog-0.8.2 @@ -16,7 +16,7 @@ CONFLICTS+= verilog-current-[0-9]* USE_LANGUAGES= c c++ GNU_CONFIGURE= yes -USE_TOOLS+= gmake bison +USE_TOOLS+= gmake bison lex CONFIGURE_ARGS+= --without-ipal TEST_TARGET= check -- cgit v1.2.3