From 3df9274e0e211f0a396ae06c924a6ce7cbb1224e Mon Sep 17 00:00:00 2001 From: kamil Date: Sat, 8 Oct 2016 14:21:12 +0000 Subject: Remove verilog-current It used to track icarus verilog but there is no update since 20090923. No objections from --- cad/verilog-current/DESCR | 16 ---------- cad/verilog-current/Makefile | 36 --------------------- cad/verilog-current/PLIST | 37 ---------------------- cad/verilog-current/buildlink3.mk | 13 -------- cad/verilog-current/distinfo | 9 ------ cad/verilog-current/patches/patch-ad | 20 ------------ cad/verilog-current/patches/patch-net__scope.cc | 17 ---------- .../patches/patch-pform__disciplines.cc | 35 -------------------- 8 files changed, 183 deletions(-) delete mode 100644 cad/verilog-current/DESCR delete mode 100644 cad/verilog-current/Makefile delete mode 100644 cad/verilog-current/PLIST delete mode 100644 cad/verilog-current/buildlink3.mk delete mode 100644 cad/verilog-current/distinfo delete mode 100644 cad/verilog-current/patches/patch-ad delete mode 100644 cad/verilog-current/patches/patch-net__scope.cc delete mode 100644 cad/verilog-current/patches/patch-pform__disciplines.cc (limited to 'cad') diff --git a/cad/verilog-current/DESCR b/cad/verilog-current/DESCR deleted file mode 100644 index 5b1676fc19a..00000000000 --- a/cad/verilog-current/DESCR +++ /dev/null @@ -1,16 +0,0 @@ -Icarus Verilog is a Verilog simulation and synthesis tool. It operates as a -compiler, compiling source code writen in Verilog (IEEE-1364) into some target -format. For batch simulation, the compiler can generate C++ code that is -compiled and linked with a run time library (called "vvm") then executed as -a command to run the simulation. For synthesis, the compiler generates -netlists in the desired format. - -The compiler proper is intended to parse and elaborate design descriptions -written to the IEEE standard IEEE Std 1364-1995. This is a fairly large and -complex standard, so it will take some time for it to get there, but that's -the goal. I'll be tracking the upcoming IEEE Std 1364-1999 revision as well, -and some -1999 features will creep in. - -Please note that this package is a development snapshot and while it contains -the latest and greatest features, it may be buggy as well. There is a separate -verilog package which is made of the stable releases. diff --git a/cad/verilog-current/Makefile b/cad/verilog-current/Makefile deleted file mode 100644 index 11751d22676..00000000000 --- a/cad/verilog-current/Makefile +++ /dev/null @@ -1,36 +0,0 @@ -# $NetBSD: Makefile,v 1.61 2014/10/09 14:06:01 wiz Exp $ -# - -DISTNAME= verilog-${SNAPDATE} -PKGNAME= verilog-current-${SNAPDATE} -PKGREVISION= 1 -CATEGORIES= cad -MASTER_SITES= ftp://icarus.com/pub/eda/verilog/snapshots/ - -MAINTAINER= dmcmahill@NetBSD.org -HOMEPAGE= http://icarus.com/eda/verilog/index.html -COMMENT= Verilog simulation and synthesis tool (development snapshot version) -LICENSE= gnu-gpl-v2 - -# In driver: -# mkdir: dep: Not a directory -# Makefile:76: recipe for target 'dep' failed -MAKE_JOBS_SAFE= no - -CONFLICTS+= verilog-[0-9]* - -GCC_REQD+= 3.0 -USE_LANGUAGES= c c++ - -SNAPDATE= 20090923 -GNU_CONFIGURE= yes -USE_TOOLS+= bison gmake lex -CONFIGURE_ARGS+= --without-ipal -TEST_DIRS= . -TEST_TARGET= check - -.include "../../devel/zlib/buildlink3.mk" -.include "../../archivers/bzip2/buildlink3.mk" -.include "../../devel/gperf/buildlink3.mk" -.include "../../mk/readline.buildlink3.mk" -.include "../../mk/bsd.pkg.mk" diff --git a/cad/verilog-current/PLIST b/cad/verilog-current/PLIST deleted file mode 100644 index 75f81f73ac0..00000000000 --- a/cad/verilog-current/PLIST +++ /dev/null @@ -1,37 +0,0 @@ -@comment $NetBSD: PLIST,v 1.11 2010/02/28 15:59:18 dmcmahill Exp $ -bin/iverilog -bin/iverilog-vpi -bin/vvp -include/iverilog/_pli_types.h -include/iverilog/acc_user.h -include/iverilog/ivl_target.h -include/iverilog/veriuser.h -include/iverilog/vpi_user.h -lib/libveriuser.a -lib/libvpi.a -lib/ivl/include/constants.vams -lib/ivl/include/disciplines.vams -lib/ivl/cadpli.vpl -lib/ivl/ivl -lib/ivl/ivlpp -lib/ivl/null-s.conf -lib/ivl/null.conf -lib/ivl/null.tgt -lib/ivl/stub-s.conf -lib/ivl/stub.conf -lib/ivl/stub.tgt -lib/ivl/system.sft -lib/ivl/system.vpi -lib/ivl/v2005_math.sft -lib/ivl/v2005_math.vpi -lib/ivl/va_math.sft -lib/ivl/va_math.vpi -lib/ivl/vhdl-s.conf -lib/ivl/vhdl.conf -lib/ivl/vhdl.tgt -lib/ivl/vvp-s.conf -lib/ivl/vvp.conf -lib/ivl/vvp.tgt -man/man1/iverilog.1 -man/man1/iverilog-vpi.1 -man/man1/vvp.1 diff --git a/cad/verilog-current/buildlink3.mk b/cad/verilog-current/buildlink3.mk deleted file mode 100644 index bd974349a29..00000000000 --- a/cad/verilog-current/buildlink3.mk +++ /dev/null @@ -1,13 +0,0 @@ -# $NetBSD: buildlink3.mk,v 1.10 2012/05/07 01:53:16 dholland Exp $ - -BUILDLINK_TREE+= verilog-current - -.if !defined(VERILOG_CURRENT_BUILDLINK3_MK) -VERILOG_CURRENT_BUILDLINK3_MK:= - -BUILDLINK_API_DEPENDS.verilog-current+= verilog-current>=20021019 -BUILDLINK_ABI_DEPENDS.verilog-current+= verilog-current>=20060809 -BUILDLINK_PKGSRCDIR.verilog-current?= ../../cad/verilog-current -.endif # VERILOG_CURRENT_BUILDLINK3_MK - -BUILDLINK_TREE+= -verilog-current diff --git a/cad/verilog-current/distinfo b/cad/verilog-current/distinfo deleted file mode 100644 index 18e0785df8d..00000000000 --- a/cad/verilog-current/distinfo +++ /dev/null @@ -1,9 +0,0 @@ -$NetBSD: distinfo,v 1.33 2015/11/03 00:21:20 agc Exp $ - -SHA1 (verilog-20090923.tar.gz) = 1836ebc4ef78341fb1a077e807c8d5b195ebb253 -RMD160 (verilog-20090923.tar.gz) = 32a009d1390e71721d3a72a1940b655ed1853ba5 -SHA512 (verilog-20090923.tar.gz) = b873ddc7e300f504ded0ba0e71527f1a24ba469d7aa8603b8e83f32cb29da2219b6e0c68060a1d1a32450024640e0b47d8284d52f0733c396651c2cfef3e6b7d -Size (verilog-20090923.tar.gz) = 1121376 bytes -SHA1 (patch-ad) = 9492af75153405c49076f2dcd11d2dc338640514 -SHA1 (patch-net__scope.cc) = 97cf7d099b30b3549ad6262022ca32e8790b5d66 -SHA1 (patch-pform__disciplines.cc) = 113365b68723462791728e6f998685a4ebca3547 diff --git a/cad/verilog-current/patches/patch-ad b/cad/verilog-current/patches/patch-ad deleted file mode 100644 index f6c2be77b90..00000000000 --- a/cad/verilog-current/patches/patch-ad +++ /dev/null @@ -1,20 +0,0 @@ -$NetBSD: patch-ad,v 1.13 2006/08/11 13:28:08 dmcmahill Exp $ - ---- Makefile.in.orig 2006-05-01 20:47:29.000000000 +0000 -+++ Makefile.in 2006-08-10 18:21:19.000000000 +0000 -@@ -160,5 +160,15 @@ - lexor.o: lexor.cc parse.h - -+# work around buggy compilers when compiling the parser with optimization -+# make sure no one sneaks a -O* in on us via one of these variables -+# set in the environment -+CXX_NOOPT=$(CXX:-O%=) -+CPPFLAGS_NOOPT=$(CPPFLAGS:-O%=) -+CXXFLAGS_NOOPT=$(CXXFLAGS:-O%=) -+ - parse.o: parse.cc -+ @[ -d dep ] || mkdir dep -+ $(CXX_NOOPT) $(CPPFLAGS_NOOPT) $(CXXFLAGS_NOOPT) -MD -c $< -o $*.o -+ mv $*.d dep/$*.d - - parse.cc parse.h: $(srcdir)/parse.y diff --git a/cad/verilog-current/patches/patch-net__scope.cc b/cad/verilog-current/patches/patch-net__scope.cc deleted file mode 100644 index 43a05244ec4..00000000000 --- a/cad/verilog-current/patches/patch-net__scope.cc +++ /dev/null @@ -1,17 +0,0 @@ -$NetBSD: patch-net__scope.cc,v 1.1 2013/05/23 15:00:00 joerg Exp $ - ---- net_scope.cc.orig 2013-05-22 14:46:10.000000000 +0000 -+++ net_scope.cc -@@ -221,11 +221,7 @@ map: - if (idx != parameters.end()) - return idx; - -- idx = localparams.find(perm_string::literal(key)); -- if (idx != localparams.end()) -- return idx; -- -- return (map::iterator) 0; -+ return localparams.find(perm_string::literal(key)); - } - - NetScope::TYPE NetScope::type() const diff --git a/cad/verilog-current/patches/patch-pform__disciplines.cc b/cad/verilog-current/patches/patch-pform__disciplines.cc deleted file mode 100644 index 59dacc52de7..00000000000 --- a/cad/verilog-current/patches/patch-pform__disciplines.cc +++ /dev/null @@ -1,35 +0,0 @@ -$NetBSD: patch-pform__disciplines.cc,v 1.1 2011/11/26 17:10:24 joerg Exp $ - ---- pform_disciplines.cc.orig 2011-11-26 03:29:20.000000000 +0000 -+++ pform_disciplines.cc -@@ -27,8 +27,8 @@ map natures; - map disciplines; - map access_function_nature; - --static perm_string nature_name = perm_string::perm_string(); --static perm_string nature_access = perm_string::perm_string(); -+static perm_string nature_name = perm_string(); -+static perm_string nature_access = perm_string(); - - void pform_start_nature(const char*name) - { -@@ -82,8 +82,8 @@ void pform_end_nature(const struct vllty - // expressions that use the access function can find it. - access_function_nature[nature_access] = tmp; - -- nature_name = perm_string::perm_string(); -- nature_access = perm_string::perm_string(); -+ nature_name = perm_string(); -+ nature_access = perm_string(); - } - - -@@ -171,7 +171,7 @@ void pform_end_discipline(const struct v - FILE_NAME(tmp, loc); - - /* Clear the static variables for the next item. */ -- discipline_name = perm_string::perm_string(); -+ discipline_name = perm_string(); - discipline_domain = IVL_DIS_NONE; - discipline_potential = 0; - discipline_flow = 0; -- cgit v1.2.3