From 4b3af68b642fa7f789f05fe6f31e0ebd6944e995 Mon Sep 17 00:00:00 2001
From: dmcmahill <dmcmahill@pkgsrc.org>
Date: Mon, 14 Oct 2002 02:28:51 +0000
Subject: add and enable verilog-mode

---
 cad/Makefile | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'cad')

diff --git a/cad/Makefile b/cad/Makefile
index d2869bee426..f6e134b2571 100644
--- a/cad/Makefile
+++ b/cad/Makefile
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.40 2002/04/06 21:39:34 dmcmahill Exp $
+# $NetBSD: Makefile,v 1.41 2002/10/14 02:28:51 dmcmahill Exp $
 #
 
 COMMENT=	CAD tools
@@ -39,6 +39,7 @@ SUBDIR+=	spice
 SUBDIR+=	spiceprm
 SUBDIR+=	verilog
 SUBDIR+=	verilog-current
+SUBDIR+=	verilog-mode
 SUBDIR+=	vipec
 SUBDIR+=	xchiplogo
 SUBDIR+=	xcircuit
-- 
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