Imported Upstream version 2011-02-01.1upstream/2011-02-01.1

7 files changed, 300 insertions, 196 deletions

diff --git a/src/cmd/5g/cgen.c b/src/cmd/5g/cgen.c
index 1328f4be6..032409bae 100644
--- a/src/cmd/5g/cgen.c
+++ b/src/cmd/5g/cgen.c
@@ -169,7 +169,7 @@ cgen(Node *n, Node *res)
 
 	case OREAL:
 	case OIMAG:
-	case OCMPLX:
+	case OCOMPLEX:
 		fatal("unexpected complex");
 		break;
 
@@ -567,7 +567,8 @@ agen(Node *n, Node *res)
 				regalloc(&n1, tmp.type, N);
 				gmove(&tmp, &n1);
 			}
-		} else if(nl->addable) {
+		} else
+		if(nl->addable) {
 			if(!isconst(nr, CTINT)) {
 				tempname(&tmp, types[TINT32]);
 				p2 = cgenindex(nr, &tmp);
@@ -671,7 +672,8 @@ agen(Node *n, Node *res)
 			p1 = gins(AMOVW, N, &n3);
 			datastring(nl->val.u.sval->s, nl->val.u.sval->len, &p1->from);
 			p1->from.type = D_CONST;
-		} else if(isslice(nl->type) || nl->type->etype == TSTRING) {
+		} else
+		if(isslice(nl->type) || nl->type->etype == TSTRING) {
 			n1 = n3;
 			n1.op = OINDREG;
 			n1.type = types[tptr];
@@ -813,6 +815,28 @@ agenr(Node *n, Node *a, Node *res)
 	agen(n, a);
 }
 
+void
+gencmp0(Node *n, Type *t, int o, Prog *to)
+{
+	Node n1, n2, n3;
+	int a;
+
+	regalloc(&n1, t, N);
+	cgen(n, &n1);
+	a = optoas(OCMP, t);
+	if(a != ACMP) {
+		nodconst(&n2, t, 0);
+		regalloc(&n3, t, N);
+		gmove(&n2, &n3);
+		gcmp(a, &n1, &n3);
+		regfree(&n3);
+	} else
+		gins(ATST, &n1, N);
+	a = optoas(o, t);
+	patch(gbranch(a, t), to);
+	regfree(&n1);
+}
+
 /*
  * generate:
  *	if(n == true) goto to;
@@ -855,19 +879,10 @@ bgen(Node *n, int true, Prog *to)
 
 	switch(n->op) {
 	default:
-	def:
-		regalloc(&n1, n->type, N);
-		cgen(n, &n1);
-		nodconst(&n2, n->type, 0);
-		regalloc(&n3, n->type, N);
-		gmove(&n2, &n3);
-		gcmp(optoas(OCMP, n->type), &n1, &n3);
-		a = ABNE;
+		a = ONE;
 		if(!true)
-			a = ABEQ;
-		patch(gbranch(a, n->type), to);
-		regfree(&n1);
-		regfree(&n3);
+			a = OEQ;
+		gencmp0(n, n->type, a, to);
 		goto ret;
 
 	case OLITERAL:
@@ -876,23 +891,6 @@ bgen(Node *n, int true, Prog *to)
 			patch(gbranch(AB, T), to);
 		goto ret;
 
-	case ONAME:
-		if(n->addable == 0)
-			goto def;
-		nodconst(&n1, n->type, 0);
-		regalloc(&n2, n->type, N);
-		regalloc(&n3, n->type, N);
-		gmove(&n1, &n2);
-		cgen(n, &n3);
-		gcmp(optoas(OCMP, n->type), &n2, &n3);
-		a = ABNE;
-		if(!true)
-			a = ABEQ;
-		patch(gbranch(a, n->type), to);
-		regfree(&n2);
-		regfree(&n3);
-		goto ret;
-
 	case OANDAND:
 		if(!true)
 			goto caseor;
@@ -975,6 +973,16 @@ bgen(Node *n, int true, Prog *to)
 				yyerror("illegal array comparison");
 				break;
 			}
+
+			regalloc(&n1, types[tptr], N);
+			agen(nl, &n1);
+			n2 = n1;
+			n2.op = OINDREG;
+			n2.xoffset = Array_array;
+			gencmp0(&n2, types[tptr], a, to);
+			regfree(&n1);
+			break;
+
 			a = optoas(a, types[tptr]);
 			regalloc(&n1, types[tptr], N);
 			regalloc(&n3, types[tptr], N);
@@ -1000,6 +1008,16 @@ bgen(Node *n, int true, Prog *to)
 				yyerror("illegal interface comparison");
 				break;
 			}
+
+			regalloc(&n1, types[tptr], N);
+			agen(nl, &n1);
+			n2 = n1;
+			n2.op = OINDREG;
+			n2.xoffset = 0;
+			gencmp0(&n2, types[tptr], a, to);
+			regfree(&n1);
+			break;
+
 			a = optoas(a, types[tptr]);
 			regalloc(&n1, types[tptr], N);
 			regalloc(&n3, types[tptr], N);
@@ -1039,6 +1057,17 @@ bgen(Node *n, int true, Prog *to)
 			break;
 		}
 
+		if(nr->op == OLITERAL) {
+			if(nr->val.ctype == CTINT &&  mpgetfix(nr->val.u.xval) == 0) {
+				gencmp0(nl, nl->type, a, to);
+				break;
+			}
+			if(nr->val.ctype == CTNIL) {
+				gencmp0(nl, nl->type, a, to);
+				break;
+			}
+		}
+
 		a = optoas(a, nr->type);
 
 		if(nr->ullman >= UINF) {
@@ -1063,11 +1092,17 @@ bgen(Node *n, int true, Prog *to)
 			break;
 		}
 
+		tempname(&n3, nl->type);
+		cgen(nl, &n3);
+
+		tempname(&tmp, nr->type);
+		cgen(nr, &tmp);
+
 		regalloc(&n1, nl->type, N);
-		cgen(nl, &n1);
+		gmove(&n3, &n1);
 
 		regalloc(&n2, nr->type, N);
-		cgen(nr, &n2);
+		gmove(&tmp, &n2);
 
 		gcmp(optoas(OCMP, nr->type), &n1, &n2);
 		if(isfloat[nl->type->etype]) {
@@ -1080,7 +1115,6 @@ bgen(Node *n, int true, Prog *to)
 		} else {
 			patch(gbranch(a, nr->type), to);
 		}
-
 		regfree(&n1);
 		regfree(&n2);
 		break;
diff --git a/src/cmd/5g/cgen64.c b/src/cmd/5g/cgen64.c
index 716ec5ed5..78f2f4aeb 100644
--- a/src/cmd/5g/cgen64.c
+++ b/src/cmd/5g/cgen64.c
@@ -233,8 +233,7 @@ cgen64(Node *n, Node *res)
 			// shift is >= 1<<32
 			split64(r, &cl, &ch);
 			gmove(&ch, &s);
-			p1 = gins(AMOVW, &s, &s);
-			p1->scond |= C_SBIT;
+			p1 = gins(ATST, &s, N);
 			p6 = gbranch(ABNE, T);
 			gmove(&cl, &s);
 			splitclean();
@@ -242,8 +241,7 @@ cgen64(Node *n, Node *res)
 			gmove(r, &s);
 			p6 = P;
 		}
-		p1 = gins(AMOVW, &s, &s);
-		p1->scond |= C_SBIT;
+		p1 = gins(ATST, &s, N);
 
 		// shift == 0
 		p1 = gins(AMOVW, &bl, &al);
@@ -390,8 +388,7 @@ olsh_break:
 			// shift is >= 1<<32
 			split64(r, &cl, &ch);
 			gmove(&ch, &s);
-			p1 = gins(AMOVW, &s, &s);
-			p1->scond |= C_SBIT;
+			p1 = gins(ATST, &s, N);
 			p6 = gbranch(ABNE, T);
 			gmove(&cl, &s);
 			splitclean();
@@ -399,8 +396,7 @@ olsh_break:
 			gmove(r, &s);
 			p6 = P;
 		}
-		p1 = gins(AMOVW, &s, &s);
-		p1->scond |= C_SBIT;
+		p1 = gins(ATST, &s, N);
 
 		// shift == 0
 		p1 = gins(AMOVW, &bl, &al);
diff --git a/src/cmd/5g/galign.c b/src/cmd/5g/galign.c
index 9c8760aea..0fece9a08 100644
--- a/src/cmd/5g/galign.c
+++ b/src/cmd/5g/galign.c
@@ -17,8 +17,6 @@ Typedef	typedefs[] =
 	"int",		TINT,		TINT32,
 	"uint",		TUINT,		TUINT32,
 	"uintptr",	TUINTPTR,	TUINT32,
-	"float",	TFLOAT,		TFLOAT32,
-	"complex",	TCOMPLEX,	TCOMPLEX64,
 	0
 };
 
diff --git a/src/cmd/5g/ggen.c b/src/cmd/5g/ggen.c
index 42a89415d..182d7f147 100644
--- a/src/cmd/5g/ggen.c
+++ b/src/cmd/5g/ggen.c
@@ -172,7 +172,7 @@ ginscall(Node *f, int proc)
 		p->to.reg = REGSP;
 		p->to.offset = 8;
 
-		nodconst(&con, types[TINT32], argsize(f->type) + 4);
+		nodconst(&con, types[TINT32], argsize(f->type));
 		gins(AMOVW, &con, &r);
 		p = gins(AMOVW, &r, N);
 		p->to.type = D_OREG;
@@ -595,8 +595,7 @@ cgen_shift(int op, Node *nl, Node *nr, Node *res)
 	}
 
 	// test for shift being 0
-	p1 = gins(AMOVW, &n1, &n1);
-	p1->scond |= C_SBIT;
+	p1 = gins(ATST, &n1, N);
 	p3 = gbranch(ABEQ, T);
 
 	// test and fix up large shifts
diff --git a/src/cmd/5g/opt.h b/src/cmd/5g/opt.h
index 9a4e17571..7a0070fc9 100644
--- a/src/cmd/5g/opt.h
+++ b/src/cmd/5g/opt.h
@@ -128,7 +128,7 @@ Reg*	rega(void);
 int	rcmp(const void*, const void*);
 void	regopt(Prog*);
 void	addmove(Reg*, int, int, int);
-Bits	mkvar(Reg *r, Adr *a, int);
+Bits	mkvar(Reg *r, Adr *a);
 void	prop(Reg*, Bits, Bits);
 void	loopit(Reg*, int32);
 void	synch(Reg*, Bits);
diff --git a/src/cmd/5g/peep.c b/src/cmd/5g/peep.c
index 32333e8a9..f619a6206 100644
--- a/src/cmd/5g/peep.c
+++ b/src/cmd/5g/peep.c
@@ -89,11 +89,11 @@ loop1:
 			/*
 			 * elide shift into D_SHIFT operand of subsequent instruction
 			 */
-			if(shiftprop(r)) {
-				excise(r);
-				t++;
-				break;
-			}
+//			if(shiftprop(r)) {
+//				excise(r);
+//				t++;
+//				break;
+//			}
 			break;
 
 		case AMOVW:
@@ -101,10 +101,10 @@ loop1:
 		case AMOVD:
 			if(!regtyp(&p->to))
 				break;
-			if(isdconst(&p->from)) {
-				constprop(&p->from, &p->to, r->s1);
-				break;
-			}
+//			if(isdconst(&p->from)) {
+//				constprop(&p->from, &p->to, r->s1);
+//				break;
+//			}
 			if(!regtyp(&p->from))
 				break;
 			if(p->from.type != p->to.type)
@@ -166,87 +166,89 @@ loop1:
 		excise(r1);
 	}
 
-	for(r=firstr; r!=R; r=r->link) {
-		p = r->prog;
-		switch(p->as) {
-		case AMOVW:
-		case AMOVB:
-		case AMOVBU:
-			if(p->from.type == D_OREG && p->from.offset == 0)
-				xtramodes(r, &p->from);
-			else if(p->to.type == D_OREG && p->to.offset == 0)
-				xtramodes(r, &p->to);
-			else
-				continue;
-			break;
-		case ACMP:
-			/*
-			 * elide CMP $0,x if calculation of x can set condition codes
-			 */
-			if(isdconst(&p->from) || p->from.offset != 0)
-				continue;
-			r2 = r->s1;
-			if(r2 == R)
-				continue;
-			t = r2->prog->as;
-			switch(t) {
-			default:
-				continue;
-			case ABEQ:
-			case ABNE:
-			case ABMI:
-			case ABPL:
-				break;
-			case ABGE:
-				t = ABPL;
-				break;
-			case ABLT:
-				t = ABMI;
-				break;
-			case ABHI:
-				t = ABNE;
-				break;
-			case ABLS:
-				t = ABEQ;
-				break;
-			}
-			r1 = r;
-			do
-				r1 = uniqp(r1);
-			while (r1 != R && r1->prog->as == ANOP);
-			if(r1 == R)
-				continue;
-			p1 = r1->prog;
-			if(p1->to.type != D_REG)
-				continue;
-			if(p1->to.reg != p->reg)
-			if(!(p1->as == AMOVW && p1->from.type == D_REG && p1->from.reg == p->reg))
-				continue;
-			switch(p1->as) {
-			default:
-				continue;
-			case AMOVW:
-				if(p1->from.type != D_REG)
-					continue;
-			case AAND:
-			case AEOR:
-			case AORR:
-			case ABIC:
-			case AMVN:
-			case ASUB:
-			case ARSB:
-			case AADD:
-			case AADC:
-			case ASBC:
-			case ARSC:
-				break;
-			}
-			p1->scond |= C_SBIT;
-			r2->prog->as = t;
-			excise(r);
-			continue;
-		}
-	}
+//	for(r=firstr; r!=R; r=r->link) {
+//		p = r->prog;
+//		switch(p->as) {
+//		case AMOVW:
+//		case AMOVB:
+//		case AMOVBU:
+//			if(p->from.type == D_OREG && p->from.offset == 0)
+//				xtramodes(r, &p->from);
+//			else
+//			if(p->to.type == D_OREG && p->to.offset == 0)
+//				xtramodes(r, &p->to);
+//			else
+//				continue;
+//			break;
+//		case ACMP:
+//			/*
+//			 * elide CMP $0,x if calculation of x can set condition codes
+//			 */
+//			if(isdconst(&p->from) || p->from.offset != 0)
+//				continue;
+//			r2 = r->s1;
+//			if(r2 == R)
+//				continue;
+//			t = r2->prog->as;
+//			switch(t) {
+//			default:
+//				continue;
+//			case ABEQ:
+//			case ABNE:
+//			case ABMI:
+//			case ABPL:
+//				break;
+//			case ABGE:
+//				t = ABPL;
+//				break;
+//			case ABLT:
+//				t = ABMI;
+//				break;
+//			case ABHI:
+//				t = ABNE;
+//				break;
+//			case ABLS:
+//				t = ABEQ;
+//				break;
+//			}
+//			r1 = r;
+//			do
+//				r1 = uniqp(r1);
+//			while (r1 != R && r1->prog->as == ANOP);
+//			if(r1 == R)
+//				continue;
+//			p1 = r1->prog;
+//			if(p1->to.type != D_REG)
+//				continue;
+//			if(p1->to.reg != p->reg)
+//			if(!(p1->as == AMOVW && p1->from.type == D_REG && p1->from.reg == p->reg))
+//				continue;
+//
+//			switch(p1->as) {
+//			default:
+//				continue;
+//			case AMOVW:
+//				if(p1->from.type != D_REG)
+//					continue;
+//			case AAND:
+//			case AEOR:
+//			case AORR:
+//			case ABIC:
+//			case AMVN:
+//			case ASUB:
+//			case ARSB:
+//			case AADD:
+//			case AADC:
+//			case ASBC:
+//			case ARSC:
+//				break;
+//			}
+//			p1->scond |= C_SBIT;
+//			r2->prog->as = t;
+//			excise(r);
+//			continue;
+//		}
+//	}
 
 	predicate();
 }
@@ -331,10 +333,13 @@ subprop(Reg *r0)
 		case ABL:
 			return 0;
 
-		case ACMP:
+		case AMULLU:
+		case AMULA:
+
 		case ACMN:
 		case AADD:
 		case ASUB:
+		case ASBC:
 		case ARSB:
 		case ASLL:
 		case ASRL:
@@ -342,12 +347,14 @@ subprop(Reg *r0)
 		case AORR:
 		case AAND:
 		case AEOR:
+		case AMVN:
 		case AMUL:
+		case AMULU:
 		case ADIV:
 		case ADIVU:
+		case AMOD:
+		case AMODU:
 
-		case ACMPF:
-		case ACMPD:
 		case AADDD:
 		case AADDF:
 		case ASUBD:
@@ -622,8 +629,8 @@ shiftprop(Reg *r)
 	case AADC:
 	case AORR:
 	case ASUB:
-	case ARSB:
 	case ASBC:
+	case ARSB:
 	case ARSC:
 		if(p1->reg == n || (p1->reg == NREG && p1->to.type == D_REG && p1->to.reg == n)) {
 			if(p1->from.type != D_REG)
@@ -648,6 +655,7 @@ shiftprop(Reg *r)
 				print("\t=>%P", p1);
 		}
 	case ABIC:
+	case ATST:
 	case ACMP:
 	case ACMN:
 		if(p1->reg == n)
@@ -922,8 +930,7 @@ copyu(Prog *p, Adr *v, Adr *s)
 	switch(p->as) {
 
 	default:
-		if(debug['P'])
-			print(" (?)");
+		print("copyu: cant find %A\n", p->as);
 		return 2;
 
 	case AMOVM:
@@ -983,7 +990,7 @@ copyu(Prog *p, Adr *v, Adr *s)
 					return 2;
 			} else {
 		  		if(p->to.reg == v->reg)
-				return 2;
+					return 2;
 			}
 		}
 		if(s != A) {
@@ -1005,8 +1012,14 @@ copyu(Prog *p, Adr *v, Adr *s)
 			return 1;
 		return 0;
 
+	case AMULLU:	/* read, read, write, write */
+	case AMULA:
+		return 2;
+
 	case AADD:	/* read, read, write */
+	case AADC:
 	case ASUB:
+	case ASBC:
 	case ARSB:
 	case ASLL:
 	case ASRL:
@@ -1014,9 +1027,13 @@ copyu(Prog *p, Adr *v, Adr *s)
 	case AORR:
 	case AAND:
 	case AEOR:
+	case AMVN:
 	case AMUL:
+	case AMULU:
 	case ADIV:
 	case ADIVU:
+	case AMOD:
+	case AMODU:
 	case AADDF:
 	case AADDD:
 	case ASUBF:
@@ -1028,6 +1045,7 @@ copyu(Prog *p, Adr *v, Adr *s)
 
 	case ACMPF:
 	case ACMPD:
+	case ATST:
 	case ACMP:
 	case ACMN:
 	case ACASE:
@@ -1138,9 +1156,13 @@ a2type(Prog *p)
 
 	switch(p->as) {
 
+	case ATST:
 	case ACMP:
 	case ACMN:
 
+	case AMULLU:
+	case AMULA:
+
 	case AADD:
 	case ASUB:
 	case ARSB:
@@ -1150,9 +1172,13 @@ a2type(Prog *p)
 	case AORR:
 	case AAND:
 	case AEOR:
+	case AMVN:
 	case AMUL:
+	case AMULU:
 	case ADIV:
 	case ADIVU:
+	case AMOD:
+	case AMODU:
 		return D_REG;
 
 	case ACMPF:
@@ -1369,12 +1395,15 @@ int
 modifiescpsr(Prog *p)
 {
 	switch(p->as) {
-	case ATST:
+	case AMULLU:
+	case AMULA:
+	case AMULU:
+	case ADIVU:
+
 	case ATEQ:
 	case ACMN:
+	case ATST:
 	case ACMP:
-	case AMULU:
-	case ADIVU:
 	case AMUL:
 	case ADIV:
 	case AMOD:
diff --git a/src/cmd/5g/reg.c b/src/cmd/5g/reg.c
index 5011e75cc..eaf02b237 100644
--- a/src/cmd/5g/reg.c
+++ b/src/cmd/5g/reg.c
@@ -83,7 +83,7 @@ setoutvar(void)
 		n = nodarg(t, 1);
 		a = zprog.from;
 		naddr(n, &a, 0);
-		bit = mkvar(R, &a, 0);
+		bit = mkvar(R, &a);
 		for(z=0; z<BITS; z++)
 			ovar.b[z] |= bit.b[z];
 		t = structnext(&save);
@@ -137,14 +137,13 @@ regopt(Prog *firstp)
 	uint32 vreg;
 	Bits bit;
 
-return; // disabled for the moment
 	if(first == 0) {
 		fmtinstall('Q', Qconv);
 	}
 	first++;
 
 	if(debug['K']) {
-		if(first != 20)
+		if(first != 13)
 			return;
 //		debug['R'] = 2;
 //		debug['P'] = 2;
@@ -166,7 +165,7 @@ return; // disabled for the moment
 	firstr = R;
 	lastr = R;
 	nvar = 0;
-	regbits = 0;
+	regbits = RtoB(REGSP)|RtoB(REGLINK)|RtoB(REGPC);
 	for(z=0; z<BITS; z++) {
 		externs.b[z] = 0;
 		params.b[z] = 0;
@@ -221,14 +220,14 @@ return; // disabled for the moment
 		/*
 		 * left side always read
 		 */
-		bit = mkvar(r, &p->from, p->as==AMOVW);
+		bit = mkvar(r, &p->from);
 		for(z=0; z<BITS; z++)
 			r->use1.b[z] |= bit.b[z];
 
 		/*
 		 * right side depends on opcode
 		 */
-		bit = mkvar(r, &p->to, 0);
+		bit = mkvar(r, &p->to);
 		if(bany(&bit))
 		switch(p->as) {
 		default:
@@ -254,8 +253,7 @@ return; // disabled for the moment
 		 * funny
 		 */
 		case ABL:
-			for(z=0; z<BITS; z++)
-				addrs.b[z] |= bit.b[z];
+			setaddrs(bit);
 			break;
 		}
 
@@ -273,6 +271,18 @@ return; // disabled for the moment
 	if(firstr == R)
 		return;
 
+	for(i=0; i<nvar; i++) {
+		Var *v = var+i;
+		if(v->addr) {
+			bit = blsh(i);
+			for(z=0; z<BITS; z++)
+				addrs.b[z] |= bit.b[z];
+		}
+
+//		print("bit=%2d addr=%d et=%-6E w=%-2d s=%S + %lld\n",
+//			i, v->addr, v->etype, v->width, v->sym, v->offset);
+	}
+
 	/*
 	 * pass 2
 	 * turn branch references to pointers
@@ -298,6 +308,7 @@ return; // disabled for the moment
 	if(debug['R']) {
 		p = firstr->prog;
 		print("\n%L %D\n", p->lineno, &p->from);
+		print("	addr = %Q\n", addrs);
 	}
 
 	/*
@@ -361,6 +372,7 @@ loop2:
 					r->refahead.b[z] | r->calahead.b[z] |
 					r->refbehind.b[z] | r->calbehind.b[z] |
 					r->use1.b[z] | r->use2.b[z];
+				bit.b[z] &= ~addrs.b[z];
 			}
 
 			if(bany(&bit)) {
@@ -486,18 +498,61 @@ brk:
 	 * last pass
 	 * eliminate nops
 	 * free aux structures
+	 * adjust the stack pointer
+	 *	MOVW.W 	R1,-12(R13)			<<- start
+	 *	MOVW   	R0,R1
+	 *	MOVW   	R1,8(R13)
+	 *	MOVW   	$0,R1
+	 *	MOVW   	R1,4(R13)
+	 *	BL     	,runtime.newproc+0(SB)
+	 *	MOVW   	&ft+-32(SP),R7			<<- adjust
+	 *	MOVW   	&j+-40(SP),R6			<<- adjust
+	 *	MOVW   	autotmp_0003+-24(SP),R5		<<- adjust
+	 *	MOVW   	$12(R13),R13			<<- finish
 	 */
+	vreg = 0;
 	for(p = firstp; p != P; p = p->link) {
 		while(p->link != P && p->link->as == ANOP)
 			p->link = p->link->link;
 		if(p->to.type == D_BRANCH)
 			while(p->to.branch != P && p->to.branch->as == ANOP)
 				p->to.branch = p->to.branch->link;
+		if(p->as == AMOVW && p->to.reg == 13) {
+			if(p->scond & C_WBIT) {
+				vreg = -p->to.offset;		// in adjust region
+//				print("%P adjusting %d\n", p, vreg);
+				continue;
+			}
+			if(p->from.type == D_CONST && p->to.type == D_REG) {
+				if(p->from.offset != vreg)
+					print("in and out different\n");
+//				print("%P finish %d\n", p, vreg);
+				vreg = 0;	// done adjust region
+				continue;
+			}
+
+//			print("%P %d %d from type\n", p, p->from.type, D_CONST);
+//			print("%P %d %d to type\n\n", p, p->to.type, D_REG);
+		}
+
+		if(p->as == AMOVW && vreg != 0) {
+			if(p->from.sym != S)
+			if(p->from.name == D_AUTO || p->from.name == D_PARAM) {
+				p->from.offset += vreg;
+//				print("%P adjusting from %d %d\n", p, vreg, p->from.type);
+			}
+			if(p->to.sym != S)
+			if(p->to.name == D_AUTO || p->to.name == D_PARAM) {
+				p->to.offset += vreg;
+//				print("%P adjusting to %d %d\n", p, vreg, p->from.type);
+			}
+		}
 	}
 	if(r1 != R) {
 		r1->link = freer;
 		freer = firstr;
 	}
+
 }
 
 void
@@ -557,24 +612,31 @@ addmove(Reg *r, int bn, int rn, int f)
 	if(a->etype == TARRAY || a->sym == S)
 		a->type = D_CONST;
 
+	if(v->addr)
+		fatal("addmove: shouldnt be doing this %A\n", a);
+
 	switch(v->etype) {
 	default:
 		print("What is this %E\n", v->etype);
 
-	case TINT32:
-	case TUINT32:
-	case TPTR32:
-	case TBOOL:
-		p1->as = AMOVW;
-		break;
 	case TINT8:
-	case TUINT8:
 		p1->as = AMOVB;
 		break;
+	case TBOOL:
+	case TUINT8:
+		p1->as = AMOVBU;
+		break;
 	case TINT16:
-	case TUINT16:
 		p1->as = AMOVH;
 		break;
+	case TUINT16:
+		p1->as = AMOVHU;
+		break;
+	case TINT32:
+	case TUINT32:
+	case TPTR32:
+		p1->as = AMOVW;
+		break;
 	case TFLOAT32:
 		p1->as = AMOVF;
 		break;
@@ -598,7 +660,7 @@ addmove(Reg *r, int bn, int rn, int f)
 			a->type = D_FREG;
 			a->reg = rn-NREG;
 		}
-		if(v->etype == TUINT8)
+		if(v->etype == TUINT8 || v->etype == TBOOL)
 			p1->as = AMOVBU;
 		if(v->etype == TUINT16)
 			p1->as = AMOVHU;
@@ -622,7 +684,7 @@ overlap(int32 o1, int w1, int32 o2, int w2)
 }
 
 Bits
-mkvar(Reg *r, Adr *a, int docon)
+mkvar(Reg *r, Adr *a)
 {
 	Var *v;
 	int i, t, n, et, z, w, flag;
@@ -634,29 +696,33 @@ mkvar(Reg *r, Adr *a, int docon)
 	t = a->type;
 	n = D_NONE;
 
+	flag = 0;
+//	if(a->pun)
+//		flag = 1;
+
 	switch(t) {
 	default:
 		print("type %d %d %D\n", t, a->name, a);
 		goto none;
 
-	case D_CONST:
-		if(a->reg != NREG)
-			r->regu |= RtoB(a->reg);
-		// fallthrough
-
 	case D_NONE:
 	case D_FCONST:
 	case D_BRANCH:
-		goto none;
+		break;
+
+	case D_CONST:
+		flag = 1;
+		goto onereg;
 
 	case D_REGREG:
 		if(a->offset != NREG)
 			r->regu |= RtoB(a->offset);
-		// fallthrough
+		goto onereg;
 
 	case D_REG:
 	case D_SHIFT:
 	case D_OREG:
+	onereg:
 		if(a->reg != NREG)
 			r->regu |= RtoB(a->reg);
 		break;
@@ -679,10 +745,6 @@ mkvar(Reg *r, Adr *a, int docon)
 		break;
 	}
 
-	flag = 0;
-//	if(a->pun)
-//		flag = 1;
-
 	s = a->sym;
 	if(s == S)
 		goto none;
@@ -737,7 +799,6 @@ mkvar(Reg *r, Adr *a, int docon)
 	if(debug['R'])
 		print("bit=%2d et=%E pun=%d %D\n", i, et, flag, a);
 
-out:
 	bit = blsh(i);
 	if(n == D_EXTERN || n == D_STATIC)
 		for(z=0; z<BITS; z++)
@@ -746,22 +807,6 @@ out:
 		for(z=0; z<BITS; z++)
 			params.b[z] |= bit.b[z];
 
-//	if(t == D_CONST) {
-//		if(s == S) {
-//			for(z=0; z<BITS; z++)
-//				consts.b[z] |= bit.b[z];
-//			return bit;
-//		}
-//		if(et != TARRAY)
-//			for(z=0; z<BITS; z++)
-//				addrs.b[z] |= bit.b[z];
-//		for(z=0; z<BITS; z++)
-//			params.b[z] |= bit.b[z];
-//		return bit;
-//	}
-//	if(t != D_OREG)
-//		goto none;
-
 	return bit;
 
 none:
@@ -1021,7 +1066,6 @@ allreg(uint32 b, Rgn *r)
 
 	case TFLOAT32:
 	case TFLOAT64:
-	case TFLOAT:
 		i = BtoF(~b);
 		if(i && r->cost >= 0) {
 			r->regno = i+NREG;
@@ -1195,6 +1239,7 @@ paint3(Reg *r, int bn, int32 rb, int rn)
 
 	if(LOAD(r) & ~(r->set.b[z] & ~(r->use1.b[z]|r->use2.b[z])) & bb)
 		addmove(r, bn, rn, 0);
+
 	for(;;) {
 		r->act.b[z] |= bb;
 		p = r->prog;
@@ -1243,6 +1288,9 @@ void
 addreg(Adr *a, int rn)
 {
 
+	if(a->type == D_CONST)
+		fatal("addreg: cant do this %D %d\n", a, rn);
+
 	a->sym = 0;
 	a->name = D_NONE;
 	a->type = D_REG;