diff options
Diffstat (limited to 'src/cmd/objdump')
| -rw-r--r-- | src/cmd/objdump/Makefile | 10 | ||||
| -rw-r--r-- | src/cmd/objdump/armasm.go | 10821 | ||||
| -rw-r--r-- | src/cmd/objdump/elf.go | 65 | ||||
| -rw-r--r-- | src/cmd/objdump/macho.go | 77 | ||||
| -rw-r--r-- | src/cmd/objdump/main.go | 456 | ||||
| -rw-r--r-- | src/cmd/objdump/objdump_test.go | 122 | ||||
| -rw-r--r-- | src/cmd/objdump/pe.go | 99 | ||||
| -rw-r--r-- | src/cmd/objdump/plan9obj.go | 63 | ||||
| -rw-r--r-- | src/cmd/objdump/x86.go | 13800 |
9 files changed, 43 insertions, 25470 deletions
diff --git a/src/cmd/objdump/Makefile b/src/cmd/objdump/Makefile deleted file mode 100644 index 1b66c26ba..000000000 --- a/src/cmd/objdump/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -all: x86.go armasm.go - -x86.go: bundle - ./bundle -p main -x x86_ rsc.io/x86/x86asm | gofmt >x86.go - -armasm.go: bundle - ./bundle -p main -x arm_ rsc.io/arm/armasm | gofmt >armasm.go - -bundle: - go build -o bundle code.google.com/p/rsc/cmd/bundle diff --git a/src/cmd/objdump/armasm.go b/src/cmd/objdump/armasm.go deleted file mode 100644 index 764a3689e..000000000 --- a/src/cmd/objdump/armasm.go +++ /dev/null @@ -1,10821 +0,0 @@ -// DO NOT EDIT. Generated by code.google.com/p/rsc/cmd/bundle -// bundle -p main -x arm_ rsc.io/arm/armasm - -/* decode.go */ - -// Copyright 2014 The Go Authors. All rights reserved. -// Use of this source code is governed by a BSD-style -// license that can be found in the LICENSE file. - -package main - -import ( - "bytes" - "encoding/binary" - "fmt" - "io" - "strings" -) - -// An instFormat describes the format of an instruction encoding. -// An instruction with 32-bit value x matches the format if x&mask == value -// and the condition matches. -// The condition matches if x>>28 == 0xF && value>>28==0xF -// or if x>>28 != 0xF and value>>28 == 0. -// If x matches the format, then the rest of the fields describe how to interpret x. -// The opBits describe bits that should be extracted from x and added to the opcode. -// For example opBits = 0x1234 means that the value -// (2 bits at offset 1) followed by (4 bits at offset 3) -// should be added to op. -// Finally the args describe how to decode the instruction arguments. -// args is stored as a fixed-size array; if there are fewer than len(args) arguments, -// args[i] == 0 marks the end of the argument list. -type arm_instFormat struct { - mask uint32 - value uint32 - priority int8 - op arm_Op - opBits uint64 - args arm_instArgs -} - -type arm_instArgs [4]arm_instArg - -var ( - arm_errMode = fmt.Errorf("unsupported execution mode") - arm_errShort = fmt.Errorf("truncated instruction") - arm_errUnknown = fmt.Errorf("unknown instruction") -) - -var arm_decoderCover []bool - -// Decode decodes the leading bytes in src as a single instruction. -func arm_Decode(src []byte, mode arm_Mode) (inst arm_Inst, err error) { - if mode != arm_ModeARM { - return arm_Inst{}, arm_errMode - } - if len(src) < 4 { - return arm_Inst{}, arm_errShort - } - - if arm_decoderCover == nil { - arm_decoderCover = make([]bool, len(arm_instFormats)) - } - - x := binary.LittleEndian.Uint32(src) - - // The instFormat table contains both conditional and unconditional instructions. - // Considering only the top 4 bits, the conditional instructions use mask=0, value=0, - // while the unconditional instructions use mask=f, value=f. - // Prepare a version of x with the condition cleared to 0 in conditional instructions - // and then assume mask=f during matching. - const condMask = 0xf0000000 - xNoCond := x - if x&condMask != condMask { - xNoCond &^= condMask - } - var priority int8 -Search: - for i := range arm_instFormats { - f := &arm_instFormats[i] - if xNoCond&(f.mask|condMask) != f.value || f.priority <= priority { - continue - } - delta := uint32(0) - deltaShift := uint(0) - for opBits := f.opBits; opBits != 0; opBits >>= 16 { - n := uint(opBits & 0xFF) - off := uint((opBits >> 8) & 0xFF) - delta |= (x >> off) & (1<<n - 1) << deltaShift - deltaShift += n - } - op := f.op + arm_Op(delta) - - // Special case: BKPT encodes with condition but cannot have one. - if op&^15 == arm_BKPT_EQ && op != arm_BKPT { - continue Search - } - - var args arm_Args - for j, aop := range f.args { - if aop == 0 { - break - } - arg := arm_decodeArg(aop, x) - if arg == nil { // cannot decode argument - continue Search - } - args[j] = arg - } - - arm_decoderCover[i] = true - - inst = arm_Inst{ - Op: op, - Args: args, - Enc: x, - Len: 4, - } - priority = f.priority - continue Search - } - if inst.Op != 0 { - return inst, nil - } - return arm_Inst{}, arm_errUnknown -} - -// An instArg describes the encoding of a single argument. -// In the names used for arguments, _p_ means +, _m_ means -, -// _pm_ means ± (usually keyed by the U bit). -// The _W suffix indicates a general addressing mode based on the P and W bits. -// The _offset and _postindex suffixes force the given addressing mode. -// The rest should be somewhat self-explanatory, at least given -// the decodeArg function. -type arm_instArg uint8 - -const ( - _ arm_instArg = iota - arm_arg_APSR - arm_arg_FPSCR - arm_arg_Dn_half - arm_arg_R1_0 - arm_arg_R1_12 - arm_arg_R2_0 - arm_arg_R2_12 - arm_arg_R_0 - arm_arg_R_12 - arm_arg_R_12_nzcv - arm_arg_R_16 - arm_arg_R_16_WB - arm_arg_R_8 - arm_arg_R_rotate - arm_arg_R_shift_R - arm_arg_R_shift_imm - arm_arg_SP - arm_arg_Sd - arm_arg_Sd_Dd - arm_arg_Dd_Sd - arm_arg_Sm - arm_arg_Sm_Dm - arm_arg_Sn - arm_arg_Sn_Dn - arm_arg_const - arm_arg_endian - arm_arg_fbits - arm_arg_fp_0 - arm_arg_imm24 - arm_arg_imm5 - arm_arg_imm5_32 - arm_arg_imm5_nz - arm_arg_imm_12at8_4at0 - arm_arg_imm_4at16_12at0 - arm_arg_imm_vfp - arm_arg_label24 - arm_arg_label24H - arm_arg_label_m_12 - arm_arg_label_p_12 - arm_arg_label_pm_12 - arm_arg_label_pm_4_4 - arm_arg_lsb_width - arm_arg_mem_R - arm_arg_mem_R_pm_R_W - arm_arg_mem_R_pm_R_postindex - arm_arg_mem_R_pm_R_shift_imm_W - arm_arg_mem_R_pm_R_shift_imm_offset - arm_arg_mem_R_pm_R_shift_imm_postindex - arm_arg_mem_R_pm_imm12_W - arm_arg_mem_R_pm_imm12_offset - arm_arg_mem_R_pm_imm12_postindex - arm_arg_mem_R_pm_imm8_W - arm_arg_mem_R_pm_imm8_postindex - arm_arg_mem_R_pm_imm8at0_offset - arm_arg_option - arm_arg_registers - arm_arg_registers1 - arm_arg_registers2 - arm_arg_satimm4 - arm_arg_satimm5 - arm_arg_satimm4m1 - arm_arg_satimm5m1 - arm_arg_widthm1 -) - -// decodeArg decodes the arg described by aop from the instruction bits x. -// It returns nil if x cannot be decoded according to aop. -func arm_decodeArg(aop arm_instArg, x uint32) arm_Arg { - switch aop { - default: - return nil - - case arm_arg_APSR: - return arm_APSR - case arm_arg_FPSCR: - return arm_FPSCR - - case arm_arg_R_0: - return arm_Reg(x & (1<<4 - 1)) - case arm_arg_R_8: - return arm_Reg((x >> 8) & (1<<4 - 1)) - case arm_arg_R_12: - return arm_Reg((x >> 12) & (1<<4 - 1)) - case arm_arg_R_16: - return arm_Reg((x >> 16) & (1<<4 - 1)) - - case arm_arg_R_12_nzcv: - r := arm_Reg((x >> 12) & (1<<4 - 1)) - if r == arm_R15 { - return arm_APSR_nzcv - } - return r - - case arm_arg_R_16_WB: - mode := arm_AddrLDM - if (x>>21)&1 != 0 { - mode = arm_AddrLDM_WB - } - return arm_Mem{Base: arm_Reg((x >> 16) & (1<<4 - 1)), Mode: mode} - - case arm_arg_R_rotate: - Rm := arm_Reg(x & (1<<4 - 1)) - typ, count := arm_decodeShift(x) - // ROR #0 here means ROR #0, but decodeShift rewrites to RRX #1. - if typ == arm_RotateRightExt { - return arm_Reg(Rm) - } - return arm_RegShift{Rm, typ, uint8(count)} - - case arm_arg_R_shift_R: - Rm := arm_Reg(x & (1<<4 - 1)) - Rs := arm_Reg((x >> 8) & (1<<4 - 1)) - typ := arm_Shift((x >> 5) & (1<<2 - 1)) - return arm_RegShiftReg{Rm, typ, Rs} - - case arm_arg_R_shift_imm: - Rm := arm_Reg(x & (1<<4 - 1)) - typ, count := arm_decodeShift(x) - if typ == arm_ShiftLeft && count == 0 { - return arm_Reg(Rm) - } - return arm_RegShift{Rm, typ, uint8(count)} - - case arm_arg_R1_0: - return arm_Reg((x & (1<<4 - 1))) - case arm_arg_R1_12: - return arm_Reg(((x >> 12) & (1<<4 - 1))) - case arm_arg_R2_0: - return arm_Reg((x & (1<<4 - 1)) | 1) - case arm_arg_R2_12: - return arm_Reg(((x >> 12) & (1<<4 - 1)) | 1) - - case arm_arg_SP: - return arm_SP - - case arm_arg_Sd_Dd: - v := (x >> 12) & (1<<4 - 1) - vx := (x >> 22) & 1 - sz := (x >> 8) & 1 - if sz != 0 { - return arm_D0 + arm_Reg(vx<<4+v) - } else { - return arm_S0 + arm_Reg(v<<1+vx) - } - - case arm_arg_Dd_Sd: - return arm_decodeArg(arm_arg_Sd_Dd, x^(1<<8)) - - case arm_arg_Sd: - v := (x >> 12) & (1<<4 - 1) - vx := (x >> 22) & 1 - return arm_S0 + arm_Reg(v<<1+vx) - - case arm_arg_Sm_Dm: - v := (x >> 0) & (1<<4 - 1) - vx := (x >> 5) & 1 - sz := (x >> 8) & 1 - if sz != 0 { - return arm_D0 + arm_Reg(vx<<4+v) - } else { - return arm_S0 + arm_Reg(v<<1+vx) - } - - case arm_arg_Sm: - v := (x >> 0) & (1<<4 - 1) - vx := (x >> 5) & 1 - return arm_S0 + arm_Reg(v<<1+vx) - - case arm_arg_Dn_half: - v := (x >> 16) & (1<<4 - 1) - vx := (x >> 7) & 1 - return arm_RegX{arm_D0 + arm_Reg(vx<<4+v), int((x >> 21) & 1)} - - case arm_arg_Sn_Dn: - v := (x >> 16) & (1<<4 - 1) - vx := (x >> 7) & 1 - sz := (x >> 8) & 1 - if sz != 0 { - return arm_D0 + arm_Reg(vx<<4+v) - } else { - return arm_S0 + arm_Reg(v<<1+vx) - } - - case arm_arg_Sn: - v := (x >> 16) & (1<<4 - 1) - vx := (x >> 7) & 1 - return arm_S0 + arm_Reg(v<<1+vx) - - case arm_arg_const: - v := x & (1<<8 - 1) - rot := (x >> 8) & (1<<4 - 1) * 2 - if rot > 0 && v&3 == 0 { - // could rotate less - return arm_ImmAlt{uint8(v), uint8(rot)} - } - if rot >= 24 && ((v<<(32-rot))&0xFF)>>(32-rot) == v { - // could wrap around to rot==0. - return arm_ImmAlt{uint8(v), uint8(rot)} - } - return arm_Imm(v>>rot | v<<(32-rot)) - - case arm_arg_endian: - return arm_Endian((x >> 9) & 1) - - case arm_arg_fbits: - return arm_Imm((16 << ((x >> 7) & 1)) - ((x&(1<<4-1))<<1 | (x>>5)&1)) - - case arm_arg_fp_0: - return arm_Imm(0) - - case arm_arg_imm24: - return arm_Imm(x & (1<<24 - 1)) - - case arm_arg_imm5: - return arm_Imm((x >> 7) & (1<<5 - 1)) - - case arm_arg_imm5_32: - x = (x >> 7) & (1<<5 - 1) - if x == 0 { - x = 32 - } - return arm_Imm(x) - - case arm_arg_imm5_nz: - x = (x >> 7) & (1<<5 - 1) - if x == 0 { - return nil - } - return arm_Imm(x) - - case arm_arg_imm_4at16_12at0: - return arm_Imm((x>>16)&(1<<4-1)<<12 | x&(1<<12-1)) - - case arm_arg_imm_12at8_4at0: - return arm_Imm((x>>8)&(1<<12-1)<<4 | x&(1<<4-1)) - - case arm_arg_imm_vfp: - x = (x>>16)&(1<<4-1)<<4 | x&(1<<4-1) - return arm_Imm(x) - - case arm_arg_label24: - imm := (x & (1<<24 - 1)) << 2 - return arm_PCRel(int32(imm<<6) >> 6) - - case arm_arg_label24H: - h := (x >> 24) & 1 - imm := (x&(1<<24-1))<<2 | h<<1 - return arm_PCRel(int32(imm<<6) >> 6) - - case arm_arg_label_m_12: - d := int32(x & (1<<12 - 1)) - return arm_Mem{Base: arm_PC, Mode: arm_AddrOffset, Offset: int16(-d)} - - case arm_arg_label_p_12: - d := int32(x & (1<<12 - 1)) - return arm_Mem{Base: arm_PC, Mode: arm_AddrOffset, Offset: int16(d)} - - case arm_arg_label_pm_12: - d := int32(x & (1<<12 - 1)) - u := (x >> 23) & 1 - if u == 0 { - d = -d - } - return arm_Mem{Base: arm_PC, Mode: arm_AddrOffset, Offset: int16(d)} - - case arm_arg_label_pm_4_4: - d := int32((x>>8)&(1<<4-1)<<4 | x&(1<<4-1)) - u := (x >> 23) & 1 - if u == 0 { - d = -d - } - return arm_PCRel(d) - - case arm_arg_lsb_width: - lsb := (x >> 7) & (1<<5 - 1) - msb := (x >> 16) & (1<<5 - 1) - if msb < lsb || msb >= 32 { - return nil - } - return arm_Imm(msb + 1 - lsb) - - case arm_arg_mem_R: - Rn := arm_Reg((x >> 16) & (1<<4 - 1)) - return arm_Mem{Base: Rn, Mode: arm_AddrOffset} - - case arm_arg_mem_R_pm_R_postindex: - // Treat [<Rn>],+/-<Rm> like [<Rn>,+/-<Rm>{,<shift>}]{!} - // by forcing shift bits to <<0 and P=0, W=0 (postindex=true). - return arm_decodeArg(arm_arg_mem_R_pm_R_shift_imm_W, x&^((1<<7-1)<<5|1<<24|1<<21)) - - case arm_arg_mem_R_pm_R_W: - // Treat [<Rn>,+/-<Rm>]{!} like [<Rn>,+/-<Rm>{,<shift>}]{!} - // by forcing shift bits to <<0. - return arm_decodeArg(arm_arg_mem_R_pm_R_shift_imm_W, x&^((1<<7-1)<<5)) - - case arm_arg_mem_R_pm_R_shift_imm_offset: - // Treat [<Rn>],+/-<Rm>{,<shift>} like [<Rn>,+/-<Rm>{,<shift>}]{!} - // by forcing P=1, W=0 (index=false, wback=false). - return arm_decodeArg(arm_arg_mem_R_pm_R_shift_imm_W, x&^(1<<21)|1<<24) - - case arm_arg_mem_R_pm_R_shift_imm_postindex: - // Treat [<Rn>],+/-<Rm>{,<shift>} like [<Rn>,+/-<Rm>{,<shift>}]{!} - // by forcing P=0, W=0 (postindex=true). - return arm_decodeArg(arm_arg_mem_R_pm_R_shift_imm_W, x&^(1<<24|1<<21)) - - case arm_arg_mem_R_pm_R_shift_imm_W: - Rn := arm_Reg((x >> 16) & (1<<4 - 1)) - Rm := arm_Reg(x & (1<<4 - 1)) - typ, count := arm_decodeShift(x) - u := (x >> 23) & 1 - w := (x >> 21) & 1 - p := (x >> 24) & 1 - if p == 0 && w == 1 { - return nil - } - sign := int8(+1) - if u == 0 { - sign = -1 - } - mode := arm_AddrMode(uint8(p<<1) | uint8(w^1)) - return arm_Mem{Base: Rn, Mode: mode, Sign: sign, Index: Rm, Shift: typ, Count: count} - - case arm_arg_mem_R_pm_imm12_offset: - // Treat [<Rn>,#+/-<imm12>] like [<Rn>{,#+/-<imm12>}]{!} - // by forcing P=1, W=0 (index=false, wback=false). - return arm_decodeArg(arm_arg_mem_R_pm_imm12_W, x&^(1<<21)|1<<24) - - case arm_arg_mem_R_pm_imm12_postindex: - // Treat [<Rn>],#+/-<imm12> like [<Rn>{,#+/-<imm12>}]{!} - // by forcing P=0, W=0 (postindex=true). - return arm_decodeArg(arm_arg_mem_R_pm_imm12_W, x&^(1<<24|1<<21)) - - case arm_arg_mem_R_pm_imm12_W: - Rn := arm_Reg((x >> 16) & (1<<4 - 1)) - u := (x >> 23) & 1 - w := (x >> 21) & 1 - p := (x >> 24) & 1 - if p == 0 && w == 1 { - return nil - } - sign := int8(+1) - if u == 0 { - sign = -1 - } - imm := int16(x & (1<<12 - 1)) - mode := arm_AddrMode(uint8(p<<1) | uint8(w^1)) - return arm_Mem{Base: Rn, Mode: mode, Offset: int16(sign) * imm} - - case arm_arg_mem_R_pm_imm8_postindex: - // Treat [<Rn>],#+/-<imm8> like [<Rn>{,#+/-<imm8>}]{!} - // by forcing P=0, W=0 (postindex=true). - return arm_decodeArg(arm_arg_mem_R_pm_imm8_W, x&^(1<<24|1<<21)) - - case arm_arg_mem_R_pm_imm8_W: - Rn := arm_Reg((x >> 16) & (1<<4 - 1)) - u := (x >> 23) & 1 - w := (x >> 21) & 1 - p := (x >> 24) & 1 - if p == 0 && w == 1 { - return nil - } - sign := int8(+1) - if u == 0 { - sign = -1 - } - imm := int16((x>>8)&(1<<4-1)<<4 | x&(1<<4-1)) - mode := arm_AddrMode(uint8(p<<1) | uint8(w^1)) - return arm_Mem{Base: Rn, Mode: mode, Offset: int16(sign) * imm} - - case arm_arg_mem_R_pm_imm8at0_offset: - Rn := arm_Reg((x >> 16) & (1<<4 - 1)) - u := (x >> 23) & 1 - sign := int8(+1) - if u == 0 { - sign = -1 - } - imm := int16(x&(1<<8-1)) << 2 - return arm_Mem{Base: Rn, Mode: arm_AddrOffset, Offset: int16(sign) * imm} - - case arm_arg_option: - return arm_Imm(x & (1<<4 - 1)) - - case arm_arg_registers: - return arm_RegList(x & (1<<16 - 1)) - - case arm_arg_registers2: - x &= 1<<16 - 1 - n := 0 - for i := 0; i < 16; i++ { - if x>>uint(i)&1 != 0 { - n++ - } - } - if n < 2 { - return nil - } - return arm_RegList(x) - - case arm_arg_registers1: - Rt := (x >> 12) & (1<<4 - 1) - return arm_RegList(1 << Rt) - - case arm_arg_satimm4: - return arm_Imm((x >> 16) & (1<<4 - 1)) - - case arm_arg_satimm5: - return arm_Imm((x >> 16) & (1<<5 - 1)) - - case arm_arg_satimm4m1: - return arm_Imm((x>>16)&(1<<4-1) + 1) - - case arm_arg_satimm5m1: - return arm_Imm((x>>16)&(1<<5-1) + 1) - - case arm_arg_widthm1: - return arm_Imm((x>>16)&(1<<5-1) + 1) - - } -} - -// decodeShift decodes the shift-by-immediate encoded in x. -func arm_decodeShift(x uint32) (arm_Shift, uint8) { - count := (x >> 7) & (1<<5 - 1) - typ := arm_Shift((x >> 5) & (1<<2 - 1)) - switch typ { - case arm_ShiftRight, arm_ShiftRightSigned: - if count == 0 { - count = 32 - } - case arm_RotateRight: - if count == 0 { - typ = arm_RotateRightExt - count = 1 - } - } - return typ, uint8(count) -} - -/* gnu.go */ - -// Copyright 2014 The Go Authors. All rights reserved. -// Use of this source code is governed by a BSD-style -// license that can be found in the LICENSE file. - -var arm_saveDot = strings.NewReplacer( - ".F16", "_dot_F16", - ".F32", "_dot_F32", - ".F64", "_dot_F64", - ".S32", "_dot_S32", - ".U32", "_dot_U32", - ".FXS", "_dot_S", - ".FXU", "_dot_U", - ".32", "_dot_32", -) - -// GNUSyntax returns the GNU assembler syntax for the instruction, as defined by GNU binutils. -// This form typically matches the syntax defined in the ARM Reference Manual. -func arm_GNUSyntax(inst arm_Inst) string { - var buf bytes.Buffer - op := inst.Op.String() - op = arm_saveDot.Replace(op) - op = strings.Replace(op, ".", "", -1) - op = strings.Replace(op, "_dot_", ".", -1) - op = strings.ToLower(op) - buf.WriteString(op) - sep := " " - for i, arg := range inst.Args { - if arg == nil { - break - } - text := arm_gnuArg(&inst, i, arg) - if text == "" { - continue - } - buf.WriteString(sep) - sep = ", " - buf.WriteString(text) - } - return buf.String() -} - -func arm_gnuArg(inst *arm_Inst, argIndex int, arg arm_Arg) string { - switch inst.Op &^ 15 { - case arm_LDRD_EQ, arm_LDREXD_EQ, arm_STRD_EQ: - if argIndex == 1 { - // second argument in consecutive pair not printed - return "" - } - case arm_STREXD_EQ: - if argIndex == 2 { - // second argument in consecutive pair not printed - return "" - } - } - - switch arg := arg.(type) { - case arm_Imm: - switch inst.Op &^ 15 { - case arm_BKPT_EQ: - return fmt.Sprintf("%#04x", uint32(arg)) - case arm_SVC_EQ: - return fmt.Sprintf("%#08x", uint32(arg)) - } - return fmt.Sprintf("#%d", int32(arg)) - - case arm_ImmAlt: - return fmt.Sprintf("#%d, %d", arg.Val, arg.Rot) - - case arm_Mem: - R := arm_gnuArg(inst, -1, arg.Base) - X := "" - if arg.Sign != 0 { - X = "" - if arg.Sign < 0 { - X = "-" - } - X += arm_gnuArg(inst, -1, arg.Index) - if arg.Shift == arm_ShiftLeft && arg.Count == 0 { - // nothing - } else if arg.Shift == arm_RotateRightExt { - X += ", rrx" - } else { - X += fmt.Sprintf(", %s #%d", strings.ToLower(arg.Shift.String()), arg.Count) - } - } else { - X = fmt.Sprintf("#%d", arg.Offset) - } - - switch arg.Mode { - case arm_AddrOffset: - if X == "#0" { - return fmt.Sprintf("[%s]", R) - } - return fmt.Sprintf("[%s, %s]", R, X) - case arm_AddrPreIndex: - return fmt.Sprintf("[%s, %s]!", R, X) - case arm_AddrPostIndex: - return fmt.Sprintf("[%s], %s", R, X) - case arm_AddrLDM: - if X == "#0" { - return R - } - case arm_AddrLDM_WB: - if X == "#0" { - return R + "!" - } - } - return fmt.Sprintf("[%s Mode(%d) %s]", R, int(arg.Mode), X) - - case arm_PCRel: - return fmt.Sprintf(".%+#x", int32(arg)+4) - - case arm_Reg: - switch inst.Op &^ 15 { - case arm_LDREX_EQ: - if argIndex == 0 { - return fmt.Sprintf("r%d", int32(arg)) - } - } - switch arg { - case arm_R10: - return "sl" - case arm_R11: - return "fp" - case arm_R12: - return "ip" - } - - case arm_RegList: - var buf bytes.Buffer - fmt.Fprintf(&buf, "{") - sep := "" - for i := 0; i < 16; i++ { - if arg&(1<<uint(i)) != 0 { - fmt.Fprintf(&buf, "%s%s", sep, arm_gnuArg(inst, -1, arm_Reg(i))) - sep = ", " - } - } - fmt.Fprintf(&buf, "}") - return buf.String() - - case arm_RegShift: - if arg.Shift == arm_ShiftLeft && arg.Count == 0 { - return arm_gnuArg(inst, -1, arg.Reg) - } - if arg.Shift == arm_RotateRightExt { - return arm_gnuArg(inst, -1, arg.Reg) + ", rrx" - } - return fmt.Sprintf("%s, %s #%d", arm_gnuArg(inst, -1, arg.Reg), strings.ToLower(arg.Shift.String()), arg.Count) - - case arm_RegShiftReg: - return fmt.Sprintf("%s, %s %s", arm_gnuArg(inst, -1, arg.Reg), strings.ToLower(arg.Shift.String()), arm_gnuArg(inst, -1, arg.RegCount)) - - } - return strings.ToLower(arg.String()) -} - -/* inst.go */ - -// Copyright 2014 The Go Authors. All rights reserved. -// Use of this source code is governed by a BSD-style -// license that can be found in the LICENSE file. - -// A Mode is an instruction execution mode. -type arm_Mode int - -const ( - _ arm_Mode = iota - arm_ModeARM - arm_ModeThumb -) - -func (m arm_Mode) String() string { - switch m { - case arm_ModeARM: - return "ARM" - case arm_ModeThumb: - return "Thumb" - } - return fmt.Sprintf("Mode(%d)", int(m)) -} - -// An Op is an ARM opcode. -type arm_Op uint16 - -// NOTE: The actual Op values are defined in tables.go. -// They are chosen to simplify instruction decoding and -// are not a dense packing from 0 to N, although the -// density is high, probably at least 90%. - -func (op arm_Op) String() string { - if op >= arm_Op(len(arm_opstr)) || arm_opstr[op] == "" { - return fmt.Sprintf("Op(%d)", int(op)) - } - return arm_opstr[op] -} - -// An Inst is a single instruction. -type arm_Inst struct { - Op arm_Op // Opcode mnemonic - Enc uint32 // Raw encoding bits. - Len int // Length of encoding in bytes. - Args arm_Args // Instruction arguments, in ARM manual order. -} - -func (i arm_Inst) String() string { - var buf bytes.Buffer - buf.WriteString(i.Op.String()) - for j, arg := range i.Args { - if arg == nil { - break - } - if j == 0 { - buf.WriteString(" ") - } else { - buf.WriteString(", ") - } - buf.WriteString(arg.String()) - } - return buf.String() -} - -// An Args holds the instruction arguments. -// If an instruction has fewer than 4 arguments, -// the final elements in the array are nil. -type arm_Args [4]arm_Arg - -// An Arg is a single instruction argument, one of these types: -// Endian, Imm, Mem, PCRel, Reg, RegList, RegShift, RegShiftReg. -type arm_Arg interface { - IsArg() - String() string -} - -type arm_Float32Imm float32 - -func (arm_Float32Imm) IsArg() {} - -func (f arm_Float32Imm) String() string { - return fmt.Sprintf("#%v", float32(f)) -} - -type arm_Float64Imm float32 - -func (arm_Float64Imm) IsArg() {} - -func (f arm_Float64Imm) String() string { - return fmt.Sprintf("#%v", float64(f)) -} - -// An Imm is an integer constant. -type arm_Imm uint32 - -func (arm_Imm) IsArg() {} - -func (i arm_Imm) String() string { - return fmt.Sprintf("#%#x", uint32(i)) -} - -// A ImmAlt is an alternate encoding of an integer constant. -type arm_ImmAlt struct { - Val uint8 - Rot uint8 -} - -func (arm_ImmAlt) IsArg() {} - -func (i arm_ImmAlt) Imm() arm_Imm { - v := uint32(i.Val) - r := uint(i.Rot) - return arm_Imm(v>>r | v<<(32-r)) -} - -func (i arm_ImmAlt) String() string { - return fmt.Sprintf("#%#x, %d", i.Val, i.Rot) -} - -// A Label is a text (code) address. -type arm_Label uint32 - -func (arm_Label) IsArg() {} - -func (i arm_Label) String() string { - return fmt.Sprintf("%#x", uint32(i)) -} - -// A Reg is a single register. -// The zero value denotes R0, not the absence of a register. -type arm_Reg uint8 - -const ( - arm_R0 arm_Reg = iota - arm_R1 - arm_R2 - arm_R3 - arm_R4 - arm_R5 - arm_R6 - arm_R7 - arm_R8 - arm_R9 - arm_R10 - arm_R11 - arm_R12 - arm_R13 - arm_R14 - arm_R15 - - arm_S0 - arm_S1 - arm_S2 - arm_S3 - arm_S4 - arm_S5 - arm_S6 - arm_S7 - arm_S8 - arm_S9 - arm_S10 - arm_S11 - arm_S12 - arm_S13 - arm_S14 - arm_S15 - arm_S16 - arm_S17 - arm_S18 - arm_S19 - arm_S20 - arm_S21 - arm_S22 - arm_S23 - arm_S24 - arm_S25 - arm_S26 - arm_S27 - arm_S28 - arm_S29 - arm_S30 - arm_S31 - - arm_D0 - arm_D1 - arm_D2 - arm_D3 - arm_D4 - arm_D5 - arm_D6 - arm_D7 - arm_D8 - arm_D9 - arm_D10 - arm_D11 - arm_D12 - arm_D13 - arm_D14 - arm_D15 - arm_D16 - arm_D17 - arm_D18 - arm_D19 - arm_D20 - arm_D21 - arm_D22 - arm_D23 - arm_D24 - arm_D25 - arm_D26 - arm_D27 - arm_D28 - arm_D29 - arm_D30 - arm_D31 - - arm_APSR - arm_APSR_nzcv - arm_FPSCR - - arm_SP = arm_R13 - arm_LR = arm_R14 - arm_PC = arm_R15 -) - -func (arm_Reg) IsArg() {} - -func (r arm_Reg) String() string { - switch r { - case arm_APSR: - return "APSR" - case arm_APSR_nzcv: - return "APSR_nzcv" - case arm_FPSCR: - return "FPSCR" - case arm_SP: - return "SP" - case arm_PC: - return "PC" - case arm_LR: - return "LR" - } - if arm_R0 <= r && r <= arm_R15 { - return fmt.Sprintf("R%d", int(r-arm_R0)) - } - if arm_S0 <= r && r <= arm_S31 { - return fmt.Sprintf("S%d", int(r-arm_S0)) - } - if arm_D0 <= r && r <= arm_D31 { - return fmt.Sprintf("D%d", int(r-arm_D0)) - } - return fmt.Sprintf("Reg(%d)", int(r)) -} - -// A RegX represents a fraction of a multi-value register. -// The Index field specifies the index number, -// but the size of the fraction is not specified. -// It must be inferred from the instruction and the register type. -// For example, in a VMOV instruction, RegX{D5, 1} represents -// the top 32 bits of the 64-bit D5 register. -type arm_RegX struct { - Reg arm_Reg - Index int -} - -func (arm_RegX) IsArg() {} - -func (r arm_RegX) String() string { - return fmt.Sprintf("%s[%d]", r.Reg, r.Index) -} - -// A RegList is a register list. -// Bits at indexes x = 0 through 15 indicate whether the corresponding Rx register is in the list. -type arm_RegList uint16 - -func (arm_RegList) IsArg() {} - -func (r arm_RegList) String() string { - var buf bytes.Buffer - fmt.Fprintf(&buf, "{") - sep := "" - for i := 0; i < 16; i++ { - if r&(1<<uint(i)) != 0 { - fmt.Fprintf(&buf, "%s%s", sep, arm_Reg(i).String()) - sep = "," - } - } - fmt.Fprintf(&buf, "}") - return buf.String() -} - -// An Endian is the argument to the SETEND instruction. -type arm_Endian uint8 - -const ( - arm_LittleEndian arm_Endian = 0 - arm_BigEndian arm_Endian = 1 -) - -func (arm_Endian) IsArg() {} - -func (e arm_Endian) String() string { - if e != 0 { - return "BE" - } - return "LE" -} - -// A Shift describes an ARM shift operation. -type arm_Shift uint8 - -const ( - arm_ShiftLeft arm_Shift = 0 // left shift - arm_ShiftRight arm_Shift = 1 // logical (unsigned) right shift - arm_ShiftRightSigned arm_Shift = 2 // arithmetic (signed) right shift - arm_RotateRight arm_Shift = 3 // right rotate - arm_RotateRightExt arm_Shift = 4 // right rotate through carry (Count will always be 1) -) - -var arm_shiftName = [...]string{ - "LSL", "LSR", "ASR", "ROR", "RRX", -} - -func (s arm_Shift) String() string { - if s < 5 { - return arm_shiftName[s] - } - return fmt.Sprintf("Shift(%d)", int(s)) -} - -// A RegShift is a register shifted by a constant. -type arm_RegShift struct { - Reg arm_Reg - Shift arm_Shift - Count uint8 -} - -func (arm_RegShift) IsArg() {} - -func (r arm_RegShift) String() string { - return fmt.Sprintf("%s %s #%d", r.Reg, r.Shift, r.Count) -} - -// A RegShiftReg is a register shifted by a register. -type arm_RegShiftReg struct { - Reg arm_Reg - Shift arm_Shift - RegCount arm_Reg -} - -func (arm_RegShiftReg) IsArg() {} - -func (r arm_RegShiftReg) String() string { - return fmt.Sprintf("%s %s %s", r.Reg, r.Shift, r.RegCount) -} - -// A PCRel describes a memory address (usually a code label) -// as a distance relative to the program counter. -// TODO(rsc): Define which program counter (PC+4? PC+8? PC?). -type arm_PCRel int32 - -func (arm_PCRel) IsArg() {} - -func (r arm_PCRel) String() string { - return fmt.Sprintf("PC%+#x", int32(r)) -} - -// An AddrMode is an ARM addressing mode. -type arm_AddrMode uint8 - -const ( - _ arm_AddrMode = iota - arm_AddrPostIndex // [R], X – use address R, set R = R + X - arm_AddrPreIndex // [R, X]! – use address R + X, set R = R + X - arm_AddrOffset // [R, X] – use address R + X - arm_AddrLDM // R – [R] but formats as R, for LDM/STM only - arm_AddrLDM_WB // R! - [R], X where X is instruction-specific amount, for LDM/STM only -) - -// A Mem is a memory reference made up of a base R and index expression X. -// The effective memory address is R or R+X depending on AddrMode. -// The index expression is X = Sign*(Index Shift Count) + Offset, -// but in any instruction either Sign = 0 or Offset = 0. -type arm_Mem struct { - Base arm_Reg - Mode arm_AddrMode - Sign int8 - Index arm_Reg - Shift arm_Shift - Count uint8 - Offset int16 -} - -func (arm_Mem) IsArg() {} - -func (m arm_Mem) String() string { - R := m.Base.String() - X := "" - if m.Sign != 0 { - X = "+" - if m.Sign < 0 { - X = "-" - } - X += m.Index.String() - if m.Shift != arm_ShiftLeft || m.Count != 0 { - X += fmt.Sprintf(", %s #%d", m.Shift, m.Count) - } - } else { - X = fmt.Sprintf("#%d", m.Offset) - } - - switch m.Mode { - case arm_AddrOffset: - if X == "#0" { - return fmt.Sprintf("[%s]", R) - } - return fmt.Sprintf("[%s, %s]", R, X) - case arm_AddrPreIndex: - return fmt.Sprintf("[%s, %s]!", R, X) - case arm_AddrPostIndex: - return fmt.Sprintf("[%s], %s", R, X) - case arm_AddrLDM: - if X == "#0" { - return R - } - case arm_AddrLDM_WB: - if X == "#0" { - return R + "!" - } - } - return fmt.Sprintf("[%s Mode(%d) %s]", R, int(m.Mode), X) -} - -/* plan9x.go */ - -// Copyright 2014 The Go Authors. All rights reserved. -// Use of this source code is governed by a BSD-style -// license that can be found in the LICENSE file. - -// plan9Syntax returns the Go assembler syntax for the instruction. -// The syntax was originally defined by Plan 9. -// The pc is the program counter of the instruction, used for expanding -// PC-relative addresses into absolute ones. -// The symname function queries the symbol table for the program -// being disassembled. Given a target address it returns the name and base -// address of the symbol containing the target, if any; otherwise it returns "", 0. -// The reader r should read from the text segment using text addresses -// as offsets; it is used to display pc-relative loads as constant loads. -func arm_plan9Syntax(inst arm_Inst, pc uint64, symname func(uint64) (string, uint64), text io.ReaderAt) string { - if symname == nil { - symname = func(uint64) (string, uint64) { return "", 0 } - } - - var args []string - for _, a := range inst.Args { - if a == nil { - break - } - args = append(args, arm_plan9Arg(&inst, pc, symname, a)) - } - - op := inst.Op.String() - - switch inst.Op &^ 15 { - case arm_LDR_EQ, arm_LDRB_EQ, arm_LDRH_EQ: - // Check for RET - reg, _ := inst.Args[0].(arm_Reg) - mem, _ := inst.Args[1].(arm_Mem) - if inst.Op&^15 == arm_LDR_EQ && reg == arm_R15 && mem.Base == arm_SP && mem.Sign == 0 && mem.Mode == arm_AddrPostIndex { - return fmt.Sprintf("RET%s #%d", op[3:], mem.Offset) - } - - // Check for PC-relative load. - if mem.Base == arm_PC && mem.Sign == 0 && mem.Mode == arm_AddrOffset && text != nil { - addr := uint32(pc) + 8 + uint32(mem.Offset) - buf := make([]byte, 4) - switch inst.Op &^ 15 { - case arm_LDRB_EQ: - if _, err := text.ReadAt(buf[:1], int64(addr)); err != nil { - break - } - args[1] = fmt.Sprintf("$%#x", buf[0]) - - case arm_LDRH_EQ: - if _, err := text.ReadAt(buf[:2], int64(addr)); err != nil { - break - } - args[1] = fmt.Sprintf("$%#x", binary.LittleEndian.Uint16(buf)) - - case arm_LDR_EQ: - if _, err := text.ReadAt(buf, int64(addr)); err != nil { - break - } - x := binary.LittleEndian.Uint32(buf) - if s, base := symname(uint64(x)); s != "" && uint64(x) == base { - args[1] = fmt.Sprintf("$%s(SB)", s) - } else { - args[1] = fmt.Sprintf("$%#x", x) - } - } - } - } - - // Move addressing mode into opcode suffix. - suffix := "" - switch inst.Op &^ 15 { - case arm_LDR_EQ, arm_LDRB_EQ, arm_LDRH_EQ, arm_STR_EQ, arm_STRB_EQ, arm_STRH_EQ: - mem, _ := inst.Args[1].(arm_Mem) - switch mem.Mode { - case arm_AddrOffset, arm_AddrLDM: - // no suffix - case arm_AddrPreIndex, arm_AddrLDM_WB: - suffix = ".W" - case arm_AddrPostIndex: - suffix = ".P" - } - off := "" - if mem.Offset != 0 { - off = fmt.Sprintf("%#x", mem.Offset) - } - base := fmt.Sprintf("(R%d)", int(mem.Base)) - index := "" - if mem.Sign != 0 { - sign := "" - if mem.Sign < 0 { - sign = "" - } - shift := "" - if mem.Count != 0 { - shift = fmt.Sprintf("%s%d", arm_plan9Shift[mem.Shift], mem.Count) - } - index = fmt.Sprintf("(%sR%d%s)", sign, int(mem.Index), shift) - } - args[1] = off + base + index - } - - // Reverse args, placing dest last. - for i, j := 0, len(args)-1; i < j; i, j = i+1, j-1 { - args[i], args[j] = args[j], args[i] - } - - switch inst.Op &^ 15 { - case arm_MOV_EQ: - op = "MOVW" + op[3:] - - case arm_LDR_EQ: - op = "MOVW" + op[3:] + suffix - case arm_LDRB_EQ: - op = "MOVB" + op[4:] + suffix - case arm_LDRH_EQ: - op = "MOVH" + op[4:] + suffix - - case arm_STR_EQ: - op = "MOVW" + op[3:] + suffix - args[0], args[1] = args[1], args[0] - case arm_STRB_EQ: - op = "MOVB" + op[4:] + suffix - args[0], args[1] = args[1], args[0] - case arm_STRH_EQ: - op = "MOVH" + op[4:] + suffix - args[0], args[1] = args[1], args[0] - } - - if args != nil { - op += " " + strings.Join(args, ", ") - } - - return op -} - -// assembler syntax for the various shifts. -// @x> is a lie; the assembler uses @> 0 -// instead of @x> 1, but i wanted to be clear that it -// was a different operation (rotate right extended, not rotate right). -var arm_plan9Shift = []string{"<<", ">>", "->", "@>", "@x>"} - -func arm_plan9Arg(inst *arm_Inst, pc uint64, symname func(uint64) (string, uint64), arg arm_Arg) string { - switch a := arg.(type) { - case arm_Endian: - - case arm_Imm: - return fmt.Sprintf("$%d", int(a)) - - case arm_Mem: - - case arm_PCRel: - addr := uint32(pc) + 8 + uint32(a) - if s, base := symname(uint64(addr)); s != "" && uint64(addr) == base { - return fmt.Sprintf("%s(SB)", s) - } - return fmt.Sprintf("%#x", addr) - - case arm_Reg: - if a < 16 { - return fmt.Sprintf("R%d", int(a)) - } - - case arm_RegList: - var buf bytes.Buffer - start := -2 - end := -2 - fmt.Fprintf(&buf, "[") - flush := func() { - if start >= 0 { - if buf.Len() > 1 { - fmt.Fprintf(&buf, ",") - } - if start == end { - fmt.Fprintf(&buf, "R%d", start) - } else { - fmt.Fprintf(&buf, "R%d-R%d", start, end) - } - } - } - for i := 0; i < 16; i++ { - if a&(1<<uint(i)) != 0 { - if i == end+1 { - end++ - continue - } - start = i - end = i - } - } - flush() - fmt.Fprintf(&buf, "]") - return buf.String() - - case arm_RegShift: - return fmt.Sprintf("R%d%s$%d", int(a.Reg), arm_plan9Shift[a.Shift], int(a.Count)) - - case arm_RegShiftReg: - return fmt.Sprintf("R%d%sR%d", int(a.Reg), arm_plan9Shift[a.Shift], int(a.RegCount)) - } - return strings.ToUpper(arg.String()) -} - -/* tables.go */ - -const ( - _ arm_Op = iota - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - arm_ADC_EQ - arm_ADC_NE - arm_ADC_CS - arm_ADC_CC - arm_ADC_MI - arm_ADC_PL - arm_ADC_VS - arm_ADC_VC - arm_ADC_HI - arm_ADC_LS - arm_ADC_GE - arm_ADC_LT - arm_ADC_GT - arm_ADC_LE - arm_ADC - arm_ADC_ZZ - arm_ADC_S_EQ - arm_ADC_S_NE - arm_ADC_S_CS - arm_ADC_S_CC - arm_ADC_S_MI - arm_ADC_S_PL - arm_ADC_S_VS - arm_ADC_S_VC - arm_ADC_S_HI - arm_ADC_S_LS - arm_ADC_S_GE - arm_ADC_S_LT - arm_ADC_S_GT - arm_ADC_S_LE - arm_ADC_S - arm_ADC_S_ZZ - arm_ADD_EQ - arm_ADD_NE - arm_ADD_CS - arm_ADD_CC - arm_ADD_MI - arm_ADD_PL - arm_ADD_VS - arm_ADD_VC - arm_ADD_HI - arm_ADD_LS - arm_ADD_GE - arm_ADD_LT - arm_ADD_GT - arm_ADD_LE - arm_ADD - arm_ADD_ZZ - arm_ADD_S_EQ - arm_ADD_S_NE - arm_ADD_S_CS - arm_ADD_S_CC - arm_ADD_S_MI - arm_ADD_S_PL - arm_ADD_S_VS - arm_ADD_S_VC - arm_ADD_S_HI - arm_ADD_S_LS - arm_ADD_S_GE - arm_ADD_S_LT - arm_ADD_S_GT - arm_ADD_S_LE - arm_ADD_S - arm_ADD_S_ZZ - arm_AND_EQ - arm_AND_NE - arm_AND_CS - arm_AND_CC - arm_AND_MI - arm_AND_PL - arm_AND_VS - arm_AND_VC - arm_AND_HI - arm_AND_LS - arm_AND_GE - arm_AND_LT - arm_AND_GT - arm_AND_LE - arm_AND - arm_AND_ZZ - arm_AND_S_EQ - arm_AND_S_NE - arm_AND_S_CS - arm_AND_S_CC - arm_AND_S_MI - arm_AND_S_PL - arm_AND_S_VS - arm_AND_S_VC - arm_AND_S_HI - arm_AND_S_LS - arm_AND_S_GE - arm_AND_S_LT - arm_AND_S_GT - arm_AND_S_LE - arm_AND_S - arm_AND_S_ZZ - arm_ASR_EQ - arm_ASR_NE - arm_ASR_CS - arm_ASR_CC - arm_ASR_MI - arm_ASR_PL - arm_ASR_VS - arm_ASR_VC - arm_ASR_HI - arm_ASR_LS - arm_ASR_GE - arm_ASR_LT - arm_ASR_GT - arm_ASR_LE - arm_ASR - arm_ASR_ZZ - arm_ASR_S_EQ - arm_ASR_S_NE - arm_ASR_S_CS - arm_ASR_S_CC - arm_ASR_S_MI - arm_ASR_S_PL - arm_ASR_S_VS - arm_ASR_S_VC - arm_ASR_S_HI - arm_ASR_S_LS - arm_ASR_S_GE - arm_ASR_S_LT - arm_ASR_S_GT - arm_ASR_S_LE - arm_ASR_S - arm_ASR_S_ZZ - arm_B_EQ - arm_B_NE - arm_B_CS - arm_B_CC - arm_B_MI - arm_B_PL - arm_B_VS - arm_B_VC - arm_B_HI - arm_B_LS - arm_B_GE - arm_B_LT - arm_B_GT - arm_B_LE - arm_B - arm_B_ZZ - arm_BFC_EQ - arm_BFC_NE - arm_BFC_CS - arm_BFC_CC - arm_BFC_MI - arm_BFC_PL - arm_BFC_VS - arm_BFC_VC - arm_BFC_HI - arm_BFC_LS - arm_BFC_GE - arm_BFC_LT - arm_BFC_GT - arm_BFC_LE - arm_BFC - arm_BFC_ZZ - arm_BFI_EQ - arm_BFI_NE - arm_BFI_CS - arm_BFI_CC - arm_BFI_MI - arm_BFI_PL - arm_BFI_VS - arm_BFI_VC - arm_BFI_HI - arm_BFI_LS - arm_BFI_GE - arm_BFI_LT - arm_BFI_GT - arm_BFI_LE - arm_BFI - arm_BFI_ZZ - arm_BIC_EQ - arm_BIC_NE - arm_BIC_CS - arm_BIC_CC - arm_BIC_MI - arm_BIC_PL - arm_BIC_VS - arm_BIC_VC - arm_BIC_HI - arm_BIC_LS - arm_BIC_GE - arm_BIC_LT - arm_BIC_GT - arm_BIC_LE - arm_BIC - arm_BIC_ZZ - arm_BIC_S_EQ - arm_BIC_S_NE - arm_BIC_S_CS - arm_BIC_S_CC - arm_BIC_S_MI - arm_BIC_S_PL - arm_BIC_S_VS - arm_BIC_S_VC - arm_BIC_S_HI - arm_BIC_S_LS - arm_BIC_S_GE - arm_BIC_S_LT - arm_BIC_S_GT - arm_BIC_S_LE - arm_BIC_S - arm_BIC_S_ZZ - arm_BKPT_EQ - arm_BKPT_NE - arm_BKPT_CS - arm_BKPT_CC - arm_BKPT_MI - arm_BKPT_PL - arm_BKPT_VS - arm_BKPT_VC - arm_BKPT_HI - arm_BKPT_LS - arm_BKPT_GE - arm_BKPT_LT - arm_BKPT_GT - arm_BKPT_LE - arm_BKPT - arm_BKPT_ZZ - arm_BL_EQ - arm_BL_NE - arm_BL_CS - arm_BL_CC - arm_BL_MI - arm_BL_PL - arm_BL_VS - arm_BL_VC - arm_BL_HI - arm_BL_LS - arm_BL_GE - arm_BL_LT - arm_BL_GT - arm_BL_LE - arm_BL - arm_BL_ZZ - arm_BLX_EQ - arm_BLX_NE - arm_BLX_CS - arm_BLX_CC - arm_BLX_MI - arm_BLX_PL - arm_BLX_VS - arm_BLX_VC - arm_BLX_HI - arm_BLX_LS - arm_BLX_GE - arm_BLX_LT - arm_BLX_GT - arm_BLX_LE - arm_BLX - arm_BLX_ZZ - arm_BX_EQ - arm_BX_NE - arm_BX_CS - arm_BX_CC - arm_BX_MI - arm_BX_PL - arm_BX_VS - arm_BX_VC - arm_BX_HI - arm_BX_LS - arm_BX_GE - arm_BX_LT - arm_BX_GT - arm_BX_LE - arm_BX - arm_BX_ZZ - arm_BXJ_EQ - arm_BXJ_NE - arm_BXJ_CS - arm_BXJ_CC - arm_BXJ_MI - arm_BXJ_PL - arm_BXJ_VS - arm_BXJ_VC - arm_BXJ_HI - arm_BXJ_LS - arm_BXJ_GE - arm_BXJ_LT - arm_BXJ_GT - arm_BXJ_LE - arm_BXJ - arm_BXJ_ZZ - arm_CLREX - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - arm_CLZ_EQ - arm_CLZ_NE - arm_CLZ_CS - arm_CLZ_CC - arm_CLZ_MI - arm_CLZ_PL - arm_CLZ_VS - arm_CLZ_VC - arm_CLZ_HI - arm_CLZ_LS - arm_CLZ_GE - arm_CLZ_LT - arm_CLZ_GT - arm_CLZ_LE - arm_CLZ - arm_CLZ_ZZ - arm_CMN_EQ - arm_CMN_NE - arm_CMN_CS - arm_CMN_CC - arm_CMN_MI - arm_CMN_PL - arm_CMN_VS - arm_CMN_VC - arm_CMN_HI - arm_CMN_LS - arm_CMN_GE - arm_CMN_LT - arm_CMN_GT - arm_CMN_LE - arm_CMN - arm_CMN_ZZ - arm_CMP_EQ - arm_CMP_NE - arm_CMP_CS - arm_CMP_CC - arm_CMP_MI - arm_CMP_PL - arm_CMP_VS - arm_CMP_VC - arm_CMP_HI - arm_CMP_LS - arm_CMP_GE - arm_CMP_LT - arm_CMP_GT - arm_CMP_LE - arm_CMP - arm_CMP_ZZ - arm_DBG_EQ - arm_DBG_NE - arm_DBG_CS - arm_DBG_CC - arm_DBG_MI - arm_DBG_PL - arm_DBG_VS - arm_DBG_VC - arm_DBG_HI - arm_DBG_LS - arm_DBG_GE - arm_DBG_LT - arm_DBG_GT - arm_DBG_LE - arm_DBG - arm_DBG_ZZ - arm_DMB - arm_DSB - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - arm_EOR_EQ - arm_EOR_NE - arm_EOR_CS - arm_EOR_CC - arm_EOR_MI - arm_EOR_PL - arm_EOR_VS - arm_EOR_VC - arm_EOR_HI - arm_EOR_LS - arm_EOR_GE - arm_EOR_LT - arm_EOR_GT - arm_EOR_LE - arm_EOR - arm_EOR_ZZ - arm_EOR_S_EQ - arm_EOR_S_NE - arm_EOR_S_CS - arm_EOR_S_CC - arm_EOR_S_MI - arm_EOR_S_PL - arm_EOR_S_VS - arm_EOR_S_VC - arm_EOR_S_HI - arm_EOR_S_LS - arm_EOR_S_GE - arm_EOR_S_LT - arm_EOR_S_GT - arm_EOR_S_LE - arm_EOR_S - arm_EOR_S_ZZ - arm_ISB - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - arm_LDM_EQ - arm_LDM_NE - arm_LDM_CS - arm_LDM_CC - arm_LDM_MI - arm_LDM_PL - arm_LDM_VS - arm_LDM_VC - arm_LDM_HI - arm_LDM_LS - arm_LDM_GE - arm_LDM_LT - arm_LDM_GT - arm_LDM_LE - arm_LDM - arm_LDM_ZZ - arm_LDMDA_EQ - arm_LDMDA_NE - arm_LDMDA_CS - arm_LDMDA_CC - arm_LDMDA_MI - arm_LDMDA_PL - arm_LDMDA_VS - arm_LDMDA_VC - arm_LDMDA_HI - arm_LDMDA_LS - arm_LDMDA_GE - arm_LDMDA_LT - arm_LDMDA_GT - arm_LDMDA_LE - arm_LDMDA - arm_LDMDA_ZZ - arm_LDMDB_EQ - arm_LDMDB_NE - arm_LDMDB_CS - arm_LDMDB_CC - arm_LDMDB_MI - arm_LDMDB_PL - arm_LDMDB_VS - arm_LDMDB_VC - arm_LDMDB_HI - arm_LDMDB_LS - arm_LDMDB_GE - arm_LDMDB_LT - arm_LDMDB_GT - arm_LDMDB_LE - arm_LDMDB - arm_LDMDB_ZZ - arm_LDMIB_EQ - arm_LDMIB_NE - arm_LDMIB_CS - arm_LDMIB_CC - arm_LDMIB_MI - arm_LDMIB_PL - arm_LDMIB_VS - arm_LDMIB_VC - arm_LDMIB_HI - arm_LDMIB_LS - arm_LDMIB_GE - arm_LDMIB_LT - arm_LDMIB_GT - arm_LDMIB_LE - arm_LDMIB - arm_LDMIB_ZZ - arm_LDR_EQ - arm_LDR_NE - arm_LDR_CS - arm_LDR_CC - arm_LDR_MI - arm_LDR_PL - arm_LDR_VS - arm_LDR_VC - arm_LDR_HI - arm_LDR_LS - arm_LDR_GE - arm_LDR_LT - arm_LDR_GT - arm_LDR_LE - arm_LDR - arm_LDR_ZZ - arm_LDRB_EQ - arm_LDRB_NE - arm_LDRB_CS - arm_LDRB_CC - arm_LDRB_MI - arm_LDRB_PL - arm_LDRB_VS - arm_LDRB_VC - arm_LDRB_HI - arm_LDRB_LS - arm_LDRB_GE - arm_LDRB_LT - arm_LDRB_GT - arm_LDRB_LE - arm_LDRB - arm_LDRB_ZZ - arm_LDRBT_EQ - arm_LDRBT_NE - arm_LDRBT_CS - arm_LDRBT_CC - arm_LDRBT_MI - arm_LDRBT_PL - arm_LDRBT_VS - arm_LDRBT_VC - arm_LDRBT_HI - arm_LDRBT_LS - arm_LDRBT_GE - arm_LDRBT_LT - arm_LDRBT_GT - arm_LDRBT_LE - arm_LDRBT - arm_LDRBT_ZZ - arm_LDRD_EQ - arm_LDRD_NE - arm_LDRD_CS - arm_LDRD_CC - arm_LDRD_MI - arm_LDRD_PL - arm_LDRD_VS - arm_LDRD_VC - arm_LDRD_HI - arm_LDRD_LS - arm_LDRD_GE - arm_LDRD_LT - arm_LDRD_GT - arm_LDRD_LE - arm_LDRD - arm_LDRD_ZZ - arm_LDREX_EQ - arm_LDREX_NE - arm_LDREX_CS - arm_LDREX_CC - arm_LDREX_MI - arm_LDREX_PL - arm_LDREX_VS - arm_LDREX_VC - arm_LDREX_HI - arm_LDREX_LS - arm_LDREX_GE - arm_LDREX_LT - arm_LDREX_GT - arm_LDREX_LE - arm_LDREX - arm_LDREX_ZZ - arm_LDREXB_EQ - arm_LDREXB_NE - arm_LDREXB_CS - arm_LDREXB_CC - arm_LDREXB_MI - arm_LDREXB_PL - arm_LDREXB_VS - arm_LDREXB_VC - arm_LDREXB_HI - arm_LDREXB_LS - arm_LDREXB_GE - arm_LDREXB_LT - arm_LDREXB_GT - arm_LDREXB_LE - arm_LDREXB - arm_LDREXB_ZZ - arm_LDREXD_EQ - arm_LDREXD_NE - arm_LDREXD_CS - arm_LDREXD_CC - arm_LDREXD_MI - arm_LDREXD_PL - arm_LDREXD_VS - arm_LDREXD_VC - arm_LDREXD_HI - arm_LDREXD_LS - arm_LDREXD_GE - arm_LDREXD_LT - arm_LDREXD_GT - arm_LDREXD_LE - arm_LDREXD - arm_LDREXD_ZZ - arm_LDREXH_EQ - arm_LDREXH_NE - arm_LDREXH_CS - arm_LDREXH_CC - arm_LDREXH_MI - arm_LDREXH_PL - arm_LDREXH_VS - arm_LDREXH_VC - arm_LDREXH_HI - arm_LDREXH_LS - arm_LDREXH_GE - arm_LDREXH_LT - arm_LDREXH_GT - arm_LDREXH_LE - arm_LDREXH - arm_LDREXH_ZZ - arm_LDRH_EQ - arm_LDRH_NE - arm_LDRH_CS - arm_LDRH_CC - arm_LDRH_MI - arm_LDRH_PL - arm_LDRH_VS - arm_LDRH_VC - arm_LDRH_HI - arm_LDRH_LS - arm_LDRH_GE - arm_LDRH_LT - arm_LDRH_GT - arm_LDRH_LE - arm_LDRH - arm_LDRH_ZZ - arm_LDRHT_EQ - arm_LDRHT_NE - arm_LDRHT_CS - arm_LDRHT_CC - arm_LDRHT_MI - arm_LDRHT_PL - arm_LDRHT_VS - arm_LDRHT_VC - arm_LDRHT_HI - arm_LDRHT_LS - arm_LDRHT_GE - arm_LDRHT_LT - arm_LDRHT_GT - arm_LDRHT_LE - arm_LDRHT - arm_LDRHT_ZZ - arm_LDRSB_EQ - arm_LDRSB_NE - arm_LDRSB_CS - arm_LDRSB_CC - arm_LDRSB_MI - arm_LDRSB_PL - arm_LDRSB_VS - arm_LDRSB_VC - arm_LDRSB_HI - arm_LDRSB_LS - arm_LDRSB_GE - arm_LDRSB_LT - arm_LDRSB_GT - arm_LDRSB_LE - arm_LDRSB - arm_LDRSB_ZZ - arm_LDRSBT_EQ - arm_LDRSBT_NE - arm_LDRSBT_CS - arm_LDRSBT_CC - arm_LDRSBT_MI - arm_LDRSBT_PL - arm_LDRSBT_VS - arm_LDRSBT_VC - arm_LDRSBT_HI - arm_LDRSBT_LS - arm_LDRSBT_GE - arm_LDRSBT_LT - arm_LDRSBT_GT - arm_LDRSBT_LE - arm_LDRSBT - arm_LDRSBT_ZZ - arm_LDRSH_EQ - arm_LDRSH_NE - arm_LDRSH_CS - arm_LDRSH_CC - arm_LDRSH_MI - arm_LDRSH_PL - arm_LDRSH_VS - arm_LDRSH_VC - arm_LDRSH_HI - arm_LDRSH_LS - arm_LDRSH_GE - arm_LDRSH_LT - arm_LDRSH_GT - arm_LDRSH_LE - arm_LDRSH - arm_LDRSH_ZZ - arm_LDRSHT_EQ - arm_LDRSHT_NE - arm_LDRSHT_CS - arm_LDRSHT_CC - arm_LDRSHT_MI - arm_LDRSHT_PL - arm_LDRSHT_VS - arm_LDRSHT_VC - arm_LDRSHT_HI - arm_LDRSHT_LS - arm_LDRSHT_GE - arm_LDRSHT_LT - arm_LDRSHT_GT - arm_LDRSHT_LE - arm_LDRSHT - arm_LDRSHT_ZZ - arm_LDRT_EQ - arm_LDRT_NE - arm_LDRT_CS - arm_LDRT_CC - arm_LDRT_MI - arm_LDRT_PL - arm_LDRT_VS - arm_LDRT_VC - arm_LDRT_HI - arm_LDRT_LS - arm_LDRT_GE - arm_LDRT_LT - arm_LDRT_GT - arm_LDRT_LE - arm_LDRT - arm_LDRT_ZZ - arm_LSL_EQ - arm_LSL_NE - arm_LSL_CS - arm_LSL_CC - arm_LSL_MI - arm_LSL_PL - arm_LSL_VS - arm_LSL_VC - arm_LSL_HI - arm_LSL_LS - arm_LSL_GE - arm_LSL_LT - arm_LSL_GT - arm_LSL_LE - arm_LSL - arm_LSL_ZZ - arm_LSL_S_EQ - arm_LSL_S_NE - arm_LSL_S_CS - arm_LSL_S_CC - arm_LSL_S_MI - arm_LSL_S_PL - arm_LSL_S_VS - arm_LSL_S_VC - arm_LSL_S_HI - arm_LSL_S_LS - arm_LSL_S_GE - arm_LSL_S_LT - arm_LSL_S_GT - arm_LSL_S_LE - arm_LSL_S - arm_LSL_S_ZZ - arm_LSR_EQ - arm_LSR_NE - arm_LSR_CS - arm_LSR_CC - arm_LSR_MI - arm_LSR_PL - arm_LSR_VS - arm_LSR_VC - arm_LSR_HI - arm_LSR_LS - arm_LSR_GE - arm_LSR_LT - arm_LSR_GT - arm_LSR_LE - arm_LSR - arm_LSR_ZZ - arm_LSR_S_EQ - arm_LSR_S_NE - arm_LSR_S_CS - arm_LSR_S_CC - arm_LSR_S_MI - arm_LSR_S_PL - arm_LSR_S_VS - arm_LSR_S_VC - arm_LSR_S_HI - arm_LSR_S_LS - arm_LSR_S_GE - arm_LSR_S_LT - arm_LSR_S_GT - arm_LSR_S_LE - arm_LSR_S - arm_LSR_S_ZZ - arm_MLA_EQ - arm_MLA_NE - arm_MLA_CS - arm_MLA_CC - arm_MLA_MI - arm_MLA_PL - arm_MLA_VS - arm_MLA_VC - arm_MLA_HI - arm_MLA_LS - arm_MLA_GE - arm_MLA_LT - arm_MLA_GT - arm_MLA_LE - arm_MLA - arm_MLA_ZZ - arm_MLA_S_EQ - arm_MLA_S_NE - arm_MLA_S_CS - arm_MLA_S_CC - arm_MLA_S_MI - arm_MLA_S_PL - arm_MLA_S_VS - arm_MLA_S_VC - arm_MLA_S_HI - arm_MLA_S_LS - arm_MLA_S_GE - arm_MLA_S_LT - arm_MLA_S_GT - arm_MLA_S_LE - arm_MLA_S - arm_MLA_S_ZZ - arm_MLS_EQ - arm_MLS_NE - arm_MLS_CS - arm_MLS_CC - arm_MLS_MI - arm_MLS_PL - arm_MLS_VS - arm_MLS_VC - arm_MLS_HI - arm_MLS_LS - arm_MLS_GE - arm_MLS_LT - arm_MLS_GT - arm_MLS_LE - arm_MLS - arm_MLS_ZZ - arm_MOV_EQ - arm_MOV_NE - arm_MOV_CS - arm_MOV_CC - arm_MOV_MI - arm_MOV_PL - arm_MOV_VS - arm_MOV_VC - arm_MOV_HI - arm_MOV_LS - arm_MOV_GE - arm_MOV_LT - arm_MOV_GT - arm_MOV_LE - arm_MOV - arm_MOV_ZZ - arm_MOV_S_EQ - arm_MOV_S_NE - arm_MOV_S_CS - arm_MOV_S_CC - arm_MOV_S_MI - arm_MOV_S_PL - arm_MOV_S_VS - arm_MOV_S_VC - arm_MOV_S_HI - arm_MOV_S_LS - arm_MOV_S_GE - arm_MOV_S_LT - arm_MOV_S_GT - arm_MOV_S_LE - arm_MOV_S - arm_MOV_S_ZZ - arm_MOVT_EQ - arm_MOVT_NE - arm_MOVT_CS - arm_MOVT_CC - arm_MOVT_MI - arm_MOVT_PL - arm_MOVT_VS - arm_MOVT_VC - arm_MOVT_HI - arm_MOVT_LS - arm_MOVT_GE - arm_MOVT_LT - arm_MOVT_GT - arm_MOVT_LE - arm_MOVT - arm_MOVT_ZZ - arm_MOVW_EQ - arm_MOVW_NE - arm_MOVW_CS - arm_MOVW_CC - arm_MOVW_MI - arm_MOVW_PL - arm_MOVW_VS - arm_MOVW_VC - arm_MOVW_HI - arm_MOVW_LS - arm_MOVW_GE - arm_MOVW_LT - arm_MOVW_GT - arm_MOVW_LE - arm_MOVW - arm_MOVW_ZZ - arm_MRS_EQ - arm_MRS_NE - arm_MRS_CS - arm_MRS_CC - arm_MRS_MI - arm_MRS_PL - arm_MRS_VS - arm_MRS_VC - arm_MRS_HI - arm_MRS_LS - arm_MRS_GE - arm_MRS_LT - arm_MRS_GT - arm_MRS_LE - arm_MRS - arm_MRS_ZZ - arm_MUL_EQ - arm_MUL_NE - arm_MUL_CS - arm_MUL_CC - arm_MUL_MI - arm_MUL_PL - arm_MUL_VS - arm_MUL_VC - arm_MUL_HI - arm_MUL_LS - arm_MUL_GE - arm_MUL_LT - arm_MUL_GT - arm_MUL_LE - arm_MUL - arm_MUL_ZZ - arm_MUL_S_EQ - arm_MUL_S_NE - arm_MUL_S_CS - arm_MUL_S_CC - arm_MUL_S_MI - arm_MUL_S_PL - arm_MUL_S_VS - arm_MUL_S_VC - arm_MUL_S_HI - arm_MUL_S_LS - arm_MUL_S_GE - arm_MUL_S_LT - arm_MUL_S_GT - arm_MUL_S_LE - arm_MUL_S - arm_MUL_S_ZZ - arm_MVN_EQ - arm_MVN_NE - arm_MVN_CS - arm_MVN_CC - arm_MVN_MI - arm_MVN_PL - arm_MVN_VS - arm_MVN_VC - arm_MVN_HI - arm_MVN_LS - arm_MVN_GE - arm_MVN_LT - arm_MVN_GT - arm_MVN_LE - arm_MVN - arm_MVN_ZZ - arm_MVN_S_EQ - arm_MVN_S_NE - arm_MVN_S_CS - arm_MVN_S_CC - arm_MVN_S_MI - arm_MVN_S_PL - arm_MVN_S_VS - arm_MVN_S_VC - arm_MVN_S_HI - arm_MVN_S_LS - arm_MVN_S_GE - arm_MVN_S_LT - arm_MVN_S_GT - arm_MVN_S_LE - arm_MVN_S - arm_MVN_S_ZZ - arm_NOP_EQ - arm_NOP_NE - arm_NOP_CS - arm_NOP_CC - arm_NOP_MI - arm_NOP_PL - arm_NOP_VS - arm_NOP_VC - arm_NOP_HI - arm_NOP_LS - arm_NOP_GE - arm_NOP_LT - arm_NOP_GT - arm_NOP_LE - arm_NOP - arm_NOP_ZZ - arm_ORR_EQ - arm_ORR_NE - arm_ORR_CS - arm_ORR_CC - arm_ORR_MI - arm_ORR_PL - arm_ORR_VS - arm_ORR_VC - arm_ORR_HI - arm_ORR_LS - arm_ORR_GE - arm_ORR_LT - arm_ORR_GT - arm_ORR_LE - arm_ORR - arm_ORR_ZZ - arm_ORR_S_EQ - arm_ORR_S_NE - arm_ORR_S_CS - arm_ORR_S_CC - arm_ORR_S_MI - arm_ORR_S_PL - arm_ORR_S_VS - arm_ORR_S_VC - arm_ORR_S_HI - arm_ORR_S_LS - arm_ORR_S_GE - arm_ORR_S_LT - arm_ORR_S_GT - arm_ORR_S_LE - arm_ORR_S - arm_ORR_S_ZZ - arm_PKHBT_EQ - arm_PKHBT_NE - arm_PKHBT_CS - arm_PKHBT_CC - arm_PKHBT_MI - arm_PKHBT_PL - arm_PKHBT_VS - arm_PKHBT_VC - arm_PKHBT_HI - arm_PKHBT_LS - arm_PKHBT_GE - arm_PKHBT_LT - arm_PKHBT_GT - arm_PKHBT_LE - arm_PKHBT - arm_PKHBT_ZZ - arm_PKHTB_EQ - arm_PKHTB_NE - arm_PKHTB_CS - arm_PKHTB_CC - arm_PKHTB_MI - arm_PKHTB_PL - arm_PKHTB_VS - arm_PKHTB_VC - arm_PKHTB_HI - arm_PKHTB_LS - arm_PKHTB_GE - arm_PKHTB_LT - arm_PKHTB_GT - arm_PKHTB_LE - arm_PKHTB - arm_PKHTB_ZZ - arm_PLD_W - arm_PLD - arm_PLI - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - arm_POP_EQ - arm_POP_NE - arm_POP_CS - arm_POP_CC - arm_POP_MI - arm_POP_PL - arm_POP_VS - arm_POP_VC - arm_POP_HI - arm_POP_LS - arm_POP_GE - arm_POP_LT - arm_POP_GT - arm_POP_LE - arm_POP - arm_POP_ZZ - arm_PUSH_EQ - arm_PUSH_NE - arm_PUSH_CS - arm_PUSH_CC - arm_PUSH_MI - arm_PUSH_PL - arm_PUSH_VS - arm_PUSH_VC - arm_PUSH_HI - arm_PUSH_LS - arm_PUSH_GE - arm_PUSH_LT - arm_PUSH_GT - arm_PUSH_LE - arm_PUSH - arm_PUSH_ZZ - arm_QADD_EQ - arm_QADD_NE - arm_QADD_CS - arm_QADD_CC - arm_QADD_MI - arm_QADD_PL - arm_QADD_VS - arm_QADD_VC - arm_QADD_HI - arm_QADD_LS - arm_QADD_GE - arm_QADD_LT - arm_QADD_GT - arm_QADD_LE - arm_QADD - arm_QADD_ZZ - arm_QADD16_EQ - arm_QADD16_NE - arm_QADD16_CS - arm_QADD16_CC - arm_QADD16_MI - arm_QADD16_PL - arm_QADD16_VS - arm_QADD16_VC - arm_QADD16_HI - arm_QADD16_LS - arm_QADD16_GE - arm_QADD16_LT - arm_QADD16_GT - arm_QADD16_LE - arm_QADD16 - arm_QADD16_ZZ - arm_QADD8_EQ - arm_QADD8_NE - arm_QADD8_CS - arm_QADD8_CC - arm_QADD8_MI - arm_QADD8_PL - arm_QADD8_VS - arm_QADD8_VC - arm_QADD8_HI - arm_QADD8_LS - arm_QADD8_GE - arm_QADD8_LT - arm_QADD8_GT - arm_QADD8_LE - arm_QADD8 - arm_QADD8_ZZ - arm_QASX_EQ - arm_QASX_NE - arm_QASX_CS - arm_QASX_CC - arm_QASX_MI - arm_QASX_PL - arm_QASX_VS - arm_QASX_VC - arm_QASX_HI - arm_QASX_LS - arm_QASX_GE - arm_QASX_LT - arm_QASX_GT - arm_QASX_LE - arm_QASX - arm_QASX_ZZ - arm_QDADD_EQ - arm_QDADD_NE - arm_QDADD_CS - arm_QDADD_CC - arm_QDADD_MI - arm_QDADD_PL - arm_QDADD_VS - arm_QDADD_VC - arm_QDADD_HI - arm_QDADD_LS - arm_QDADD_GE - arm_QDADD_LT - arm_QDADD_GT - arm_QDADD_LE - arm_QDADD - arm_QDADD_ZZ - arm_QDSUB_EQ - arm_QDSUB_NE - arm_QDSUB_CS - arm_QDSUB_CC - arm_QDSUB_MI - arm_QDSUB_PL - arm_QDSUB_VS - arm_QDSUB_VC - arm_QDSUB_HI - arm_QDSUB_LS - arm_QDSUB_GE - arm_QDSUB_LT - arm_QDSUB_GT - arm_QDSUB_LE - arm_QDSUB - arm_QDSUB_ZZ - arm_QSAX_EQ - arm_QSAX_NE - arm_QSAX_CS - arm_QSAX_CC - arm_QSAX_MI - arm_QSAX_PL - arm_QSAX_VS - arm_QSAX_VC - arm_QSAX_HI - arm_QSAX_LS - arm_QSAX_GE - arm_QSAX_LT - arm_QSAX_GT - arm_QSAX_LE - arm_QSAX - arm_QSAX_ZZ - arm_QSUB_EQ - arm_QSUB_NE - arm_QSUB_CS - arm_QSUB_CC - arm_QSUB_MI - arm_QSUB_PL - arm_QSUB_VS - arm_QSUB_VC - arm_QSUB_HI - arm_QSUB_LS - arm_QSUB_GE - arm_QSUB_LT - arm_QSUB_GT - arm_QSUB_LE - arm_QSUB - arm_QSUB_ZZ - arm_QSUB16_EQ - arm_QSUB16_NE - arm_QSUB16_CS - arm_QSUB16_CC - arm_QSUB16_MI - arm_QSUB16_PL - arm_QSUB16_VS - arm_QSUB16_VC - arm_QSUB16_HI - arm_QSUB16_LS - arm_QSUB16_GE - arm_QSUB16_LT - arm_QSUB16_GT - arm_QSUB16_LE - arm_QSUB16 - arm_QSUB16_ZZ - arm_QSUB8_EQ - arm_QSUB8_NE - arm_QSUB8_CS - arm_QSUB8_CC - arm_QSUB8_MI - arm_QSUB8_PL - arm_QSUB8_VS - arm_QSUB8_VC - arm_QSUB8_HI - arm_QSUB8_LS - arm_QSUB8_GE - arm_QSUB8_LT - arm_QSUB8_GT - arm_QSUB8_LE - arm_QSUB8 - arm_QSUB8_ZZ - arm_RBIT_EQ - arm_RBIT_NE - arm_RBIT_CS - arm_RBIT_CC - arm_RBIT_MI - arm_RBIT_PL - arm_RBIT_VS - arm_RBIT_VC - arm_RBIT_HI - arm_RBIT_LS - arm_RBIT_GE - arm_RBIT_LT - arm_RBIT_GT - arm_RBIT_LE - arm_RBIT - arm_RBIT_ZZ - arm_REV_EQ - arm_REV_NE - arm_REV_CS - arm_REV_CC - arm_REV_MI - arm_REV_PL - arm_REV_VS - arm_REV_VC - arm_REV_HI - arm_REV_LS - arm_REV_GE - arm_REV_LT - arm_REV_GT - arm_REV_LE - arm_REV - arm_REV_ZZ - arm_REV16_EQ - arm_REV16_NE - arm_REV16_CS - arm_REV16_CC - arm_REV16_MI - arm_REV16_PL - arm_REV16_VS - arm_REV16_VC - arm_REV16_HI - arm_REV16_LS - arm_REV16_GE - arm_REV16_LT - arm_REV16_GT - arm_REV16_LE - arm_REV16 - arm_REV16_ZZ - arm_REVSH_EQ - arm_REVSH_NE - arm_REVSH_CS - arm_REVSH_CC - arm_REVSH_MI - arm_REVSH_PL - arm_REVSH_VS - arm_REVSH_VC - arm_REVSH_HI - arm_REVSH_LS - arm_REVSH_GE - arm_REVSH_LT - arm_REVSH_GT - arm_REVSH_LE - arm_REVSH - arm_REVSH_ZZ - arm_ROR_EQ - arm_ROR_NE - arm_ROR_CS - arm_ROR_CC - arm_ROR_MI - arm_ROR_PL - arm_ROR_VS - arm_ROR_VC - arm_ROR_HI - arm_ROR_LS - arm_ROR_GE - arm_ROR_LT - arm_ROR_GT - arm_ROR_LE - arm_ROR - arm_ROR_ZZ - arm_ROR_S_EQ - arm_ROR_S_NE - arm_ROR_S_CS - arm_ROR_S_CC - arm_ROR_S_MI - arm_ROR_S_PL - arm_ROR_S_VS - arm_ROR_S_VC - arm_ROR_S_HI - arm_ROR_S_LS - arm_ROR_S_GE - arm_ROR_S_LT - arm_ROR_S_GT - arm_ROR_S_LE - arm_ROR_S - arm_ROR_S_ZZ - arm_RRX_EQ - arm_RRX_NE - arm_RRX_CS - arm_RRX_CC - arm_RRX_MI - arm_RRX_PL - arm_RRX_VS - arm_RRX_VC - arm_RRX_HI - arm_RRX_LS - arm_RRX_GE - arm_RRX_LT - arm_RRX_GT - arm_RRX_LE - arm_RRX - arm_RRX_ZZ - arm_RRX_S_EQ - arm_RRX_S_NE - arm_RRX_S_CS - arm_RRX_S_CC - arm_RRX_S_MI - arm_RRX_S_PL - arm_RRX_S_VS - arm_RRX_S_VC - arm_RRX_S_HI - arm_RRX_S_LS - arm_RRX_S_GE - arm_RRX_S_LT - arm_RRX_S_GT - arm_RRX_S_LE - arm_RRX_S - arm_RRX_S_ZZ - arm_RSB_EQ - arm_RSB_NE - arm_RSB_CS - arm_RSB_CC - arm_RSB_MI - arm_RSB_PL - arm_RSB_VS - arm_RSB_VC - arm_RSB_HI - arm_RSB_LS - arm_RSB_GE - arm_RSB_LT - arm_RSB_GT - arm_RSB_LE - arm_RSB - arm_RSB_ZZ - arm_RSB_S_EQ - arm_RSB_S_NE - arm_RSB_S_CS - arm_RSB_S_CC - arm_RSB_S_MI - arm_RSB_S_PL - arm_RSB_S_VS - arm_RSB_S_VC - arm_RSB_S_HI - arm_RSB_S_LS - arm_RSB_S_GE - arm_RSB_S_LT - arm_RSB_S_GT - arm_RSB_S_LE - arm_RSB_S - arm_RSB_S_ZZ - arm_RSC_EQ - arm_RSC_NE - arm_RSC_CS - arm_RSC_CC - arm_RSC_MI - arm_RSC_PL - arm_RSC_VS - arm_RSC_VC - arm_RSC_HI - arm_RSC_LS - arm_RSC_GE - arm_RSC_LT - arm_RSC_GT - arm_RSC_LE - arm_RSC - arm_RSC_ZZ - arm_RSC_S_EQ - arm_RSC_S_NE - arm_RSC_S_CS - arm_RSC_S_CC - arm_RSC_S_MI - arm_RSC_S_PL - arm_RSC_S_VS - arm_RSC_S_VC - arm_RSC_S_HI - arm_RSC_S_LS - arm_RSC_S_GE - arm_RSC_S_LT - arm_RSC_S_GT - arm_RSC_S_LE - arm_RSC_S - arm_RSC_S_ZZ - arm_SADD16_EQ - arm_SADD16_NE - arm_SADD16_CS - arm_SADD16_CC - arm_SADD16_MI - arm_SADD16_PL - arm_SADD16_VS - arm_SADD16_VC - arm_SADD16_HI - arm_SADD16_LS - arm_SADD16_GE - arm_SADD16_LT - arm_SADD16_GT - arm_SADD16_LE - arm_SADD16 - arm_SADD16_ZZ - arm_SADD8_EQ - arm_SADD8_NE - arm_SADD8_CS - arm_SADD8_CC - arm_SADD8_MI - arm_SADD8_PL - arm_SADD8_VS - arm_SADD8_VC - arm_SADD8_HI - arm_SADD8_LS - arm_SADD8_GE - arm_SADD8_LT - arm_SADD8_GT - arm_SADD8_LE - arm_SADD8 - arm_SADD8_ZZ - arm_SASX_EQ - arm_SASX_NE - arm_SASX_CS - arm_SASX_CC - arm_SASX_MI - arm_SASX_PL - arm_SASX_VS - arm_SASX_VC - arm_SASX_HI - arm_SASX_LS - arm_SASX_GE - arm_SASX_LT - arm_SASX_GT - arm_SASX_LE - arm_SASX - arm_SASX_ZZ - arm_SBC_EQ - arm_SBC_NE - arm_SBC_CS - arm_SBC_CC - arm_SBC_MI - arm_SBC_PL - arm_SBC_VS - arm_SBC_VC - arm_SBC_HI - arm_SBC_LS - arm_SBC_GE - arm_SBC_LT - arm_SBC_GT - arm_SBC_LE - arm_SBC - arm_SBC_ZZ - arm_SBC_S_EQ - arm_SBC_S_NE - arm_SBC_S_CS - arm_SBC_S_CC - arm_SBC_S_MI - arm_SBC_S_PL - arm_SBC_S_VS - arm_SBC_S_VC - arm_SBC_S_HI - arm_SBC_S_LS - arm_SBC_S_GE - arm_SBC_S_LT - arm_SBC_S_GT - arm_SBC_S_LE - arm_SBC_S - arm_SBC_S_ZZ - arm_SBFX_EQ - arm_SBFX_NE - arm_SBFX_CS - arm_SBFX_CC - arm_SBFX_MI - arm_SBFX_PL - arm_SBFX_VS - arm_SBFX_VC - arm_SBFX_HI - arm_SBFX_LS - arm_SBFX_GE - arm_SBFX_LT - arm_SBFX_GT - arm_SBFX_LE - arm_SBFX - arm_SBFX_ZZ - arm_SEL_EQ - arm_SEL_NE - arm_SEL_CS - arm_SEL_CC - arm_SEL_MI - arm_SEL_PL - arm_SEL_VS - arm_SEL_VC - arm_SEL_HI - arm_SEL_LS - arm_SEL_GE - arm_SEL_LT - arm_SEL_GT - arm_SEL_LE - arm_SEL - arm_SEL_ZZ - arm_SETEND - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - arm_SEV_EQ - arm_SEV_NE - arm_SEV_CS - arm_SEV_CC - arm_SEV_MI - arm_SEV_PL - arm_SEV_VS - arm_SEV_VC - arm_SEV_HI - arm_SEV_LS - arm_SEV_GE - arm_SEV_LT - arm_SEV_GT - arm_SEV_LE - arm_SEV - arm_SEV_ZZ - arm_SHADD16_EQ - arm_SHADD16_NE - arm_SHADD16_CS - arm_SHADD16_CC - arm_SHADD16_MI - arm_SHADD16_PL - arm_SHADD16_VS - arm_SHADD16_VC - arm_SHADD16_HI - arm_SHADD16_LS - arm_SHADD16_GE - arm_SHADD16_LT - arm_SHADD16_GT - arm_SHADD16_LE - arm_SHADD16 - arm_SHADD16_ZZ - arm_SHADD8_EQ - arm_SHADD8_NE - arm_SHADD8_CS - arm_SHADD8_CC - arm_SHADD8_MI - arm_SHADD8_PL - arm_SHADD8_VS - arm_SHADD8_VC - arm_SHADD8_HI - arm_SHADD8_LS - arm_SHADD8_GE - arm_SHADD8_LT - arm_SHADD8_GT - arm_SHADD8_LE - arm_SHADD8 - arm_SHADD8_ZZ - arm_SHASX_EQ - arm_SHASX_NE - arm_SHASX_CS - arm_SHASX_CC - arm_SHASX_MI - arm_SHASX_PL - arm_SHASX_VS - arm_SHASX_VC - arm_SHASX_HI - arm_SHASX_LS - arm_SHASX_GE - arm_SHASX_LT - arm_SHASX_GT - arm_SHASX_LE - arm_SHASX - arm_SHASX_ZZ - arm_SHSAX_EQ - arm_SHSAX_NE - arm_SHSAX_CS - arm_SHSAX_CC - arm_SHSAX_MI - arm_SHSAX_PL - arm_SHSAX_VS - arm_SHSAX_VC - arm_SHSAX_HI - arm_SHSAX_LS - arm_SHSAX_GE - arm_SHSAX_LT - arm_SHSAX_GT - arm_SHSAX_LE - arm_SHSAX - arm_SHSAX_ZZ - arm_SHSUB16_EQ - arm_SHSUB16_NE - arm_SHSUB16_CS - arm_SHSUB16_CC - arm_SHSUB16_MI - arm_SHSUB16_PL - arm_SHSUB16_VS - arm_SHSUB16_VC - arm_SHSUB16_HI - arm_SHSUB16_LS - arm_SHSUB16_GE - arm_SHSUB16_LT - arm_SHSUB16_GT - arm_SHSUB16_LE - arm_SHSUB16 - arm_SHSUB16_ZZ - arm_SHSUB8_EQ - arm_SHSUB8_NE - arm_SHSUB8_CS - arm_SHSUB8_CC - arm_SHSUB8_MI - arm_SHSUB8_PL - arm_SHSUB8_VS - arm_SHSUB8_VC - arm_SHSUB8_HI - arm_SHSUB8_LS - arm_SHSUB8_GE - arm_SHSUB8_LT - arm_SHSUB8_GT - arm_SHSUB8_LE - arm_SHSUB8 - arm_SHSUB8_ZZ - arm_SMLABB_EQ - arm_SMLABB_NE - arm_SMLABB_CS - arm_SMLABB_CC - arm_SMLABB_MI - arm_SMLABB_PL - arm_SMLABB_VS - arm_SMLABB_VC - arm_SMLABB_HI - arm_SMLABB_LS - arm_SMLABB_GE - arm_SMLABB_LT - arm_SMLABB_GT - arm_SMLABB_LE - arm_SMLABB - arm_SMLABB_ZZ - arm_SMLABT_EQ - arm_SMLABT_NE - arm_SMLABT_CS - arm_SMLABT_CC - arm_SMLABT_MI - arm_SMLABT_PL - arm_SMLABT_VS - arm_SMLABT_VC - arm_SMLABT_HI - arm_SMLABT_LS - arm_SMLABT_GE - arm_SMLABT_LT - arm_SMLABT_GT - arm_SMLABT_LE - arm_SMLABT - arm_SMLABT_ZZ - arm_SMLATB_EQ - arm_SMLATB_NE - arm_SMLATB_CS - arm_SMLATB_CC - arm_SMLATB_MI - arm_SMLATB_PL - arm_SMLATB_VS - arm_SMLATB_VC - arm_SMLATB_HI - arm_SMLATB_LS - arm_SMLATB_GE - arm_SMLATB_LT - arm_SMLATB_GT - arm_SMLATB_LE - arm_SMLATB - arm_SMLATB_ZZ - arm_SMLATT_EQ - arm_SMLATT_NE - arm_SMLATT_CS - arm_SMLATT_CC - arm_SMLATT_MI - arm_SMLATT_PL - arm_SMLATT_VS - arm_SMLATT_VC - arm_SMLATT_HI - arm_SMLATT_LS - arm_SMLATT_GE - arm_SMLATT_LT - arm_SMLATT_GT - arm_SMLATT_LE - arm_SMLATT - arm_SMLATT_ZZ - arm_SMLAD_EQ - arm_SMLAD_NE - arm_SMLAD_CS - arm_SMLAD_CC - arm_SMLAD_MI - arm_SMLAD_PL - arm_SMLAD_VS - arm_SMLAD_VC - arm_SMLAD_HI - arm_SMLAD_LS - arm_SMLAD_GE - arm_SMLAD_LT - arm_SMLAD_GT - arm_SMLAD_LE - arm_SMLAD - arm_SMLAD_ZZ - arm_SMLAD_X_EQ - arm_SMLAD_X_NE - arm_SMLAD_X_CS - arm_SMLAD_X_CC - arm_SMLAD_X_MI - arm_SMLAD_X_PL - arm_SMLAD_X_VS - arm_SMLAD_X_VC - arm_SMLAD_X_HI - arm_SMLAD_X_LS - arm_SMLAD_X_GE - arm_SMLAD_X_LT - arm_SMLAD_X_GT - arm_SMLAD_X_LE - arm_SMLAD_X - arm_SMLAD_X_ZZ - arm_SMLAL_EQ - arm_SMLAL_NE - arm_SMLAL_CS - arm_SMLAL_CC - arm_SMLAL_MI - arm_SMLAL_PL - arm_SMLAL_VS - arm_SMLAL_VC - arm_SMLAL_HI - arm_SMLAL_LS - arm_SMLAL_GE - arm_SMLAL_LT - arm_SMLAL_GT - arm_SMLAL_LE - arm_SMLAL - arm_SMLAL_ZZ - arm_SMLAL_S_EQ - arm_SMLAL_S_NE - arm_SMLAL_S_CS - arm_SMLAL_S_CC - arm_SMLAL_S_MI - arm_SMLAL_S_PL - arm_SMLAL_S_VS - arm_SMLAL_S_VC - arm_SMLAL_S_HI - arm_SMLAL_S_LS - arm_SMLAL_S_GE - arm_SMLAL_S_LT - arm_SMLAL_S_GT - arm_SMLAL_S_LE - arm_SMLAL_S - arm_SMLAL_S_ZZ - arm_SMLALBB_EQ - arm_SMLALBB_NE - arm_SMLALBB_CS - arm_SMLALBB_CC - arm_SMLALBB_MI - arm_SMLALBB_PL - arm_SMLALBB_VS - arm_SMLALBB_VC - arm_SMLALBB_HI - arm_SMLALBB_LS - arm_SMLALBB_GE - arm_SMLALBB_LT - arm_SMLALBB_GT - arm_SMLALBB_LE - arm_SMLALBB - arm_SMLALBB_ZZ - arm_SMLALBT_EQ - arm_SMLALBT_NE - arm_SMLALBT_CS - arm_SMLALBT_CC - arm_SMLALBT_MI - arm_SMLALBT_PL - arm_SMLALBT_VS - arm_SMLALBT_VC - arm_SMLALBT_HI - arm_SMLALBT_LS - arm_SMLALBT_GE - arm_SMLALBT_LT - arm_SMLALBT_GT - arm_SMLALBT_LE - arm_SMLALBT - arm_SMLALBT_ZZ - arm_SMLALTB_EQ - arm_SMLALTB_NE - arm_SMLALTB_CS - arm_SMLALTB_CC - arm_SMLALTB_MI - arm_SMLALTB_PL - arm_SMLALTB_VS - arm_SMLALTB_VC - arm_SMLALTB_HI - arm_SMLALTB_LS - arm_SMLALTB_GE - arm_SMLALTB_LT - arm_SMLALTB_GT - arm_SMLALTB_LE - arm_SMLALTB - arm_SMLALTB_ZZ - arm_SMLALTT_EQ - arm_SMLALTT_NE - arm_SMLALTT_CS - arm_SMLALTT_CC - arm_SMLALTT_MI - arm_SMLALTT_PL - arm_SMLALTT_VS - arm_SMLALTT_VC - arm_SMLALTT_HI - arm_SMLALTT_LS - arm_SMLALTT_GE - arm_SMLALTT_LT - arm_SMLALTT_GT - arm_SMLALTT_LE - arm_SMLALTT - arm_SMLALTT_ZZ - arm_SMLALD_EQ - arm_SMLALD_NE - arm_SMLALD_CS - arm_SMLALD_CC - arm_SMLALD_MI - arm_SMLALD_PL - arm_SMLALD_VS - arm_SMLALD_VC - arm_SMLALD_HI - arm_SMLALD_LS - arm_SMLALD_GE - arm_SMLALD_LT - arm_SMLALD_GT - arm_SMLALD_LE - arm_SMLALD - arm_SMLALD_ZZ - arm_SMLALD_X_EQ - arm_SMLALD_X_NE - arm_SMLALD_X_CS - arm_SMLALD_X_CC - arm_SMLALD_X_MI - arm_SMLALD_X_PL - arm_SMLALD_X_VS - arm_SMLALD_X_VC - arm_SMLALD_X_HI - arm_SMLALD_X_LS - arm_SMLALD_X_GE - arm_SMLALD_X_LT - arm_SMLALD_X_GT - arm_SMLALD_X_LE - arm_SMLALD_X - arm_SMLALD_X_ZZ - arm_SMLAWB_EQ - arm_SMLAWB_NE - arm_SMLAWB_CS - arm_SMLAWB_CC - arm_SMLAWB_MI - arm_SMLAWB_PL - arm_SMLAWB_VS - arm_SMLAWB_VC - arm_SMLAWB_HI - arm_SMLAWB_LS - arm_SMLAWB_GE - arm_SMLAWB_LT - arm_SMLAWB_GT - arm_SMLAWB_LE - arm_SMLAWB - arm_SMLAWB_ZZ - arm_SMLAWT_EQ - arm_SMLAWT_NE - arm_SMLAWT_CS - arm_SMLAWT_CC - arm_SMLAWT_MI - arm_SMLAWT_PL - arm_SMLAWT_VS - arm_SMLAWT_VC - arm_SMLAWT_HI - arm_SMLAWT_LS - arm_SMLAWT_GE - arm_SMLAWT_LT - arm_SMLAWT_GT - arm_SMLAWT_LE - arm_SMLAWT - arm_SMLAWT_ZZ - arm_SMLSD_EQ - arm_SMLSD_NE - arm_SMLSD_CS - arm_SMLSD_CC - arm_SMLSD_MI - arm_SMLSD_PL - arm_SMLSD_VS - arm_SMLSD_VC - arm_SMLSD_HI - arm_SMLSD_LS - arm_SMLSD_GE - arm_SMLSD_LT - arm_SMLSD_GT - arm_SMLSD_LE - arm_SMLSD - arm_SMLSD_ZZ - arm_SMLSD_X_EQ - arm_SMLSD_X_NE - arm_SMLSD_X_CS - arm_SMLSD_X_CC - arm_SMLSD_X_MI - arm_SMLSD_X_PL - arm_SMLSD_X_VS - arm_SMLSD_X_VC - arm_SMLSD_X_HI - arm_SMLSD_X_LS - arm_SMLSD_X_GE - arm_SMLSD_X_LT - arm_SMLSD_X_GT - arm_SMLSD_X_LE - arm_SMLSD_X - arm_SMLSD_X_ZZ - arm_SMLSLD_EQ - arm_SMLSLD_NE - arm_SMLSLD_CS - arm_SMLSLD_CC - arm_SMLSLD_MI - arm_SMLSLD_PL - arm_SMLSLD_VS - arm_SMLSLD_VC - arm_SMLSLD_HI - arm_SMLSLD_LS - arm_SMLSLD_GE - arm_SMLSLD_LT - arm_SMLSLD_GT - arm_SMLSLD_LE - arm_SMLSLD - arm_SMLSLD_ZZ - arm_SMLSLD_X_EQ - arm_SMLSLD_X_NE - arm_SMLSLD_X_CS - arm_SMLSLD_X_CC - arm_SMLSLD_X_MI - arm_SMLSLD_X_PL - arm_SMLSLD_X_VS - arm_SMLSLD_X_VC - arm_SMLSLD_X_HI - arm_SMLSLD_X_LS - arm_SMLSLD_X_GE - arm_SMLSLD_X_LT - arm_SMLSLD_X_GT - arm_SMLSLD_X_LE - arm_SMLSLD_X - arm_SMLSLD_X_ZZ - arm_SMMLA_EQ - arm_SMMLA_NE - arm_SMMLA_CS - arm_SMMLA_CC - arm_SMMLA_MI - arm_SMMLA_PL - arm_SMMLA_VS - arm_SMMLA_VC - arm_SMMLA_HI - arm_SMMLA_LS - arm_SMMLA_GE - arm_SMMLA_LT - arm_SMMLA_GT - arm_SMMLA_LE - arm_SMMLA - arm_SMMLA_ZZ - arm_SMMLA_R_EQ - arm_SMMLA_R_NE - arm_SMMLA_R_CS - arm_SMMLA_R_CC - arm_SMMLA_R_MI - arm_SMMLA_R_PL - arm_SMMLA_R_VS - arm_SMMLA_R_VC - arm_SMMLA_R_HI - arm_SMMLA_R_LS - arm_SMMLA_R_GE - arm_SMMLA_R_LT - arm_SMMLA_R_GT - arm_SMMLA_R_LE - arm_SMMLA_R - arm_SMMLA_R_ZZ - arm_SMMLS_EQ - arm_SMMLS_NE - arm_SMMLS_CS - arm_SMMLS_CC - arm_SMMLS_MI - arm_SMMLS_PL - arm_SMMLS_VS - arm_SMMLS_VC - arm_SMMLS_HI - arm_SMMLS_LS - arm_SMMLS_GE - arm_SMMLS_LT - arm_SMMLS_GT - arm_SMMLS_LE - arm_SMMLS - arm_SMMLS_ZZ - arm_SMMLS_R_EQ - arm_SMMLS_R_NE - arm_SMMLS_R_CS - arm_SMMLS_R_CC - arm_SMMLS_R_MI - arm_SMMLS_R_PL - arm_SMMLS_R_VS - arm_SMMLS_R_VC - arm_SMMLS_R_HI - arm_SMMLS_R_LS - arm_SMMLS_R_GE - arm_SMMLS_R_LT - arm_SMMLS_R_GT - arm_SMMLS_R_LE - arm_SMMLS_R - arm_SMMLS_R_ZZ - arm_SMMUL_EQ - arm_SMMUL_NE - arm_SMMUL_CS - arm_SMMUL_CC - arm_SMMUL_MI - arm_SMMUL_PL - arm_SMMUL_VS - arm_SMMUL_VC - arm_SMMUL_HI - arm_SMMUL_LS - arm_SMMUL_GE - arm_SMMUL_LT - arm_SMMUL_GT - arm_SMMUL_LE - arm_SMMUL - arm_SMMUL_ZZ - arm_SMMUL_R_EQ - arm_SMMUL_R_NE - arm_SMMUL_R_CS - arm_SMMUL_R_CC - arm_SMMUL_R_MI - arm_SMMUL_R_PL - arm_SMMUL_R_VS - arm_SMMUL_R_VC - arm_SMMUL_R_HI - arm_SMMUL_R_LS - arm_SMMUL_R_GE - arm_SMMUL_R_LT - arm_SMMUL_R_GT - arm_SMMUL_R_LE - arm_SMMUL_R - arm_SMMUL_R_ZZ - arm_SMUAD_EQ - arm_SMUAD_NE - arm_SMUAD_CS - arm_SMUAD_CC - arm_SMUAD_MI - arm_SMUAD_PL - arm_SMUAD_VS - arm_SMUAD_VC - arm_SMUAD_HI - arm_SMUAD_LS - arm_SMUAD_GE - arm_SMUAD_LT - arm_SMUAD_GT - arm_SMUAD_LE - arm_SMUAD - arm_SMUAD_ZZ - arm_SMUAD_X_EQ - arm_SMUAD_X_NE - arm_SMUAD_X_CS - arm_SMUAD_X_CC - arm_SMUAD_X_MI - arm_SMUAD_X_PL - arm_SMUAD_X_VS - arm_SMUAD_X_VC - arm_SMUAD_X_HI - arm_SMUAD_X_LS - arm_SMUAD_X_GE - arm_SMUAD_X_LT - arm_SMUAD_X_GT - arm_SMUAD_X_LE - arm_SMUAD_X - arm_SMUAD_X_ZZ - arm_SMULBB_EQ - arm_SMULBB_NE - arm_SMULBB_CS - arm_SMULBB_CC - arm_SMULBB_MI - arm_SMULBB_PL - arm_SMULBB_VS - arm_SMULBB_VC - arm_SMULBB_HI - arm_SMULBB_LS - arm_SMULBB_GE - arm_SMULBB_LT - arm_SMULBB_GT - arm_SMULBB_LE - arm_SMULBB - arm_SMULBB_ZZ - arm_SMULBT_EQ - arm_SMULBT_NE - arm_SMULBT_CS - arm_SMULBT_CC - arm_SMULBT_MI - arm_SMULBT_PL - arm_SMULBT_VS - arm_SMULBT_VC - arm_SMULBT_HI - arm_SMULBT_LS - arm_SMULBT_GE - arm_SMULBT_LT - arm_SMULBT_GT - arm_SMULBT_LE - arm_SMULBT - arm_SMULBT_ZZ - arm_SMULTB_EQ - arm_SMULTB_NE - arm_SMULTB_CS - arm_SMULTB_CC - arm_SMULTB_MI - arm_SMULTB_PL - arm_SMULTB_VS - arm_SMULTB_VC - arm_SMULTB_HI - arm_SMULTB_LS - arm_SMULTB_GE - arm_SMULTB_LT - arm_SMULTB_GT - arm_SMULTB_LE - arm_SMULTB - arm_SMULTB_ZZ - arm_SMULTT_EQ - arm_SMULTT_NE - arm_SMULTT_CS - arm_SMULTT_CC - arm_SMULTT_MI - arm_SMULTT_PL - arm_SMULTT_VS - arm_SMULTT_VC - arm_SMULTT_HI - arm_SMULTT_LS - arm_SMULTT_GE - arm_SMULTT_LT - arm_SMULTT_GT - arm_SMULTT_LE - arm_SMULTT - arm_SMULTT_ZZ - arm_SMULL_EQ - arm_SMULL_NE - arm_SMULL_CS - arm_SMULL_CC - arm_SMULL_MI - arm_SMULL_PL - arm_SMULL_VS - arm_SMULL_VC - arm_SMULL_HI - arm_SMULL_LS - arm_SMULL_GE - arm_SMULL_LT - arm_SMULL_GT - arm_SMULL_LE - arm_SMULL - arm_SMULL_ZZ - arm_SMULL_S_EQ - arm_SMULL_S_NE - arm_SMULL_S_CS - arm_SMULL_S_CC - arm_SMULL_S_MI - arm_SMULL_S_PL - arm_SMULL_S_VS - arm_SMULL_S_VC - arm_SMULL_S_HI - arm_SMULL_S_LS - arm_SMULL_S_GE - arm_SMULL_S_LT - arm_SMULL_S_GT - arm_SMULL_S_LE - arm_SMULL_S - arm_SMULL_S_ZZ - arm_SMULWB_EQ - arm_SMULWB_NE - arm_SMULWB_CS - arm_SMULWB_CC - arm_SMULWB_MI - arm_SMULWB_PL - arm_SMULWB_VS - arm_SMULWB_VC - arm_SMULWB_HI - arm_SMULWB_LS - arm_SMULWB_GE - arm_SMULWB_LT - arm_SMULWB_GT - arm_SMULWB_LE - arm_SMULWB - arm_SMULWB_ZZ - arm_SMULWT_EQ - arm_SMULWT_NE - arm_SMULWT_CS - arm_SMULWT_CC - arm_SMULWT_MI - arm_SMULWT_PL - arm_SMULWT_VS - arm_SMULWT_VC - arm_SMULWT_HI - arm_SMULWT_LS - arm_SMULWT_GE - arm_SMULWT_LT - arm_SMULWT_GT - arm_SMULWT_LE - arm_SMULWT - arm_SMULWT_ZZ - arm_SMUSD_EQ - arm_SMUSD_NE - arm_SMUSD_CS - arm_SMUSD_CC - arm_SMUSD_MI - arm_SMUSD_PL - arm_SMUSD_VS - arm_SMUSD_VC - arm_SMUSD_HI - arm_SMUSD_LS - arm_SMUSD_GE - arm_SMUSD_LT - arm_SMUSD_GT - arm_SMUSD_LE - arm_SMUSD - arm_SMUSD_ZZ - arm_SMUSD_X_EQ - arm_SMUSD_X_NE - arm_SMUSD_X_CS - arm_SMUSD_X_CC - arm_SMUSD_X_MI - arm_SMUSD_X_PL - arm_SMUSD_X_VS - arm_SMUSD_X_VC - arm_SMUSD_X_HI - arm_SMUSD_X_LS - arm_SMUSD_X_GE - arm_SMUSD_X_LT - arm_SMUSD_X_GT - arm_SMUSD_X_LE - arm_SMUSD_X - arm_SMUSD_X_ZZ - arm_SSAT_EQ - arm_SSAT_NE - arm_SSAT_CS - arm_SSAT_CC - arm_SSAT_MI - arm_SSAT_PL - arm_SSAT_VS - arm_SSAT_VC - arm_SSAT_HI - arm_SSAT_LS - arm_SSAT_GE - arm_SSAT_LT - arm_SSAT_GT - arm_SSAT_LE - arm_SSAT - arm_SSAT_ZZ - arm_SSAT16_EQ - arm_SSAT16_NE - arm_SSAT16_CS - arm_SSAT16_CC - arm_SSAT16_MI - arm_SSAT16_PL - arm_SSAT16_VS - arm_SSAT16_VC - arm_SSAT16_HI - arm_SSAT16_LS - arm_SSAT16_GE - arm_SSAT16_LT - arm_SSAT16_GT - arm_SSAT16_LE - arm_SSAT16 - arm_SSAT16_ZZ - arm_SSAX_EQ - arm_SSAX_NE - arm_SSAX_CS - arm_SSAX_CC - arm_SSAX_MI - arm_SSAX_PL - arm_SSAX_VS - arm_SSAX_VC - arm_SSAX_HI - arm_SSAX_LS - arm_SSAX_GE - arm_SSAX_LT - arm_SSAX_GT - arm_SSAX_LE - arm_SSAX - arm_SSAX_ZZ - arm_SSUB16_EQ - arm_SSUB16_NE - arm_SSUB16_CS - arm_SSUB16_CC - arm_SSUB16_MI - arm_SSUB16_PL - arm_SSUB16_VS - arm_SSUB16_VC - arm_SSUB16_HI - arm_SSUB16_LS - arm_SSUB16_GE - arm_SSUB16_LT - arm_SSUB16_GT - arm_SSUB16_LE - arm_SSUB16 - arm_SSUB16_ZZ - arm_SSUB8_EQ - arm_SSUB8_NE - arm_SSUB8_CS - arm_SSUB8_CC - arm_SSUB8_MI - arm_SSUB8_PL - arm_SSUB8_VS - arm_SSUB8_VC - arm_SSUB8_HI - arm_SSUB8_LS - arm_SSUB8_GE - arm_SSUB8_LT - arm_SSUB8_GT - arm_SSUB8_LE - arm_SSUB8 - arm_SSUB8_ZZ - arm_STM_EQ - arm_STM_NE - arm_STM_CS - arm_STM_CC - arm_STM_MI - arm_STM_PL - arm_STM_VS - arm_STM_VC - arm_STM_HI - arm_STM_LS - arm_STM_GE - arm_STM_LT - arm_STM_GT - arm_STM_LE - arm_STM - arm_STM_ZZ - arm_STMDA_EQ - arm_STMDA_NE - arm_STMDA_CS - arm_STMDA_CC - arm_STMDA_MI - arm_STMDA_PL - arm_STMDA_VS - arm_STMDA_VC - arm_STMDA_HI - arm_STMDA_LS - arm_STMDA_GE - arm_STMDA_LT - arm_STMDA_GT - arm_STMDA_LE - arm_STMDA - arm_STMDA_ZZ - arm_STMDB_EQ - arm_STMDB_NE - arm_STMDB_CS - arm_STMDB_CC - arm_STMDB_MI - arm_STMDB_PL - arm_STMDB_VS - arm_STMDB_VC - arm_STMDB_HI - arm_STMDB_LS - arm_STMDB_GE - arm_STMDB_LT - arm_STMDB_GT - arm_STMDB_LE - arm_STMDB - arm_STMDB_ZZ - arm_STMIB_EQ - arm_STMIB_NE - arm_STMIB_CS - arm_STMIB_CC - arm_STMIB_MI - arm_STMIB_PL - arm_STMIB_VS - arm_STMIB_VC - arm_STMIB_HI - arm_STMIB_LS - arm_STMIB_GE - arm_STMIB_LT - arm_STMIB_GT - arm_STMIB_LE - arm_STMIB - arm_STMIB_ZZ - arm_STR_EQ - arm_STR_NE - arm_STR_CS - arm_STR_CC - arm_STR_MI - arm_STR_PL - arm_STR_VS - arm_STR_VC - arm_STR_HI - arm_STR_LS - arm_STR_GE - arm_STR_LT - arm_STR_GT - arm_STR_LE - arm_STR - arm_STR_ZZ - arm_STRB_EQ - arm_STRB_NE - arm_STRB_CS - arm_STRB_CC - arm_STRB_MI - arm_STRB_PL - arm_STRB_VS - arm_STRB_VC - arm_STRB_HI - arm_STRB_LS - arm_STRB_GE - arm_STRB_LT - arm_STRB_GT - arm_STRB_LE - arm_STRB - arm_STRB_ZZ - arm_STRBT_EQ - arm_STRBT_NE - arm_STRBT_CS - arm_STRBT_CC - arm_STRBT_MI - arm_STRBT_PL - arm_STRBT_VS - arm_STRBT_VC - arm_STRBT_HI - arm_STRBT_LS - arm_STRBT_GE - arm_STRBT_LT - arm_STRBT_GT - arm_STRBT_LE - arm_STRBT - arm_STRBT_ZZ - arm_STRD_EQ - arm_STRD_NE - arm_STRD_CS - arm_STRD_CC - arm_STRD_MI - arm_STRD_PL - arm_STRD_VS - arm_STRD_VC - arm_STRD_HI - arm_STRD_LS - arm_STRD_GE - arm_STRD_LT - arm_STRD_GT - arm_STRD_LE - arm_STRD - arm_STRD_ZZ - arm_STREX_EQ - arm_STREX_NE - arm_STREX_CS - arm_STREX_CC - arm_STREX_MI - arm_STREX_PL - arm_STREX_VS - arm_STREX_VC - arm_STREX_HI - arm_STREX_LS - arm_STREX_GE - arm_STREX_LT - arm_STREX_GT - arm_STREX_LE - arm_STREX - arm_STREX_ZZ - arm_STREXB_EQ - arm_STREXB_NE - arm_STREXB_CS - arm_STREXB_CC - arm_STREXB_MI - arm_STREXB_PL - arm_STREXB_VS - arm_STREXB_VC - arm_STREXB_HI - arm_STREXB_LS - arm_STREXB_GE - arm_STREXB_LT - arm_STREXB_GT - arm_STREXB_LE - arm_STREXB - arm_STREXB_ZZ - arm_STREXD_EQ - arm_STREXD_NE - arm_STREXD_CS - arm_STREXD_CC - arm_STREXD_MI - arm_STREXD_PL - arm_STREXD_VS - arm_STREXD_VC - arm_STREXD_HI - arm_STREXD_LS - arm_STREXD_GE - arm_STREXD_LT - arm_STREXD_GT - arm_STREXD_LE - arm_STREXD - arm_STREXD_ZZ - arm_STREXH_EQ - arm_STREXH_NE - arm_STREXH_CS - arm_STREXH_CC - arm_STREXH_MI - arm_STREXH_PL - arm_STREXH_VS - arm_STREXH_VC - arm_STREXH_HI - arm_STREXH_LS - arm_STREXH_GE - arm_STREXH_LT - arm_STREXH_GT - arm_STREXH_LE - arm_STREXH - arm_STREXH_ZZ - arm_STRH_EQ - arm_STRH_NE - arm_STRH_CS - arm_STRH_CC - arm_STRH_MI - arm_STRH_PL - arm_STRH_VS - arm_STRH_VC - arm_STRH_HI - arm_STRH_LS - arm_STRH_GE - arm_STRH_LT - arm_STRH_GT - arm_STRH_LE - arm_STRH - arm_STRH_ZZ - arm_STRHT_EQ - arm_STRHT_NE - arm_STRHT_CS - arm_STRHT_CC - arm_STRHT_MI - arm_STRHT_PL - arm_STRHT_VS - arm_STRHT_VC - arm_STRHT_HI - arm_STRHT_LS - arm_STRHT_GE - arm_STRHT_LT - arm_STRHT_GT - arm_STRHT_LE - arm_STRHT - arm_STRHT_ZZ - arm_STRT_EQ - arm_STRT_NE - arm_STRT_CS - arm_STRT_CC - arm_STRT_MI - arm_STRT_PL - arm_STRT_VS - arm_STRT_VC - arm_STRT_HI - arm_STRT_LS - arm_STRT_GE - arm_STRT_LT - arm_STRT_GT - arm_STRT_LE - arm_STRT - arm_STRT_ZZ - arm_SUB_EQ - arm_SUB_NE - arm_SUB_CS - arm_SUB_CC - arm_SUB_MI - arm_SUB_PL - arm_SUB_VS - arm_SUB_VC - arm_SUB_HI - arm_SUB_LS - arm_SUB_GE - arm_SUB_LT - arm_SUB_GT - arm_SUB_LE - arm_SUB - arm_SUB_ZZ - arm_SUB_S_EQ - arm_SUB_S_NE - arm_SUB_S_CS - arm_SUB_S_CC - arm_SUB_S_MI - arm_SUB_S_PL - arm_SUB_S_VS - arm_SUB_S_VC - arm_SUB_S_HI - arm_SUB_S_LS - arm_SUB_S_GE - arm_SUB_S_LT - arm_SUB_S_GT - arm_SUB_S_LE - arm_SUB_S - arm_SUB_S_ZZ - arm_SVC_EQ - arm_SVC_NE - arm_SVC_CS - arm_SVC_CC - arm_SVC_MI - arm_SVC_PL - arm_SVC_VS - arm_SVC_VC - arm_SVC_HI - arm_SVC_LS - arm_SVC_GE - arm_SVC_LT - arm_SVC_GT - arm_SVC_LE - arm_SVC - arm_SVC_ZZ - arm_SWP_EQ - arm_SWP_NE - arm_SWP_CS - arm_SWP_CC - arm_SWP_MI - arm_SWP_PL - arm_SWP_VS - arm_SWP_VC - arm_SWP_HI - arm_SWP_LS - arm_SWP_GE - arm_SWP_LT - arm_SWP_GT - arm_SWP_LE - arm_SWP - arm_SWP_ZZ - arm_SWP_B_EQ - arm_SWP_B_NE - arm_SWP_B_CS - arm_SWP_B_CC - arm_SWP_B_MI - arm_SWP_B_PL - arm_SWP_B_VS - arm_SWP_B_VC - arm_SWP_B_HI - arm_SWP_B_LS - arm_SWP_B_GE - arm_SWP_B_LT - arm_SWP_B_GT - arm_SWP_B_LE - arm_SWP_B - arm_SWP_B_ZZ - arm_SXTAB_EQ - arm_SXTAB_NE - arm_SXTAB_CS - arm_SXTAB_CC - arm_SXTAB_MI - arm_SXTAB_PL - arm_SXTAB_VS - arm_SXTAB_VC - arm_SXTAB_HI - arm_SXTAB_LS - arm_SXTAB_GE - arm_SXTAB_LT - arm_SXTAB_GT - arm_SXTAB_LE - arm_SXTAB - arm_SXTAB_ZZ - arm_SXTAB16_EQ - arm_SXTAB16_NE - arm_SXTAB16_CS - arm_SXTAB16_CC - arm_SXTAB16_MI - arm_SXTAB16_PL - arm_SXTAB16_VS - arm_SXTAB16_VC - arm_SXTAB16_HI - arm_SXTAB16_LS - arm_SXTAB16_GE - arm_SXTAB16_LT - arm_SXTAB16_GT - arm_SXTAB16_LE - arm_SXTAB16 - arm_SXTAB16_ZZ - arm_SXTAH_EQ - arm_SXTAH_NE - arm_SXTAH_CS - arm_SXTAH_CC - arm_SXTAH_MI - arm_SXTAH_PL - arm_SXTAH_VS - arm_SXTAH_VC - arm_SXTAH_HI - arm_SXTAH_LS - arm_SXTAH_GE - arm_SXTAH_LT - arm_SXTAH_GT - arm_SXTAH_LE - arm_SXTAH - arm_SXTAH_ZZ - arm_SXTB_EQ - arm_SXTB_NE - arm_SXTB_CS - arm_SXTB_CC - arm_SXTB_MI - arm_SXTB_PL - arm_SXTB_VS - arm_SXTB_VC - arm_SXTB_HI - arm_SXTB_LS - arm_SXTB_GE - arm_SXTB_LT - arm_SXTB_GT - arm_SXTB_LE - arm_SXTB - arm_SXTB_ZZ - arm_SXTB16_EQ - arm_SXTB16_NE - arm_SXTB16_CS - arm_SXTB16_CC - arm_SXTB16_MI - arm_SXTB16_PL - arm_SXTB16_VS - arm_SXTB16_VC - arm_SXTB16_HI - arm_SXTB16_LS - arm_SXTB16_GE - arm_SXTB16_LT - arm_SXTB16_GT - arm_SXTB16_LE - arm_SXTB16 - arm_SXTB16_ZZ - arm_SXTH_EQ - arm_SXTH_NE - arm_SXTH_CS - arm_SXTH_CC - arm_SXTH_MI - arm_SXTH_PL - arm_SXTH_VS - arm_SXTH_VC - arm_SXTH_HI - arm_SXTH_LS - arm_SXTH_GE - arm_SXTH_LT - arm_SXTH_GT - arm_SXTH_LE - arm_SXTH - arm_SXTH_ZZ - arm_TEQ_EQ - arm_TEQ_NE - arm_TEQ_CS - arm_TEQ_CC - arm_TEQ_MI - arm_TEQ_PL - arm_TEQ_VS - arm_TEQ_VC - arm_TEQ_HI - arm_TEQ_LS - arm_TEQ_GE - arm_TEQ_LT - arm_TEQ_GT - arm_TEQ_LE - arm_TEQ - arm_TEQ_ZZ - arm_TST_EQ - arm_TST_NE - arm_TST_CS - arm_TST_CC - arm_TST_MI - arm_TST_PL - arm_TST_VS - arm_TST_VC - arm_TST_HI - arm_TST_LS - arm_TST_GE - arm_TST_LT - arm_TST_GT - arm_TST_LE - arm_TST - arm_TST_ZZ - arm_UADD16_EQ - arm_UADD16_NE - arm_UADD16_CS - arm_UADD16_CC - arm_UADD16_MI - arm_UADD16_PL - arm_UADD16_VS - arm_UADD16_VC - arm_UADD16_HI - arm_UADD16_LS - arm_UADD16_GE - arm_UADD16_LT - arm_UADD16_GT - arm_UADD16_LE - arm_UADD16 - arm_UADD16_ZZ - arm_UADD8_EQ - arm_UADD8_NE - arm_UADD8_CS - arm_UADD8_CC - arm_UADD8_MI - arm_UADD8_PL - arm_UADD8_VS - arm_UADD8_VC - arm_UADD8_HI - arm_UADD8_LS - arm_UADD8_GE - arm_UADD8_LT - arm_UADD8_GT - arm_UADD8_LE - arm_UADD8 - arm_UADD8_ZZ - arm_UASX_EQ - arm_UASX_NE - arm_UASX_CS - arm_UASX_CC - arm_UASX_MI - arm_UASX_PL - arm_UASX_VS - arm_UASX_VC - arm_UASX_HI - arm_UASX_LS - arm_UASX_GE - arm_UASX_LT - arm_UASX_GT - arm_UASX_LE - arm_UASX - arm_UASX_ZZ - arm_UBFX_EQ - arm_UBFX_NE - arm_UBFX_CS - arm_UBFX_CC - arm_UBFX_MI - arm_UBFX_PL - arm_UBFX_VS - arm_UBFX_VC - arm_UBFX_HI - arm_UBFX_LS - arm_UBFX_GE - arm_UBFX_LT - arm_UBFX_GT - arm_UBFX_LE - arm_UBFX - arm_UBFX_ZZ - arm_UHADD16_EQ - arm_UHADD16_NE - arm_UHADD16_CS - arm_UHADD16_CC - arm_UHADD16_MI - arm_UHADD16_PL - arm_UHADD16_VS - arm_UHADD16_VC - arm_UHADD16_HI - arm_UHADD16_LS - arm_UHADD16_GE - arm_UHADD16_LT - arm_UHADD16_GT - arm_UHADD16_LE - arm_UHADD16 - arm_UHADD16_ZZ - arm_UHADD8_EQ - arm_UHADD8_NE - arm_UHADD8_CS - arm_UHADD8_CC - arm_UHADD8_MI - arm_UHADD8_PL - arm_UHADD8_VS - arm_UHADD8_VC - arm_UHADD8_HI - arm_UHADD8_LS - arm_UHADD8_GE - arm_UHADD8_LT - arm_UHADD8_GT - arm_UHADD8_LE - arm_UHADD8 - arm_UHADD8_ZZ - arm_UHASX_EQ - arm_UHASX_NE - arm_UHASX_CS - arm_UHASX_CC - arm_UHASX_MI - arm_UHASX_PL - arm_UHASX_VS - arm_UHASX_VC - arm_UHASX_HI - arm_UHASX_LS - arm_UHASX_GE - arm_UHASX_LT - arm_UHASX_GT - arm_UHASX_LE - arm_UHASX - arm_UHASX_ZZ - arm_UHSAX_EQ - arm_UHSAX_NE - arm_UHSAX_CS - arm_UHSAX_CC - arm_UHSAX_MI - arm_UHSAX_PL - arm_UHSAX_VS - arm_UHSAX_VC - arm_UHSAX_HI - arm_UHSAX_LS - arm_UHSAX_GE - arm_UHSAX_LT - arm_UHSAX_GT - arm_UHSAX_LE - arm_UHSAX - arm_UHSAX_ZZ - arm_UHSUB16_EQ - arm_UHSUB16_NE - arm_UHSUB16_CS - arm_UHSUB16_CC - arm_UHSUB16_MI - arm_UHSUB16_PL - arm_UHSUB16_VS - arm_UHSUB16_VC - arm_UHSUB16_HI - arm_UHSUB16_LS - arm_UHSUB16_GE - arm_UHSUB16_LT - arm_UHSUB16_GT - arm_UHSUB16_LE - arm_UHSUB16 - arm_UHSUB16_ZZ - arm_UHSUB8_EQ - arm_UHSUB8_NE - arm_UHSUB8_CS - arm_UHSUB8_CC - arm_UHSUB8_MI - arm_UHSUB8_PL - arm_UHSUB8_VS - arm_UHSUB8_VC - arm_UHSUB8_HI - arm_UHSUB8_LS - arm_UHSUB8_GE - arm_UHSUB8_LT - arm_UHSUB8_GT - arm_UHSUB8_LE - arm_UHSUB8 - arm_UHSUB8_ZZ - arm_UMAAL_EQ - arm_UMAAL_NE - arm_UMAAL_CS - arm_UMAAL_CC - arm_UMAAL_MI - arm_UMAAL_PL - arm_UMAAL_VS - arm_UMAAL_VC - arm_UMAAL_HI - arm_UMAAL_LS - arm_UMAAL_GE - arm_UMAAL_LT - arm_UMAAL_GT - arm_UMAAL_LE - arm_UMAAL - arm_UMAAL_ZZ - arm_UMLAL_EQ - arm_UMLAL_NE - arm_UMLAL_CS - arm_UMLAL_CC - arm_UMLAL_MI - arm_UMLAL_PL - arm_UMLAL_VS - arm_UMLAL_VC - arm_UMLAL_HI - arm_UMLAL_LS - arm_UMLAL_GE - arm_UMLAL_LT - arm_UMLAL_GT - arm_UMLAL_LE - arm_UMLAL - arm_UMLAL_ZZ - arm_UMLAL_S_EQ - arm_UMLAL_S_NE - arm_UMLAL_S_CS - arm_UMLAL_S_CC - arm_UMLAL_S_MI - arm_UMLAL_S_PL - arm_UMLAL_S_VS - arm_UMLAL_S_VC - arm_UMLAL_S_HI - arm_UMLAL_S_LS - arm_UMLAL_S_GE - arm_UMLAL_S_LT - arm_UMLAL_S_GT - arm_UMLAL_S_LE - arm_UMLAL_S - arm_UMLAL_S_ZZ - arm_UMULL_EQ - arm_UMULL_NE - arm_UMULL_CS - arm_UMULL_CC - arm_UMULL_MI - arm_UMULL_PL - arm_UMULL_VS - arm_UMULL_VC - arm_UMULL_HI - arm_UMULL_LS - arm_UMULL_GE - arm_UMULL_LT - arm_UMULL_GT - arm_UMULL_LE - arm_UMULL - arm_UMULL_ZZ - arm_UMULL_S_EQ - arm_UMULL_S_NE - arm_UMULL_S_CS - arm_UMULL_S_CC - arm_UMULL_S_MI - arm_UMULL_S_PL - arm_UMULL_S_VS - arm_UMULL_S_VC - arm_UMULL_S_HI - arm_UMULL_S_LS - arm_UMULL_S_GE - arm_UMULL_S_LT - arm_UMULL_S_GT - arm_UMULL_S_LE - arm_UMULL_S - arm_UMULL_S_ZZ - arm_UNDEF - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - _ - arm_UQADD16_EQ - arm_UQADD16_NE - arm_UQADD16_CS - arm_UQADD16_CC - arm_UQADD16_MI - arm_UQADD16_PL - arm_UQADD16_VS - arm_UQADD16_VC - arm_UQADD16_HI - arm_UQADD16_LS - arm_UQADD16_GE - arm_UQADD16_LT - arm_UQADD16_GT - arm_UQADD16_LE - arm_UQADD16 - arm_UQADD16_ZZ - arm_UQADD8_EQ - arm_UQADD8_NE - arm_UQADD8_CS - arm_UQADD8_CC - arm_UQADD8_MI - arm_UQADD8_PL - arm_UQADD8_VS - arm_UQADD8_VC - arm_UQADD8_HI - arm_UQADD8_LS - arm_UQADD8_GE - arm_UQADD8_LT - arm_UQADD8_GT - arm_UQADD8_LE - arm_UQADD8 - arm_UQADD8_ZZ - arm_UQASX_EQ - arm_UQASX_NE - arm_UQASX_CS - arm_UQASX_CC - arm_UQASX_MI - arm_UQASX_PL - arm_UQASX_VS - arm_UQASX_VC - arm_UQASX_HI - arm_UQASX_LS - arm_UQASX_GE - arm_UQASX_LT - arm_UQASX_GT - arm_UQASX_LE - arm_UQASX - arm_UQASX_ZZ - arm_UQSAX_EQ - arm_UQSAX_NE - arm_UQSAX_CS - arm_UQSAX_CC - arm_UQSAX_MI - arm_UQSAX_PL - arm_UQSAX_VS - arm_UQSAX_VC - arm_UQSAX_HI - arm_UQSAX_LS - arm_UQSAX_GE - arm_UQSAX_LT - arm_UQSAX_GT - arm_UQSAX_LE - arm_UQSAX - arm_UQSAX_ZZ - arm_UQSUB16_EQ - arm_UQSUB16_NE - arm_UQSUB16_CS - arm_UQSUB16_CC - arm_UQSUB16_MI - arm_UQSUB16_PL - arm_UQSUB16_VS - arm_UQSUB16_VC - arm_UQSUB16_HI - arm_UQSUB16_LS - arm_UQSUB16_GE - arm_UQSUB16_LT - arm_UQSUB16_GT - arm_UQSUB16_LE - arm_UQSUB16 - arm_UQSUB16_ZZ - arm_UQSUB8_EQ - arm_UQSUB8_NE - arm_UQSUB8_CS - arm_UQSUB8_CC - arm_UQSUB8_MI - arm_UQSUB8_PL - arm_UQSUB8_VS - arm_UQSUB8_VC - arm_UQSUB8_HI - arm_UQSUB8_LS - arm_UQSUB8_GE - arm_UQSUB8_LT - arm_UQSUB8_GT - arm_UQSUB8_LE - arm_UQSUB8 - arm_UQSUB8_ZZ - arm_USAD8_EQ - arm_USAD8_NE - arm_USAD8_CS - arm_USAD8_CC - arm_USAD8_MI - arm_USAD8_PL - arm_USAD8_VS - arm_USAD8_VC - arm_USAD8_HI - arm_USAD8_LS - arm_USAD8_GE - arm_USAD8_LT - arm_USAD8_GT - arm_USAD8_LE - arm_USAD8 - arm_USAD8_ZZ - arm_USADA8_EQ - arm_USADA8_NE - arm_USADA8_CS - arm_USADA8_CC - arm_USADA8_MI - arm_USADA8_PL - arm_USADA8_VS - arm_USADA8_VC - arm_USADA8_HI - arm_USADA8_LS - arm_USADA8_GE - arm_USADA8_LT - arm_USADA8_GT - arm_USADA8_LE - arm_USADA8 - arm_USADA8_ZZ - arm_USAT_EQ - arm_USAT_NE - arm_USAT_CS - arm_USAT_CC - arm_USAT_MI - arm_USAT_PL - arm_USAT_VS - arm_USAT_VC - arm_USAT_HI - arm_USAT_LS - arm_USAT_GE - arm_USAT_LT - arm_USAT_GT - arm_USAT_LE - arm_USAT - arm_USAT_ZZ - arm_USAT16_EQ - arm_USAT16_NE - arm_USAT16_CS - arm_USAT16_CC - arm_USAT16_MI - arm_USAT16_PL - arm_USAT16_VS - arm_USAT16_VC - arm_USAT16_HI - arm_USAT16_LS - arm_USAT16_GE - arm_USAT16_LT - arm_USAT16_GT - arm_USAT16_LE - arm_USAT16 - arm_USAT16_ZZ - arm_USAX_EQ - arm_USAX_NE - arm_USAX_CS - arm_USAX_CC - arm_USAX_MI - arm_USAX_PL - arm_USAX_VS - arm_USAX_VC - arm_USAX_HI - arm_USAX_LS - arm_USAX_GE - arm_USAX_LT - arm_USAX_GT - arm_USAX_LE - arm_USAX - arm_USAX_ZZ - arm_USUB16_EQ - arm_USUB16_NE - arm_USUB16_CS - arm_USUB16_CC - arm_USUB16_MI - arm_USUB16_PL - arm_USUB16_VS - arm_USUB16_VC - arm_USUB16_HI - arm_USUB16_LS - arm_USUB16_GE - arm_USUB16_LT - arm_USUB16_GT - arm_USUB16_LE - arm_USUB16 - arm_USUB16_ZZ - arm_USUB8_EQ - arm_USUB8_NE - arm_USUB8_CS - arm_USUB8_CC - arm_USUB8_MI - arm_USUB8_PL - arm_USUB8_VS - arm_USUB8_VC - arm_USUB8_HI - arm_USUB8_LS - arm_USUB8_GE - arm_USUB8_LT - arm_USUB8_GT - arm_USUB8_LE - arm_USUB8 - arm_USUB8_ZZ - arm_UXTAB_EQ - arm_UXTAB_NE - arm_UXTAB_CS - arm_UXTAB_CC - arm_UXTAB_MI - arm_UXTAB_PL - arm_UXTAB_VS - arm_UXTAB_VC - arm_UXTAB_HI - arm_UXTAB_LS - arm_UXTAB_GE - arm_UXTAB_LT - arm_UXTAB_GT - arm_UXTAB_LE - arm_UXTAB - arm_UXTAB_ZZ - arm_UXTAB16_EQ - arm_UXTAB16_NE - arm_UXTAB16_CS - arm_UXTAB16_CC - arm_UXTAB16_MI - arm_UXTAB16_PL - arm_UXTAB16_VS - arm_UXTAB16_VC - arm_UXTAB16_HI - arm_UXTAB16_LS - arm_UXTAB16_GE - arm_UXTAB16_LT - arm_UXTAB16_GT - arm_UXTAB16_LE - arm_UXTAB16 - arm_UXTAB16_ZZ - arm_UXTAH_EQ - arm_UXTAH_NE - arm_UXTAH_CS - arm_UXTAH_CC - arm_UXTAH_MI - arm_UXTAH_PL - arm_UXTAH_VS - arm_UXTAH_VC - arm_UXTAH_HI - arm_UXTAH_LS - arm_UXTAH_GE - arm_UXTAH_LT - arm_UXTAH_GT - arm_UXTAH_LE - arm_UXTAH - arm_UXTAH_ZZ - arm_UXTB_EQ - arm_UXTB_NE - arm_UXTB_CS - arm_UXTB_CC - arm_UXTB_MI - arm_UXTB_PL - arm_UXTB_VS - arm_UXTB_VC - arm_UXTB_HI - arm_UXTB_LS - arm_UXTB_GE - arm_UXTB_LT - arm_UXTB_GT - arm_UXTB_LE - arm_UXTB - arm_UXTB_ZZ - arm_UXTB16_EQ - arm_UXTB16_NE - arm_UXTB16_CS - arm_UXTB16_CC - arm_UXTB16_MI - arm_UXTB16_PL - arm_UXTB16_VS - arm_UXTB16_VC - arm_UXTB16_HI - arm_UXTB16_LS - arm_UXTB16_GE - arm_UXTB16_LT - arm_UXTB16_GT - arm_UXTB16_LE - arm_UXTB16 - arm_UXTB16_ZZ - arm_UXTH_EQ - arm_UXTH_NE - arm_UXTH_CS - arm_UXTH_CC - arm_UXTH_MI - arm_UXTH_PL - arm_UXTH_VS - arm_UXTH_VC - arm_UXTH_HI - arm_UXTH_LS - arm_UXTH_GE - arm_UXTH_LT - arm_UXTH_GT - arm_UXTH_LE - arm_UXTH - arm_UXTH_ZZ - arm_VABS_EQ_F32 - arm_VABS_NE_F32 - arm_VABS_CS_F32 - arm_VABS_CC_F32 - arm_VABS_MI_F32 - arm_VABS_PL_F32 - arm_VABS_VS_F32 - arm_VABS_VC_F32 - arm_VABS_HI_F32 - arm_VABS_LS_F32 - arm_VABS_GE_F32 - arm_VABS_LT_F32 - arm_VABS_GT_F32 - arm_VABS_LE_F32 - arm_VABS_F32 - arm_VABS_ZZ_F32 - arm_VABS_EQ_F64 - arm_VABS_NE_F64 - arm_VABS_CS_F64 - arm_VABS_CC_F64 - arm_VABS_MI_F64 - arm_VABS_PL_F64 - arm_VABS_VS_F64 - arm_VABS_VC_F64 - arm_VABS_HI_F64 - arm_VABS_LS_F64 - arm_VABS_GE_F64 - arm_VABS_LT_F64 - arm_VABS_GT_F64 - arm_VABS_LE_F64 - arm_VABS_F64 - arm_VABS_ZZ_F64 - arm_VADD_EQ_F32 - arm_VADD_NE_F32 - arm_VADD_CS_F32 - arm_VADD_CC_F32 - arm_VADD_MI_F32 - arm_VADD_PL_F32 - arm_VADD_VS_F32 - arm_VADD_VC_F32 - arm_VADD_HI_F32 - arm_VADD_LS_F32 - arm_VADD_GE_F32 - arm_VADD_LT_F32 - arm_VADD_GT_F32 - arm_VADD_LE_F32 - arm_VADD_F32 - arm_VADD_ZZ_F32 - arm_VADD_EQ_F64 - arm_VADD_NE_F64 - arm_VADD_CS_F64 - arm_VADD_CC_F64 - arm_VADD_MI_F64 - arm_VADD_PL_F64 - arm_VADD_VS_F64 - arm_VADD_VC_F64 - arm_VADD_HI_F64 - arm_VADD_LS_F64 - arm_VADD_GE_F64 - arm_VADD_LT_F64 - arm_VADD_GT_F64 - arm_VADD_LE_F64 - arm_VADD_F64 - arm_VADD_ZZ_F64 - arm_VCMP_EQ_F32 - arm_VCMP_NE_F32 - arm_VCMP_CS_F32 - arm_VCMP_CC_F32 - arm_VCMP_MI_F32 - arm_VCMP_PL_F32 - arm_VCMP_VS_F32 - arm_VCMP_VC_F32 - arm_VCMP_HI_F32 - arm_VCMP_LS_F32 - arm_VCMP_GE_F32 - arm_VCMP_LT_F32 - arm_VCMP_GT_F32 - arm_VCMP_LE_F32 - arm_VCMP_F32 - arm_VCMP_ZZ_F32 - arm_VCMP_EQ_F64 - arm_VCMP_NE_F64 - arm_VCMP_CS_F64 - arm_VCMP_CC_F64 - arm_VCMP_MI_F64 - arm_VCMP_PL_F64 - arm_VCMP_VS_F64 - arm_VCMP_VC_F64 - arm_VCMP_HI_F64 - arm_VCMP_LS_F64 - arm_VCMP_GE_F64 - arm_VCMP_LT_F64 - arm_VCMP_GT_F64 - arm_VCMP_LE_F64 - arm_VCMP_F64 - arm_VCMP_ZZ_F64 - arm_VCMP_E_EQ_F32 - arm_VCMP_E_NE_F32 - arm_VCMP_E_CS_F32 - arm_VCMP_E_CC_F32 - arm_VCMP_E_MI_F32 - arm_VCMP_E_PL_F32 - arm_VCMP_E_VS_F32 - arm_VCMP_E_VC_F32 - arm_VCMP_E_HI_F32 - arm_VCMP_E_LS_F32 - arm_VCMP_E_GE_F32 - arm_VCMP_E_LT_F32 - arm_VCMP_E_GT_F32 - arm_VCMP_E_LE_F32 - arm_VCMP_E_F32 - arm_VCMP_E_ZZ_F32 - arm_VCMP_E_EQ_F64 - arm_VCMP_E_NE_F64 - arm_VCMP_E_CS_F64 - arm_VCMP_E_CC_F64 - arm_VCMP_E_MI_F64 - arm_VCMP_E_PL_F64 - arm_VCMP_E_VS_F64 - arm_VCMP_E_VC_F64 - arm_VCMP_E_HI_F64 - arm_VCMP_E_LS_F64 - arm_VCMP_E_GE_F64 - arm_VCMP_E_LT_F64 - arm_VCMP_E_GT_F64 - arm_VCMP_E_LE_F64 - arm_VCMP_E_F64 - arm_VCMP_E_ZZ_F64 - arm_VCVT_EQ_F32_FXS16 - arm_VCVT_NE_F32_FXS16 - arm_VCVT_CS_F32_FXS16 - arm_VCVT_CC_F32_FXS16 - arm_VCVT_MI_F32_FXS16 - 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arm_VCVT_EQ_F32_FXU32 - arm_VCVT_NE_F32_FXU32 - arm_VCVT_CS_F32_FXU32 - arm_VCVT_CC_F32_FXU32 - arm_VCVT_MI_F32_FXU32 - arm_VCVT_PL_F32_FXU32 - arm_VCVT_VS_F32_FXU32 - arm_VCVT_VC_F32_FXU32 - arm_VCVT_HI_F32_FXU32 - arm_VCVT_LS_F32_FXU32 - arm_VCVT_GE_F32_FXU32 - arm_VCVT_LT_F32_FXU32 - arm_VCVT_GT_F32_FXU32 - arm_VCVT_LE_F32_FXU32 - arm_VCVT_F32_FXU32 - arm_VCVT_ZZ_F32_FXU32 - arm_VCVT_EQ_F64_FXS16 - arm_VCVT_NE_F64_FXS16 - arm_VCVT_CS_F64_FXS16 - arm_VCVT_CC_F64_FXS16 - arm_VCVT_MI_F64_FXS16 - arm_VCVT_PL_F64_FXS16 - arm_VCVT_VS_F64_FXS16 - arm_VCVT_VC_F64_FXS16 - arm_VCVT_HI_F64_FXS16 - arm_VCVT_LS_F64_FXS16 - arm_VCVT_GE_F64_FXS16 - arm_VCVT_LT_F64_FXS16 - arm_VCVT_GT_F64_FXS16 - arm_VCVT_LE_F64_FXS16 - arm_VCVT_F64_FXS16 - arm_VCVT_ZZ_F64_FXS16 - arm_VCVT_EQ_F64_FXS32 - arm_VCVT_NE_F64_FXS32 - arm_VCVT_CS_F64_FXS32 - arm_VCVT_CC_F64_FXS32 - arm_VCVT_MI_F64_FXS32 - arm_VCVT_PL_F64_FXS32 - arm_VCVT_VS_F64_FXS32 - arm_VCVT_VC_F64_FXS32 - arm_VCVT_HI_F64_FXS32 - arm_VCVT_LS_F64_FXS32 - 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arm_VCVT_VS_U32_F32 - arm_VCVT_VC_U32_F32 - arm_VCVT_HI_U32_F32 - arm_VCVT_LS_U32_F32 - arm_VCVT_GE_U32_F32 - arm_VCVT_LT_U32_F32 - arm_VCVT_GT_U32_F32 - arm_VCVT_LE_U32_F32 - arm_VCVT_U32_F32 - arm_VCVT_ZZ_U32_F32 - arm_VCVT_EQ_U32_F64 - arm_VCVT_NE_U32_F64 - arm_VCVT_CS_U32_F64 - arm_VCVT_CC_U32_F64 - arm_VCVT_MI_U32_F64 - arm_VCVT_PL_U32_F64 - arm_VCVT_VS_U32_F64 - arm_VCVT_VC_U32_F64 - arm_VCVT_HI_U32_F64 - arm_VCVT_LS_U32_F64 - arm_VCVT_GE_U32_F64 - arm_VCVT_LT_U32_F64 - arm_VCVT_GT_U32_F64 - arm_VCVT_LE_U32_F64 - arm_VCVT_U32_F64 - arm_VCVT_ZZ_U32_F64 - arm_VCVT_EQ_S32_F32 - arm_VCVT_NE_S32_F32 - arm_VCVT_CS_S32_F32 - arm_VCVT_CC_S32_F32 - arm_VCVT_MI_S32_F32 - arm_VCVT_PL_S32_F32 - arm_VCVT_VS_S32_F32 - arm_VCVT_VC_S32_F32 - arm_VCVT_HI_S32_F32 - arm_VCVT_LS_S32_F32 - arm_VCVT_GE_S32_F32 - arm_VCVT_LT_S32_F32 - arm_VCVT_GT_S32_F32 - arm_VCVT_LE_S32_F32 - arm_VCVT_S32_F32 - arm_VCVT_ZZ_S32_F32 - arm_VCVT_EQ_S32_F64 - arm_VCVT_NE_S32_F64 - arm_VCVT_CS_S32_F64 - arm_VCVT_CC_S32_F64 - arm_VCVT_MI_S32_F64 - arm_VCVT_PL_S32_F64 - arm_VCVT_VS_S32_F64 - arm_VCVT_VC_S32_F64 - arm_VCVT_HI_S32_F64 - arm_VCVT_LS_S32_F64 - arm_VCVT_GE_S32_F64 - arm_VCVT_LT_S32_F64 - arm_VCVT_GT_S32_F64 - arm_VCVT_LE_S32_F64 - arm_VCVT_S32_F64 - arm_VCVT_ZZ_S32_F64 - arm_VDIV_EQ_F32 - arm_VDIV_NE_F32 - arm_VDIV_CS_F32 - arm_VDIV_CC_F32 - arm_VDIV_MI_F32 - arm_VDIV_PL_F32 - arm_VDIV_VS_F32 - arm_VDIV_VC_F32 - arm_VDIV_HI_F32 - arm_VDIV_LS_F32 - arm_VDIV_GE_F32 - arm_VDIV_LT_F32 - arm_VDIV_GT_F32 - arm_VDIV_LE_F32 - arm_VDIV_F32 - arm_VDIV_ZZ_F32 - arm_VDIV_EQ_F64 - arm_VDIV_NE_F64 - arm_VDIV_CS_F64 - arm_VDIV_CC_F64 - arm_VDIV_MI_F64 - arm_VDIV_PL_F64 - arm_VDIV_VS_F64 - arm_VDIV_VC_F64 - arm_VDIV_HI_F64 - arm_VDIV_LS_F64 - arm_VDIV_GE_F64 - arm_VDIV_LT_F64 - arm_VDIV_GT_F64 - arm_VDIV_LE_F64 - arm_VDIV_F64 - arm_VDIV_ZZ_F64 - arm_VLDR_EQ - arm_VLDR_NE - arm_VLDR_CS - arm_VLDR_CC - arm_VLDR_MI - arm_VLDR_PL - arm_VLDR_VS - arm_VLDR_VC - arm_VLDR_HI - arm_VLDR_LS - arm_VLDR_GE - arm_VLDR_LT - arm_VLDR_GT - arm_VLDR_LE - arm_VLDR - arm_VLDR_ZZ - arm_VMLA_EQ_F32 - arm_VMLA_NE_F32 - arm_VMLA_CS_F32 - arm_VMLA_CC_F32 - arm_VMLA_MI_F32 - arm_VMLA_PL_F32 - arm_VMLA_VS_F32 - arm_VMLA_VC_F32 - arm_VMLA_HI_F32 - arm_VMLA_LS_F32 - arm_VMLA_GE_F32 - arm_VMLA_LT_F32 - arm_VMLA_GT_F32 - arm_VMLA_LE_F32 - arm_VMLA_F32 - arm_VMLA_ZZ_F32 - arm_VMLA_EQ_F64 - arm_VMLA_NE_F64 - arm_VMLA_CS_F64 - arm_VMLA_CC_F64 - arm_VMLA_MI_F64 - arm_VMLA_PL_F64 - arm_VMLA_VS_F64 - arm_VMLA_VC_F64 - arm_VMLA_HI_F64 - arm_VMLA_LS_F64 - arm_VMLA_GE_F64 - arm_VMLA_LT_F64 - arm_VMLA_GT_F64 - arm_VMLA_LE_F64 - arm_VMLA_F64 - arm_VMLA_ZZ_F64 - arm_VMLS_EQ_F32 - arm_VMLS_NE_F32 - arm_VMLS_CS_F32 - arm_VMLS_CC_F32 - arm_VMLS_MI_F32 - arm_VMLS_PL_F32 - arm_VMLS_VS_F32 - arm_VMLS_VC_F32 - arm_VMLS_HI_F32 - arm_VMLS_LS_F32 - arm_VMLS_GE_F32 - arm_VMLS_LT_F32 - arm_VMLS_GT_F32 - arm_VMLS_LE_F32 - arm_VMLS_F32 - arm_VMLS_ZZ_F32 - arm_VMLS_EQ_F64 - arm_VMLS_NE_F64 - arm_VMLS_CS_F64 - arm_VMLS_CC_F64 - arm_VMLS_MI_F64 - arm_VMLS_PL_F64 - arm_VMLS_VS_F64 - arm_VMLS_VC_F64 - arm_VMLS_HI_F64 - arm_VMLS_LS_F64 - arm_VMLS_GE_F64 - arm_VMLS_LT_F64 - arm_VMLS_GT_F64 - arm_VMLS_LE_F64 - arm_VMLS_F64 - arm_VMLS_ZZ_F64 - arm_VMOV_EQ - arm_VMOV_NE - arm_VMOV_CS - arm_VMOV_CC - arm_VMOV_MI - arm_VMOV_PL - arm_VMOV_VS - arm_VMOV_VC - arm_VMOV_HI - arm_VMOV_LS - arm_VMOV_GE - arm_VMOV_LT - arm_VMOV_GT - arm_VMOV_LE - arm_VMOV - arm_VMOV_ZZ - arm_VMOV_EQ_32 - arm_VMOV_NE_32 - arm_VMOV_CS_32 - arm_VMOV_CC_32 - arm_VMOV_MI_32 - arm_VMOV_PL_32 - arm_VMOV_VS_32 - arm_VMOV_VC_32 - arm_VMOV_HI_32 - arm_VMOV_LS_32 - arm_VMOV_GE_32 - arm_VMOV_LT_32 - arm_VMOV_GT_32 - arm_VMOV_LE_32 - arm_VMOV_32 - arm_VMOV_ZZ_32 - arm_VMOV_EQ_F32 - arm_VMOV_NE_F32 - arm_VMOV_CS_F32 - arm_VMOV_CC_F32 - arm_VMOV_MI_F32 - arm_VMOV_PL_F32 - arm_VMOV_VS_F32 - arm_VMOV_VC_F32 - arm_VMOV_HI_F32 - arm_VMOV_LS_F32 - arm_VMOV_GE_F32 - arm_VMOV_LT_F32 - arm_VMOV_GT_F32 - arm_VMOV_LE_F32 - arm_VMOV_F32 - arm_VMOV_ZZ_F32 - arm_VMOV_EQ_F64 - arm_VMOV_NE_F64 - arm_VMOV_CS_F64 - arm_VMOV_CC_F64 - arm_VMOV_MI_F64 - arm_VMOV_PL_F64 - arm_VMOV_VS_F64 - arm_VMOV_VC_F64 - arm_VMOV_HI_F64 - arm_VMOV_LS_F64 - arm_VMOV_GE_F64 - arm_VMOV_LT_F64 - arm_VMOV_GT_F64 - arm_VMOV_LE_F64 - arm_VMOV_F64 - arm_VMOV_ZZ_F64 - arm_VMRS_EQ - arm_VMRS_NE - arm_VMRS_CS - arm_VMRS_CC - arm_VMRS_MI - arm_VMRS_PL - arm_VMRS_VS - arm_VMRS_VC - arm_VMRS_HI - arm_VMRS_LS - arm_VMRS_GE - arm_VMRS_LT - arm_VMRS_GT - arm_VMRS_LE - arm_VMRS - arm_VMRS_ZZ - arm_VMSR_EQ - arm_VMSR_NE - arm_VMSR_CS - arm_VMSR_CC - arm_VMSR_MI - arm_VMSR_PL - arm_VMSR_VS - arm_VMSR_VC - arm_VMSR_HI - arm_VMSR_LS - arm_VMSR_GE - arm_VMSR_LT - arm_VMSR_GT - arm_VMSR_LE - arm_VMSR - arm_VMSR_ZZ - arm_VMUL_EQ_F32 - arm_VMUL_NE_F32 - arm_VMUL_CS_F32 - arm_VMUL_CC_F32 - arm_VMUL_MI_F32 - arm_VMUL_PL_F32 - arm_VMUL_VS_F32 - arm_VMUL_VC_F32 - arm_VMUL_HI_F32 - arm_VMUL_LS_F32 - arm_VMUL_GE_F32 - arm_VMUL_LT_F32 - arm_VMUL_GT_F32 - arm_VMUL_LE_F32 - arm_VMUL_F32 - arm_VMUL_ZZ_F32 - arm_VMUL_EQ_F64 - arm_VMUL_NE_F64 - arm_VMUL_CS_F64 - arm_VMUL_CC_F64 - arm_VMUL_MI_F64 - arm_VMUL_PL_F64 - arm_VMUL_VS_F64 - arm_VMUL_VC_F64 - arm_VMUL_HI_F64 - arm_VMUL_LS_F64 - arm_VMUL_GE_F64 - arm_VMUL_LT_F64 - arm_VMUL_GT_F64 - arm_VMUL_LE_F64 - arm_VMUL_F64 - arm_VMUL_ZZ_F64 - arm_VNEG_EQ_F32 - arm_VNEG_NE_F32 - arm_VNEG_CS_F32 - arm_VNEG_CC_F32 - arm_VNEG_MI_F32 - arm_VNEG_PL_F32 - arm_VNEG_VS_F32 - arm_VNEG_VC_F32 - arm_VNEG_HI_F32 - arm_VNEG_LS_F32 - arm_VNEG_GE_F32 - arm_VNEG_LT_F32 - arm_VNEG_GT_F32 - arm_VNEG_LE_F32 - arm_VNEG_F32 - arm_VNEG_ZZ_F32 - arm_VNEG_EQ_F64 - arm_VNEG_NE_F64 - arm_VNEG_CS_F64 - arm_VNEG_CC_F64 - arm_VNEG_MI_F64 - arm_VNEG_PL_F64 - arm_VNEG_VS_F64 - arm_VNEG_VC_F64 - arm_VNEG_HI_F64 - arm_VNEG_LS_F64 - arm_VNEG_GE_F64 - arm_VNEG_LT_F64 - arm_VNEG_GT_F64 - arm_VNEG_LE_F64 - arm_VNEG_F64 - arm_VNEG_ZZ_F64 - arm_VNMLS_EQ_F32 - arm_VNMLS_NE_F32 - arm_VNMLS_CS_F32 - arm_VNMLS_CC_F32 - arm_VNMLS_MI_F32 - arm_VNMLS_PL_F32 - arm_VNMLS_VS_F32 - arm_VNMLS_VC_F32 - arm_VNMLS_HI_F32 - arm_VNMLS_LS_F32 - arm_VNMLS_GE_F32 - arm_VNMLS_LT_F32 - arm_VNMLS_GT_F32 - arm_VNMLS_LE_F32 - arm_VNMLS_F32 - arm_VNMLS_ZZ_F32 - arm_VNMLS_EQ_F64 - arm_VNMLS_NE_F64 - arm_VNMLS_CS_F64 - arm_VNMLS_CC_F64 - arm_VNMLS_MI_F64 - arm_VNMLS_PL_F64 - arm_VNMLS_VS_F64 - arm_VNMLS_VC_F64 - arm_VNMLS_HI_F64 - arm_VNMLS_LS_F64 - arm_VNMLS_GE_F64 - arm_VNMLS_LT_F64 - arm_VNMLS_GT_F64 - arm_VNMLS_LE_F64 - arm_VNMLS_F64 - arm_VNMLS_ZZ_F64 - arm_VNMLA_EQ_F32 - arm_VNMLA_NE_F32 - arm_VNMLA_CS_F32 - arm_VNMLA_CC_F32 - arm_VNMLA_MI_F32 - arm_VNMLA_PL_F32 - arm_VNMLA_VS_F32 - arm_VNMLA_VC_F32 - arm_VNMLA_HI_F32 - arm_VNMLA_LS_F32 - arm_VNMLA_GE_F32 - arm_VNMLA_LT_F32 - arm_VNMLA_GT_F32 - arm_VNMLA_LE_F32 - arm_VNMLA_F32 - arm_VNMLA_ZZ_F32 - arm_VNMLA_EQ_F64 - arm_VNMLA_NE_F64 - arm_VNMLA_CS_F64 - arm_VNMLA_CC_F64 - arm_VNMLA_MI_F64 - arm_VNMLA_PL_F64 - arm_VNMLA_VS_F64 - arm_VNMLA_VC_F64 - arm_VNMLA_HI_F64 - arm_VNMLA_LS_F64 - arm_VNMLA_GE_F64 - arm_VNMLA_LT_F64 - arm_VNMLA_GT_F64 - arm_VNMLA_LE_F64 - arm_VNMLA_F64 - arm_VNMLA_ZZ_F64 - arm_VNMUL_EQ_F32 - arm_VNMUL_NE_F32 - arm_VNMUL_CS_F32 - arm_VNMUL_CC_F32 - arm_VNMUL_MI_F32 - arm_VNMUL_PL_F32 - arm_VNMUL_VS_F32 - arm_VNMUL_VC_F32 - arm_VNMUL_HI_F32 - arm_VNMUL_LS_F32 - arm_VNMUL_GE_F32 - arm_VNMUL_LT_F32 - arm_VNMUL_GT_F32 - arm_VNMUL_LE_F32 - arm_VNMUL_F32 - arm_VNMUL_ZZ_F32 - arm_VNMUL_EQ_F64 - arm_VNMUL_NE_F64 - arm_VNMUL_CS_F64 - arm_VNMUL_CC_F64 - arm_VNMUL_MI_F64 - arm_VNMUL_PL_F64 - arm_VNMUL_VS_F64 - arm_VNMUL_VC_F64 - arm_VNMUL_HI_F64 - arm_VNMUL_LS_F64 - arm_VNMUL_GE_F64 - arm_VNMUL_LT_F64 - arm_VNMUL_GT_F64 - arm_VNMUL_LE_F64 - arm_VNMUL_F64 - arm_VNMUL_ZZ_F64 - arm_VSQRT_EQ_F32 - arm_VSQRT_NE_F32 - arm_VSQRT_CS_F32 - arm_VSQRT_CC_F32 - arm_VSQRT_MI_F32 - arm_VSQRT_PL_F32 - arm_VSQRT_VS_F32 - arm_VSQRT_VC_F32 - arm_VSQRT_HI_F32 - arm_VSQRT_LS_F32 - arm_VSQRT_GE_F32 - arm_VSQRT_LT_F32 - arm_VSQRT_GT_F32 - arm_VSQRT_LE_F32 - arm_VSQRT_F32 - arm_VSQRT_ZZ_F32 - arm_VSQRT_EQ_F64 - arm_VSQRT_NE_F64 - arm_VSQRT_CS_F64 - arm_VSQRT_CC_F64 - arm_VSQRT_MI_F64 - arm_VSQRT_PL_F64 - arm_VSQRT_VS_F64 - arm_VSQRT_VC_F64 - arm_VSQRT_HI_F64 - arm_VSQRT_LS_F64 - arm_VSQRT_GE_F64 - arm_VSQRT_LT_F64 - arm_VSQRT_GT_F64 - arm_VSQRT_LE_F64 - arm_VSQRT_F64 - arm_VSQRT_ZZ_F64 - arm_VSTR_EQ - arm_VSTR_NE - arm_VSTR_CS - arm_VSTR_CC - arm_VSTR_MI - arm_VSTR_PL - arm_VSTR_VS - arm_VSTR_VC - arm_VSTR_HI - arm_VSTR_LS - arm_VSTR_GE - arm_VSTR_LT - arm_VSTR_GT - arm_VSTR_LE - arm_VSTR - arm_VSTR_ZZ - arm_VSUB_EQ_F32 - arm_VSUB_NE_F32 - arm_VSUB_CS_F32 - arm_VSUB_CC_F32 - arm_VSUB_MI_F32 - arm_VSUB_PL_F32 - arm_VSUB_VS_F32 - arm_VSUB_VC_F32 - arm_VSUB_HI_F32 - arm_VSUB_LS_F32 - arm_VSUB_GE_F32 - arm_VSUB_LT_F32 - arm_VSUB_GT_F32 - arm_VSUB_LE_F32 - arm_VSUB_F32 - arm_VSUB_ZZ_F32 - arm_VSUB_EQ_F64 - arm_VSUB_NE_F64 - arm_VSUB_CS_F64 - arm_VSUB_CC_F64 - arm_VSUB_MI_F64 - arm_VSUB_PL_F64 - arm_VSUB_VS_F64 - arm_VSUB_VC_F64 - arm_VSUB_HI_F64 - arm_VSUB_LS_F64 - arm_VSUB_GE_F64 - arm_VSUB_LT_F64 - arm_VSUB_GT_F64 - arm_VSUB_LE_F64 - arm_VSUB_F64 - arm_VSUB_ZZ_F64 - arm_WFE_EQ - arm_WFE_NE - arm_WFE_CS - arm_WFE_CC - arm_WFE_MI - arm_WFE_PL - arm_WFE_VS - arm_WFE_VC - arm_WFE_HI - arm_WFE_LS - arm_WFE_GE - arm_WFE_LT - arm_WFE_GT - arm_WFE_LE - arm_WFE - arm_WFE_ZZ - arm_WFI_EQ - arm_WFI_NE - arm_WFI_CS - arm_WFI_CC - arm_WFI_MI - arm_WFI_PL - arm_WFI_VS - arm_WFI_VC - arm_WFI_HI - arm_WFI_LS - arm_WFI_GE - arm_WFI_LT - arm_WFI_GT - arm_WFI_LE - arm_WFI - arm_WFI_ZZ - arm_YIELD_EQ - arm_YIELD_NE - arm_YIELD_CS - arm_YIELD_CC - arm_YIELD_MI - arm_YIELD_PL - arm_YIELD_VS - arm_YIELD_VC - arm_YIELD_HI - arm_YIELD_LS - arm_YIELD_GE - arm_YIELD_LT - arm_YIELD_GT - arm_YIELD_LE - arm_YIELD - arm_YIELD_ZZ -) - -var arm_opstr = [...]string{ - arm_ADC_EQ: "ADC.EQ", - arm_ADC_NE: "ADC.NE", - arm_ADC_CS: "ADC.CS", - arm_ADC_CC: "ADC.CC", - arm_ADC_MI: "ADC.MI", - arm_ADC_PL: "ADC.PL", - arm_ADC_VS: "ADC.VS", - arm_ADC_VC: "ADC.VC", - arm_ADC_HI: "ADC.HI", - arm_ADC_LS: "ADC.LS", - arm_ADC_GE: "ADC.GE", - arm_ADC_LT: "ADC.LT", - arm_ADC_GT: "ADC.GT", - arm_ADC_LE: "ADC.LE", - arm_ADC: "ADC", - arm_ADC_ZZ: "ADC.ZZ", - arm_ADC_S_EQ: "ADC.S.EQ", - arm_ADC_S_NE: "ADC.S.NE", - arm_ADC_S_CS: "ADC.S.CS", - arm_ADC_S_CC: "ADC.S.CC", - arm_ADC_S_MI: "ADC.S.MI", - arm_ADC_S_PL: "ADC.S.PL", - arm_ADC_S_VS: "ADC.S.VS", - arm_ADC_S_VC: "ADC.S.VC", - arm_ADC_S_HI: "ADC.S.HI", - arm_ADC_S_LS: "ADC.S.LS", - arm_ADC_S_GE: "ADC.S.GE", - arm_ADC_S_LT: "ADC.S.LT", - arm_ADC_S_GT: "ADC.S.GT", - arm_ADC_S_LE: "ADC.S.LE", - arm_ADC_S: "ADC.S", - arm_ADC_S_ZZ: "ADC.S.ZZ", - arm_ADD_EQ: "ADD.EQ", - arm_ADD_NE: "ADD.NE", - arm_ADD_CS: "ADD.CS", - arm_ADD_CC: "ADD.CC", - arm_ADD_MI: "ADD.MI", - arm_ADD_PL: "ADD.PL", - arm_ADD_VS: "ADD.VS", - arm_ADD_VC: "ADD.VC", - arm_ADD_HI: "ADD.HI", - arm_ADD_LS: "ADD.LS", - arm_ADD_GE: "ADD.GE", - arm_ADD_LT: "ADD.LT", - arm_ADD_GT: "ADD.GT", - arm_ADD_LE: "ADD.LE", - arm_ADD: "ADD", - arm_ADD_ZZ: "ADD.ZZ", - arm_ADD_S_EQ: "ADD.S.EQ", - arm_ADD_S_NE: "ADD.S.NE", - arm_ADD_S_CS: "ADD.S.CS", - arm_ADD_S_CC: "ADD.S.CC", - arm_ADD_S_MI: "ADD.S.MI", - arm_ADD_S_PL: "ADD.S.PL", - arm_ADD_S_VS: "ADD.S.VS", - arm_ADD_S_VC: "ADD.S.VC", - arm_ADD_S_HI: "ADD.S.HI", - arm_ADD_S_LS: "ADD.S.LS", - arm_ADD_S_GE: "ADD.S.GE", - arm_ADD_S_LT: "ADD.S.LT", - arm_ADD_S_GT: "ADD.S.GT", - arm_ADD_S_LE: "ADD.S.LE", - arm_ADD_S: "ADD.S", - arm_ADD_S_ZZ: "ADD.S.ZZ", - arm_AND_EQ: "AND.EQ", - arm_AND_NE: "AND.NE", - arm_AND_CS: "AND.CS", - arm_AND_CC: "AND.CC", - arm_AND_MI: "AND.MI", - arm_AND_PL: "AND.PL", - arm_AND_VS: "AND.VS", - arm_AND_VC: "AND.VC", - arm_AND_HI: "AND.HI", - arm_AND_LS: "AND.LS", - arm_AND_GE: "AND.GE", - arm_AND_LT: "AND.LT", - arm_AND_GT: "AND.GT", - arm_AND_LE: "AND.LE", - arm_AND: "AND", - arm_AND_ZZ: "AND.ZZ", - arm_AND_S_EQ: "AND.S.EQ", - arm_AND_S_NE: "AND.S.NE", - arm_AND_S_CS: "AND.S.CS", - arm_AND_S_CC: "AND.S.CC", - arm_AND_S_MI: "AND.S.MI", - arm_AND_S_PL: "AND.S.PL", - arm_AND_S_VS: "AND.S.VS", - arm_AND_S_VC: "AND.S.VC", - arm_AND_S_HI: "AND.S.HI", - arm_AND_S_LS: "AND.S.LS", - arm_AND_S_GE: "AND.S.GE", - arm_AND_S_LT: "AND.S.LT", - arm_AND_S_GT: "AND.S.GT", - arm_AND_S_LE: "AND.S.LE", - arm_AND_S: "AND.S", - arm_AND_S_ZZ: "AND.S.ZZ", - arm_ASR_EQ: "ASR.EQ", - arm_ASR_NE: "ASR.NE", - arm_ASR_CS: "ASR.CS", - arm_ASR_CC: "ASR.CC", - arm_ASR_MI: "ASR.MI", - arm_ASR_PL: "ASR.PL", - arm_ASR_VS: "ASR.VS", - arm_ASR_VC: "ASR.VC", - arm_ASR_HI: "ASR.HI", - arm_ASR_LS: "ASR.LS", - arm_ASR_GE: "ASR.GE", - arm_ASR_LT: "ASR.LT", - arm_ASR_GT: "ASR.GT", - arm_ASR_LE: "ASR.LE", - arm_ASR: "ASR", - arm_ASR_ZZ: "ASR.ZZ", - arm_ASR_S_EQ: "ASR.S.EQ", - arm_ASR_S_NE: "ASR.S.NE", - arm_ASR_S_CS: "ASR.S.CS", - arm_ASR_S_CC: "ASR.S.CC", - arm_ASR_S_MI: "ASR.S.MI", - arm_ASR_S_PL: "ASR.S.PL", - arm_ASR_S_VS: "ASR.S.VS", - arm_ASR_S_VC: "ASR.S.VC", - arm_ASR_S_HI: "ASR.S.HI", - arm_ASR_S_LS: "ASR.S.LS", - arm_ASR_S_GE: "ASR.S.GE", - arm_ASR_S_LT: "ASR.S.LT", - arm_ASR_S_GT: "ASR.S.GT", - arm_ASR_S_LE: "ASR.S.LE", - arm_ASR_S: "ASR.S", - arm_ASR_S_ZZ: "ASR.S.ZZ", - arm_B_EQ: "B.EQ", - arm_B_NE: "B.NE", - arm_B_CS: "B.CS", - arm_B_CC: "B.CC", - arm_B_MI: "B.MI", - arm_B_PL: "B.PL", - arm_B_VS: "B.VS", - arm_B_VC: "B.VC", - arm_B_HI: "B.HI", - arm_B_LS: "B.LS", - arm_B_GE: "B.GE", - arm_B_LT: "B.LT", - arm_B_GT: "B.GT", - arm_B_LE: "B.LE", - arm_B: "B", - arm_B_ZZ: "B.ZZ", - arm_BFC_EQ: "BFC.EQ", - arm_BFC_NE: "BFC.NE", - arm_BFC_CS: "BFC.CS", - arm_BFC_CC: "BFC.CC", - arm_BFC_MI: "BFC.MI", - arm_BFC_PL: "BFC.PL", - arm_BFC_VS: "BFC.VS", - arm_BFC_VC: "BFC.VC", - arm_BFC_HI: "BFC.HI", - arm_BFC_LS: "BFC.LS", - arm_BFC_GE: "BFC.GE", - arm_BFC_LT: "BFC.LT", - arm_BFC_GT: "BFC.GT", - arm_BFC_LE: "BFC.LE", - arm_BFC: "BFC", - arm_BFC_ZZ: "BFC.ZZ", - arm_BFI_EQ: "BFI.EQ", - arm_BFI_NE: "BFI.NE", - arm_BFI_CS: "BFI.CS", - arm_BFI_CC: "BFI.CC", - arm_BFI_MI: "BFI.MI", - arm_BFI_PL: "BFI.PL", - arm_BFI_VS: "BFI.VS", - arm_BFI_VC: "BFI.VC", - arm_BFI_HI: "BFI.HI", - arm_BFI_LS: "BFI.LS", - arm_BFI_GE: "BFI.GE", - arm_BFI_LT: "BFI.LT", - arm_BFI_GT: "BFI.GT", - arm_BFI_LE: "BFI.LE", - arm_BFI: "BFI", - arm_BFI_ZZ: "BFI.ZZ", - arm_BIC_EQ: "BIC.EQ", - arm_BIC_NE: "BIC.NE", - arm_BIC_CS: "BIC.CS", - arm_BIC_CC: "BIC.CC", - arm_BIC_MI: "BIC.MI", - arm_BIC_PL: "BIC.PL", - arm_BIC_VS: "BIC.VS", - arm_BIC_VC: "BIC.VC", - arm_BIC_HI: "BIC.HI", - arm_BIC_LS: "BIC.LS", - arm_BIC_GE: "BIC.GE", - arm_BIC_LT: "BIC.LT", - arm_BIC_GT: "BIC.GT", - arm_BIC_LE: "BIC.LE", - arm_BIC: "BIC", - arm_BIC_ZZ: "BIC.ZZ", - arm_BIC_S_EQ: "BIC.S.EQ", - arm_BIC_S_NE: "BIC.S.NE", - arm_BIC_S_CS: "BIC.S.CS", - arm_BIC_S_CC: "BIC.S.CC", - arm_BIC_S_MI: "BIC.S.MI", - arm_BIC_S_PL: "BIC.S.PL", - arm_BIC_S_VS: "BIC.S.VS", - arm_BIC_S_VC: "BIC.S.VC", - arm_BIC_S_HI: "BIC.S.HI", - arm_BIC_S_LS: "BIC.S.LS", - arm_BIC_S_GE: "BIC.S.GE", - arm_BIC_S_LT: "BIC.S.LT", - arm_BIC_S_GT: "BIC.S.GT", - arm_BIC_S_LE: "BIC.S.LE", - arm_BIC_S: "BIC.S", - arm_BIC_S_ZZ: "BIC.S.ZZ", - arm_BKPT_EQ: "BKPT.EQ", - arm_BKPT_NE: "BKPT.NE", - arm_BKPT_CS: "BKPT.CS", - arm_BKPT_CC: "BKPT.CC", - arm_BKPT_MI: "BKPT.MI", - arm_BKPT_PL: "BKPT.PL", - arm_BKPT_VS: "BKPT.VS", - arm_BKPT_VC: "BKPT.VC", - arm_BKPT_HI: "BKPT.HI", - arm_BKPT_LS: "BKPT.LS", - arm_BKPT_GE: "BKPT.GE", - arm_BKPT_LT: "BKPT.LT", - arm_BKPT_GT: "BKPT.GT", - arm_BKPT_LE: "BKPT.LE", - arm_BKPT: "BKPT", - arm_BKPT_ZZ: "BKPT.ZZ", - arm_BL_EQ: "BL.EQ", - arm_BL_NE: "BL.NE", - arm_BL_CS: "BL.CS", - arm_BL_CC: "BL.CC", - arm_BL_MI: "BL.MI", - arm_BL_PL: "BL.PL", - arm_BL_VS: "BL.VS", - arm_BL_VC: "BL.VC", - arm_BL_HI: "BL.HI", - arm_BL_LS: "BL.LS", - arm_BL_GE: "BL.GE", - arm_BL_LT: "BL.LT", - arm_BL_GT: "BL.GT", - arm_BL_LE: "BL.LE", - arm_BL: "BL", - arm_BL_ZZ: "BL.ZZ", - arm_BLX_EQ: "BLX.EQ", - arm_BLX_NE: "BLX.NE", - arm_BLX_CS: "BLX.CS", - arm_BLX_CC: "BLX.CC", - arm_BLX_MI: "BLX.MI", - arm_BLX_PL: "BLX.PL", - arm_BLX_VS: "BLX.VS", - arm_BLX_VC: "BLX.VC", - arm_BLX_HI: "BLX.HI", - arm_BLX_LS: "BLX.LS", - arm_BLX_GE: "BLX.GE", - arm_BLX_LT: "BLX.LT", - arm_BLX_GT: "BLX.GT", - arm_BLX_LE: "BLX.LE", - arm_BLX: "BLX", - arm_BLX_ZZ: "BLX.ZZ", - arm_BX_EQ: "BX.EQ", - arm_BX_NE: "BX.NE", - arm_BX_CS: "BX.CS", - arm_BX_CC: "BX.CC", - arm_BX_MI: "BX.MI", - arm_BX_PL: "BX.PL", - arm_BX_VS: "BX.VS", - arm_BX_VC: "BX.VC", - arm_BX_HI: "BX.HI", - arm_BX_LS: "BX.LS", - arm_BX_GE: "BX.GE", - arm_BX_LT: "BX.LT", - arm_BX_GT: "BX.GT", - arm_BX_LE: "BX.LE", - arm_BX: "BX", - arm_BX_ZZ: "BX.ZZ", - arm_BXJ_EQ: "BXJ.EQ", - arm_BXJ_NE: "BXJ.NE", - arm_BXJ_CS: "BXJ.CS", - arm_BXJ_CC: "BXJ.CC", - arm_BXJ_MI: "BXJ.MI", - arm_BXJ_PL: "BXJ.PL", - arm_BXJ_VS: "BXJ.VS", - arm_BXJ_VC: "BXJ.VC", - arm_BXJ_HI: "BXJ.HI", - arm_BXJ_LS: "BXJ.LS", - arm_BXJ_GE: "BXJ.GE", - arm_BXJ_LT: "BXJ.LT", - arm_BXJ_GT: "BXJ.GT", - arm_BXJ_LE: "BXJ.LE", - arm_BXJ: "BXJ", - arm_BXJ_ZZ: "BXJ.ZZ", - arm_CLREX: "CLREX", - arm_CLZ_EQ: "CLZ.EQ", - arm_CLZ_NE: "CLZ.NE", - arm_CLZ_CS: "CLZ.CS", - arm_CLZ_CC: "CLZ.CC", - arm_CLZ_MI: "CLZ.MI", - arm_CLZ_PL: "CLZ.PL", - arm_CLZ_VS: "CLZ.VS", - arm_CLZ_VC: "CLZ.VC", - arm_CLZ_HI: "CLZ.HI", - arm_CLZ_LS: "CLZ.LS", - arm_CLZ_GE: "CLZ.GE", - arm_CLZ_LT: "CLZ.LT", - arm_CLZ_GT: "CLZ.GT", - arm_CLZ_LE: "CLZ.LE", - arm_CLZ: "CLZ", - arm_CLZ_ZZ: "CLZ.ZZ", - arm_CMN_EQ: "CMN.EQ", - arm_CMN_NE: "CMN.NE", - arm_CMN_CS: "CMN.CS", - arm_CMN_CC: "CMN.CC", - arm_CMN_MI: "CMN.MI", - arm_CMN_PL: "CMN.PL", - arm_CMN_VS: "CMN.VS", - arm_CMN_VC: "CMN.VC", - arm_CMN_HI: "CMN.HI", - arm_CMN_LS: "CMN.LS", - arm_CMN_GE: "CMN.GE", - arm_CMN_LT: "CMN.LT", - arm_CMN_GT: "CMN.GT", - arm_CMN_LE: "CMN.LE", - arm_CMN: "CMN", - arm_CMN_ZZ: "CMN.ZZ", - arm_CMP_EQ: "CMP.EQ", - arm_CMP_NE: "CMP.NE", - arm_CMP_CS: "CMP.CS", - arm_CMP_CC: "CMP.CC", - arm_CMP_MI: "CMP.MI", - arm_CMP_PL: "CMP.PL", - arm_CMP_VS: "CMP.VS", - arm_CMP_VC: "CMP.VC", - arm_CMP_HI: "CMP.HI", - arm_CMP_LS: "CMP.LS", - arm_CMP_GE: "CMP.GE", - arm_CMP_LT: "CMP.LT", - arm_CMP_GT: "CMP.GT", - arm_CMP_LE: "CMP.LE", - arm_CMP: "CMP", - arm_CMP_ZZ: "CMP.ZZ", - arm_DBG_EQ: "DBG.EQ", - arm_DBG_NE: "DBG.NE", - arm_DBG_CS: "DBG.CS", - arm_DBG_CC: "DBG.CC", - arm_DBG_MI: "DBG.MI", - arm_DBG_PL: "DBG.PL", - arm_DBG_VS: "DBG.VS", - arm_DBG_VC: "DBG.VC", - arm_DBG_HI: "DBG.HI", - arm_DBG_LS: "DBG.LS", - arm_DBG_GE: "DBG.GE", - arm_DBG_LT: "DBG.LT", - arm_DBG_GT: "DBG.GT", - arm_DBG_LE: "DBG.LE", - arm_DBG: "DBG", - arm_DBG_ZZ: "DBG.ZZ", - arm_DMB: "DMB", - arm_DSB: "DSB", - arm_EOR_EQ: "EOR.EQ", - arm_EOR_NE: "EOR.NE", - arm_EOR_CS: "EOR.CS", - arm_EOR_CC: "EOR.CC", - arm_EOR_MI: "EOR.MI", - arm_EOR_PL: "EOR.PL", - arm_EOR_VS: "EOR.VS", - arm_EOR_VC: "EOR.VC", - arm_EOR_HI: "EOR.HI", - arm_EOR_LS: "EOR.LS", - arm_EOR_GE: "EOR.GE", - arm_EOR_LT: "EOR.LT", - arm_EOR_GT: "EOR.GT", - arm_EOR_LE: "EOR.LE", - arm_EOR: "EOR", - arm_EOR_ZZ: "EOR.ZZ", - arm_EOR_S_EQ: "EOR.S.EQ", - arm_EOR_S_NE: "EOR.S.NE", - arm_EOR_S_CS: "EOR.S.CS", - arm_EOR_S_CC: "EOR.S.CC", - arm_EOR_S_MI: "EOR.S.MI", - arm_EOR_S_PL: "EOR.S.PL", - arm_EOR_S_VS: "EOR.S.VS", - arm_EOR_S_VC: "EOR.S.VC", - arm_EOR_S_HI: "EOR.S.HI", - arm_EOR_S_LS: "EOR.S.LS", - arm_EOR_S_GE: "EOR.S.GE", - arm_EOR_S_LT: "EOR.S.LT", - arm_EOR_S_GT: "EOR.S.GT", - arm_EOR_S_LE: "EOR.S.LE", - arm_EOR_S: "EOR.S", - arm_EOR_S_ZZ: "EOR.S.ZZ", - arm_ISB: "ISB", - arm_LDM_EQ: "LDM.EQ", - arm_LDM_NE: "LDM.NE", - arm_LDM_CS: "LDM.CS", - arm_LDM_CC: "LDM.CC", - arm_LDM_MI: "LDM.MI", - arm_LDM_PL: "LDM.PL", - arm_LDM_VS: "LDM.VS", - arm_LDM_VC: "LDM.VC", - arm_LDM_HI: "LDM.HI", - arm_LDM_LS: "LDM.LS", - arm_LDM_GE: "LDM.GE", - arm_LDM_LT: "LDM.LT", - arm_LDM_GT: "LDM.GT", - arm_LDM_LE: "LDM.LE", - arm_LDM: "LDM", - arm_LDM_ZZ: "LDM.ZZ", - arm_LDMDA_EQ: "LDMDA.EQ", - arm_LDMDA_NE: "LDMDA.NE", - arm_LDMDA_CS: "LDMDA.CS", - arm_LDMDA_CC: "LDMDA.CC", - arm_LDMDA_MI: "LDMDA.MI", - arm_LDMDA_PL: "LDMDA.PL", - arm_LDMDA_VS: "LDMDA.VS", - arm_LDMDA_VC: "LDMDA.VC", - arm_LDMDA_HI: "LDMDA.HI", - arm_LDMDA_LS: "LDMDA.LS", - arm_LDMDA_GE: "LDMDA.GE", - arm_LDMDA_LT: "LDMDA.LT", - arm_LDMDA_GT: "LDMDA.GT", - arm_LDMDA_LE: "LDMDA.LE", - arm_LDMDA: "LDMDA", - arm_LDMDA_ZZ: "LDMDA.ZZ", - arm_LDMDB_EQ: "LDMDB.EQ", - arm_LDMDB_NE: "LDMDB.NE", - arm_LDMDB_CS: "LDMDB.CS", - arm_LDMDB_CC: "LDMDB.CC", - arm_LDMDB_MI: "LDMDB.MI", - arm_LDMDB_PL: "LDMDB.PL", - arm_LDMDB_VS: "LDMDB.VS", - arm_LDMDB_VC: "LDMDB.VC", - arm_LDMDB_HI: "LDMDB.HI", - arm_LDMDB_LS: "LDMDB.LS", - arm_LDMDB_GE: "LDMDB.GE", - arm_LDMDB_LT: "LDMDB.LT", - arm_LDMDB_GT: "LDMDB.GT", - arm_LDMDB_LE: "LDMDB.LE", - arm_LDMDB: "LDMDB", - arm_LDMDB_ZZ: "LDMDB.ZZ", - arm_LDMIB_EQ: "LDMIB.EQ", - arm_LDMIB_NE: "LDMIB.NE", - arm_LDMIB_CS: "LDMIB.CS", - arm_LDMIB_CC: "LDMIB.CC", - arm_LDMIB_MI: "LDMIB.MI", - arm_LDMIB_PL: "LDMIB.PL", - arm_LDMIB_VS: "LDMIB.VS", - arm_LDMIB_VC: "LDMIB.VC", - arm_LDMIB_HI: "LDMIB.HI", - arm_LDMIB_LS: "LDMIB.LS", - arm_LDMIB_GE: "LDMIB.GE", - arm_LDMIB_LT: "LDMIB.LT", - arm_LDMIB_GT: "LDMIB.GT", - arm_LDMIB_LE: "LDMIB.LE", - arm_LDMIB: "LDMIB", - arm_LDMIB_ZZ: "LDMIB.ZZ", - arm_LDR_EQ: "LDR.EQ", - arm_LDR_NE: "LDR.NE", - arm_LDR_CS: "LDR.CS", - arm_LDR_CC: "LDR.CC", - arm_LDR_MI: "LDR.MI", - arm_LDR_PL: "LDR.PL", - arm_LDR_VS: "LDR.VS", - arm_LDR_VC: "LDR.VC", - arm_LDR_HI: "LDR.HI", - arm_LDR_LS: "LDR.LS", - arm_LDR_GE: "LDR.GE", - arm_LDR_LT: "LDR.LT", - arm_LDR_GT: "LDR.GT", - arm_LDR_LE: "LDR.LE", - arm_LDR: "LDR", - arm_LDR_ZZ: "LDR.ZZ", - arm_LDRB_EQ: "LDRB.EQ", - arm_LDRB_NE: "LDRB.NE", - arm_LDRB_CS: "LDRB.CS", - arm_LDRB_CC: "LDRB.CC", - arm_LDRB_MI: "LDRB.MI", - arm_LDRB_PL: "LDRB.PL", - arm_LDRB_VS: "LDRB.VS", - arm_LDRB_VC: "LDRB.VC", - arm_LDRB_HI: "LDRB.HI", - arm_LDRB_LS: "LDRB.LS", - arm_LDRB_GE: "LDRB.GE", - arm_LDRB_LT: "LDRB.LT", - arm_LDRB_GT: "LDRB.GT", - arm_LDRB_LE: "LDRB.LE", - arm_LDRB: "LDRB", - arm_LDRB_ZZ: "LDRB.ZZ", - arm_LDRBT_EQ: "LDRBT.EQ", - arm_LDRBT_NE: "LDRBT.NE", - arm_LDRBT_CS: "LDRBT.CS", - arm_LDRBT_CC: "LDRBT.CC", - arm_LDRBT_MI: "LDRBT.MI", - arm_LDRBT_PL: "LDRBT.PL", - arm_LDRBT_VS: "LDRBT.VS", - arm_LDRBT_VC: "LDRBT.VC", - arm_LDRBT_HI: "LDRBT.HI", - arm_LDRBT_LS: "LDRBT.LS", - arm_LDRBT_GE: "LDRBT.GE", - arm_LDRBT_LT: "LDRBT.LT", - arm_LDRBT_GT: "LDRBT.GT", - arm_LDRBT_LE: "LDRBT.LE", - arm_LDRBT: "LDRBT", - arm_LDRBT_ZZ: "LDRBT.ZZ", - arm_LDRD_EQ: "LDRD.EQ", - arm_LDRD_NE: "LDRD.NE", - arm_LDRD_CS: "LDRD.CS", - arm_LDRD_CC: "LDRD.CC", - arm_LDRD_MI: "LDRD.MI", - arm_LDRD_PL: "LDRD.PL", - arm_LDRD_VS: "LDRD.VS", - arm_LDRD_VC: "LDRD.VC", - arm_LDRD_HI: "LDRD.HI", - arm_LDRD_LS: "LDRD.LS", - arm_LDRD_GE: "LDRD.GE", - arm_LDRD_LT: "LDRD.LT", - arm_LDRD_GT: "LDRD.GT", - arm_LDRD_LE: "LDRD.LE", - arm_LDRD: "LDRD", - arm_LDRD_ZZ: "LDRD.ZZ", - arm_LDREX_EQ: "LDREX.EQ", - arm_LDREX_NE: "LDREX.NE", - arm_LDREX_CS: "LDREX.CS", - arm_LDREX_CC: "LDREX.CC", - arm_LDREX_MI: "LDREX.MI", - arm_LDREX_PL: "LDREX.PL", - arm_LDREX_VS: "LDREX.VS", - arm_LDREX_VC: "LDREX.VC", - arm_LDREX_HI: "LDREX.HI", - arm_LDREX_LS: "LDREX.LS", - arm_LDREX_GE: "LDREX.GE", - arm_LDREX_LT: "LDREX.LT", - arm_LDREX_GT: "LDREX.GT", - arm_LDREX_LE: "LDREX.LE", - arm_LDREX: "LDREX", - arm_LDREX_ZZ: "LDREX.ZZ", - arm_LDREXB_EQ: "LDREXB.EQ", - arm_LDREXB_NE: "LDREXB.NE", - arm_LDREXB_CS: "LDREXB.CS", - arm_LDREXB_CC: "LDREXB.CC", - arm_LDREXB_MI: "LDREXB.MI", - arm_LDREXB_PL: "LDREXB.PL", - arm_LDREXB_VS: "LDREXB.VS", - arm_LDREXB_VC: "LDREXB.VC", - arm_LDREXB_HI: "LDREXB.HI", - arm_LDREXB_LS: "LDREXB.LS", - arm_LDREXB_GE: "LDREXB.GE", - arm_LDREXB_LT: "LDREXB.LT", - arm_LDREXB_GT: "LDREXB.GT", - arm_LDREXB_LE: "LDREXB.LE", - arm_LDREXB: "LDREXB", - arm_LDREXB_ZZ: "LDREXB.ZZ", - arm_LDREXD_EQ: "LDREXD.EQ", - arm_LDREXD_NE: "LDREXD.NE", - arm_LDREXD_CS: "LDREXD.CS", - arm_LDREXD_CC: "LDREXD.CC", - arm_LDREXD_MI: "LDREXD.MI", - arm_LDREXD_PL: "LDREXD.PL", - arm_LDREXD_VS: "LDREXD.VS", - arm_LDREXD_VC: "LDREXD.VC", - arm_LDREXD_HI: "LDREXD.HI", - arm_LDREXD_LS: "LDREXD.LS", - arm_LDREXD_GE: "LDREXD.GE", - arm_LDREXD_LT: "LDREXD.LT", - arm_LDREXD_GT: "LDREXD.GT", - arm_LDREXD_LE: "LDREXD.LE", - arm_LDREXD: "LDREXD", - arm_LDREXD_ZZ: "LDREXD.ZZ", - arm_LDREXH_EQ: "LDREXH.EQ", - arm_LDREXH_NE: "LDREXH.NE", - arm_LDREXH_CS: "LDREXH.CS", - arm_LDREXH_CC: "LDREXH.CC", - arm_LDREXH_MI: "LDREXH.MI", - arm_LDREXH_PL: "LDREXH.PL", - arm_LDREXH_VS: "LDREXH.VS", - arm_LDREXH_VC: "LDREXH.VC", - arm_LDREXH_HI: "LDREXH.HI", - arm_LDREXH_LS: "LDREXH.LS", - arm_LDREXH_GE: "LDREXH.GE", - arm_LDREXH_LT: "LDREXH.LT", - arm_LDREXH_GT: "LDREXH.GT", - arm_LDREXH_LE: "LDREXH.LE", - arm_LDREXH: "LDREXH", - arm_LDREXH_ZZ: "LDREXH.ZZ", - arm_LDRH_EQ: "LDRH.EQ", - arm_LDRH_NE: "LDRH.NE", - arm_LDRH_CS: "LDRH.CS", - arm_LDRH_CC: "LDRH.CC", - arm_LDRH_MI: "LDRH.MI", - arm_LDRH_PL: "LDRH.PL", - arm_LDRH_VS: "LDRH.VS", - arm_LDRH_VC: "LDRH.VC", - arm_LDRH_HI: "LDRH.HI", - arm_LDRH_LS: "LDRH.LS", - arm_LDRH_GE: "LDRH.GE", - arm_LDRH_LT: "LDRH.LT", - arm_LDRH_GT: "LDRH.GT", - arm_LDRH_LE: "LDRH.LE", - arm_LDRH: "LDRH", - arm_LDRH_ZZ: "LDRH.ZZ", - arm_LDRHT_EQ: "LDRHT.EQ", - arm_LDRHT_NE: "LDRHT.NE", - arm_LDRHT_CS: "LDRHT.CS", - arm_LDRHT_CC: "LDRHT.CC", - arm_LDRHT_MI: "LDRHT.MI", - arm_LDRHT_PL: "LDRHT.PL", - arm_LDRHT_VS: "LDRHT.VS", - arm_LDRHT_VC: "LDRHT.VC", - arm_LDRHT_HI: "LDRHT.HI", - arm_LDRHT_LS: "LDRHT.LS", - arm_LDRHT_GE: "LDRHT.GE", - arm_LDRHT_LT: "LDRHT.LT", - arm_LDRHT_GT: "LDRHT.GT", - arm_LDRHT_LE: "LDRHT.LE", - arm_LDRHT: "LDRHT", - arm_LDRHT_ZZ: "LDRHT.ZZ", - arm_LDRSB_EQ: "LDRSB.EQ", - arm_LDRSB_NE: "LDRSB.NE", - arm_LDRSB_CS: "LDRSB.CS", - arm_LDRSB_CC: "LDRSB.CC", - arm_LDRSB_MI: "LDRSB.MI", - arm_LDRSB_PL: "LDRSB.PL", - arm_LDRSB_VS: "LDRSB.VS", - arm_LDRSB_VC: "LDRSB.VC", - arm_LDRSB_HI: "LDRSB.HI", - arm_LDRSB_LS: "LDRSB.LS", - arm_LDRSB_GE: "LDRSB.GE", - arm_LDRSB_LT: "LDRSB.LT", - arm_LDRSB_GT: "LDRSB.GT", - arm_LDRSB_LE: "LDRSB.LE", - arm_LDRSB: "LDRSB", - arm_LDRSB_ZZ: "LDRSB.ZZ", - arm_LDRSBT_EQ: "LDRSBT.EQ", - arm_LDRSBT_NE: "LDRSBT.NE", - arm_LDRSBT_CS: "LDRSBT.CS", - arm_LDRSBT_CC: "LDRSBT.CC", - arm_LDRSBT_MI: "LDRSBT.MI", - arm_LDRSBT_PL: "LDRSBT.PL", - arm_LDRSBT_VS: "LDRSBT.VS", - arm_LDRSBT_VC: "LDRSBT.VC", - arm_LDRSBT_HI: "LDRSBT.HI", - arm_LDRSBT_LS: "LDRSBT.LS", - arm_LDRSBT_GE: "LDRSBT.GE", - arm_LDRSBT_LT: "LDRSBT.LT", - arm_LDRSBT_GT: "LDRSBT.GT", - arm_LDRSBT_LE: "LDRSBT.LE", - arm_LDRSBT: "LDRSBT", - arm_LDRSBT_ZZ: "LDRSBT.ZZ", - arm_LDRSH_EQ: "LDRSH.EQ", - arm_LDRSH_NE: "LDRSH.NE", - arm_LDRSH_CS: "LDRSH.CS", - arm_LDRSH_CC: "LDRSH.CC", - arm_LDRSH_MI: "LDRSH.MI", - arm_LDRSH_PL: "LDRSH.PL", - arm_LDRSH_VS: "LDRSH.VS", - arm_LDRSH_VC: "LDRSH.VC", - arm_LDRSH_HI: "LDRSH.HI", - arm_LDRSH_LS: "LDRSH.LS", - arm_LDRSH_GE: "LDRSH.GE", - arm_LDRSH_LT: "LDRSH.LT", - arm_LDRSH_GT: "LDRSH.GT", - arm_LDRSH_LE: "LDRSH.LE", - arm_LDRSH: "LDRSH", - arm_LDRSH_ZZ: "LDRSH.ZZ", - arm_LDRSHT_EQ: "LDRSHT.EQ", - arm_LDRSHT_NE: "LDRSHT.NE", - arm_LDRSHT_CS: "LDRSHT.CS", - arm_LDRSHT_CC: "LDRSHT.CC", - arm_LDRSHT_MI: "LDRSHT.MI", - arm_LDRSHT_PL: "LDRSHT.PL", - arm_LDRSHT_VS: "LDRSHT.VS", - arm_LDRSHT_VC: "LDRSHT.VC", - arm_LDRSHT_HI: "LDRSHT.HI", - arm_LDRSHT_LS: "LDRSHT.LS", - arm_LDRSHT_GE: "LDRSHT.GE", - arm_LDRSHT_LT: "LDRSHT.LT", - arm_LDRSHT_GT: "LDRSHT.GT", - arm_LDRSHT_LE: "LDRSHT.LE", - arm_LDRSHT: "LDRSHT", - arm_LDRSHT_ZZ: "LDRSHT.ZZ", - arm_LDRT_EQ: "LDRT.EQ", - arm_LDRT_NE: "LDRT.NE", - arm_LDRT_CS: "LDRT.CS", - arm_LDRT_CC: "LDRT.CC", - arm_LDRT_MI: "LDRT.MI", - arm_LDRT_PL: "LDRT.PL", - arm_LDRT_VS: "LDRT.VS", - arm_LDRT_VC: "LDRT.VC", - arm_LDRT_HI: "LDRT.HI", - arm_LDRT_LS: "LDRT.LS", - arm_LDRT_GE: "LDRT.GE", - arm_LDRT_LT: "LDRT.LT", - arm_LDRT_GT: "LDRT.GT", - arm_LDRT_LE: "LDRT.LE", - arm_LDRT: "LDRT", - arm_LDRT_ZZ: "LDRT.ZZ", - arm_LSL_EQ: "LSL.EQ", - arm_LSL_NE: "LSL.NE", - arm_LSL_CS: "LSL.CS", - arm_LSL_CC: "LSL.CC", - arm_LSL_MI: "LSL.MI", - arm_LSL_PL: "LSL.PL", - arm_LSL_VS: "LSL.VS", - arm_LSL_VC: "LSL.VC", - arm_LSL_HI: "LSL.HI", - arm_LSL_LS: "LSL.LS", - arm_LSL_GE: "LSL.GE", - arm_LSL_LT: "LSL.LT", - arm_LSL_GT: "LSL.GT", - arm_LSL_LE: "LSL.LE", - arm_LSL: "LSL", - arm_LSL_ZZ: "LSL.ZZ", - arm_LSL_S_EQ: "LSL.S.EQ", - arm_LSL_S_NE: "LSL.S.NE", - arm_LSL_S_CS: "LSL.S.CS", - arm_LSL_S_CC: "LSL.S.CC", - arm_LSL_S_MI: "LSL.S.MI", - arm_LSL_S_PL: "LSL.S.PL", - arm_LSL_S_VS: "LSL.S.VS", - arm_LSL_S_VC: "LSL.S.VC", - arm_LSL_S_HI: "LSL.S.HI", - arm_LSL_S_LS: "LSL.S.LS", - arm_LSL_S_GE: "LSL.S.GE", - arm_LSL_S_LT: "LSL.S.LT", - arm_LSL_S_GT: "LSL.S.GT", - arm_LSL_S_LE: "LSL.S.LE", - arm_LSL_S: "LSL.S", - arm_LSL_S_ZZ: "LSL.S.ZZ", - arm_LSR_EQ: "LSR.EQ", - arm_LSR_NE: "LSR.NE", - arm_LSR_CS: "LSR.CS", - arm_LSR_CC: "LSR.CC", - arm_LSR_MI: "LSR.MI", - arm_LSR_PL: "LSR.PL", - arm_LSR_VS: "LSR.VS", - arm_LSR_VC: "LSR.VC", - arm_LSR_HI: "LSR.HI", - arm_LSR_LS: "LSR.LS", - arm_LSR_GE: "LSR.GE", - arm_LSR_LT: "LSR.LT", - arm_LSR_GT: "LSR.GT", - arm_LSR_LE: "LSR.LE", - arm_LSR: "LSR", - arm_LSR_ZZ: "LSR.ZZ", - arm_LSR_S_EQ: "LSR.S.EQ", - arm_LSR_S_NE: "LSR.S.NE", - arm_LSR_S_CS: "LSR.S.CS", - arm_LSR_S_CC: "LSR.S.CC", - arm_LSR_S_MI: "LSR.S.MI", - arm_LSR_S_PL: "LSR.S.PL", - arm_LSR_S_VS: "LSR.S.VS", - arm_LSR_S_VC: "LSR.S.VC", - arm_LSR_S_HI: "LSR.S.HI", - arm_LSR_S_LS: "LSR.S.LS", - arm_LSR_S_GE: "LSR.S.GE", - arm_LSR_S_LT: "LSR.S.LT", - arm_LSR_S_GT: "LSR.S.GT", - arm_LSR_S_LE: "LSR.S.LE", - arm_LSR_S: "LSR.S", - arm_LSR_S_ZZ: "LSR.S.ZZ", - arm_MLA_EQ: "MLA.EQ", - arm_MLA_NE: "MLA.NE", - arm_MLA_CS: "MLA.CS", - arm_MLA_CC: "MLA.CC", - arm_MLA_MI: "MLA.MI", - arm_MLA_PL: "MLA.PL", - arm_MLA_VS: "MLA.VS", - arm_MLA_VC: "MLA.VC", - arm_MLA_HI: "MLA.HI", - arm_MLA_LS: "MLA.LS", - arm_MLA_GE: "MLA.GE", - arm_MLA_LT: "MLA.LT", - arm_MLA_GT: "MLA.GT", - arm_MLA_LE: "MLA.LE", - arm_MLA: "MLA", - arm_MLA_ZZ: "MLA.ZZ", - arm_MLA_S_EQ: "MLA.S.EQ", - arm_MLA_S_NE: "MLA.S.NE", - arm_MLA_S_CS: "MLA.S.CS", - arm_MLA_S_CC: "MLA.S.CC", - arm_MLA_S_MI: "MLA.S.MI", - arm_MLA_S_PL: "MLA.S.PL", - arm_MLA_S_VS: "MLA.S.VS", - arm_MLA_S_VC: "MLA.S.VC", - arm_MLA_S_HI: "MLA.S.HI", - arm_MLA_S_LS: "MLA.S.LS", - arm_MLA_S_GE: "MLA.S.GE", - arm_MLA_S_LT: "MLA.S.LT", - arm_MLA_S_GT: "MLA.S.GT", - arm_MLA_S_LE: "MLA.S.LE", - arm_MLA_S: "MLA.S", - arm_MLA_S_ZZ: "MLA.S.ZZ", - arm_MLS_EQ: "MLS.EQ", - arm_MLS_NE: "MLS.NE", - arm_MLS_CS: "MLS.CS", - arm_MLS_CC: "MLS.CC", - arm_MLS_MI: "MLS.MI", - arm_MLS_PL: "MLS.PL", - arm_MLS_VS: "MLS.VS", - arm_MLS_VC: "MLS.VC", - arm_MLS_HI: "MLS.HI", - arm_MLS_LS: "MLS.LS", - arm_MLS_GE: "MLS.GE", - arm_MLS_LT: "MLS.LT", - arm_MLS_GT: "MLS.GT", - arm_MLS_LE: "MLS.LE", - arm_MLS: "MLS", - arm_MLS_ZZ: "MLS.ZZ", - arm_MOV_EQ: "MOV.EQ", - arm_MOV_NE: "MOV.NE", - arm_MOV_CS: "MOV.CS", - arm_MOV_CC: "MOV.CC", - arm_MOV_MI: "MOV.MI", - arm_MOV_PL: "MOV.PL", - arm_MOV_VS: "MOV.VS", - arm_MOV_VC: "MOV.VC", - arm_MOV_HI: "MOV.HI", - arm_MOV_LS: "MOV.LS", - arm_MOV_GE: "MOV.GE", - arm_MOV_LT: "MOV.LT", - arm_MOV_GT: "MOV.GT", - arm_MOV_LE: "MOV.LE", - arm_MOV: "MOV", - arm_MOV_ZZ: "MOV.ZZ", - arm_MOV_S_EQ: "MOV.S.EQ", - arm_MOV_S_NE: "MOV.S.NE", - arm_MOV_S_CS: "MOV.S.CS", - arm_MOV_S_CC: "MOV.S.CC", - arm_MOV_S_MI: "MOV.S.MI", - arm_MOV_S_PL: "MOV.S.PL", - arm_MOV_S_VS: "MOV.S.VS", - arm_MOV_S_VC: "MOV.S.VC", - arm_MOV_S_HI: "MOV.S.HI", - arm_MOV_S_LS: "MOV.S.LS", - arm_MOV_S_GE: "MOV.S.GE", - arm_MOV_S_LT: "MOV.S.LT", - arm_MOV_S_GT: "MOV.S.GT", - arm_MOV_S_LE: "MOV.S.LE", - arm_MOV_S: "MOV.S", - arm_MOV_S_ZZ: "MOV.S.ZZ", - arm_MOVT_EQ: "MOVT.EQ", - arm_MOVT_NE: "MOVT.NE", - arm_MOVT_CS: "MOVT.CS", - arm_MOVT_CC: "MOVT.CC", - arm_MOVT_MI: "MOVT.MI", - arm_MOVT_PL: "MOVT.PL", - arm_MOVT_VS: "MOVT.VS", - arm_MOVT_VC: "MOVT.VC", - arm_MOVT_HI: "MOVT.HI", - arm_MOVT_LS: "MOVT.LS", - arm_MOVT_GE: "MOVT.GE", - arm_MOVT_LT: "MOVT.LT", - arm_MOVT_GT: "MOVT.GT", - arm_MOVT_LE: "MOVT.LE", - arm_MOVT: "MOVT", - arm_MOVT_ZZ: "MOVT.ZZ", - arm_MOVW_EQ: "MOVW.EQ", - arm_MOVW_NE: "MOVW.NE", - arm_MOVW_CS: "MOVW.CS", - arm_MOVW_CC: "MOVW.CC", - arm_MOVW_MI: "MOVW.MI", - arm_MOVW_PL: "MOVW.PL", - arm_MOVW_VS: "MOVW.VS", - arm_MOVW_VC: "MOVW.VC", - arm_MOVW_HI: "MOVW.HI", - arm_MOVW_LS: "MOVW.LS", - arm_MOVW_GE: "MOVW.GE", - arm_MOVW_LT: "MOVW.LT", - arm_MOVW_GT: "MOVW.GT", - arm_MOVW_LE: "MOVW.LE", - arm_MOVW: "MOVW", - arm_MOVW_ZZ: "MOVW.ZZ", - arm_MRS_EQ: "MRS.EQ", - arm_MRS_NE: "MRS.NE", - arm_MRS_CS: "MRS.CS", - arm_MRS_CC: "MRS.CC", - arm_MRS_MI: "MRS.MI", - arm_MRS_PL: "MRS.PL", - arm_MRS_VS: "MRS.VS", - arm_MRS_VC: "MRS.VC", - arm_MRS_HI: "MRS.HI", - arm_MRS_LS: "MRS.LS", - arm_MRS_GE: "MRS.GE", - arm_MRS_LT: "MRS.LT", - arm_MRS_GT: "MRS.GT", - arm_MRS_LE: "MRS.LE", - arm_MRS: "MRS", - arm_MRS_ZZ: "MRS.ZZ", - arm_MUL_EQ: "MUL.EQ", - arm_MUL_NE: "MUL.NE", - arm_MUL_CS: "MUL.CS", - arm_MUL_CC: "MUL.CC", - arm_MUL_MI: "MUL.MI", - arm_MUL_PL: "MUL.PL", - arm_MUL_VS: "MUL.VS", - arm_MUL_VC: "MUL.VC", - arm_MUL_HI: "MUL.HI", - arm_MUL_LS: "MUL.LS", - arm_MUL_GE: "MUL.GE", - arm_MUL_LT: "MUL.LT", - arm_MUL_GT: "MUL.GT", - arm_MUL_LE: "MUL.LE", - arm_MUL: "MUL", - arm_MUL_ZZ: "MUL.ZZ", - arm_MUL_S_EQ: "MUL.S.EQ", - arm_MUL_S_NE: "MUL.S.NE", - arm_MUL_S_CS: "MUL.S.CS", - arm_MUL_S_CC: "MUL.S.CC", - arm_MUL_S_MI: "MUL.S.MI", - arm_MUL_S_PL: "MUL.S.PL", - arm_MUL_S_VS: "MUL.S.VS", - arm_MUL_S_VC: "MUL.S.VC", - arm_MUL_S_HI: "MUL.S.HI", - arm_MUL_S_LS: "MUL.S.LS", - arm_MUL_S_GE: "MUL.S.GE", - arm_MUL_S_LT: "MUL.S.LT", - arm_MUL_S_GT: "MUL.S.GT", - arm_MUL_S_LE: "MUL.S.LE", - arm_MUL_S: "MUL.S", - arm_MUL_S_ZZ: "MUL.S.ZZ", - arm_MVN_EQ: "MVN.EQ", - arm_MVN_NE: "MVN.NE", - arm_MVN_CS: "MVN.CS", - arm_MVN_CC: "MVN.CC", - arm_MVN_MI: "MVN.MI", - arm_MVN_PL: "MVN.PL", - arm_MVN_VS: "MVN.VS", - arm_MVN_VC: "MVN.VC", - arm_MVN_HI: "MVN.HI", - arm_MVN_LS: "MVN.LS", - arm_MVN_GE: "MVN.GE", - arm_MVN_LT: "MVN.LT", - arm_MVN_GT: "MVN.GT", - arm_MVN_LE: "MVN.LE", - arm_MVN: "MVN", - arm_MVN_ZZ: "MVN.ZZ", - arm_MVN_S_EQ: "MVN.S.EQ", - arm_MVN_S_NE: "MVN.S.NE", - arm_MVN_S_CS: "MVN.S.CS", - arm_MVN_S_CC: "MVN.S.CC", - arm_MVN_S_MI: "MVN.S.MI", - arm_MVN_S_PL: "MVN.S.PL", - arm_MVN_S_VS: "MVN.S.VS", - arm_MVN_S_VC: "MVN.S.VC", - arm_MVN_S_HI: "MVN.S.HI", - arm_MVN_S_LS: "MVN.S.LS", - arm_MVN_S_GE: "MVN.S.GE", - arm_MVN_S_LT: "MVN.S.LT", - arm_MVN_S_GT: "MVN.S.GT", - arm_MVN_S_LE: "MVN.S.LE", - arm_MVN_S: "MVN.S", - arm_MVN_S_ZZ: "MVN.S.ZZ", - arm_NOP_EQ: "NOP.EQ", - arm_NOP_NE: "NOP.NE", - arm_NOP_CS: "NOP.CS", - arm_NOP_CC: "NOP.CC", - arm_NOP_MI: "NOP.MI", - arm_NOP_PL: "NOP.PL", - arm_NOP_VS: "NOP.VS", - arm_NOP_VC: "NOP.VC", - arm_NOP_HI: "NOP.HI", - arm_NOP_LS: "NOP.LS", - arm_NOP_GE: "NOP.GE", - arm_NOP_LT: "NOP.LT", - arm_NOP_GT: "NOP.GT", - arm_NOP_LE: "NOP.LE", - arm_NOP: "NOP", - arm_NOP_ZZ: "NOP.ZZ", - arm_ORR_EQ: "ORR.EQ", - arm_ORR_NE: "ORR.NE", - arm_ORR_CS: "ORR.CS", - arm_ORR_CC: "ORR.CC", - arm_ORR_MI: "ORR.MI", - arm_ORR_PL: "ORR.PL", - arm_ORR_VS: "ORR.VS", - arm_ORR_VC: "ORR.VC", - arm_ORR_HI: "ORR.HI", - arm_ORR_LS: "ORR.LS", - arm_ORR_GE: "ORR.GE", - arm_ORR_LT: "ORR.LT", - arm_ORR_GT: "ORR.GT", - arm_ORR_LE: "ORR.LE", - arm_ORR: "ORR", - arm_ORR_ZZ: "ORR.ZZ", - arm_ORR_S_EQ: "ORR.S.EQ", - arm_ORR_S_NE: "ORR.S.NE", - arm_ORR_S_CS: "ORR.S.CS", - arm_ORR_S_CC: "ORR.S.CC", - arm_ORR_S_MI: "ORR.S.MI", - arm_ORR_S_PL: "ORR.S.PL", - arm_ORR_S_VS: "ORR.S.VS", - arm_ORR_S_VC: "ORR.S.VC", - arm_ORR_S_HI: "ORR.S.HI", - arm_ORR_S_LS: "ORR.S.LS", - arm_ORR_S_GE: "ORR.S.GE", - arm_ORR_S_LT: "ORR.S.LT", - arm_ORR_S_GT: "ORR.S.GT", - arm_ORR_S_LE: "ORR.S.LE", - arm_ORR_S: "ORR.S", - arm_ORR_S_ZZ: "ORR.S.ZZ", - arm_PKHBT_EQ: "PKHBT.EQ", - arm_PKHBT_NE: "PKHBT.NE", - arm_PKHBT_CS: "PKHBT.CS", - arm_PKHBT_CC: "PKHBT.CC", - arm_PKHBT_MI: "PKHBT.MI", - arm_PKHBT_PL: "PKHBT.PL", - arm_PKHBT_VS: "PKHBT.VS", - arm_PKHBT_VC: "PKHBT.VC", - arm_PKHBT_HI: "PKHBT.HI", - arm_PKHBT_LS: "PKHBT.LS", - arm_PKHBT_GE: "PKHBT.GE", - arm_PKHBT_LT: "PKHBT.LT", - arm_PKHBT_GT: "PKHBT.GT", - arm_PKHBT_LE: "PKHBT.LE", - arm_PKHBT: "PKHBT", - arm_PKHBT_ZZ: "PKHBT.ZZ", - arm_PKHTB_EQ: "PKHTB.EQ", - arm_PKHTB_NE: "PKHTB.NE", - arm_PKHTB_CS: "PKHTB.CS", - arm_PKHTB_CC: "PKHTB.CC", - arm_PKHTB_MI: "PKHTB.MI", - arm_PKHTB_PL: "PKHTB.PL", - arm_PKHTB_VS: "PKHTB.VS", - arm_PKHTB_VC: "PKHTB.VC", - arm_PKHTB_HI: "PKHTB.HI", - arm_PKHTB_LS: "PKHTB.LS", - arm_PKHTB_GE: "PKHTB.GE", - arm_PKHTB_LT: "PKHTB.LT", - arm_PKHTB_GT: "PKHTB.GT", - arm_PKHTB_LE: "PKHTB.LE", - arm_PKHTB: "PKHTB", - arm_PKHTB_ZZ: "PKHTB.ZZ", - arm_PLD_W: "PLD.W", - arm_PLD: "PLD", - arm_PLI: "PLI", - arm_POP_EQ: "POP.EQ", - arm_POP_NE: "POP.NE", - arm_POP_CS: "POP.CS", - arm_POP_CC: "POP.CC", - arm_POP_MI: "POP.MI", - arm_POP_PL: "POP.PL", - arm_POP_VS: "POP.VS", - arm_POP_VC: "POP.VC", - arm_POP_HI: "POP.HI", - arm_POP_LS: "POP.LS", - arm_POP_GE: "POP.GE", - arm_POP_LT: "POP.LT", - arm_POP_GT: "POP.GT", - arm_POP_LE: "POP.LE", - arm_POP: "POP", - arm_POP_ZZ: "POP.ZZ", - arm_PUSH_EQ: "PUSH.EQ", - arm_PUSH_NE: "PUSH.NE", - arm_PUSH_CS: "PUSH.CS", - arm_PUSH_CC: "PUSH.CC", - arm_PUSH_MI: "PUSH.MI", - arm_PUSH_PL: "PUSH.PL", - arm_PUSH_VS: "PUSH.VS", - arm_PUSH_VC: "PUSH.VC", - arm_PUSH_HI: "PUSH.HI", - arm_PUSH_LS: "PUSH.LS", - arm_PUSH_GE: "PUSH.GE", - arm_PUSH_LT: "PUSH.LT", - arm_PUSH_GT: "PUSH.GT", - arm_PUSH_LE: "PUSH.LE", - arm_PUSH: "PUSH", - arm_PUSH_ZZ: "PUSH.ZZ", - arm_QADD_EQ: "QADD.EQ", - arm_QADD_NE: "QADD.NE", - arm_QADD_CS: "QADD.CS", - arm_QADD_CC: "QADD.CC", - arm_QADD_MI: "QADD.MI", - arm_QADD_PL: "QADD.PL", - arm_QADD_VS: "QADD.VS", - arm_QADD_VC: "QADD.VC", - arm_QADD_HI: "QADD.HI", - arm_QADD_LS: "QADD.LS", - arm_QADD_GE: "QADD.GE", - arm_QADD_LT: "QADD.LT", - arm_QADD_GT: "QADD.GT", - arm_QADD_LE: "QADD.LE", - arm_QADD: "QADD", - arm_QADD_ZZ: "QADD.ZZ", - arm_QADD16_EQ: "QADD16.EQ", - arm_QADD16_NE: "QADD16.NE", - arm_QADD16_CS: "QADD16.CS", - arm_QADD16_CC: "QADD16.CC", - arm_QADD16_MI: "QADD16.MI", - arm_QADD16_PL: "QADD16.PL", - arm_QADD16_VS: "QADD16.VS", - arm_QADD16_VC: "QADD16.VC", - arm_QADD16_HI: "QADD16.HI", - arm_QADD16_LS: "QADD16.LS", - arm_QADD16_GE: "QADD16.GE", - arm_QADD16_LT: "QADD16.LT", - arm_QADD16_GT: "QADD16.GT", - arm_QADD16_LE: "QADD16.LE", - arm_QADD16: "QADD16", - arm_QADD16_ZZ: "QADD16.ZZ", - arm_QADD8_EQ: "QADD8.EQ", - arm_QADD8_NE: "QADD8.NE", - arm_QADD8_CS: "QADD8.CS", - arm_QADD8_CC: "QADD8.CC", - arm_QADD8_MI: "QADD8.MI", - arm_QADD8_PL: "QADD8.PL", - arm_QADD8_VS: "QADD8.VS", - arm_QADD8_VC: "QADD8.VC", - arm_QADD8_HI: "QADD8.HI", - arm_QADD8_LS: "QADD8.LS", - arm_QADD8_GE: "QADD8.GE", - arm_QADD8_LT: "QADD8.LT", - arm_QADD8_GT: "QADD8.GT", - arm_QADD8_LE: "QADD8.LE", - arm_QADD8: "QADD8", - arm_QADD8_ZZ: "QADD8.ZZ", - arm_QASX_EQ: "QASX.EQ", - arm_QASX_NE: "QASX.NE", - arm_QASX_CS: "QASX.CS", - arm_QASX_CC: "QASX.CC", - arm_QASX_MI: "QASX.MI", - arm_QASX_PL: "QASX.PL", - arm_QASX_VS: "QASX.VS", - arm_QASX_VC: "QASX.VC", - arm_QASX_HI: "QASX.HI", - arm_QASX_LS: "QASX.LS", - arm_QASX_GE: "QASX.GE", - arm_QASX_LT: "QASX.LT", - arm_QASX_GT: "QASX.GT", - arm_QASX_LE: "QASX.LE", - arm_QASX: "QASX", - arm_QASX_ZZ: "QASX.ZZ", - arm_QDADD_EQ: "QDADD.EQ", - arm_QDADD_NE: "QDADD.NE", - arm_QDADD_CS: "QDADD.CS", - arm_QDADD_CC: "QDADD.CC", - arm_QDADD_MI: "QDADD.MI", - arm_QDADD_PL: "QDADD.PL", - arm_QDADD_VS: "QDADD.VS", - arm_QDADD_VC: "QDADD.VC", - arm_QDADD_HI: "QDADD.HI", - arm_QDADD_LS: "QDADD.LS", - arm_QDADD_GE: "QDADD.GE", - arm_QDADD_LT: "QDADD.LT", - arm_QDADD_GT: "QDADD.GT", - arm_QDADD_LE: "QDADD.LE", - arm_QDADD: "QDADD", - arm_QDADD_ZZ: "QDADD.ZZ", - arm_QDSUB_EQ: "QDSUB.EQ", - arm_QDSUB_NE: "QDSUB.NE", - arm_QDSUB_CS: "QDSUB.CS", - arm_QDSUB_CC: "QDSUB.CC", - arm_QDSUB_MI: "QDSUB.MI", - arm_QDSUB_PL: "QDSUB.PL", - arm_QDSUB_VS: "QDSUB.VS", - arm_QDSUB_VC: "QDSUB.VC", - arm_QDSUB_HI: "QDSUB.HI", - arm_QDSUB_LS: "QDSUB.LS", - arm_QDSUB_GE: "QDSUB.GE", - arm_QDSUB_LT: "QDSUB.LT", - arm_QDSUB_GT: "QDSUB.GT", - arm_QDSUB_LE: "QDSUB.LE", - arm_QDSUB: "QDSUB", - arm_QDSUB_ZZ: "QDSUB.ZZ", - arm_QSAX_EQ: "QSAX.EQ", - arm_QSAX_NE: "QSAX.NE", - arm_QSAX_CS: "QSAX.CS", - arm_QSAX_CC: "QSAX.CC", - arm_QSAX_MI: "QSAX.MI", - arm_QSAX_PL: "QSAX.PL", - arm_QSAX_VS: "QSAX.VS", - arm_QSAX_VC: "QSAX.VC", - arm_QSAX_HI: "QSAX.HI", - arm_QSAX_LS: "QSAX.LS", - arm_QSAX_GE: "QSAX.GE", - arm_QSAX_LT: "QSAX.LT", - arm_QSAX_GT: "QSAX.GT", - arm_QSAX_LE: "QSAX.LE", - arm_QSAX: "QSAX", - arm_QSAX_ZZ: "QSAX.ZZ", - arm_QSUB_EQ: "QSUB.EQ", - arm_QSUB_NE: "QSUB.NE", - arm_QSUB_CS: "QSUB.CS", - arm_QSUB_CC: "QSUB.CC", - arm_QSUB_MI: "QSUB.MI", - arm_QSUB_PL: "QSUB.PL", - arm_QSUB_VS: "QSUB.VS", - arm_QSUB_VC: "QSUB.VC", - arm_QSUB_HI: "QSUB.HI", - arm_QSUB_LS: "QSUB.LS", - arm_QSUB_GE: "QSUB.GE", - arm_QSUB_LT: "QSUB.LT", - arm_QSUB_GT: "QSUB.GT", - arm_QSUB_LE: "QSUB.LE", - arm_QSUB: "QSUB", - arm_QSUB_ZZ: "QSUB.ZZ", - arm_QSUB16_EQ: "QSUB16.EQ", - arm_QSUB16_NE: "QSUB16.NE", - arm_QSUB16_CS: "QSUB16.CS", - arm_QSUB16_CC: "QSUB16.CC", - arm_QSUB16_MI: "QSUB16.MI", - arm_QSUB16_PL: "QSUB16.PL", - arm_QSUB16_VS: "QSUB16.VS", - arm_QSUB16_VC: "QSUB16.VC", - arm_QSUB16_HI: "QSUB16.HI", - arm_QSUB16_LS: "QSUB16.LS", - arm_QSUB16_GE: "QSUB16.GE", - arm_QSUB16_LT: "QSUB16.LT", - arm_QSUB16_GT: "QSUB16.GT", - arm_QSUB16_LE: "QSUB16.LE", - arm_QSUB16: "QSUB16", - arm_QSUB16_ZZ: "QSUB16.ZZ", - arm_QSUB8_EQ: "QSUB8.EQ", - arm_QSUB8_NE: "QSUB8.NE", - arm_QSUB8_CS: "QSUB8.CS", - arm_QSUB8_CC: "QSUB8.CC", - arm_QSUB8_MI: "QSUB8.MI", - arm_QSUB8_PL: "QSUB8.PL", - arm_QSUB8_VS: "QSUB8.VS", - arm_QSUB8_VC: "QSUB8.VC", - arm_QSUB8_HI: "QSUB8.HI", - arm_QSUB8_LS: "QSUB8.LS", - arm_QSUB8_GE: "QSUB8.GE", - arm_QSUB8_LT: "QSUB8.LT", - arm_QSUB8_GT: "QSUB8.GT", - arm_QSUB8_LE: "QSUB8.LE", - arm_QSUB8: "QSUB8", - arm_QSUB8_ZZ: "QSUB8.ZZ", - arm_RBIT_EQ: "RBIT.EQ", - arm_RBIT_NE: "RBIT.NE", - arm_RBIT_CS: "RBIT.CS", - arm_RBIT_CC: "RBIT.CC", - arm_RBIT_MI: "RBIT.MI", - arm_RBIT_PL: "RBIT.PL", - arm_RBIT_VS: "RBIT.VS", - arm_RBIT_VC: "RBIT.VC", - arm_RBIT_HI: "RBIT.HI", - arm_RBIT_LS: "RBIT.LS", - arm_RBIT_GE: "RBIT.GE", - arm_RBIT_LT: "RBIT.LT", - arm_RBIT_GT: "RBIT.GT", - arm_RBIT_LE: "RBIT.LE", - arm_RBIT: "RBIT", - arm_RBIT_ZZ: "RBIT.ZZ", - arm_REV_EQ: "REV.EQ", - arm_REV_NE: "REV.NE", - arm_REV_CS: "REV.CS", - arm_REV_CC: "REV.CC", - arm_REV_MI: "REV.MI", - arm_REV_PL: "REV.PL", - arm_REV_VS: "REV.VS", - arm_REV_VC: "REV.VC", - arm_REV_HI: "REV.HI", - arm_REV_LS: "REV.LS", - arm_REV_GE: "REV.GE", - arm_REV_LT: "REV.LT", - arm_REV_GT: "REV.GT", - arm_REV_LE: "REV.LE", - arm_REV: "REV", - arm_REV_ZZ: "REV.ZZ", - arm_REV16_EQ: "REV16.EQ", - arm_REV16_NE: "REV16.NE", - arm_REV16_CS: "REV16.CS", - arm_REV16_CC: "REV16.CC", - arm_REV16_MI: "REV16.MI", - arm_REV16_PL: "REV16.PL", - arm_REV16_VS: "REV16.VS", - arm_REV16_VC: "REV16.VC", - arm_REV16_HI: "REV16.HI", - arm_REV16_LS: "REV16.LS", - arm_REV16_GE: "REV16.GE", - arm_REV16_LT: "REV16.LT", - arm_REV16_GT: "REV16.GT", - arm_REV16_LE: "REV16.LE", - arm_REV16: "REV16", - arm_REV16_ZZ: "REV16.ZZ", - arm_REVSH_EQ: "REVSH.EQ", - arm_REVSH_NE: "REVSH.NE", - arm_REVSH_CS: "REVSH.CS", - arm_REVSH_CC: "REVSH.CC", - arm_REVSH_MI: "REVSH.MI", - arm_REVSH_PL: "REVSH.PL", - arm_REVSH_VS: "REVSH.VS", - arm_REVSH_VC: "REVSH.VC", - arm_REVSH_HI: "REVSH.HI", - arm_REVSH_LS: "REVSH.LS", - arm_REVSH_GE: "REVSH.GE", - arm_REVSH_LT: "REVSH.LT", - arm_REVSH_GT: "REVSH.GT", - arm_REVSH_LE: "REVSH.LE", - arm_REVSH: "REVSH", - arm_REVSH_ZZ: "REVSH.ZZ", - arm_ROR_EQ: "ROR.EQ", - arm_ROR_NE: "ROR.NE", - arm_ROR_CS: "ROR.CS", - arm_ROR_CC: "ROR.CC", - arm_ROR_MI: "ROR.MI", - arm_ROR_PL: "ROR.PL", - arm_ROR_VS: "ROR.VS", - arm_ROR_VC: "ROR.VC", - arm_ROR_HI: "ROR.HI", - arm_ROR_LS: "ROR.LS", - arm_ROR_GE: "ROR.GE", - arm_ROR_LT: "ROR.LT", - arm_ROR_GT: "ROR.GT", - arm_ROR_LE: "ROR.LE", - arm_ROR: "ROR", - arm_ROR_ZZ: "ROR.ZZ", - arm_ROR_S_EQ: "ROR.S.EQ", - arm_ROR_S_NE: "ROR.S.NE", - arm_ROR_S_CS: "ROR.S.CS", - arm_ROR_S_CC: "ROR.S.CC", - arm_ROR_S_MI: "ROR.S.MI", - arm_ROR_S_PL: "ROR.S.PL", - arm_ROR_S_VS: "ROR.S.VS", - arm_ROR_S_VC: "ROR.S.VC", - arm_ROR_S_HI: "ROR.S.HI", - arm_ROR_S_LS: "ROR.S.LS", - arm_ROR_S_GE: "ROR.S.GE", - arm_ROR_S_LT: "ROR.S.LT", - arm_ROR_S_GT: "ROR.S.GT", - arm_ROR_S_LE: "ROR.S.LE", - arm_ROR_S: "ROR.S", - arm_ROR_S_ZZ: "ROR.S.ZZ", - arm_RRX_EQ: "RRX.EQ", - arm_RRX_NE: "RRX.NE", - arm_RRX_CS: "RRX.CS", - arm_RRX_CC: "RRX.CC", - arm_RRX_MI: "RRX.MI", - arm_RRX_PL: "RRX.PL", - arm_RRX_VS: "RRX.VS", - arm_RRX_VC: "RRX.VC", - arm_RRX_HI: "RRX.HI", - arm_RRX_LS: "RRX.LS", - arm_RRX_GE: "RRX.GE", - arm_RRX_LT: "RRX.LT", - arm_RRX_GT: "RRX.GT", - arm_RRX_LE: "RRX.LE", - arm_RRX: "RRX", - arm_RRX_ZZ: "RRX.ZZ", - arm_RRX_S_EQ: "RRX.S.EQ", - arm_RRX_S_NE: "RRX.S.NE", - arm_RRX_S_CS: "RRX.S.CS", - arm_RRX_S_CC: "RRX.S.CC", - arm_RRX_S_MI: "RRX.S.MI", - arm_RRX_S_PL: "RRX.S.PL", - arm_RRX_S_VS: "RRX.S.VS", - arm_RRX_S_VC: "RRX.S.VC", - arm_RRX_S_HI: "RRX.S.HI", - arm_RRX_S_LS: "RRX.S.LS", - arm_RRX_S_GE: "RRX.S.GE", - arm_RRX_S_LT: "RRX.S.LT", - arm_RRX_S_GT: "RRX.S.GT", - arm_RRX_S_LE: "RRX.S.LE", - arm_RRX_S: "RRX.S", - arm_RRX_S_ZZ: "RRX.S.ZZ", - arm_RSB_EQ: "RSB.EQ", - arm_RSB_NE: "RSB.NE", - arm_RSB_CS: "RSB.CS", - arm_RSB_CC: "RSB.CC", - arm_RSB_MI: "RSB.MI", - arm_RSB_PL: "RSB.PL", - arm_RSB_VS: "RSB.VS", - arm_RSB_VC: "RSB.VC", - arm_RSB_HI: "RSB.HI", - arm_RSB_LS: "RSB.LS", - arm_RSB_GE: "RSB.GE", - arm_RSB_LT: "RSB.LT", - arm_RSB_GT: "RSB.GT", - arm_RSB_LE: "RSB.LE", - arm_RSB: "RSB", - arm_RSB_ZZ: "RSB.ZZ", - arm_RSB_S_EQ: "RSB.S.EQ", - arm_RSB_S_NE: "RSB.S.NE", - arm_RSB_S_CS: "RSB.S.CS", - arm_RSB_S_CC: "RSB.S.CC", - arm_RSB_S_MI: "RSB.S.MI", - arm_RSB_S_PL: "RSB.S.PL", - arm_RSB_S_VS: "RSB.S.VS", - arm_RSB_S_VC: "RSB.S.VC", - arm_RSB_S_HI: "RSB.S.HI", - arm_RSB_S_LS: "RSB.S.LS", - arm_RSB_S_GE: "RSB.S.GE", - arm_RSB_S_LT: "RSB.S.LT", - arm_RSB_S_GT: "RSB.S.GT", - arm_RSB_S_LE: "RSB.S.LE", - arm_RSB_S: "RSB.S", - arm_RSB_S_ZZ: "RSB.S.ZZ", - arm_RSC_EQ: "RSC.EQ", - arm_RSC_NE: "RSC.NE", - arm_RSC_CS: "RSC.CS", - arm_RSC_CC: "RSC.CC", - arm_RSC_MI: "RSC.MI", - arm_RSC_PL: "RSC.PL", - arm_RSC_VS: "RSC.VS", - arm_RSC_VC: "RSC.VC", - arm_RSC_HI: "RSC.HI", - arm_RSC_LS: "RSC.LS", - arm_RSC_GE: "RSC.GE", - arm_RSC_LT: "RSC.LT", - arm_RSC_GT: "RSC.GT", - arm_RSC_LE: "RSC.LE", - arm_RSC: "RSC", - arm_RSC_ZZ: "RSC.ZZ", - arm_RSC_S_EQ: "RSC.S.EQ", - arm_RSC_S_NE: "RSC.S.NE", - arm_RSC_S_CS: "RSC.S.CS", - arm_RSC_S_CC: "RSC.S.CC", - arm_RSC_S_MI: "RSC.S.MI", - arm_RSC_S_PL: "RSC.S.PL", - arm_RSC_S_VS: "RSC.S.VS", - arm_RSC_S_VC: "RSC.S.VC", - arm_RSC_S_HI: "RSC.S.HI", - arm_RSC_S_LS: "RSC.S.LS", - arm_RSC_S_GE: "RSC.S.GE", - arm_RSC_S_LT: "RSC.S.LT", - arm_RSC_S_GT: "RSC.S.GT", - arm_RSC_S_LE: "RSC.S.LE", - arm_RSC_S: "RSC.S", - arm_RSC_S_ZZ: "RSC.S.ZZ", - arm_SADD16_EQ: "SADD16.EQ", - arm_SADD16_NE: "SADD16.NE", - arm_SADD16_CS: "SADD16.CS", - arm_SADD16_CC: "SADD16.CC", - arm_SADD16_MI: "SADD16.MI", - arm_SADD16_PL: "SADD16.PL", - arm_SADD16_VS: "SADD16.VS", - arm_SADD16_VC: "SADD16.VC", - arm_SADD16_HI: "SADD16.HI", - arm_SADD16_LS: "SADD16.LS", - arm_SADD16_GE: "SADD16.GE", - arm_SADD16_LT: "SADD16.LT", - arm_SADD16_GT: "SADD16.GT", - arm_SADD16_LE: "SADD16.LE", - arm_SADD16: "SADD16", - arm_SADD16_ZZ: "SADD16.ZZ", - arm_SADD8_EQ: "SADD8.EQ", - arm_SADD8_NE: "SADD8.NE", - arm_SADD8_CS: "SADD8.CS", - arm_SADD8_CC: "SADD8.CC", - arm_SADD8_MI: "SADD8.MI", - arm_SADD8_PL: "SADD8.PL", - arm_SADD8_VS: "SADD8.VS", - arm_SADD8_VC: "SADD8.VC", - arm_SADD8_HI: "SADD8.HI", - arm_SADD8_LS: "SADD8.LS", - arm_SADD8_GE: "SADD8.GE", - arm_SADD8_LT: "SADD8.LT", - arm_SADD8_GT: "SADD8.GT", - arm_SADD8_LE: "SADD8.LE", - arm_SADD8: "SADD8", - arm_SADD8_ZZ: "SADD8.ZZ", - arm_SASX_EQ: "SASX.EQ", - arm_SASX_NE: "SASX.NE", - arm_SASX_CS: "SASX.CS", - arm_SASX_CC: "SASX.CC", - arm_SASX_MI: "SASX.MI", - arm_SASX_PL: "SASX.PL", - arm_SASX_VS: "SASX.VS", - arm_SASX_VC: "SASX.VC", - arm_SASX_HI: "SASX.HI", - arm_SASX_LS: "SASX.LS", - arm_SASX_GE: "SASX.GE", - arm_SASX_LT: "SASX.LT", - arm_SASX_GT: "SASX.GT", - arm_SASX_LE: "SASX.LE", - arm_SASX: "SASX", - arm_SASX_ZZ: "SASX.ZZ", - arm_SBC_EQ: "SBC.EQ", - arm_SBC_NE: "SBC.NE", - arm_SBC_CS: "SBC.CS", - arm_SBC_CC: "SBC.CC", - arm_SBC_MI: "SBC.MI", - arm_SBC_PL: "SBC.PL", - arm_SBC_VS: "SBC.VS", - arm_SBC_VC: "SBC.VC", - arm_SBC_HI: "SBC.HI", - arm_SBC_LS: "SBC.LS", - arm_SBC_GE: "SBC.GE", - arm_SBC_LT: "SBC.LT", - arm_SBC_GT: "SBC.GT", - arm_SBC_LE: "SBC.LE", - arm_SBC: "SBC", - arm_SBC_ZZ: "SBC.ZZ", - arm_SBC_S_EQ: "SBC.S.EQ", - arm_SBC_S_NE: "SBC.S.NE", - arm_SBC_S_CS: "SBC.S.CS", - arm_SBC_S_CC: "SBC.S.CC", - arm_SBC_S_MI: "SBC.S.MI", - arm_SBC_S_PL: "SBC.S.PL", - arm_SBC_S_VS: "SBC.S.VS", - arm_SBC_S_VC: "SBC.S.VC", - arm_SBC_S_HI: "SBC.S.HI", - arm_SBC_S_LS: "SBC.S.LS", - arm_SBC_S_GE: "SBC.S.GE", - arm_SBC_S_LT: "SBC.S.LT", - arm_SBC_S_GT: "SBC.S.GT", - arm_SBC_S_LE: "SBC.S.LE", - arm_SBC_S: "SBC.S", - arm_SBC_S_ZZ: "SBC.S.ZZ", - arm_SBFX_EQ: "SBFX.EQ", - arm_SBFX_NE: "SBFX.NE", - arm_SBFX_CS: "SBFX.CS", - arm_SBFX_CC: "SBFX.CC", - arm_SBFX_MI: "SBFX.MI", - arm_SBFX_PL: "SBFX.PL", - arm_SBFX_VS: "SBFX.VS", - arm_SBFX_VC: "SBFX.VC", - arm_SBFX_HI: "SBFX.HI", - arm_SBFX_LS: "SBFX.LS", - arm_SBFX_GE: "SBFX.GE", - arm_SBFX_LT: "SBFX.LT", - arm_SBFX_GT: "SBFX.GT", - arm_SBFX_LE: "SBFX.LE", - arm_SBFX: "SBFX", - arm_SBFX_ZZ: "SBFX.ZZ", - arm_SEL_EQ: "SEL.EQ", - arm_SEL_NE: "SEL.NE", - arm_SEL_CS: "SEL.CS", - arm_SEL_CC: "SEL.CC", - arm_SEL_MI: "SEL.MI", - arm_SEL_PL: "SEL.PL", - arm_SEL_VS: "SEL.VS", - arm_SEL_VC: "SEL.VC", - arm_SEL_HI: "SEL.HI", - arm_SEL_LS: "SEL.LS", - arm_SEL_GE: "SEL.GE", - arm_SEL_LT: "SEL.LT", - arm_SEL_GT: "SEL.GT", - arm_SEL_LE: "SEL.LE", - arm_SEL: "SEL", - arm_SEL_ZZ: "SEL.ZZ", - arm_SETEND: "SETEND", - arm_SEV_EQ: "SEV.EQ", - arm_SEV_NE: "SEV.NE", - arm_SEV_CS: "SEV.CS", - arm_SEV_CC: "SEV.CC", - arm_SEV_MI: "SEV.MI", - arm_SEV_PL: "SEV.PL", - arm_SEV_VS: "SEV.VS", - arm_SEV_VC: "SEV.VC", - arm_SEV_HI: "SEV.HI", - arm_SEV_LS: "SEV.LS", - arm_SEV_GE: "SEV.GE", - arm_SEV_LT: "SEV.LT", - arm_SEV_GT: "SEV.GT", - arm_SEV_LE: "SEV.LE", - arm_SEV: "SEV", - arm_SEV_ZZ: "SEV.ZZ", - arm_SHADD16_EQ: "SHADD16.EQ", - arm_SHADD16_NE: "SHADD16.NE", - arm_SHADD16_CS: "SHADD16.CS", - arm_SHADD16_CC: "SHADD16.CC", - arm_SHADD16_MI: "SHADD16.MI", - arm_SHADD16_PL: "SHADD16.PL", - arm_SHADD16_VS: "SHADD16.VS", - arm_SHADD16_VC: "SHADD16.VC", - arm_SHADD16_HI: "SHADD16.HI", - arm_SHADD16_LS: "SHADD16.LS", - arm_SHADD16_GE: "SHADD16.GE", - arm_SHADD16_LT: "SHADD16.LT", - arm_SHADD16_GT: "SHADD16.GT", - arm_SHADD16_LE: "SHADD16.LE", - arm_SHADD16: "SHADD16", - arm_SHADD16_ZZ: "SHADD16.ZZ", - arm_SHADD8_EQ: "SHADD8.EQ", - arm_SHADD8_NE: "SHADD8.NE", - arm_SHADD8_CS: "SHADD8.CS", - arm_SHADD8_CC: "SHADD8.CC", - arm_SHADD8_MI: "SHADD8.MI", - arm_SHADD8_PL: "SHADD8.PL", - arm_SHADD8_VS: "SHADD8.VS", - arm_SHADD8_VC: "SHADD8.VC", - arm_SHADD8_HI: "SHADD8.HI", - arm_SHADD8_LS: "SHADD8.LS", - arm_SHADD8_GE: "SHADD8.GE", - arm_SHADD8_LT: "SHADD8.LT", - arm_SHADD8_GT: "SHADD8.GT", - arm_SHADD8_LE: "SHADD8.LE", - arm_SHADD8: "SHADD8", - arm_SHADD8_ZZ: "SHADD8.ZZ", - arm_SHASX_EQ: "SHASX.EQ", - arm_SHASX_NE: "SHASX.NE", - arm_SHASX_CS: "SHASX.CS", - arm_SHASX_CC: "SHASX.CC", - arm_SHASX_MI: "SHASX.MI", - arm_SHASX_PL: "SHASX.PL", - arm_SHASX_VS: "SHASX.VS", - arm_SHASX_VC: "SHASX.VC", - arm_SHASX_HI: "SHASX.HI", - arm_SHASX_LS: "SHASX.LS", - arm_SHASX_GE: "SHASX.GE", - arm_SHASX_LT: "SHASX.LT", - arm_SHASX_GT: "SHASX.GT", - arm_SHASX_LE: "SHASX.LE", - arm_SHASX: "SHASX", - arm_SHASX_ZZ: "SHASX.ZZ", - arm_SHSAX_EQ: "SHSAX.EQ", - arm_SHSAX_NE: "SHSAX.NE", - arm_SHSAX_CS: "SHSAX.CS", - arm_SHSAX_CC: "SHSAX.CC", - arm_SHSAX_MI: "SHSAX.MI", - arm_SHSAX_PL: "SHSAX.PL", - arm_SHSAX_VS: "SHSAX.VS", - arm_SHSAX_VC: "SHSAX.VC", - arm_SHSAX_HI: "SHSAX.HI", - arm_SHSAX_LS: "SHSAX.LS", - arm_SHSAX_GE: "SHSAX.GE", - arm_SHSAX_LT: "SHSAX.LT", - arm_SHSAX_GT: "SHSAX.GT", - arm_SHSAX_LE: "SHSAX.LE", - arm_SHSAX: "SHSAX", - arm_SHSAX_ZZ: "SHSAX.ZZ", - arm_SHSUB16_EQ: "SHSUB16.EQ", - arm_SHSUB16_NE: "SHSUB16.NE", - arm_SHSUB16_CS: "SHSUB16.CS", - arm_SHSUB16_CC: "SHSUB16.CC", - arm_SHSUB16_MI: "SHSUB16.MI", - arm_SHSUB16_PL: "SHSUB16.PL", - arm_SHSUB16_VS: "SHSUB16.VS", - arm_SHSUB16_VC: "SHSUB16.VC", - arm_SHSUB16_HI: "SHSUB16.HI", - arm_SHSUB16_LS: "SHSUB16.LS", - arm_SHSUB16_GE: "SHSUB16.GE", - arm_SHSUB16_LT: "SHSUB16.LT", - arm_SHSUB16_GT: "SHSUB16.GT", - arm_SHSUB16_LE: "SHSUB16.LE", - arm_SHSUB16: "SHSUB16", - arm_SHSUB16_ZZ: "SHSUB16.ZZ", - arm_SHSUB8_EQ: "SHSUB8.EQ", - arm_SHSUB8_NE: "SHSUB8.NE", - arm_SHSUB8_CS: "SHSUB8.CS", - arm_SHSUB8_CC: "SHSUB8.CC", - arm_SHSUB8_MI: "SHSUB8.MI", - arm_SHSUB8_PL: "SHSUB8.PL", - arm_SHSUB8_VS: "SHSUB8.VS", - arm_SHSUB8_VC: "SHSUB8.VC", - arm_SHSUB8_HI: "SHSUB8.HI", - arm_SHSUB8_LS: "SHSUB8.LS", - arm_SHSUB8_GE: "SHSUB8.GE", - arm_SHSUB8_LT: "SHSUB8.LT", - arm_SHSUB8_GT: "SHSUB8.GT", - arm_SHSUB8_LE: "SHSUB8.LE", - arm_SHSUB8: "SHSUB8", - arm_SHSUB8_ZZ: "SHSUB8.ZZ", - arm_SMLABB_EQ: "SMLABB.EQ", - arm_SMLABB_NE: "SMLABB.NE", - arm_SMLABB_CS: "SMLABB.CS", - arm_SMLABB_CC: "SMLABB.CC", - arm_SMLABB_MI: "SMLABB.MI", - arm_SMLABB_PL: "SMLABB.PL", - arm_SMLABB_VS: "SMLABB.VS", - arm_SMLABB_VC: "SMLABB.VC", - arm_SMLABB_HI: "SMLABB.HI", - arm_SMLABB_LS: "SMLABB.LS", - arm_SMLABB_GE: "SMLABB.GE", - arm_SMLABB_LT: "SMLABB.LT", - arm_SMLABB_GT: "SMLABB.GT", - arm_SMLABB_LE: "SMLABB.LE", - arm_SMLABB: "SMLABB", - arm_SMLABB_ZZ: "SMLABB.ZZ", - arm_SMLABT_EQ: "SMLABT.EQ", - arm_SMLABT_NE: "SMLABT.NE", - arm_SMLABT_CS: "SMLABT.CS", - arm_SMLABT_CC: "SMLABT.CC", - arm_SMLABT_MI: "SMLABT.MI", - arm_SMLABT_PL: "SMLABT.PL", - arm_SMLABT_VS: "SMLABT.VS", - arm_SMLABT_VC: "SMLABT.VC", - arm_SMLABT_HI: "SMLABT.HI", - arm_SMLABT_LS: "SMLABT.LS", - arm_SMLABT_GE: "SMLABT.GE", - arm_SMLABT_LT: "SMLABT.LT", - arm_SMLABT_GT: "SMLABT.GT", - arm_SMLABT_LE: "SMLABT.LE", - arm_SMLABT: "SMLABT", - arm_SMLABT_ZZ: "SMLABT.ZZ", - arm_SMLATB_EQ: "SMLATB.EQ", - arm_SMLATB_NE: "SMLATB.NE", - arm_SMLATB_CS: "SMLATB.CS", - arm_SMLATB_CC: "SMLATB.CC", - arm_SMLATB_MI: "SMLATB.MI", - arm_SMLATB_PL: "SMLATB.PL", - arm_SMLATB_VS: "SMLATB.VS", - arm_SMLATB_VC: "SMLATB.VC", - arm_SMLATB_HI: "SMLATB.HI", - arm_SMLATB_LS: "SMLATB.LS", - arm_SMLATB_GE: "SMLATB.GE", - arm_SMLATB_LT: "SMLATB.LT", - arm_SMLATB_GT: "SMLATB.GT", - arm_SMLATB_LE: "SMLATB.LE", - arm_SMLATB: "SMLATB", - arm_SMLATB_ZZ: "SMLATB.ZZ", - arm_SMLATT_EQ: "SMLATT.EQ", - arm_SMLATT_NE: "SMLATT.NE", - arm_SMLATT_CS: "SMLATT.CS", - arm_SMLATT_CC: "SMLATT.CC", - arm_SMLATT_MI: "SMLATT.MI", - arm_SMLATT_PL: "SMLATT.PL", - arm_SMLATT_VS: "SMLATT.VS", - arm_SMLATT_VC: "SMLATT.VC", - arm_SMLATT_HI: "SMLATT.HI", - arm_SMLATT_LS: "SMLATT.LS", - arm_SMLATT_GE: "SMLATT.GE", - arm_SMLATT_LT: "SMLATT.LT", - arm_SMLATT_GT: "SMLATT.GT", - arm_SMLATT_LE: "SMLATT.LE", - arm_SMLATT: "SMLATT", - arm_SMLATT_ZZ: "SMLATT.ZZ", - arm_SMLAD_EQ: "SMLAD.EQ", - arm_SMLAD_NE: "SMLAD.NE", - arm_SMLAD_CS: "SMLAD.CS", - arm_SMLAD_CC: "SMLAD.CC", - arm_SMLAD_MI: "SMLAD.MI", - arm_SMLAD_PL: "SMLAD.PL", - arm_SMLAD_VS: "SMLAD.VS", - arm_SMLAD_VC: "SMLAD.VC", - arm_SMLAD_HI: "SMLAD.HI", - arm_SMLAD_LS: "SMLAD.LS", - arm_SMLAD_GE: "SMLAD.GE", - arm_SMLAD_LT: "SMLAD.LT", - arm_SMLAD_GT: "SMLAD.GT", - arm_SMLAD_LE: "SMLAD.LE", - arm_SMLAD: "SMLAD", - arm_SMLAD_ZZ: "SMLAD.ZZ", - arm_SMLAD_X_EQ: "SMLAD.X.EQ", - arm_SMLAD_X_NE: "SMLAD.X.NE", - arm_SMLAD_X_CS: "SMLAD.X.CS", - arm_SMLAD_X_CC: "SMLAD.X.CC", - arm_SMLAD_X_MI: "SMLAD.X.MI", - arm_SMLAD_X_PL: "SMLAD.X.PL", - arm_SMLAD_X_VS: "SMLAD.X.VS", - arm_SMLAD_X_VC: "SMLAD.X.VC", - arm_SMLAD_X_HI: "SMLAD.X.HI", - arm_SMLAD_X_LS: "SMLAD.X.LS", - arm_SMLAD_X_GE: "SMLAD.X.GE", - arm_SMLAD_X_LT: "SMLAD.X.LT", - arm_SMLAD_X_GT: "SMLAD.X.GT", - arm_SMLAD_X_LE: "SMLAD.X.LE", - arm_SMLAD_X: "SMLAD.X", - arm_SMLAD_X_ZZ: "SMLAD.X.ZZ", - arm_SMLAL_EQ: "SMLAL.EQ", - arm_SMLAL_NE: "SMLAL.NE", - arm_SMLAL_CS: "SMLAL.CS", - arm_SMLAL_CC: "SMLAL.CC", - arm_SMLAL_MI: "SMLAL.MI", - arm_SMLAL_PL: "SMLAL.PL", - arm_SMLAL_VS: "SMLAL.VS", - arm_SMLAL_VC: "SMLAL.VC", - arm_SMLAL_HI: "SMLAL.HI", - arm_SMLAL_LS: "SMLAL.LS", - arm_SMLAL_GE: "SMLAL.GE", - arm_SMLAL_LT: "SMLAL.LT", - arm_SMLAL_GT: "SMLAL.GT", - arm_SMLAL_LE: "SMLAL.LE", - arm_SMLAL: "SMLAL", - arm_SMLAL_ZZ: "SMLAL.ZZ", - arm_SMLAL_S_EQ: "SMLAL.S.EQ", - arm_SMLAL_S_NE: "SMLAL.S.NE", - arm_SMLAL_S_CS: "SMLAL.S.CS", - arm_SMLAL_S_CC: "SMLAL.S.CC", - arm_SMLAL_S_MI: "SMLAL.S.MI", - arm_SMLAL_S_PL: "SMLAL.S.PL", - arm_SMLAL_S_VS: "SMLAL.S.VS", - arm_SMLAL_S_VC: "SMLAL.S.VC", - arm_SMLAL_S_HI: "SMLAL.S.HI", - arm_SMLAL_S_LS: "SMLAL.S.LS", - arm_SMLAL_S_GE: "SMLAL.S.GE", - arm_SMLAL_S_LT: "SMLAL.S.LT", - arm_SMLAL_S_GT: "SMLAL.S.GT", - arm_SMLAL_S_LE: "SMLAL.S.LE", - arm_SMLAL_S: "SMLAL.S", - arm_SMLAL_S_ZZ: "SMLAL.S.ZZ", - arm_SMLALBB_EQ: "SMLALBB.EQ", - arm_SMLALBB_NE: "SMLALBB.NE", - arm_SMLALBB_CS: "SMLALBB.CS", - arm_SMLALBB_CC: "SMLALBB.CC", - arm_SMLALBB_MI: "SMLALBB.MI", - arm_SMLALBB_PL: "SMLALBB.PL", - arm_SMLALBB_VS: "SMLALBB.VS", - arm_SMLALBB_VC: "SMLALBB.VC", - arm_SMLALBB_HI: "SMLALBB.HI", - arm_SMLALBB_LS: "SMLALBB.LS", - arm_SMLALBB_GE: "SMLALBB.GE", - arm_SMLALBB_LT: "SMLALBB.LT", - arm_SMLALBB_GT: "SMLALBB.GT", - arm_SMLALBB_LE: "SMLALBB.LE", - arm_SMLALBB: "SMLALBB", - arm_SMLALBB_ZZ: "SMLALBB.ZZ", - arm_SMLALBT_EQ: "SMLALBT.EQ", - arm_SMLALBT_NE: "SMLALBT.NE", - arm_SMLALBT_CS: "SMLALBT.CS", - arm_SMLALBT_CC: "SMLALBT.CC", - arm_SMLALBT_MI: "SMLALBT.MI", - arm_SMLALBT_PL: "SMLALBT.PL", - arm_SMLALBT_VS: "SMLALBT.VS", - arm_SMLALBT_VC: "SMLALBT.VC", - arm_SMLALBT_HI: "SMLALBT.HI", - arm_SMLALBT_LS: "SMLALBT.LS", - arm_SMLALBT_GE: "SMLALBT.GE", - arm_SMLALBT_LT: "SMLALBT.LT", - arm_SMLALBT_GT: "SMLALBT.GT", - arm_SMLALBT_LE: "SMLALBT.LE", - arm_SMLALBT: "SMLALBT", - arm_SMLALBT_ZZ: "SMLALBT.ZZ", - arm_SMLALTB_EQ: "SMLALTB.EQ", - arm_SMLALTB_NE: "SMLALTB.NE", - arm_SMLALTB_CS: "SMLALTB.CS", - arm_SMLALTB_CC: "SMLALTB.CC", - arm_SMLALTB_MI: "SMLALTB.MI", - arm_SMLALTB_PL: "SMLALTB.PL", - arm_SMLALTB_VS: "SMLALTB.VS", - arm_SMLALTB_VC: "SMLALTB.VC", - arm_SMLALTB_HI: "SMLALTB.HI", - arm_SMLALTB_LS: "SMLALTB.LS", - arm_SMLALTB_GE: "SMLALTB.GE", - arm_SMLALTB_LT: "SMLALTB.LT", - arm_SMLALTB_GT: "SMLALTB.GT", - arm_SMLALTB_LE: "SMLALTB.LE", - arm_SMLALTB: "SMLALTB", - arm_SMLALTB_ZZ: "SMLALTB.ZZ", - arm_SMLALTT_EQ: "SMLALTT.EQ", - arm_SMLALTT_NE: "SMLALTT.NE", - arm_SMLALTT_CS: "SMLALTT.CS", - arm_SMLALTT_CC: "SMLALTT.CC", - arm_SMLALTT_MI: "SMLALTT.MI", - arm_SMLALTT_PL: "SMLALTT.PL", - arm_SMLALTT_VS: "SMLALTT.VS", - arm_SMLALTT_VC: "SMLALTT.VC", - arm_SMLALTT_HI: "SMLALTT.HI", - arm_SMLALTT_LS: "SMLALTT.LS", - arm_SMLALTT_GE: "SMLALTT.GE", - arm_SMLALTT_LT: "SMLALTT.LT", - arm_SMLALTT_GT: "SMLALTT.GT", - arm_SMLALTT_LE: "SMLALTT.LE", - arm_SMLALTT: "SMLALTT", - arm_SMLALTT_ZZ: "SMLALTT.ZZ", - arm_SMLALD_EQ: "SMLALD.EQ", - arm_SMLALD_NE: "SMLALD.NE", - arm_SMLALD_CS: "SMLALD.CS", - arm_SMLALD_CC: "SMLALD.CC", - arm_SMLALD_MI: "SMLALD.MI", - arm_SMLALD_PL: "SMLALD.PL", - arm_SMLALD_VS: "SMLALD.VS", - arm_SMLALD_VC: "SMLALD.VC", - arm_SMLALD_HI: "SMLALD.HI", - arm_SMLALD_LS: "SMLALD.LS", - arm_SMLALD_GE: "SMLALD.GE", - arm_SMLALD_LT: "SMLALD.LT", - arm_SMLALD_GT: "SMLALD.GT", - arm_SMLALD_LE: "SMLALD.LE", - arm_SMLALD: "SMLALD", - arm_SMLALD_ZZ: "SMLALD.ZZ", - arm_SMLALD_X_EQ: "SMLALD.X.EQ", - arm_SMLALD_X_NE: "SMLALD.X.NE", - arm_SMLALD_X_CS: "SMLALD.X.CS", - arm_SMLALD_X_CC: "SMLALD.X.CC", - arm_SMLALD_X_MI: "SMLALD.X.MI", - arm_SMLALD_X_PL: "SMLALD.X.PL", - arm_SMLALD_X_VS: "SMLALD.X.VS", - arm_SMLALD_X_VC: "SMLALD.X.VC", - arm_SMLALD_X_HI: "SMLALD.X.HI", - arm_SMLALD_X_LS: "SMLALD.X.LS", - arm_SMLALD_X_GE: "SMLALD.X.GE", - arm_SMLALD_X_LT: "SMLALD.X.LT", - arm_SMLALD_X_GT: "SMLALD.X.GT", - arm_SMLALD_X_LE: "SMLALD.X.LE", - arm_SMLALD_X: "SMLALD.X", - arm_SMLALD_X_ZZ: "SMLALD.X.ZZ", - arm_SMLAWB_EQ: "SMLAWB.EQ", - arm_SMLAWB_NE: "SMLAWB.NE", - arm_SMLAWB_CS: "SMLAWB.CS", - arm_SMLAWB_CC: "SMLAWB.CC", - arm_SMLAWB_MI: "SMLAWB.MI", - arm_SMLAWB_PL: "SMLAWB.PL", - arm_SMLAWB_VS: "SMLAWB.VS", - arm_SMLAWB_VC: "SMLAWB.VC", - arm_SMLAWB_HI: "SMLAWB.HI", - arm_SMLAWB_LS: "SMLAWB.LS", - arm_SMLAWB_GE: "SMLAWB.GE", - arm_SMLAWB_LT: "SMLAWB.LT", - arm_SMLAWB_GT: "SMLAWB.GT", - arm_SMLAWB_LE: "SMLAWB.LE", - arm_SMLAWB: "SMLAWB", - arm_SMLAWB_ZZ: "SMLAWB.ZZ", - arm_SMLAWT_EQ: "SMLAWT.EQ", - arm_SMLAWT_NE: "SMLAWT.NE", - arm_SMLAWT_CS: "SMLAWT.CS", - arm_SMLAWT_CC: "SMLAWT.CC", - arm_SMLAWT_MI: "SMLAWT.MI", - arm_SMLAWT_PL: "SMLAWT.PL", - arm_SMLAWT_VS: "SMLAWT.VS", - arm_SMLAWT_VC: "SMLAWT.VC", - arm_SMLAWT_HI: "SMLAWT.HI", - arm_SMLAWT_LS: "SMLAWT.LS", - arm_SMLAWT_GE: "SMLAWT.GE", - arm_SMLAWT_LT: "SMLAWT.LT", - arm_SMLAWT_GT: "SMLAWT.GT", - arm_SMLAWT_LE: "SMLAWT.LE", - arm_SMLAWT: "SMLAWT", - arm_SMLAWT_ZZ: "SMLAWT.ZZ", - arm_SMLSD_EQ: "SMLSD.EQ", - arm_SMLSD_NE: "SMLSD.NE", - arm_SMLSD_CS: "SMLSD.CS", - arm_SMLSD_CC: "SMLSD.CC", - arm_SMLSD_MI: "SMLSD.MI", - arm_SMLSD_PL: "SMLSD.PL", - arm_SMLSD_VS: "SMLSD.VS", - arm_SMLSD_VC: "SMLSD.VC", - arm_SMLSD_HI: "SMLSD.HI", - arm_SMLSD_LS: "SMLSD.LS", - arm_SMLSD_GE: "SMLSD.GE", - arm_SMLSD_LT: "SMLSD.LT", - arm_SMLSD_GT: "SMLSD.GT", - arm_SMLSD_LE: "SMLSD.LE", - arm_SMLSD: "SMLSD", - arm_SMLSD_ZZ: "SMLSD.ZZ", - arm_SMLSD_X_EQ: "SMLSD.X.EQ", - arm_SMLSD_X_NE: "SMLSD.X.NE", - arm_SMLSD_X_CS: "SMLSD.X.CS", - arm_SMLSD_X_CC: "SMLSD.X.CC", - arm_SMLSD_X_MI: "SMLSD.X.MI", - arm_SMLSD_X_PL: "SMLSD.X.PL", - arm_SMLSD_X_VS: "SMLSD.X.VS", - arm_SMLSD_X_VC: "SMLSD.X.VC", - arm_SMLSD_X_HI: "SMLSD.X.HI", - arm_SMLSD_X_LS: "SMLSD.X.LS", - arm_SMLSD_X_GE: "SMLSD.X.GE", - arm_SMLSD_X_LT: "SMLSD.X.LT", - arm_SMLSD_X_GT: "SMLSD.X.GT", - arm_SMLSD_X_LE: "SMLSD.X.LE", - arm_SMLSD_X: "SMLSD.X", - arm_SMLSD_X_ZZ: "SMLSD.X.ZZ", - arm_SMLSLD_EQ: "SMLSLD.EQ", - arm_SMLSLD_NE: "SMLSLD.NE", - arm_SMLSLD_CS: "SMLSLD.CS", - arm_SMLSLD_CC: "SMLSLD.CC", - arm_SMLSLD_MI: "SMLSLD.MI", - arm_SMLSLD_PL: "SMLSLD.PL", - arm_SMLSLD_VS: "SMLSLD.VS", - arm_SMLSLD_VC: "SMLSLD.VC", - arm_SMLSLD_HI: "SMLSLD.HI", - arm_SMLSLD_LS: "SMLSLD.LS", - arm_SMLSLD_GE: "SMLSLD.GE", - arm_SMLSLD_LT: "SMLSLD.LT", - arm_SMLSLD_GT: "SMLSLD.GT", - arm_SMLSLD_LE: "SMLSLD.LE", - arm_SMLSLD: "SMLSLD", - arm_SMLSLD_ZZ: "SMLSLD.ZZ", - arm_SMLSLD_X_EQ: "SMLSLD.X.EQ", - arm_SMLSLD_X_NE: "SMLSLD.X.NE", - arm_SMLSLD_X_CS: "SMLSLD.X.CS", - arm_SMLSLD_X_CC: "SMLSLD.X.CC", - arm_SMLSLD_X_MI: "SMLSLD.X.MI", - arm_SMLSLD_X_PL: "SMLSLD.X.PL", - arm_SMLSLD_X_VS: "SMLSLD.X.VS", - arm_SMLSLD_X_VC: "SMLSLD.X.VC", - arm_SMLSLD_X_HI: "SMLSLD.X.HI", - arm_SMLSLD_X_LS: "SMLSLD.X.LS", - arm_SMLSLD_X_GE: "SMLSLD.X.GE", - arm_SMLSLD_X_LT: "SMLSLD.X.LT", - arm_SMLSLD_X_GT: "SMLSLD.X.GT", - arm_SMLSLD_X_LE: "SMLSLD.X.LE", - arm_SMLSLD_X: "SMLSLD.X", - arm_SMLSLD_X_ZZ: "SMLSLD.X.ZZ", - arm_SMMLA_EQ: "SMMLA.EQ", - arm_SMMLA_NE: "SMMLA.NE", - arm_SMMLA_CS: "SMMLA.CS", - arm_SMMLA_CC: "SMMLA.CC", - arm_SMMLA_MI: "SMMLA.MI", - arm_SMMLA_PL: "SMMLA.PL", - arm_SMMLA_VS: "SMMLA.VS", - arm_SMMLA_VC: "SMMLA.VC", - arm_SMMLA_HI: "SMMLA.HI", - arm_SMMLA_LS: "SMMLA.LS", - arm_SMMLA_GE: "SMMLA.GE", - arm_SMMLA_LT: "SMMLA.LT", - arm_SMMLA_GT: "SMMLA.GT", - arm_SMMLA_LE: "SMMLA.LE", - arm_SMMLA: "SMMLA", - arm_SMMLA_ZZ: "SMMLA.ZZ", - arm_SMMLA_R_EQ: "SMMLA.R.EQ", - arm_SMMLA_R_NE: "SMMLA.R.NE", - arm_SMMLA_R_CS: "SMMLA.R.CS", - arm_SMMLA_R_CC: "SMMLA.R.CC", - arm_SMMLA_R_MI: "SMMLA.R.MI", - arm_SMMLA_R_PL: "SMMLA.R.PL", - arm_SMMLA_R_VS: "SMMLA.R.VS", - arm_SMMLA_R_VC: "SMMLA.R.VC", - arm_SMMLA_R_HI: "SMMLA.R.HI", - arm_SMMLA_R_LS: "SMMLA.R.LS", - arm_SMMLA_R_GE: "SMMLA.R.GE", - arm_SMMLA_R_LT: "SMMLA.R.LT", - arm_SMMLA_R_GT: "SMMLA.R.GT", - arm_SMMLA_R_LE: "SMMLA.R.LE", - arm_SMMLA_R: "SMMLA.R", - arm_SMMLA_R_ZZ: "SMMLA.R.ZZ", - arm_SMMLS_EQ: "SMMLS.EQ", - arm_SMMLS_NE: "SMMLS.NE", - arm_SMMLS_CS: "SMMLS.CS", - arm_SMMLS_CC: "SMMLS.CC", - arm_SMMLS_MI: "SMMLS.MI", - arm_SMMLS_PL: "SMMLS.PL", - arm_SMMLS_VS: "SMMLS.VS", - arm_SMMLS_VC: "SMMLS.VC", - arm_SMMLS_HI: "SMMLS.HI", - arm_SMMLS_LS: "SMMLS.LS", - arm_SMMLS_GE: "SMMLS.GE", - arm_SMMLS_LT: "SMMLS.LT", - arm_SMMLS_GT: "SMMLS.GT", - arm_SMMLS_LE: "SMMLS.LE", - arm_SMMLS: "SMMLS", - arm_SMMLS_ZZ: "SMMLS.ZZ", - arm_SMMLS_R_EQ: "SMMLS.R.EQ", - arm_SMMLS_R_NE: "SMMLS.R.NE", - arm_SMMLS_R_CS: "SMMLS.R.CS", - arm_SMMLS_R_CC: "SMMLS.R.CC", - arm_SMMLS_R_MI: "SMMLS.R.MI", - arm_SMMLS_R_PL: "SMMLS.R.PL", - arm_SMMLS_R_VS: "SMMLS.R.VS", - arm_SMMLS_R_VC: "SMMLS.R.VC", - arm_SMMLS_R_HI: "SMMLS.R.HI", - arm_SMMLS_R_LS: "SMMLS.R.LS", - arm_SMMLS_R_GE: "SMMLS.R.GE", - arm_SMMLS_R_LT: "SMMLS.R.LT", - arm_SMMLS_R_GT: "SMMLS.R.GT", - arm_SMMLS_R_LE: "SMMLS.R.LE", - arm_SMMLS_R: "SMMLS.R", - arm_SMMLS_R_ZZ: "SMMLS.R.ZZ", - arm_SMMUL_EQ: "SMMUL.EQ", - arm_SMMUL_NE: "SMMUL.NE", - arm_SMMUL_CS: "SMMUL.CS", - arm_SMMUL_CC: "SMMUL.CC", - arm_SMMUL_MI: "SMMUL.MI", - arm_SMMUL_PL: "SMMUL.PL", - arm_SMMUL_VS: "SMMUL.VS", - arm_SMMUL_VC: "SMMUL.VC", - arm_SMMUL_HI: "SMMUL.HI", - arm_SMMUL_LS: "SMMUL.LS", - arm_SMMUL_GE: "SMMUL.GE", - arm_SMMUL_LT: "SMMUL.LT", - arm_SMMUL_GT: "SMMUL.GT", - arm_SMMUL_LE: "SMMUL.LE", - arm_SMMUL: "SMMUL", - arm_SMMUL_ZZ: "SMMUL.ZZ", - arm_SMMUL_R_EQ: "SMMUL.R.EQ", - arm_SMMUL_R_NE: "SMMUL.R.NE", - arm_SMMUL_R_CS: "SMMUL.R.CS", - arm_SMMUL_R_CC: "SMMUL.R.CC", - arm_SMMUL_R_MI: "SMMUL.R.MI", - arm_SMMUL_R_PL: "SMMUL.R.PL", - arm_SMMUL_R_VS: "SMMUL.R.VS", - arm_SMMUL_R_VC: "SMMUL.R.VC", - arm_SMMUL_R_HI: "SMMUL.R.HI", - arm_SMMUL_R_LS: "SMMUL.R.LS", - arm_SMMUL_R_GE: "SMMUL.R.GE", - arm_SMMUL_R_LT: "SMMUL.R.LT", - arm_SMMUL_R_GT: "SMMUL.R.GT", - arm_SMMUL_R_LE: "SMMUL.R.LE", - arm_SMMUL_R: "SMMUL.R", - arm_SMMUL_R_ZZ: "SMMUL.R.ZZ", - arm_SMUAD_EQ: "SMUAD.EQ", - arm_SMUAD_NE: "SMUAD.NE", - arm_SMUAD_CS: "SMUAD.CS", - arm_SMUAD_CC: "SMUAD.CC", - arm_SMUAD_MI: "SMUAD.MI", - arm_SMUAD_PL: "SMUAD.PL", - arm_SMUAD_VS: "SMUAD.VS", - arm_SMUAD_VC: "SMUAD.VC", - arm_SMUAD_HI: "SMUAD.HI", - arm_SMUAD_LS: "SMUAD.LS", - arm_SMUAD_GE: "SMUAD.GE", - arm_SMUAD_LT: "SMUAD.LT", - arm_SMUAD_GT: "SMUAD.GT", - arm_SMUAD_LE: "SMUAD.LE", - arm_SMUAD: "SMUAD", - arm_SMUAD_ZZ: "SMUAD.ZZ", - arm_SMUAD_X_EQ: "SMUAD.X.EQ", - arm_SMUAD_X_NE: "SMUAD.X.NE", - arm_SMUAD_X_CS: "SMUAD.X.CS", - arm_SMUAD_X_CC: "SMUAD.X.CC", - arm_SMUAD_X_MI: "SMUAD.X.MI", - arm_SMUAD_X_PL: "SMUAD.X.PL", - arm_SMUAD_X_VS: "SMUAD.X.VS", - arm_SMUAD_X_VC: "SMUAD.X.VC", - arm_SMUAD_X_HI: "SMUAD.X.HI", - arm_SMUAD_X_LS: "SMUAD.X.LS", - arm_SMUAD_X_GE: "SMUAD.X.GE", - arm_SMUAD_X_LT: "SMUAD.X.LT", - arm_SMUAD_X_GT: "SMUAD.X.GT", - arm_SMUAD_X_LE: "SMUAD.X.LE", - arm_SMUAD_X: "SMUAD.X", - arm_SMUAD_X_ZZ: "SMUAD.X.ZZ", - arm_SMULBB_EQ: "SMULBB.EQ", - arm_SMULBB_NE: "SMULBB.NE", - arm_SMULBB_CS: "SMULBB.CS", - arm_SMULBB_CC: "SMULBB.CC", - arm_SMULBB_MI: "SMULBB.MI", - arm_SMULBB_PL: "SMULBB.PL", - arm_SMULBB_VS: "SMULBB.VS", - arm_SMULBB_VC: "SMULBB.VC", - arm_SMULBB_HI: "SMULBB.HI", - arm_SMULBB_LS: "SMULBB.LS", - arm_SMULBB_GE: "SMULBB.GE", - arm_SMULBB_LT: "SMULBB.LT", - arm_SMULBB_GT: "SMULBB.GT", - arm_SMULBB_LE: "SMULBB.LE", - arm_SMULBB: "SMULBB", - arm_SMULBB_ZZ: "SMULBB.ZZ", - arm_SMULBT_EQ: "SMULBT.EQ", - arm_SMULBT_NE: "SMULBT.NE", - arm_SMULBT_CS: "SMULBT.CS", - arm_SMULBT_CC: "SMULBT.CC", - arm_SMULBT_MI: "SMULBT.MI", - arm_SMULBT_PL: "SMULBT.PL", - arm_SMULBT_VS: "SMULBT.VS", - arm_SMULBT_VC: "SMULBT.VC", - arm_SMULBT_HI: "SMULBT.HI", - arm_SMULBT_LS: "SMULBT.LS", - arm_SMULBT_GE: "SMULBT.GE", - arm_SMULBT_LT: "SMULBT.LT", - arm_SMULBT_GT: "SMULBT.GT", - arm_SMULBT_LE: "SMULBT.LE", - arm_SMULBT: "SMULBT", - arm_SMULBT_ZZ: "SMULBT.ZZ", - arm_SMULTB_EQ: "SMULTB.EQ", - arm_SMULTB_NE: "SMULTB.NE", - arm_SMULTB_CS: "SMULTB.CS", - arm_SMULTB_CC: "SMULTB.CC", - arm_SMULTB_MI: "SMULTB.MI", - arm_SMULTB_PL: "SMULTB.PL", - arm_SMULTB_VS: "SMULTB.VS", - arm_SMULTB_VC: "SMULTB.VC", - arm_SMULTB_HI: "SMULTB.HI", - arm_SMULTB_LS: "SMULTB.LS", - arm_SMULTB_GE: "SMULTB.GE", - arm_SMULTB_LT: "SMULTB.LT", - arm_SMULTB_GT: "SMULTB.GT", - arm_SMULTB_LE: "SMULTB.LE", - arm_SMULTB: "SMULTB", - arm_SMULTB_ZZ: "SMULTB.ZZ", - arm_SMULTT_EQ: "SMULTT.EQ", - arm_SMULTT_NE: "SMULTT.NE", - arm_SMULTT_CS: "SMULTT.CS", - arm_SMULTT_CC: "SMULTT.CC", - arm_SMULTT_MI: "SMULTT.MI", - arm_SMULTT_PL: "SMULTT.PL", - arm_SMULTT_VS: "SMULTT.VS", - arm_SMULTT_VC: "SMULTT.VC", - arm_SMULTT_HI: "SMULTT.HI", - arm_SMULTT_LS: "SMULTT.LS", - arm_SMULTT_GE: "SMULTT.GE", - arm_SMULTT_LT: "SMULTT.LT", - arm_SMULTT_GT: "SMULTT.GT", - arm_SMULTT_LE: "SMULTT.LE", - arm_SMULTT: "SMULTT", - arm_SMULTT_ZZ: "SMULTT.ZZ", - arm_SMULL_EQ: "SMULL.EQ", - arm_SMULL_NE: "SMULL.NE", - arm_SMULL_CS: "SMULL.CS", - arm_SMULL_CC: "SMULL.CC", - arm_SMULL_MI: "SMULL.MI", - arm_SMULL_PL: "SMULL.PL", - arm_SMULL_VS: "SMULL.VS", - arm_SMULL_VC: "SMULL.VC", - arm_SMULL_HI: "SMULL.HI", - arm_SMULL_LS: "SMULL.LS", - arm_SMULL_GE: "SMULL.GE", - arm_SMULL_LT: "SMULL.LT", - arm_SMULL_GT: "SMULL.GT", - arm_SMULL_LE: "SMULL.LE", - arm_SMULL: "SMULL", - arm_SMULL_ZZ: "SMULL.ZZ", - arm_SMULL_S_EQ: "SMULL.S.EQ", - arm_SMULL_S_NE: "SMULL.S.NE", - arm_SMULL_S_CS: "SMULL.S.CS", - arm_SMULL_S_CC: "SMULL.S.CC", - arm_SMULL_S_MI: "SMULL.S.MI", - arm_SMULL_S_PL: "SMULL.S.PL", - arm_SMULL_S_VS: "SMULL.S.VS", - arm_SMULL_S_VC: "SMULL.S.VC", - arm_SMULL_S_HI: "SMULL.S.HI", - arm_SMULL_S_LS: "SMULL.S.LS", - arm_SMULL_S_GE: "SMULL.S.GE", - arm_SMULL_S_LT: "SMULL.S.LT", - arm_SMULL_S_GT: "SMULL.S.GT", - arm_SMULL_S_LE: "SMULL.S.LE", - arm_SMULL_S: "SMULL.S", - arm_SMULL_S_ZZ: "SMULL.S.ZZ", - arm_SMULWB_EQ: "SMULWB.EQ", - arm_SMULWB_NE: "SMULWB.NE", - arm_SMULWB_CS: "SMULWB.CS", - arm_SMULWB_CC: "SMULWB.CC", - arm_SMULWB_MI: "SMULWB.MI", - arm_SMULWB_PL: "SMULWB.PL", - arm_SMULWB_VS: "SMULWB.VS", - arm_SMULWB_VC: "SMULWB.VC", - arm_SMULWB_HI: "SMULWB.HI", - arm_SMULWB_LS: "SMULWB.LS", - arm_SMULWB_GE: "SMULWB.GE", - arm_SMULWB_LT: "SMULWB.LT", - arm_SMULWB_GT: "SMULWB.GT", - arm_SMULWB_LE: "SMULWB.LE", - arm_SMULWB: "SMULWB", - arm_SMULWB_ZZ: "SMULWB.ZZ", - arm_SMULWT_EQ: "SMULWT.EQ", - arm_SMULWT_NE: "SMULWT.NE", - arm_SMULWT_CS: "SMULWT.CS", - arm_SMULWT_CC: "SMULWT.CC", - arm_SMULWT_MI: "SMULWT.MI", - arm_SMULWT_PL: "SMULWT.PL", - arm_SMULWT_VS: "SMULWT.VS", - arm_SMULWT_VC: "SMULWT.VC", - arm_SMULWT_HI: "SMULWT.HI", - arm_SMULWT_LS: "SMULWT.LS", - arm_SMULWT_GE: "SMULWT.GE", - arm_SMULWT_LT: "SMULWT.LT", - arm_SMULWT_GT: "SMULWT.GT", - arm_SMULWT_LE: "SMULWT.LE", - arm_SMULWT: "SMULWT", - arm_SMULWT_ZZ: "SMULWT.ZZ", - arm_SMUSD_EQ: "SMUSD.EQ", - arm_SMUSD_NE: "SMUSD.NE", - arm_SMUSD_CS: "SMUSD.CS", - arm_SMUSD_CC: "SMUSD.CC", - arm_SMUSD_MI: "SMUSD.MI", - arm_SMUSD_PL: "SMUSD.PL", - arm_SMUSD_VS: "SMUSD.VS", - arm_SMUSD_VC: "SMUSD.VC", - arm_SMUSD_HI: "SMUSD.HI", - arm_SMUSD_LS: "SMUSD.LS", - arm_SMUSD_GE: "SMUSD.GE", - arm_SMUSD_LT: "SMUSD.LT", - arm_SMUSD_GT: "SMUSD.GT", - arm_SMUSD_LE: "SMUSD.LE", - arm_SMUSD: "SMUSD", - arm_SMUSD_ZZ: "SMUSD.ZZ", - arm_SMUSD_X_EQ: "SMUSD.X.EQ", - arm_SMUSD_X_NE: "SMUSD.X.NE", - arm_SMUSD_X_CS: "SMUSD.X.CS", - arm_SMUSD_X_CC: "SMUSD.X.CC", - arm_SMUSD_X_MI: "SMUSD.X.MI", - arm_SMUSD_X_PL: "SMUSD.X.PL", - arm_SMUSD_X_VS: "SMUSD.X.VS", - arm_SMUSD_X_VC: "SMUSD.X.VC", - arm_SMUSD_X_HI: "SMUSD.X.HI", - arm_SMUSD_X_LS: "SMUSD.X.LS", - arm_SMUSD_X_GE: "SMUSD.X.GE", - arm_SMUSD_X_LT: "SMUSD.X.LT", - arm_SMUSD_X_GT: "SMUSD.X.GT", - arm_SMUSD_X_LE: "SMUSD.X.LE", - arm_SMUSD_X: "SMUSD.X", - arm_SMUSD_X_ZZ: "SMUSD.X.ZZ", - arm_SSAT_EQ: "SSAT.EQ", - arm_SSAT_NE: "SSAT.NE", - arm_SSAT_CS: "SSAT.CS", - arm_SSAT_CC: "SSAT.CC", - arm_SSAT_MI: "SSAT.MI", - arm_SSAT_PL: "SSAT.PL", - arm_SSAT_VS: "SSAT.VS", - arm_SSAT_VC: "SSAT.VC", - arm_SSAT_HI: "SSAT.HI", - arm_SSAT_LS: "SSAT.LS", - arm_SSAT_GE: "SSAT.GE", - arm_SSAT_LT: "SSAT.LT", - arm_SSAT_GT: "SSAT.GT", - arm_SSAT_LE: "SSAT.LE", - arm_SSAT: "SSAT", - arm_SSAT_ZZ: "SSAT.ZZ", - arm_SSAT16_EQ: "SSAT16.EQ", - arm_SSAT16_NE: "SSAT16.NE", - arm_SSAT16_CS: "SSAT16.CS", - arm_SSAT16_CC: "SSAT16.CC", - arm_SSAT16_MI: "SSAT16.MI", - arm_SSAT16_PL: "SSAT16.PL", - arm_SSAT16_VS: "SSAT16.VS", - arm_SSAT16_VC: "SSAT16.VC", - arm_SSAT16_HI: "SSAT16.HI", - arm_SSAT16_LS: "SSAT16.LS", - arm_SSAT16_GE: "SSAT16.GE", - arm_SSAT16_LT: "SSAT16.LT", - arm_SSAT16_GT: "SSAT16.GT", - arm_SSAT16_LE: "SSAT16.LE", - arm_SSAT16: "SSAT16", - arm_SSAT16_ZZ: "SSAT16.ZZ", - arm_SSAX_EQ: "SSAX.EQ", - arm_SSAX_NE: "SSAX.NE", - arm_SSAX_CS: "SSAX.CS", - arm_SSAX_CC: "SSAX.CC", - arm_SSAX_MI: "SSAX.MI", - arm_SSAX_PL: "SSAX.PL", - arm_SSAX_VS: "SSAX.VS", - arm_SSAX_VC: "SSAX.VC", - arm_SSAX_HI: "SSAX.HI", - arm_SSAX_LS: "SSAX.LS", - arm_SSAX_GE: "SSAX.GE", - arm_SSAX_LT: "SSAX.LT", - arm_SSAX_GT: "SSAX.GT", - arm_SSAX_LE: "SSAX.LE", - arm_SSAX: "SSAX", - arm_SSAX_ZZ: "SSAX.ZZ", - arm_SSUB16_EQ: "SSUB16.EQ", - arm_SSUB16_NE: "SSUB16.NE", - arm_SSUB16_CS: "SSUB16.CS", - arm_SSUB16_CC: "SSUB16.CC", - arm_SSUB16_MI: "SSUB16.MI", - arm_SSUB16_PL: "SSUB16.PL", - arm_SSUB16_VS: "SSUB16.VS", - arm_SSUB16_VC: "SSUB16.VC", - arm_SSUB16_HI: "SSUB16.HI", - arm_SSUB16_LS: "SSUB16.LS", - arm_SSUB16_GE: "SSUB16.GE", - arm_SSUB16_LT: "SSUB16.LT", - arm_SSUB16_GT: "SSUB16.GT", - arm_SSUB16_LE: "SSUB16.LE", - arm_SSUB16: "SSUB16", - arm_SSUB16_ZZ: "SSUB16.ZZ", - arm_SSUB8_EQ: "SSUB8.EQ", - arm_SSUB8_NE: "SSUB8.NE", - arm_SSUB8_CS: "SSUB8.CS", - arm_SSUB8_CC: "SSUB8.CC", - arm_SSUB8_MI: "SSUB8.MI", - arm_SSUB8_PL: "SSUB8.PL", - arm_SSUB8_VS: "SSUB8.VS", - arm_SSUB8_VC: "SSUB8.VC", - arm_SSUB8_HI: "SSUB8.HI", - arm_SSUB8_LS: "SSUB8.LS", - arm_SSUB8_GE: "SSUB8.GE", - arm_SSUB8_LT: "SSUB8.LT", - arm_SSUB8_GT: "SSUB8.GT", - arm_SSUB8_LE: "SSUB8.LE", - arm_SSUB8: "SSUB8", - arm_SSUB8_ZZ: "SSUB8.ZZ", - arm_STM_EQ: "STM.EQ", - arm_STM_NE: "STM.NE", - arm_STM_CS: "STM.CS", - arm_STM_CC: "STM.CC", - arm_STM_MI: "STM.MI", - arm_STM_PL: "STM.PL", - arm_STM_VS: "STM.VS", - arm_STM_VC: "STM.VC", - arm_STM_HI: "STM.HI", - arm_STM_LS: "STM.LS", - arm_STM_GE: "STM.GE", - arm_STM_LT: "STM.LT", - arm_STM_GT: "STM.GT", - arm_STM_LE: "STM.LE", - arm_STM: "STM", - arm_STM_ZZ: "STM.ZZ", - arm_STMDA_EQ: "STMDA.EQ", - arm_STMDA_NE: "STMDA.NE", - arm_STMDA_CS: "STMDA.CS", - arm_STMDA_CC: "STMDA.CC", - arm_STMDA_MI: "STMDA.MI", - arm_STMDA_PL: "STMDA.PL", - arm_STMDA_VS: "STMDA.VS", - arm_STMDA_VC: "STMDA.VC", - arm_STMDA_HI: "STMDA.HI", - arm_STMDA_LS: "STMDA.LS", - arm_STMDA_GE: "STMDA.GE", - arm_STMDA_LT: "STMDA.LT", - arm_STMDA_GT: "STMDA.GT", - arm_STMDA_LE: "STMDA.LE", - arm_STMDA: "STMDA", - arm_STMDA_ZZ: "STMDA.ZZ", - arm_STMDB_EQ: "STMDB.EQ", - arm_STMDB_NE: "STMDB.NE", - arm_STMDB_CS: "STMDB.CS", - arm_STMDB_CC: "STMDB.CC", - arm_STMDB_MI: "STMDB.MI", - arm_STMDB_PL: "STMDB.PL", - arm_STMDB_VS: "STMDB.VS", - arm_STMDB_VC: "STMDB.VC", - arm_STMDB_HI: "STMDB.HI", - arm_STMDB_LS: "STMDB.LS", - arm_STMDB_GE: "STMDB.GE", - arm_STMDB_LT: "STMDB.LT", - arm_STMDB_GT: "STMDB.GT", - arm_STMDB_LE: "STMDB.LE", - arm_STMDB: "STMDB", - arm_STMDB_ZZ: "STMDB.ZZ", - arm_STMIB_EQ: "STMIB.EQ", - arm_STMIB_NE: "STMIB.NE", - arm_STMIB_CS: "STMIB.CS", - arm_STMIB_CC: "STMIB.CC", - arm_STMIB_MI: "STMIB.MI", - arm_STMIB_PL: "STMIB.PL", - arm_STMIB_VS: "STMIB.VS", - arm_STMIB_VC: "STMIB.VC", - arm_STMIB_HI: "STMIB.HI", - arm_STMIB_LS: "STMIB.LS", - arm_STMIB_GE: "STMIB.GE", - arm_STMIB_LT: "STMIB.LT", - arm_STMIB_GT: "STMIB.GT", - arm_STMIB_LE: "STMIB.LE", - arm_STMIB: "STMIB", - arm_STMIB_ZZ: "STMIB.ZZ", - arm_STR_EQ: "STR.EQ", - arm_STR_NE: "STR.NE", - arm_STR_CS: "STR.CS", - arm_STR_CC: "STR.CC", - arm_STR_MI: "STR.MI", - arm_STR_PL: "STR.PL", - arm_STR_VS: "STR.VS", - arm_STR_VC: "STR.VC", - arm_STR_HI: "STR.HI", - arm_STR_LS: "STR.LS", - arm_STR_GE: "STR.GE", - arm_STR_LT: "STR.LT", - arm_STR_GT: "STR.GT", - arm_STR_LE: "STR.LE", - arm_STR: "STR", - arm_STR_ZZ: "STR.ZZ", - arm_STRB_EQ: "STRB.EQ", - arm_STRB_NE: "STRB.NE", - arm_STRB_CS: "STRB.CS", - arm_STRB_CC: "STRB.CC", - arm_STRB_MI: "STRB.MI", - arm_STRB_PL: "STRB.PL", - arm_STRB_VS: "STRB.VS", - arm_STRB_VC: "STRB.VC", - arm_STRB_HI: "STRB.HI", - arm_STRB_LS: "STRB.LS", - arm_STRB_GE: "STRB.GE", - arm_STRB_LT: "STRB.LT", - arm_STRB_GT: "STRB.GT", - arm_STRB_LE: "STRB.LE", - arm_STRB: "STRB", - arm_STRB_ZZ: "STRB.ZZ", - arm_STRBT_EQ: "STRBT.EQ", - arm_STRBT_NE: "STRBT.NE", - arm_STRBT_CS: "STRBT.CS", - arm_STRBT_CC: "STRBT.CC", - arm_STRBT_MI: "STRBT.MI", - arm_STRBT_PL: "STRBT.PL", - arm_STRBT_VS: "STRBT.VS", - arm_STRBT_VC: "STRBT.VC", - arm_STRBT_HI: "STRBT.HI", - arm_STRBT_LS: "STRBT.LS", - arm_STRBT_GE: "STRBT.GE", - arm_STRBT_LT: "STRBT.LT", - arm_STRBT_GT: "STRBT.GT", - arm_STRBT_LE: "STRBT.LE", - arm_STRBT: "STRBT", - arm_STRBT_ZZ: "STRBT.ZZ", - arm_STRD_EQ: "STRD.EQ", - arm_STRD_NE: "STRD.NE", - arm_STRD_CS: "STRD.CS", - arm_STRD_CC: "STRD.CC", - arm_STRD_MI: "STRD.MI", - arm_STRD_PL: "STRD.PL", - arm_STRD_VS: "STRD.VS", - arm_STRD_VC: "STRD.VC", - arm_STRD_HI: "STRD.HI", - arm_STRD_LS: "STRD.LS", - arm_STRD_GE: "STRD.GE", - arm_STRD_LT: "STRD.LT", - arm_STRD_GT: "STRD.GT", - arm_STRD_LE: "STRD.LE", - arm_STRD: "STRD", - arm_STRD_ZZ: "STRD.ZZ", - arm_STREX_EQ: "STREX.EQ", - arm_STREX_NE: "STREX.NE", - arm_STREX_CS: "STREX.CS", - arm_STREX_CC: "STREX.CC", - arm_STREX_MI: "STREX.MI", - arm_STREX_PL: "STREX.PL", - arm_STREX_VS: "STREX.VS", - arm_STREX_VC: "STREX.VC", - arm_STREX_HI: "STREX.HI", - arm_STREX_LS: "STREX.LS", - arm_STREX_GE: "STREX.GE", - arm_STREX_LT: "STREX.LT", - arm_STREX_GT: "STREX.GT", - arm_STREX_LE: "STREX.LE", - arm_STREX: "STREX", - arm_STREX_ZZ: "STREX.ZZ", - arm_STREXB_EQ: "STREXB.EQ", - arm_STREXB_NE: "STREXB.NE", - arm_STREXB_CS: "STREXB.CS", - arm_STREXB_CC: "STREXB.CC", - arm_STREXB_MI: "STREXB.MI", - arm_STREXB_PL: "STREXB.PL", - arm_STREXB_VS: "STREXB.VS", - arm_STREXB_VC: "STREXB.VC", - arm_STREXB_HI: "STREXB.HI", - arm_STREXB_LS: "STREXB.LS", - arm_STREXB_GE: "STREXB.GE", - arm_STREXB_LT: "STREXB.LT", - arm_STREXB_GT: "STREXB.GT", - arm_STREXB_LE: "STREXB.LE", - arm_STREXB: "STREXB", - arm_STREXB_ZZ: "STREXB.ZZ", - arm_STREXD_EQ: "STREXD.EQ", - arm_STREXD_NE: "STREXD.NE", - arm_STREXD_CS: "STREXD.CS", - arm_STREXD_CC: "STREXD.CC", - arm_STREXD_MI: "STREXD.MI", - arm_STREXD_PL: "STREXD.PL", - arm_STREXD_VS: "STREXD.VS", - arm_STREXD_VC: "STREXD.VC", - arm_STREXD_HI: "STREXD.HI", - arm_STREXD_LS: "STREXD.LS", - arm_STREXD_GE: "STREXD.GE", - arm_STREXD_LT: "STREXD.LT", - arm_STREXD_GT: "STREXD.GT", - arm_STREXD_LE: "STREXD.LE", - arm_STREXD: "STREXD", - arm_STREXD_ZZ: "STREXD.ZZ", - arm_STREXH_EQ: "STREXH.EQ", - arm_STREXH_NE: "STREXH.NE", - arm_STREXH_CS: "STREXH.CS", - arm_STREXH_CC: "STREXH.CC", - arm_STREXH_MI: "STREXH.MI", - arm_STREXH_PL: "STREXH.PL", - arm_STREXH_VS: "STREXH.VS", - arm_STREXH_VC: "STREXH.VC", - arm_STREXH_HI: "STREXH.HI", - arm_STREXH_LS: "STREXH.LS", - arm_STREXH_GE: "STREXH.GE", - arm_STREXH_LT: "STREXH.LT", - arm_STREXH_GT: "STREXH.GT", - arm_STREXH_LE: "STREXH.LE", - arm_STREXH: "STREXH", - arm_STREXH_ZZ: "STREXH.ZZ", - arm_STRH_EQ: "STRH.EQ", - arm_STRH_NE: "STRH.NE", - arm_STRH_CS: "STRH.CS", - arm_STRH_CC: "STRH.CC", - arm_STRH_MI: "STRH.MI", - arm_STRH_PL: "STRH.PL", - arm_STRH_VS: "STRH.VS", - arm_STRH_VC: "STRH.VC", - arm_STRH_HI: "STRH.HI", - arm_STRH_LS: "STRH.LS", - arm_STRH_GE: "STRH.GE", - arm_STRH_LT: "STRH.LT", - arm_STRH_GT: "STRH.GT", - arm_STRH_LE: "STRH.LE", - arm_STRH: "STRH", - arm_STRH_ZZ: "STRH.ZZ", - arm_STRHT_EQ: "STRHT.EQ", - arm_STRHT_NE: "STRHT.NE", - arm_STRHT_CS: "STRHT.CS", - arm_STRHT_CC: "STRHT.CC", - arm_STRHT_MI: "STRHT.MI", - arm_STRHT_PL: "STRHT.PL", - arm_STRHT_VS: "STRHT.VS", - arm_STRHT_VC: "STRHT.VC", - arm_STRHT_HI: "STRHT.HI", - arm_STRHT_LS: "STRHT.LS", - arm_STRHT_GE: "STRHT.GE", - arm_STRHT_LT: "STRHT.LT", - arm_STRHT_GT: "STRHT.GT", - arm_STRHT_LE: "STRHT.LE", - arm_STRHT: "STRHT", - arm_STRHT_ZZ: "STRHT.ZZ", - arm_STRT_EQ: "STRT.EQ", - arm_STRT_NE: "STRT.NE", - arm_STRT_CS: "STRT.CS", - arm_STRT_CC: "STRT.CC", - arm_STRT_MI: "STRT.MI", - arm_STRT_PL: "STRT.PL", - arm_STRT_VS: "STRT.VS", - arm_STRT_VC: "STRT.VC", - arm_STRT_HI: "STRT.HI", - arm_STRT_LS: "STRT.LS", - arm_STRT_GE: "STRT.GE", - arm_STRT_LT: "STRT.LT", - arm_STRT_GT: "STRT.GT", - arm_STRT_LE: "STRT.LE", - arm_STRT: "STRT", - arm_STRT_ZZ: "STRT.ZZ", - arm_SUB_EQ: "SUB.EQ", - arm_SUB_NE: "SUB.NE", - arm_SUB_CS: "SUB.CS", - arm_SUB_CC: "SUB.CC", - arm_SUB_MI: "SUB.MI", - arm_SUB_PL: "SUB.PL", - arm_SUB_VS: "SUB.VS", - arm_SUB_VC: "SUB.VC", - arm_SUB_HI: "SUB.HI", - arm_SUB_LS: "SUB.LS", - arm_SUB_GE: "SUB.GE", - arm_SUB_LT: "SUB.LT", - arm_SUB_GT: "SUB.GT", - arm_SUB_LE: "SUB.LE", - arm_SUB: "SUB", - arm_SUB_ZZ: "SUB.ZZ", - arm_SUB_S_EQ: "SUB.S.EQ", - arm_SUB_S_NE: "SUB.S.NE", - arm_SUB_S_CS: "SUB.S.CS", - arm_SUB_S_CC: "SUB.S.CC", - arm_SUB_S_MI: "SUB.S.MI", - arm_SUB_S_PL: "SUB.S.PL", - arm_SUB_S_VS: "SUB.S.VS", - arm_SUB_S_VC: "SUB.S.VC", - arm_SUB_S_HI: "SUB.S.HI", - arm_SUB_S_LS: "SUB.S.LS", - arm_SUB_S_GE: "SUB.S.GE", - arm_SUB_S_LT: "SUB.S.LT", - arm_SUB_S_GT: "SUB.S.GT", - arm_SUB_S_LE: "SUB.S.LE", - arm_SUB_S: "SUB.S", - arm_SUB_S_ZZ: "SUB.S.ZZ", - arm_SVC_EQ: "SVC.EQ", - arm_SVC_NE: "SVC.NE", - arm_SVC_CS: "SVC.CS", - arm_SVC_CC: "SVC.CC", - arm_SVC_MI: "SVC.MI", - arm_SVC_PL: "SVC.PL", - arm_SVC_VS: "SVC.VS", - arm_SVC_VC: "SVC.VC", - arm_SVC_HI: "SVC.HI", - arm_SVC_LS: "SVC.LS", - arm_SVC_GE: "SVC.GE", - arm_SVC_LT: "SVC.LT", - arm_SVC_GT: "SVC.GT", - arm_SVC_LE: "SVC.LE", - arm_SVC: "SVC", - arm_SVC_ZZ: "SVC.ZZ", - arm_SWP_EQ: "SWP.EQ", - arm_SWP_NE: "SWP.NE", - arm_SWP_CS: "SWP.CS", - arm_SWP_CC: "SWP.CC", - arm_SWP_MI: "SWP.MI", - arm_SWP_PL: "SWP.PL", - arm_SWP_VS: "SWP.VS", - arm_SWP_VC: "SWP.VC", - arm_SWP_HI: "SWP.HI", - arm_SWP_LS: "SWP.LS", - arm_SWP_GE: "SWP.GE", - arm_SWP_LT: "SWP.LT", - arm_SWP_GT: "SWP.GT", - arm_SWP_LE: "SWP.LE", - arm_SWP: "SWP", - arm_SWP_ZZ: "SWP.ZZ", - arm_SWP_B_EQ: "SWP.B.EQ", - arm_SWP_B_NE: "SWP.B.NE", - arm_SWP_B_CS: "SWP.B.CS", - arm_SWP_B_CC: "SWP.B.CC", - arm_SWP_B_MI: "SWP.B.MI", - arm_SWP_B_PL: "SWP.B.PL", - arm_SWP_B_VS: "SWP.B.VS", - arm_SWP_B_VC: "SWP.B.VC", - arm_SWP_B_HI: "SWP.B.HI", - arm_SWP_B_LS: "SWP.B.LS", - arm_SWP_B_GE: "SWP.B.GE", - arm_SWP_B_LT: "SWP.B.LT", - arm_SWP_B_GT: "SWP.B.GT", - arm_SWP_B_LE: "SWP.B.LE", - arm_SWP_B: "SWP.B", - arm_SWP_B_ZZ: "SWP.B.ZZ", - arm_SXTAB_EQ: "SXTAB.EQ", - arm_SXTAB_NE: "SXTAB.NE", - arm_SXTAB_CS: "SXTAB.CS", - arm_SXTAB_CC: "SXTAB.CC", - arm_SXTAB_MI: "SXTAB.MI", - arm_SXTAB_PL: "SXTAB.PL", - arm_SXTAB_VS: "SXTAB.VS", - arm_SXTAB_VC: "SXTAB.VC", - arm_SXTAB_HI: "SXTAB.HI", - arm_SXTAB_LS: "SXTAB.LS", - arm_SXTAB_GE: "SXTAB.GE", - arm_SXTAB_LT: "SXTAB.LT", - arm_SXTAB_GT: "SXTAB.GT", - arm_SXTAB_LE: "SXTAB.LE", - arm_SXTAB: "SXTAB", - arm_SXTAB_ZZ: "SXTAB.ZZ", - arm_SXTAB16_EQ: "SXTAB16.EQ", - arm_SXTAB16_NE: "SXTAB16.NE", - arm_SXTAB16_CS: "SXTAB16.CS", - arm_SXTAB16_CC: "SXTAB16.CC", - arm_SXTAB16_MI: "SXTAB16.MI", - arm_SXTAB16_PL: "SXTAB16.PL", - arm_SXTAB16_VS: "SXTAB16.VS", - arm_SXTAB16_VC: "SXTAB16.VC", - arm_SXTAB16_HI: "SXTAB16.HI", - arm_SXTAB16_LS: "SXTAB16.LS", - arm_SXTAB16_GE: "SXTAB16.GE", - arm_SXTAB16_LT: "SXTAB16.LT", - arm_SXTAB16_GT: "SXTAB16.GT", - arm_SXTAB16_LE: "SXTAB16.LE", - arm_SXTAB16: "SXTAB16", - arm_SXTAB16_ZZ: "SXTAB16.ZZ", - arm_SXTAH_EQ: "SXTAH.EQ", - arm_SXTAH_NE: "SXTAH.NE", - arm_SXTAH_CS: "SXTAH.CS", - arm_SXTAH_CC: "SXTAH.CC", - arm_SXTAH_MI: "SXTAH.MI", - arm_SXTAH_PL: "SXTAH.PL", - arm_SXTAH_VS: "SXTAH.VS", - arm_SXTAH_VC: "SXTAH.VC", - arm_SXTAH_HI: "SXTAH.HI", - arm_SXTAH_LS: "SXTAH.LS", - arm_SXTAH_GE: "SXTAH.GE", - arm_SXTAH_LT: "SXTAH.LT", - arm_SXTAH_GT: "SXTAH.GT", - arm_SXTAH_LE: "SXTAH.LE", - arm_SXTAH: "SXTAH", - arm_SXTAH_ZZ: "SXTAH.ZZ", - arm_SXTB_EQ: "SXTB.EQ", - arm_SXTB_NE: "SXTB.NE", - arm_SXTB_CS: "SXTB.CS", - arm_SXTB_CC: "SXTB.CC", - arm_SXTB_MI: "SXTB.MI", - arm_SXTB_PL: "SXTB.PL", - arm_SXTB_VS: "SXTB.VS", - arm_SXTB_VC: "SXTB.VC", - arm_SXTB_HI: "SXTB.HI", - arm_SXTB_LS: "SXTB.LS", - arm_SXTB_GE: "SXTB.GE", - arm_SXTB_LT: "SXTB.LT", - arm_SXTB_GT: "SXTB.GT", - arm_SXTB_LE: "SXTB.LE", - arm_SXTB: "SXTB", - arm_SXTB_ZZ: "SXTB.ZZ", - arm_SXTB16_EQ: "SXTB16.EQ", - arm_SXTB16_NE: "SXTB16.NE", - arm_SXTB16_CS: "SXTB16.CS", - arm_SXTB16_CC: "SXTB16.CC", - arm_SXTB16_MI: "SXTB16.MI", - arm_SXTB16_PL: "SXTB16.PL", - arm_SXTB16_VS: "SXTB16.VS", - arm_SXTB16_VC: "SXTB16.VC", - arm_SXTB16_HI: "SXTB16.HI", - arm_SXTB16_LS: "SXTB16.LS", - arm_SXTB16_GE: "SXTB16.GE", - arm_SXTB16_LT: "SXTB16.LT", - arm_SXTB16_GT: "SXTB16.GT", - arm_SXTB16_LE: "SXTB16.LE", - arm_SXTB16: "SXTB16", - arm_SXTB16_ZZ: "SXTB16.ZZ", - arm_SXTH_EQ: "SXTH.EQ", - arm_SXTH_NE: "SXTH.NE", - arm_SXTH_CS: "SXTH.CS", - arm_SXTH_CC: "SXTH.CC", - arm_SXTH_MI: "SXTH.MI", - arm_SXTH_PL: "SXTH.PL", - arm_SXTH_VS: "SXTH.VS", - arm_SXTH_VC: "SXTH.VC", - arm_SXTH_HI: "SXTH.HI", - arm_SXTH_LS: "SXTH.LS", - arm_SXTH_GE: "SXTH.GE", - arm_SXTH_LT: "SXTH.LT", - arm_SXTH_GT: "SXTH.GT", - arm_SXTH_LE: "SXTH.LE", - arm_SXTH: "SXTH", - arm_SXTH_ZZ: "SXTH.ZZ", - arm_TEQ_EQ: "TEQ.EQ", - arm_TEQ_NE: "TEQ.NE", - arm_TEQ_CS: "TEQ.CS", - arm_TEQ_CC: "TEQ.CC", - arm_TEQ_MI: "TEQ.MI", - arm_TEQ_PL: "TEQ.PL", - arm_TEQ_VS: "TEQ.VS", - arm_TEQ_VC: "TEQ.VC", - arm_TEQ_HI: "TEQ.HI", - arm_TEQ_LS: "TEQ.LS", - arm_TEQ_GE: "TEQ.GE", - arm_TEQ_LT: "TEQ.LT", - arm_TEQ_GT: "TEQ.GT", - arm_TEQ_LE: "TEQ.LE", - arm_TEQ: "TEQ", - arm_TEQ_ZZ: "TEQ.ZZ", - arm_TST_EQ: "TST.EQ", - arm_TST_NE: "TST.NE", - arm_TST_CS: "TST.CS", - arm_TST_CC: "TST.CC", - arm_TST_MI: "TST.MI", - arm_TST_PL: "TST.PL", - arm_TST_VS: "TST.VS", - arm_TST_VC: "TST.VC", - arm_TST_HI: "TST.HI", - arm_TST_LS: "TST.LS", - arm_TST_GE: "TST.GE", - arm_TST_LT: "TST.LT", - arm_TST_GT: "TST.GT", - arm_TST_LE: "TST.LE", - arm_TST: "TST", - arm_TST_ZZ: "TST.ZZ", - arm_UADD16_EQ: "UADD16.EQ", - arm_UADD16_NE: "UADD16.NE", - arm_UADD16_CS: "UADD16.CS", - arm_UADD16_CC: "UADD16.CC", - arm_UADD16_MI: "UADD16.MI", - arm_UADD16_PL: "UADD16.PL", - arm_UADD16_VS: "UADD16.VS", - arm_UADD16_VC: "UADD16.VC", - arm_UADD16_HI: "UADD16.HI", - arm_UADD16_LS: "UADD16.LS", - arm_UADD16_GE: "UADD16.GE", - arm_UADD16_LT: "UADD16.LT", - arm_UADD16_GT: "UADD16.GT", - arm_UADD16_LE: "UADD16.LE", - arm_UADD16: "UADD16", - arm_UADD16_ZZ: "UADD16.ZZ", - arm_UADD8_EQ: "UADD8.EQ", - arm_UADD8_NE: "UADD8.NE", - arm_UADD8_CS: "UADD8.CS", - arm_UADD8_CC: "UADD8.CC", - arm_UADD8_MI: "UADD8.MI", - arm_UADD8_PL: "UADD8.PL", - arm_UADD8_VS: "UADD8.VS", - arm_UADD8_VC: "UADD8.VC", - arm_UADD8_HI: "UADD8.HI", - arm_UADD8_LS: "UADD8.LS", - arm_UADD8_GE: "UADD8.GE", - arm_UADD8_LT: "UADD8.LT", - arm_UADD8_GT: "UADD8.GT", - arm_UADD8_LE: "UADD8.LE", - arm_UADD8: "UADD8", - arm_UADD8_ZZ: "UADD8.ZZ", - arm_UASX_EQ: "UASX.EQ", - arm_UASX_NE: "UASX.NE", - arm_UASX_CS: "UASX.CS", - arm_UASX_CC: "UASX.CC", - arm_UASX_MI: "UASX.MI", - arm_UASX_PL: "UASX.PL", - arm_UASX_VS: "UASX.VS", - arm_UASX_VC: "UASX.VC", - arm_UASX_HI: "UASX.HI", - arm_UASX_LS: "UASX.LS", - arm_UASX_GE: "UASX.GE", - arm_UASX_LT: "UASX.LT", - arm_UASX_GT: "UASX.GT", - arm_UASX_LE: "UASX.LE", - arm_UASX: "UASX", - arm_UASX_ZZ: "UASX.ZZ", - arm_UBFX_EQ: "UBFX.EQ", - arm_UBFX_NE: "UBFX.NE", - arm_UBFX_CS: "UBFX.CS", - arm_UBFX_CC: "UBFX.CC", - arm_UBFX_MI: "UBFX.MI", - arm_UBFX_PL: "UBFX.PL", - arm_UBFX_VS: "UBFX.VS", - arm_UBFX_VC: "UBFX.VC", - arm_UBFX_HI: "UBFX.HI", - arm_UBFX_LS: "UBFX.LS", - arm_UBFX_GE: "UBFX.GE", - arm_UBFX_LT: "UBFX.LT", - arm_UBFX_GT: "UBFX.GT", - arm_UBFX_LE: "UBFX.LE", - arm_UBFX: "UBFX", - arm_UBFX_ZZ: "UBFX.ZZ", - arm_UHADD16_EQ: "UHADD16.EQ", - arm_UHADD16_NE: "UHADD16.NE", - arm_UHADD16_CS: "UHADD16.CS", - arm_UHADD16_CC: "UHADD16.CC", - arm_UHADD16_MI: "UHADD16.MI", - arm_UHADD16_PL: "UHADD16.PL", - arm_UHADD16_VS: "UHADD16.VS", - arm_UHADD16_VC: "UHADD16.VC", - arm_UHADD16_HI: "UHADD16.HI", - arm_UHADD16_LS: "UHADD16.LS", - arm_UHADD16_GE: "UHADD16.GE", - arm_UHADD16_LT: "UHADD16.LT", - arm_UHADD16_GT: "UHADD16.GT", - arm_UHADD16_LE: "UHADD16.LE", - arm_UHADD16: "UHADD16", - arm_UHADD16_ZZ: "UHADD16.ZZ", - arm_UHADD8_EQ: "UHADD8.EQ", - arm_UHADD8_NE: "UHADD8.NE", - arm_UHADD8_CS: "UHADD8.CS", - arm_UHADD8_CC: "UHADD8.CC", - arm_UHADD8_MI: "UHADD8.MI", - arm_UHADD8_PL: "UHADD8.PL", - arm_UHADD8_VS: "UHADD8.VS", - arm_UHADD8_VC: "UHADD8.VC", - arm_UHADD8_HI: "UHADD8.HI", - arm_UHADD8_LS: "UHADD8.LS", - arm_UHADD8_GE: "UHADD8.GE", - arm_UHADD8_LT: "UHADD8.LT", - arm_UHADD8_GT: "UHADD8.GT", - arm_UHADD8_LE: "UHADD8.LE", - arm_UHADD8: "UHADD8", - arm_UHADD8_ZZ: "UHADD8.ZZ", - arm_UHASX_EQ: "UHASX.EQ", - arm_UHASX_NE: "UHASX.NE", - arm_UHASX_CS: "UHASX.CS", - arm_UHASX_CC: "UHASX.CC", - arm_UHASX_MI: "UHASX.MI", - arm_UHASX_PL: "UHASX.PL", - arm_UHASX_VS: "UHASX.VS", - arm_UHASX_VC: "UHASX.VC", - arm_UHASX_HI: "UHASX.HI", - arm_UHASX_LS: "UHASX.LS", - arm_UHASX_GE: "UHASX.GE", - arm_UHASX_LT: "UHASX.LT", - arm_UHASX_GT: "UHASX.GT", - arm_UHASX_LE: "UHASX.LE", - arm_UHASX: "UHASX", - arm_UHASX_ZZ: "UHASX.ZZ", - arm_UHSAX_EQ: "UHSAX.EQ", - arm_UHSAX_NE: "UHSAX.NE", - arm_UHSAX_CS: "UHSAX.CS", - arm_UHSAX_CC: "UHSAX.CC", - arm_UHSAX_MI: "UHSAX.MI", - arm_UHSAX_PL: "UHSAX.PL", - arm_UHSAX_VS: "UHSAX.VS", - arm_UHSAX_VC: "UHSAX.VC", - arm_UHSAX_HI: "UHSAX.HI", - arm_UHSAX_LS: "UHSAX.LS", - arm_UHSAX_GE: "UHSAX.GE", - arm_UHSAX_LT: "UHSAX.LT", - arm_UHSAX_GT: "UHSAX.GT", - arm_UHSAX_LE: "UHSAX.LE", - arm_UHSAX: "UHSAX", - arm_UHSAX_ZZ: "UHSAX.ZZ", - arm_UHSUB16_EQ: "UHSUB16.EQ", - arm_UHSUB16_NE: "UHSUB16.NE", - arm_UHSUB16_CS: "UHSUB16.CS", - arm_UHSUB16_CC: "UHSUB16.CC", - arm_UHSUB16_MI: "UHSUB16.MI", - arm_UHSUB16_PL: "UHSUB16.PL", - arm_UHSUB16_VS: "UHSUB16.VS", - arm_UHSUB16_VC: "UHSUB16.VC", - arm_UHSUB16_HI: "UHSUB16.HI", - arm_UHSUB16_LS: "UHSUB16.LS", - arm_UHSUB16_GE: "UHSUB16.GE", - arm_UHSUB16_LT: "UHSUB16.LT", - arm_UHSUB16_GT: "UHSUB16.GT", - arm_UHSUB16_LE: "UHSUB16.LE", - arm_UHSUB16: "UHSUB16", - arm_UHSUB16_ZZ: "UHSUB16.ZZ", - arm_UHSUB8_EQ: "UHSUB8.EQ", - arm_UHSUB8_NE: "UHSUB8.NE", - arm_UHSUB8_CS: "UHSUB8.CS", - arm_UHSUB8_CC: "UHSUB8.CC", - arm_UHSUB8_MI: "UHSUB8.MI", - arm_UHSUB8_PL: "UHSUB8.PL", - arm_UHSUB8_VS: "UHSUB8.VS", - arm_UHSUB8_VC: "UHSUB8.VC", - arm_UHSUB8_HI: "UHSUB8.HI", - arm_UHSUB8_LS: "UHSUB8.LS", - arm_UHSUB8_GE: "UHSUB8.GE", - arm_UHSUB8_LT: "UHSUB8.LT", - arm_UHSUB8_GT: "UHSUB8.GT", - arm_UHSUB8_LE: "UHSUB8.LE", - arm_UHSUB8: "UHSUB8", - arm_UHSUB8_ZZ: "UHSUB8.ZZ", - arm_UMAAL_EQ: "UMAAL.EQ", - arm_UMAAL_NE: "UMAAL.NE", - arm_UMAAL_CS: "UMAAL.CS", - arm_UMAAL_CC: "UMAAL.CC", - arm_UMAAL_MI: "UMAAL.MI", - arm_UMAAL_PL: "UMAAL.PL", - arm_UMAAL_VS: "UMAAL.VS", - arm_UMAAL_VC: "UMAAL.VC", - arm_UMAAL_HI: "UMAAL.HI", - arm_UMAAL_LS: "UMAAL.LS", - arm_UMAAL_GE: "UMAAL.GE", - arm_UMAAL_LT: "UMAAL.LT", - arm_UMAAL_GT: "UMAAL.GT", - arm_UMAAL_LE: "UMAAL.LE", - arm_UMAAL: "UMAAL", - arm_UMAAL_ZZ: "UMAAL.ZZ", - arm_UMLAL_EQ: "UMLAL.EQ", - arm_UMLAL_NE: "UMLAL.NE", - arm_UMLAL_CS: "UMLAL.CS", - arm_UMLAL_CC: "UMLAL.CC", - arm_UMLAL_MI: "UMLAL.MI", - arm_UMLAL_PL: "UMLAL.PL", - arm_UMLAL_VS: "UMLAL.VS", - arm_UMLAL_VC: "UMLAL.VC", - arm_UMLAL_HI: "UMLAL.HI", - arm_UMLAL_LS: "UMLAL.LS", - arm_UMLAL_GE: "UMLAL.GE", - arm_UMLAL_LT: "UMLAL.LT", - arm_UMLAL_GT: "UMLAL.GT", - arm_UMLAL_LE: "UMLAL.LE", - arm_UMLAL: "UMLAL", - arm_UMLAL_ZZ: "UMLAL.ZZ", - arm_UMLAL_S_EQ: "UMLAL.S.EQ", - arm_UMLAL_S_NE: "UMLAL.S.NE", - arm_UMLAL_S_CS: "UMLAL.S.CS", - arm_UMLAL_S_CC: "UMLAL.S.CC", - arm_UMLAL_S_MI: "UMLAL.S.MI", - arm_UMLAL_S_PL: "UMLAL.S.PL", - arm_UMLAL_S_VS: "UMLAL.S.VS", - arm_UMLAL_S_VC: "UMLAL.S.VC", - arm_UMLAL_S_HI: "UMLAL.S.HI", - arm_UMLAL_S_LS: "UMLAL.S.LS", - arm_UMLAL_S_GE: "UMLAL.S.GE", - arm_UMLAL_S_LT: "UMLAL.S.LT", - arm_UMLAL_S_GT: "UMLAL.S.GT", - arm_UMLAL_S_LE: "UMLAL.S.LE", - arm_UMLAL_S: "UMLAL.S", - arm_UMLAL_S_ZZ: "UMLAL.S.ZZ", - arm_UMULL_EQ: "UMULL.EQ", - arm_UMULL_NE: "UMULL.NE", - arm_UMULL_CS: "UMULL.CS", - arm_UMULL_CC: "UMULL.CC", - arm_UMULL_MI: "UMULL.MI", - arm_UMULL_PL: "UMULL.PL", - arm_UMULL_VS: "UMULL.VS", - arm_UMULL_VC: "UMULL.VC", - arm_UMULL_HI: "UMULL.HI", - arm_UMULL_LS: "UMULL.LS", - arm_UMULL_GE: "UMULL.GE", - arm_UMULL_LT: "UMULL.LT", - arm_UMULL_GT: "UMULL.GT", - arm_UMULL_LE: "UMULL.LE", - arm_UMULL: "UMULL", - arm_UMULL_ZZ: "UMULL.ZZ", - arm_UMULL_S_EQ: "UMULL.S.EQ", - arm_UMULL_S_NE: "UMULL.S.NE", - arm_UMULL_S_CS: "UMULL.S.CS", - arm_UMULL_S_CC: "UMULL.S.CC", - arm_UMULL_S_MI: "UMULL.S.MI", - arm_UMULL_S_PL: "UMULL.S.PL", - arm_UMULL_S_VS: "UMULL.S.VS", - arm_UMULL_S_VC: "UMULL.S.VC", - arm_UMULL_S_HI: "UMULL.S.HI", - arm_UMULL_S_LS: "UMULL.S.LS", - arm_UMULL_S_GE: "UMULL.S.GE", - arm_UMULL_S_LT: "UMULL.S.LT", - arm_UMULL_S_GT: "UMULL.S.GT", - arm_UMULL_S_LE: "UMULL.S.LE", - arm_UMULL_S: "UMULL.S", - arm_UMULL_S_ZZ: "UMULL.S.ZZ", - arm_UNDEF: "UNDEF", - arm_UQADD16_EQ: "UQADD16.EQ", - arm_UQADD16_NE: "UQADD16.NE", - arm_UQADD16_CS: "UQADD16.CS", - arm_UQADD16_CC: "UQADD16.CC", - arm_UQADD16_MI: "UQADD16.MI", - arm_UQADD16_PL: "UQADD16.PL", - arm_UQADD16_VS: "UQADD16.VS", - arm_UQADD16_VC: "UQADD16.VC", - arm_UQADD16_HI: "UQADD16.HI", - arm_UQADD16_LS: "UQADD16.LS", - arm_UQADD16_GE: "UQADD16.GE", - arm_UQADD16_LT: "UQADD16.LT", - arm_UQADD16_GT: "UQADD16.GT", - arm_UQADD16_LE: "UQADD16.LE", - arm_UQADD16: "UQADD16", - arm_UQADD16_ZZ: "UQADD16.ZZ", - arm_UQADD8_EQ: "UQADD8.EQ", - arm_UQADD8_NE: "UQADD8.NE", - arm_UQADD8_CS: "UQADD8.CS", - arm_UQADD8_CC: "UQADD8.CC", - arm_UQADD8_MI: "UQADD8.MI", - arm_UQADD8_PL: "UQADD8.PL", - arm_UQADD8_VS: "UQADD8.VS", - arm_UQADD8_VC: "UQADD8.VC", - arm_UQADD8_HI: "UQADD8.HI", - arm_UQADD8_LS: "UQADD8.LS", - arm_UQADD8_GE: "UQADD8.GE", - arm_UQADD8_LT: "UQADD8.LT", - arm_UQADD8_GT: "UQADD8.GT", - arm_UQADD8_LE: "UQADD8.LE", - arm_UQADD8: "UQADD8", - arm_UQADD8_ZZ: "UQADD8.ZZ", - arm_UQASX_EQ: "UQASX.EQ", - arm_UQASX_NE: "UQASX.NE", - arm_UQASX_CS: "UQASX.CS", - arm_UQASX_CC: "UQASX.CC", - arm_UQASX_MI: "UQASX.MI", - arm_UQASX_PL: "UQASX.PL", - arm_UQASX_VS: "UQASX.VS", - arm_UQASX_VC: "UQASX.VC", - arm_UQASX_HI: "UQASX.HI", - arm_UQASX_LS: "UQASX.LS", - arm_UQASX_GE: "UQASX.GE", - arm_UQASX_LT: "UQASX.LT", - arm_UQASX_GT: "UQASX.GT", - arm_UQASX_LE: "UQASX.LE", - arm_UQASX: "UQASX", - arm_UQASX_ZZ: "UQASX.ZZ", - arm_UQSAX_EQ: "UQSAX.EQ", - arm_UQSAX_NE: "UQSAX.NE", - arm_UQSAX_CS: "UQSAX.CS", - arm_UQSAX_CC: "UQSAX.CC", - arm_UQSAX_MI: "UQSAX.MI", - arm_UQSAX_PL: "UQSAX.PL", - arm_UQSAX_VS: "UQSAX.VS", - arm_UQSAX_VC: "UQSAX.VC", - arm_UQSAX_HI: "UQSAX.HI", - arm_UQSAX_LS: "UQSAX.LS", - arm_UQSAX_GE: "UQSAX.GE", - arm_UQSAX_LT: "UQSAX.LT", - arm_UQSAX_GT: "UQSAX.GT", - arm_UQSAX_LE: "UQSAX.LE", - arm_UQSAX: "UQSAX", - arm_UQSAX_ZZ: "UQSAX.ZZ", - arm_UQSUB16_EQ: "UQSUB16.EQ", - arm_UQSUB16_NE: "UQSUB16.NE", - arm_UQSUB16_CS: "UQSUB16.CS", - arm_UQSUB16_CC: "UQSUB16.CC", - arm_UQSUB16_MI: "UQSUB16.MI", - arm_UQSUB16_PL: "UQSUB16.PL", - arm_UQSUB16_VS: "UQSUB16.VS", - arm_UQSUB16_VC: "UQSUB16.VC", - arm_UQSUB16_HI: "UQSUB16.HI", - arm_UQSUB16_LS: "UQSUB16.LS", - arm_UQSUB16_GE: "UQSUB16.GE", - arm_UQSUB16_LT: "UQSUB16.LT", - arm_UQSUB16_GT: "UQSUB16.GT", - arm_UQSUB16_LE: "UQSUB16.LE", - arm_UQSUB16: "UQSUB16", - arm_UQSUB16_ZZ: "UQSUB16.ZZ", - arm_UQSUB8_EQ: "UQSUB8.EQ", - arm_UQSUB8_NE: "UQSUB8.NE", - arm_UQSUB8_CS: "UQSUB8.CS", - arm_UQSUB8_CC: "UQSUB8.CC", - arm_UQSUB8_MI: "UQSUB8.MI", - arm_UQSUB8_PL: "UQSUB8.PL", - arm_UQSUB8_VS: "UQSUB8.VS", - arm_UQSUB8_VC: "UQSUB8.VC", - arm_UQSUB8_HI: "UQSUB8.HI", - arm_UQSUB8_LS: "UQSUB8.LS", - arm_UQSUB8_GE: "UQSUB8.GE", - arm_UQSUB8_LT: "UQSUB8.LT", - arm_UQSUB8_GT: "UQSUB8.GT", - arm_UQSUB8_LE: "UQSUB8.LE", - arm_UQSUB8: "UQSUB8", - arm_UQSUB8_ZZ: "UQSUB8.ZZ", - arm_USAD8_EQ: "USAD8.EQ", - arm_USAD8_NE: "USAD8.NE", - arm_USAD8_CS: "USAD8.CS", - arm_USAD8_CC: "USAD8.CC", - arm_USAD8_MI: "USAD8.MI", - arm_USAD8_PL: "USAD8.PL", - arm_USAD8_VS: "USAD8.VS", - arm_USAD8_VC: "USAD8.VC", - arm_USAD8_HI: "USAD8.HI", - arm_USAD8_LS: "USAD8.LS", - arm_USAD8_GE: "USAD8.GE", - arm_USAD8_LT: "USAD8.LT", - arm_USAD8_GT: "USAD8.GT", - arm_USAD8_LE: "USAD8.LE", - arm_USAD8: "USAD8", - arm_USAD8_ZZ: "USAD8.ZZ", - arm_USADA8_EQ: "USADA8.EQ", - arm_USADA8_NE: "USADA8.NE", - arm_USADA8_CS: "USADA8.CS", - arm_USADA8_CC: "USADA8.CC", - arm_USADA8_MI: "USADA8.MI", - arm_USADA8_PL: "USADA8.PL", - arm_USADA8_VS: "USADA8.VS", - arm_USADA8_VC: "USADA8.VC", - arm_USADA8_HI: "USADA8.HI", - arm_USADA8_LS: "USADA8.LS", - arm_USADA8_GE: "USADA8.GE", - arm_USADA8_LT: "USADA8.LT", - arm_USADA8_GT: "USADA8.GT", - arm_USADA8_LE: "USADA8.LE", - arm_USADA8: "USADA8", - arm_USADA8_ZZ: "USADA8.ZZ", - arm_USAT_EQ: "USAT.EQ", - arm_USAT_NE: "USAT.NE", - arm_USAT_CS: "USAT.CS", - arm_USAT_CC: "USAT.CC", - arm_USAT_MI: "USAT.MI", - arm_USAT_PL: "USAT.PL", - arm_USAT_VS: "USAT.VS", - arm_USAT_VC: "USAT.VC", - arm_USAT_HI: "USAT.HI", - arm_USAT_LS: "USAT.LS", - arm_USAT_GE: "USAT.GE", - arm_USAT_LT: "USAT.LT", - arm_USAT_GT: "USAT.GT", - arm_USAT_LE: "USAT.LE", - arm_USAT: "USAT", - arm_USAT_ZZ: "USAT.ZZ", - arm_USAT16_EQ: "USAT16.EQ", - arm_USAT16_NE: "USAT16.NE", - arm_USAT16_CS: "USAT16.CS", - arm_USAT16_CC: "USAT16.CC", - arm_USAT16_MI: "USAT16.MI", - arm_USAT16_PL: "USAT16.PL", - arm_USAT16_VS: "USAT16.VS", - arm_USAT16_VC: "USAT16.VC", - arm_USAT16_HI: "USAT16.HI", - arm_USAT16_LS: "USAT16.LS", - arm_USAT16_GE: "USAT16.GE", - arm_USAT16_LT: "USAT16.LT", - arm_USAT16_GT: "USAT16.GT", - arm_USAT16_LE: "USAT16.LE", - arm_USAT16: "USAT16", - arm_USAT16_ZZ: "USAT16.ZZ", - arm_USAX_EQ: "USAX.EQ", - arm_USAX_NE: "USAX.NE", - arm_USAX_CS: "USAX.CS", - arm_USAX_CC: "USAX.CC", - arm_USAX_MI: "USAX.MI", - arm_USAX_PL: "USAX.PL", - arm_USAX_VS: "USAX.VS", - arm_USAX_VC: "USAX.VC", - arm_USAX_HI: "USAX.HI", - arm_USAX_LS: "USAX.LS", - arm_USAX_GE: "USAX.GE", - arm_USAX_LT: "USAX.LT", - arm_USAX_GT: "USAX.GT", - arm_USAX_LE: "USAX.LE", - arm_USAX: "USAX", - arm_USAX_ZZ: "USAX.ZZ", - arm_USUB16_EQ: "USUB16.EQ", - arm_USUB16_NE: "USUB16.NE", - arm_USUB16_CS: "USUB16.CS", - arm_USUB16_CC: "USUB16.CC", - arm_USUB16_MI: "USUB16.MI", - arm_USUB16_PL: "USUB16.PL", - arm_USUB16_VS: "USUB16.VS", - arm_USUB16_VC: "USUB16.VC", - arm_USUB16_HI: "USUB16.HI", - arm_USUB16_LS: "USUB16.LS", - arm_USUB16_GE: "USUB16.GE", - arm_USUB16_LT: "USUB16.LT", - arm_USUB16_GT: "USUB16.GT", - arm_USUB16_LE: "USUB16.LE", - arm_USUB16: "USUB16", - arm_USUB16_ZZ: "USUB16.ZZ", - arm_USUB8_EQ: "USUB8.EQ", - arm_USUB8_NE: "USUB8.NE", - arm_USUB8_CS: "USUB8.CS", - arm_USUB8_CC: "USUB8.CC", - arm_USUB8_MI: "USUB8.MI", - arm_USUB8_PL: "USUB8.PL", - arm_USUB8_VS: "USUB8.VS", - arm_USUB8_VC: "USUB8.VC", - arm_USUB8_HI: "USUB8.HI", - arm_USUB8_LS: "USUB8.LS", - arm_USUB8_GE: "USUB8.GE", - arm_USUB8_LT: "USUB8.LT", - arm_USUB8_GT: "USUB8.GT", - arm_USUB8_LE: "USUB8.LE", - arm_USUB8: "USUB8", - arm_USUB8_ZZ: "USUB8.ZZ", - arm_UXTAB_EQ: "UXTAB.EQ", - arm_UXTAB_NE: "UXTAB.NE", - arm_UXTAB_CS: "UXTAB.CS", - arm_UXTAB_CC: "UXTAB.CC", - arm_UXTAB_MI: "UXTAB.MI", - arm_UXTAB_PL: "UXTAB.PL", - arm_UXTAB_VS: "UXTAB.VS", - arm_UXTAB_VC: "UXTAB.VC", - arm_UXTAB_HI: "UXTAB.HI", - arm_UXTAB_LS: "UXTAB.LS", - arm_UXTAB_GE: "UXTAB.GE", - arm_UXTAB_LT: "UXTAB.LT", - arm_UXTAB_GT: "UXTAB.GT", - arm_UXTAB_LE: "UXTAB.LE", - arm_UXTAB: "UXTAB", - arm_UXTAB_ZZ: "UXTAB.ZZ", - arm_UXTAB16_EQ: "UXTAB16.EQ", - arm_UXTAB16_NE: "UXTAB16.NE", - arm_UXTAB16_CS: "UXTAB16.CS", - arm_UXTAB16_CC: "UXTAB16.CC", - arm_UXTAB16_MI: "UXTAB16.MI", - arm_UXTAB16_PL: "UXTAB16.PL", - arm_UXTAB16_VS: "UXTAB16.VS", - arm_UXTAB16_VC: "UXTAB16.VC", - arm_UXTAB16_HI: "UXTAB16.HI", - arm_UXTAB16_LS: "UXTAB16.LS", - arm_UXTAB16_GE: "UXTAB16.GE", - arm_UXTAB16_LT: "UXTAB16.LT", - arm_UXTAB16_GT: "UXTAB16.GT", - arm_UXTAB16_LE: "UXTAB16.LE", - arm_UXTAB16: "UXTAB16", - arm_UXTAB16_ZZ: "UXTAB16.ZZ", - arm_UXTAH_EQ: "UXTAH.EQ", - arm_UXTAH_NE: "UXTAH.NE", - arm_UXTAH_CS: "UXTAH.CS", - arm_UXTAH_CC: "UXTAH.CC", - arm_UXTAH_MI: "UXTAH.MI", - arm_UXTAH_PL: "UXTAH.PL", - arm_UXTAH_VS: "UXTAH.VS", - arm_UXTAH_VC: "UXTAH.VC", - arm_UXTAH_HI: "UXTAH.HI", - arm_UXTAH_LS: "UXTAH.LS", - arm_UXTAH_GE: "UXTAH.GE", - arm_UXTAH_LT: "UXTAH.LT", - arm_UXTAH_GT: "UXTAH.GT", - arm_UXTAH_LE: "UXTAH.LE", - arm_UXTAH: "UXTAH", - arm_UXTAH_ZZ: "UXTAH.ZZ", - arm_UXTB_EQ: "UXTB.EQ", - arm_UXTB_NE: "UXTB.NE", - arm_UXTB_CS: "UXTB.CS", - arm_UXTB_CC: "UXTB.CC", - arm_UXTB_MI: "UXTB.MI", - arm_UXTB_PL: "UXTB.PL", - arm_UXTB_VS: "UXTB.VS", - arm_UXTB_VC: "UXTB.VC", - arm_UXTB_HI: "UXTB.HI", - arm_UXTB_LS: "UXTB.LS", - arm_UXTB_GE: "UXTB.GE", - arm_UXTB_LT: "UXTB.LT", - arm_UXTB_GT: "UXTB.GT", - arm_UXTB_LE: "UXTB.LE", - arm_UXTB: "UXTB", - arm_UXTB_ZZ: "UXTB.ZZ", - arm_UXTB16_EQ: "UXTB16.EQ", - arm_UXTB16_NE: "UXTB16.NE", - arm_UXTB16_CS: "UXTB16.CS", - arm_UXTB16_CC: "UXTB16.CC", - arm_UXTB16_MI: "UXTB16.MI", - arm_UXTB16_PL: "UXTB16.PL", - arm_UXTB16_VS: "UXTB16.VS", - arm_UXTB16_VC: "UXTB16.VC", - arm_UXTB16_HI: "UXTB16.HI", - arm_UXTB16_LS: "UXTB16.LS", - arm_UXTB16_GE: "UXTB16.GE", - arm_UXTB16_LT: "UXTB16.LT", - arm_UXTB16_GT: "UXTB16.GT", - arm_UXTB16_LE: "UXTB16.LE", - arm_UXTB16: "UXTB16", - arm_UXTB16_ZZ: "UXTB16.ZZ", - arm_UXTH_EQ: "UXTH.EQ", - arm_UXTH_NE: "UXTH.NE", - arm_UXTH_CS: "UXTH.CS", - arm_UXTH_CC: "UXTH.CC", - arm_UXTH_MI: "UXTH.MI", - arm_UXTH_PL: "UXTH.PL", - arm_UXTH_VS: "UXTH.VS", - arm_UXTH_VC: "UXTH.VC", - arm_UXTH_HI: "UXTH.HI", - arm_UXTH_LS: "UXTH.LS", - arm_UXTH_GE: "UXTH.GE", - arm_UXTH_LT: "UXTH.LT", - arm_UXTH_GT: "UXTH.GT", - arm_UXTH_LE: "UXTH.LE", - arm_UXTH: "UXTH", - arm_UXTH_ZZ: "UXTH.ZZ", - arm_VABS_EQ_F32: "VABS.EQ.F32", - arm_VABS_NE_F32: "VABS.NE.F32", - arm_VABS_CS_F32: "VABS.CS.F32", - arm_VABS_CC_F32: "VABS.CC.F32", - arm_VABS_MI_F32: "VABS.MI.F32", - arm_VABS_PL_F32: "VABS.PL.F32", - arm_VABS_VS_F32: "VABS.VS.F32", - arm_VABS_VC_F32: "VABS.VC.F32", - arm_VABS_HI_F32: "VABS.HI.F32", - arm_VABS_LS_F32: "VABS.LS.F32", - arm_VABS_GE_F32: "VABS.GE.F32", - arm_VABS_LT_F32: "VABS.LT.F32", - arm_VABS_GT_F32: "VABS.GT.F32", - arm_VABS_LE_F32: "VABS.LE.F32", - arm_VABS_F32: "VABS.F32", - arm_VABS_ZZ_F32: "VABS.ZZ.F32", - arm_VABS_EQ_F64: "VABS.EQ.F64", - arm_VABS_NE_F64: "VABS.NE.F64", - arm_VABS_CS_F64: "VABS.CS.F64", - arm_VABS_CC_F64: "VABS.CC.F64", - arm_VABS_MI_F64: "VABS.MI.F64", - arm_VABS_PL_F64: "VABS.PL.F64", - arm_VABS_VS_F64: "VABS.VS.F64", - arm_VABS_VC_F64: "VABS.VC.F64", - arm_VABS_HI_F64: "VABS.HI.F64", - arm_VABS_LS_F64: "VABS.LS.F64", - arm_VABS_GE_F64: "VABS.GE.F64", - arm_VABS_LT_F64: "VABS.LT.F64", - arm_VABS_GT_F64: "VABS.GT.F64", - arm_VABS_LE_F64: "VABS.LE.F64", - arm_VABS_F64: "VABS.F64", - arm_VABS_ZZ_F64: "VABS.ZZ.F64", - arm_VADD_EQ_F32: "VADD.EQ.F32", - arm_VADD_NE_F32: "VADD.NE.F32", - arm_VADD_CS_F32: "VADD.CS.F32", - arm_VADD_CC_F32: "VADD.CC.F32", - arm_VADD_MI_F32: "VADD.MI.F32", - arm_VADD_PL_F32: "VADD.PL.F32", - arm_VADD_VS_F32: "VADD.VS.F32", - arm_VADD_VC_F32: "VADD.VC.F32", - arm_VADD_HI_F32: "VADD.HI.F32", - arm_VADD_LS_F32: "VADD.LS.F32", - arm_VADD_GE_F32: "VADD.GE.F32", - arm_VADD_LT_F32: "VADD.LT.F32", - arm_VADD_GT_F32: "VADD.GT.F32", - arm_VADD_LE_F32: "VADD.LE.F32", - arm_VADD_F32: "VADD.F32", - arm_VADD_ZZ_F32: "VADD.ZZ.F32", - arm_VADD_EQ_F64: "VADD.EQ.F64", - arm_VADD_NE_F64: "VADD.NE.F64", - arm_VADD_CS_F64: "VADD.CS.F64", - arm_VADD_CC_F64: "VADD.CC.F64", - arm_VADD_MI_F64: "VADD.MI.F64", - arm_VADD_PL_F64: "VADD.PL.F64", - arm_VADD_VS_F64: "VADD.VS.F64", - arm_VADD_VC_F64: "VADD.VC.F64", - arm_VADD_HI_F64: "VADD.HI.F64", - arm_VADD_LS_F64: "VADD.LS.F64", - arm_VADD_GE_F64: "VADD.GE.F64", - arm_VADD_LT_F64: "VADD.LT.F64", - arm_VADD_GT_F64: "VADD.GT.F64", - arm_VADD_LE_F64: "VADD.LE.F64", - arm_VADD_F64: "VADD.F64", - arm_VADD_ZZ_F64: "VADD.ZZ.F64", - arm_VCMP_EQ_F32: "VCMP.EQ.F32", - arm_VCMP_NE_F32: "VCMP.NE.F32", - arm_VCMP_CS_F32: "VCMP.CS.F32", - arm_VCMP_CC_F32: "VCMP.CC.F32", - arm_VCMP_MI_F32: "VCMP.MI.F32", - arm_VCMP_PL_F32: "VCMP.PL.F32", - arm_VCMP_VS_F32: "VCMP.VS.F32", - arm_VCMP_VC_F32: "VCMP.VC.F32", - arm_VCMP_HI_F32: "VCMP.HI.F32", - arm_VCMP_LS_F32: "VCMP.LS.F32", - arm_VCMP_GE_F32: "VCMP.GE.F32", - arm_VCMP_LT_F32: "VCMP.LT.F32", - arm_VCMP_GT_F32: "VCMP.GT.F32", - arm_VCMP_LE_F32: "VCMP.LE.F32", - arm_VCMP_F32: "VCMP.F32", - arm_VCMP_ZZ_F32: "VCMP.ZZ.F32", - arm_VCMP_EQ_F64: "VCMP.EQ.F64", - arm_VCMP_NE_F64: "VCMP.NE.F64", - arm_VCMP_CS_F64: "VCMP.CS.F64", - arm_VCMP_CC_F64: "VCMP.CC.F64", - arm_VCMP_MI_F64: "VCMP.MI.F64", - arm_VCMP_PL_F64: "VCMP.PL.F64", - arm_VCMP_VS_F64: "VCMP.VS.F64", - arm_VCMP_VC_F64: "VCMP.VC.F64", - arm_VCMP_HI_F64: "VCMP.HI.F64", - arm_VCMP_LS_F64: "VCMP.LS.F64", - arm_VCMP_GE_F64: "VCMP.GE.F64", - arm_VCMP_LT_F64: "VCMP.LT.F64", - arm_VCMP_GT_F64: "VCMP.GT.F64", - arm_VCMP_LE_F64: "VCMP.LE.F64", - arm_VCMP_F64: "VCMP.F64", - arm_VCMP_ZZ_F64: "VCMP.ZZ.F64", - arm_VCMP_E_EQ_F32: "VCMP.E.EQ.F32", - arm_VCMP_E_NE_F32: "VCMP.E.NE.F32", - arm_VCMP_E_CS_F32: "VCMP.E.CS.F32", - arm_VCMP_E_CC_F32: "VCMP.E.CC.F32", - arm_VCMP_E_MI_F32: "VCMP.E.MI.F32", - arm_VCMP_E_PL_F32: "VCMP.E.PL.F32", - arm_VCMP_E_VS_F32: "VCMP.E.VS.F32", - arm_VCMP_E_VC_F32: "VCMP.E.VC.F32", - arm_VCMP_E_HI_F32: "VCMP.E.HI.F32", - arm_VCMP_E_LS_F32: "VCMP.E.LS.F32", - arm_VCMP_E_GE_F32: "VCMP.E.GE.F32", - arm_VCMP_E_LT_F32: "VCMP.E.LT.F32", - arm_VCMP_E_GT_F32: "VCMP.E.GT.F32", - arm_VCMP_E_LE_F32: "VCMP.E.LE.F32", - arm_VCMP_E_F32: "VCMP.E.F32", - arm_VCMP_E_ZZ_F32: "VCMP.E.ZZ.F32", - arm_VCMP_E_EQ_F64: "VCMP.E.EQ.F64", - arm_VCMP_E_NE_F64: "VCMP.E.NE.F64", - arm_VCMP_E_CS_F64: "VCMP.E.CS.F64", - arm_VCMP_E_CC_F64: "VCMP.E.CC.F64", - arm_VCMP_E_MI_F64: "VCMP.E.MI.F64", - arm_VCMP_E_PL_F64: "VCMP.E.PL.F64", - arm_VCMP_E_VS_F64: "VCMP.E.VS.F64", - arm_VCMP_E_VC_F64: "VCMP.E.VC.F64", - arm_VCMP_E_HI_F64: "VCMP.E.HI.F64", - arm_VCMP_E_LS_F64: "VCMP.E.LS.F64", - arm_VCMP_E_GE_F64: "VCMP.E.GE.F64", - arm_VCMP_E_LT_F64: "VCMP.E.LT.F64", - arm_VCMP_E_GT_F64: "VCMP.E.GT.F64", - arm_VCMP_E_LE_F64: "VCMP.E.LE.F64", - arm_VCMP_E_F64: "VCMP.E.F64", - arm_VCMP_E_ZZ_F64: "VCMP.E.ZZ.F64", - arm_VCVT_EQ_F32_FXS16: "VCVT.EQ.F32.FXS16", - arm_VCVT_NE_F32_FXS16: "VCVT.NE.F32.FXS16", - arm_VCVT_CS_F32_FXS16: "VCVT.CS.F32.FXS16", - arm_VCVT_CC_F32_FXS16: "VCVT.CC.F32.FXS16", - arm_VCVT_MI_F32_FXS16: "VCVT.MI.F32.FXS16", - arm_VCVT_PL_F32_FXS16: "VCVT.PL.F32.FXS16", - arm_VCVT_VS_F32_FXS16: "VCVT.VS.F32.FXS16", - arm_VCVT_VC_F32_FXS16: "VCVT.VC.F32.FXS16", - arm_VCVT_HI_F32_FXS16: "VCVT.HI.F32.FXS16", - arm_VCVT_LS_F32_FXS16: "VCVT.LS.F32.FXS16", - arm_VCVT_GE_F32_FXS16: "VCVT.GE.F32.FXS16", - arm_VCVT_LT_F32_FXS16: "VCVT.LT.F32.FXS16", - arm_VCVT_GT_F32_FXS16: "VCVT.GT.F32.FXS16", - arm_VCVT_LE_F32_FXS16: "VCVT.LE.F32.FXS16", - arm_VCVT_F32_FXS16: "VCVT.F32.FXS16", - arm_VCVT_ZZ_F32_FXS16: "VCVT.ZZ.F32.FXS16", - arm_VCVT_EQ_F32_FXS32: "VCVT.EQ.F32.FXS32", - arm_VCVT_NE_F32_FXS32: "VCVT.NE.F32.FXS32", - arm_VCVT_CS_F32_FXS32: "VCVT.CS.F32.FXS32", - arm_VCVT_CC_F32_FXS32: "VCVT.CC.F32.FXS32", - arm_VCVT_MI_F32_FXS32: "VCVT.MI.F32.FXS32", - arm_VCVT_PL_F32_FXS32: "VCVT.PL.F32.FXS32", - arm_VCVT_VS_F32_FXS32: "VCVT.VS.F32.FXS32", - arm_VCVT_VC_F32_FXS32: "VCVT.VC.F32.FXS32", - arm_VCVT_HI_F32_FXS32: "VCVT.HI.F32.FXS32", - arm_VCVT_LS_F32_FXS32: "VCVT.LS.F32.FXS32", - arm_VCVT_GE_F32_FXS32: "VCVT.GE.F32.FXS32", - arm_VCVT_LT_F32_FXS32: "VCVT.LT.F32.FXS32", - arm_VCVT_GT_F32_FXS32: "VCVT.GT.F32.FXS32", - arm_VCVT_LE_F32_FXS32: "VCVT.LE.F32.FXS32", - arm_VCVT_F32_FXS32: "VCVT.F32.FXS32", - arm_VCVT_ZZ_F32_FXS32: "VCVT.ZZ.F32.FXS32", - arm_VCVT_EQ_F32_FXU16: "VCVT.EQ.F32.FXU16", - arm_VCVT_NE_F32_FXU16: "VCVT.NE.F32.FXU16", - arm_VCVT_CS_F32_FXU16: "VCVT.CS.F32.FXU16", - arm_VCVT_CC_F32_FXU16: "VCVT.CC.F32.FXU16", - arm_VCVT_MI_F32_FXU16: "VCVT.MI.F32.FXU16", - arm_VCVT_PL_F32_FXU16: "VCVT.PL.F32.FXU16", - arm_VCVT_VS_F32_FXU16: "VCVT.VS.F32.FXU16", - arm_VCVT_VC_F32_FXU16: "VCVT.VC.F32.FXU16", - arm_VCVT_HI_F32_FXU16: "VCVT.HI.F32.FXU16", - arm_VCVT_LS_F32_FXU16: "VCVT.LS.F32.FXU16", - arm_VCVT_GE_F32_FXU16: "VCVT.GE.F32.FXU16", - arm_VCVT_LT_F32_FXU16: "VCVT.LT.F32.FXU16", - arm_VCVT_GT_F32_FXU16: "VCVT.GT.F32.FXU16", - arm_VCVT_LE_F32_FXU16: "VCVT.LE.F32.FXU16", - arm_VCVT_F32_FXU16: "VCVT.F32.FXU16", - arm_VCVT_ZZ_F32_FXU16: "VCVT.ZZ.F32.FXU16", - arm_VCVT_EQ_F32_FXU32: "VCVT.EQ.F32.FXU32", - arm_VCVT_NE_F32_FXU32: "VCVT.NE.F32.FXU32", - arm_VCVT_CS_F32_FXU32: "VCVT.CS.F32.FXU32", - arm_VCVT_CC_F32_FXU32: "VCVT.CC.F32.FXU32", - arm_VCVT_MI_F32_FXU32: "VCVT.MI.F32.FXU32", - arm_VCVT_PL_F32_FXU32: "VCVT.PL.F32.FXU32", - arm_VCVT_VS_F32_FXU32: "VCVT.VS.F32.FXU32", - arm_VCVT_VC_F32_FXU32: "VCVT.VC.F32.FXU32", - arm_VCVT_HI_F32_FXU32: "VCVT.HI.F32.FXU32", - arm_VCVT_LS_F32_FXU32: "VCVT.LS.F32.FXU32", - arm_VCVT_GE_F32_FXU32: "VCVT.GE.F32.FXU32", - arm_VCVT_LT_F32_FXU32: "VCVT.LT.F32.FXU32", - arm_VCVT_GT_F32_FXU32: "VCVT.GT.F32.FXU32", - arm_VCVT_LE_F32_FXU32: "VCVT.LE.F32.FXU32", - arm_VCVT_F32_FXU32: "VCVT.F32.FXU32", - arm_VCVT_ZZ_F32_FXU32: "VCVT.ZZ.F32.FXU32", - arm_VCVT_EQ_F64_FXS16: "VCVT.EQ.F64.FXS16", - arm_VCVT_NE_F64_FXS16: "VCVT.NE.F64.FXS16", - arm_VCVT_CS_F64_FXS16: "VCVT.CS.F64.FXS16", - arm_VCVT_CC_F64_FXS16: "VCVT.CC.F64.FXS16", - arm_VCVT_MI_F64_FXS16: "VCVT.MI.F64.FXS16", - arm_VCVT_PL_F64_FXS16: "VCVT.PL.F64.FXS16", - arm_VCVT_VS_F64_FXS16: "VCVT.VS.F64.FXS16", - arm_VCVT_VC_F64_FXS16: "VCVT.VC.F64.FXS16", - arm_VCVT_HI_F64_FXS16: "VCVT.HI.F64.FXS16", - arm_VCVT_LS_F64_FXS16: "VCVT.LS.F64.FXS16", - arm_VCVT_GE_F64_FXS16: "VCVT.GE.F64.FXS16", - arm_VCVT_LT_F64_FXS16: "VCVT.LT.F64.FXS16", - arm_VCVT_GT_F64_FXS16: "VCVT.GT.F64.FXS16", - arm_VCVT_LE_F64_FXS16: "VCVT.LE.F64.FXS16", - arm_VCVT_F64_FXS16: "VCVT.F64.FXS16", - arm_VCVT_ZZ_F64_FXS16: "VCVT.ZZ.F64.FXS16", - arm_VCVT_EQ_F64_FXS32: "VCVT.EQ.F64.FXS32", - arm_VCVT_NE_F64_FXS32: "VCVT.NE.F64.FXS32", - arm_VCVT_CS_F64_FXS32: "VCVT.CS.F64.FXS32", - arm_VCVT_CC_F64_FXS32: "VCVT.CC.F64.FXS32", - arm_VCVT_MI_F64_FXS32: "VCVT.MI.F64.FXS32", - arm_VCVT_PL_F64_FXS32: "VCVT.PL.F64.FXS32", - arm_VCVT_VS_F64_FXS32: "VCVT.VS.F64.FXS32", - arm_VCVT_VC_F64_FXS32: "VCVT.VC.F64.FXS32", - arm_VCVT_HI_F64_FXS32: "VCVT.HI.F64.FXS32", - arm_VCVT_LS_F64_FXS32: "VCVT.LS.F64.FXS32", - arm_VCVT_GE_F64_FXS32: "VCVT.GE.F64.FXS32", - arm_VCVT_LT_F64_FXS32: "VCVT.LT.F64.FXS32", - arm_VCVT_GT_F64_FXS32: "VCVT.GT.F64.FXS32", - arm_VCVT_LE_F64_FXS32: "VCVT.LE.F64.FXS32", - arm_VCVT_F64_FXS32: "VCVT.F64.FXS32", - arm_VCVT_ZZ_F64_FXS32: "VCVT.ZZ.F64.FXS32", - arm_VCVT_EQ_F64_FXU16: "VCVT.EQ.F64.FXU16", - arm_VCVT_NE_F64_FXU16: "VCVT.NE.F64.FXU16", - arm_VCVT_CS_F64_FXU16: "VCVT.CS.F64.FXU16", - arm_VCVT_CC_F64_FXU16: "VCVT.CC.F64.FXU16", - arm_VCVT_MI_F64_FXU16: "VCVT.MI.F64.FXU16", - arm_VCVT_PL_F64_FXU16: "VCVT.PL.F64.FXU16", - arm_VCVT_VS_F64_FXU16: "VCVT.VS.F64.FXU16", - arm_VCVT_VC_F64_FXU16: "VCVT.VC.F64.FXU16", - arm_VCVT_HI_F64_FXU16: "VCVT.HI.F64.FXU16", - arm_VCVT_LS_F64_FXU16: "VCVT.LS.F64.FXU16", - arm_VCVT_GE_F64_FXU16: "VCVT.GE.F64.FXU16", - arm_VCVT_LT_F64_FXU16: "VCVT.LT.F64.FXU16", - arm_VCVT_GT_F64_FXU16: "VCVT.GT.F64.FXU16", - arm_VCVT_LE_F64_FXU16: "VCVT.LE.F64.FXU16", - arm_VCVT_F64_FXU16: "VCVT.F64.FXU16", - arm_VCVT_ZZ_F64_FXU16: "VCVT.ZZ.F64.FXU16", - arm_VCVT_EQ_F64_FXU32: "VCVT.EQ.F64.FXU32", - arm_VCVT_NE_F64_FXU32: "VCVT.NE.F64.FXU32", - arm_VCVT_CS_F64_FXU32: "VCVT.CS.F64.FXU32", - arm_VCVT_CC_F64_FXU32: "VCVT.CC.F64.FXU32", - arm_VCVT_MI_F64_FXU32: "VCVT.MI.F64.FXU32", - arm_VCVT_PL_F64_FXU32: "VCVT.PL.F64.FXU32", - arm_VCVT_VS_F64_FXU32: "VCVT.VS.F64.FXU32", - arm_VCVT_VC_F64_FXU32: "VCVT.VC.F64.FXU32", - arm_VCVT_HI_F64_FXU32: "VCVT.HI.F64.FXU32", - arm_VCVT_LS_F64_FXU32: "VCVT.LS.F64.FXU32", - arm_VCVT_GE_F64_FXU32: "VCVT.GE.F64.FXU32", - arm_VCVT_LT_F64_FXU32: "VCVT.LT.F64.FXU32", - arm_VCVT_GT_F64_FXU32: "VCVT.GT.F64.FXU32", - arm_VCVT_LE_F64_FXU32: "VCVT.LE.F64.FXU32", - arm_VCVT_F64_FXU32: "VCVT.F64.FXU32", - arm_VCVT_ZZ_F64_FXU32: "VCVT.ZZ.F64.FXU32", - arm_VCVT_EQ_F32_U32: "VCVT.EQ.F32.U32", - arm_VCVT_NE_F32_U32: "VCVT.NE.F32.U32", - arm_VCVT_CS_F32_U32: "VCVT.CS.F32.U32", - arm_VCVT_CC_F32_U32: "VCVT.CC.F32.U32", - arm_VCVT_MI_F32_U32: "VCVT.MI.F32.U32", - arm_VCVT_PL_F32_U32: "VCVT.PL.F32.U32", - arm_VCVT_VS_F32_U32: "VCVT.VS.F32.U32", - arm_VCVT_VC_F32_U32: "VCVT.VC.F32.U32", - arm_VCVT_HI_F32_U32: "VCVT.HI.F32.U32", - arm_VCVT_LS_F32_U32: "VCVT.LS.F32.U32", - arm_VCVT_GE_F32_U32: "VCVT.GE.F32.U32", - arm_VCVT_LT_F32_U32: "VCVT.LT.F32.U32", - arm_VCVT_GT_F32_U32: "VCVT.GT.F32.U32", - arm_VCVT_LE_F32_U32: "VCVT.LE.F32.U32", - arm_VCVT_F32_U32: "VCVT.F32.U32", - arm_VCVT_ZZ_F32_U32: "VCVT.ZZ.F32.U32", - arm_VCVT_EQ_F32_S32: "VCVT.EQ.F32.S32", - arm_VCVT_NE_F32_S32: "VCVT.NE.F32.S32", - arm_VCVT_CS_F32_S32: "VCVT.CS.F32.S32", - arm_VCVT_CC_F32_S32: "VCVT.CC.F32.S32", - arm_VCVT_MI_F32_S32: "VCVT.MI.F32.S32", - arm_VCVT_PL_F32_S32: "VCVT.PL.F32.S32", - arm_VCVT_VS_F32_S32: "VCVT.VS.F32.S32", - arm_VCVT_VC_F32_S32: "VCVT.VC.F32.S32", - arm_VCVT_HI_F32_S32: "VCVT.HI.F32.S32", - arm_VCVT_LS_F32_S32: "VCVT.LS.F32.S32", - arm_VCVT_GE_F32_S32: "VCVT.GE.F32.S32", - arm_VCVT_LT_F32_S32: "VCVT.LT.F32.S32", - arm_VCVT_GT_F32_S32: "VCVT.GT.F32.S32", - arm_VCVT_LE_F32_S32: "VCVT.LE.F32.S32", - arm_VCVT_F32_S32: "VCVT.F32.S32", - arm_VCVT_ZZ_F32_S32: "VCVT.ZZ.F32.S32", - arm_VCVT_EQ_F64_U32: "VCVT.EQ.F64.U32", - arm_VCVT_NE_F64_U32: "VCVT.NE.F64.U32", - arm_VCVT_CS_F64_U32: "VCVT.CS.F64.U32", - arm_VCVT_CC_F64_U32: "VCVT.CC.F64.U32", - arm_VCVT_MI_F64_U32: "VCVT.MI.F64.U32", - arm_VCVT_PL_F64_U32: "VCVT.PL.F64.U32", - arm_VCVT_VS_F64_U32: "VCVT.VS.F64.U32", - arm_VCVT_VC_F64_U32: "VCVT.VC.F64.U32", - arm_VCVT_HI_F64_U32: "VCVT.HI.F64.U32", - arm_VCVT_LS_F64_U32: "VCVT.LS.F64.U32", - arm_VCVT_GE_F64_U32: "VCVT.GE.F64.U32", - arm_VCVT_LT_F64_U32: "VCVT.LT.F64.U32", - arm_VCVT_GT_F64_U32: "VCVT.GT.F64.U32", - arm_VCVT_LE_F64_U32: "VCVT.LE.F64.U32", - arm_VCVT_F64_U32: "VCVT.F64.U32", - arm_VCVT_ZZ_F64_U32: "VCVT.ZZ.F64.U32", - arm_VCVT_EQ_F64_S32: "VCVT.EQ.F64.S32", - arm_VCVT_NE_F64_S32: "VCVT.NE.F64.S32", - arm_VCVT_CS_F64_S32: "VCVT.CS.F64.S32", - arm_VCVT_CC_F64_S32: "VCVT.CC.F64.S32", - arm_VCVT_MI_F64_S32: "VCVT.MI.F64.S32", - arm_VCVT_PL_F64_S32: "VCVT.PL.F64.S32", - arm_VCVT_VS_F64_S32: "VCVT.VS.F64.S32", - arm_VCVT_VC_F64_S32: "VCVT.VC.F64.S32", - arm_VCVT_HI_F64_S32: "VCVT.HI.F64.S32", - arm_VCVT_LS_F64_S32: "VCVT.LS.F64.S32", - arm_VCVT_GE_F64_S32: "VCVT.GE.F64.S32", - arm_VCVT_LT_F64_S32: "VCVT.LT.F64.S32", - arm_VCVT_GT_F64_S32: "VCVT.GT.F64.S32", - arm_VCVT_LE_F64_S32: "VCVT.LE.F64.S32", - arm_VCVT_F64_S32: "VCVT.F64.S32", - arm_VCVT_ZZ_F64_S32: "VCVT.ZZ.F64.S32", - arm_VCVT_EQ_F64_F32: "VCVT.EQ.F64.F32", - arm_VCVT_NE_F64_F32: "VCVT.NE.F64.F32", - arm_VCVT_CS_F64_F32: "VCVT.CS.F64.F32", - arm_VCVT_CC_F64_F32: "VCVT.CC.F64.F32", - arm_VCVT_MI_F64_F32: "VCVT.MI.F64.F32", - arm_VCVT_PL_F64_F32: "VCVT.PL.F64.F32", - arm_VCVT_VS_F64_F32: "VCVT.VS.F64.F32", - arm_VCVT_VC_F64_F32: "VCVT.VC.F64.F32", - arm_VCVT_HI_F64_F32: "VCVT.HI.F64.F32", - arm_VCVT_LS_F64_F32: "VCVT.LS.F64.F32", - arm_VCVT_GE_F64_F32: "VCVT.GE.F64.F32", - arm_VCVT_LT_F64_F32: "VCVT.LT.F64.F32", - arm_VCVT_GT_F64_F32: "VCVT.GT.F64.F32", - arm_VCVT_LE_F64_F32: "VCVT.LE.F64.F32", - arm_VCVT_F64_F32: "VCVT.F64.F32", - arm_VCVT_ZZ_F64_F32: "VCVT.ZZ.F64.F32", - arm_VCVT_EQ_F32_F64: "VCVT.EQ.F32.F64", - arm_VCVT_NE_F32_F64: "VCVT.NE.F32.F64", - arm_VCVT_CS_F32_F64: "VCVT.CS.F32.F64", - arm_VCVT_CC_F32_F64: "VCVT.CC.F32.F64", - arm_VCVT_MI_F32_F64: "VCVT.MI.F32.F64", - arm_VCVT_PL_F32_F64: "VCVT.PL.F32.F64", - arm_VCVT_VS_F32_F64: "VCVT.VS.F32.F64", - arm_VCVT_VC_F32_F64: "VCVT.VC.F32.F64", - arm_VCVT_HI_F32_F64: "VCVT.HI.F32.F64", - arm_VCVT_LS_F32_F64: "VCVT.LS.F32.F64", - arm_VCVT_GE_F32_F64: "VCVT.GE.F32.F64", - arm_VCVT_LT_F32_F64: "VCVT.LT.F32.F64", - arm_VCVT_GT_F32_F64: "VCVT.GT.F32.F64", - arm_VCVT_LE_F32_F64: "VCVT.LE.F32.F64", - arm_VCVT_F32_F64: "VCVT.F32.F64", - arm_VCVT_ZZ_F32_F64: "VCVT.ZZ.F32.F64", - arm_VCVT_EQ_FXS16_F32: "VCVT.EQ.FXS16.F32", - arm_VCVT_NE_FXS16_F32: "VCVT.NE.FXS16.F32", - arm_VCVT_CS_FXS16_F32: "VCVT.CS.FXS16.F32", - arm_VCVT_CC_FXS16_F32: "VCVT.CC.FXS16.F32", - arm_VCVT_MI_FXS16_F32: "VCVT.MI.FXS16.F32", - arm_VCVT_PL_FXS16_F32: "VCVT.PL.FXS16.F32", - arm_VCVT_VS_FXS16_F32: "VCVT.VS.FXS16.F32", - arm_VCVT_VC_FXS16_F32: "VCVT.VC.FXS16.F32", - arm_VCVT_HI_FXS16_F32: "VCVT.HI.FXS16.F32", - arm_VCVT_LS_FXS16_F32: "VCVT.LS.FXS16.F32", - arm_VCVT_GE_FXS16_F32: "VCVT.GE.FXS16.F32", - arm_VCVT_LT_FXS16_F32: "VCVT.LT.FXS16.F32", - arm_VCVT_GT_FXS16_F32: "VCVT.GT.FXS16.F32", - arm_VCVT_LE_FXS16_F32: "VCVT.LE.FXS16.F32", - arm_VCVT_FXS16_F32: "VCVT.FXS16.F32", - arm_VCVT_ZZ_FXS16_F32: "VCVT.ZZ.FXS16.F32", - arm_VCVT_EQ_FXS16_F64: "VCVT.EQ.FXS16.F64", - arm_VCVT_NE_FXS16_F64: "VCVT.NE.FXS16.F64", - arm_VCVT_CS_FXS16_F64: "VCVT.CS.FXS16.F64", - arm_VCVT_CC_FXS16_F64: "VCVT.CC.FXS16.F64", - arm_VCVT_MI_FXS16_F64: "VCVT.MI.FXS16.F64", - arm_VCVT_PL_FXS16_F64: "VCVT.PL.FXS16.F64", - arm_VCVT_VS_FXS16_F64: "VCVT.VS.FXS16.F64", - arm_VCVT_VC_FXS16_F64: "VCVT.VC.FXS16.F64", - arm_VCVT_HI_FXS16_F64: "VCVT.HI.FXS16.F64", - arm_VCVT_LS_FXS16_F64: "VCVT.LS.FXS16.F64", - arm_VCVT_GE_FXS16_F64: "VCVT.GE.FXS16.F64", - arm_VCVT_LT_FXS16_F64: "VCVT.LT.FXS16.F64", - arm_VCVT_GT_FXS16_F64: "VCVT.GT.FXS16.F64", - arm_VCVT_LE_FXS16_F64: "VCVT.LE.FXS16.F64", - arm_VCVT_FXS16_F64: "VCVT.FXS16.F64", - arm_VCVT_ZZ_FXS16_F64: "VCVT.ZZ.FXS16.F64", - arm_VCVT_EQ_FXS32_F32: "VCVT.EQ.FXS32.F32", - arm_VCVT_NE_FXS32_F32: "VCVT.NE.FXS32.F32", - arm_VCVT_CS_FXS32_F32: "VCVT.CS.FXS32.F32", - arm_VCVT_CC_FXS32_F32: "VCVT.CC.FXS32.F32", - arm_VCVT_MI_FXS32_F32: "VCVT.MI.FXS32.F32", - arm_VCVT_PL_FXS32_F32: "VCVT.PL.FXS32.F32", - arm_VCVT_VS_FXS32_F32: "VCVT.VS.FXS32.F32", - arm_VCVT_VC_FXS32_F32: "VCVT.VC.FXS32.F32", - arm_VCVT_HI_FXS32_F32: "VCVT.HI.FXS32.F32", - arm_VCVT_LS_FXS32_F32: "VCVT.LS.FXS32.F32", - arm_VCVT_GE_FXS32_F32: "VCVT.GE.FXS32.F32", - arm_VCVT_LT_FXS32_F32: "VCVT.LT.FXS32.F32", - arm_VCVT_GT_FXS32_F32: "VCVT.GT.FXS32.F32", - arm_VCVT_LE_FXS32_F32: "VCVT.LE.FXS32.F32", - arm_VCVT_FXS32_F32: "VCVT.FXS32.F32", - arm_VCVT_ZZ_FXS32_F32: "VCVT.ZZ.FXS32.F32", - arm_VCVT_EQ_FXS32_F64: "VCVT.EQ.FXS32.F64", - arm_VCVT_NE_FXS32_F64: "VCVT.NE.FXS32.F64", - arm_VCVT_CS_FXS32_F64: "VCVT.CS.FXS32.F64", - arm_VCVT_CC_FXS32_F64: "VCVT.CC.FXS32.F64", - arm_VCVT_MI_FXS32_F64: "VCVT.MI.FXS32.F64", - arm_VCVT_PL_FXS32_F64: "VCVT.PL.FXS32.F64", - arm_VCVT_VS_FXS32_F64: "VCVT.VS.FXS32.F64", - arm_VCVT_VC_FXS32_F64: "VCVT.VC.FXS32.F64", - arm_VCVT_HI_FXS32_F64: "VCVT.HI.FXS32.F64", - arm_VCVT_LS_FXS32_F64: "VCVT.LS.FXS32.F64", - arm_VCVT_GE_FXS32_F64: "VCVT.GE.FXS32.F64", - arm_VCVT_LT_FXS32_F64: "VCVT.LT.FXS32.F64", - arm_VCVT_GT_FXS32_F64: "VCVT.GT.FXS32.F64", - arm_VCVT_LE_FXS32_F64: "VCVT.LE.FXS32.F64", - arm_VCVT_FXS32_F64: "VCVT.FXS32.F64", - arm_VCVT_ZZ_FXS32_F64: "VCVT.ZZ.FXS32.F64", - arm_VCVT_EQ_FXU16_F32: "VCVT.EQ.FXU16.F32", - arm_VCVT_NE_FXU16_F32: "VCVT.NE.FXU16.F32", - arm_VCVT_CS_FXU16_F32: "VCVT.CS.FXU16.F32", - arm_VCVT_CC_FXU16_F32: "VCVT.CC.FXU16.F32", - arm_VCVT_MI_FXU16_F32: "VCVT.MI.FXU16.F32", - arm_VCVT_PL_FXU16_F32: "VCVT.PL.FXU16.F32", - arm_VCVT_VS_FXU16_F32: "VCVT.VS.FXU16.F32", - arm_VCVT_VC_FXU16_F32: "VCVT.VC.FXU16.F32", - arm_VCVT_HI_FXU16_F32: "VCVT.HI.FXU16.F32", - arm_VCVT_LS_FXU16_F32: "VCVT.LS.FXU16.F32", - arm_VCVT_GE_FXU16_F32: "VCVT.GE.FXU16.F32", - arm_VCVT_LT_FXU16_F32: "VCVT.LT.FXU16.F32", - arm_VCVT_GT_FXU16_F32: "VCVT.GT.FXU16.F32", - arm_VCVT_LE_FXU16_F32: "VCVT.LE.FXU16.F32", - arm_VCVT_FXU16_F32: "VCVT.FXU16.F32", - arm_VCVT_ZZ_FXU16_F32: "VCVT.ZZ.FXU16.F32", - arm_VCVT_EQ_FXU16_F64: "VCVT.EQ.FXU16.F64", - arm_VCVT_NE_FXU16_F64: "VCVT.NE.FXU16.F64", - arm_VCVT_CS_FXU16_F64: "VCVT.CS.FXU16.F64", - arm_VCVT_CC_FXU16_F64: "VCVT.CC.FXU16.F64", - arm_VCVT_MI_FXU16_F64: "VCVT.MI.FXU16.F64", - arm_VCVT_PL_FXU16_F64: "VCVT.PL.FXU16.F64", - arm_VCVT_VS_FXU16_F64: "VCVT.VS.FXU16.F64", - arm_VCVT_VC_FXU16_F64: "VCVT.VC.FXU16.F64", - arm_VCVT_HI_FXU16_F64: "VCVT.HI.FXU16.F64", - arm_VCVT_LS_FXU16_F64: "VCVT.LS.FXU16.F64", - arm_VCVT_GE_FXU16_F64: "VCVT.GE.FXU16.F64", - arm_VCVT_LT_FXU16_F64: "VCVT.LT.FXU16.F64", - arm_VCVT_GT_FXU16_F64: "VCVT.GT.FXU16.F64", - arm_VCVT_LE_FXU16_F64: "VCVT.LE.FXU16.F64", - arm_VCVT_FXU16_F64: "VCVT.FXU16.F64", - arm_VCVT_ZZ_FXU16_F64: "VCVT.ZZ.FXU16.F64", - arm_VCVT_EQ_FXU32_F32: "VCVT.EQ.FXU32.F32", - arm_VCVT_NE_FXU32_F32: "VCVT.NE.FXU32.F32", - arm_VCVT_CS_FXU32_F32: "VCVT.CS.FXU32.F32", - arm_VCVT_CC_FXU32_F32: "VCVT.CC.FXU32.F32", - arm_VCVT_MI_FXU32_F32: "VCVT.MI.FXU32.F32", - arm_VCVT_PL_FXU32_F32: "VCVT.PL.FXU32.F32", - arm_VCVT_VS_FXU32_F32: "VCVT.VS.FXU32.F32", - arm_VCVT_VC_FXU32_F32: "VCVT.VC.FXU32.F32", - arm_VCVT_HI_FXU32_F32: "VCVT.HI.FXU32.F32", - arm_VCVT_LS_FXU32_F32: "VCVT.LS.FXU32.F32", - arm_VCVT_GE_FXU32_F32: "VCVT.GE.FXU32.F32", - arm_VCVT_LT_FXU32_F32: "VCVT.LT.FXU32.F32", - arm_VCVT_GT_FXU32_F32: "VCVT.GT.FXU32.F32", - arm_VCVT_LE_FXU32_F32: "VCVT.LE.FXU32.F32", - arm_VCVT_FXU32_F32: "VCVT.FXU32.F32", - arm_VCVT_ZZ_FXU32_F32: "VCVT.ZZ.FXU32.F32", - arm_VCVT_EQ_FXU32_F64: "VCVT.EQ.FXU32.F64", - arm_VCVT_NE_FXU32_F64: "VCVT.NE.FXU32.F64", - arm_VCVT_CS_FXU32_F64: "VCVT.CS.FXU32.F64", - arm_VCVT_CC_FXU32_F64: "VCVT.CC.FXU32.F64", - arm_VCVT_MI_FXU32_F64: "VCVT.MI.FXU32.F64", - arm_VCVT_PL_FXU32_F64: "VCVT.PL.FXU32.F64", - arm_VCVT_VS_FXU32_F64: "VCVT.VS.FXU32.F64", - arm_VCVT_VC_FXU32_F64: "VCVT.VC.FXU32.F64", - arm_VCVT_HI_FXU32_F64: "VCVT.HI.FXU32.F64", - arm_VCVT_LS_FXU32_F64: "VCVT.LS.FXU32.F64", - arm_VCVT_GE_FXU32_F64: "VCVT.GE.FXU32.F64", - arm_VCVT_LT_FXU32_F64: "VCVT.LT.FXU32.F64", - arm_VCVT_GT_FXU32_F64: "VCVT.GT.FXU32.F64", - arm_VCVT_LE_FXU32_F64: "VCVT.LE.FXU32.F64", - arm_VCVT_FXU32_F64: "VCVT.FXU32.F64", - arm_VCVT_ZZ_FXU32_F64: "VCVT.ZZ.FXU32.F64", - arm_VCVTB_EQ_F32_F16: "VCVTB.EQ.F32.F16", - arm_VCVTB_NE_F32_F16: "VCVTB.NE.F32.F16", - arm_VCVTB_CS_F32_F16: "VCVTB.CS.F32.F16", - arm_VCVTB_CC_F32_F16: "VCVTB.CC.F32.F16", - arm_VCVTB_MI_F32_F16: "VCVTB.MI.F32.F16", - arm_VCVTB_PL_F32_F16: "VCVTB.PL.F32.F16", - arm_VCVTB_VS_F32_F16: "VCVTB.VS.F32.F16", - arm_VCVTB_VC_F32_F16: "VCVTB.VC.F32.F16", - arm_VCVTB_HI_F32_F16: "VCVTB.HI.F32.F16", - arm_VCVTB_LS_F32_F16: "VCVTB.LS.F32.F16", - arm_VCVTB_GE_F32_F16: "VCVTB.GE.F32.F16", - arm_VCVTB_LT_F32_F16: "VCVTB.LT.F32.F16", - arm_VCVTB_GT_F32_F16: "VCVTB.GT.F32.F16", - arm_VCVTB_LE_F32_F16: "VCVTB.LE.F32.F16", - arm_VCVTB_F32_F16: "VCVTB.F32.F16", - arm_VCVTB_ZZ_F32_F16: "VCVTB.ZZ.F32.F16", - arm_VCVTB_EQ_F16_F32: "VCVTB.EQ.F16.F32", - arm_VCVTB_NE_F16_F32: "VCVTB.NE.F16.F32", - arm_VCVTB_CS_F16_F32: "VCVTB.CS.F16.F32", - arm_VCVTB_CC_F16_F32: "VCVTB.CC.F16.F32", - arm_VCVTB_MI_F16_F32: "VCVTB.MI.F16.F32", - arm_VCVTB_PL_F16_F32: "VCVTB.PL.F16.F32", - arm_VCVTB_VS_F16_F32: "VCVTB.VS.F16.F32", - arm_VCVTB_VC_F16_F32: "VCVTB.VC.F16.F32", - arm_VCVTB_HI_F16_F32: "VCVTB.HI.F16.F32", - arm_VCVTB_LS_F16_F32: "VCVTB.LS.F16.F32", - arm_VCVTB_GE_F16_F32: "VCVTB.GE.F16.F32", - arm_VCVTB_LT_F16_F32: "VCVTB.LT.F16.F32", - arm_VCVTB_GT_F16_F32: "VCVTB.GT.F16.F32", - arm_VCVTB_LE_F16_F32: "VCVTB.LE.F16.F32", - arm_VCVTB_F16_F32: "VCVTB.F16.F32", - arm_VCVTB_ZZ_F16_F32: "VCVTB.ZZ.F16.F32", - arm_VCVTT_EQ_F32_F16: "VCVTT.EQ.F32.F16", - arm_VCVTT_NE_F32_F16: "VCVTT.NE.F32.F16", - arm_VCVTT_CS_F32_F16: "VCVTT.CS.F32.F16", - arm_VCVTT_CC_F32_F16: "VCVTT.CC.F32.F16", - arm_VCVTT_MI_F32_F16: "VCVTT.MI.F32.F16", - arm_VCVTT_PL_F32_F16: "VCVTT.PL.F32.F16", - arm_VCVTT_VS_F32_F16: "VCVTT.VS.F32.F16", - arm_VCVTT_VC_F32_F16: "VCVTT.VC.F32.F16", - arm_VCVTT_HI_F32_F16: "VCVTT.HI.F32.F16", - arm_VCVTT_LS_F32_F16: "VCVTT.LS.F32.F16", - arm_VCVTT_GE_F32_F16: "VCVTT.GE.F32.F16", - arm_VCVTT_LT_F32_F16: "VCVTT.LT.F32.F16", - arm_VCVTT_GT_F32_F16: "VCVTT.GT.F32.F16", - arm_VCVTT_LE_F32_F16: "VCVTT.LE.F32.F16", - arm_VCVTT_F32_F16: "VCVTT.F32.F16", - arm_VCVTT_ZZ_F32_F16: "VCVTT.ZZ.F32.F16", - arm_VCVTT_EQ_F16_F32: "VCVTT.EQ.F16.F32", - arm_VCVTT_NE_F16_F32: "VCVTT.NE.F16.F32", - arm_VCVTT_CS_F16_F32: "VCVTT.CS.F16.F32", - arm_VCVTT_CC_F16_F32: "VCVTT.CC.F16.F32", - arm_VCVTT_MI_F16_F32: "VCVTT.MI.F16.F32", - arm_VCVTT_PL_F16_F32: "VCVTT.PL.F16.F32", - arm_VCVTT_VS_F16_F32: "VCVTT.VS.F16.F32", - arm_VCVTT_VC_F16_F32: "VCVTT.VC.F16.F32", - arm_VCVTT_HI_F16_F32: "VCVTT.HI.F16.F32", - arm_VCVTT_LS_F16_F32: "VCVTT.LS.F16.F32", - arm_VCVTT_GE_F16_F32: "VCVTT.GE.F16.F32", - arm_VCVTT_LT_F16_F32: "VCVTT.LT.F16.F32", - arm_VCVTT_GT_F16_F32: "VCVTT.GT.F16.F32", - arm_VCVTT_LE_F16_F32: "VCVTT.LE.F16.F32", - arm_VCVTT_F16_F32: "VCVTT.F16.F32", - arm_VCVTT_ZZ_F16_F32: "VCVTT.ZZ.F16.F32", - arm_VCVTR_EQ_U32_F32: "VCVTR.EQ.U32.F32", - arm_VCVTR_NE_U32_F32: "VCVTR.NE.U32.F32", - arm_VCVTR_CS_U32_F32: "VCVTR.CS.U32.F32", - arm_VCVTR_CC_U32_F32: "VCVTR.CC.U32.F32", - arm_VCVTR_MI_U32_F32: "VCVTR.MI.U32.F32", - arm_VCVTR_PL_U32_F32: "VCVTR.PL.U32.F32", - arm_VCVTR_VS_U32_F32: "VCVTR.VS.U32.F32", - arm_VCVTR_VC_U32_F32: "VCVTR.VC.U32.F32", - arm_VCVTR_HI_U32_F32: "VCVTR.HI.U32.F32", - arm_VCVTR_LS_U32_F32: "VCVTR.LS.U32.F32", - arm_VCVTR_GE_U32_F32: "VCVTR.GE.U32.F32", - arm_VCVTR_LT_U32_F32: "VCVTR.LT.U32.F32", - arm_VCVTR_GT_U32_F32: "VCVTR.GT.U32.F32", - arm_VCVTR_LE_U32_F32: "VCVTR.LE.U32.F32", - arm_VCVTR_U32_F32: "VCVTR.U32.F32", - arm_VCVTR_ZZ_U32_F32: "VCVTR.ZZ.U32.F32", - arm_VCVTR_EQ_U32_F64: "VCVTR.EQ.U32.F64", - arm_VCVTR_NE_U32_F64: "VCVTR.NE.U32.F64", - arm_VCVTR_CS_U32_F64: "VCVTR.CS.U32.F64", - arm_VCVTR_CC_U32_F64: "VCVTR.CC.U32.F64", - arm_VCVTR_MI_U32_F64: "VCVTR.MI.U32.F64", - arm_VCVTR_PL_U32_F64: "VCVTR.PL.U32.F64", - arm_VCVTR_VS_U32_F64: "VCVTR.VS.U32.F64", - arm_VCVTR_VC_U32_F64: "VCVTR.VC.U32.F64", - arm_VCVTR_HI_U32_F64: "VCVTR.HI.U32.F64", - arm_VCVTR_LS_U32_F64: "VCVTR.LS.U32.F64", - arm_VCVTR_GE_U32_F64: "VCVTR.GE.U32.F64", - arm_VCVTR_LT_U32_F64: "VCVTR.LT.U32.F64", - arm_VCVTR_GT_U32_F64: "VCVTR.GT.U32.F64", - arm_VCVTR_LE_U32_F64: "VCVTR.LE.U32.F64", - arm_VCVTR_U32_F64: "VCVTR.U32.F64", - arm_VCVTR_ZZ_U32_F64: "VCVTR.ZZ.U32.F64", - arm_VCVTR_EQ_S32_F32: "VCVTR.EQ.S32.F32", - arm_VCVTR_NE_S32_F32: "VCVTR.NE.S32.F32", - arm_VCVTR_CS_S32_F32: "VCVTR.CS.S32.F32", - arm_VCVTR_CC_S32_F32: "VCVTR.CC.S32.F32", - arm_VCVTR_MI_S32_F32: "VCVTR.MI.S32.F32", - arm_VCVTR_PL_S32_F32: "VCVTR.PL.S32.F32", - arm_VCVTR_VS_S32_F32: "VCVTR.VS.S32.F32", - arm_VCVTR_VC_S32_F32: "VCVTR.VC.S32.F32", - arm_VCVTR_HI_S32_F32: "VCVTR.HI.S32.F32", - arm_VCVTR_LS_S32_F32: "VCVTR.LS.S32.F32", - arm_VCVTR_GE_S32_F32: "VCVTR.GE.S32.F32", - arm_VCVTR_LT_S32_F32: "VCVTR.LT.S32.F32", - arm_VCVTR_GT_S32_F32: "VCVTR.GT.S32.F32", - arm_VCVTR_LE_S32_F32: "VCVTR.LE.S32.F32", - arm_VCVTR_S32_F32: "VCVTR.S32.F32", - arm_VCVTR_ZZ_S32_F32: "VCVTR.ZZ.S32.F32", - arm_VCVTR_EQ_S32_F64: "VCVTR.EQ.S32.F64", - arm_VCVTR_NE_S32_F64: "VCVTR.NE.S32.F64", - arm_VCVTR_CS_S32_F64: "VCVTR.CS.S32.F64", - arm_VCVTR_CC_S32_F64: "VCVTR.CC.S32.F64", - arm_VCVTR_MI_S32_F64: "VCVTR.MI.S32.F64", - arm_VCVTR_PL_S32_F64: "VCVTR.PL.S32.F64", - arm_VCVTR_VS_S32_F64: "VCVTR.VS.S32.F64", - arm_VCVTR_VC_S32_F64: "VCVTR.VC.S32.F64", - arm_VCVTR_HI_S32_F64: "VCVTR.HI.S32.F64", - arm_VCVTR_LS_S32_F64: "VCVTR.LS.S32.F64", - arm_VCVTR_GE_S32_F64: "VCVTR.GE.S32.F64", - arm_VCVTR_LT_S32_F64: "VCVTR.LT.S32.F64", - arm_VCVTR_GT_S32_F64: "VCVTR.GT.S32.F64", - arm_VCVTR_LE_S32_F64: "VCVTR.LE.S32.F64", - arm_VCVTR_S32_F64: "VCVTR.S32.F64", - arm_VCVTR_ZZ_S32_F64: "VCVTR.ZZ.S32.F64", - arm_VCVT_EQ_U32_F32: "VCVT.EQ.U32.F32", - arm_VCVT_NE_U32_F32: "VCVT.NE.U32.F32", - arm_VCVT_CS_U32_F32: "VCVT.CS.U32.F32", - arm_VCVT_CC_U32_F32: "VCVT.CC.U32.F32", - arm_VCVT_MI_U32_F32: "VCVT.MI.U32.F32", - arm_VCVT_PL_U32_F32: "VCVT.PL.U32.F32", - arm_VCVT_VS_U32_F32: "VCVT.VS.U32.F32", - arm_VCVT_VC_U32_F32: "VCVT.VC.U32.F32", - arm_VCVT_HI_U32_F32: "VCVT.HI.U32.F32", - arm_VCVT_LS_U32_F32: "VCVT.LS.U32.F32", - arm_VCVT_GE_U32_F32: "VCVT.GE.U32.F32", - arm_VCVT_LT_U32_F32: "VCVT.LT.U32.F32", - arm_VCVT_GT_U32_F32: "VCVT.GT.U32.F32", - arm_VCVT_LE_U32_F32: "VCVT.LE.U32.F32", - arm_VCVT_U32_F32: "VCVT.U32.F32", - arm_VCVT_ZZ_U32_F32: "VCVT.ZZ.U32.F32", - arm_VCVT_EQ_U32_F64: "VCVT.EQ.U32.F64", - arm_VCVT_NE_U32_F64: "VCVT.NE.U32.F64", - arm_VCVT_CS_U32_F64: "VCVT.CS.U32.F64", - arm_VCVT_CC_U32_F64: "VCVT.CC.U32.F64", - arm_VCVT_MI_U32_F64: "VCVT.MI.U32.F64", - arm_VCVT_PL_U32_F64: "VCVT.PL.U32.F64", - arm_VCVT_VS_U32_F64: "VCVT.VS.U32.F64", - arm_VCVT_VC_U32_F64: "VCVT.VC.U32.F64", - arm_VCVT_HI_U32_F64: "VCVT.HI.U32.F64", - arm_VCVT_LS_U32_F64: "VCVT.LS.U32.F64", - arm_VCVT_GE_U32_F64: "VCVT.GE.U32.F64", - arm_VCVT_LT_U32_F64: "VCVT.LT.U32.F64", - arm_VCVT_GT_U32_F64: "VCVT.GT.U32.F64", - arm_VCVT_LE_U32_F64: "VCVT.LE.U32.F64", - arm_VCVT_U32_F64: "VCVT.U32.F64", - arm_VCVT_ZZ_U32_F64: "VCVT.ZZ.U32.F64", - arm_VCVT_EQ_S32_F32: "VCVT.EQ.S32.F32", - arm_VCVT_NE_S32_F32: "VCVT.NE.S32.F32", - arm_VCVT_CS_S32_F32: "VCVT.CS.S32.F32", - arm_VCVT_CC_S32_F32: "VCVT.CC.S32.F32", - arm_VCVT_MI_S32_F32: "VCVT.MI.S32.F32", - arm_VCVT_PL_S32_F32: "VCVT.PL.S32.F32", - arm_VCVT_VS_S32_F32: "VCVT.VS.S32.F32", - arm_VCVT_VC_S32_F32: "VCVT.VC.S32.F32", - arm_VCVT_HI_S32_F32: "VCVT.HI.S32.F32", - arm_VCVT_LS_S32_F32: "VCVT.LS.S32.F32", - arm_VCVT_GE_S32_F32: "VCVT.GE.S32.F32", - arm_VCVT_LT_S32_F32: "VCVT.LT.S32.F32", - arm_VCVT_GT_S32_F32: "VCVT.GT.S32.F32", - arm_VCVT_LE_S32_F32: "VCVT.LE.S32.F32", - arm_VCVT_S32_F32: "VCVT.S32.F32", - arm_VCVT_ZZ_S32_F32: "VCVT.ZZ.S32.F32", - arm_VCVT_EQ_S32_F64: "VCVT.EQ.S32.F64", - arm_VCVT_NE_S32_F64: "VCVT.NE.S32.F64", - arm_VCVT_CS_S32_F64: "VCVT.CS.S32.F64", - arm_VCVT_CC_S32_F64: "VCVT.CC.S32.F64", - arm_VCVT_MI_S32_F64: "VCVT.MI.S32.F64", - arm_VCVT_PL_S32_F64: "VCVT.PL.S32.F64", - arm_VCVT_VS_S32_F64: "VCVT.VS.S32.F64", - arm_VCVT_VC_S32_F64: "VCVT.VC.S32.F64", - arm_VCVT_HI_S32_F64: "VCVT.HI.S32.F64", - arm_VCVT_LS_S32_F64: "VCVT.LS.S32.F64", - arm_VCVT_GE_S32_F64: "VCVT.GE.S32.F64", - arm_VCVT_LT_S32_F64: "VCVT.LT.S32.F64", - arm_VCVT_GT_S32_F64: "VCVT.GT.S32.F64", - arm_VCVT_LE_S32_F64: "VCVT.LE.S32.F64", - arm_VCVT_S32_F64: "VCVT.S32.F64", - arm_VCVT_ZZ_S32_F64: "VCVT.ZZ.S32.F64", - arm_VDIV_EQ_F32: "VDIV.EQ.F32", - arm_VDIV_NE_F32: "VDIV.NE.F32", - arm_VDIV_CS_F32: "VDIV.CS.F32", - arm_VDIV_CC_F32: "VDIV.CC.F32", - arm_VDIV_MI_F32: "VDIV.MI.F32", - arm_VDIV_PL_F32: "VDIV.PL.F32", - arm_VDIV_VS_F32: "VDIV.VS.F32", - arm_VDIV_VC_F32: "VDIV.VC.F32", - arm_VDIV_HI_F32: "VDIV.HI.F32", - arm_VDIV_LS_F32: "VDIV.LS.F32", - arm_VDIV_GE_F32: "VDIV.GE.F32", - arm_VDIV_LT_F32: "VDIV.LT.F32", - arm_VDIV_GT_F32: "VDIV.GT.F32", - arm_VDIV_LE_F32: "VDIV.LE.F32", - arm_VDIV_F32: "VDIV.F32", - arm_VDIV_ZZ_F32: "VDIV.ZZ.F32", - arm_VDIV_EQ_F64: "VDIV.EQ.F64", - arm_VDIV_NE_F64: "VDIV.NE.F64", - arm_VDIV_CS_F64: "VDIV.CS.F64", - arm_VDIV_CC_F64: "VDIV.CC.F64", - arm_VDIV_MI_F64: "VDIV.MI.F64", - arm_VDIV_PL_F64: "VDIV.PL.F64", - arm_VDIV_VS_F64: "VDIV.VS.F64", - arm_VDIV_VC_F64: "VDIV.VC.F64", - arm_VDIV_HI_F64: "VDIV.HI.F64", - arm_VDIV_LS_F64: "VDIV.LS.F64", - arm_VDIV_GE_F64: "VDIV.GE.F64", - arm_VDIV_LT_F64: "VDIV.LT.F64", - arm_VDIV_GT_F64: "VDIV.GT.F64", - arm_VDIV_LE_F64: "VDIV.LE.F64", - arm_VDIV_F64: "VDIV.F64", - arm_VDIV_ZZ_F64: "VDIV.ZZ.F64", - arm_VLDR_EQ: "VLDR.EQ", - arm_VLDR_NE: "VLDR.NE", - arm_VLDR_CS: "VLDR.CS", - arm_VLDR_CC: "VLDR.CC", - arm_VLDR_MI: "VLDR.MI", - arm_VLDR_PL: "VLDR.PL", - arm_VLDR_VS: "VLDR.VS", - arm_VLDR_VC: "VLDR.VC", - arm_VLDR_HI: "VLDR.HI", - arm_VLDR_LS: "VLDR.LS", - arm_VLDR_GE: "VLDR.GE", - arm_VLDR_LT: "VLDR.LT", - arm_VLDR_GT: "VLDR.GT", - arm_VLDR_LE: "VLDR.LE", - arm_VLDR: "VLDR", - arm_VLDR_ZZ: "VLDR.ZZ", - arm_VMLA_EQ_F32: "VMLA.EQ.F32", - arm_VMLA_NE_F32: "VMLA.NE.F32", - arm_VMLA_CS_F32: "VMLA.CS.F32", - arm_VMLA_CC_F32: "VMLA.CC.F32", - arm_VMLA_MI_F32: "VMLA.MI.F32", - arm_VMLA_PL_F32: "VMLA.PL.F32", - arm_VMLA_VS_F32: "VMLA.VS.F32", - arm_VMLA_VC_F32: "VMLA.VC.F32", - arm_VMLA_HI_F32: "VMLA.HI.F32", - arm_VMLA_LS_F32: "VMLA.LS.F32", - arm_VMLA_GE_F32: "VMLA.GE.F32", - arm_VMLA_LT_F32: "VMLA.LT.F32", - arm_VMLA_GT_F32: "VMLA.GT.F32", - arm_VMLA_LE_F32: "VMLA.LE.F32", - arm_VMLA_F32: "VMLA.F32", - arm_VMLA_ZZ_F32: "VMLA.ZZ.F32", - arm_VMLA_EQ_F64: "VMLA.EQ.F64", - arm_VMLA_NE_F64: "VMLA.NE.F64", - arm_VMLA_CS_F64: "VMLA.CS.F64", - arm_VMLA_CC_F64: "VMLA.CC.F64", - arm_VMLA_MI_F64: "VMLA.MI.F64", - arm_VMLA_PL_F64: "VMLA.PL.F64", - arm_VMLA_VS_F64: "VMLA.VS.F64", - arm_VMLA_VC_F64: "VMLA.VC.F64", - arm_VMLA_HI_F64: "VMLA.HI.F64", - arm_VMLA_LS_F64: "VMLA.LS.F64", - arm_VMLA_GE_F64: "VMLA.GE.F64", - arm_VMLA_LT_F64: "VMLA.LT.F64", - arm_VMLA_GT_F64: "VMLA.GT.F64", - arm_VMLA_LE_F64: "VMLA.LE.F64", - arm_VMLA_F64: "VMLA.F64", - arm_VMLA_ZZ_F64: "VMLA.ZZ.F64", - arm_VMLS_EQ_F32: "VMLS.EQ.F32", - arm_VMLS_NE_F32: "VMLS.NE.F32", - arm_VMLS_CS_F32: "VMLS.CS.F32", - arm_VMLS_CC_F32: "VMLS.CC.F32", - arm_VMLS_MI_F32: "VMLS.MI.F32", - arm_VMLS_PL_F32: "VMLS.PL.F32", - arm_VMLS_VS_F32: "VMLS.VS.F32", - arm_VMLS_VC_F32: "VMLS.VC.F32", - arm_VMLS_HI_F32: "VMLS.HI.F32", - arm_VMLS_LS_F32: "VMLS.LS.F32", - arm_VMLS_GE_F32: "VMLS.GE.F32", - arm_VMLS_LT_F32: "VMLS.LT.F32", - arm_VMLS_GT_F32: "VMLS.GT.F32", - arm_VMLS_LE_F32: "VMLS.LE.F32", - arm_VMLS_F32: "VMLS.F32", - arm_VMLS_ZZ_F32: "VMLS.ZZ.F32", - arm_VMLS_EQ_F64: "VMLS.EQ.F64", - arm_VMLS_NE_F64: "VMLS.NE.F64", - arm_VMLS_CS_F64: "VMLS.CS.F64", - arm_VMLS_CC_F64: "VMLS.CC.F64", - arm_VMLS_MI_F64: "VMLS.MI.F64", - arm_VMLS_PL_F64: "VMLS.PL.F64", - arm_VMLS_VS_F64: "VMLS.VS.F64", - arm_VMLS_VC_F64: "VMLS.VC.F64", - arm_VMLS_HI_F64: "VMLS.HI.F64", - arm_VMLS_LS_F64: "VMLS.LS.F64", - arm_VMLS_GE_F64: "VMLS.GE.F64", - arm_VMLS_LT_F64: "VMLS.LT.F64", - arm_VMLS_GT_F64: "VMLS.GT.F64", - arm_VMLS_LE_F64: "VMLS.LE.F64", - arm_VMLS_F64: "VMLS.F64", - arm_VMLS_ZZ_F64: "VMLS.ZZ.F64", - arm_VMOV_EQ: "VMOV.EQ", - arm_VMOV_NE: "VMOV.NE", - arm_VMOV_CS: "VMOV.CS", - arm_VMOV_CC: "VMOV.CC", - arm_VMOV_MI: "VMOV.MI", - arm_VMOV_PL: "VMOV.PL", - arm_VMOV_VS: "VMOV.VS", - arm_VMOV_VC: "VMOV.VC", - arm_VMOV_HI: "VMOV.HI", - arm_VMOV_LS: "VMOV.LS", - arm_VMOV_GE: "VMOV.GE", - arm_VMOV_LT: "VMOV.LT", - arm_VMOV_GT: "VMOV.GT", - arm_VMOV_LE: "VMOV.LE", - arm_VMOV: "VMOV", - arm_VMOV_ZZ: "VMOV.ZZ", - arm_VMOV_EQ_32: "VMOV.EQ.32", - arm_VMOV_NE_32: "VMOV.NE.32", - arm_VMOV_CS_32: "VMOV.CS.32", - arm_VMOV_CC_32: "VMOV.CC.32", - arm_VMOV_MI_32: "VMOV.MI.32", - arm_VMOV_PL_32: "VMOV.PL.32", - arm_VMOV_VS_32: "VMOV.VS.32", - arm_VMOV_VC_32: "VMOV.VC.32", - arm_VMOV_HI_32: "VMOV.HI.32", - arm_VMOV_LS_32: "VMOV.LS.32", - arm_VMOV_GE_32: "VMOV.GE.32", - arm_VMOV_LT_32: "VMOV.LT.32", - arm_VMOV_GT_32: "VMOV.GT.32", - arm_VMOV_LE_32: "VMOV.LE.32", - arm_VMOV_32: "VMOV.32", - arm_VMOV_ZZ_32: "VMOV.ZZ.32", - arm_VMOV_EQ_F32: "VMOV.EQ.F32", - arm_VMOV_NE_F32: "VMOV.NE.F32", - arm_VMOV_CS_F32: "VMOV.CS.F32", - arm_VMOV_CC_F32: "VMOV.CC.F32", - arm_VMOV_MI_F32: "VMOV.MI.F32", - arm_VMOV_PL_F32: "VMOV.PL.F32", - arm_VMOV_VS_F32: "VMOV.VS.F32", - arm_VMOV_VC_F32: "VMOV.VC.F32", - arm_VMOV_HI_F32: "VMOV.HI.F32", - arm_VMOV_LS_F32: "VMOV.LS.F32", - arm_VMOV_GE_F32: "VMOV.GE.F32", - arm_VMOV_LT_F32: "VMOV.LT.F32", - arm_VMOV_GT_F32: "VMOV.GT.F32", - arm_VMOV_LE_F32: "VMOV.LE.F32", - arm_VMOV_F32: "VMOV.F32", - arm_VMOV_ZZ_F32: "VMOV.ZZ.F32", - arm_VMOV_EQ_F64: "VMOV.EQ.F64", - arm_VMOV_NE_F64: "VMOV.NE.F64", - arm_VMOV_CS_F64: "VMOV.CS.F64", - arm_VMOV_CC_F64: "VMOV.CC.F64", - arm_VMOV_MI_F64: "VMOV.MI.F64", - arm_VMOV_PL_F64: "VMOV.PL.F64", - arm_VMOV_VS_F64: "VMOV.VS.F64", - arm_VMOV_VC_F64: "VMOV.VC.F64", - arm_VMOV_HI_F64: "VMOV.HI.F64", - arm_VMOV_LS_F64: "VMOV.LS.F64", - arm_VMOV_GE_F64: "VMOV.GE.F64", - arm_VMOV_LT_F64: "VMOV.LT.F64", - arm_VMOV_GT_F64: "VMOV.GT.F64", - arm_VMOV_LE_F64: "VMOV.LE.F64", - arm_VMOV_F64: "VMOV.F64", - arm_VMOV_ZZ_F64: "VMOV.ZZ.F64", - arm_VMRS_EQ: "VMRS.EQ", - arm_VMRS_NE: "VMRS.NE", - arm_VMRS_CS: "VMRS.CS", - arm_VMRS_CC: "VMRS.CC", - arm_VMRS_MI: "VMRS.MI", - arm_VMRS_PL: "VMRS.PL", - arm_VMRS_VS: "VMRS.VS", - arm_VMRS_VC: "VMRS.VC", - arm_VMRS_HI: "VMRS.HI", - arm_VMRS_LS: "VMRS.LS", - arm_VMRS_GE: "VMRS.GE", - arm_VMRS_LT: "VMRS.LT", - arm_VMRS_GT: "VMRS.GT", - arm_VMRS_LE: "VMRS.LE", - arm_VMRS: "VMRS", - arm_VMRS_ZZ: "VMRS.ZZ", - arm_VMSR_EQ: "VMSR.EQ", - arm_VMSR_NE: "VMSR.NE", - arm_VMSR_CS: "VMSR.CS", - arm_VMSR_CC: "VMSR.CC", - arm_VMSR_MI: "VMSR.MI", - arm_VMSR_PL: "VMSR.PL", - arm_VMSR_VS: "VMSR.VS", - arm_VMSR_VC: "VMSR.VC", - arm_VMSR_HI: "VMSR.HI", - arm_VMSR_LS: "VMSR.LS", - arm_VMSR_GE: "VMSR.GE", - arm_VMSR_LT: "VMSR.LT", - arm_VMSR_GT: "VMSR.GT", - arm_VMSR_LE: "VMSR.LE", - arm_VMSR: "VMSR", - arm_VMSR_ZZ: "VMSR.ZZ", - arm_VMUL_EQ_F32: "VMUL.EQ.F32", - arm_VMUL_NE_F32: "VMUL.NE.F32", - arm_VMUL_CS_F32: "VMUL.CS.F32", - arm_VMUL_CC_F32: "VMUL.CC.F32", - arm_VMUL_MI_F32: "VMUL.MI.F32", - arm_VMUL_PL_F32: "VMUL.PL.F32", - arm_VMUL_VS_F32: "VMUL.VS.F32", - arm_VMUL_VC_F32: "VMUL.VC.F32", - arm_VMUL_HI_F32: "VMUL.HI.F32", - arm_VMUL_LS_F32: "VMUL.LS.F32", - arm_VMUL_GE_F32: "VMUL.GE.F32", - arm_VMUL_LT_F32: "VMUL.LT.F32", - arm_VMUL_GT_F32: "VMUL.GT.F32", - arm_VMUL_LE_F32: "VMUL.LE.F32", - arm_VMUL_F32: "VMUL.F32", - arm_VMUL_ZZ_F32: "VMUL.ZZ.F32", - arm_VMUL_EQ_F64: "VMUL.EQ.F64", - arm_VMUL_NE_F64: "VMUL.NE.F64", - arm_VMUL_CS_F64: "VMUL.CS.F64", - arm_VMUL_CC_F64: "VMUL.CC.F64", - arm_VMUL_MI_F64: "VMUL.MI.F64", - arm_VMUL_PL_F64: "VMUL.PL.F64", - arm_VMUL_VS_F64: "VMUL.VS.F64", - arm_VMUL_VC_F64: "VMUL.VC.F64", - arm_VMUL_HI_F64: "VMUL.HI.F64", - arm_VMUL_LS_F64: "VMUL.LS.F64", - arm_VMUL_GE_F64: "VMUL.GE.F64", - arm_VMUL_LT_F64: "VMUL.LT.F64", - arm_VMUL_GT_F64: "VMUL.GT.F64", - arm_VMUL_LE_F64: "VMUL.LE.F64", - arm_VMUL_F64: "VMUL.F64", - arm_VMUL_ZZ_F64: "VMUL.ZZ.F64", - arm_VNEG_EQ_F32: "VNEG.EQ.F32", - arm_VNEG_NE_F32: "VNEG.NE.F32", - arm_VNEG_CS_F32: "VNEG.CS.F32", - arm_VNEG_CC_F32: "VNEG.CC.F32", - arm_VNEG_MI_F32: "VNEG.MI.F32", - arm_VNEG_PL_F32: "VNEG.PL.F32", - arm_VNEG_VS_F32: "VNEG.VS.F32", - arm_VNEG_VC_F32: "VNEG.VC.F32", - arm_VNEG_HI_F32: "VNEG.HI.F32", - arm_VNEG_LS_F32: "VNEG.LS.F32", - arm_VNEG_GE_F32: "VNEG.GE.F32", - arm_VNEG_LT_F32: "VNEG.LT.F32", - arm_VNEG_GT_F32: "VNEG.GT.F32", - arm_VNEG_LE_F32: "VNEG.LE.F32", - arm_VNEG_F32: "VNEG.F32", - arm_VNEG_ZZ_F32: "VNEG.ZZ.F32", - arm_VNEG_EQ_F64: "VNEG.EQ.F64", - arm_VNEG_NE_F64: "VNEG.NE.F64", - arm_VNEG_CS_F64: "VNEG.CS.F64", - arm_VNEG_CC_F64: "VNEG.CC.F64", - arm_VNEG_MI_F64: "VNEG.MI.F64", - arm_VNEG_PL_F64: "VNEG.PL.F64", - arm_VNEG_VS_F64: "VNEG.VS.F64", - arm_VNEG_VC_F64: "VNEG.VC.F64", - arm_VNEG_HI_F64: "VNEG.HI.F64", - arm_VNEG_LS_F64: "VNEG.LS.F64", - arm_VNEG_GE_F64: "VNEG.GE.F64", - arm_VNEG_LT_F64: "VNEG.LT.F64", - arm_VNEG_GT_F64: "VNEG.GT.F64", - arm_VNEG_LE_F64: "VNEG.LE.F64", - arm_VNEG_F64: "VNEG.F64", - arm_VNEG_ZZ_F64: "VNEG.ZZ.F64", - arm_VNMLS_EQ_F32: "VNMLS.EQ.F32", - arm_VNMLS_NE_F32: "VNMLS.NE.F32", - arm_VNMLS_CS_F32: "VNMLS.CS.F32", - arm_VNMLS_CC_F32: "VNMLS.CC.F32", - arm_VNMLS_MI_F32: "VNMLS.MI.F32", - arm_VNMLS_PL_F32: "VNMLS.PL.F32", - arm_VNMLS_VS_F32: "VNMLS.VS.F32", - arm_VNMLS_VC_F32: "VNMLS.VC.F32", - arm_VNMLS_HI_F32: "VNMLS.HI.F32", - arm_VNMLS_LS_F32: "VNMLS.LS.F32", - arm_VNMLS_GE_F32: "VNMLS.GE.F32", - arm_VNMLS_LT_F32: "VNMLS.LT.F32", - arm_VNMLS_GT_F32: "VNMLS.GT.F32", - arm_VNMLS_LE_F32: "VNMLS.LE.F32", - arm_VNMLS_F32: "VNMLS.F32", - arm_VNMLS_ZZ_F32: "VNMLS.ZZ.F32", - arm_VNMLS_EQ_F64: "VNMLS.EQ.F64", - arm_VNMLS_NE_F64: "VNMLS.NE.F64", - arm_VNMLS_CS_F64: "VNMLS.CS.F64", - arm_VNMLS_CC_F64: "VNMLS.CC.F64", - arm_VNMLS_MI_F64: "VNMLS.MI.F64", - arm_VNMLS_PL_F64: "VNMLS.PL.F64", - arm_VNMLS_VS_F64: "VNMLS.VS.F64", - arm_VNMLS_VC_F64: "VNMLS.VC.F64", - arm_VNMLS_HI_F64: "VNMLS.HI.F64", - arm_VNMLS_LS_F64: "VNMLS.LS.F64", - arm_VNMLS_GE_F64: "VNMLS.GE.F64", - arm_VNMLS_LT_F64: "VNMLS.LT.F64", - arm_VNMLS_GT_F64: "VNMLS.GT.F64", - arm_VNMLS_LE_F64: "VNMLS.LE.F64", - arm_VNMLS_F64: "VNMLS.F64", - arm_VNMLS_ZZ_F64: "VNMLS.ZZ.F64", - arm_VNMLA_EQ_F32: "VNMLA.EQ.F32", - arm_VNMLA_NE_F32: "VNMLA.NE.F32", - arm_VNMLA_CS_F32: "VNMLA.CS.F32", - arm_VNMLA_CC_F32: "VNMLA.CC.F32", - arm_VNMLA_MI_F32: "VNMLA.MI.F32", - arm_VNMLA_PL_F32: "VNMLA.PL.F32", - arm_VNMLA_VS_F32: "VNMLA.VS.F32", - arm_VNMLA_VC_F32: "VNMLA.VC.F32", - arm_VNMLA_HI_F32: "VNMLA.HI.F32", - arm_VNMLA_LS_F32: "VNMLA.LS.F32", - arm_VNMLA_GE_F32: "VNMLA.GE.F32", - arm_VNMLA_LT_F32: "VNMLA.LT.F32", - arm_VNMLA_GT_F32: "VNMLA.GT.F32", - arm_VNMLA_LE_F32: "VNMLA.LE.F32", - arm_VNMLA_F32: "VNMLA.F32", - arm_VNMLA_ZZ_F32: "VNMLA.ZZ.F32", - arm_VNMLA_EQ_F64: "VNMLA.EQ.F64", - arm_VNMLA_NE_F64: "VNMLA.NE.F64", - arm_VNMLA_CS_F64: "VNMLA.CS.F64", - arm_VNMLA_CC_F64: "VNMLA.CC.F64", - arm_VNMLA_MI_F64: "VNMLA.MI.F64", - arm_VNMLA_PL_F64: "VNMLA.PL.F64", - arm_VNMLA_VS_F64: "VNMLA.VS.F64", - arm_VNMLA_VC_F64: "VNMLA.VC.F64", - arm_VNMLA_HI_F64: "VNMLA.HI.F64", - arm_VNMLA_LS_F64: "VNMLA.LS.F64", - arm_VNMLA_GE_F64: "VNMLA.GE.F64", - arm_VNMLA_LT_F64: "VNMLA.LT.F64", - arm_VNMLA_GT_F64: "VNMLA.GT.F64", - arm_VNMLA_LE_F64: "VNMLA.LE.F64", - arm_VNMLA_F64: "VNMLA.F64", - arm_VNMLA_ZZ_F64: "VNMLA.ZZ.F64", - arm_VNMUL_EQ_F32: "VNMUL.EQ.F32", - arm_VNMUL_NE_F32: "VNMUL.NE.F32", - arm_VNMUL_CS_F32: "VNMUL.CS.F32", - arm_VNMUL_CC_F32: "VNMUL.CC.F32", - arm_VNMUL_MI_F32: "VNMUL.MI.F32", - arm_VNMUL_PL_F32: "VNMUL.PL.F32", - arm_VNMUL_VS_F32: "VNMUL.VS.F32", - arm_VNMUL_VC_F32: "VNMUL.VC.F32", - arm_VNMUL_HI_F32: "VNMUL.HI.F32", - arm_VNMUL_LS_F32: "VNMUL.LS.F32", - arm_VNMUL_GE_F32: "VNMUL.GE.F32", - arm_VNMUL_LT_F32: "VNMUL.LT.F32", - arm_VNMUL_GT_F32: "VNMUL.GT.F32", - arm_VNMUL_LE_F32: "VNMUL.LE.F32", - arm_VNMUL_F32: "VNMUL.F32", - arm_VNMUL_ZZ_F32: "VNMUL.ZZ.F32", - arm_VNMUL_EQ_F64: "VNMUL.EQ.F64", - arm_VNMUL_NE_F64: "VNMUL.NE.F64", - arm_VNMUL_CS_F64: "VNMUL.CS.F64", - arm_VNMUL_CC_F64: "VNMUL.CC.F64", - arm_VNMUL_MI_F64: "VNMUL.MI.F64", - arm_VNMUL_PL_F64: "VNMUL.PL.F64", - arm_VNMUL_VS_F64: "VNMUL.VS.F64", - arm_VNMUL_VC_F64: "VNMUL.VC.F64", - arm_VNMUL_HI_F64: "VNMUL.HI.F64", - arm_VNMUL_LS_F64: "VNMUL.LS.F64", - arm_VNMUL_GE_F64: "VNMUL.GE.F64", - arm_VNMUL_LT_F64: "VNMUL.LT.F64", - arm_VNMUL_GT_F64: "VNMUL.GT.F64", - arm_VNMUL_LE_F64: "VNMUL.LE.F64", - arm_VNMUL_F64: "VNMUL.F64", - arm_VNMUL_ZZ_F64: "VNMUL.ZZ.F64", - arm_VSQRT_EQ_F32: "VSQRT.EQ.F32", - arm_VSQRT_NE_F32: "VSQRT.NE.F32", - arm_VSQRT_CS_F32: "VSQRT.CS.F32", - arm_VSQRT_CC_F32: "VSQRT.CC.F32", - arm_VSQRT_MI_F32: "VSQRT.MI.F32", - arm_VSQRT_PL_F32: "VSQRT.PL.F32", - arm_VSQRT_VS_F32: "VSQRT.VS.F32", - arm_VSQRT_VC_F32: "VSQRT.VC.F32", - arm_VSQRT_HI_F32: "VSQRT.HI.F32", - arm_VSQRT_LS_F32: "VSQRT.LS.F32", - arm_VSQRT_GE_F32: "VSQRT.GE.F32", - arm_VSQRT_LT_F32: "VSQRT.LT.F32", - arm_VSQRT_GT_F32: "VSQRT.GT.F32", - arm_VSQRT_LE_F32: "VSQRT.LE.F32", - arm_VSQRT_F32: "VSQRT.F32", - arm_VSQRT_ZZ_F32: "VSQRT.ZZ.F32", - arm_VSQRT_EQ_F64: "VSQRT.EQ.F64", - arm_VSQRT_NE_F64: "VSQRT.NE.F64", - arm_VSQRT_CS_F64: "VSQRT.CS.F64", - arm_VSQRT_CC_F64: "VSQRT.CC.F64", - arm_VSQRT_MI_F64: "VSQRT.MI.F64", - arm_VSQRT_PL_F64: "VSQRT.PL.F64", - arm_VSQRT_VS_F64: "VSQRT.VS.F64", - arm_VSQRT_VC_F64: "VSQRT.VC.F64", - arm_VSQRT_HI_F64: "VSQRT.HI.F64", - arm_VSQRT_LS_F64: "VSQRT.LS.F64", - arm_VSQRT_GE_F64: "VSQRT.GE.F64", - arm_VSQRT_LT_F64: "VSQRT.LT.F64", - arm_VSQRT_GT_F64: "VSQRT.GT.F64", - arm_VSQRT_LE_F64: "VSQRT.LE.F64", - arm_VSQRT_F64: "VSQRT.F64", - arm_VSQRT_ZZ_F64: "VSQRT.ZZ.F64", - arm_VSTR_EQ: "VSTR.EQ", - arm_VSTR_NE: "VSTR.NE", - arm_VSTR_CS: "VSTR.CS", - arm_VSTR_CC: "VSTR.CC", - arm_VSTR_MI: "VSTR.MI", - arm_VSTR_PL: "VSTR.PL", - arm_VSTR_VS: "VSTR.VS", - arm_VSTR_VC: "VSTR.VC", - arm_VSTR_HI: "VSTR.HI", - arm_VSTR_LS: "VSTR.LS", - arm_VSTR_GE: "VSTR.GE", - arm_VSTR_LT: "VSTR.LT", - arm_VSTR_GT: "VSTR.GT", - arm_VSTR_LE: "VSTR.LE", - arm_VSTR: "VSTR", - arm_VSTR_ZZ: "VSTR.ZZ", - arm_VSUB_EQ_F32: "VSUB.EQ.F32", - arm_VSUB_NE_F32: "VSUB.NE.F32", - arm_VSUB_CS_F32: "VSUB.CS.F32", - arm_VSUB_CC_F32: "VSUB.CC.F32", - arm_VSUB_MI_F32: "VSUB.MI.F32", - arm_VSUB_PL_F32: "VSUB.PL.F32", - arm_VSUB_VS_F32: "VSUB.VS.F32", - arm_VSUB_VC_F32: "VSUB.VC.F32", - arm_VSUB_HI_F32: "VSUB.HI.F32", - arm_VSUB_LS_F32: "VSUB.LS.F32", - arm_VSUB_GE_F32: "VSUB.GE.F32", - arm_VSUB_LT_F32: "VSUB.LT.F32", - arm_VSUB_GT_F32: "VSUB.GT.F32", - arm_VSUB_LE_F32: "VSUB.LE.F32", - arm_VSUB_F32: "VSUB.F32", - arm_VSUB_ZZ_F32: "VSUB.ZZ.F32", - arm_VSUB_EQ_F64: "VSUB.EQ.F64", - arm_VSUB_NE_F64: "VSUB.NE.F64", - arm_VSUB_CS_F64: "VSUB.CS.F64", - arm_VSUB_CC_F64: "VSUB.CC.F64", - arm_VSUB_MI_F64: "VSUB.MI.F64", - arm_VSUB_PL_F64: "VSUB.PL.F64", - arm_VSUB_VS_F64: "VSUB.VS.F64", - arm_VSUB_VC_F64: "VSUB.VC.F64", - arm_VSUB_HI_F64: "VSUB.HI.F64", - arm_VSUB_LS_F64: "VSUB.LS.F64", - arm_VSUB_GE_F64: "VSUB.GE.F64", - arm_VSUB_LT_F64: "VSUB.LT.F64", - arm_VSUB_GT_F64: "VSUB.GT.F64", - arm_VSUB_LE_F64: "VSUB.LE.F64", - arm_VSUB_F64: "VSUB.F64", - arm_VSUB_ZZ_F64: "VSUB.ZZ.F64", - arm_WFE_EQ: "WFE.EQ", - arm_WFE_NE: "WFE.NE", - arm_WFE_CS: "WFE.CS", - arm_WFE_CC: "WFE.CC", - arm_WFE_MI: "WFE.MI", - arm_WFE_PL: "WFE.PL", - arm_WFE_VS: "WFE.VS", - arm_WFE_VC: "WFE.VC", - arm_WFE_HI: "WFE.HI", - arm_WFE_LS: "WFE.LS", - arm_WFE_GE: "WFE.GE", - arm_WFE_LT: "WFE.LT", - arm_WFE_GT: "WFE.GT", - arm_WFE_LE: "WFE.LE", - arm_WFE: "WFE", - arm_WFE_ZZ: "WFE.ZZ", - arm_WFI_EQ: "WFI.EQ", - arm_WFI_NE: "WFI.NE", - arm_WFI_CS: "WFI.CS", - arm_WFI_CC: "WFI.CC", - arm_WFI_MI: "WFI.MI", - arm_WFI_PL: "WFI.PL", - arm_WFI_VS: "WFI.VS", - arm_WFI_VC: "WFI.VC", - arm_WFI_HI: "WFI.HI", - arm_WFI_LS: "WFI.LS", - arm_WFI_GE: "WFI.GE", - arm_WFI_LT: "WFI.LT", - arm_WFI_GT: "WFI.GT", - arm_WFI_LE: "WFI.LE", - arm_WFI: "WFI", - arm_WFI_ZZ: "WFI.ZZ", - arm_YIELD_EQ: "YIELD.EQ", - arm_YIELD_NE: "YIELD.NE", - arm_YIELD_CS: "YIELD.CS", - arm_YIELD_CC: "YIELD.CC", - arm_YIELD_MI: "YIELD.MI", - arm_YIELD_PL: "YIELD.PL", - arm_YIELD_VS: "YIELD.VS", - arm_YIELD_VC: "YIELD.VC", - arm_YIELD_HI: "YIELD.HI", - arm_YIELD_LS: "YIELD.LS", - arm_YIELD_GE: "YIELD.GE", - arm_YIELD_LT: "YIELD.LT", - arm_YIELD_GT: "YIELD.GT", - arm_YIELD_LE: "YIELD.LE", - arm_YIELD: "YIELD", - arm_YIELD_ZZ: "YIELD.ZZ", -} - -var arm_instFormats = [...]arm_instFormat{ - {0x0fe00000, 0x02a00000, 2, arm_ADC_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_const}}, // ADC{S}<c> <Rd>,<Rn>,#<const> cond:4|0|0|1|0|1|0|1|S|Rn:4|Rd:4|imm12:12 - {0x0fe00090, 0x00a00010, 4, arm_ADC_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_shift_R}}, // ADC{S}<c> <Rd>,<Rn>,<Rm>,<type> <Rs> cond:4|0|0|0|0|1|0|1|S|Rn:4|Rd:4|Rs:4|0|type:2|1|Rm:4 - {0x0fe00010, 0x00a00000, 2, arm_ADC_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_shift_imm}}, // ADC{S}<c> <Rd>,<Rn>,<Rm>{,<shift>} cond:4|0|0|0|0|1|0|1|S|Rn:4|Rd:4|imm5:5|type:2|0|Rm:4 - {0x0fe00000, 0x02800000, 2, arm_ADD_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_const}}, // ADD{S}<c> <Rd>,<Rn>,#<const> cond:4|0|0|1|0|1|0|0|S|Rn:4|Rd:4|imm12:12 - {0x0fe00090, 0x00800010, 4, arm_ADD_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_shift_R}}, // ADD{S}<c> <Rd>,<Rn>,<Rm>,<type> <Rs> cond:4|0|0|0|0|1|0|0|S|Rn:4|Rd:4|Rs:4|0|type:2|1|Rm:4 - {0x0fe00010, 0x00800000, 2, arm_ADD_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_shift_imm}}, // ADD{S}<c> <Rd>,<Rn>,<Rm>{,<shift>} cond:4|0|0|0|0|1|0|0|S|Rn:4|Rd:4|imm5:5|type:2|0|Rm:4 - {0x0fef0000, 0x028d0000, 2, arm_ADD_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_SP, arm_arg_const}}, // ADD{S}<c> <Rd>,SP,#<const> cond:4|0|0|1|0|1|0|0|S|1|1|0|1|Rd:4|imm12:12 - {0x0fef0010, 0x008d0000, 2, arm_ADD_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_SP, arm_arg_R_shift_imm}}, // ADD{S}<c> <Rd>,SP,<Rm>{,<shift>} cond:4|0|0|0|0|1|0|0|S|1|1|0|1|Rd:4|imm5:5|type:2|0|Rm:4 - {0x0fe00000, 0x02000000, 2, arm_AND_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_const}}, // AND{S}<c> <Rd>,<Rn>,#<const> cond:4|0|0|1|0|0|0|0|S|Rn:4|Rd:4|imm12:12 - {0x0fe00090, 0x00000010, 4, arm_AND_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_shift_R}}, // AND{S}<c> <Rd>,<Rn>,<Rm>,<type> <Rs> cond:4|0|0|0|0|0|0|0|S|Rn:4|Rd:4|Rs:4|0|type:2|1|Rm:4 - {0x0fe00010, 0x00000000, 2, arm_AND_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_shift_imm}}, // AND{S}<c> <Rd>,<Rn>,<Rm>{,<shift>} cond:4|0|0|0|0|0|0|0|S|Rn:4|Rd:4|imm5:5|type:2|0|Rm:4 - {0x0fef0070, 0x01a00040, 4, arm_ASR_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0, arm_arg_imm5_32}}, // ASR{S}<c> <Rd>,<Rm>,#<imm5_32> cond:4|0|0|0|1|1|0|1|S|0|0|0|0|Rd:4|imm5:5|1|0|0|Rm:4 - {0x0fef00f0, 0x01a00050, 4, arm_ASR_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0, arm_arg_R_8}}, // ASR{S}<c> <Rd>,<Rn>,<Rm> cond:4|0|0|0|1|1|0|1|S|0|0|0|0|Rd:4|Rm:4|0|1|0|1|Rn:4 - {0x0f000000, 0x0a000000, 4, arm_B_EQ, 0x1c04, arm_instArgs{arm_arg_label24}}, // B<c> <label24> cond:4|1|0|1|0|imm24:24 - {0x0fe0007f, 0x07c0001f, 4, arm_BFC_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_imm5, arm_arg_lsb_width}}, // BFC<c> <Rd>,#<lsb>,#<width> cond:4|0|1|1|1|1|1|0|msb:5|Rd:4|lsb:5|0|0|1|1|1|1|1 - {0x0fe00070, 0x07c00010, 2, arm_BFI_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0, arm_arg_imm5, arm_arg_lsb_width}}, // BFI<c> <Rd>,<Rn>,#<lsb>,#<width> cond:4|0|1|1|1|1|1|0|msb:5|Rd:4|lsb:5|0|0|1|Rn:4 - {0x0fe00000, 0x03c00000, 2, arm_BIC_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_const}}, // BIC{S}<c> <Rd>,<Rn>,#<const> cond:4|0|0|1|1|1|1|0|S|Rn:4|Rd:4|imm12:12 - {0x0fe00090, 0x01c00010, 4, arm_BIC_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_shift_R}}, // BIC{S}<c> <Rd>,<Rn>,<Rm>,<type> <Rs> cond:4|0|0|0|1|1|1|0|S|Rn:4|Rd:4|Rs:4|0|type:2|1|Rm:4 - {0x0fe00010, 0x01c00000, 2, arm_BIC_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_shift_imm}}, // BIC{S}<c> <Rd>,<Rn>,<Rm>{,<shift>} cond:4|0|0|0|1|1|1|0|S|Rn:4|Rd:4|imm5:5|type:2|0|Rm:4 - {0x0ff000f0, 0x01200070, 4, arm_BKPT_EQ, 0x1c04, arm_instArgs{arm_arg_imm_12at8_4at0}}, // BKPT<c> #<imm12+4> cond:4|0|0|0|1|0|0|1|0|imm12:12|0|1|1|1|imm4:4 - {0x0f000000, 0x0b000000, 4, arm_BL_EQ, 0x1c04, arm_instArgs{arm_arg_label24}}, // BL<c> <label24> cond:4|1|0|1|1|imm24:24 - {0xfe000000, 0xfa000000, 4, arm_BLX, 0x0, arm_instArgs{arm_arg_label24H}}, // BLX <label24H> 1|1|1|1|1|0|1|H|imm24:24 - {0x0ffffff0, 0x012fff30, 4, arm_BLX_EQ, 0x1c04, arm_instArgs{arm_arg_R_0}}, // BLX<c> <Rm> cond:4|0|0|0|1|0|0|1|0|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|0|0|1|1|Rm:4 - {0x0ff000f0, 0x012fff30, 3, arm_BLX_EQ, 0x1c04, arm_instArgs{arm_arg_R_0}}, // BLX<c> <Rm> cond:4|0|0|0|1|0|0|1|0|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|0|0|1|1|Rm:4 - {0x0ffffff0, 0x012fff10, 4, arm_BX_EQ, 0x1c04, arm_instArgs{arm_arg_R_0}}, // BX<c> <Rm> cond:4|0|0|0|1|0|0|1|0|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|0|0|0|1|Rm:4 - {0x0ff000f0, 0x012fff10, 3, arm_BX_EQ, 0x1c04, arm_instArgs{arm_arg_R_0}}, // BX<c> <Rm> cond:4|0|0|0|1|0|0|1|0|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|0|0|0|1|Rm:4 - {0x0ffffff0, 0x012fff20, 4, arm_BXJ_EQ, 0x1c04, arm_instArgs{arm_arg_R_0}}, // BXJ<c> <Rm> cond:4|0|0|0|1|0|0|1|0|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|0|0|1|0|Rm:4 - {0x0ff000f0, 0x012fff20, 3, arm_BXJ_EQ, 0x1c04, arm_instArgs{arm_arg_R_0}}, // BXJ<c> <Rm> cond:4|0|0|0|1|0|0|1|0|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|0|0|1|0|Rm:4 - {0xffffffff, 0xf57ff01f, 4, arm_CLREX, 0x0, arm_instArgs{}}, // CLREX 1|1|1|1|0|1|0|1|0|1|1|1|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(0)|(0)|(0)|(0)|0|0|0|1|(1)|(1)|(1)|(1) - {0xfff000f0, 0xf57ff01f, 3, arm_CLREX, 0x0, arm_instArgs{}}, // CLREX 1|1|1|1|0|1|0|1|0|1|1|1|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(0)|(0)|(0)|(0)|0|0|0|1|(1)|(1)|(1)|(1) - {0x0fff0ff0, 0x016f0f10, 4, arm_CLZ_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0}}, // CLZ<c> <Rd>,<Rm> cond:4|0|0|0|1|0|1|1|0|(1)|(1)|(1)|(1)|Rd:4|(1)|(1)|(1)|(1)|0|0|0|1|Rm:4 - {0x0ff000f0, 0x016f0f10, 3, arm_CLZ_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0}}, // CLZ<c> <Rd>,<Rm> cond:4|0|0|0|1|0|1|1|0|(1)|(1)|(1)|(1)|Rd:4|(1)|(1)|(1)|(1)|0|0|0|1|Rm:4 - {0x0ff0f000, 0x03700000, 4, arm_CMN_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_const}}, // CMN<c> <Rn>,#<const> cond:4|0|0|1|1|0|1|1|1|Rn:4|(0)|(0)|(0)|(0)|imm12:12 - {0x0ff00000, 0x03700000, 3, arm_CMN_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_const}}, // CMN<c> <Rn>,#<const> cond:4|0|0|1|1|0|1|1|1|Rn:4|(0)|(0)|(0)|(0)|imm12:12 - {0x0ff0f090, 0x01700010, 4, arm_CMN_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_R_shift_R}}, // CMN<c> <Rn>,<Rm>,<type> <Rs> cond:4|0|0|0|1|0|1|1|1|Rn:4|(0)|(0)|(0)|(0)|Rs:4|0|type:2|1|Rm:4 - {0x0ff00090, 0x01700010, 3, arm_CMN_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_R_shift_R}}, // CMN<c> <Rn>,<Rm>,<type> <Rs> cond:4|0|0|0|1|0|1|1|1|Rn:4|(0)|(0)|(0)|(0)|Rs:4|0|type:2|1|Rm:4 - {0x0ff0f010, 0x01700000, 4, arm_CMN_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_R_shift_imm}}, // CMN<c> <Rn>,<Rm>{,<shift>} cond:4|0|0|0|1|0|1|1|1|Rn:4|(0)|(0)|(0)|(0)|imm5:5|type:2|0|Rm:4 - {0x0ff00010, 0x01700000, 3, arm_CMN_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_R_shift_imm}}, // CMN<c> <Rn>,<Rm>{,<shift>} cond:4|0|0|0|1|0|1|1|1|Rn:4|(0)|(0)|(0)|(0)|imm5:5|type:2|0|Rm:4 - {0x0ff0f000, 0x03500000, 4, arm_CMP_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_const}}, // CMP<c> <Rn>,#<const> cond:4|0|0|1|1|0|1|0|1|Rn:4|(0)|(0)|(0)|(0)|imm12:12 - {0x0ff00000, 0x03500000, 3, arm_CMP_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_const}}, // CMP<c> <Rn>,#<const> cond:4|0|0|1|1|0|1|0|1|Rn:4|(0)|(0)|(0)|(0)|imm12:12 - {0x0ff0f090, 0x01500010, 4, arm_CMP_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_R_shift_R}}, // CMP<c> <Rn>,<Rm>,<type> <Rs> cond:4|0|0|0|1|0|1|0|1|Rn:4|(0)|(0)|(0)|(0)|Rs:4|0|type:2|1|Rm:4 - {0x0ff00090, 0x01500010, 3, arm_CMP_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_R_shift_R}}, // CMP<c> <Rn>,<Rm>,<type> <Rs> cond:4|0|0|0|1|0|1|0|1|Rn:4|(0)|(0)|(0)|(0)|Rs:4|0|type:2|1|Rm:4 - {0x0ff0f010, 0x01500000, 4, arm_CMP_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_R_shift_imm}}, // CMP<c> <Rn>,<Rm>{,<shift>} cond:4|0|0|0|1|0|1|0|1|Rn:4|(0)|(0)|(0)|(0)|imm5:5|type:2|0|Rm:4 - {0x0ff00010, 0x01500000, 3, arm_CMP_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_R_shift_imm}}, // CMP<c> <Rn>,<Rm>{,<shift>} cond:4|0|0|0|1|0|1|0|1|Rn:4|(0)|(0)|(0)|(0)|imm5:5|type:2|0|Rm:4 - {0x0ffffff0, 0x0320f0f0, 4, arm_DBG_EQ, 0x1c04, arm_instArgs{arm_arg_option}}, // DBG<c> #<option> cond:4|0|0|1|1|0|0|1|0|0|0|0|0|(1)|(1)|(1)|(1)|(0)|(0)|(0)|(0)|1|1|1|1|option:4 - {0x0fff00f0, 0x0320f0f0, 3, arm_DBG_EQ, 0x1c04, arm_instArgs{arm_arg_option}}, // DBG<c> #<option> cond:4|0|0|1|1|0|0|1|0|0|0|0|0|(1)|(1)|(1)|(1)|(0)|(0)|(0)|(0)|1|1|1|1|option:4 - {0xfffffff0, 0xf57ff050, 4, arm_DMB, 0x0, arm_instArgs{arm_arg_option}}, // DMB #<option> 1|1|1|1|0|1|0|1|0|1|1|1|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(0)|(0)|(0)|(0)|0|1|0|1|option:4 - {0xfff000f0, 0xf57ff050, 3, arm_DMB, 0x0, arm_instArgs{arm_arg_option}}, // DMB #<option> 1|1|1|1|0|1|0|1|0|1|1|1|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(0)|(0)|(0)|(0)|0|1|0|1|option:4 - {0xfffffff0, 0xf57ff040, 4, arm_DSB, 0x0, arm_instArgs{arm_arg_option}}, // DSB #<option> 1|1|1|1|0|1|0|1|0|1|1|1|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(0)|(0)|(0)|(0)|0|1|0|0|option:4 - {0xfff000f0, 0xf57ff040, 3, arm_DSB, 0x0, arm_instArgs{arm_arg_option}}, // DSB #<option> 1|1|1|1|0|1|0|1|0|1|1|1|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(0)|(0)|(0)|(0)|0|1|0|0|option:4 - {0x0fe00000, 0x02200000, 2, arm_EOR_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_const}}, // EOR{S}<c> <Rd>,<Rn>,#<const> cond:4|0|0|1|0|0|0|1|S|Rn:4|Rd:4|imm12:12 - {0x0fe00090, 0x00200010, 4, arm_EOR_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_shift_R}}, // EOR{S}<c> <Rd>,<Rn>,<Rm>,<type> <Rs> cond:4|0|0|0|0|0|0|1|S|Rn:4|Rd:4|Rs:4|0|type:2|1|Rm:4 - {0x0fe00010, 0x00200000, 2, arm_EOR_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_shift_imm}}, // EOR{S}<c> <Rd>,<Rn>,<Rm>{,<shift>} cond:4|0|0|0|0|0|0|1|S|Rn:4|Rd:4|imm5:5|type:2|0|Rm:4 - {0xfffffff0, 0xf57ff060, 4, arm_ISB, 0x0, arm_instArgs{arm_arg_option}}, // ISB #<option> 1|1|1|1|0|1|0|1|0|1|1|1|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(0)|(0)|(0)|(0)|0|1|1|0|option:4 - {0xfff000f0, 0xf57ff060, 3, arm_ISB, 0x0, arm_instArgs{arm_arg_option}}, // ISB #<option> 1|1|1|1|0|1|0|1|0|1|1|1|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(1)|(0)|(0)|(0)|(0)|0|1|1|0|option:4 - {0x0fd00000, 0x08900000, 2, arm_LDM_EQ, 0x1c04, arm_instArgs{arm_arg_R_16_WB, arm_arg_registers}}, // LDM<c> <Rn>{!},<registers> cond:4|1|0|0|0|1|0|W|1|Rn:4|register_list:16 - {0x0fd00000, 0x08100000, 4, arm_LDMDA_EQ, 0x1c04, arm_instArgs{arm_arg_R_16_WB, arm_arg_registers}}, // LDMDA<c> <Rn>{!},<registers> cond:4|1|0|0|0|0|0|W|1|Rn:4|register_list:16 - {0x0fd00000, 0x09100000, 4, arm_LDMDB_EQ, 0x1c04, arm_instArgs{arm_arg_R_16_WB, arm_arg_registers}}, // LDMDB<c> <Rn>{!},<registers> cond:4|1|0|0|1|0|0|W|1|Rn:4|register_list:16 - {0x0fd00000, 0x09900000, 4, arm_LDMIB_EQ, 0x1c04, arm_instArgs{arm_arg_R_16_WB, arm_arg_registers}}, // LDMIB<c> <Rn>{!},<registers> cond:4|1|0|0|1|1|0|W|1|Rn:4|register_list:16 - {0x0f7f0000, 0x051f0000, 4, arm_LDR_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_label_pm_12}}, // LDR<c> <Rt>,<label+/-12> cond:4|0|1|0|(1)|U|0|(0)|1|1|1|1|1|Rt:4|imm12:12 - {0x0e5f0000, 0x051f0000, 3, arm_LDR_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_label_pm_12}}, // LDR<c> <Rt>,<label+/-12> cond:4|0|1|0|(1)|U|0|(0)|1|1|1|1|1|Rt:4|imm12:12 - {0x0e500010, 0x06100000, 2, arm_LDR_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_R_shift_imm_W}}, // LDR<c> <Rt>,[<Rn>,+/-<Rm>{, <shift>}]{!} cond:4|0|1|1|P|U|0|W|1|Rn:4|Rt:4|imm5:5|type:2|0|Rm:4 - {0x0e500000, 0x04100000, 2, arm_LDR_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_imm12_W}}, // LDR<c> <Rt>,[<Rn>{,#+/-<imm12>}]{!} cond:4|0|1|0|P|U|0|W|1|Rn:4|Rt:4|imm12:12 - {0x0f7f0000, 0x055f0000, 4, arm_LDRB_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_label_pm_12}}, // LDRB<c> <Rt>,<label+/-12> cond:4|0|1|0|(1)|U|1|(0)|1|1|1|1|1|Rt:4|imm12:12 - {0x0e5f0000, 0x055f0000, 3, arm_LDRB_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_label_pm_12}}, // LDRB<c> <Rt>,<label+/-12> cond:4|0|1|0|(1)|U|1|(0)|1|1|1|1|1|Rt:4|imm12:12 - {0x0e500010, 0x06500000, 2, arm_LDRB_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_R_shift_imm_W}}, // LDRB<c> <Rt>,[<Rn>,+/-<Rm>{, <shift>}]{!} cond:4|0|1|1|P|U|1|W|1|Rn:4|Rt:4|imm5:5|type:2|0|Rm:4 - {0x0e500000, 0x04500000, 2, arm_LDRB_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_imm12_W}}, // LDRB<c> <Rt>,[<Rn>{,#+/-<imm12>}]{!} cond:4|0|1|0|P|U|1|W|1|Rn:4|Rt:4|imm12:12 - {0x0f700000, 0x04700000, 4, arm_LDRBT_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_imm12_postindex}}, // LDRBT<c> <Rt>,[<Rn>],#+/-<imm12> cond:4|0|1|0|0|U|1|1|1|Rn:4|Rt:4|imm12:12 - {0x0f700010, 0x06700000, 4, arm_LDRBT_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_R_shift_imm_postindex}}, // LDRBT<c> <Rt>,[<Rn>],+/-<Rm>{, <shift>} cond:4|0|1|1|0|U|1|1|1|Rn:4|Rt:4|imm5:5|type:2|0|Rm:4 - {0x0e500ff0, 0x000000d0, 4, arm_LDRD_EQ, 0x1c04, arm_instArgs{arm_arg_R1_12, arm_arg_R2_12, arm_arg_mem_R_pm_R_W}}, // LDRD<c> <Rt1>,<Rt2>,[<Rn>,+/-<Rm>]{!} cond:4|0|0|0|P|U|0|W|0|Rn:4|Rt:4|(0)|(0)|(0)|(0)|1|1|0|1|Rm:4 - {0x0e5000f0, 0x000000d0, 3, arm_LDRD_EQ, 0x1c04, arm_instArgs{arm_arg_R1_12, arm_arg_R2_12, arm_arg_mem_R_pm_R_W}}, // LDRD<c> <Rt1>,<Rt2>,[<Rn>,+/-<Rm>]{!} cond:4|0|0|0|P|U|0|W|0|Rn:4|Rt:4|(0)|(0)|(0)|(0)|1|1|0|1|Rm:4 - {0x0e5000f0, 0x004000d0, 2, arm_LDRD_EQ, 0x1c04, arm_instArgs{arm_arg_R1_12, arm_arg_R2_12, arm_arg_mem_R_pm_imm8_W}}, // LDRD<c> <Rt1>,<Rt2>,[<Rn>{,#+/-<imm8>}]{!} cond:4|0|0|0|P|U|1|W|0|Rn:4|Rt:4|imm4H:4|1|1|0|1|imm4L:4 - {0x0ff00fff, 0x01900f9f, 4, arm_LDREX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R}}, // LDREX<c> <Rt>,[<Rn>] cond:4|0|0|0|1|1|0|0|1|Rn:4|Rt:4|(1)|(1)|(1)|(1)|1|0|0|1|(1)|(1)|(1)|(1) - {0x0ff000f0, 0x01900f9f, 3, arm_LDREX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R}}, // LDREX<c> <Rt>,[<Rn>] cond:4|0|0|0|1|1|0|0|1|Rn:4|Rt:4|(1)|(1)|(1)|(1)|1|0|0|1|(1)|(1)|(1)|(1) - {0x0ff00fff, 0x01d00f9f, 4, arm_LDREXB_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R}}, // LDREXB<c> <Rt>, [<Rn>] cond:4|0|0|0|1|1|1|0|1|Rn:4|Rt:4|(1)|(1)|(1)|(1)|1|0|0|1|(1)|(1)|(1)|(1) - {0x0ff000f0, 0x01d00f9f, 3, arm_LDREXB_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R}}, // LDREXB<c> <Rt>, [<Rn>] cond:4|0|0|0|1|1|1|0|1|Rn:4|Rt:4|(1)|(1)|(1)|(1)|1|0|0|1|(1)|(1)|(1)|(1) - {0x0ff00fff, 0x01b00f9f, 4, arm_LDREXD_EQ, 0x1c04, arm_instArgs{arm_arg_R1_12, arm_arg_R2_12, arm_arg_mem_R}}, // LDREXD<c> <Rt1>,<Rt2>,[<Rn>] cond:4|0|0|0|1|1|0|1|1|Rn:4|Rt:4|(1)|(1)|(1)|(1)|1|0|0|1|(1)|(1)|(1)|(1) - {0x0ff000f0, 0x01b00f9f, 3, arm_LDREXD_EQ, 0x1c04, arm_instArgs{arm_arg_R1_12, arm_arg_R2_12, arm_arg_mem_R}}, // LDREXD<c> <Rt1>,<Rt2>,[<Rn>] cond:4|0|0|0|1|1|0|1|1|Rn:4|Rt:4|(1)|(1)|(1)|(1)|1|0|0|1|(1)|(1)|(1)|(1) - {0x0ff00fff, 0x01f00f9f, 4, arm_LDREXH_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R}}, // LDREXH<c> <Rt>, [<Rn>] cond:4|0|0|0|1|1|1|1|1|Rn:4|Rt:4|(1)|(1)|(1)|(1)|1|0|0|1|(1)|(1)|(1)|(1) - {0x0ff000f0, 0x01f00f9f, 3, arm_LDREXH_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R}}, // LDREXH<c> <Rt>, [<Rn>] cond:4|0|0|0|1|1|1|1|1|Rn:4|Rt:4|(1)|(1)|(1)|(1)|1|0|0|1|(1)|(1)|(1)|(1) - {0x0e500ff0, 0x001000b0, 2, arm_LDRH_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_R_W}}, // LDRH<c> <Rt>,[<Rn>,+/-<Rm>]{!} cond:4|0|0|0|P|U|0|W|1|Rn:4|Rt:4|0|0|0|0|1|0|1|1|Rm:4 - {0x0e5000f0, 0x005000b0, 2, arm_LDRH_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_imm8_W}}, // LDRH<c> <Rt>,[<Rn>{,#+/-<imm8>}]{!} cond:4|0|0|0|P|U|1|W|1|Rn:4|Rt:4|imm4H:4|1|0|1|1|imm4L:4 - {0x0f7000f0, 0x007000b0, 4, arm_LDRHT_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_imm8_postindex}}, // LDRHT<c> <Rt>, [<Rn>] {,#+/-<imm8>} cond:4|0|0|0|0|U|1|1|1|Rn:4|Rt:4|imm4H:4|1|0|1|1|imm4L:4 - {0x0f700ff0, 0x003000b0, 4, arm_LDRHT_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_R_postindex}}, // LDRHT<c> <Rt>, [<Rn>], +/-<Rm> cond:4|0|0|0|0|U|0|1|1|Rn:4|Rt:4|0|0|0|0|1|0|1|1|Rm:4 - {0x0e500ff0, 0x001000d0, 2, arm_LDRSB_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_R_W}}, // LDRSB<c> <Rt>,[<Rn>,+/-<Rm>]{!} cond:4|0|0|0|P|U|0|W|1|Rn:4|Rt:4|0|0|0|0|1|1|0|1|Rm:4 - {0x0e5000f0, 0x005000d0, 2, arm_LDRSB_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_imm8_W}}, // LDRSB<c> <Rt>,[<Rn>{,#+/-<imm8>}]{!} cond:4|0|0|0|P|U|1|W|1|Rn:4|Rt:4|imm4H:4|1|1|0|1|imm4L:4 - {0x0f7000f0, 0x007000d0, 4, arm_LDRSBT_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_imm8_postindex}}, // LDRSBT<c> <Rt>, [<Rn>] {,#+/-<imm8>} cond:4|0|0|0|0|U|1|1|1|Rn:4|Rt:4|imm4H:4|1|1|0|1|imm4L:4 - {0x0f700ff0, 0x003000d0, 4, arm_LDRSBT_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_R_postindex}}, // LDRSBT<c> <Rt>, [<Rn>], +/-<Rm> cond:4|0|0|0|0|U|0|1|1|Rn:4|Rt:4|0|0|0|0|1|1|0|1|Rm:4 - {0x0e500ff0, 0x001000f0, 2, arm_LDRSH_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_R_W}}, // LDRSH<c> <Rt>,[<Rn>,+/-<Rm>]{!} cond:4|0|0|0|P|U|0|W|1|Rn:4|Rt:4|0|0|0|0|1|1|1|1|Rm:4 - {0x0e5000f0, 0x005000f0, 2, arm_LDRSH_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_imm8_W}}, // LDRSH<c> <Rt>,[<Rn>{,#+/-<imm8>}]{!} cond:4|0|0|0|P|U|1|W|1|Rn:4|Rt:4|imm4H:4|1|1|1|1|imm4L:4 - {0x0f7000f0, 0x007000f0, 4, arm_LDRSHT_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_imm8_postindex}}, // LDRSHT<c> <Rt>, [<Rn>] {,#+/-<imm8>} cond:4|0|0|0|0|U|1|1|1|Rn:4|Rt:4|imm4H:4|1|1|1|1|imm4L:4 - {0x0f700ff0, 0x003000f0, 4, arm_LDRSHT_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_R_postindex}}, // LDRSHT<c> <Rt>, [<Rn>], +/-<Rm> cond:4|0|0|0|0|U|0|1|1|Rn:4|Rt:4|0|0|0|0|1|1|1|1|Rm:4 - {0x0f700000, 0x04300000, 4, arm_LDRT_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_imm12_postindex}}, // LDRT<c> <Rt>, [<Rn>] {,#+/-<imm12>} cond:4|0|1|0|0|U|0|1|1|Rn:4|Rt:4|imm12:12 - {0x0f700010, 0x06300000, 4, arm_LDRT_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_R_shift_imm_postindex}}, // LDRT<c> <Rt>,[<Rn>],+/-<Rm>{, <shift>} cond:4|0|1|1|0|U|0|1|1|Rn:4|Rt:4|imm5:5|type:2|0|Rm:4 - {0x0fef0070, 0x01a00000, 2, arm_LSL_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0, arm_arg_imm5_nz}}, // LSL{S}<c> <Rd>,<Rm>,#<imm5_nz> cond:4|0|0|0|1|1|0|1|S|0|0|0|0|Rd:4|imm5:5|0|0|0|Rm:4 - {0x0fef00f0, 0x01a00010, 4, arm_LSL_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0, arm_arg_R_8}}, // LSL{S}<c> <Rd>,<Rn>,<Rm> cond:4|0|0|0|1|1|0|1|S|0|0|0|0|Rd:4|Rm:4|0|0|0|1|Rn:4 - {0x0fef0070, 0x01a00020, 4, arm_LSR_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0, arm_arg_imm5_32}}, // LSR{S}<c> <Rd>,<Rm>,#<imm5_32> cond:4|0|0|0|1|1|0|1|S|0|0|0|0|Rd:4|imm5:5|0|1|0|Rm:4 - {0x0fef00f0, 0x01a00030, 4, arm_LSR_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0, arm_arg_R_8}}, // LSR{S}<c> <Rd>,<Rn>,<Rm> cond:4|0|0|0|1|1|0|1|S|0|0|0|0|Rd:4|Rm:4|0|0|1|1|Rn:4 - {0x0fe000f0, 0x00200090, 4, arm_MLA_EQ, 0x14011c04, arm_instArgs{arm_arg_R_16, arm_arg_R_0, arm_arg_R_8, arm_arg_R_12}}, // MLA{S}<c> <Rd>,<Rn>,<Rm>,<Ra> cond:4|0|0|0|0|0|0|1|S|Rd:4|Ra:4|Rm:4|1|0|0|1|Rn:4 - {0x0ff000f0, 0x00600090, 4, arm_MLS_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_R_0, arm_arg_R_8, arm_arg_R_12}}, // MLS<c> <Rd>,<Rn>,<Rm>,<Ra> cond:4|0|0|0|0|0|1|1|0|Rd:4|Ra:4|Rm:4|1|0|0|1|Rn:4 - {0x0ff00000, 0x03400000, 4, arm_MOVT_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_imm_4at16_12at0}}, // MOVT<c> <Rd>,#<imm12+4> cond:4|0|0|1|1|0|1|0|0|imm4:4|Rd:4|imm12:12 - {0x0ff00000, 0x03000000, 4, arm_MOVW_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_imm_4at16_12at0}}, // MOVW<c> <Rd>,#<imm12+4> cond:4|0|0|1|1|0|0|0|0|imm4:4|Rd:4|imm12:12 - {0x0fef0000, 0x03a00000, 2, arm_MOV_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_const}}, // MOV{S}<c> <Rd>,#<const> cond:4|0|0|1|1|1|0|1|S|0|0|0|0|Rd:4|imm12:12 - {0x0fef0ff0, 0x01a00000, 2, arm_MOV_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0}}, // MOV{S}<c> <Rd>,<Rm> cond:4|0|0|0|1|1|0|1|S|0|0|0|0|Rd:4|0|0|0|0|0|0|0|0|Rm:4 - {0x0fff0fff, 0x010f0000, 4, arm_MRS_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_APSR}}, // MRS<c> <Rd>,APSR cond:4|0|0|0|1|0|0|0|0|(1)|(1)|(1)|(1)|Rd:4|(0)|(0)|(0)|(0)|0|0|0|0|(0)|(0)|(0)|(0) - {0x0ff000f0, 0x010f0000, 3, arm_MRS_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_APSR}}, // MRS<c> <Rd>,APSR cond:4|0|0|0|1|0|0|0|0|(1)|(1)|(1)|(1)|Rd:4|(0)|(0)|(0)|(0)|0|0|0|0|(0)|(0)|(0)|(0) - {0x0fe0f0f0, 0x00000090, 4, arm_MUL_EQ, 0x14011c04, arm_instArgs{arm_arg_R_16, arm_arg_R_0, arm_arg_R_8}}, // MUL{S}<c> <Rd>,<Rn>,<Rm> cond:4|0|0|0|0|0|0|0|S|Rd:4|(0)|(0)|(0)|(0)|Rm:4|1|0|0|1|Rn:4 - {0x0fe000f0, 0x00000090, 3, arm_MUL_EQ, 0x14011c04, arm_instArgs{arm_arg_R_16, arm_arg_R_0, arm_arg_R_8}}, // MUL{S}<c> <Rd>,<Rn>,<Rm> cond:4|0|0|0|0|0|0|0|S|Rd:4|(0)|(0)|(0)|(0)|Rm:4|1|0|0|1|Rn:4 - {0x0fef0000, 0x03e00000, 2, arm_MVN_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_const}}, // MVN{S}<c> <Rd>,#<const> cond:4|0|0|1|1|1|1|1|S|(0)|(0)|(0)|(0)|Rd:4|imm12:12 - {0x0fe00000, 0x03e00000, 1, arm_MVN_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_const}}, // MVN{S}<c> <Rd>,#<const> cond:4|0|0|1|1|1|1|1|S|(0)|(0)|(0)|(0)|Rd:4|imm12:12 - {0x0fef0090, 0x01e00010, 4, arm_MVN_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_shift_R}}, // MVN{S}<c> <Rd>,<Rm>,<type> <Rs> cond:4|0|0|0|1|1|1|1|S|(0)|(0)|(0)|(0)|Rd:4|Rs:4|0|type:2|1|Rm:4 - {0x0fe00090, 0x01e00010, 3, arm_MVN_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_shift_R}}, // MVN{S}<c> <Rd>,<Rm>,<type> <Rs> cond:4|0|0|0|1|1|1|1|S|(0)|(0)|(0)|(0)|Rd:4|Rs:4|0|type:2|1|Rm:4 - {0x0fef0010, 0x01e00000, 2, arm_MVN_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_shift_imm}}, // MVN{S}<c> <Rd>,<Rm>{,<shift>} cond:4|0|0|0|1|1|1|1|S|(0)|(0)|(0)|(0)|Rd:4|imm5:5|type:2|0|Rm:4 - {0x0fe00010, 0x01e00000, 1, arm_MVN_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_shift_imm}}, // MVN{S}<c> <Rd>,<Rm>{,<shift>} cond:4|0|0|0|1|1|1|1|S|(0)|(0)|(0)|(0)|Rd:4|imm5:5|type:2|0|Rm:4 - {0x0fffffff, 0x0320f000, 4, arm_NOP_EQ, 0x1c04, arm_instArgs{}}, // NOP<c> cond:4|0|0|1|1|0|0|1|0|0|0|0|0|(1)|(1)|(1)|(1)|(0)|(0)|(0)|(0)|0|0|0|0|0|0|0|0 - {0x0fff00ff, 0x0320f000, 3, arm_NOP_EQ, 0x1c04, arm_instArgs{}}, // NOP<c> cond:4|0|0|1|1|0|0|1|0|0|0|0|0|(1)|(1)|(1)|(1)|(0)|(0)|(0)|(0)|0|0|0|0|0|0|0|0 - {0x0fe00000, 0x03800000, 2, arm_ORR_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_const}}, // ORR{S}<c> <Rd>,<Rn>,#<const> cond:4|0|0|1|1|1|0|0|S|Rn:4|Rd:4|imm12:12 - {0x0fe00090, 0x01800010, 4, arm_ORR_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_shift_R}}, // ORR{S}<c> <Rd>,<Rn>,<Rm>,<type> <Rs> cond:4|0|0|0|1|1|0|0|S|Rn:4|Rd:4|Rs:4|0|type:2|1|Rm:4 - {0x0fe00010, 0x01800000, 2, arm_ORR_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_shift_imm}}, // ORR{S}<c> <Rd>,<Rn>,<Rm>{,<shift>} cond:4|0|0|0|1|1|0|0|S|Rn:4|Rd:4|imm5:5|type:2|0|Rm:4 - {0x0ff00030, 0x06800010, 4, arm_PKHBT_EQ, 0x6011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_shift_imm}}, // PKH<BT,TB><c> <Rd>,<Rn>,<Rm>{,LSL #<imm5>} cond:4|0|1|1|0|1|0|0|0|Rn:4|Rd:4|imm5:5|tb|0|1|Rm:4 - {0xff7ff000, 0xf55ff000, 4, arm_PLD, 0x0, arm_instArgs{arm_arg_label_pm_12}}, // PLD <label+/-12> 1|1|1|1|0|1|0|1|U|(1)|0|1|1|1|1|1|(1)|(1)|(1)|(1)|imm12:12 - {0xff3f0000, 0xf55ff000, 3, arm_PLD, 0x0, arm_instArgs{arm_arg_label_pm_12}}, // PLD <label+/-12> 1|1|1|1|0|1|0|1|U|(1)|0|1|1|1|1|1|(1)|(1)|(1)|(1)|imm12:12 - {0xff30f000, 0xf510f000, 2, arm_PLD_W, 0x1601, arm_instArgs{arm_arg_mem_R_pm_imm12_offset}}, // PLD{W} [<Rn>,#+/-<imm12>] 1|1|1|1|0|1|0|1|U|R|0|1|Rn:4|(1)|(1)|(1)|(1)|imm12:12 - {0xff300000, 0xf510f000, 1, arm_PLD_W, 0x1601, arm_instArgs{arm_arg_mem_R_pm_imm12_offset}}, // PLD{W} [<Rn>,#+/-<imm12>] 1|1|1|1|0|1|0|1|U|R|0|1|Rn:4|(1)|(1)|(1)|(1)|imm12:12 - {0xff30f010, 0xf710f000, 4, arm_PLD_W, 0x1601, arm_instArgs{arm_arg_mem_R_pm_R_shift_imm_offset}}, // PLD{W} [<Rn>,+/-<Rm>{, <shift>}] 1|1|1|1|0|1|1|1|U|R|0|1|Rn:4|(1)|(1)|(1)|(1)|imm5:5|type:2|0|Rm:4 - {0xff300010, 0xf710f000, 3, arm_PLD_W, 0x1601, arm_instArgs{arm_arg_mem_R_pm_R_shift_imm_offset}}, // PLD{W} [<Rn>,+/-<Rm>{, <shift>}] 1|1|1|1|0|1|1|1|U|R|0|1|Rn:4|(1)|(1)|(1)|(1)|imm5:5|type:2|0|Rm:4 - {0xff70f000, 0xf450f000, 4, arm_PLI, 0x0, arm_instArgs{arm_arg_mem_R_pm_imm12_offset}}, // PLI [<Rn>,#+/-<imm12>] 1|1|1|1|0|1|0|0|U|1|0|1|Rn:4|(1)|(1)|(1)|(1)|imm12:12 - {0xff700000, 0xf450f000, 3, arm_PLI, 0x0, arm_instArgs{arm_arg_mem_R_pm_imm12_offset}}, // PLI [<Rn>,#+/-<imm12>] 1|1|1|1|0|1|0|0|U|1|0|1|Rn:4|(1)|(1)|(1)|(1)|imm12:12 - {0xff70f010, 0xf650f000, 4, arm_PLI, 0x0, arm_instArgs{arm_arg_mem_R_pm_R_shift_imm_offset}}, // PLI [<Rn>,+/-<Rm>{, <shift>}] 1|1|1|1|0|1|1|0|U|1|0|1|Rn:4|(1)|(1)|(1)|(1)|imm5:5|type:2|0|Rm:4 - {0xff700010, 0xf650f000, 3, arm_PLI, 0x0, arm_instArgs{arm_arg_mem_R_pm_R_shift_imm_offset}}, // PLI [<Rn>,+/-<Rm>{, <shift>}] 1|1|1|1|0|1|1|0|U|1|0|1|Rn:4|(1)|(1)|(1)|(1)|imm5:5|type:2|0|Rm:4 - {0x0fff0000, 0x08bd0000, 4, arm_POP_EQ, 0x1c04, arm_instArgs{arm_arg_registers2}}, // POP<c> <registers2> cond:4|1|0|0|0|1|0|1|1|1|1|0|1|register_list:16 - {0x0fff0fff, 0x049d0004, 4, arm_POP_EQ, 0x1c04, arm_instArgs{arm_arg_registers1}}, // POP<c> <registers1> cond:4|0|1|0|0|1|0|0|1|1|1|0|1|Rt:4|0|0|0|0|0|0|0|0|0|1|0|0 - {0x0fff0000, 0x092d0000, 4, arm_PUSH_EQ, 0x1c04, arm_instArgs{arm_arg_registers2}}, // PUSH<c> <registers2> cond:4|1|0|0|1|0|0|1|0|1|1|0|1|register_list:16 - {0x0fff0fff, 0x052d0004, 4, arm_PUSH_EQ, 0x1c04, arm_instArgs{arm_arg_registers1}}, // PUSH<c> <registers1> cond:4|0|1|0|1|0|0|1|0|1|1|0|1|Rt:4|0|0|0|0|0|0|0|0|0|1|0|0 - {0x0ff00ff0, 0x06200f10, 4, arm_QADD16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // QADD16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|0|1|Rm:4 - {0x0ff000f0, 0x06200f10, 3, arm_QADD16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // QADD16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|0|1|Rm:4 - {0x0ff00ff0, 0x06200f90, 4, arm_QADD8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // QADD8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|0|0|1|Rm:4 - {0x0ff000f0, 0x06200f90, 3, arm_QADD8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // QADD8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|0|0|1|Rm:4 - {0x0ff00ff0, 0x01000050, 4, arm_QADD_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0, arm_arg_R_16}}, // QADD<c> <Rd>,<Rm>,<Rn> cond:4|0|0|0|1|0|0|0|0|Rn:4|Rd:4|(0)|(0)|(0)|(0)|0|1|0|1|Rm:4 - {0x0ff000f0, 0x01000050, 3, arm_QADD_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0, arm_arg_R_16}}, // QADD<c> <Rd>,<Rm>,<Rn> cond:4|0|0|0|1|0|0|0|0|Rn:4|Rd:4|(0)|(0)|(0)|(0)|0|1|0|1|Rm:4 - {0x0ff00ff0, 0x06200f30, 4, arm_QASX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // QASX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|1|1|Rm:4 - {0x0ff000f0, 0x06200f30, 3, arm_QASX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // QASX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|1|1|Rm:4 - {0x0ff00ff0, 0x01400050, 4, arm_QDADD_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0, arm_arg_R_16}}, // QDADD<c> <Rd>,<Rm>,<Rn> cond:4|0|0|0|1|0|1|0|0|Rn:4|Rd:4|(0)|(0)|(0)|(0)|0|1|0|1|Rm:4 - {0x0ff000f0, 0x01400050, 3, arm_QDADD_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0, arm_arg_R_16}}, // QDADD<c> <Rd>,<Rm>,<Rn> cond:4|0|0|0|1|0|1|0|0|Rn:4|Rd:4|(0)|(0)|(0)|(0)|0|1|0|1|Rm:4 - {0x0ff00ff0, 0x01600050, 4, arm_QDSUB_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0, arm_arg_R_16}}, // QDSUB<c> <Rd>,<Rm>,<Rn> cond:4|0|0|0|1|0|1|1|0|Rn:4|Rd:4|0|0|0|0|0|1|0|1|Rm:4 - {0x0ff00ff0, 0x06200f50, 4, arm_QSAX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // QSAX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|0|1|Rm:4 - {0x0ff000f0, 0x06200f50, 3, arm_QSAX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // QSAX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|0|1|Rm:4 - {0x0ff00ff0, 0x06200f70, 4, arm_QSUB16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // QSUB16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|1|1|Rm:4 - {0x0ff000f0, 0x06200f70, 3, arm_QSUB16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // QSUB16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|1|1|Rm:4 - {0x0ff00ff0, 0x06200ff0, 4, arm_QSUB8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // QSUB8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|1|1|1|Rm:4 - {0x0ff000f0, 0x06200ff0, 3, arm_QSUB8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // QSUB8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|1|1|1|Rm:4 - {0x0ff00ff0, 0x01200050, 4, arm_QSUB_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0, arm_arg_R_16}}, // QSUB<c> <Rd>,<Rm>,<Rn> cond:4|0|0|0|1|0|0|1|0|Rn:4|Rd:4|0|0|0|0|0|1|0|1|Rm:4 - {0x0fff0ff0, 0x06ff0f30, 4, arm_RBIT_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0}}, // RBIT<c> <Rd>,<Rm> cond:4|0|1|1|0|1|1|1|1|(1)|(1)|(1)|(1)|Rd:4|(1)|(1)|(1)|(1)|0|0|1|1|Rm:4 - {0x0ff000f0, 0x06ff0f30, 3, arm_RBIT_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0}}, // RBIT<c> <Rd>,<Rm> cond:4|0|1|1|0|1|1|1|1|(1)|(1)|(1)|(1)|Rd:4|(1)|(1)|(1)|(1)|0|0|1|1|Rm:4 - {0x0fff0ff0, 0x06bf0fb0, 4, arm_REV16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0}}, // REV16<c> <Rd>,<Rm> cond:4|0|1|1|0|1|0|1|1|(1)|(1)|(1)|(1)|Rd:4|(1)|(1)|(1)|(1)|1|0|1|1|Rm:4 - {0x0ff000f0, 0x06bf0fb0, 3, arm_REV16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0}}, // REV16<c> <Rd>,<Rm> cond:4|0|1|1|0|1|0|1|1|(1)|(1)|(1)|(1)|Rd:4|(1)|(1)|(1)|(1)|1|0|1|1|Rm:4 - {0x0fff0ff0, 0x06bf0f30, 4, arm_REV_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0}}, // REV<c> <Rd>,<Rm> cond:4|0|1|1|0|1|0|1|1|(1)|(1)|(1)|(1)|Rd:4|(1)|(1)|(1)|(1)|0|0|1|1|Rm:4 - {0x0ff000f0, 0x06bf0f30, 3, arm_REV_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0}}, // REV<c> <Rd>,<Rm> cond:4|0|1|1|0|1|0|1|1|(1)|(1)|(1)|(1)|Rd:4|(1)|(1)|(1)|(1)|0|0|1|1|Rm:4 - {0x0fff0ff0, 0x06ff0fb0, 4, arm_REVSH_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0}}, // REVSH<c> <Rd>,<Rm> cond:4|0|1|1|0|1|1|1|1|(1)|(1)|(1)|(1)|Rd:4|(1)|(1)|(1)|(1)|1|0|1|1|Rm:4 - {0x0ff000f0, 0x06ff0fb0, 3, arm_REVSH_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0}}, // REVSH<c> <Rd>,<Rm> cond:4|0|1|1|0|1|1|1|1|(1)|(1)|(1)|(1)|Rd:4|(1)|(1)|(1)|(1)|1|0|1|1|Rm:4 - {0x0fef0070, 0x01a00060, 2, arm_ROR_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0, arm_arg_imm5}}, // ROR{S}<c> <Rd>,<Rm>,#<imm5> cond:4|0|0|0|1|1|0|1|S|0|0|0|0|Rd:4|imm5:5|1|1|0|Rm:4 - {0x0fef00f0, 0x01a00070, 4, arm_ROR_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0, arm_arg_R_8}}, // ROR{S}<c> <Rd>,<Rn>,<Rm> cond:4|0|0|0|1|1|0|1|S|0|0|0|0|Rd:4|Rm:4|0|1|1|1|Rn:4 - {0x0fef0ff0, 0x01a00060, 4, arm_RRX_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0}}, // RRX{S}<c> <Rd>,<Rm> cond:4|0|0|0|1|1|0|1|S|0|0|0|0|Rd:4|0|0|0|0|0|1|1|0|Rm:4 - {0x0fe00000, 0x02600000, 2, arm_RSB_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_const}}, // RSB{S}<c> <Rd>,<Rn>,#<const> cond:4|0|0|1|0|0|1|1|S|Rn:4|Rd:4|imm12:12 - {0x0fe00090, 0x00600010, 4, arm_RSB_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_shift_R}}, // RSB{S}<c> <Rd>,<Rn>,<Rm>,<type> <Rs> cond:4|0|0|0|0|0|1|1|S|Rn:4|Rd:4|Rs:4|0|type:2|1|Rm:4 - {0x0fe00010, 0x00600000, 2, arm_RSB_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_shift_imm}}, // RSB{S}<c> <Rd>,<Rn>,<Rm>{,<shift>} cond:4|0|0|0|0|0|1|1|S|Rn:4|Rd:4|imm5:5|type:2|0|Rm:4 - {0x0fe00000, 0x02e00000, 2, arm_RSC_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_const}}, // RSC{S}<c> <Rd>,<Rn>,#<const> cond:4|0|0|1|0|1|1|1|S|Rn:4|Rd:4|imm12:12 - {0x0fe00090, 0x00e00010, 4, arm_RSC_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_shift_R}}, // RSC{S}<c> <Rd>,<Rn>,<Rm>,<type> <Rs> cond:4|0|0|0|0|1|1|1|S|Rn:4|Rd:4|Rs:4|0|type:2|1|Rm:4 - {0x0fe00010, 0x00e00000, 2, arm_RSC_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_shift_imm}}, // RSC{S}<c> <Rd>,<Rn>,<Rm>{,<shift>} cond:4|0|0|0|0|1|1|1|S|Rn:4|Rd:4|imm5:5|type:2|0|Rm:4 - {0x0ff00ff0, 0x06100f10, 4, arm_SADD16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SADD16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|0|1|Rm:4 - {0x0ff000f0, 0x06100f10, 3, arm_SADD16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SADD16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|0|1|Rm:4 - {0x0ff00ff0, 0x06100f90, 4, arm_SADD8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SADD8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|0|0|1|Rm:4 - {0x0ff000f0, 0x06100f90, 3, arm_SADD8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SADD8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|0|0|1|Rm:4 - {0x0ff00ff0, 0x06100f30, 4, arm_SASX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SASX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|1|1|Rm:4 - {0x0ff000f0, 0x06100f30, 3, arm_SASX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SASX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|1|1|Rm:4 - {0x0fe00000, 0x02c00000, 2, arm_SBC_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_const}}, // SBC{S}<c> <Rd>,<Rn>,#<const> cond:4|0|0|1|0|1|1|0|S|Rn:4|Rd:4|imm12:12 - {0x0fe00090, 0x00c00010, 4, arm_SBC_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_shift_R}}, // SBC{S}<c> <Rd>,<Rn>,<Rm>,<type> <Rs> cond:4|0|0|0|0|1|1|0|S|Rn:4|Rd:4|Rs:4|0|type:2|1|Rm:4 - {0x0fe00010, 0x00c00000, 2, arm_SBC_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_shift_imm}}, // SBC{S}<c> <Rd>,<Rn>,<Rm>{,<shift>} cond:4|0|0|0|0|1|1|0|S|Rn:4|Rd:4|imm5:5|type:2|0|Rm:4 - {0x0fe00070, 0x07a00050, 4, arm_SBFX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0, arm_arg_imm5, arm_arg_widthm1}}, // SBFX<c> <Rd>,<Rn>,#<lsb>,#<widthm1> cond:4|0|1|1|1|1|0|1|widthm1:5|Rd:4|lsb:5|1|0|1|Rn:4 - {0x0ff00ff0, 0x06800fb0, 4, arm_SEL_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SEL<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|1|0|0|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|0|1|1|Rm:4 - {0x0ff000f0, 0x06800fb0, 3, arm_SEL_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SEL<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|1|0|0|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|0|1|1|Rm:4 - {0xfffffdff, 0xf1010000, 4, arm_SETEND, 0x0, arm_instArgs{arm_arg_endian}}, // SETEND <endian_specifier> 1|1|1|1|0|0|0|1|0|0|0|0|0|0|0|1|0|0|0|0|0|0|E|(0)|(0)|(0)|(0)|(0)|(0)|(0)|(0)|(0) - {0xfffffc00, 0xf1010000, 3, arm_SETEND, 0x0, arm_instArgs{arm_arg_endian}}, // SETEND <endian_specifier> 1|1|1|1|0|0|0|1|0|0|0|0|0|0|0|1|0|0|0|0|0|0|E|(0)|(0)|(0)|(0)|(0)|(0)|(0)|(0)|(0) - {0x0fffffff, 0x0320f004, 4, arm_SEV_EQ, 0x1c04, arm_instArgs{}}, // SEV<c> cond:4|0|0|1|1|0|0|1|0|0|0|0|0|(1)|(1)|(1)|(1)|(0)|(0)|(0)|(0)|0|0|0|0|0|1|0|0 - {0x0fff00ff, 0x0320f004, 3, arm_SEV_EQ, 0x1c04, arm_instArgs{}}, // SEV<c> cond:4|0|0|1|1|0|0|1|0|0|0|0|0|(1)|(1)|(1)|(1)|(0)|(0)|(0)|(0)|0|0|0|0|0|1|0|0 - {0x0ff00ff0, 0x06300f10, 4, arm_SHADD16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SHADD16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|0|1|Rm:4 - {0x0ff000f0, 0x06300f10, 3, arm_SHADD16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SHADD16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|0|1|Rm:4 - {0x0ff00ff0, 0x06300f90, 4, arm_SHADD8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SHADD8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|0|0|1|Rm:4 - {0x0ff000f0, 0x06300f90, 3, arm_SHADD8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SHADD8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|0|0|1|Rm:4 - {0x0ff00ff0, 0x06300f30, 4, arm_SHASX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SHASX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|1|1|Rm:4 - {0x0ff000f0, 0x06300f30, 3, arm_SHASX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SHASX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|1|1|Rm:4 - {0x0ff00ff0, 0x06300f50, 4, arm_SHSAX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SHSAX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|0|1|Rm:4 - {0x0ff000f0, 0x06300f50, 3, arm_SHSAX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SHSAX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|0|1|Rm:4 - {0x0ff00ff0, 0x06300f70, 4, arm_SHSUB16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SHSUB16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|1|1|Rm:4 - {0x0ff000f0, 0x06300f70, 3, arm_SHSUB16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SHSUB16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|1|1|Rm:4 - {0x0ff00ff0, 0x06300ff0, 4, arm_SHSUB8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SHSUB8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|1|1|1|Rm:4 - {0x0ff000f0, 0x06300ff0, 3, arm_SHSUB8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SHSUB8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|1|1|1|Rm:4 - {0x0ff00090, 0x01000080, 4, arm_SMLABB_EQ, 0x50106011c04, arm_instArgs{arm_arg_R_16, arm_arg_R_0, arm_arg_R_8, arm_arg_R_12}}, // SMLA<x><y><c> <Rd>,<Rn>,<Rm>,<Ra> cond:4|0|0|0|1|0|0|0|0|Rd:4|Ra:4|Rm:4|1|M|N|0|Rn:4 - {0x0ff000d0, 0x07000010, 2, arm_SMLAD_EQ, 0x5011c04, arm_instArgs{arm_arg_R_16, arm_arg_R_0, arm_arg_R_8, arm_arg_R_12}}, // SMLAD{X}<c> <Rd>,<Rn>,<Rm>,<Ra> cond:4|0|1|1|1|0|0|0|0|Rd:4|Ra:4|Rm:4|0|0|M|1|Rn:4 - {0x0ff00090, 0x01400080, 4, arm_SMLALBB_EQ, 0x50106011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0, arm_arg_R_8}}, // SMLAL<x><y><c> <RdLo>,<RdHi>,<Rn>,<Rm> cond:4|0|0|0|1|0|1|0|0|RdHi:4|RdLo:4|Rm:4|1|M|N|0|Rn:4 - {0x0ff000d0, 0x07400010, 4, arm_SMLALD_EQ, 0x5011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0, arm_arg_R_8}}, // SMLALD{X}<c> <RdLo>,<RdHi>,<Rn>,<Rm> cond:4|0|1|1|1|0|1|0|0|RdHi:4|RdLo:4|Rm:4|0|0|M|1|Rn:4 - {0x0fe000f0, 0x00e00090, 4, arm_SMLAL_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0, arm_arg_R_8}}, // SMLAL{S}<c> <RdLo>,<RdHi>,<Rn>,<Rm> cond:4|0|0|0|0|1|1|1|S|RdHi:4|RdLo:4|Rm:4|1|0|0|1|Rn:4 - {0x0ff000b0, 0x01200080, 4, arm_SMLAWB_EQ, 0x6011c04, arm_instArgs{arm_arg_R_16, arm_arg_R_0, arm_arg_R_8, arm_arg_R_12}}, // SMLAW<y><c> <Rd>,<Rn>,<Rm>,<Ra> cond:4|0|0|0|1|0|0|1|0|Rd:4|Ra:4|Rm:4|1|M|0|0|Rn:4 - {0x0ff000d0, 0x07000050, 2, arm_SMLSD_EQ, 0x5011c04, arm_instArgs{arm_arg_R_16, arm_arg_R_0, arm_arg_R_8, arm_arg_R_12}}, // SMLSD{X}<c> <Rd>,<Rn>,<Rm>,<Ra> cond:4|0|1|1|1|0|0|0|0|Rd:4|Ra:4|Rm:4|0|1|M|1|Rn:4 - {0x0ff000d0, 0x07400050, 4, arm_SMLSLD_EQ, 0x5011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0, arm_arg_R_8}}, // SMLSLD{X}<c> <RdLo>,<RdHi>,<Rn>,<Rm> cond:4|0|1|1|1|0|1|0|0|RdHi:4|RdLo:4|Rm:4|0|1|M|1|Rn:4 - {0x0ff000d0, 0x07500010, 2, arm_SMMLA_EQ, 0x5011c04, arm_instArgs{arm_arg_R_16, arm_arg_R_0, arm_arg_R_8, arm_arg_R_12}}, // SMMLA{R}<c> <Rd>,<Rn>,<Rm>,<Ra> cond:4|0|1|1|1|0|1|0|1|Rd:4|Ra:4|Rm:4|0|0|R|1|Rn:4 - {0x0ff000d0, 0x075000d0, 4, arm_SMMLS_EQ, 0x5011c04, arm_instArgs{arm_arg_R_16, arm_arg_R_0, arm_arg_R_8, arm_arg_R_12}}, // SMMLS{R}<c> <Rd>,<Rn>,<Rm>,<Ra> cond:4|0|1|1|1|0|1|0|1|Rd:4|Ra:4|Rm:4|1|1|R|1|Rn:4 - {0x0ff0f0d0, 0x0750f010, 4, arm_SMMUL_EQ, 0x5011c04, arm_instArgs{arm_arg_R_16, arm_arg_R_0, arm_arg_R_8}}, // SMMUL{R}<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|1|0|1|0|1|Rd:4|1|1|1|1|Rm:4|0|0|R|1|Rn:4 - {0x0ff0f0d0, 0x0700f010, 4, arm_SMUAD_EQ, 0x5011c04, arm_instArgs{arm_arg_R_16, arm_arg_R_0, arm_arg_R_8}}, // SMUAD{X}<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|1|0|0|0|0|Rd:4|1|1|1|1|Rm:4|0|0|M|1|Rn:4 - {0x0ff0f090, 0x01600080, 4, arm_SMULBB_EQ, 0x50106011c04, arm_instArgs{arm_arg_R_16, arm_arg_R_0, arm_arg_R_8}}, // SMUL<x><y><c> <Rd>,<Rn>,<Rm> cond:4|0|0|0|1|0|1|1|0|Rd:4|0|0|0|0|Rm:4|1|M|N|0|Rn:4 - {0x0fe000f0, 0x00c00090, 4, arm_SMULL_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0, arm_arg_R_8}}, // SMULL{S}<c> <RdLo>,<RdHi>,<Rn>,<Rm> cond:4|0|0|0|0|1|1|0|S|RdHi:4|RdLo:4|Rm:4|1|0|0|1|Rn:4 - {0x0ff0f0b0, 0x012000a0, 4, arm_SMULWB_EQ, 0x6011c04, arm_instArgs{arm_arg_R_16, arm_arg_R_0, arm_arg_R_8}}, // SMULW<y><c> <Rd>,<Rn>,<Rm> cond:4|0|0|0|1|0|0|1|0|Rd:4|0|0|0|0|Rm:4|1|M|1|0|Rn:4 - {0x0ff0f0d0, 0x0700f050, 4, arm_SMUSD_EQ, 0x5011c04, arm_instArgs{arm_arg_R_16, arm_arg_R_0, arm_arg_R_8}}, // SMUSD{X}<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|1|0|0|0|0|Rd:4|1|1|1|1|Rm:4|0|1|M|1|Rn:4 - {0x0ff00ff0, 0x06a00f30, 4, arm_SSAT16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_satimm4m1, arm_arg_R_0}}, // SSAT16<c> <Rd>,#<sat_imm4m1>,<Rn> cond:4|0|1|1|0|1|0|1|0|sat_imm:4|Rd:4|(1)|(1)|(1)|(1)|0|0|1|1|Rn:4 - {0x0ff000f0, 0x06a00f30, 3, arm_SSAT16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_satimm4m1, arm_arg_R_0}}, // SSAT16<c> <Rd>,#<sat_imm4m1>,<Rn> cond:4|0|1|1|0|1|0|1|0|sat_imm:4|Rd:4|(1)|(1)|(1)|(1)|0|0|1|1|Rn:4 - {0x0fe00030, 0x06a00010, 4, arm_SSAT_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_satimm5m1, arm_arg_R_shift_imm}}, // SSAT<c> <Rd>,#<sat_imm5m1>,<Rn>{,<shift>} cond:4|0|1|1|0|1|0|1|sat_imm:5|Rd:4|imm5:5|sh|0|1|Rn:4 - {0x0ff00ff0, 0x06100f50, 4, arm_SSAX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SSAX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|0|1|Rm:4 - {0x0ff000f0, 0x06100f50, 3, arm_SSAX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SSAX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|0|1|Rm:4 - {0x0ff00ff0, 0x06100f70, 4, arm_SSUB16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SSUB16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|1|1|Rm:4 - {0x0ff000f0, 0x06100f70, 3, arm_SSUB16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SSUB16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|1|1|Rm:4 - {0x0ff00ff0, 0x06100ff0, 4, arm_SSUB8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SSUB8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|1|1|1|Rm:4 - {0x0ff000f0, 0x06100ff0, 3, arm_SSUB8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // SSUB8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|0|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|1|1|1|Rm:4 - {0x0fd00000, 0x08800000, 4, arm_STM_EQ, 0x1c04, arm_instArgs{arm_arg_R_16_WB, arm_arg_registers}}, // STM<c> <Rn>{!},<registers> cond:4|1|0|0|0|1|0|W|0|Rn:4|register_list:16 - {0x0fd00000, 0x08000000, 4, arm_STMDA_EQ, 0x1c04, arm_instArgs{arm_arg_R_16_WB, arm_arg_registers}}, // STMDA<c> <Rn>{!},<registers> cond:4|1|0|0|0|0|0|W|0|Rn:4|register_list:16 - {0x0fd00000, 0x09000000, 2, arm_STMDB_EQ, 0x1c04, arm_instArgs{arm_arg_R_16_WB, arm_arg_registers}}, // STMDB<c> <Rn>{!},<registers> cond:4|1|0|0|1|0|0|W|0|Rn:4|register_list:16 - {0x0fd00000, 0x09800000, 4, arm_STMIB_EQ, 0x1c04, arm_instArgs{arm_arg_R_16_WB, arm_arg_registers}}, // STMIB<c> <Rn>{!},<registers> cond:4|1|0|0|1|1|0|W|0|Rn:4|register_list:16 - {0x0e500018, 0x06000000, 2, arm_STR_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_R_shift_imm_W}}, // STR<c> <Rt>,[<Rn>,+/-<Rm>{, <shift>}]{!} cond:4|0|1|1|P|U|0|W|0|Rn:4|Rt:4|imm5:5|type:2|0|Rm:4 - {0x0e500000, 0x04000000, 2, arm_STR_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_imm12_W}}, // STR<c> <Rt>,[<Rn>{,#+/-<imm12>}]{!} cond:4|0|1|0|P|U|0|W|0|Rn:4|Rt:4|imm12:12 - {0x0e500010, 0x06400000, 2, arm_STRB_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_R_shift_imm_W}}, // STRB<c> <Rt>,[<Rn>,+/-<Rm>{, <shift>}]{!} cond:4|0|1|1|P|U|1|W|0|Rn:4|Rt:4|imm5:5|type:2|0|Rm:4 - {0x0e500000, 0x04400000, 2, arm_STRB_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_imm12_W}}, // STRB<c> <Rt>,[<Rn>{,#+/-<imm12>}]{!} cond:4|0|1|0|P|U|1|W|0|Rn:4|Rt:4|imm12:12 - {0x0f700000, 0x04600000, 4, arm_STRBT_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_imm12_postindex}}, // STRBT<c> <Rt>,[<Rn>],#+/-<imm12> cond:4|0|1|0|0|U|1|1|0|Rn:4|Rt:4|imm12:12 - {0x0f700010, 0x06600000, 4, arm_STRBT_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_R_shift_imm_postindex}}, // STRBT<c> <Rt>,[<Rn>],+/-<Rm>{, <shift>} cond:4|0|1|1|0|U|1|1|0|Rn:4|Rt:4|imm5:5|type:2|0|Rm:4 - {0x0e500ff0, 0x000000f0, 4, arm_STRD_EQ, 0x1c04, arm_instArgs{arm_arg_R1_12, arm_arg_R2_12, arm_arg_mem_R_pm_R_W}}, // STRD<c> <Rt1>,<Rt2>,[<Rn>,+/-<Rm>]{!} cond:4|0|0|0|P|U|0|W|0|Rn:4|Rt:4|(0)|(0)|(0)|(0)|1|1|1|1|Rm:4 - {0x0e5000f0, 0x000000f0, 3, arm_STRD_EQ, 0x1c04, arm_instArgs{arm_arg_R1_12, arm_arg_R2_12, arm_arg_mem_R_pm_R_W}}, // STRD<c> <Rt1>,<Rt2>,[<Rn>,+/-<Rm>]{!} cond:4|0|0|0|P|U|0|W|0|Rn:4|Rt:4|(0)|(0)|(0)|(0)|1|1|1|1|Rm:4 - {0x0e5000f0, 0x004000f0, 4, arm_STRD_EQ, 0x1c04, arm_instArgs{arm_arg_R1_12, arm_arg_R2_12, arm_arg_mem_R_pm_imm8_W}}, // STRD<c> <Rt1>,<Rt2>,[<Rn>{,#+/-<imm8>}]{!} cond:4|0|0|0|P|U|1|W|0|Rn:4|Rt:4|imm4H:4|1|1|1|1|imm4L:4 - {0x0ff00ff0, 0x01800f90, 4, arm_STREX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0, arm_arg_mem_R}}, // STREX<c> <Rd>,<Rt>,[<Rn>] cond:4|0|0|0|1|1|0|0|0|Rn:4|Rd:4|1|1|1|1|1|0|0|1|Rt:4 - {0x0ff00ff0, 0x01c00f90, 4, arm_STREXB_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0, arm_arg_mem_R}}, // STREXB<c> <Rd>,<Rt>,[<Rn>] cond:4|0|0|0|1|1|1|0|0|Rn:4|Rd:4|1|1|1|1|1|0|0|1|Rt:4 - {0x0ff00ff0, 0x01a00f90, 4, arm_STREXD_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R1_0, arm_arg_R2_0, arm_arg_mem_R}}, // STREXD<c> <Rd>,<Rt1>,<Rt2>,[<Rn>] cond:4|0|0|0|1|1|0|1|0|Rn:4|Rd:4|1|1|1|1|1|0|0|1|Rt:4 - {0x0ff00ff0, 0x01e00f90, 4, arm_STREXH_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0, arm_arg_mem_R}}, // STREXH<c> <Rd>,<Rt>,[<Rn>] cond:4|0|0|0|1|1|1|1|0|Rn:4|Rd:4|1|1|1|1|1|0|0|1|Rt:4 - {0x0e500ff0, 0x000000b0, 2, arm_STRH_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_R_W}}, // STRH<c> <Rt>,[<Rn>,+/-<Rm>]{!} cond:4|0|0|0|P|U|0|W|0|Rn:4|Rt:4|0|0|0|0|1|0|1|1|Rm:4 - {0x0e5000f0, 0x004000b0, 2, arm_STRH_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_imm8_W}}, // STRH<c> <Rt>,[<Rn>{,#+/-<imm8>}]{!} cond:4|0|0|0|P|U|1|W|0|Rn:4|Rt:4|imm4H:4|1|0|1|1|imm4L:4 - {0x0f7000f0, 0x006000b0, 4, arm_STRHT_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_imm8_postindex}}, // STRHT<c> <Rt>, [<Rn>] {,#+/-<imm8>} cond:4|0|0|0|0|U|1|1|0|Rn:4|Rt:4|imm4H:4|1|0|1|1|imm4L:4 - {0x0f700ff0, 0x002000b0, 4, arm_STRHT_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_R_postindex}}, // STRHT<c> <Rt>, [<Rn>], +/-<Rm> cond:4|0|0|0|0|U|0|1|0|Rn:4|Rt:4|0|0|0|0|1|0|1|1|Rm:4 - {0x0f700000, 0x04200000, 4, arm_STRT_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_imm12_postindex}}, // STRT<c> <Rt>, [<Rn>] {,#+/-<imm12>} cond:4|0|1|0|0|U|0|1|0|Rn:4|Rt:4|imm12:12 - {0x0f700010, 0x06200000, 4, arm_STRT_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_mem_R_pm_R_shift_imm_postindex}}, // STRT<c> <Rt>,[<Rn>],+/-<Rm>{, <shift>} cond:4|0|1|1|0|U|0|1|0|Rn:4|Rt:4|imm5:5|type:2|0|Rm:4 - {0x0fe00000, 0x02400000, 2, arm_SUB_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_const}}, // SUB{S}<c> <Rd>,<Rn>,#<const> cond:4|0|0|1|0|0|1|0|S|Rn:4|Rd:4|imm12:12 - {0x0fe00090, 0x00400010, 4, arm_SUB_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_shift_R}}, // SUB{S}<c> <Rd>,<Rn>,<Rm>,<type> <Rs> cond:4|0|0|0|0|0|1|0|S|Rn:4|Rd:4|Rs:4|0|type:2|1|Rm:4 - {0x0fe00010, 0x00400000, 2, arm_SUB_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_shift_imm}}, // SUB{S}<c> <Rd>,<Rn>,<Rm>{,<shift>} cond:4|0|0|0|0|0|1|0|S|Rn:4|Rd:4|imm5:5|type:2|0|Rm:4 - {0x0fef0000, 0x024d0000, 2, arm_SUB_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_SP, arm_arg_const}}, // SUB{S}<c> <Rd>,SP,#<const> cond:4|0|0|1|0|0|1|0|S|1|1|0|1|Rd:4|imm12:12 - {0x0fef0010, 0x004d0000, 2, arm_SUB_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_SP, arm_arg_R_shift_imm}}, // SUB{S}<c> <Rd>,SP,<Rm>{,<shift>} cond:4|0|0|0|0|0|1|0|S|1|1|0|1|Rd:4|imm5:5|type:2|0|Rm:4 - {0x0f000000, 0x0f000000, 4, arm_SVC_EQ, 0x1c04, arm_instArgs{arm_arg_imm24}}, // SVC<c> #<imm24> cond:4|1|1|1|1|imm24:24 - {0x0fb00ff0, 0x01000090, 4, arm_SWP_EQ, 0x16011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0, arm_arg_mem_R}}, // SWP{B}<c> <Rt>,<Rm>,[<Rn>] cond:4|0|0|0|1|0|B|0|0|Rn:4|Rt:4|0|0|0|0|1|0|0|1|Rm:4 - {0x0ff003f0, 0x06800070, 2, arm_SXTAB16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_rotate}}, // SXTAB16<c> <Rd>,<Rn>,<Rm>{,<rotation>} cond:4|0|1|1|0|1|0|0|0|Rn:4|Rd:4|rotate:2|0|0|0|1|1|1|Rm:4 - {0x0ff003f0, 0x06a00070, 2, arm_SXTAB_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_rotate}}, // SXTAB<c> <Rd>,<Rn>,<Rm>{,<rotation>} cond:4|0|1|1|0|1|0|1|0|Rn:4|Rd:4|rotate:2|0|0|0|1|1|1|Rm:4 - {0x0ff003f0, 0x06b00070, 2, arm_SXTAH_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_rotate}}, // SXTAH<c> <Rd>,<Rn>,<Rm>{,<rotation>} cond:4|0|1|1|0|1|0|1|1|Rn:4|Rd:4|rotate:2|0|0|0|1|1|1|Rm:4 - {0x0fff03f0, 0x068f0070, 4, arm_SXTB16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_rotate}}, // SXTB16<c> <Rd>,<Rm>{,<rotation>} cond:4|0|1|1|0|1|0|0|0|1|1|1|1|Rd:4|rotate:2|0|0|0|1|1|1|Rm:4 - {0x0fff03f0, 0x06af0070, 4, arm_SXTB_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_rotate}}, // SXTB<c> <Rd>,<Rm>{,<rotation>} cond:4|0|1|1|0|1|0|1|0|1|1|1|1|Rd:4|rotate:2|0|0|0|1|1|1|Rm:4 - {0x0fff03f0, 0x06bf0070, 4, arm_SXTH_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_rotate}}, // SXTH<c> <Rd>,<Rm>{,<rotation>} cond:4|0|1|1|0|1|0|1|1|1|1|1|1|Rd:4|rotate:2|0|0|0|1|1|1|Rm:4 - {0x0ff0f000, 0x03300000, 4, arm_TEQ_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_const}}, // TEQ<c> <Rn>,#<const> cond:4|0|0|1|1|0|0|1|1|Rn:4|(0)|(0)|(0)|(0)|imm12:12 - {0x0ff00000, 0x03300000, 3, arm_TEQ_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_const}}, // TEQ<c> <Rn>,#<const> cond:4|0|0|1|1|0|0|1|1|Rn:4|(0)|(0)|(0)|(0)|imm12:12 - {0x0ff0f090, 0x01300010, 4, arm_TEQ_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_R_shift_R}}, // TEQ<c> <Rn>,<Rm>,<type> <Rs> cond:4|0|0|0|1|0|0|1|1|Rn:4|(0)|(0)|(0)|(0)|Rs:4|0|type:2|1|Rm:4 - {0x0ff00090, 0x01300010, 3, arm_TEQ_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_R_shift_R}}, // TEQ<c> <Rn>,<Rm>,<type> <Rs> cond:4|0|0|0|1|0|0|1|1|Rn:4|(0)|(0)|(0)|(0)|Rs:4|0|type:2|1|Rm:4 - {0x0ff0f010, 0x01300000, 4, arm_TEQ_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_R_shift_imm}}, // TEQ<c> <Rn>,<Rm>{,<shift>} cond:4|0|0|0|1|0|0|1|1|Rn:4|(0)|(0)|(0)|(0)|imm5:5|type:2|0|Rm:4 - {0x0ff00010, 0x01300000, 3, arm_TEQ_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_R_shift_imm}}, // TEQ<c> <Rn>,<Rm>{,<shift>} cond:4|0|0|0|1|0|0|1|1|Rn:4|(0)|(0)|(0)|(0)|imm5:5|type:2|0|Rm:4 - {0x0ff0f000, 0x03100000, 4, arm_TST_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_const}}, // TST<c> <Rn>,#<const> cond:4|0|0|1|1|0|0|0|1|Rn:4|(0)|(0)|(0)|(0)|imm12:12 - {0x0ff00000, 0x03100000, 3, arm_TST_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_const}}, // TST<c> <Rn>,#<const> cond:4|0|0|1|1|0|0|0|1|Rn:4|(0)|(0)|(0)|(0)|imm12:12 - {0x0ff0f090, 0x01100010, 4, arm_TST_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_R_shift_R}}, // TST<c> <Rn>,<Rm>,<type> <Rs> cond:4|0|0|0|1|0|0|0|1|Rn:4|(0)|(0)|(0)|(0)|Rs:4|0|type:2|1|Rm:4 - {0x0ff00090, 0x01100010, 3, arm_TST_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_R_shift_R}}, // TST<c> <Rn>,<Rm>,<type> <Rs> cond:4|0|0|0|1|0|0|0|1|Rn:4|(0)|(0)|(0)|(0)|Rs:4|0|type:2|1|Rm:4 - {0x0ff0f010, 0x01100000, 4, arm_TST_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_R_shift_imm}}, // TST<c> <Rn>,<Rm>{,<shift>} cond:4|0|0|0|1|0|0|0|1|Rn:4|(0)|(0)|(0)|(0)|imm5:5|type:2|0|Rm:4 - {0x0ff00010, 0x01100000, 3, arm_TST_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_R_shift_imm}}, // TST<c> <Rn>,<Rm>{,<shift>} cond:4|0|0|0|1|0|0|0|1|Rn:4|(0)|(0)|(0)|(0)|imm5:5|type:2|0|Rm:4 - {0x0ff00ff0, 0x06500f10, 4, arm_UADD16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UADD16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|0|1|Rm:4 - {0x0ff000f0, 0x06500f10, 3, arm_UADD16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UADD16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|0|1|Rm:4 - {0x0ff00ff0, 0x06500f90, 4, arm_UADD8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UADD8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|0|0|1|Rm:4 - {0x0ff000f0, 0x06500f90, 3, arm_UADD8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UADD8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|0|0|1|Rm:4 - {0x0ff00ff0, 0x06500f30, 4, arm_UASX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UASX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|1|1|Rm:4 - {0x0ff000f0, 0x06500f30, 3, arm_UASX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UASX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|1|1|Rm:4 - {0x0fe00070, 0x07e00050, 4, arm_UBFX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_0, arm_arg_imm5, arm_arg_widthm1}}, // UBFX<c> <Rd>,<Rn>,#<lsb>,#<widthm1> cond:4|0|1|1|1|1|1|1|widthm1:5|Rd:4|lsb:5|1|0|1|Rn:4 - {0x0ff00ff0, 0x06700f10, 4, arm_UHADD16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UHADD16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|0|1|Rm:4 - {0x0ff000f0, 0x06700f10, 3, arm_UHADD16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UHADD16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|0|1|Rm:4 - {0x0ff00ff0, 0x06700f90, 4, arm_UHADD8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UHADD8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|0|0|1|Rm:4 - {0x0ff000f0, 0x06700f90, 3, arm_UHADD8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UHADD8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|0|0|1|Rm:4 - {0x0ff00ff0, 0x06700f30, 4, arm_UHASX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UHASX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|1|1|Rm:4 - {0x0ff000f0, 0x06700f30, 3, arm_UHASX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UHASX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|1|1|Rm:4 - {0x0ff00ff0, 0x06700f50, 4, arm_UHSAX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UHSAX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|0|1|Rm:4 - {0x0ff000f0, 0x06700f50, 3, arm_UHSAX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UHSAX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|0|1|Rm:4 - {0x0ff00ff0, 0x06700f70, 4, arm_UHSUB16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UHSUB16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|1|1|Rm:4 - {0x0ff000f0, 0x06700f70, 3, arm_UHSUB16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UHSUB16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|1|1|Rm:4 - {0x0ff00ff0, 0x06700ff0, 4, arm_UHSUB8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UHSUB8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|1|1|1|Rm:4 - {0x0ff000f0, 0x06700ff0, 3, arm_UHSUB8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UHSUB8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|1|1|1|Rm:4 - {0x0ff000f0, 0x00400090, 4, arm_UMAAL_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0, arm_arg_R_8}}, // UMAAL<c> <RdLo>,<RdHi>,<Rn>,<Rm> cond:4|0|0|0|0|0|1|0|0|RdHi:4|RdLo:4|Rm:4|1|0|0|1|Rn:4 - {0x0fe000f0, 0x00a00090, 4, arm_UMLAL_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0, arm_arg_R_8}}, // UMLAL{S}<c> <RdLo>,<RdHi>,<Rn>,<Rm> cond:4|0|0|0|0|1|0|1|S|RdHi:4|RdLo:4|Rm:4|1|0|0|1|Rn:4 - {0x0fe000f0, 0x00800090, 4, arm_UMULL_EQ, 0x14011c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0, arm_arg_R_8}}, // UMULL{S}<c> <RdLo>,<RdHi>,<Rn>,<Rm> cond:4|0|0|0|0|1|0|0|S|RdHi:4|RdLo:4|Rm:4|1|0|0|1|Rn:4 - {0x0ff00ff0, 0x06600f10, 4, arm_UQADD16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UQADD16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|0|1|Rm:4 - {0x0ff000f0, 0x06600f10, 3, arm_UQADD16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UQADD16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|0|1|Rm:4 - {0x0ff00ff0, 0x06600f90, 4, arm_UQADD8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UQADD8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|0|0|1|Rm:4 - {0x0ff000f0, 0x06600f90, 3, arm_UQADD8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UQADD8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|0|0|1|Rm:4 - {0x0ff00ff0, 0x06600f30, 4, arm_UQASX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UQASX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|1|1|Rm:4 - {0x0ff000f0, 0x06600f30, 3, arm_UQASX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UQASX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|0|1|1|Rm:4 - {0x0ff00ff0, 0x06600f50, 4, arm_UQSAX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UQSAX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|0|1|Rm:4 - {0x0ff000f0, 0x06600f50, 3, arm_UQSAX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UQSAX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|0|1|Rm:4 - {0x0ff00ff0, 0x06600f70, 4, arm_UQSUB16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UQSUB16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|1|1|Rm:4 - {0x0ff000f0, 0x06600f70, 3, arm_UQSUB16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UQSUB16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|1|1|Rm:4 - {0x0ff00ff0, 0x06600ff0, 4, arm_UQSUB8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UQSUB8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|1|1|1|Rm:4 - {0x0ff000f0, 0x06600ff0, 3, arm_UQSUB8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // UQSUB8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|1|0|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|1|1|1|Rm:4 - {0x0ff0f0f0, 0x0780f010, 4, arm_USAD8_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_R_0, arm_arg_R_8}}, // USAD8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|1|1|0|0|0|Rd:4|1|1|1|1|Rm:4|0|0|0|1|Rn:4 - {0x0ff000f0, 0x07800010, 2, arm_USADA8_EQ, 0x1c04, arm_instArgs{arm_arg_R_16, arm_arg_R_0, arm_arg_R_8, arm_arg_R_12}}, // USADA8<c> <Rd>,<Rn>,<Rm>,<Ra> cond:4|0|1|1|1|1|0|0|0|Rd:4|Ra:4|Rm:4|0|0|0|1|Rn:4 - {0x0ff00ff0, 0x06e00f30, 4, arm_USAT16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_satimm4, arm_arg_R_0}}, // USAT16<c> <Rd>,#<sat_imm4>,<Rn> cond:4|0|1|1|0|1|1|1|0|sat_imm:4|Rd:4|(1)|(1)|(1)|(1)|0|0|1|1|Rn:4 - {0x0ff000f0, 0x06e00f30, 3, arm_USAT16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_satimm4, arm_arg_R_0}}, // USAT16<c> <Rd>,#<sat_imm4>,<Rn> cond:4|0|1|1|0|1|1|1|0|sat_imm:4|Rd:4|(1)|(1)|(1)|(1)|0|0|1|1|Rn:4 - {0x0fe00030, 0x06e00010, 4, arm_USAT_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_satimm5, arm_arg_R_shift_imm}}, // USAT<c> <Rd>,#<sat_imm5>,<Rn>{,<shift>} cond:4|0|1|1|0|1|1|1|sat_imm:5|Rd:4|imm5:5|sh|0|1|Rn:4 - {0x0ff00ff0, 0x06500f50, 4, arm_USAX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // USAX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|0|1|Rm:4 - {0x0ff000f0, 0x06500f50, 3, arm_USAX_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // USAX<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|0|1|Rm:4 - {0x0ff00ff0, 0x06500f70, 4, arm_USUB16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // USUB16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|1|1|Rm:4 - {0x0ff000f0, 0x06500f70, 3, arm_USUB16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // USUB16<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|0|1|1|1|Rm:4 - {0x0ff00ff0, 0x06500ff0, 4, arm_USUB8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // USUB8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|1|1|1|Rm:4 - {0x0ff000f0, 0x06500ff0, 3, arm_USUB8_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_0}}, // USUB8<c> <Rd>,<Rn>,<Rm> cond:4|0|1|1|0|0|1|0|1|Rn:4|Rd:4|(1)|(1)|(1)|(1)|1|1|1|1|Rm:4 - {0x0ff003f0, 0x06c00070, 2, arm_UXTAB16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_rotate}}, // UXTAB16<c> <Rd>,<Rn>,<Rm>{,<rotation>} cond:4|0|1|1|0|1|1|0|0|Rn:4|Rd:4|rotate:2|0|0|0|1|1|1|Rm:4 - {0x0ff003f0, 0x06e00070, 2, arm_UXTAB_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_rotate}}, // UXTAB<c> <Rd>,<Rn>,<Rm>{,<rotation>} cond:4|0|1|1|0|1|1|1|0|Rn:4|Rd:4|rotate:2|0|0|0|1|1|1|Rm:4 - {0x0ff003f0, 0x06f00070, 2, arm_UXTAH_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_16, arm_arg_R_rotate}}, // UXTAH<c> <Rd>,<Rn>,<Rm>{,<rotation>} cond:4|0|1|1|0|1|1|1|1|Rn:4|Rd:4|rotate:2|0|0|0|1|1|1|Rm:4 - {0x0fff03f0, 0x06cf0070, 4, arm_UXTB16_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_rotate}}, // UXTB16<c> <Rd>,<Rm>{,<rotation>} cond:4|0|1|1|0|1|1|0|0|1|1|1|1|Rd:4|rotate:2|0|0|0|1|1|1|Rm:4 - {0x0fff03f0, 0x06ef0070, 4, arm_UXTB_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_rotate}}, // UXTB<c> <Rd>,<Rm>{,<rotation>} cond:4|0|1|1|0|1|1|1|0|1|1|1|1|Rd:4|rotate:2|0|0|0|1|1|1|Rm:4 - {0x0fff03f0, 0x06ff0070, 4, arm_UXTH_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_R_rotate}}, // UXTH<c> <Rd>,<Rm>{,<rotation>} cond:4|0|1|1|0|1|1|1|1|1|1|1|1|Rd:4|rotate:2|0|0|0|1|1|1|Rm:4 - {0x0fb00e10, 0x0e000a00, 4, arm_VMLA_EQ_F32, 0x60108011c04, arm_instArgs{arm_arg_Sd_Dd, arm_arg_Sn_Dn, arm_arg_Sm_Dm}}, // V<MLA,MLS><c>.F<32,64> <Sd,Dd>, <Sn,Dn>, <Sm,Dm> cond:4|1|1|1|0|0|D|0|0|Vn:4|Vd:4|1|0|1|sz|N|op|M|0|Vm:4 - {0x0fbf0ed0, 0x0eb00ac0, 4, arm_VABS_EQ_F32, 0x8011c04, arm_instArgs{arm_arg_Sd_Dd, arm_arg_Sm_Dm}}, // VABS<c>.F<32,64> <Sd,Dd>, <Sm,Dm> cond:4|1|1|1|0|1|D|1|1|0|0|0|0|Vd:4|1|0|1|sz|1|1|M|0|Vm:4 - {0x0fb00e50, 0x0e300a00, 4, arm_VADD_EQ_F32, 0x8011c04, arm_instArgs{arm_arg_Sd_Dd, arm_arg_Sn_Dn, arm_arg_Sm_Dm}}, // VADD<c>.F<32,64> <Sd,Dd>, <Sn,Dn>, <Sm,Dm> cond:4|1|1|1|0|0|D|1|1|Vn:4|Vd:4|1|0|1|sz|N|0|M|0|Vm:4 - {0x0fbf0e7f, 0x0eb50a40, 4, arm_VCMP_EQ_F32, 0x70108011c04, arm_instArgs{arm_arg_Sd_Dd, arm_arg_fp_0}}, // VCMP{E}<c>.F<32,64> <Sd,Dd>, #0.0 cond:4|1|1|1|0|1|D|1|1|0|1|0|1|Vd:4|1|0|1|sz|E|1|0|0|(0)|(0)|(0)|(0) - {0x0fbf0e70, 0x0eb50a40, 3, arm_VCMP_EQ_F32, 0x70108011c04, arm_instArgs{arm_arg_Sd_Dd, arm_arg_fp_0}}, // VCMP{E}<c>.F<32,64> <Sd,Dd>, #0.0 cond:4|1|1|1|0|1|D|1|1|0|1|0|1|Vd:4|1|0|1|sz|E|1|0|0|(0)|(0)|(0)|(0) - {0x0fbf0e50, 0x0eb40a40, 4, arm_VCMP_EQ_F32, 0x70108011c04, arm_instArgs{arm_arg_Sd_Dd, arm_arg_Sm_Dm}}, // VCMP{E}<c>.F<32,64> <Sd,Dd>, <Sm,Dm> cond:4|1|1|1|0|1|D|1|1|0|1|0|0|Vd:4|1|0|1|sz|E|1|M|0|Vm:4 - {0x0fbe0e50, 0x0eba0a40, 4, arm_VCVT_EQ_F32_FXS16, 0x801100107011c04, arm_instArgs{arm_arg_Sd_Dd, arm_arg_Sd_Dd, arm_arg_fbits}}, // VCVT<c>.F<32,64>.FX<S,U><16,32> <Sd,Dd>, <Sd,Dd>, #<fbits> cond:4|1|1|1|0|1|D|1|1|1|0|1|U|Vd:4|1|0|1|sz|sx|1|i|0|imm4:4 - {0x0fbe0e50, 0x0ebe0a40, 4, arm_VCVT_EQ_FXS16_F32, 0x1001070108011c04, arm_instArgs{arm_arg_Sd_Dd, arm_arg_Sd_Dd, arm_arg_fbits}}, // VCVT<c>.FX<S,U><16,32>.F<32,64> <Sd,Dd>, <Sd,Dd>, #<fbits> cond:4|1|1|1|0|1|D|1|1|1|1|1|U|Vd:4|1|0|1|sz|sx|1|i|0|imm4:4 - {0x0fbf0ed0, 0x0eb70ac0, 4, arm_VCVT_EQ_F64_F32, 0x8011c04, arm_instArgs{arm_arg_Dd_Sd, arm_arg_Sm_Dm}}, // VCVT<c>.<F64.F32,F32.F64> <Dd,Sd>, <Sm,Dm> cond:4|1|1|1|0|1|D|1|1|0|1|1|1|Vd:4|1|0|1|sz|1|1|M|0|Vm:4 - {0x0fbe0f50, 0x0eb20a40, 4, arm_VCVTB_EQ_F32_F16, 0x70110011c04, arm_instArgs{arm_arg_Sd, arm_arg_Sm}}, // VCVT<B,T><c>.<F32.F16,F16.F32> <Sd>, <Sm> cond:4|1|1|1|0|1|D|1|1|0|0|1|op|Vd:4|1|0|1|0|T|1|M|0|Vm:4 - {0x0fbf0e50, 0x0eb80a40, 4, arm_VCVT_EQ_F32_U32, 0x80107011c04, arm_instArgs{arm_arg_Sd_Dd, arm_arg_Sm}}, // VCVT<c>.F<32,64>.<U,S>32 <Sd,Dd>, <Sm> cond:4|1|1|1|0|1|D|1|1|1|0|0|0|Vd:4|1|0|1|sz|op|1|M|0|Vm:4 - {0x0fbe0e50, 0x0ebc0a40, 4, arm_VCVTR_EQ_U32_F32, 0x701100108011c04, arm_instArgs{arm_arg_Sd, arm_arg_Sm_Dm}}, // VCVT<R,><c>.<U,S>32.F<32,64> <Sd>, <Sm,Dm> cond:4|1|1|1|0|1|D|1|1|1|1|0|signed|Vd:4|1|0|1|sz|op|1|M|0|Vm:4 - {0x0fb00e50, 0x0e800a00, 4, arm_VDIV_EQ_F32, 0x8011c04, arm_instArgs{arm_arg_Sd_Dd, arm_arg_Sn_Dn, arm_arg_Sm_Dm}}, // VDIV<c>.F<32,64> <Sd,Dd>, <Sn,Dn>, <Sm,Dm> cond:4|1|1|1|0|1|D|0|0|Vn:4|Vd:4|1|0|1|sz|N|0|M|0|Vm:4 - {0x0f300e00, 0x0d100a00, 4, arm_VLDR_EQ, 0x1c04, arm_instArgs{arm_arg_Sd_Dd, arm_arg_mem_R_pm_imm8at0_offset}}, // VLDR<c> <Sd,Dd>, [<Rn>{,#+/-<imm8>}] cond:4|1|1|0|1|U|D|0|1|Rn:4|Vd:4|1|0|1|sz|imm8:8 - {0x0ff00f7f, 0x0e000a10, 4, arm_VMOV_EQ, 0x1c04, arm_instArgs{arm_arg_Sn, arm_arg_R_12}}, // VMOV<c> <Sn>, <Rt> cond:4|1|1|1|0|0|0|0|0|Vn:4|Rt:4|1|0|1|0|N|0|0|1|0|0|0|0 - {0x0ff00f7f, 0x0e100a10, 4, arm_VMOV_EQ, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_Sn}}, // VMOV<c> <Rt>, <Sn> cond:4|1|1|1|0|0|0|0|1|Vn:4|Rt:4|1|0|1|0|N|0|0|1|0|0|0|0 - {0x0fd00f7f, 0x0e100b10, 4, arm_VMOV_EQ_32, 0x1c04, arm_instArgs{arm_arg_R_12, arm_arg_Dn_half}}, // VMOV<c>.32 <Rt>, <Dn[x]> cond:4|1|1|1|0|0|0|opc1|1|Vn:4|Rt:4|1|0|1|1|N|0|0|1|0|0|0|0 - {0x0fd00f7f, 0x0e000b10, 4, arm_VMOV_EQ_32, 0x1c04, arm_instArgs{arm_arg_Dn_half, arm_arg_R_12}}, // VMOV<c>.32 <Dd[x]>, <Rt> cond:4|1|1|1|0|0|0|opc1|0|Vd:4|Rt:4|1|0|1|1|D|0|0|1|0|0|0|0 - {0x0fb00ef0, 0x0eb00a00, 4, arm_VMOV_EQ_F32, 0x8011c04, arm_instArgs{arm_arg_Sd_Dd, arm_arg_imm_vfp}}, // VMOV<c>.F<32,64> <Sd,Dd>, #<imm_vfp> cond:4|1|1|1|0|1|D|1|1|imm4H:4|Vd:4|1|0|1|sz|0|0|0|0|imm4L:4 - {0x0fbf0ed0, 0x0eb00a40, 4, arm_VMOV_EQ_F32, 0x8011c04, arm_instArgs{arm_arg_Sd_Dd, arm_arg_Sm_Dm}}, // VMOV<c>.F<32,64> <Sd,Dd>, <Sm,Dm> cond:4|1|1|1|0|1|D|1|1|0|0|0|0|Vd:4|1|0|1|sz|0|1|M|0|Vm:4 - {0x0fff0fff, 0x0ef10a10, 4, arm_VMRS_EQ, 0x1c04, arm_instArgs{arm_arg_R_12_nzcv, arm_arg_FPSCR}}, // VMRS<c> <Rt_nzcv>, FPSCR cond:4|1|1|1|0|1|1|1|1|0|0|0|1|Rt:4|1|0|1|0|0|0|0|1|0|0|0|0 - {0x0fff0fff, 0x0ee10a10, 4, arm_VMSR_EQ, 0x1c04, arm_instArgs{arm_arg_FPSCR, arm_arg_R_12}}, // VMSR<c> FPSCR, <Rt> cond:4|1|1|1|0|1|1|1|0|0|0|0|1|Rt:4|1|0|1|0|0|0|0|1|0|0|0|0 - {0x0fb00e50, 0x0e200a00, 4, arm_VMUL_EQ_F32, 0x8011c04, arm_instArgs{arm_arg_Sd_Dd, arm_arg_Sn_Dn, arm_arg_Sm_Dm}}, // VMUL<c>.F<32,64> <Sd,Dd>, <Sn,Dn>, <Sm,Dm> cond:4|1|1|1|0|0|D|1|0|Vn:4|Vd:4|1|0|1|sz|N|0|M|0|Vm:4 - {0x0fbf0ed0, 0x0eb10a40, 4, arm_VNEG_EQ_F32, 0x8011c04, arm_instArgs{arm_arg_Sd_Dd, arm_arg_Sm_Dm}}, // VNEG<c>.F<32,64> <Sd,Dd>, <Sm,Dm> cond:4|1|1|1|0|1|D|1|1|0|0|0|1|Vd:4|1|0|1|sz|0|1|M|0|Vm:4 - {0x0fb00e10, 0x0e100a00, 4, arm_VNMLS_EQ_F32, 0x60108011c04, arm_instArgs{arm_arg_Sd_Dd, arm_arg_Sn_Dn, arm_arg_Sm_Dm}}, // VN<MLS,MLA><c>.F<32,64> <Sd,Dd>, <Sn,Dn>, <Sm,Dm> cond:4|1|1|1|0|0|D|0|1|Vn:4|Vd:4|1|0|1|sz|N|op|M|0|Vm:4 - {0x0fb00e50, 0x0e200a40, 4, arm_VNMUL_EQ_F32, 0x8011c04, arm_instArgs{arm_arg_Sd_Dd, arm_arg_Sn_Dn, arm_arg_Sm_Dm}}, // VNMUL<c>.F<32,64> <Sd,Dd>, <Sn,Dn>, <Sm,Dm> cond:4|1|1|1|0|0|D|1|0|Vn:4|Vd:4|1|0|1|sz|N|1|M|0|Vm:4 - {0x0fbf0ed0, 0x0eb10ac0, 4, arm_VSQRT_EQ_F32, 0x8011c04, arm_instArgs{arm_arg_Sd_Dd, arm_arg_Sm_Dm}}, // VSQRT<c>.F<32,64> <Sd,Dd>, <Sm,Dm> cond:4|1|1|1|0|1|D|1|1|0|0|0|1|Vd:4|1|0|1|sz|1|1|M|0|Vm:4 - {0x0f300e00, 0x0d000a00, 4, arm_VSTR_EQ, 0x1c04, arm_instArgs{arm_arg_Sd_Dd, arm_arg_mem_R_pm_imm8at0_offset}}, // VSTR<c> <Sd,Dd>, [<Rn>{,#+/-<imm8>}] cond:4|1|1|0|1|U|D|0|0|Rn:4|Vd:4|1|0|1|sz|imm8:8 - {0x0fb00e50, 0x0e300a40, 4, arm_VSUB_EQ_F32, 0x8011c04, arm_instArgs{arm_arg_Sd_Dd, arm_arg_Sn_Dn, arm_arg_Sm_Dm}}, // VSUB<c>.F<32,64> <Sd,Dd>, <Sn,Dn>, <Sm,Dm> cond:4|1|1|1|0|0|D|1|1|Vn:4|Vd:4|1|0|1|sz|N|1|M|0|Vm:4 - {0x0fffffff, 0x0320f002, 4, arm_WFE_EQ, 0x1c04, arm_instArgs{}}, // WFE<c> cond:4|0|0|1|1|0|0|1|0|0|0|0|0|(1)|(1)|(1)|(1)|(0)|(0)|(0)|(0)|0|0|0|0|0|0|1|0 - {0x0fff00ff, 0x0320f002, 3, arm_WFE_EQ, 0x1c04, arm_instArgs{}}, // WFE<c> cond:4|0|0|1|1|0|0|1|0|0|0|0|0|(1)|(1)|(1)|(1)|(0)|(0)|(0)|(0)|0|0|0|0|0|0|1|0 - {0x0fffffff, 0x0320f003, 4, arm_WFI_EQ, 0x1c04, arm_instArgs{}}, // WFI<c> cond:4|0|0|1|1|0|0|1|0|0|0|0|0|(1)|(1)|(1)|(1)|(0)|(0)|(0)|(0)|0|0|0|0|0|0|1|1 - {0x0fff00ff, 0x0320f003, 3, arm_WFI_EQ, 0x1c04, arm_instArgs{}}, // WFI<c> cond:4|0|0|1|1|0|0|1|0|0|0|0|0|(1)|(1)|(1)|(1)|(0)|(0)|(0)|(0)|0|0|0|0|0|0|1|1 - {0x0fffffff, 0x0320f001, 4, arm_YIELD_EQ, 0x1c04, arm_instArgs{}}, // YIELD<c> cond:4|0|0|1|1|0|0|1|0|0|0|0|0|(1)|(1)|(1)|(1)|(0)|(0)|(0)|(0)|0|0|0|0|0|0|0|1 - {0x0fff00ff, 0x0320f001, 3, arm_YIELD_EQ, 0x1c04, arm_instArgs{}}, // YIELD<c> cond:4|0|0|1|1|0|0|1|0|0|0|0|0|(1)|(1)|(1)|(1)|(0)|(0)|(0)|(0)|0|0|0|0|0|0|0|1 - {0xffffffff, 0xf7fabcfd, 4, arm_UNDEF, 0x0, arm_instArgs{}}, // UNDEF 1|1|1|1|0|1|1|1|1|1|1|1|1|0|1|0|1|0|1|1|1|1|0|0|1|1|1|1|1|1|0|1 -} diff --git a/src/cmd/objdump/elf.go b/src/cmd/objdump/elf.go deleted file mode 100644 index 906e90353..000000000 --- a/src/cmd/objdump/elf.go +++ /dev/null @@ -1,65 +0,0 @@ -// Copyright 2013 The Go Authors. All rights reserved. -// Use of this source code is governed by a BSD-style -// license that can be found in the LICENSE file. - -// Parsing of ELF executables (Linux, FreeBSD, and so on). - -package main - -import ( - "debug/elf" - "os" -) - -func elfSymbols(f *os.File) (syms []Sym, goarch string) { - p, err := elf.NewFile(f) - if err != nil { - errorf("parsing %s: %v", f.Name(), err) - return - } - - elfSyms, err := p.Symbols() - if err != nil { - errorf("parsing %s: %v", f.Name(), err) - return - } - - switch p.Machine { - case elf.EM_X86_64: - goarch = "amd64" - case elf.EM_386: - goarch = "386" - case elf.EM_ARM: - goarch = "arm" - } - - for _, s := range elfSyms { - sym := Sym{Addr: s.Value, Name: s.Name, Size: int64(s.Size), Code: '?'} - switch s.Section { - case elf.SHN_UNDEF: - sym.Code = 'U' - case elf.SHN_COMMON: - sym.Code = 'B' - default: - i := int(s.Section) - if i < 0 || i >= len(p.Sections) { - break - } - sect := p.Sections[i] - switch sect.Flags & (elf.SHF_WRITE | elf.SHF_ALLOC | elf.SHF_EXECINSTR) { - case elf.SHF_ALLOC | elf.SHF_EXECINSTR: - sym.Code = 'T' - case elf.SHF_ALLOC: - sym.Code = 'R' - case elf.SHF_ALLOC | elf.SHF_WRITE: - sym.Code = 'D' - } - } - if elf.ST_BIND(s.Info) == elf.STB_LOCAL { - sym.Code += 'a' - 'A' - } - syms = append(syms, sym) - } - - return -} diff --git a/src/cmd/objdump/macho.go b/src/cmd/objdump/macho.go deleted file mode 100644 index 6e0ad223d..000000000 --- a/src/cmd/objdump/macho.go +++ /dev/null @@ -1,77 +0,0 @@ -// Copyright 2013 The Go Authors. All rights reserved. -// Use of this source code is governed by a BSD-style -// license that can be found in the LICENSE file. - -// Parsing of Mach-O executables (OS X). - -package main - -import ( - "debug/macho" - "os" - "sort" -) - -func machoSymbols(f *os.File) (syms []Sym, goarch string) { - p, err := macho.NewFile(f) - if err != nil { - errorf("parsing %s: %v", f.Name(), err) - return - } - - if p.Symtab == nil { - errorf("%s: no symbol table", f.Name()) - return - } - - switch p.Cpu { - case macho.Cpu386: - goarch = "386" - case macho.CpuAmd64: - goarch = "amd64" - case macho.CpuArm: - goarch = "arm" - } - - // Build sorted list of addresses of all symbols. - // We infer the size of a symbol by looking at where the next symbol begins. - var addrs []uint64 - for _, s := range p.Symtab.Syms { - addrs = append(addrs, s.Value) - } - sort.Sort(uint64s(addrs)) - - for _, s := range p.Symtab.Syms { - sym := Sym{Name: s.Name, Addr: s.Value, Code: '?'} - i := sort.Search(len(addrs), func(x int) bool { return addrs[x] > s.Value }) - if i < len(addrs) { - sym.Size = int64(addrs[i] - s.Value) - } - if s.Sect == 0 { - sym.Code = 'U' - } else if int(s.Sect) <= len(p.Sections) { - sect := p.Sections[s.Sect-1] - switch sect.Seg { - case "__TEXT": - sym.Code = 'R' - case "__DATA": - sym.Code = 'D' - } - switch sect.Seg + " " + sect.Name { - case "__TEXT __text": - sym.Code = 'T' - case "__DATA __bss", "__DATA __noptrbss": - sym.Code = 'B' - } - } - syms = append(syms, sym) - } - - return -} - -type uint64s []uint64 - -func (x uint64s) Len() int { return len(x) } -func (x uint64s) Swap(i, j int) { x[i], x[j] = x[j], x[i] } -func (x uint64s) Less(i, j int) bool { return x[i] < x[j] } diff --git a/src/cmd/objdump/main.go b/src/cmd/objdump/main.go index ade54366e..708a85370 100644 --- a/src/cmd/objdump/main.go +++ b/src/cmd/objdump/main.go @@ -29,30 +29,18 @@ // Each stanza gives the disassembly for a contiguous range of addresses // all mapped to the same original source file and line number. // This mode is intended for use by pprof. -// -// The ARM disassembler is missing (golang.org/issue/7452) but will be added -// before the Go 1.3 release. package main import ( - "bufio" - "bytes" - "debug/elf" - "debug/gosym" - "debug/macho" - "debug/pe" - "debug/plan9obj" - "encoding/binary" "flag" "fmt" - "io" "log" "os" "regexp" - "sort" "strconv" "strings" - "text/tabwriter" + + "cmd/internal/objfile" ) var symregexp = flag.String("s", "", "only dump symbols matching this regexp") @@ -85,435 +73,35 @@ func main() { symRE = re } - f, err := os.Open(flag.Arg(0)) + f, err := objfile.Open(flag.Arg(0)) if err != nil { log.Fatal(err) } - textStart, textData, symtab, pclntab, err := loadTables(f) - if err != nil { - log.Fatalf("reading %s: %v", flag.Arg(0), err) - } - - syms, goarch, err := loadSymbols(f) - if err != nil { - log.Fatalf("reading %s: %v", flag.Arg(0), err) - } - - // Filter out section symbols, overwriting syms in place. - keep := syms[:0] - for _, sym := range syms { - switch sym.Name { - case "text", "_text", "etext", "_etext": - // drop - default: - keep = append(keep, sym) - } - } - syms = keep - - disasm := disasms[goarch] - if disasm == nil { - log.Fatalf("reading %s: unknown architecture", flag.Arg(0)) - } - - lookup := func(addr uint64) (string, uint64) { - i := sort.Search(len(syms), func(i int) bool { return syms[i].Addr > addr }) - if i > 0 { - s := syms[i-1] - if s.Addr <= addr && addr < s.Addr+uint64(s.Size) && s.Name != "etext" && s.Name != "_etext" { - return s.Name, s.Addr - } - } - return "", 0 - } - - pcln := gosym.NewLineTable(pclntab, textStart) - tab, err := gosym.NewTable(symtab, pcln) - if err != nil { - log.Fatalf("reading %s: %v", flag.Arg(0), err) - } - - if flag.NArg() == 1 { - // disassembly of entire object - our format - dump(tab, lookup, disasm, goarch, syms, textData, textStart) - os.Exit(exitCode) - } - - // disassembly of specific piece of object - gnu objdump format for pprof - gnuDump(tab, lookup, disasm, textData, textStart) - os.Exit(exitCode) -} - -// base returns the final element in the path. -// It works on both Windows and Unix paths. -func base(path string) string { - path = path[strings.LastIndex(path, "/")+1:] - path = path[strings.LastIndex(path, `\`)+1:] - return path -} - -func dump(tab *gosym.Table, lookup lookupFunc, disasm disasmFunc, goarch string, syms []Sym, textData []byte, textStart uint64) { - stdout := bufio.NewWriter(os.Stdout) - defer stdout.Flush() - - printed := false - for _, sym := range syms { - if sym.Code != 'T' || sym.Size == 0 || sym.Name == "_text" || sym.Name == "text" || sym.Addr < textStart || symRE != nil && !symRE.MatchString(sym.Name) { - continue - } - if sym.Addr >= textStart+uint64(len(textData)) || sym.Addr+uint64(sym.Size) > textStart+uint64(len(textData)) { - break - } - if printed { - fmt.Fprintf(stdout, "\n") - } else { - printed = true - } - file, _, _ := tab.PCToLine(sym.Addr) - fmt.Fprintf(stdout, "TEXT %s(SB) %s\n", sym.Name, file) - tw := tabwriter.NewWriter(stdout, 1, 8, 1, '\t', 0) - start := sym.Addr - end := sym.Addr + uint64(sym.Size) - for pc := start; pc < end; { - i := pc - textStart - text, size := disasm(textData[i:end-textStart], pc, lookup) - file, line, _ := tab.PCToLine(pc) - - // ARM is word-based, so show actual word hex, not byte hex. - // Since ARM is little endian, they're different. - if goarch == "arm" && size == 4 { - fmt.Fprintf(tw, "\t%s:%d\t%#x\t%08x\t%s\n", base(file), line, pc, binary.LittleEndian.Uint32(textData[i:i+uint64(size)]), text) - } else { - fmt.Fprintf(tw, "\t%s:%d\t%#x\t%x\t%s\n", base(file), line, pc, textData[i:i+uint64(size)], text) - } - pc += uint64(size) - } - tw.Flush() - } -} - -func disasm_386(code []byte, pc uint64, lookup lookupFunc) (string, int) { - return disasm_x86(code, pc, lookup, 32) -} - -func disasm_amd64(code []byte, pc uint64, lookup lookupFunc) (string, int) { - return disasm_x86(code, pc, lookup, 64) -} - -func disasm_x86(code []byte, pc uint64, lookup lookupFunc, arch int) (string, int) { - inst, err := x86_Decode(code, 64) - var text string - size := inst.Len - if err != nil || size == 0 || inst.Op == 0 { - size = 1 - text = "?" - } else { - text = x86_plan9Syntax(inst, pc, lookup) - } - return text, size -} - -type textReader struct { - code []byte - pc uint64 -} - -func (r textReader) ReadAt(data []byte, off int64) (n int, err error) { - if off < 0 || uint64(off) < r.pc { - return 0, io.EOF - } - d := uint64(off) - r.pc - if d >= uint64(len(r.code)) { - return 0, io.EOF - } - n = copy(data, r.code[d:]) - if n < len(data) { - err = io.ErrUnexpectedEOF - } - return -} - -func disasm_arm(code []byte, pc uint64, lookup lookupFunc) (string, int) { - inst, err := arm_Decode(code, arm_ModeARM) - var text string - size := inst.Len - if err != nil || size == 0 || inst.Op == 0 { - size = 4 - text = "?" - } else { - text = arm_plan9Syntax(inst, pc, lookup, textReader{code, pc}) - } - return text, size -} - -var disasms = map[string]disasmFunc{ - "386": disasm_386, - "amd64": disasm_amd64, - "arm": disasm_arm, -} - -func gnuDump(tab *gosym.Table, lookup lookupFunc, disasm disasmFunc, textData []byte, textStart uint64) { - start, err := strconv.ParseUint(strings.TrimPrefix(flag.Arg(1), "0x"), 16, 64) + dis, err := f.Disasm() if err != nil { - log.Fatalf("invalid start PC: %v", err) - } - end, err := strconv.ParseUint(strings.TrimPrefix(flag.Arg(2), "0x"), 16, 64) - if err != nil { - log.Fatalf("invalid end PC: %v", err) - } - if start < textStart { - start = textStart - } - if end < start { - end = start - } - if end > textStart+uint64(len(textData)) { - end = textStart + uint64(len(textData)) - } - - stdout := bufio.NewWriter(os.Stdout) - defer stdout.Flush() - - // For now, find spans of same PC/line/fn and - // emit them as having dummy instructions. - var ( - spanPC uint64 - spanFile string - spanLine int - spanFn *gosym.Func - ) - - flush := func(endPC uint64) { - if spanPC == 0 { - return - } - fmt.Fprintf(stdout, "%s:%d\n", spanFile, spanLine) - for pc := spanPC; pc < endPC; { - text, size := disasm(textData[pc-textStart:], pc, lookup) - fmt.Fprintf(stdout, " %x: %s\n", pc, text) - pc += uint64(size) - } - spanPC = 0 - } - - for pc := start; pc < end; pc++ { - file, line, fn := tab.PCToLine(pc) - if file != spanFile || line != spanLine || fn != spanFn { - flush(pc) - spanPC, spanFile, spanLine, spanFn = pc, file, line, fn - } - } - flush(end) -} - -func loadTables(f *os.File) (textStart uint64, textData, symtab, pclntab []byte, err error) { - if obj, err := elf.NewFile(f); err == nil { - if sect := obj.Section(".text"); sect != nil { - textStart = sect.Addr - textData, _ = sect.Data() - } - if sect := obj.Section(".gosymtab"); sect != nil { - if symtab, err = sect.Data(); err != nil { - return 0, nil, nil, nil, err - } - } - if sect := obj.Section(".gopclntab"); sect != nil { - if pclntab, err = sect.Data(); err != nil { - return 0, nil, nil, nil, err - } - } - return textStart, textData, symtab, pclntab, nil + log.Fatal("disassemble %s: %v", flag.Arg(0), err) } - if obj, err := macho.NewFile(f); err == nil { - if sect := obj.Section("__text"); sect != nil { - textStart = sect.Addr - textData, _ = sect.Data() - } - if sect := obj.Section("__gosymtab"); sect != nil { - if symtab, err = sect.Data(); err != nil { - return 0, nil, nil, nil, err - } - } - if sect := obj.Section("__gopclntab"); sect != nil { - if pclntab, err = sect.Data(); err != nil { - return 0, nil, nil, nil, err - } - } - return textStart, textData, symtab, pclntab, nil - } - - if obj, err := pe.NewFile(f); err == nil { - var imageBase uint64 - switch oh := obj.OptionalHeader.(type) { - case *pe.OptionalHeader32: - imageBase = uint64(oh.ImageBase) - case *pe.OptionalHeader64: - imageBase = oh.ImageBase - default: - return 0, nil, nil, nil, fmt.Errorf("pe file format not recognized") - } - if sect := obj.Section(".text"); sect != nil { - textStart = imageBase + uint64(sect.VirtualAddress) - textData, _ = sect.Data() - } - if pclntab, err = loadPETable(obj, "pclntab", "epclntab"); err != nil { - return 0, nil, nil, nil, err - } - if symtab, err = loadPETable(obj, "symtab", "esymtab"); err != nil { - return 0, nil, nil, nil, err - } - return textStart, textData, symtab, pclntab, nil - } - - if obj, err := plan9obj.NewFile(f); err == nil { - sym, err := findPlan9Symbol(obj, "text") + switch flag.NArg() { + default: + usage() + case 1: + // disassembly of entire object + dis.Print(os.Stdout, symRE, 0, ^uint64(0)) + os.Exit(0) + + case 3: + // disassembly of PC range + start, err := strconv.ParseUint(strings.TrimPrefix(flag.Arg(1), "0x"), 16, 64) if err != nil { - return 0, nil, nil, nil, err - } - textStart = sym.Value - if sect := obj.Section("text"); sect != nil { - textData, _ = sect.Data() - } - if pclntab, err = loadPlan9Table(obj, "pclntab", "epclntab"); err != nil { - return 0, nil, nil, nil, err - } - if symtab, err = loadPlan9Table(obj, "symtab", "esymtab"); err != nil { - return 0, nil, nil, nil, err - } - return textStart, textData, symtab, pclntab, nil - } - - return 0, nil, nil, nil, fmt.Errorf("unrecognized binary format") -} - -func findPESymbol(f *pe.File, name string) (*pe.Symbol, error) { - for _, s := range f.Symbols { - if s.Name != name { - continue - } - if s.SectionNumber <= 0 { - return nil, fmt.Errorf("symbol %s: invalid section number %d", name, s.SectionNumber) - } - if len(f.Sections) < int(s.SectionNumber) { - return nil, fmt.Errorf("symbol %s: section number %d is larger than max %d", name, s.SectionNumber, len(f.Sections)) - } - return s, nil - } - return nil, fmt.Errorf("no %s symbol found", name) -} - -func loadPETable(f *pe.File, sname, ename string) ([]byte, error) { - ssym, err := findPESymbol(f, sname) - if err != nil { - return nil, err - } - esym, err := findPESymbol(f, ename) - if err != nil { - return nil, err - } - if ssym.SectionNumber != esym.SectionNumber { - return nil, fmt.Errorf("%s and %s symbols must be in the same section", sname, ename) - } - sect := f.Sections[ssym.SectionNumber-1] - data, err := sect.Data() - if err != nil { - return nil, err - } - return data[ssym.Value:esym.Value], nil -} - -func findPlan9Symbol(f *plan9obj.File, name string) (*plan9obj.Sym, error) { - syms, err := f.Symbols() - if err != nil { - return nil, err - } - for _, s := range syms { - if s.Name != name { - continue + log.Fatalf("invalid start PC: %v", err) } - return &s, nil - } - return nil, fmt.Errorf("no %s symbol found", name) -} - -func loadPlan9Table(f *plan9obj.File, sname, ename string) ([]byte, error) { - ssym, err := findPlan9Symbol(f, sname) - if err != nil { - return nil, err - } - esym, err := findPlan9Symbol(f, ename) - if err != nil { - return nil, err - } - text, err := findPlan9Symbol(f, "text") - if err != nil { - return nil, err - } - sect := f.Section("text") - if sect == nil { - return nil, err - } - data, err := sect.Data() - if err != nil { - return nil, err - } - return data[ssym.Value-text.Value : esym.Value-text.Value], nil -} - -// TODO(rsc): This code is taken from cmd/nm. Arrange some way to share the code. - -var exitCode = 0 - -func errorf(format string, args ...interface{}) { - log.Printf(format, args...) - exitCode = 1 -} - -func loadSymbols(f *os.File) (syms []Sym, goarch string, err error) { - f.Seek(0, 0) - buf := make([]byte, 16) - io.ReadFull(f, buf) - f.Seek(0, 0) - - for _, p := range parsers { - if bytes.HasPrefix(buf, p.prefix) { - syms, goarch = p.parse(f) - sort.Sort(byAddr(syms)) - return + end, err := strconv.ParseUint(strings.TrimPrefix(flag.Arg(2), "0x"), 16, 64) + if err != nil { + log.Fatalf("invalid end PC: %v", err) } + dis.Print(os.Stdout, symRE, start, end) + os.Exit(0) } - err = fmt.Errorf("unknown file format") - return -} - -type Sym struct { - Addr uint64 - Size int64 - Code rune - Name string - Type string } - -var parsers = []struct { - prefix []byte - parse func(*os.File) ([]Sym, string) -}{ - {[]byte("\x7FELF"), elfSymbols}, - {[]byte("\xFE\xED\xFA\xCE"), machoSymbols}, - {[]byte("\xFE\xED\xFA\xCF"), machoSymbols}, - {[]byte("\xCE\xFA\xED\xFE"), machoSymbols}, - {[]byte("\xCF\xFA\xED\xFE"), machoSymbols}, - {[]byte("MZ"), peSymbols}, - {[]byte("\x00\x00\x01\xEB"), plan9Symbols}, // 386 - {[]byte("\x00\x00\x04\x07"), plan9Symbols}, // mips - {[]byte("\x00\x00\x06\x47"), plan9Symbols}, // arm - {[]byte("\x00\x00\x8A\x97"), plan9Symbols}, // amd64 -} - -type byAddr []Sym - -func (x byAddr) Len() int { return len(x) } -func (x byAddr) Swap(i, j int) { x[i], x[j] = x[j], x[i] } -func (x byAddr) Less(i, j int) bool { return x[i].Addr < x[j].Addr } diff --git a/src/cmd/objdump/objdump_test.go b/src/cmd/objdump/objdump_test.go index 82311bb1f..2bb74663c 100644 --- a/src/cmd/objdump/objdump_test.go +++ b/src/cmd/objdump/objdump_test.go @@ -5,114 +5,19 @@ package main import ( - "bufio" - "bytes" - "fmt" "io/ioutil" "os" "os/exec" "path/filepath" "runtime" - "strconv" "strings" "testing" ) -func loadSyms(t *testing.T) map[string]string { - if runtime.GOOS == "nacl" { - t.Skip("skipping on nacl") - } - - cmd := exec.Command("go", "tool", "nm", os.Args[0]) - out, err := cmd.CombinedOutput() - if err != nil { - t.Fatalf("go tool nm %v: %v\n%s", os.Args[0], err, string(out)) - } - syms := make(map[string]string) - scanner := bufio.NewScanner(bytes.NewReader(out)) - for scanner.Scan() { - f := strings.Fields(scanner.Text()) - if len(f) < 3 { - continue - } - syms[f[2]] = f[0] - } - if err := scanner.Err(); err != nil { - t.Fatalf("error reading symbols: %v", err) - } - return syms -} - -func runObjDump(t *testing.T, exe, startaddr, endaddr string) (path, lineno string) { - if runtime.GOOS == "nacl" { - t.Skip("skipping on nacl") - } - - cmd := exec.Command(exe, os.Args[0], startaddr, endaddr) - out, err := cmd.CombinedOutput() - if err != nil { - t.Fatalf("go tool objdump %v: %v\n%s", os.Args[0], err, string(out)) - } - f := strings.Split(string(out), "\n") - if len(f) < 1 { - t.Fatal("objdump output must have at least one line") - } - pathAndLineNo := f[0] - f = strings.Split(pathAndLineNo, ":") - if runtime.GOOS == "windows" { - switch len(f) { - case 2: - return f[0], f[1] - case 3: - return f[0] + ":" + f[1], f[2] - default: - t.Fatalf("no line number found in %q", pathAndLineNo) - } - } - if len(f) != 2 { - t.Fatalf("no line number found in %q", pathAndLineNo) - } - return f[0], f[1] -} - -func testObjDump(t *testing.T, exe, startaddr, endaddr string, line int) { - srcPath, srcLineNo := runObjDump(t, exe, startaddr, endaddr) - fi1, err := os.Stat("objdump_test.go") - if err != nil { - t.Fatalf("Stat failed: %v", err) - } - fi2, err := os.Stat(srcPath) - if err != nil { - t.Fatalf("Stat failed: %v", err) - } - if !os.SameFile(fi1, fi2) { - t.Fatalf("objdump_test.go and %s are not same file", srcPath) - } - if srcLineNo != fmt.Sprint(line) { - t.Fatalf("line number = %v; want %d", srcLineNo, line) - } -} - -func TestObjDump(t *testing.T) { - _, _, line, _ := runtime.Caller(0) - syms := loadSyms(t) - - tmp, exe := buildObjdump(t) - defer os.RemoveAll(tmp) - - startaddr := syms["cmd/objdump.TestObjDump"] - addr, err := strconv.ParseUint(startaddr, 16, 64) - if err != nil { - t.Fatalf("invalid start address %v: %v", startaddr, err) - } - endaddr := fmt.Sprintf("%x", addr+10) - testObjDump(t, exe, startaddr, endaddr, line-1) - testObjDump(t, exe, "0x"+startaddr, "0x"+endaddr, line-1) -} - func buildObjdump(t *testing.T) (tmp, exe string) { - if runtime.GOOS == "nacl" { - t.Skip("skipping on nacl") + switch runtime.GOOS { + case "android", "nacl": + t.Skipf("skipping on %s", runtime.GOOS) } tmp, err := ioutil.TempDir("", "TestObjDump") @@ -140,7 +45,7 @@ var x86Need = []string{ var armNeed = []string{ "fmthello.go:6", "TEXT main.main(SB)", - "B.LS main.main(SB)", + //"B.LS main.main(SB)", // TODO(rsc): restore; golang.org/issue/9021 "BL fmt.Println(SB)", "RET", } @@ -154,12 +59,15 @@ var armNeed = []string{ // binary for the current system (only) and test that objdump // can handle that one. -func TestDisasm(t *testing.T) { +func testDisasm(t *testing.T, flags ...string) { tmp, exe := buildObjdump(t) defer os.RemoveAll(tmp) hello := filepath.Join(tmp, "hello.exe") - out, err := exec.Command("go", "build", "-o", hello, "testdata/fmthello.go").CombinedOutput() + args := []string{"build", "-o", hello} + args = append(args, flags...) + args = append(args, "testdata/fmthello.go") + out, err := exec.Command("go", args...).CombinedOutput() if err != nil { t.Fatalf("go build fmthello.go: %v\n%s", err, out) } @@ -191,3 +99,15 @@ func TestDisasm(t *testing.T) { t.Logf("full disassembly:\n%s", text) } } + +func TestDisasm(t *testing.T) { + testDisasm(t) +} + +func TestDisasmExtld(t *testing.T) { + switch runtime.GOOS { + case "plan9", "windows": + t.Skipf("skipping on %s", runtime.GOOS) + } + testDisasm(t, "-ldflags=-linkmode=external") +} diff --git a/src/cmd/objdump/pe.go b/src/cmd/objdump/pe.go deleted file mode 100644 index 38190095a..000000000 --- a/src/cmd/objdump/pe.go +++ /dev/null @@ -1,99 +0,0 @@ -// Copyright 2013 The Go Authors. All rights reserved. -// Use of this source code is governed by a BSD-style -// license that can be found in the LICENSE file. - -// Parsing of PE executables (Microsoft Windows). - -package main - -import ( - "debug/pe" - "os" - "sort" -) - -func peSymbols(f *os.File) (syms []Sym, goarch string) { - p, err := pe.NewFile(f) - if err != nil { - errorf("parsing %s: %v", f.Name(), err) - return - } - - // Build sorted list of addresses of all symbols. - // We infer the size of a symbol by looking at where the next symbol begins. - var addrs []uint64 - - var imageBase uint64 - switch oh := p.OptionalHeader.(type) { - case *pe.OptionalHeader32: - imageBase = uint64(oh.ImageBase) - goarch = "386" - case *pe.OptionalHeader64: - imageBase = oh.ImageBase - goarch = "amd64" - default: - errorf("parsing %s: file format not recognized", f.Name()) - return - } - - for _, s := range p.Symbols { - const ( - N_UNDEF = 0 // An undefined (extern) symbol - N_ABS = -1 // An absolute symbol (e_value is a constant, not an address) - N_DEBUG = -2 // A debugging symbol - ) - sym := Sym{Name: s.Name, Addr: uint64(s.Value), Code: '?'} - switch s.SectionNumber { - case N_UNDEF: - sym.Code = 'U' - case N_ABS: - sym.Code = 'C' - case N_DEBUG: - sym.Code = '?' - default: - if s.SectionNumber < 0 { - errorf("parsing %s: invalid section number %d", f.Name(), s.SectionNumber) - return - } - if len(p.Sections) < int(s.SectionNumber) { - errorf("parsing %s: section number %d is large then max %d", f.Name(), s.SectionNumber, len(p.Sections)) - return - } - sect := p.Sections[s.SectionNumber-1] - const ( - text = 0x20 - data = 0x40 - bss = 0x80 - permX = 0x20000000 - permR = 0x40000000 - permW = 0x80000000 - ) - ch := sect.Characteristics - switch { - case ch&text != 0: - sym.Code = 'T' - case ch&data != 0: - if ch&permW == 0 { - sym.Code = 'R' - } else { - sym.Code = 'D' - } - case ch&bss != 0: - sym.Code = 'B' - } - sym.Addr += imageBase + uint64(sect.VirtualAddress) - } - syms = append(syms, sym) - addrs = append(addrs, sym.Addr) - } - - sort.Sort(uint64s(addrs)) - for i := range syms { - j := sort.Search(len(addrs), func(x int) bool { return addrs[x] > syms[i].Addr }) - if j < len(addrs) { - syms[i].Size = int64(addrs[j] - syms[i].Addr) - } - } - - return -} diff --git a/src/cmd/objdump/plan9obj.go b/src/cmd/objdump/plan9obj.go deleted file mode 100644 index 34462f31c..000000000 --- a/src/cmd/objdump/plan9obj.go +++ /dev/null @@ -1,63 +0,0 @@ -// Copyright 2014 The Go Authors. All rights reserved. -// Use of this source code is governed by a BSD-style -// license that can be found in the LICENSE file. - -// Parsing of Plan 9 a.out executables. - -package main - -import ( - "debug/plan9obj" - "os" - "sort" -) - -var validSymType = map[rune]bool{ - 'T': true, - 't': true, - 'D': true, - 'd': true, - 'B': true, - 'b': true, -} - -func plan9Symbols(f *os.File) (syms []Sym, goarch string) { - p, err := plan9obj.NewFile(f) - if err != nil { - errorf("parsing %s: %v", f.Name(), err) - return - } - - plan9Syms, err := p.Symbols() - if err != nil { - errorf("parsing %s: %v", f.Name(), err) - return - } - - goarch = "386" - - // Build sorted list of addresses of all symbols. - // We infer the size of a symbol by looking at where the next symbol begins. - var addrs []uint64 - for _, s := range plan9Syms { - if !validSymType[s.Type] { - continue - } - addrs = append(addrs, s.Value) - } - sort.Sort(uint64s(addrs)) - - for _, s := range plan9Syms { - if !validSymType[s.Type] { - continue - } - sym := Sym{Addr: s.Value, Name: s.Name, Code: rune(s.Type)} - i := sort.Search(len(addrs), func(x int) bool { return addrs[x] > s.Value }) - if i < len(addrs) { - sym.Size = int64(addrs[i] - s.Value) - } - syms = append(syms, sym) - } - - return -} diff --git a/src/cmd/objdump/x86.go b/src/cmd/objdump/x86.go deleted file mode 100644 index 8e741331f..000000000 --- a/src/cmd/objdump/x86.go +++ /dev/null @@ -1,13800 +0,0 @@ -// DO NOT EDIT. Generated by code.google.com/p/rsc/cmd/bundle -// bundle -p main -x x86_ rsc.io/x86/x86asm - -/* decode.go */ - -// Copyright 2014 The Go Authors. All rights reserved. -// Use of this source code is governed by a BSD-style -// license that can be found in the LICENSE file. - -// Table-driven decoding of x86 instructions. - -package main - -import ( - "bytes" - "encoding/binary" - "errors" - "fmt" - "runtime" - "strings" -) - -// Set trace to true to cause the decoder to print the PC sequence -// of the executed instruction codes. This is typically only useful -// when you are running a test of a single input case. -const x86_trace = false - -// A decodeOp is a single instruction in the decoder bytecode program. -// -// The decodeOps correspond to consuming and conditionally branching -// on input bytes, consuming additional fields, and then interpreting -// consumed data as instruction arguments. The names of the xRead and xArg -// operations are taken from the Intel manual conventions, for example -// Volume 2, Section 3.1.1, page 487 of -// http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-325462.pdf -// -// The actual decoding program is generated by ../x86map. -// -// TODO(rsc): We may be able to merge various of the memory operands -// since we don't care about, say, the distinction between m80dec and m80bcd. -// Similarly, mm and mm1 have identical meaning, as do xmm and xmm1. - -type x86_decodeOp uint16 - -const ( - x86_xFail x86_decodeOp = iota // invalid instruction (return) - x86_xMatch // completed match - x86_xJump // jump to pc - - x86_xCondByte // switch on instruction byte value - x86_xCondSlashR // read and switch on instruction /r value - x86_xCondPrefix // switch on presence of instruction prefix - x86_xCondIs64 // switch on 64-bit processor mode - x86_xCondDataSize // switch on operand size - x86_xCondAddrSize // switch on address size - x86_xCondIsMem // switch on memory vs register argument - - x86_xSetOp // set instruction opcode - - x86_xReadSlashR // read /r - x86_xReadIb // read ib - x86_xReadIw // read iw - x86_xReadId // read id - x86_xReadIo // read io - x86_xReadCb // read cb - x86_xReadCw // read cw - x86_xReadCd // read cd - x86_xReadCp // read cp - x86_xReadCm // read cm - - x86_xArg1 // arg 1 - x86_xArg3 // arg 3 - x86_xArgAL // arg AL - x86_xArgAX // arg AX - x86_xArgCL // arg CL - x86_xArgCR0dashCR7 // arg CR0-CR7 - x86_xArgCS // arg CS - x86_xArgDR0dashDR7 // arg DR0-DR7 - x86_xArgDS // arg DS - x86_xArgDX // arg DX - x86_xArgEAX // arg EAX - x86_xArgEDX // arg EDX - x86_xArgES // arg ES - x86_xArgFS // arg FS - x86_xArgGS // arg GS - x86_xArgImm16 // arg imm16 - x86_xArgImm32 // arg imm32 - x86_xArgImm64 // arg imm64 - x86_xArgImm8 // arg imm8 - x86_xArgImm8u // arg imm8 but record as unsigned - x86_xArgImm16u // arg imm8 but record as unsigned - x86_xArgM // arg m - x86_xArgM128 // arg m128 - x86_xArgM1428byte // arg m14/28byte - x86_xArgM16 // arg m16 - x86_xArgM16and16 // arg m16&16 - x86_xArgM16and32 // arg m16&32 - x86_xArgM16and64 // arg m16&64 - x86_xArgM16colon16 // arg m16:16 - x86_xArgM16colon32 // arg m16:32 - x86_xArgM16colon64 // arg m16:64 - x86_xArgM16int // arg m16int - x86_xArgM2byte // arg m2byte - x86_xArgM32 // arg m32 - x86_xArgM32and32 // arg m32&32 - x86_xArgM32fp // arg m32fp - x86_xArgM32int // arg m32int - x86_xArgM512byte // arg m512byte - x86_xArgM64 // arg m64 - x86_xArgM64fp // arg m64fp - x86_xArgM64int // arg m64int - x86_xArgM8 // arg m8 - x86_xArgM80bcd // arg m80bcd - x86_xArgM80dec // arg m80dec - x86_xArgM80fp // arg m80fp - x86_xArgM94108byte // arg m94/108byte - x86_xArgMm // arg mm - x86_xArgMm1 // arg mm1 - x86_xArgMm2 // arg mm2 - x86_xArgMm2M64 // arg mm2/m64 - x86_xArgMmM32 // arg mm/m32 - x86_xArgMmM64 // arg mm/m64 - x86_xArgMem // arg mem - x86_xArgMoffs16 // arg moffs16 - x86_xArgMoffs32 // arg moffs32 - x86_xArgMoffs64 // arg moffs64 - x86_xArgMoffs8 // arg moffs8 - x86_xArgPtr16colon16 // arg ptr16:16 - x86_xArgPtr16colon32 // arg ptr16:32 - x86_xArgR16 // arg r16 - x86_xArgR16op // arg r16 with +rw in opcode - x86_xArgR32 // arg r32 - x86_xArgR32M16 // arg r32/m16 - x86_xArgR32M8 // arg r32/m8 - x86_xArgR32op // arg r32 with +rd in opcode - x86_xArgR64 // arg r64 - x86_xArgR64M16 // arg r64/m16 - x86_xArgR64op // arg r64 with +rd in opcode - x86_xArgR8 // arg r8 - x86_xArgR8op // arg r8 with +rb in opcode - x86_xArgRAX // arg RAX - x86_xArgRDX // arg RDX - x86_xArgRM // arg r/m - x86_xArgRM16 // arg r/m16 - x86_xArgRM32 // arg r/m32 - x86_xArgRM64 // arg r/m64 - x86_xArgRM8 // arg r/m8 - x86_xArgReg // arg reg - x86_xArgRegM16 // arg reg/m16 - x86_xArgRegM32 // arg reg/m32 - x86_xArgRegM8 // arg reg/m8 - x86_xArgRel16 // arg rel16 - x86_xArgRel32 // arg rel32 - x86_xArgRel8 // arg rel8 - x86_xArgSS // arg SS - x86_xArgST // arg ST, aka ST(0) - x86_xArgSTi // arg ST(i) with +i in opcode - x86_xArgSreg // arg Sreg - x86_xArgTR0dashTR7 // arg TR0-TR7 - x86_xArgXmm // arg xmm - x86_xArgXMM0 // arg <XMM0> - x86_xArgXmm1 // arg xmm1 - x86_xArgXmm2 // arg xmm2 - x86_xArgXmm2M128 // arg xmm2/m128 - x86_xArgXmm2M16 // arg xmm2/m16 - x86_xArgXmm2M32 // arg xmm2/m32 - x86_xArgXmm2M64 // arg xmm2/m64 - x86_xArgXmmM128 // arg xmm/m128 - x86_xArgXmmM32 // arg xmm/m32 - x86_xArgXmmM64 // arg xmm/m64 - x86_xArgRmf16 // arg r/m16 but force mod=3 - x86_xArgRmf32 // arg r/m32 but force mod=3 - x86_xArgRmf64 // arg r/m64 but force mod=3 -) - -// instPrefix returns an Inst describing just one prefix byte. -// It is only used if there is a prefix followed by an unintelligible -// or invalid instruction byte sequence. -func x86_instPrefix(b byte, mode int) (x86_Inst, error) { - // When tracing it is useful to see what called instPrefix to report an error. - if x86_trace { - _, file, line, _ := runtime.Caller(1) - fmt.Printf("%s:%d\n", file, line) - } - p := x86_Prefix(b) - switch p { - case x86_PrefixDataSize: - if mode == 16 { - p = x86_PrefixData32 - } else { - p = x86_PrefixData16 - } - case x86_PrefixAddrSize: - if mode == 32 { - p = x86_PrefixAddr16 - } else { - p = x86_PrefixAddr32 - } - } - // Note: using composite literal with Prefix key confuses 'bundle' tool. - inst := x86_Inst{Len: 1} - inst.Prefix = x86_Prefixes{p} - return inst, nil -} - -// truncated reports a truncated instruction. -// For now we use instPrefix but perhaps later we will return -// a specific error here. -func x86_truncated(src []byte, mode int) (x86_Inst, error) { - // return Inst{}, len(src), ErrTruncated - return x86_instPrefix(src[0], mode) // too long -} - -// These are the errors returned by Decode. -var ( - x86_ErrInvalidMode = errors.New("invalid x86 mode in Decode") - x86_ErrTruncated = errors.New("truncated instruction") - x86_ErrUnrecognized = errors.New("unrecognized instruction") -) - -// decoderCover records coverage information for which parts -// of the byte code have been executed. -// TODO(rsc): This is for testing. Only use this if a flag is given. -var x86_decoderCover []bool - -// Decode decodes the leading bytes in src as a single instruction. -// The mode arguments specifies the assumed processor mode: -// 16, 32, or 64 for 16-, 32-, and 64-bit execution modes. -func x86_Decode(src []byte, mode int) (inst x86_Inst, err error) { - return x86_decode1(src, mode, false) -} - -// decode1 is the implementation of Decode but takes an extra -// gnuCompat flag to cause it to change its behavior to mimic -// bugs (or at least unique features) of GNU libopcodes as used -// by objdump. We don't believe that logic is the right thing to do -// in general, but when testing against libopcodes it simplifies the -// comparison if we adjust a few small pieces of logic. -// The affected logic is in the conditional branch for "mandatory" prefixes, -// case xCondPrefix. -func x86_decode1(src []byte, mode int, gnuCompat bool) (x86_Inst, error) { - switch mode { - case 16, 32, 64: - // ok - // TODO(rsc): 64-bit mode not tested, probably not working. - default: - return x86_Inst{}, x86_ErrInvalidMode - } - - // Maximum instruction size is 15 bytes. - // If we need to read more, return 'truncated instruction. - if len(src) > 15 { - src = src[:15] - } - - var ( - // prefix decoding information - pos = 0 // position reading src - nprefix = 0 // number of prefixes - lockIndex = -1 // index of LOCK prefix in src and inst.Prefix - repIndex = -1 // index of REP/REPN prefix in src and inst.Prefix - segIndex = -1 // index of Group 2 prefix in src and inst.Prefix - dataSizeIndex = -1 // index of Group 3 prefix in src and inst.Prefix - addrSizeIndex = -1 // index of Group 4 prefix in src and inst.Prefix - rex x86_Prefix // rex byte if present (or 0) - rexUsed x86_Prefix // bits used in rex byte - rexIndex = -1 // index of rex byte - - addrMode = mode // address mode (width in bits) - dataMode = mode // operand mode (width in bits) - - // decoded ModR/M fields - haveModrm bool - modrm int - mod int - regop int - rm int - - // if ModR/M is memory reference, Mem form - mem x86_Mem - haveMem bool - - // decoded SIB fields - haveSIB bool - sib int - scale int - index int - base int - - // decoded immediate values - imm int64 - imm8 int8 - immc int64 - - // output - opshift int - inst x86_Inst - narg int // number of arguments written to inst - ) - - if mode == 64 { - dataMode = 32 - } - - // Prefixes are certainly the most complex and underspecified part of - // decoding x86 instructions. Although the manuals say things like - // up to four prefixes, one from each group, nearly everyone seems to - // agree that in practice as many prefixes as possible, including multiple - // from a particular group or repetitions of a given prefix, can be used on - // an instruction, provided the total instruction length including prefixes - // does not exceed the agreed-upon maximum of 15 bytes. - // Everyone also agrees that if one of these prefixes is the LOCK prefix - // and the instruction is not one of the instructions that can be used with - // the LOCK prefix or if the destination is not a memory operand, - // then the instruction is invalid and produces the #UD exception. - // However, that is the end of any semblance of agreement. - // - // What happens if prefixes are given that conflict with other prefixes? - // For example, the memory segment overrides CS, DS, ES, FS, GS, SS - // conflict with each other: only one segment can be in effect. - // Disassemblers seem to agree that later prefixes take priority over - // earlier ones. I have not taken the time to write assembly programs - // to check to see if the hardware agrees. - // - // What happens if prefixes are given that have no meaning for the - // specific instruction to which they are attached? It depends. - // If they really have no meaning, they are ignored. However, a future - // processor may assign a different meaning. As a disassembler, we - // don't really know whether we're seeing a meaningless prefix or one - // whose meaning we simply haven't been told yet. - // - // Combining the two questions, what happens when conflicting - // extension prefixes are given? No one seems to know for sure. - // For example, MOVQ is 66 0F D6 /r, MOVDQ2Q is F2 0F D6 /r, - // and MOVQ2DQ is F3 0F D6 /r. What is '66 F2 F3 0F D6 /r'? - // Which prefix wins? See the xCondPrefix prefix for more. - // - // Writing assembly test cases to divine which interpretation the - // CPU uses might clarify the situation, but more likely it would - // make the situation even less clear. - - // Read non-REX prefixes. -ReadPrefixes: - for ; pos < len(src); pos++ { - p := x86_Prefix(src[pos]) - switch p { - default: - nprefix = pos - break ReadPrefixes - - // Group 1 - lock and repeat prefixes - // According to Intel, there should only be one from this set, - // but according to AMD both can be present. - case 0xF0: - if lockIndex >= 0 { - inst.Prefix[lockIndex] |= x86_PrefixIgnored - } - lockIndex = pos - case 0xF2, 0xF3: - if repIndex >= 0 { - inst.Prefix[repIndex] |= x86_PrefixIgnored - } - repIndex = pos - - // Group 2 - segment override / branch hints - case 0x26, 0x2E, 0x36, 0x3E: - if mode == 64 { - p |= x86_PrefixIgnored - break - } - fallthrough - case 0x64, 0x65: - if segIndex >= 0 { - inst.Prefix[segIndex] |= x86_PrefixIgnored - } - segIndex = pos - - // Group 3 - operand size override - case 0x66: - if mode == 16 { - dataMode = 32 - p = x86_PrefixData32 - } else { - dataMode = 16 - p = x86_PrefixData16 - } - if dataSizeIndex >= 0 { - inst.Prefix[dataSizeIndex] |= x86_PrefixIgnored - } - dataSizeIndex = pos - - // Group 4 - address size override - case 0x67: - if mode == 32 { - addrMode = 16 - p = x86_PrefixAddr16 - } else { - addrMode = 32 - p = x86_PrefixAddr32 - } - if addrSizeIndex >= 0 { - inst.Prefix[addrSizeIndex] |= x86_PrefixIgnored - } - addrSizeIndex = pos - } - - if pos >= len(inst.Prefix) { - return x86_instPrefix(src[0], mode) // too long - } - - inst.Prefix[pos] = p - } - - // Read REX prefix. - if pos < len(src) && mode == 64 && x86_Prefix(src[pos]).IsREX() { - rex = x86_Prefix(src[pos]) - rexIndex = pos - if pos >= len(inst.Prefix) { - return x86_instPrefix(src[0], mode) // too long - } - inst.Prefix[pos] = rex - pos++ - if rex&x86_PrefixREXW != 0 { - dataMode = 64 - if dataSizeIndex >= 0 { - inst.Prefix[dataSizeIndex] |= x86_PrefixIgnored - } - } - } - - // Decode instruction stream, interpreting decoding instructions. - // opshift gives the shift to use when saving the next - // opcode byte into inst.Opcode. - opshift = 24 - if x86_decoderCover == nil { - x86_decoderCover = make([]bool, len(x86_decoder)) - } - - // Decode loop, executing decoder program. - var oldPC, prevPC int -Decode: - for pc := 1; ; { // TODO uint - oldPC = prevPC - prevPC = pc - if x86_trace { - println("run", pc) - } - x := x86_decoder[pc] - x86_decoderCover[pc] = true - pc++ - - // Read and decode ModR/M if needed by opcode. - switch x86_decodeOp(x) { - case x86_xCondSlashR, x86_xReadSlashR: - if haveModrm { - return x86_Inst{Len: pos}, x86_errInternal - } - haveModrm = true - if pos >= len(src) { - return x86_truncated(src, mode) - } - modrm = int(src[pos]) - pos++ - if opshift >= 0 { - inst.Opcode |= uint32(modrm) << uint(opshift) - opshift -= 8 - } - mod = modrm >> 6 - regop = (modrm >> 3) & 07 - rm = modrm & 07 - if rex&x86_PrefixREXR != 0 { - rexUsed |= x86_PrefixREXR - regop |= 8 - } - if addrMode == 16 { - // 16-bit modrm form - if mod != 3 { - haveMem = true - mem = x86_addr16[rm] - if rm == 6 && mod == 0 { - mem.Base = 0 - } - - // Consume disp16 if present. - if mod == 0 && rm == 6 || mod == 2 { - if pos+2 > len(src) { - return x86_truncated(src, mode) - } - mem.Disp = int64(binary.LittleEndian.Uint16(src[pos:])) - pos += 2 - } - - // Consume disp8 if present. - if mod == 1 { - if pos >= len(src) { - return x86_truncated(src, mode) - } - mem.Disp = int64(int8(src[pos])) - pos++ - } - } - } else { - haveMem = mod != 3 - - // 32-bit or 64-bit form - // Consume SIB encoding if present. - if rm == 4 && mod != 3 { - haveSIB = true - if pos >= len(src) { - return x86_truncated(src, mode) - } - sib = int(src[pos]) - pos++ - if opshift >= 0 { - inst.Opcode |= uint32(sib) << uint(opshift) - opshift -= 8 - } - scale = sib >> 6 - index = (sib >> 3) & 07 - base = sib & 07 - if rex&x86_PrefixREXB != 0 { - rexUsed |= x86_PrefixREXB - base |= 8 - } - if rex&x86_PrefixREXX != 0 { - rexUsed |= x86_PrefixREXX - index |= 8 - } - - mem.Scale = 1 << uint(scale) - if index == 4 { - // no mem.Index - } else { - mem.Index = x86_baseRegForBits(addrMode) + x86_Reg(index) - } - if base&7 == 5 && mod == 0 { - // no mem.Base - } else { - mem.Base = x86_baseRegForBits(addrMode) + x86_Reg(base) - } - } else { - if rex&x86_PrefixREXB != 0 { - rexUsed |= x86_PrefixREXB - rm |= 8 - } - if mod == 0 && rm&7 == 5 || rm&7 == 4 { - // base omitted - } else if mod != 3 { - mem.Base = x86_baseRegForBits(addrMode) + x86_Reg(rm) - } - } - - // Consume disp32 if present. - if mod == 0 && (rm&7 == 5 || haveSIB && base&7 == 5) || mod == 2 { - if pos+4 > len(src) { - return x86_truncated(src, mode) - } - mem.Disp = int64(binary.LittleEndian.Uint32(src[pos:])) - pos += 4 - } - - // Consume disp8 if present. - if mod == 1 { - if pos >= len(src) { - return x86_truncated(src, mode) - } - mem.Disp = int64(int8(src[pos])) - pos++ - } - - // In 64-bit, mod=0 rm=5 is PC-relative instead of just disp. - // See Vol 2A. Table 2-7. - if mode == 64 && mod == 0 && rm&7 == 5 { - if addrMode == 32 { - mem.Base = x86_EIP - } else { - mem.Base = x86_RIP - } - } - } - - if segIndex >= 0 { - mem.Segment = x86_prefixToSegment(inst.Prefix[segIndex]) - } - } - - // Execute single opcode. - switch x86_decodeOp(x) { - default: - println("bad op", x, "at", pc-1, "from", oldPC) - return x86_Inst{Len: pos}, x86_errInternal - - case x86_xFail: - inst.Op = 0 - break Decode - - case x86_xMatch: - break Decode - - case x86_xJump: - pc = int(x86_decoder[pc]) - - // Conditional branches. - - case x86_xCondByte: - if pos >= len(src) { - return x86_truncated(src, mode) - } - b := src[pos] - n := int(x86_decoder[pc]) - pc++ - for i := 0; i < n; i++ { - xb, xpc := x86_decoder[pc], int(x86_decoder[pc+1]) - pc += 2 - if b == byte(xb) { - pc = xpc - pos++ - if opshift >= 0 { - inst.Opcode |= uint32(b) << uint(opshift) - opshift -= 8 - } - continue Decode - } - } - // xCondByte is the only conditional with a fall through, - // so that it can be used to pick off special cases before - // an xCondSlash. If the fallthrough instruction is xFail, - // advance the position so that the decoded instruction - // size includes the byte we just compared against. - if x86_decodeOp(x86_decoder[pc]) == x86_xJump { - pc = int(x86_decoder[pc+1]) - } - if x86_decodeOp(x86_decoder[pc]) == x86_xFail { - pos++ - } - - case x86_xCondIs64: - if mode == 64 { - pc = int(x86_decoder[pc+1]) - } else { - pc = int(x86_decoder[pc]) - } - - case x86_xCondIsMem: - mem := haveMem - if !haveModrm { - if pos >= len(src) { - return x86_instPrefix(src[0], mode) // too long - } - mem = src[pos]>>6 != 3 - } - if mem { - pc = int(x86_decoder[pc+1]) - } else { - pc = int(x86_decoder[pc]) - } - - case x86_xCondDataSize: - switch dataMode { - case 16: - if dataSizeIndex >= 0 { - inst.Prefix[dataSizeIndex] |= x86_PrefixImplicit - } - pc = int(x86_decoder[pc]) - case 32: - if dataSizeIndex >= 0 { - inst.Prefix[dataSizeIndex] |= x86_PrefixImplicit - } - pc = int(x86_decoder[pc+1]) - case 64: - rexUsed |= x86_PrefixREXW - pc = int(x86_decoder[pc+2]) - } - - case x86_xCondAddrSize: - switch addrMode { - case 16: - if addrSizeIndex >= 0 { - inst.Prefix[addrSizeIndex] |= x86_PrefixImplicit - } - pc = int(x86_decoder[pc]) - case 32: - if addrSizeIndex >= 0 { - inst.Prefix[addrSizeIndex] |= x86_PrefixImplicit - } - pc = int(x86_decoder[pc+1]) - case 64: - pc = int(x86_decoder[pc+2]) - } - - case x86_xCondPrefix: - // Conditional branch based on presence or absence of prefixes. - // The conflict cases here are completely undocumented and - // differ significantly between GNU libopcodes and Intel xed. - // I have not written assembly code to divine what various CPUs - // do, but it wouldn't surprise me if they are not consistent either. - // - // The basic idea is to switch on the presence of a prefix, so that - // for example: - // - // xCondPrefix, 4 - // 0xF3, 123, - // 0xF2, 234, - // 0x66, 345, - // 0, 456 - // - // branch to 123 if the F3 prefix is present, 234 if the F2 prefix - // is present, 66 if the 345 prefix is present, and 456 otherwise. - // The prefixes are given in descending order so that the 0 will be last. - // - // It is unclear what should happen if multiple conditions are - // satisfied: what if F2 and F3 are both present, or if 66 and F2 - // are present, or if all three are present? The one chosen becomes - // part of the opcode and the others do not. Perhaps the answer - // depends on the specific opcodes in question. - // - // The only clear example is that CRC32 is F2 0F 38 F1 /r, and - // it comes in 16-bit and 32-bit forms based on the 66 prefix, - // so 66 F2 0F 38 F1 /r should be treated as F2 taking priority, - // with the 66 being only an operand size override, and probably - // F2 66 0F 38 F1 /r should be treated the same. - // Perhaps that rule is specific to the case of CRC32, since no - // 66 0F 38 F1 instruction is defined (today) (that we know of). - // However, both libopcodes and xed seem to generalize this - // example and choose F2/F3 in preference to 66, and we - // do the same. - // - // Next, what if both F2 and F3 are present? Which wins? - // The Intel xed rule, and ours, is that the one that occurs last wins. - // The GNU libopcodes rule, which we implement only in gnuCompat mode, - // is that F3 beats F2 unless F3 has no special meaning, in which - // case F3 can be a modified on an F2 special meaning. - // - // Concretely, - // 66 0F D6 /r is MOVQ - // F2 0F D6 /r is MOVDQ2Q - // F3 0F D6 /r is MOVQ2DQ. - // - // F2 66 0F D6 /r is 66 + MOVDQ2Q always. - // 66 F2 0F D6 /r is 66 + MOVDQ2Q always. - // F3 66 0F D6 /r is 66 + MOVQ2DQ always. - // 66 F3 0F D6 /r is 66 + MOVQ2DQ always. - // F2 F3 0F D6 /r is F2 + MOVQ2DQ always. - // F3 F2 0F D6 /r is F3 + MOVQ2DQ in Intel xed, but F2 + MOVQ2DQ in GNU libopcodes. - // Adding 66 anywhere in the prefix section of the - // last two cases does not change the outcome. - // - // Finally, what if there is a variant in which 66 is a mandatory - // prefix rather than an operand size override, but we know of - // no corresponding F2/F3 form, and we see both F2/F3 and 66. - // Does F2/F3 still take priority, so that the result is an unknown - // instruction, or does the 66 take priority, so that the extended - // 66 instruction should be interpreted as having a REP/REPN prefix? - // Intel xed does the former and GNU libopcodes does the latter. - // We side with Intel xed, unless we are trying to match libopcodes - // more closely during the comparison-based test suite. - // - // In 64-bit mode REX.W is another valid prefix to test for, but - // there is less ambiguity about that. When present, REX.W is - // always the first entry in the table. - n := int(x86_decoder[pc]) - pc++ - sawF3 := false - for j := 0; j < n; j++ { - prefix := x86_Prefix(x86_decoder[pc+2*j]) - if prefix.IsREX() { - rexUsed |= prefix - if rex&prefix == prefix { - pc = int(x86_decoder[pc+2*j+1]) - continue Decode - } - continue - } - ok := false - if prefix == 0 { - ok = true - } else if prefix.IsREX() { - rexUsed |= prefix - if rex&prefix == prefix { - ok = true - } - } else { - if prefix == 0xF3 { - sawF3 = true - } - switch prefix { - case x86_PrefixLOCK: - if lockIndex >= 0 { - inst.Prefix[lockIndex] |= x86_PrefixImplicit - ok = true - } - case x86_PrefixREP, x86_PrefixREPN: - if repIndex >= 0 && inst.Prefix[repIndex]&0xFF == prefix { - inst.Prefix[repIndex] |= x86_PrefixImplicit - ok = true - } - if gnuCompat && !ok && prefix == 0xF3 && repIndex >= 0 && (j+1 >= n || x86_decoder[pc+2*(j+1)] != 0xF2) { - // Check to see if earlier prefix F3 is present. - for i := repIndex - 1; i >= 0; i-- { - if inst.Prefix[i]&0xFF == prefix { - inst.Prefix[i] |= x86_PrefixImplicit - ok = true - } - } - } - if gnuCompat && !ok && prefix == 0xF2 && repIndex >= 0 && !sawF3 && inst.Prefix[repIndex]&0xFF == 0xF3 { - // Check to see if earlier prefix F2 is present. - for i := repIndex - 1; i >= 0; i-- { - if inst.Prefix[i]&0xFF == prefix { - inst.Prefix[i] |= x86_PrefixImplicit - ok = true - } - } - } - case x86_PrefixCS, x86_PrefixDS, x86_PrefixES, x86_PrefixFS, x86_PrefixGS, x86_PrefixSS: - if segIndex >= 0 && inst.Prefix[segIndex]&0xFF == prefix { - inst.Prefix[segIndex] |= x86_PrefixImplicit - ok = true - } - case x86_PrefixDataSize: - // Looking for 66 mandatory prefix. - // The F2/F3 mandatory prefixes take priority when both are present. - // If we got this far in the xCondPrefix table and an F2/F3 is present, - // it means the table didn't have any entry for that prefix. But if 66 has - // special meaning, perhaps F2/F3 have special meaning that we don't know. - // Intel xed works this way, treating the F2/F3 as inhibiting the 66. - // GNU libopcodes allows the 66 to match. We do what Intel xed does - // except in gnuCompat mode. - if repIndex >= 0 && !gnuCompat { - inst.Op = 0 - break Decode - } - if dataSizeIndex >= 0 { - inst.Prefix[dataSizeIndex] |= x86_PrefixImplicit - ok = true - } - case x86_PrefixAddrSize: - if addrSizeIndex >= 0 { - inst.Prefix[addrSizeIndex] |= x86_PrefixImplicit - ok = true - } - } - } - if ok { - pc = int(x86_decoder[pc+2*j+1]) - continue Decode - } - } - inst.Op = 0 - break Decode - - case x86_xCondSlashR: - pc = int(x86_decoder[pc+regop&7]) - - // Input. - - case x86_xReadSlashR: - // done above - - case x86_xReadIb: - if pos >= len(src) { - return x86_truncated(src, mode) - } - imm8 = int8(src[pos]) - pos++ - - case x86_xReadIw: - if pos+2 > len(src) { - return x86_truncated(src, mode) - } - imm = int64(binary.LittleEndian.Uint16(src[pos:])) - pos += 2 - - case x86_xReadId: - if pos+4 > len(src) { - return x86_truncated(src, mode) - } - imm = int64(binary.LittleEndian.Uint32(src[pos:])) - pos += 4 - - case x86_xReadIo: - if pos+8 > len(src) { - return x86_truncated(src, mode) - } - imm = int64(binary.LittleEndian.Uint64(src[pos:])) - pos += 8 - - case x86_xReadCb: - if pos >= len(src) { - return x86_truncated(src, mode) - } - immc = int64(src[pos]) - pos++ - - case x86_xReadCw: - if pos+2 > len(src) { - return x86_truncated(src, mode) - } - immc = int64(binary.LittleEndian.Uint16(src[pos:])) - pos += 2 - - case x86_xReadCm: - if addrMode == 16 { - if pos+2 > len(src) { - return x86_truncated(src, mode) - } - immc = int64(binary.LittleEndian.Uint16(src[pos:])) - pos += 2 - } else if addrMode == 32 { - if pos+4 > len(src) { - return x86_truncated(src, mode) - } - immc = int64(binary.LittleEndian.Uint32(src[pos:])) - pos += 4 - } else { - if pos+8 > len(src) { - return x86_truncated(src, mode) - } - immc = int64(binary.LittleEndian.Uint64(src[pos:])) - pos += 8 - } - case x86_xReadCd: - if pos+4 > len(src) { - return x86_truncated(src, mode) - } - immc = int64(binary.LittleEndian.Uint32(src[pos:])) - pos += 4 - - case x86_xReadCp: - if pos+6 > len(src) { - return x86_truncated(src, mode) - } - w := binary.LittleEndian.Uint32(src[pos:]) - w2 := binary.LittleEndian.Uint16(src[pos+4:]) - immc = int64(w2)<<32 | int64(w) - pos += 6 - - // Output. - - case x86_xSetOp: - inst.Op = x86_Op(x86_decoder[pc]) - pc++ - - case x86_xArg1, - x86_xArg3, - x86_xArgAL, - x86_xArgAX, - x86_xArgCL, - x86_xArgCS, - x86_xArgDS, - x86_xArgDX, - x86_xArgEAX, - x86_xArgEDX, - x86_xArgES, - x86_xArgFS, - x86_xArgGS, - x86_xArgRAX, - x86_xArgRDX, - x86_xArgSS, - x86_xArgST, - x86_xArgXMM0: - inst.Args[narg] = x86_fixedArg[x] - narg++ - - case x86_xArgImm8: - inst.Args[narg] = x86_Imm(imm8) - narg++ - - case x86_xArgImm8u: - inst.Args[narg] = x86_Imm(uint8(imm8)) - narg++ - - case x86_xArgImm16: - inst.Args[narg] = x86_Imm(int16(imm)) - narg++ - - case x86_xArgImm16u: - inst.Args[narg] = x86_Imm(uint16(imm)) - narg++ - - case x86_xArgImm32: - inst.Args[narg] = x86_Imm(int32(imm)) - narg++ - - case x86_xArgImm64: - inst.Args[narg] = x86_Imm(imm) - narg++ - - case x86_xArgM, - x86_xArgM128, - x86_xArgM1428byte, - x86_xArgM16, - x86_xArgM16and16, - x86_xArgM16and32, - x86_xArgM16and64, - x86_xArgM16colon16, - x86_xArgM16colon32, - x86_xArgM16colon64, - x86_xArgM16int, - x86_xArgM2byte, - x86_xArgM32, - x86_xArgM32and32, - x86_xArgM32fp, - x86_xArgM32int, - x86_xArgM512byte, - x86_xArgM64, - x86_xArgM64fp, - x86_xArgM64int, - x86_xArgM8, - x86_xArgM80bcd, - x86_xArgM80dec, - x86_xArgM80fp, - x86_xArgM94108byte, - x86_xArgMem: - if !haveMem { - inst.Op = 0 - break Decode - } - inst.Args[narg] = mem - inst.MemBytes = int(x86_memBytes[x86_decodeOp(x)]) - narg++ - - case x86_xArgPtr16colon16: - inst.Args[narg] = x86_Imm(immc >> 16) - inst.Args[narg+1] = x86_Imm(immc & (1<<16 - 1)) - narg += 2 - - case x86_xArgPtr16colon32: - inst.Args[narg] = x86_Imm(immc >> 32) - inst.Args[narg+1] = x86_Imm(immc & (1<<32 - 1)) - narg += 2 - - case x86_xArgMoffs8, x86_xArgMoffs16, x86_xArgMoffs32, x86_xArgMoffs64: - // TODO(rsc): Can address be 64 bits? - mem = x86_Mem{Disp: int64(immc)} - if segIndex >= 0 { - mem.Segment = x86_prefixToSegment(inst.Prefix[segIndex]) - inst.Prefix[segIndex] |= x86_PrefixImplicit - } - inst.Args[narg] = mem - inst.MemBytes = int(x86_memBytes[x86_decodeOp(x)]) - narg++ - - case x86_xArgR8, x86_xArgR16, x86_xArgR32, x86_xArgR64, x86_xArgXmm, x86_xArgXmm1, x86_xArgDR0dashDR7: - base := x86_baseReg[x] - index := x86_Reg(regop) - if rex != 0 && base == x86_AL && index >= 4 { - rexUsed |= x86_PrefixREX - index -= 4 - base = x86_SPB - } - inst.Args[narg] = base + index - narg++ - - case x86_xArgMm, x86_xArgMm1, x86_xArgTR0dashTR7: - inst.Args[narg] = x86_baseReg[x] + x86_Reg(regop&7) - narg++ - - case x86_xArgCR0dashCR7: - // AMD documents an extension that the LOCK prefix - // can be used in place of a REX prefix in order to access - // CR8 from 32-bit mode. The LOCK prefix is allowed in - // all modes, provided the corresponding CPUID bit is set. - if lockIndex >= 0 { - inst.Prefix[lockIndex] |= x86_PrefixImplicit - regop += 8 - } - inst.Args[narg] = x86_CR0 + x86_Reg(regop) - narg++ - - case x86_xArgSreg: - regop &= 7 - if regop >= 6 { - inst.Op = 0 - break Decode - } - inst.Args[narg] = x86_ES + x86_Reg(regop) - narg++ - - case x86_xArgRmf16, x86_xArgRmf32, x86_xArgRmf64: - base := x86_baseReg[x] - index := x86_Reg(modrm & 07) - if rex&x86_PrefixREXB != 0 { - rexUsed |= x86_PrefixREXB - index += 8 - } - inst.Args[narg] = base + index - narg++ - - case x86_xArgR8op, x86_xArgR16op, x86_xArgR32op, x86_xArgR64op, x86_xArgSTi: - n := inst.Opcode >> uint(opshift+8) & 07 - base := x86_baseReg[x] - index := x86_Reg(n) - if rex&x86_PrefixREXB != 0 && x86_decodeOp(x) != x86_xArgSTi { - rexUsed |= x86_PrefixREXB - index += 8 - } - if rex != 0 && base == x86_AL && index >= 4 { - rexUsed |= x86_PrefixREX - index -= 4 - base = x86_SPB - } - inst.Args[narg] = base + index - narg++ - - case x86_xArgRM8, x86_xArgRM16, x86_xArgRM32, x86_xArgRM64, x86_xArgR32M16, x86_xArgR32M8, x86_xArgR64M16, - x86_xArgMmM32, x86_xArgMmM64, x86_xArgMm2M64, - x86_xArgXmm2M16, x86_xArgXmm2M32, x86_xArgXmm2M64, x86_xArgXmmM64, x86_xArgXmmM128, x86_xArgXmmM32, x86_xArgXmm2M128: - if haveMem { - inst.Args[narg] = mem - inst.MemBytes = int(x86_memBytes[x86_decodeOp(x)]) - } else { - base := x86_baseReg[x] - index := x86_Reg(rm) - switch x86_decodeOp(x) { - case x86_xArgMmM32, x86_xArgMmM64, x86_xArgMm2M64: - // There are only 8 MMX registers, so these ignore the REX.X bit. - index &= 7 - case x86_xArgRM8: - if rex != 0 && index >= 4 { - rexUsed |= x86_PrefixREX - index -= 4 - base = x86_SPB - } - } - inst.Args[narg] = base + index - } - narg++ - - case x86_xArgMm2: // register only; TODO(rsc): Handle with tag modrm_regonly tag - if haveMem { - inst.Op = 0 - break Decode - } - inst.Args[narg] = x86_baseReg[x] + x86_Reg(rm&7) - narg++ - - case x86_xArgXmm2: // register only; TODO(rsc): Handle with tag modrm_regonly tag - if haveMem { - inst.Op = 0 - break Decode - } - inst.Args[narg] = x86_baseReg[x] + x86_Reg(rm) - narg++ - - case x86_xArgRel8: - inst.Args[narg] = x86_Rel(int8(immc)) - narg++ - - case x86_xArgRel16: - inst.Args[narg] = x86_Rel(int16(immc)) - narg++ - - case x86_xArgRel32: - inst.Args[narg] = x86_Rel(int32(immc)) - narg++ - } - } - - if inst.Op == 0 { - // Invalid instruction. - if nprefix > 0 { - return x86_instPrefix(src[0], mode) // invalid instruction - } - return x86_Inst{Len: pos}, x86_ErrUnrecognized - } - - // Matched! Hooray! - - // 90 decodes as XCHG EAX, EAX but is NOP. - // 66 90 decodes as XCHG AX, AX and is NOP too. - // 48 90 decodes as XCHG RAX, RAX and is NOP too. - // 43 90 decodes as XCHG R8D, EAX and is *not* NOP. - // F3 90 decodes as REP XCHG EAX, EAX but is PAUSE. - // It's all too special to handle in the decoding tables, at least for now. - if inst.Op == x86_XCHG && inst.Opcode>>24 == 0x90 { - if inst.Args[0] == x86_RAX || inst.Args[0] == x86_EAX || inst.Args[0] == x86_AX { - inst.Op = x86_NOP - if dataSizeIndex >= 0 { - inst.Prefix[dataSizeIndex] &^= x86_PrefixImplicit - } - inst.Args[0] = nil - inst.Args[1] = nil - } - if repIndex >= 0 && inst.Prefix[repIndex] == 0xF3 { - inst.Prefix[repIndex] |= x86_PrefixImplicit - inst.Op = x86_PAUSE - inst.Args[0] = nil - inst.Args[1] = nil - } else if gnuCompat { - for i := nprefix - 1; i >= 0; i-- { - if inst.Prefix[i]&0xFF == 0xF3 { - inst.Prefix[i] |= x86_PrefixImplicit - inst.Op = x86_PAUSE - inst.Args[0] = nil - inst.Args[1] = nil - break - } - } - } - } - - // defaultSeg returns the default segment for an implicit - // memory reference: the final override if present, or else DS. - defaultSeg := func() x86_Reg { - if segIndex >= 0 { - inst.Prefix[segIndex] |= x86_PrefixImplicit - return x86_prefixToSegment(inst.Prefix[segIndex]) - } - return x86_DS - } - - // Add implicit arguments not present in the tables. - // Normally we shy away from making implicit arguments explicit, - // following the Intel manuals, but adding the arguments seems - // the best way to express the effect of the segment override prefixes. - // TODO(rsc): Perhaps add these to the tables and - // create bytecode instructions for them. - usedAddrSize := false - switch inst.Op { - case x86_INSB, x86_INSW, x86_INSD: - inst.Args[0] = x86_Mem{Segment: x86_ES, Base: x86_baseRegForBits(addrMode) + x86_DI - x86_AX} - inst.Args[1] = x86_DX - usedAddrSize = true - - case x86_OUTSB, x86_OUTSW, x86_OUTSD: - inst.Args[0] = x86_DX - inst.Args[1] = x86_Mem{Segment: defaultSeg(), Base: x86_baseRegForBits(addrMode) + x86_SI - x86_AX} - usedAddrSize = true - - case x86_MOVSB, x86_MOVSW, x86_MOVSD, x86_MOVSQ: - inst.Args[0] = x86_Mem{Segment: x86_ES, Base: x86_baseRegForBits(addrMode) + x86_DI - x86_AX} - inst.Args[1] = x86_Mem{Segment: defaultSeg(), Base: x86_baseRegForBits(addrMode) + x86_SI - x86_AX} - usedAddrSize = true - - case x86_CMPSB, x86_CMPSW, x86_CMPSD, x86_CMPSQ: - inst.Args[0] = x86_Mem{Segment: defaultSeg(), Base: x86_baseRegForBits(addrMode) + x86_SI - x86_AX} - inst.Args[1] = x86_Mem{Segment: x86_ES, Base: x86_baseRegForBits(addrMode) + x86_DI - x86_AX} - usedAddrSize = true - - case x86_LODSB, x86_LODSW, x86_LODSD, x86_LODSQ: - switch inst.Op { - case x86_LODSB: - inst.Args[0] = x86_AL - case x86_LODSW: - inst.Args[0] = x86_AX - case x86_LODSD: - inst.Args[0] = x86_EAX - case x86_LODSQ: - inst.Args[0] = x86_RAX - } - inst.Args[1] = x86_Mem{Segment: defaultSeg(), Base: x86_baseRegForBits(addrMode) + x86_SI - x86_AX} - usedAddrSize = true - - case x86_STOSB, x86_STOSW, x86_STOSD, x86_STOSQ: - inst.Args[0] = x86_Mem{Segment: x86_ES, Base: x86_baseRegForBits(addrMode) + x86_DI - x86_AX} - switch inst.Op { - case x86_STOSB: - inst.Args[1] = x86_AL - case x86_STOSW: - inst.Args[1] = x86_AX - case x86_STOSD: - inst.Args[1] = x86_EAX - case x86_STOSQ: - inst.Args[1] = x86_RAX - } - usedAddrSize = true - - case x86_SCASB, x86_SCASW, x86_SCASD, x86_SCASQ: - inst.Args[1] = x86_Mem{Segment: x86_ES, Base: x86_baseRegForBits(addrMode) + x86_DI - x86_AX} - switch inst.Op { - case x86_SCASB: - inst.Args[0] = x86_AL - case x86_SCASW: - inst.Args[0] = x86_AX - case x86_SCASD: - inst.Args[0] = x86_EAX - case x86_SCASQ: - inst.Args[0] = x86_RAX - } - usedAddrSize = true - - case x86_XLATB: - inst.Args[0] = x86_Mem{Segment: defaultSeg(), Base: x86_baseRegForBits(addrMode) + x86_BX - x86_AX} - usedAddrSize = true - } - - // If we used the address size annotation to construct the - // argument list, mark that prefix as implicit: it doesn't need - // to be shown when printing the instruction. - if haveMem || usedAddrSize { - if addrSizeIndex >= 0 { - inst.Prefix[addrSizeIndex] |= x86_PrefixImplicit - } - } - - // Similarly, if there's some memory operand, the segment - // will be shown there and doesn't need to be shown as an - // explicit prefix. - if haveMem { - if segIndex >= 0 { - inst.Prefix[segIndex] |= x86_PrefixImplicit - } - } - - // Branch predict prefixes are overloaded segment prefixes, - // since segment prefixes don't make sense on conditional jumps. - // Rewrite final instance to prediction prefix. - // The set of instructions to which the prefixes apply (other then the - // Jcc conditional jumps) is not 100% clear from the manuals, but - // the disassemblers seem to agree about the LOOP and JCXZ instructions, - // so we'll follow along. - // TODO(rsc): Perhaps this instruction class should be derived from the CSV. - if x86_isCondJmp[inst.Op] || x86_isLoop[inst.Op] || inst.Op == x86_JCXZ || inst.Op == x86_JECXZ || inst.Op == x86_JRCXZ { - PredictLoop: - for i := nprefix - 1; i >= 0; i-- { - p := inst.Prefix[i] - switch p & 0xFF { - case x86_PrefixCS: - inst.Prefix[i] = x86_PrefixPN - break PredictLoop - case x86_PrefixDS: - inst.Prefix[i] = x86_PrefixPT - break PredictLoop - } - } - } - - // The BND prefix is part of the Intel Memory Protection Extensions (MPX). - // A REPN applied to certain control transfers is a BND prefix to bound - // the range of possible destinations. There's surprisingly little documentation - // about this, so we just do what libopcodes and xed agree on. - // In particular, it's unclear why a REPN applied to LOOP or JCXZ instructions - // does not turn into a BND. - // TODO(rsc): Perhaps this instruction class should be derived from the CSV. - if x86_isCondJmp[inst.Op] || inst.Op == x86_JMP || inst.Op == x86_CALL || inst.Op == x86_RET { - for i := nprefix - 1; i >= 0; i-- { - p := inst.Prefix[i] - if p&^x86_PrefixIgnored == x86_PrefixREPN { - inst.Prefix[i] = x86_PrefixBND - break - } - } - } - - // The LOCK prefix only applies to certain instructions, and then only - // to instances of the instruction with a memory destination. - // Other uses of LOCK are invalid and cause a processor exception, - // in contrast to the "just ignore it" spirit applied to all other prefixes. - // Mark invalid lock prefixes. - hasLock := false - if lockIndex >= 0 && inst.Prefix[lockIndex]&x86_PrefixImplicit == 0 { - switch inst.Op { - // TODO(rsc): Perhaps this instruction class should be derived from the CSV. - case x86_ADD, x86_ADC, x86_AND, x86_BTC, x86_BTR, x86_BTS, x86_CMPXCHG, x86_CMPXCHG8B, x86_CMPXCHG16B, x86_DEC, x86_INC, x86_NEG, x86_NOT, x86_OR, x86_SBB, x86_SUB, x86_XOR, x86_XADD, x86_XCHG: - if x86_isMem(inst.Args[0]) { - hasLock = true - break - } - fallthrough - default: - inst.Prefix[lockIndex] |= x86_PrefixInvalid - } - } - - // In certain cases, all of which require a memory destination, - // the REPN and REP prefixes are interpreted as XACQUIRE and XRELEASE - // from the Intel Transactional Synchroniation Extensions (TSX). - // - // The specific rules are: - // (1) Any instruction with a valid LOCK prefix can have XACQUIRE or XRELEASE. - // (2) Any XCHG, which always has an implicit LOCK, can have XACQUIRE or XRELEASE. - // (3) Any 0x88-, 0x89-, 0xC6-, or 0xC7-opcode MOV can have XRELEASE. - if x86_isMem(inst.Args[0]) { - if inst.Op == x86_XCHG { - hasLock = true - } - - for i := len(inst.Prefix) - 1; i >= 0; i-- { - p := inst.Prefix[i] &^ x86_PrefixIgnored - switch p { - case x86_PrefixREPN: - if hasLock { - inst.Prefix[i] = inst.Prefix[i]&x86_PrefixIgnored | x86_PrefixXACQUIRE - } - - case x86_PrefixREP: - if hasLock { - inst.Prefix[i] = inst.Prefix[i]&x86_PrefixIgnored | x86_PrefixXRELEASE - } - - if inst.Op == x86_MOV { - op := (inst.Opcode >> 24) &^ 1 - if op == 0x88 || op == 0xC6 { - inst.Prefix[i] = inst.Prefix[i]&x86_PrefixIgnored | x86_PrefixXRELEASE - } - } - } - } - } - - // If REP is used on a non-REP-able instruction, mark the prefix as ignored. - if repIndex >= 0 { - switch inst.Prefix[repIndex] { - case x86_PrefixREP, x86_PrefixREPN: - switch inst.Op { - // According to the manuals, the REP/REPE prefix applies to all of these, - // while the REPN applies only to some of them. However, both libopcodes - // and xed show both prefixes explicitly for all instructions, so we do the same. - // TODO(rsc): Perhaps this instruction class should be derived from the CSV. - case x86_INSB, x86_INSW, x86_INSD, - x86_MOVSB, x86_MOVSW, x86_MOVSD, x86_MOVSQ, - x86_OUTSB, x86_OUTSW, x86_OUTSD, - x86_LODSB, x86_LODSW, x86_LODSD, x86_LODSQ, - x86_CMPSB, x86_CMPSW, x86_CMPSD, x86_CMPSQ, - x86_SCASB, x86_SCASW, x86_SCASD, x86_SCASQ, - x86_STOSB, x86_STOSW, x86_STOSD, x86_STOSQ: - // ok - default: - inst.Prefix[repIndex] |= x86_PrefixIgnored - } - } - } - - // If REX was present, mark implicit if all the 1 bits were consumed. - if rexIndex >= 0 { - if rexUsed != 0 { - rexUsed |= x86_PrefixREX - } - if rex&^rexUsed == 0 { - inst.Prefix[rexIndex] |= x86_PrefixImplicit - } - } - - inst.DataSize = dataMode - inst.AddrSize = addrMode - inst.Mode = mode - inst.Len = pos - return inst, nil -} - -var x86_errInternal = errors.New("internal error") - -// addr16 records the eight 16-bit addressing modes. -var x86_addr16 = [8]x86_Mem{ - {Base: x86_BX, Scale: 1, Index: x86_SI}, - {Base: x86_BX, Scale: 1, Index: x86_DI}, - {Base: x86_BP, Scale: 1, Index: x86_SI}, - {Base: x86_BP, Scale: 1, Index: x86_DI}, - {Base: x86_SI}, - {Base: x86_DI}, - {Base: x86_BP}, - {Base: x86_BX}, -} - -// baseReg returns the base register for a given register size in bits. -func x86_baseRegForBits(bits int) x86_Reg { - switch bits { - case 8: - return x86_AL - case 16: - return x86_AX - case 32: - return x86_EAX - case 64: - return x86_RAX - } - return 0 -} - -// baseReg records the base register for argument types that specify -// a range of registers indexed by op, regop, or rm. -var x86_baseReg = [...]x86_Reg{ - x86_xArgDR0dashDR7: x86_DR0, - x86_xArgMm1: x86_M0, - x86_xArgMm2: x86_M0, - x86_xArgMm2M64: x86_M0, - x86_xArgMm: x86_M0, - x86_xArgMmM32: x86_M0, - x86_xArgMmM64: x86_M0, - x86_xArgR16: x86_AX, - x86_xArgR16op: x86_AX, - x86_xArgR32: x86_EAX, - x86_xArgR32M16: x86_EAX, - x86_xArgR32M8: x86_EAX, - x86_xArgR32op: x86_EAX, - x86_xArgR64: x86_RAX, - x86_xArgR64M16: x86_RAX, - x86_xArgR64op: x86_RAX, - x86_xArgR8: x86_AL, - x86_xArgR8op: x86_AL, - x86_xArgRM16: x86_AX, - x86_xArgRM32: x86_EAX, - x86_xArgRM64: x86_RAX, - x86_xArgRM8: x86_AL, - x86_xArgRmf16: x86_AX, - x86_xArgRmf32: x86_EAX, - x86_xArgRmf64: x86_RAX, - x86_xArgSTi: x86_F0, - x86_xArgTR0dashTR7: x86_TR0, - x86_xArgXmm1: x86_X0, - x86_xArgXmm2: x86_X0, - x86_xArgXmm2M128: x86_X0, - x86_xArgXmm2M16: x86_X0, - x86_xArgXmm2M32: x86_X0, - x86_xArgXmm2M64: x86_X0, - x86_xArgXmm: x86_X0, - x86_xArgXmmM128: x86_X0, - x86_xArgXmmM32: x86_X0, - x86_xArgXmmM64: x86_X0, -} - -// prefixToSegment returns the segment register -// corresponding to a particular segment prefix. -func x86_prefixToSegment(p x86_Prefix) x86_Reg { - switch p &^ x86_PrefixImplicit { - case x86_PrefixCS: - return x86_CS - case x86_PrefixDS: - return x86_DS - case x86_PrefixES: - return x86_ES - case x86_PrefixFS: - return x86_FS - case x86_PrefixGS: - return x86_GS - case x86_PrefixSS: - return x86_SS - } - return 0 -} - -// fixedArg records the fixed arguments corresponding to the given bytecodes. -var x86_fixedArg = [...]x86_Arg{ - x86_xArg1: x86_Imm(1), - x86_xArg3: x86_Imm(3), - x86_xArgAL: x86_AL, - x86_xArgAX: x86_AX, - x86_xArgDX: x86_DX, - x86_xArgEAX: x86_EAX, - x86_xArgEDX: x86_EDX, - x86_xArgRAX: x86_RAX, - x86_xArgRDX: x86_RDX, - x86_xArgCL: x86_CL, - x86_xArgCS: x86_CS, - x86_xArgDS: x86_DS, - x86_xArgES: x86_ES, - x86_xArgFS: x86_FS, - x86_xArgGS: x86_GS, - x86_xArgSS: x86_SS, - x86_xArgST: x86_F0, - x86_xArgXMM0: x86_X0, -} - -// memBytes records the size of the memory pointed at -// by a memory argument of the given form. -var x86_memBytes = [...]int8{ - x86_xArgM128: 128 / 8, - x86_xArgM16: 16 / 8, - x86_xArgM16and16: (16 + 16) / 8, - x86_xArgM16colon16: (16 + 16) / 8, - x86_xArgM16colon32: (16 + 32) / 8, - x86_xArgM16int: 16 / 8, - x86_xArgM2byte: 2, - x86_xArgM32: 32 / 8, - x86_xArgM32and32: (32 + 32) / 8, - x86_xArgM32fp: 32 / 8, - x86_xArgM32int: 32 / 8, - x86_xArgM64: 64 / 8, - x86_xArgM64fp: 64 / 8, - x86_xArgM64int: 64 / 8, - x86_xArgMm2M64: 64 / 8, - x86_xArgMmM32: 32 / 8, - x86_xArgMmM64: 64 / 8, - x86_xArgMoffs16: 16 / 8, - x86_xArgMoffs32: 32 / 8, - x86_xArgMoffs64: 64 / 8, - x86_xArgMoffs8: 8 / 8, - x86_xArgR32M16: 16 / 8, - x86_xArgR32M8: 8 / 8, - x86_xArgR64M16: 16 / 8, - x86_xArgRM16: 16 / 8, - x86_xArgRM32: 32 / 8, - x86_xArgRM64: 64 / 8, - x86_xArgRM8: 8 / 8, - x86_xArgXmm2M128: 128 / 8, - x86_xArgXmm2M16: 16 / 8, - x86_xArgXmm2M32: 32 / 8, - x86_xArgXmm2M64: 64 / 8, - x86_xArgXmm: 128 / 8, - x86_xArgXmmM128: 128 / 8, - x86_xArgXmmM32: 32 / 8, - x86_xArgXmmM64: 64 / 8, -} - -// isCondJmp records the conditional jumps. -var x86_isCondJmp = [x86_maxOp + 1]bool{ - x86_JA: true, - x86_JAE: true, - x86_JB: true, - x86_JBE: true, - x86_JE: true, - x86_JG: true, - x86_JGE: true, - x86_JL: true, - x86_JLE: true, - x86_JNE: true, - x86_JNO: true, - x86_JNP: true, - x86_JNS: true, - x86_JO: true, - x86_JP: true, - x86_JS: true, -} - -// isLoop records the loop operators. -var x86_isLoop = [x86_maxOp + 1]bool{ - x86_LOOP: true, - x86_LOOPE: true, - x86_LOOPNE: true, - x86_JECXZ: true, - x86_JRCXZ: true, -} - -/* gnu.go */ - -// Copyright 2014 The Go Authors. All rights reserved. -// Use of this source code is governed by a BSD-style -// license that can be found in the LICENSE file. - -// GNUSyntax returns the GNU assembler syntax for the instruction, as defined by GNU binutils. -// This general form is often called ``AT&T syntax'' as a reference to AT&T System V Unix. -func x86_GNUSyntax(inst x86_Inst) string { - // Rewrite instruction to mimic GNU peculiarities. - // Note that inst has been passed by value and contains - // no pointers, so any changes we make here are local - // and will not propagate back out to the caller. - - // Adjust opcode [sic]. - switch inst.Op { - case x86_FDIV, x86_FDIVR, x86_FSUB, x86_FSUBR, x86_FDIVP, x86_FDIVRP, x86_FSUBP, x86_FSUBRP: - // DC E0, DC F0: libopcodes swaps FSUBR/FSUB and FDIVR/FDIV, at least - // if you believe the Intel manual is correct (the encoding is irregular as given; - // libopcodes uses the more regular expected encoding). - // TODO(rsc): Test to ensure Intel manuals are correct and report to libopcodes maintainers? - // NOTE: iant thinks this is deliberate, but we can't find the history. - _, reg1 := inst.Args[0].(x86_Reg) - _, reg2 := inst.Args[1].(x86_Reg) - if reg1 && reg2 && (inst.Opcode>>24 == 0xDC || inst.Opcode>>24 == 0xDE) { - switch inst.Op { - case x86_FDIV: - inst.Op = x86_FDIVR - case x86_FDIVR: - inst.Op = x86_FDIV - case x86_FSUB: - inst.Op = x86_FSUBR - case x86_FSUBR: - inst.Op = x86_FSUB - case x86_FDIVP: - inst.Op = x86_FDIVRP - case x86_FDIVRP: - inst.Op = x86_FDIVP - case x86_FSUBP: - inst.Op = x86_FSUBRP - case x86_FSUBRP: - inst.Op = x86_FSUBP - } - } - - case x86_MOVNTSD: - // MOVNTSD is F2 0F 2B /r. - // MOVNTSS is F3 0F 2B /r (supposedly; not in manuals). - // Usually inner prefixes win for display, - // so that F3 F2 0F 2B 11 is REP MOVNTSD - // and F2 F3 0F 2B 11 is REPN MOVNTSS. - // Libopcodes always prefers MOVNTSS regardless of prefix order. - if x86_countPrefix(&inst, 0xF3) > 0 { - found := false - for i := len(inst.Prefix) - 1; i >= 0; i-- { - switch inst.Prefix[i] & 0xFF { - case 0xF3: - if !found { - found = true - inst.Prefix[i] |= x86_PrefixImplicit - } - case 0xF2: - inst.Prefix[i] &^= x86_PrefixImplicit - } - } - inst.Op = x86_MOVNTSS - } - } - - // Add implicit arguments. - switch inst.Op { - case x86_MONITOR: - inst.Args[0] = x86_EDX - inst.Args[1] = x86_ECX - inst.Args[2] = x86_EAX - if inst.AddrSize == 16 { - inst.Args[2] = x86_AX - } - - case x86_MWAIT: - if inst.Mode == 64 { - inst.Args[0] = x86_RCX - inst.Args[1] = x86_RAX - } else { - inst.Args[0] = x86_ECX - inst.Args[1] = x86_EAX - } - } - - // Adjust which prefixes will be displayed. - // The rule is to display all the prefixes not implied by - // the usual instruction display, that is, all the prefixes - // except the ones with PrefixImplicit set. - // However, of course, there are exceptions to the rule. - switch inst.Op { - case x86_CRC32: - // CRC32 has a mandatory F2 prefix. - // If there are multiple F2s and no F3s, the extra F2s do not print. - // (And Decode has already marked them implicit.) - // However, if there is an F3 anywhere, then the extra F2s do print. - // If there are multiple F2 prefixes *and* an (ignored) F3, - // then libopcodes prints the extra F2s as REPNs. - if x86_countPrefix(&inst, 0xF2) > 1 { - x86_unmarkImplicit(&inst, 0xF2) - x86_markLastImplicit(&inst, 0xF2) - } - - // An unused data size override should probably be shown, - // to distinguish DATA16 CRC32B from plain CRC32B, - // but libopcodes always treats the final override as implicit - // and the others as explicit. - x86_unmarkImplicit(&inst, x86_PrefixDataSize) - x86_markLastImplicit(&inst, x86_PrefixDataSize) - - case x86_CVTSI2SD, x86_CVTSI2SS: - if !x86_isMem(inst.Args[1]) { - x86_markLastImplicit(&inst, x86_PrefixDataSize) - } - - case x86_CVTSD2SI, x86_CVTSS2SI, x86_CVTTSD2SI, x86_CVTTSS2SI, - x86_ENTER, x86_FLDENV, x86_FNSAVE, x86_FNSTENV, x86_FRSTOR, x86_LGDT, x86_LIDT, x86_LRET, - x86_POP, x86_PUSH, x86_RET, x86_SGDT, x86_SIDT, x86_SYSRET, x86_XBEGIN: - x86_markLastImplicit(&inst, x86_PrefixDataSize) - - case x86_LOOP, x86_LOOPE, x86_LOOPNE, x86_MONITOR: - x86_markLastImplicit(&inst, x86_PrefixAddrSize) - - case x86_MOV: - // The 16-bit and 32-bit forms of MOV Sreg, dst and MOV src, Sreg - // cannot be distinguished when src or dst refers to memory, because - // Sreg is always a 16-bit value, even when we're doing a 32-bit - // instruction. Because the instruction tables distinguished these two, - // any operand size prefix has been marked as used (to decide which - // branch to take). Unmark it, so that it will show up in disassembly, - // so that the reader can tell the size of memory operand. - // up with the same arguments - dst, _ := inst.Args[0].(x86_Reg) - src, _ := inst.Args[1].(x86_Reg) - if x86_ES <= src && src <= x86_GS && x86_isMem(inst.Args[0]) || x86_ES <= dst && dst <= x86_GS && x86_isMem(inst.Args[1]) { - x86_unmarkImplicit(&inst, x86_PrefixDataSize) - } - - case x86_MOVDQU: - if x86_countPrefix(&inst, 0xF3) > 1 { - x86_unmarkImplicit(&inst, 0xF3) - x86_markLastImplicit(&inst, 0xF3) - } - - case x86_MOVQ2DQ: - x86_markLastImplicit(&inst, x86_PrefixDataSize) - - case x86_SLDT, x86_SMSW, x86_STR, x86_FXRSTOR, x86_XRSTOR, x86_XSAVE, x86_XSAVEOPT, x86_CMPXCHG8B: - if x86_isMem(inst.Args[0]) { - x86_unmarkImplicit(&inst, x86_PrefixDataSize) - } - - case x86_SYSEXIT: - x86_unmarkImplicit(&inst, x86_PrefixDataSize) - } - - if x86_isCondJmp[inst.Op] || x86_isLoop[inst.Op] || inst.Op == x86_JCXZ || inst.Op == x86_JECXZ || inst.Op == x86_JRCXZ { - if x86_countPrefix(&inst, x86_PrefixCS) > 0 && x86_countPrefix(&inst, x86_PrefixDS) > 0 { - for i, p := range inst.Prefix { - switch p & 0xFFF { - case x86_PrefixPN, x86_PrefixPT: - inst.Prefix[i] &= 0xF0FF // cut interpretation bits, producing original segment prefix - } - } - } - } - - // XACQUIRE/XRELEASE adjustment. - if inst.Op == x86_MOV { - // MOV into memory is a candidate for turning REP into XRELEASE. - // However, if the REP is followed by a REPN, that REPN blocks the - // conversion. - haveREPN := false - for i := len(inst.Prefix) - 1; i >= 0; i-- { - switch inst.Prefix[i] &^ x86_PrefixIgnored { - case x86_PrefixREPN: - haveREPN = true - case x86_PrefixXRELEASE: - if haveREPN { - inst.Prefix[i] = x86_PrefixREP - } - } - } - } - - // We only format the final F2/F3 as XRELEASE/XACQUIRE. - haveXA := false - haveXR := false - for i := len(inst.Prefix) - 1; i >= 0; i-- { - switch inst.Prefix[i] &^ x86_PrefixIgnored { - case x86_PrefixXRELEASE: - if !haveXR { - haveXR = true - } else { - inst.Prefix[i] = x86_PrefixREP - } - - case x86_PrefixXACQUIRE: - if !haveXA { - haveXA = true - } else { - inst.Prefix[i] = x86_PrefixREPN - } - } - } - - // Determine opcode. - op := strings.ToLower(inst.Op.String()) - if alt := x86_gnuOp[inst.Op]; alt != "" { - op = alt - } - - // Determine opcode suffix. - // Libopcodes omits the suffix if the width of the operation - // can be inferred from a register arguments. For example, - // add $1, %ebx has no suffix because you can tell from the - // 32-bit register destination that it is a 32-bit add, - // but in addl $1, (%ebx), the destination is memory, so the - // size is not evident without the l suffix. - needSuffix := true -SuffixLoop: - for i, a := range inst.Args { - if a == nil { - break - } - switch a := a.(type) { - case x86_Reg: - switch inst.Op { - case x86_MOVSX, x86_MOVZX: - continue - - case x86_SHL, x86_SHR, x86_RCL, x86_RCR, x86_ROL, x86_ROR, x86_SAR: - if i == 1 { - // shift count does not tell us operand size - continue - } - - case x86_CRC32: - // The source argument does tell us operand size, - // but libopcodes still always puts a suffix on crc32. - continue - - case x86_PUSH, x86_POP: - // Even though segment registers are 16-bit, push and pop - // can save/restore them from 32-bit slots, so they - // do not imply operand size. - if x86_ES <= a && a <= x86_GS { - continue - } - - case x86_CVTSI2SD, x86_CVTSI2SS: - // The integer register argument takes priority. - if x86_X0 <= a && a <= x86_X15 { - continue - } - } - - if x86_AL <= a && a <= x86_R15 || x86_ES <= a && a <= x86_GS || x86_X0 <= a && a <= x86_X15 || x86_M0 <= a && a <= x86_M7 { - needSuffix = false - break SuffixLoop - } - } - } - - if needSuffix { - switch inst.Op { - case x86_CMPXCHG8B, x86_FLDCW, x86_FNSTCW, x86_FNSTSW, x86_LDMXCSR, x86_LLDT, x86_LMSW, x86_LTR, x86_PCLMULQDQ, - x86_SETA, x86_SETAE, x86_SETB, x86_SETBE, x86_SETE, x86_SETG, x86_SETGE, x86_SETL, x86_SETLE, x86_SETNE, x86_SETNO, x86_SETNP, x86_SETNS, x86_SETO, x86_SETP, x86_SETS, - x86_SLDT, x86_SMSW, x86_STMXCSR, x86_STR, x86_VERR, x86_VERW: - // For various reasons, libopcodes emits no suffix for these instructions. - - case x86_CRC32: - op += x86_byteSizeSuffix(x86_argBytes(&inst, inst.Args[1])) - - case x86_LGDT, x86_LIDT, x86_SGDT, x86_SIDT: - op += x86_byteSizeSuffix(inst.DataSize / 8) - - case x86_MOVZX, x86_MOVSX: - // Integer size conversions get two suffixes. - op = op[:4] + x86_byteSizeSuffix(x86_argBytes(&inst, inst.Args[1])) + x86_byteSizeSuffix(x86_argBytes(&inst, inst.Args[0])) - - case x86_LOOP, x86_LOOPE, x86_LOOPNE: - // Add w suffix to indicate use of CX register instead of ECX. - if inst.AddrSize == 16 { - op += "w" - } - - case x86_CALL, x86_ENTER, x86_JMP, x86_LCALL, x86_LEAVE, x86_LJMP, x86_LRET, x86_RET, x86_SYSRET, x86_XBEGIN: - // Add w suffix to indicate use of 16-bit target. - // Exclude JMP rel8. - if inst.Opcode>>24 == 0xEB { - break - } - if inst.DataSize == 16 && inst.Mode != 16 { - x86_markLastImplicit(&inst, x86_PrefixDataSize) - op += "w" - } else if inst.Mode == 64 { - op += "q" - } - - case x86_FRSTOR, x86_FNSAVE, x86_FNSTENV, x86_FLDENV: - // Add s suffix to indicate shortened FPU state (I guess). - if inst.DataSize == 16 { - op += "s" - } - - case x86_PUSH, x86_POP: - if x86_markLastImplicit(&inst, x86_PrefixDataSize) { - op += x86_byteSizeSuffix(inst.DataSize / 8) - } else if inst.Mode == 64 { - op += "q" - } else { - op += x86_byteSizeSuffix(inst.MemBytes) - } - - default: - if x86_isFloat(inst.Op) { - // I can't explain any of this, but it's what libopcodes does. - switch inst.MemBytes { - default: - if (inst.Op == x86_FLD || inst.Op == x86_FSTP) && x86_isMem(inst.Args[0]) { - op += "t" - } - case 4: - if x86_isFloatInt(inst.Op) { - op += "l" - } else { - op += "s" - } - case 8: - if x86_isFloatInt(inst.Op) { - op += "ll" - } else { - op += "l" - } - } - break - } - - op += x86_byteSizeSuffix(inst.MemBytes) - } - } - - // Adjust special case opcodes. - switch inst.Op { - case 0: - if inst.Prefix[0] != 0 { - return strings.ToLower(inst.Prefix[0].String()) - } - - case x86_INT: - if inst.Opcode>>24 == 0xCC { - inst.Args[0] = nil - op = "int3" - } - - case x86_CMPPS, x86_CMPPD, x86_CMPSD_XMM, x86_CMPSS: - imm, ok := inst.Args[2].(x86_Imm) - if ok && 0 <= imm && imm < 8 { - inst.Args[2] = nil - op = x86_cmppsOps[imm] + op[3:] - } - - case x86_PCLMULQDQ: - imm, ok := inst.Args[2].(x86_Imm) - if ok && imm&^0x11 == 0 { - inst.Args[2] = nil - op = x86_pclmulqOps[(imm&0x10)>>3|(imm&1)] - } - - case x86_XLATB: - if x86_markLastImplicit(&inst, x86_PrefixAddrSize) { - op = "xlat" // not xlatb - } - } - - // Build list of argument strings. - var ( - usedPrefixes bool // segment prefixes consumed by Mem formatting - args []string // formatted arguments - ) - for i, a := range inst.Args { - if a == nil { - break - } - switch inst.Op { - case x86_MOVSB, x86_MOVSW, x86_MOVSD, x86_MOVSQ, x86_OUTSB, x86_OUTSW, x86_OUTSD: - if i == 0 { - usedPrefixes = true // disable use of prefixes for first argument - } else { - usedPrefixes = false - } - } - if a == x86_Imm(1) && (inst.Opcode>>24)&^1 == 0xD0 { - continue - } - args = append(args, x86_gnuArg(&inst, a, &usedPrefixes)) - } - - // The default is to print the arguments in reverse Intel order. - // A few instructions inhibit this behavior. - switch inst.Op { - case x86_BOUND, x86_LCALL, x86_ENTER, x86_LJMP: - // no reverse - default: - // reverse args - for i, j := 0, len(args)-1; i < j; i, j = i+1, j-1 { - args[i], args[j] = args[j], args[i] - } - } - - // Build prefix string. - // Must be after argument formatting, which can turn off segment prefixes. - var ( - prefix = "" // output string - numAddr = 0 - numData = 0 - implicitData = false - ) - for _, p := range inst.Prefix { - if p&0xFF == x86_PrefixDataSize && p&x86_PrefixImplicit != 0 { - implicitData = true - } - } - for _, p := range inst.Prefix { - if p == 0 { - break - } - if p&x86_PrefixImplicit != 0 { - continue - } - switch p &^ (x86_PrefixIgnored | x86_PrefixInvalid) { - default: - if p.IsREX() { - if p&0xFF == x86_PrefixREX { - prefix += "rex " - } else { - prefix += "rex." + p.String()[4:] + " " - } - break - } - prefix += strings.ToLower(p.String()) + " " - - case x86_PrefixPN: - op += ",pn" - continue - - case x86_PrefixPT: - op += ",pt" - continue - - case x86_PrefixAddrSize, x86_PrefixAddr16, x86_PrefixAddr32: - // For unknown reasons, if the addr16 prefix is repeated, - // libopcodes displays all but the last as addr32, even though - // the addressing form used in a memory reference is clearly - // still 16-bit. - n := 32 - if inst.Mode == 32 { - n = 16 - } - numAddr++ - if x86_countPrefix(&inst, x86_PrefixAddrSize) > numAddr { - n = inst.Mode - } - prefix += fmt.Sprintf("addr%d ", n) - continue - - case x86_PrefixData16, x86_PrefixData32: - if implicitData && x86_countPrefix(&inst, x86_PrefixDataSize) > 1 { - // Similar to the addr32 logic above, but it only kicks in - // when something used the data size prefix (one is implicit). - n := 16 - if inst.Mode == 16 { - n = 32 - } - numData++ - if x86_countPrefix(&inst, x86_PrefixDataSize) > numData { - if inst.Mode == 16 { - n = 16 - } else { - n = 32 - } - } - prefix += fmt.Sprintf("data%d ", n) - continue - } - prefix += strings.ToLower(p.String()) + " " - } - } - - // Finally! Put it all together. - text := prefix + op - if args != nil { - text += " " - // Indirect call/jmp gets a star to distinguish from direct jump address. - if (inst.Op == x86_CALL || inst.Op == x86_JMP || inst.Op == x86_LJMP || inst.Op == x86_LCALL) && (x86_isMem(inst.Args[0]) || x86_isReg(inst.Args[0])) { - text += "*" - } - text += strings.Join(args, ",") - } - return text -} - -// gnuArg returns the GNU syntax for the argument x from the instruction inst. -// If *usedPrefixes is false and x is a Mem, then the formatting -// includes any segment prefixes and sets *usedPrefixes to true. -func x86_gnuArg(inst *x86_Inst, x x86_Arg, usedPrefixes *bool) string { - if x == nil { - return "<nil>" - } - switch x := x.(type) { - case x86_Reg: - switch inst.Op { - case x86_CVTSI2SS, x86_CVTSI2SD, x86_CVTSS2SI, x86_CVTSD2SI, x86_CVTTSD2SI, x86_CVTTSS2SI: - if inst.DataSize == 16 && x86_EAX <= x && x <= x86_R15L { - x -= x86_EAX - x86_AX - } - - case x86_IN, x86_INSB, x86_INSW, x86_INSD, x86_OUT, x86_OUTSB, x86_OUTSW, x86_OUTSD: - // DX is the port, but libopcodes prints it as if it were a memory reference. - if x == x86_DX { - return "(%dx)" - } - } - return x86_gccRegName[x] - case x86_Mem: - seg := "" - var haveCS, haveDS, haveES, haveFS, haveGS, haveSS bool - switch x.Segment { - case x86_CS: - haveCS = true - case x86_DS: - haveDS = true - case x86_ES: - haveES = true - case x86_FS: - haveFS = true - case x86_GS: - haveGS = true - case x86_SS: - haveSS = true - } - switch inst.Op { - case x86_INSB, x86_INSW, x86_INSD, x86_STOSB, x86_STOSW, x86_STOSD, x86_STOSQ, x86_SCASB, x86_SCASW, x86_SCASD, x86_SCASQ: - // These do not accept segment prefixes, at least in the GNU rendering. - default: - if *usedPrefixes { - break - } - for i := len(inst.Prefix) - 1; i >= 0; i-- { - p := inst.Prefix[i] &^ x86_PrefixIgnored - if p == 0 { - continue - } - switch p { - case x86_PrefixCS: - if !haveCS { - haveCS = true - inst.Prefix[i] |= x86_PrefixImplicit - } - case x86_PrefixDS: - if !haveDS { - haveDS = true - inst.Prefix[i] |= x86_PrefixImplicit - } - case x86_PrefixES: - if !haveES { - haveES = true - inst.Prefix[i] |= x86_PrefixImplicit - } - case x86_PrefixFS: - if !haveFS { - haveFS = true - inst.Prefix[i] |= x86_PrefixImplicit - } - case x86_PrefixGS: - if !haveGS { - haveGS = true - inst.Prefix[i] |= x86_PrefixImplicit - } - case x86_PrefixSS: - if !haveSS { - haveSS = true - inst.Prefix[i] |= x86_PrefixImplicit - } - } - } - *usedPrefixes = true - } - if haveCS { - seg += "%cs:" - } - if haveDS { - seg += "%ds:" - } - if haveSS { - seg += "%ss:" - } - if haveES { - seg += "%es:" - } - if haveFS { - seg += "%fs:" - } - if haveGS { - seg += "%gs:" - } - disp := "" - if x.Disp != 0 { - disp = fmt.Sprintf("%#x", x.Disp) - } - if x.Scale == 0 || x.Index == 0 && x.Scale == 1 && (x.Base == x86_ESP || x.Base == x86_RSP || x.Base == 0 && inst.Mode == 64) { - if x.Base == 0 { - return seg + disp - } - return fmt.Sprintf("%s%s(%s)", seg, disp, x86_gccRegName[x.Base]) - } - base := x86_gccRegName[x.Base] - if x.Base == 0 { - base = "" - } - index := x86_gccRegName[x.Index] - if x.Index == 0 { - if inst.AddrSize == 64 { - index = "%riz" - } else { - index = "%eiz" - } - } - if x86_AX <= x.Base && x.Base <= x86_DI { - // 16-bit addressing - no scale - return fmt.Sprintf("%s%s(%s,%s)", seg, disp, base, index) - } - return fmt.Sprintf("%s%s(%s,%s,%d)", seg, disp, base, index, x.Scale) - case x86_Rel: - return fmt.Sprintf(".%+#x", int32(x)) - case x86_Imm: - if inst.Mode == 32 { - return fmt.Sprintf("$%#x", uint32(x)) - } - return fmt.Sprintf("$%#x", int64(x)) - } - return x.String() -} - -var x86_gccRegName = [...]string{ - 0: "REG0", - x86_AL: "%al", - x86_CL: "%cl", - x86_BL: "%bl", - x86_DL: "%dl", - x86_AH: "%ah", - x86_CH: "%ch", - x86_BH: "%bh", - x86_DH: "%dh", - x86_SPB: "%spl", - x86_BPB: "%bpl", - x86_SIB: "%sil", - x86_DIB: "%dil", - x86_R8B: "%r8b", - x86_R9B: "%r9b", - x86_R10B: "%r10b", - x86_R11B: "%r11b", - x86_R12B: "%r12b", - x86_R13B: "%r13b", - x86_R14B: "%r14b", - x86_R15B: "%r15b", - x86_AX: "%ax", - x86_CX: "%cx", - x86_BX: "%bx", - x86_DX: "%dx", - x86_SP: "%sp", - x86_BP: "%bp", - x86_SI: "%si", - x86_DI: "%di", - x86_R8W: "%r8w", - x86_R9W: "%r9w", - x86_R10W: "%r10w", - x86_R11W: "%r11w", - x86_R12W: "%r12w", - x86_R13W: "%r13w", - x86_R14W: "%r14w", - x86_R15W: "%r15w", - x86_EAX: "%eax", - x86_ECX: "%ecx", - x86_EDX: "%edx", - x86_EBX: "%ebx", - x86_ESP: "%esp", - x86_EBP: "%ebp", - x86_ESI: "%esi", - x86_EDI: "%edi", - x86_R8L: "%r8d", - x86_R9L: "%r9d", - x86_R10L: "%r10d", - x86_R11L: "%r11d", - x86_R12L: "%r12d", - x86_R13L: "%r13d", - x86_R14L: "%r14d", - x86_R15L: "%r15d", - x86_RAX: "%rax", - x86_RCX: "%rcx", - x86_RDX: "%rdx", - x86_RBX: "%rbx", - x86_RSP: "%rsp", - x86_RBP: "%rbp", - x86_RSI: "%rsi", - x86_RDI: "%rdi", - x86_R8: "%r8", - x86_R9: "%r9", - x86_R10: "%r10", - x86_R11: "%r11", - x86_R12: "%r12", - x86_R13: "%r13", - x86_R14: "%r14", - x86_R15: "%r15", - x86_IP: "%ip", - x86_EIP: "%eip", - x86_RIP: "%rip", - x86_F0: "%st", - x86_F1: "%st(1)", - x86_F2: "%st(2)", - x86_F3: "%st(3)", - x86_F4: "%st(4)", - x86_F5: "%st(5)", - x86_F6: "%st(6)", - x86_F7: "%st(7)", - x86_M0: "%mm0", - x86_M1: "%mm1", - x86_M2: "%mm2", - x86_M3: "%mm3", - x86_M4: "%mm4", - x86_M5: "%mm5", - x86_M6: "%mm6", - x86_M7: "%mm7", - x86_X0: "%xmm0", - x86_X1: "%xmm1", - x86_X2: "%xmm2", - x86_X3: "%xmm3", - x86_X4: "%xmm4", - x86_X5: "%xmm5", - x86_X6: "%xmm6", - x86_X7: "%xmm7", - x86_X8: "%xmm8", - x86_X9: "%xmm9", - x86_X10: "%xmm10", - x86_X11: "%xmm11", - x86_X12: "%xmm12", - x86_X13: "%xmm13", - x86_X14: "%xmm14", - x86_X15: "%xmm15", - x86_CS: "%cs", - x86_SS: "%ss", - x86_DS: "%ds", - x86_ES: "%es", - x86_FS: "%fs", - x86_GS: "%gs", - x86_GDTR: "%gdtr", - x86_IDTR: "%idtr", - x86_LDTR: "%ldtr", - x86_MSW: "%msw", - x86_TASK: "%task", - x86_CR0: "%cr0", - x86_CR1: "%cr1", - x86_CR2: "%cr2", - x86_CR3: "%cr3", - x86_CR4: "%cr4", - x86_CR5: "%cr5", - x86_CR6: "%cr6", - x86_CR7: "%cr7", - x86_CR8: "%cr8", - x86_CR9: "%cr9", - x86_CR10: "%cr10", - x86_CR11: "%cr11", - x86_CR12: "%cr12", - x86_CR13: "%cr13", - x86_CR14: "%cr14", - x86_CR15: "%cr15", - x86_DR0: "%db0", - x86_DR1: "%db1", - x86_DR2: "%db2", - x86_DR3: "%db3", - x86_DR4: "%db4", - x86_DR5: "%db5", - x86_DR6: "%db6", - x86_DR7: "%db7", - x86_TR0: "%tr0", - x86_TR1: "%tr1", - x86_TR2: "%tr2", - x86_TR3: "%tr3", - x86_TR4: "%tr4", - x86_TR5: "%tr5", - x86_TR6: "%tr6", - x86_TR7: "%tr7", -} - -var x86_gnuOp = map[x86_Op]string{ - x86_CBW: "cbtw", - x86_CDQ: "cltd", - x86_CMPSD: "cmpsl", - x86_CMPSD_XMM: "cmpsd", - x86_CWD: "cwtd", - x86_CWDE: "cwtl", - x86_CQO: "cqto", - x86_INSD: "insl", - x86_IRET: "iretw", - x86_IRETD: "iret", - x86_IRETQ: "iretq", - x86_LODSB: "lods", - x86_LODSD: "lods", - x86_LODSQ: "lods", - x86_LODSW: "lods", - x86_MOVSD: "movsl", - x86_MOVSD_XMM: "movsd", - x86_OUTSD: "outsl", - x86_POPA: "popaw", - x86_POPAD: "popa", - x86_POPF: "popfw", - x86_POPFD: "popf", - x86_PUSHA: "pushaw", - x86_PUSHAD: "pusha", - x86_PUSHF: "pushfw", - x86_PUSHFD: "pushf", - x86_SCASB: "scas", - x86_SCASD: "scas", - x86_SCASQ: "scas", - x86_SCASW: "scas", - x86_STOSB: "stos", - x86_STOSD: "stos", - x86_STOSQ: "stos", - x86_STOSW: "stos", - x86_XLATB: "xlat", -} - -var x86_cmppsOps = []string{ - "cmpeq", - "cmplt", - "cmple", - "cmpunord", - "cmpneq", - "cmpnlt", - "cmpnle", - "cmpord", -} - -var x86_pclmulqOps = []string{ - "pclmullqlqdq", - "pclmulhqlqdq", - "pclmullqhqdq", - "pclmulhqhqdq", -} - -func x86_countPrefix(inst *x86_Inst, target x86_Prefix) int { - n := 0 - for _, p := range inst.Prefix { - if p&0xFF == target&0xFF { - n++ - } - } - return n -} - -func x86_markLastImplicit(inst *x86_Inst, prefix x86_Prefix) bool { - for i := len(inst.Prefix) - 1; i >= 0; i-- { - p := inst.Prefix[i] - if p&0xFF == prefix { - inst.Prefix[i] |= x86_PrefixImplicit - return true - } - } - return false -} - -func x86_unmarkImplicit(inst *x86_Inst, prefix x86_Prefix) { - for i := len(inst.Prefix) - 1; i >= 0; i-- { - p := inst.Prefix[i] - if p&0xFF == prefix { - inst.Prefix[i] &^= x86_PrefixImplicit - } - } -} - -func x86_byteSizeSuffix(b int) string { - switch b { - case 1: - return "b" - case 2: - return "w" - case 4: - return "l" - case 8: - return "q" - } - return "" -} - -func x86_argBytes(inst *x86_Inst, arg x86_Arg) int { - if x86_isMem(arg) { - return inst.MemBytes - } - return x86_regBytes(arg) -} - -func x86_isFloat(op x86_Op) bool { - switch op { - case x86_FADD, x86_FCOM, x86_FCOMP, x86_FDIV, x86_FDIVR, x86_FIADD, x86_FICOM, x86_FICOMP, x86_FIDIV, x86_FIDIVR, x86_FILD, x86_FIMUL, x86_FIST, x86_FISTP, x86_FISTTP, x86_FISUB, x86_FISUBR, x86_FLD, x86_FMUL, x86_FST, x86_FSTP, x86_FSUB, x86_FSUBR: - return true - } - return false -} - -func x86_isFloatInt(op x86_Op) bool { - switch op { - case x86_FIADD, x86_FICOM, x86_FICOMP, x86_FIDIV, x86_FIDIVR, x86_FILD, x86_FIMUL, x86_FIST, x86_FISTP, x86_FISTTP, x86_FISUB, x86_FISUBR: - return true - } - return false -} - -/* inst.go */ - -// Copyright 2014 The Go Authors. All rights reserved. -// Use of this source code is governed by a BSD-style -// license that can be found in the LICENSE file. - -// Package x86asm implements decoding of x86 machine code. - -// An Inst is a single instruction. -type x86_Inst struct { - Prefix x86_Prefixes // Prefixes applied to the instruction. - Op x86_Op // Opcode mnemonic - Opcode uint32 // Encoded opcode bits, left aligned (first byte is Opcode>>24, etc) - Args x86_Args // Instruction arguments, in Intel order - Mode int // processor mode in bits: 16, 32, or 64 - AddrSize int // address size in bits: 16, 32, or 64 - DataSize int // operand size in bits: 16, 32, or 64 - MemBytes int // size of memory argument in bytes: 1, 2, 4, 8, 16, and so on. - Len int // length of encoded instruction in bytes -} - -// Prefixes is an array of prefixes associated with a single instruction. -// The prefixes are listed in the same order as found in the instruction: -// each prefix byte corresponds to one slot in the array. The first zero -// in the array marks the end of the prefixes. -type x86_Prefixes [14]x86_Prefix - -// A Prefix represents an Intel instruction prefix. -// The low 8 bits are the actual prefix byte encoding, -// and the top 8 bits contain distinguishing bits and metadata. -type x86_Prefix uint16 - -const ( - // Metadata about the role of a prefix in an instruction. - x86_PrefixImplicit x86_Prefix = 0x8000 // prefix is implied by instruction text - x86_PrefixIgnored x86_Prefix = 0x4000 // prefix is ignored: either irrelevant or overridden by a later prefix - x86_PrefixInvalid x86_Prefix = 0x2000 // prefix makes entire instruction invalid (bad LOCK) - - // Memory segment overrides. - x86_PrefixES x86_Prefix = 0x26 // ES segment override - x86_PrefixCS x86_Prefix = 0x2E // CS segment override - x86_PrefixSS x86_Prefix = 0x36 // SS segment override - x86_PrefixDS x86_Prefix = 0x3E // DS segment override - x86_PrefixFS x86_Prefix = 0x64 // FS segment override - x86_PrefixGS x86_Prefix = 0x65 // GS segment override - - // Branch prediction. - x86_PrefixPN x86_Prefix = 0x12E // predict not taken (conditional branch only) - x86_PrefixPT x86_Prefix = 0x13E // predict taken (conditional branch only) - - // Size attributes. - x86_PrefixDataSize x86_Prefix = 0x66 // operand size override - x86_PrefixData16 x86_Prefix = 0x166 - x86_PrefixData32 x86_Prefix = 0x266 - x86_PrefixAddrSize x86_Prefix = 0x67 // address size override - x86_PrefixAddr16 x86_Prefix = 0x167 - x86_PrefixAddr32 x86_Prefix = 0x267 - - // One of a kind. - x86_PrefixLOCK x86_Prefix = 0xF0 // lock - x86_PrefixREPN x86_Prefix = 0xF2 // repeat not zero - x86_PrefixXACQUIRE x86_Prefix = 0x1F2 - x86_PrefixBND x86_Prefix = 0x2F2 - x86_PrefixREP x86_Prefix = 0xF3 // repeat - x86_PrefixXRELEASE x86_Prefix = 0x1F3 - - // The REX prefixes must be in the range [PrefixREX, PrefixREX+0x10). - // the other bits are set or not according to the intended use. - x86_PrefixREX x86_Prefix = 0x40 // REX 64-bit extension prefix - x86_PrefixREXW x86_Prefix = 0x08 // extension bit W (64-bit instruction width) - x86_PrefixREXR x86_Prefix = 0x04 // extension bit R (r field in modrm) - x86_PrefixREXX x86_Prefix = 0x02 // extension bit X (index field in sib) - x86_PrefixREXB x86_Prefix = 0x01 // extension bit B (r/m field in modrm or base field in sib) -) - -// IsREX reports whether p is a REX prefix byte. -func (p x86_Prefix) IsREX() bool { - return p&0xF0 == x86_PrefixREX -} - -func (p x86_Prefix) String() string { - p &^= x86_PrefixImplicit | x86_PrefixIgnored | x86_PrefixInvalid - if s := x86_prefixNames[p]; s != "" { - return s - } - - if p.IsREX() { - s := "REX." - if p&x86_PrefixREXW != 0 { - s += "W" - } - if p&x86_PrefixREXR != 0 { - s += "R" - } - if p&x86_PrefixREXX != 0 { - s += "X" - } - if p&x86_PrefixREXB != 0 { - s += "B" - } - return s - } - - return fmt.Sprintf("Prefix(%#x)", int(p)) -} - -// An Op is an x86 opcode. -type x86_Op uint32 - -func (op x86_Op) String() string { - i := int(op) - if i < 0 || i >= len(x86_opNames) || x86_opNames[i] == "" { - return fmt.Sprintf("Op(%d)", i) - } - return x86_opNames[i] -} - -// An Args holds the instruction arguments. -// If an instruction has fewer than 4 arguments, -// the final elements in the array are nil. -type x86_Args [4]x86_Arg - -// An Arg is a single instruction argument, -// one of these types: Reg, Mem, Imm, Rel. -type x86_Arg interface { - String() string - isArg() -} - -// Note that the implements of Arg that follow are all sized -// so that on a 64-bit machine the data can be inlined in -// the interface value instead of requiring an allocation. - -// A Reg is a single register. -// The zero Reg value has no name but indicates ``no register.'' -type x86_Reg uint8 - -const ( - _ x86_Reg = iota - - // 8-bit - x86_AL - x86_CL - x86_DL - x86_BL - x86_AH - x86_CH - x86_DH - x86_BH - x86_SPB - x86_BPB - x86_SIB - x86_DIB - x86_R8B - x86_R9B - x86_R10B - x86_R11B - x86_R12B - x86_R13B - x86_R14B - x86_R15B - - // 16-bit - x86_AX - x86_CX - x86_DX - x86_BX - x86_SP - x86_BP - x86_SI - x86_DI - x86_R8W - x86_R9W - x86_R10W - x86_R11W - x86_R12W - x86_R13W - x86_R14W - x86_R15W - - // 32-bit - x86_EAX - x86_ECX - x86_EDX - x86_EBX - x86_ESP - x86_EBP - x86_ESI - x86_EDI - x86_R8L - x86_R9L - x86_R10L - x86_R11L - x86_R12L - x86_R13L - x86_R14L - x86_R15L - - // 64-bit - x86_RAX - x86_RCX - x86_RDX - x86_RBX - x86_RSP - x86_RBP - x86_RSI - x86_RDI - x86_R8 - x86_R9 - x86_R10 - x86_R11 - x86_R12 - x86_R13 - x86_R14 - x86_R15 - - // Instruction pointer. - x86_IP // 16-bit - x86_EIP // 32-bit - x86_RIP // 64-bit - - // 387 floating point registers. - x86_F0 - x86_F1 - x86_F2 - x86_F3 - x86_F4 - x86_F5 - x86_F6 - x86_F7 - - // MMX registers. - x86_M0 - x86_M1 - x86_M2 - x86_M3 - x86_M4 - x86_M5 - x86_M6 - x86_M7 - - // XMM registers. - x86_X0 - x86_X1 - x86_X2 - x86_X3 - x86_X4 - x86_X5 - x86_X6 - x86_X7 - x86_X8 - x86_X9 - x86_X10 - x86_X11 - x86_X12 - x86_X13 - x86_X14 - x86_X15 - - // Segment registers. - x86_ES - x86_CS - x86_SS - x86_DS - x86_FS - x86_GS - - // System registers. - x86_GDTR - x86_IDTR - x86_LDTR - x86_MSW - x86_TASK - - // Control registers. - x86_CR0 - x86_CR1 - x86_CR2 - x86_CR3 - x86_CR4 - x86_CR5 - x86_CR6 - x86_CR7 - x86_CR8 - x86_CR9 - x86_CR10 - x86_CR11 - x86_CR12 - x86_CR13 - x86_CR14 - x86_CR15 - - // Debug registers. - x86_DR0 - x86_DR1 - x86_DR2 - x86_DR3 - x86_DR4 - x86_DR5 - x86_DR6 - x86_DR7 - x86_DR8 - x86_DR9 - x86_DR10 - x86_DR11 - x86_DR12 - x86_DR13 - x86_DR14 - x86_DR15 - - // Task registers. - x86_TR0 - x86_TR1 - x86_TR2 - x86_TR3 - x86_TR4 - x86_TR5 - x86_TR6 - x86_TR7 -) - -const x86_regMax = x86_TR7 - -func (x86_Reg) isArg() {} - -func (r x86_Reg) String() string { - i := int(r) - if i < 0 || i >= len(x86_regNames) || x86_regNames[i] == "" { - return fmt.Sprintf("Reg(%d)", i) - } - return x86_regNames[i] -} - -// A Mem is a memory reference. -// The general form is Segment:[Base+Scale*Index+Disp]. -type x86_Mem struct { - Segment x86_Reg - Base x86_Reg - Scale uint8 - Index x86_Reg - Disp int64 -} - -func (x86_Mem) isArg() {} - -func (m x86_Mem) String() string { - var base, plus, scale, index, disp string - - if m.Base != 0 { - base = m.Base.String() - } - if m.Scale != 0 { - if m.Base != 0 { - plus = "+" - } - if m.Scale > 1 { - scale = fmt.Sprintf("%d*", m.Scale) - } - index = m.Index.String() - } - if m.Disp != 0 || m.Base == 0 && m.Scale == 0 { - disp = fmt.Sprintf("%+#x", m.Disp) - } - return "[" + base + plus + scale + index + disp + "]" -} - -// A Rel is an offset relative to the current instruction pointer. -type x86_Rel int32 - -func (x86_Rel) isArg() {} - -func (r x86_Rel) String() string { - return fmt.Sprintf(".%+d", r) -} - -// An Imm is an integer constant. -type x86_Imm int64 - -func (x86_Imm) isArg() {} - -func (i x86_Imm) String() string { - return fmt.Sprintf("%#x", int64(i)) -} - -func (i x86_Inst) String() string { - var buf bytes.Buffer - for _, p := range i.Prefix { - if p == 0 { - break - } - if p&x86_PrefixImplicit != 0 { - continue - } - fmt.Fprintf(&buf, "%v ", p) - } - fmt.Fprintf(&buf, "%v", i.Op) - sep := " " - for _, v := range i.Args { - if v == nil { - break - } - fmt.Fprintf(&buf, "%s%v", sep, v) - sep = ", " - } - return buf.String() -} - -func x86_isReg(a x86_Arg) bool { - _, ok := a.(x86_Reg) - return ok -} - -func x86_isSegReg(a x86_Arg) bool { - r, ok := a.(x86_Reg) - return ok && x86_ES <= r && r <= x86_GS -} - -func x86_isMem(a x86_Arg) bool { - _, ok := a.(x86_Mem) - return ok -} - -func x86_isImm(a x86_Arg) bool { - _, ok := a.(x86_Imm) - return ok -} - -func x86_regBytes(a x86_Arg) int { - r, ok := a.(x86_Reg) - if !ok { - return 0 - } - if x86_AL <= r && r <= x86_R15B { - return 1 - } - if x86_AX <= r && r <= x86_R15W { - return 2 - } - if x86_EAX <= r && r <= x86_R15L { - return 4 - } - if x86_RAX <= r && r <= x86_R15 { - return 8 - } - return 0 -} - -func x86_isSegment(p x86_Prefix) bool { - switch p { - case x86_PrefixCS, x86_PrefixDS, x86_PrefixES, x86_PrefixFS, x86_PrefixGS, x86_PrefixSS: - return true - } - return false -} - -// The Op definitions and string list are in tables.go. - -var x86_prefixNames = map[x86_Prefix]string{ - x86_PrefixCS: "CS", - x86_PrefixDS: "DS", - x86_PrefixES: "ES", - x86_PrefixFS: "FS", - x86_PrefixGS: "GS", - x86_PrefixSS: "SS", - x86_PrefixLOCK: "LOCK", - x86_PrefixREP: "REP", - x86_PrefixREPN: "REPN", - x86_PrefixAddrSize: "ADDRSIZE", - x86_PrefixDataSize: "DATASIZE", - x86_PrefixAddr16: "ADDR16", - x86_PrefixData16: "DATA16", - x86_PrefixAddr32: "ADDR32", - x86_PrefixData32: "DATA32", - x86_PrefixBND: "BND", - x86_PrefixXACQUIRE: "XACQUIRE", - x86_PrefixXRELEASE: "XRELEASE", - x86_PrefixREX: "REX", - x86_PrefixPT: "PT", - x86_PrefixPN: "PN", -} - -var x86_regNames = [...]string{ - x86_AL: "AL", - x86_CL: "CL", - x86_BL: "BL", - x86_DL: "DL", - x86_AH: "AH", - x86_CH: "CH", - x86_BH: "BH", - x86_DH: "DH", - x86_SPB: "SPB", - x86_BPB: "BPB", - x86_SIB: "SIB", - x86_DIB: "DIB", - x86_R8B: "R8B", - x86_R9B: "R9B", - x86_R10B: "R10B", - x86_R11B: "R11B", - x86_R12B: "R12B", - x86_R13B: "R13B", - x86_R14B: "R14B", - x86_R15B: "R15B", - x86_AX: "AX", - x86_CX: "CX", - x86_BX: "BX", - x86_DX: "DX", - x86_SP: "SP", - x86_BP: "BP", - x86_SI: "SI", - x86_DI: "DI", - x86_R8W: "R8W", - x86_R9W: "R9W", - x86_R10W: "R10W", - x86_R11W: "R11W", - x86_R12W: "R12W", - x86_R13W: "R13W", - x86_R14W: "R14W", - x86_R15W: "R15W", - x86_EAX: "EAX", - x86_ECX: "ECX", - x86_EDX: "EDX", - x86_EBX: "EBX", - x86_ESP: "ESP", - x86_EBP: "EBP", - x86_ESI: "ESI", - x86_EDI: "EDI", - x86_R8L: "R8L", - x86_R9L: "R9L", - x86_R10L: "R10L", - x86_R11L: "R11L", - x86_R12L: "R12L", - x86_R13L: "R13L", - x86_R14L: "R14L", - x86_R15L: "R15L", - x86_RAX: "RAX", - x86_RCX: "RCX", - x86_RDX: "RDX", - x86_RBX: "RBX", - x86_RSP: "RSP", - x86_RBP: "RBP", - x86_RSI: "RSI", - x86_RDI: "RDI", - x86_R8: "R8", - x86_R9: "R9", - x86_R10: "R10", - x86_R11: "R11", - x86_R12: "R12", - x86_R13: "R13", - x86_R14: "R14", - x86_R15: "R15", - x86_IP: "IP", - x86_EIP: "EIP", - x86_RIP: "RIP", - x86_F0: "F0", - x86_F1: "F1", - x86_F2: "F2", - x86_F3: "F3", - x86_F4: "F4", - x86_F5: "F5", - x86_F6: "F6", - x86_F7: "F7", - x86_M0: "M0", - x86_M1: "M1", - x86_M2: "M2", - x86_M3: "M3", - x86_M4: "M4", - x86_M5: "M5", - x86_M6: "M6", - x86_M7: "M7", - x86_X0: "X0", - x86_X1: "X1", - x86_X2: "X2", - x86_X3: "X3", - x86_X4: "X4", - x86_X5: "X5", - x86_X6: "X6", - x86_X7: "X7", - x86_X8: "X8", - x86_X9: "X9", - x86_X10: "X10", - x86_X11: "X11", - x86_X12: "X12", - x86_X13: "X13", - x86_X14: "X14", - x86_X15: "X15", - x86_CS: "CS", - x86_SS: "SS", - x86_DS: "DS", - x86_ES: "ES", - x86_FS: "FS", - x86_GS: "GS", - x86_GDTR: "GDTR", - x86_IDTR: "IDTR", - x86_LDTR: "LDTR", - x86_MSW: "MSW", - x86_TASK: "TASK", - x86_CR0: "CR0", - x86_CR1: "CR1", - x86_CR2: "CR2", - x86_CR3: "CR3", - x86_CR4: "CR4", - x86_CR5: "CR5", - x86_CR6: "CR6", - x86_CR7: "CR7", - x86_CR8: "CR8", - x86_CR9: "CR9", - x86_CR10: "CR10", - x86_CR11: "CR11", - x86_CR12: "CR12", - x86_CR13: "CR13", - x86_CR14: "CR14", - x86_CR15: "CR15", - x86_DR0: "DR0", - x86_DR1: "DR1", - x86_DR2: "DR2", - x86_DR3: "DR3", - x86_DR4: "DR4", - x86_DR5: "DR5", - x86_DR6: "DR6", - x86_DR7: "DR7", - x86_DR8: "DR8", - x86_DR9: "DR9", - x86_DR10: "DR10", - x86_DR11: "DR11", - x86_DR12: "DR12", - x86_DR13: "DR13", - x86_DR14: "DR14", - x86_DR15: "DR15", - x86_TR0: "TR0", - x86_TR1: "TR1", - x86_TR2: "TR2", - x86_TR3: "TR3", - x86_TR4: "TR4", - x86_TR5: "TR5", - x86_TR6: "TR6", - x86_TR7: "TR7", -} - -/* intel.go */ - -// Copyright 2014 The Go Authors. All rights reserved. -// Use of this source code is governed by a BSD-style -// license that can be found in the LICENSE file. - -// IntelSyntax returns the Intel assembler syntax for the instruction, as defined by Intel's XED tool. -func x86_IntelSyntax(inst x86_Inst) string { - var iargs []x86_Arg - for _, a := range inst.Args { - if a == nil { - break - } - iargs = append(iargs, a) - } - - switch inst.Op { - case x86_INSB, x86_INSD, x86_INSW, x86_OUTSB, x86_OUTSD, x86_OUTSW, x86_LOOPNE, x86_JCXZ, x86_JECXZ, x86_JRCXZ, x86_LOOP, x86_LOOPE, x86_MOV, x86_XLATB: - if inst.Op == x86_MOV && (inst.Opcode>>16)&0xFFFC != 0x0F20 { - break - } - for i, p := range inst.Prefix { - if p&0xFF == x86_PrefixAddrSize { - inst.Prefix[i] &^= x86_PrefixImplicit - } - } - } - - switch inst.Op { - case x86_MOV: - dst, _ := inst.Args[0].(x86_Reg) - src, _ := inst.Args[1].(x86_Reg) - if x86_ES <= dst && dst <= x86_GS && x86_EAX <= src && src <= x86_R15L { - src -= x86_EAX - x86_AX - iargs[1] = src - } - if x86_ES <= dst && dst <= x86_GS && x86_RAX <= src && src <= x86_R15 { - src -= x86_RAX - x86_AX - iargs[1] = src - } - - if inst.Opcode>>24&^3 == 0xA0 { - for i, p := range inst.Prefix { - if p&0xFF == x86_PrefixAddrSize { - inst.Prefix[i] |= x86_PrefixImplicit - } - } - } - } - - switch inst.Op { - case x86_AAM, x86_AAD: - if imm, ok := iargs[0].(x86_Imm); ok { - if inst.DataSize == 32 { - iargs[0] = x86_Imm(uint32(int8(imm))) - } else if inst.DataSize == 16 { - iargs[0] = x86_Imm(uint16(int8(imm))) - } - } - - case x86_PUSH: - if imm, ok := iargs[0].(x86_Imm); ok { - iargs[0] = x86_Imm(uint32(imm)) - } - } - - for _, p := range inst.Prefix { - if p&x86_PrefixImplicit != 0 { - for j, pj := range inst.Prefix { - if pj&0xFF == p&0xFF { - inst.Prefix[j] |= x86_PrefixImplicit - } - } - } - } - - if inst.Op != 0 { - for i, p := range inst.Prefix { - switch p &^ x86_PrefixIgnored { - case x86_PrefixData16, x86_PrefixData32, x86_PrefixCS, x86_PrefixDS, x86_PrefixES, x86_PrefixSS: - inst.Prefix[i] |= x86_PrefixImplicit - } - if p.IsREX() { - inst.Prefix[i] |= x86_PrefixImplicit - } - } - } - - if x86_isLoop[inst.Op] || inst.Op == x86_JCXZ || inst.Op == x86_JECXZ || inst.Op == x86_JRCXZ { - for i, p := range inst.Prefix { - if p == x86_PrefixPT || p == x86_PrefixPN { - inst.Prefix[i] |= x86_PrefixImplicit - } - } - } - - switch inst.Op { - case x86_AAA, x86_AAS, x86_CBW, x86_CDQE, x86_CLC, x86_CLD, x86_CLI, x86_CLTS, x86_CMC, x86_CPUID, x86_CQO, x86_CWD, x86_DAA, x86_DAS, - x86_FDECSTP, x86_FINCSTP, x86_FNCLEX, x86_FNINIT, x86_FNOP, x86_FWAIT, x86_HLT, - x86_ICEBP, x86_INSB, x86_INSD, x86_INSW, x86_INT, x86_INTO, x86_INVD, x86_IRET, x86_IRETQ, - x86_LAHF, x86_LEAVE, x86_LRET, x86_MONITOR, x86_MWAIT, x86_NOP, x86_OUTSB, x86_OUTSD, x86_OUTSW, - x86_PAUSE, x86_POPA, x86_POPF, x86_POPFQ, x86_PUSHA, x86_PUSHF, x86_PUSHFQ, - x86_RDMSR, x86_RDPMC, x86_RDTSC, x86_RDTSCP, x86_RET, x86_RSM, - x86_SAHF, x86_STC, x86_STD, x86_STI, x86_SYSENTER, x86_SYSEXIT, x86_SYSRET, - x86_UD2, x86_WBINVD, x86_WRMSR, x86_XEND, x86_XLATB, x86_XTEST: - - if inst.Op == x86_NOP && inst.Opcode>>24 != 0x90 { - break - } - if inst.Op == x86_RET && inst.Opcode>>24 != 0xC3 { - break - } - if inst.Op == x86_INT && inst.Opcode>>24 != 0xCC { - break - } - if inst.Op == x86_LRET && inst.Opcode>>24 != 0xcb { - break - } - for i, p := range inst.Prefix { - if p&0xFF == x86_PrefixDataSize { - inst.Prefix[i] &^= x86_PrefixImplicit | x86_PrefixIgnored - } - } - - case 0: - // ok - } - - switch inst.Op { - case x86_INSB, x86_INSD, x86_INSW, x86_OUTSB, x86_OUTSD, x86_OUTSW, x86_MONITOR, x86_MWAIT, x86_XLATB: - iargs = nil - - case x86_STOSB, x86_STOSW, x86_STOSD, x86_STOSQ: - iargs = iargs[:1] - - case x86_LODSB, x86_LODSW, x86_LODSD, x86_LODSQ, x86_SCASB, x86_SCASW, x86_SCASD, x86_SCASQ: - iargs = iargs[1:] - } - - const ( - haveData16 = 1 << iota - haveData32 - haveAddr16 - haveAddr32 - haveXacquire - haveXrelease - haveLock - haveHintTaken - haveHintNotTaken - haveBnd - ) - var prefixBits uint32 - prefix := "" - for _, p := range inst.Prefix { - if p == 0 { - break - } - if p&0xFF == 0xF3 { - prefixBits &^= haveBnd - } - if p&(x86_PrefixImplicit|x86_PrefixIgnored) != 0 { - continue - } - switch p { - default: - prefix += strings.ToLower(p.String()) + " " - case x86_PrefixCS, x86_PrefixDS, x86_PrefixES, x86_PrefixFS, x86_PrefixGS, x86_PrefixSS: - if inst.Op == 0 { - prefix += strings.ToLower(p.String()) + " " - } - case x86_PrefixREPN: - prefix += "repne " - case x86_PrefixLOCK: - prefixBits |= haveLock - case x86_PrefixData16, x86_PrefixDataSize: - prefixBits |= haveData16 - case x86_PrefixData32: - prefixBits |= haveData32 - case x86_PrefixAddrSize, x86_PrefixAddr16: - prefixBits |= haveAddr16 - case x86_PrefixAddr32: - prefixBits |= haveAddr32 - case x86_PrefixXACQUIRE: - prefixBits |= haveXacquire - case x86_PrefixXRELEASE: - prefixBits |= haveXrelease - case x86_PrefixPT: - prefixBits |= haveHintTaken - case x86_PrefixPN: - prefixBits |= haveHintNotTaken - case x86_PrefixBND: - prefixBits |= haveBnd - } - } - switch inst.Op { - case x86_JMP: - if inst.Opcode>>24 == 0xEB { - prefixBits &^= haveBnd - } - case x86_RET, x86_LRET: - prefixBits &^= haveData16 | haveData32 - } - - if prefixBits&haveXacquire != 0 { - prefix += "xacquire " - } - if prefixBits&haveXrelease != 0 { - prefix += "xrelease " - } - if prefixBits&haveLock != 0 { - prefix += "lock " - } - if prefixBits&haveBnd != 0 { - prefix += "bnd " - } - if prefixBits&haveHintTaken != 0 { - prefix += "hint-taken " - } - if prefixBits&haveHintNotTaken != 0 { - prefix += "hint-not-taken " - } - if prefixBits&haveAddr16 != 0 { - prefix += "addr16 " - } - if prefixBits&haveAddr32 != 0 { - prefix += "addr32 " - } - if prefixBits&haveData16 != 0 { - prefix += "data16 " - } - if prefixBits&haveData32 != 0 { - prefix += "data32 " - } - - if inst.Op == 0 { - if prefix == "" { - return "<no instruction>" - } - return prefix[:len(prefix)-1] - } - - var args []string - for _, a := range iargs { - if a == nil { - break - } - args = append(args, x86_intelArg(&inst, a)) - } - - var op string - switch inst.Op { - case x86_NOP: - if inst.Opcode>>24 == 0x0F { - if inst.DataSize == 16 { - args = append(args, "ax") - } else { - args = append(args, "eax") - } - } - - case x86_BLENDVPD, x86_BLENDVPS, x86_PBLENDVB: - args = args[:2] - - case x86_INT: - if inst.Opcode>>24 == 0xCC { - args = nil - op = "int3" - } - - case x86_LCALL, x86_LJMP: - if len(args) == 2 { - args[0], args[1] = args[1], args[0] - } - - case x86_FCHS, x86_FABS, x86_FTST, x86_FLDPI, x86_FLDL2E, x86_FLDLG2, x86_F2XM1, x86_FXAM, x86_FLD1, x86_FLDL2T, x86_FSQRT, x86_FRNDINT, x86_FCOS, x86_FSIN: - if len(args) == 0 { - args = append(args, "st0") - } - - case x86_FPTAN, x86_FSINCOS, x86_FUCOMPP, x86_FCOMPP, x86_FYL2X, x86_FPATAN, x86_FXTRACT, x86_FPREM1, x86_FPREM, x86_FYL2XP1, x86_FSCALE: - if len(args) == 0 { - args = []string{"st0", "st1"} - } - - case x86_FST, x86_FSTP, x86_FISTTP, x86_FIST, x86_FISTP, x86_FBSTP: - if len(args) == 1 { - args = append(args, "st0") - } - - case x86_FLD, x86_FXCH, x86_FCOM, x86_FCOMP, x86_FIADD, x86_FIMUL, x86_FICOM, x86_FICOMP, x86_FISUBR, x86_FIDIV, x86_FUCOM, x86_FUCOMP, x86_FILD, x86_FBLD, x86_FADD, x86_FMUL, x86_FSUB, x86_FSUBR, x86_FISUB, x86_FDIV, x86_FDIVR, x86_FIDIVR: - if len(args) == 1 { - args = []string{"st0", args[0]} - } - - case x86_MASKMOVDQU, x86_MASKMOVQ, x86_XLATB, x86_OUTSB, x86_OUTSW, x86_OUTSD: - FixSegment: - for i := len(inst.Prefix) - 1; i >= 0; i-- { - p := inst.Prefix[i] & 0xFF - switch p { - case x86_PrefixCS, x86_PrefixES, x86_PrefixFS, x86_PrefixGS, x86_PrefixSS: - if inst.Mode != 64 || p == x86_PrefixFS || p == x86_PrefixGS { - args = append(args, strings.ToLower((inst.Prefix[i] & 0xFF).String())) - break FixSegment - } - case x86_PrefixDS: - if inst.Mode != 64 { - break FixSegment - } - } - } - } - - if op == "" { - op = x86_intelOp[inst.Op] - } - if op == "" { - op = strings.ToLower(inst.Op.String()) - } - if args != nil { - op += " " + strings.Join(args, ", ") - } - return prefix + op -} - -func x86_intelArg(inst *x86_Inst, arg x86_Arg) string { - switch a := arg.(type) { - case x86_Imm: - if inst.Mode == 32 { - return fmt.Sprintf("%#x", uint32(a)) - } - if x86_Imm(int32(a)) == a { - return fmt.Sprintf("%#x", int64(a)) - } - return fmt.Sprintf("%#x", uint64(a)) - case x86_Mem: - if a.Base == x86_EIP { - a.Base = x86_RIP - } - prefix := "" - switch inst.MemBytes { - case 1: - prefix = "byte " - case 2: - prefix = "word " - case 4: - prefix = "dword " - case 8: - prefix = "qword " - case 16: - prefix = "xmmword " - } - switch inst.Op { - case x86_INVLPG: - prefix = "byte " - case x86_STOSB, x86_MOVSB, x86_CMPSB, x86_LODSB, x86_SCASB: - prefix = "byte " - case x86_STOSW, x86_MOVSW, x86_CMPSW, x86_LODSW, x86_SCASW: - prefix = "word " - case x86_STOSD, x86_MOVSD, x86_CMPSD, x86_LODSD, x86_SCASD: - prefix = "dword " - case x86_STOSQ, x86_MOVSQ, x86_CMPSQ, x86_LODSQ, x86_SCASQ: - prefix = "qword " - case x86_LAR: - prefix = "word " - case x86_BOUND: - if inst.Mode == 32 { - prefix = "qword " - } else { - prefix = "dword " - } - case x86_PREFETCHW, x86_PREFETCHNTA, x86_PREFETCHT0, x86_PREFETCHT1, x86_PREFETCHT2, x86_CLFLUSH: - prefix = "zmmword " - } - switch inst.Op { - case x86_MOVSB, x86_MOVSW, x86_MOVSD, x86_MOVSQ, x86_CMPSB, x86_CMPSW, x86_CMPSD, x86_CMPSQ, x86_STOSB, x86_STOSW, x86_STOSD, x86_STOSQ, x86_SCASB, x86_SCASW, x86_SCASD, x86_SCASQ, x86_LODSB, x86_LODSW, x86_LODSD, x86_LODSQ: - switch a.Base { - case x86_DI, x86_EDI, x86_RDI: - if a.Segment == x86_ES { - a.Segment = 0 - } - case x86_SI, x86_ESI, x86_RSI: - if a.Segment == x86_DS { - a.Segment = 0 - } - } - case x86_LEA: - a.Segment = 0 - default: - switch a.Base { - case x86_SP, x86_ESP, x86_RSP, x86_BP, x86_EBP, x86_RBP: - if a.Segment == x86_SS { - a.Segment = 0 - } - default: - if a.Segment == x86_DS { - a.Segment = 0 - } - } - } - - if inst.Mode == 64 && a.Segment != x86_FS && a.Segment != x86_GS { - a.Segment = 0 - } - - prefix += "ptr " - if a.Segment != 0 { - prefix += strings.ToLower(a.Segment.String()) + ":" - } - prefix += "[" - if a.Base != 0 { - prefix += x86_intelArg(inst, a.Base) - } - if a.Scale != 0 && a.Index != 0 { - if a.Base != 0 { - prefix += "+" - } - prefix += fmt.Sprintf("%s*%d", x86_intelArg(inst, a.Index), a.Scale) - } - if a.Disp != 0 { - if prefix[len(prefix)-1] == '[' && (a.Disp >= 0 || int64(int32(a.Disp)) != a.Disp) { - prefix += fmt.Sprintf("%#x", uint64(a.Disp)) - } else { - prefix += fmt.Sprintf("%+#x", a.Disp) - } - } - prefix += "]" - return prefix - case x86_Rel: - return fmt.Sprintf(".%+#x", int64(a)) - case x86_Reg: - if int(a) < len(x86_intelReg) && x86_intelReg[a] != "" { - return x86_intelReg[a] - } - } - return strings.ToLower(arg.String()) -} - -var x86_intelOp = map[x86_Op]string{ - x86_JAE: "jnb", - x86_JA: "jnbe", - x86_JGE: "jnl", - x86_JNE: "jnz", - x86_JG: "jnle", - x86_JE: "jz", - x86_SETAE: "setnb", - x86_SETA: "setnbe", - x86_SETGE: "setnl", - x86_SETNE: "setnz", - x86_SETG: "setnle", - x86_SETE: "setz", - x86_CMOVAE: "cmovnb", - x86_CMOVA: "cmovnbe", - x86_CMOVGE: "cmovnl", - x86_CMOVNE: "cmovnz", - x86_CMOVG: "cmovnle", - x86_CMOVE: "cmovz", - x86_LCALL: "call far", - x86_LJMP: "jmp far", - x86_LRET: "ret far", - x86_ICEBP: "int1", - x86_MOVSD_XMM: "movsd", - x86_XLATB: "xlat", -} - -var x86_intelReg = [...]string{ - x86_F0: "st0", - x86_F1: "st1", - x86_F2: "st2", - x86_F3: "st3", - x86_F4: "st4", - x86_F5: "st5", - x86_F6: "st6", - x86_F7: "st7", - x86_M0: "mmx0", - x86_M1: "mmx1", - x86_M2: "mmx2", - x86_M3: "mmx3", - x86_M4: "mmx4", - x86_M5: "mmx5", - x86_M6: "mmx6", - x86_M7: "mmx7", - x86_X0: "xmm0", - x86_X1: "xmm1", - x86_X2: "xmm2", - x86_X3: "xmm3", - x86_X4: "xmm4", - x86_X5: "xmm5", - x86_X6: "xmm6", - x86_X7: "xmm7", - x86_X8: "xmm8", - x86_X9: "xmm9", - x86_X10: "xmm10", - x86_X11: "xmm11", - x86_X12: "xmm12", - x86_X13: "xmm13", - x86_X14: "xmm14", - x86_X15: "xmm15", - - // TODO: Maybe the constants are named wrong. - x86_SPB: "spl", - x86_BPB: "bpl", - x86_SIB: "sil", - x86_DIB: "dil", - - x86_R8L: "r8d", - x86_R9L: "r9d", - x86_R10L: "r10d", - x86_R11L: "r11d", - x86_R12L: "r12d", - x86_R13L: "r13d", - x86_R14L: "r14d", - x86_R15L: "r15d", -} - -/* plan9x.go */ - -// Copyright 2014 The Go Authors. All rights reserved. -// Use of this source code is governed by a BSD-style -// license that can be found in the LICENSE file. - -// plan9Syntax returns the Go assembler syntax for the instruction. -// The syntax was originally defined by Plan 9. -// The pc is the program counter of the instruction, used for expanding -// PC-relative addresses into absolute ones. -// The symname function queries the symbol table for the program -// being disassembled. Given a target address it returns the name and base -// address of the symbol containing the target, if any; otherwise it returns "", 0. -func x86_plan9Syntax(inst x86_Inst, pc uint64, symname func(uint64) (string, uint64)) string { - if symname == nil { - symname = func(uint64) (string, uint64) { return "", 0 } - } - var args []string - for i := len(inst.Args) - 1; i >= 0; i-- { - a := inst.Args[i] - if a == nil { - continue - } - args = append(args, x86_plan9Arg(&inst, pc, symname, a)) - } - - var last x86_Prefix - for _, p := range inst.Prefix { - if p == 0 || p.IsREX() { - break - } - last = p - } - - prefix := "" - switch last & 0xFF { - case 0, 0x66, 0x67: - // ignore - case x86_PrefixREPN: - prefix += "REPNE " - default: - prefix += last.String() + " " - } - - op := inst.Op.String() - if x86_plan9Suffix[inst.Op] { - switch inst.DataSize { - case 8: - op += "B" - case 16: - op += "W" - case 32: - op += "L" - case 64: - op += "Q" - } - } - - if args != nil { - op += " " + strings.Join(args, ", ") - } - - return prefix + op -} - -func x86_plan9Arg(inst *x86_Inst, pc uint64, symname func(uint64) (string, uint64), arg x86_Arg) string { - switch a := arg.(type) { - case x86_Reg: - return x86_plan9Reg[a] - case x86_Rel: - if pc == 0 { - break - } - // If the absolute address is the start of a symbol, use the name. - // Otherwise use the raw address, so that things like relative - // jumps show up as JMP 0x123 instead of JMP f+10(SB). - // It is usually easier to search for 0x123 than to do the mental - // arithmetic to find f+10. - addr := pc + uint64(inst.Len) + uint64(a) - if s, base := symname(addr); s != "" && addr == base { - return fmt.Sprintf("%s(SB)", s) - } - return fmt.Sprintf("%#x", addr) - - case x86_Imm: - if s, base := symname(uint64(a)); s != "" { - suffix := "" - if uint64(a) != base { - suffix = fmt.Sprintf("%+d", uint64(a)-base) - } - return fmt.Sprintf("$%s%s(SB)", s, suffix) - } - if inst.Mode == 32 { - return fmt.Sprintf("$%#x", uint32(a)) - } - if x86_Imm(int32(a)) == a { - return fmt.Sprintf("$%#x", int64(a)) - } - return fmt.Sprintf("$%#x", uint64(a)) - case x86_Mem: - if a.Segment == 0 && a.Disp != 0 && a.Base == 0 && (a.Index == 0 || a.Scale == 0) { - if s, base := symname(uint64(a.Disp)); s != "" { - suffix := "" - if uint64(a.Disp) != base { - suffix = fmt.Sprintf("%+d", uint64(a.Disp)-base) - } - return fmt.Sprintf("%s%s(SB)", s, suffix) - } - } - s := "" - if a.Segment != 0 { - s += fmt.Sprintf("%s:", x86_plan9Reg[a.Segment]) - } - if a.Disp != 0 { - s += fmt.Sprintf("%#x", a.Disp) - } else { - s += "0" - } - if a.Base != 0 { - s += fmt.Sprintf("(%s)", x86_plan9Reg[a.Base]) - } - if a.Index != 0 && a.Scale != 0 { - s += fmt.Sprintf("(%s*%d)", x86_plan9Reg[a.Index], a.Scale) - } - return s - } - return arg.String() -} - -var x86_plan9Suffix = [x86_maxOp + 1]bool{ - x86_ADC: true, - x86_ADD: true, - x86_AND: true, - x86_BSF: true, - x86_BSR: true, - x86_BT: true, - x86_BTC: true, - x86_BTR: true, - x86_BTS: true, - x86_CMP: true, - x86_CMPXCHG: true, - x86_CVTSI2SD: true, - x86_CVTSI2SS: true, - x86_CVTSD2SI: true, - x86_CVTSS2SI: true, - x86_CVTTSD2SI: true, - x86_CVTTSS2SI: true, - x86_DEC: true, - x86_DIV: true, - x86_FLDENV: true, - x86_FRSTOR: true, - x86_IDIV: true, - x86_IMUL: true, - x86_IN: true, - x86_INC: true, - x86_LEA: true, - x86_MOV: true, - x86_MOVNTI: true, - x86_MUL: true, - x86_NEG: true, - x86_NOP: true, - x86_NOT: true, - x86_OR: true, - x86_OUT: true, - x86_POP: true, - x86_POPA: true, - x86_PUSH: true, - x86_PUSHA: true, - x86_RCL: true, - x86_RCR: true, - x86_ROL: true, - x86_ROR: true, - x86_SAR: true, - x86_SBB: true, - x86_SHL: true, - x86_SHLD: true, - x86_SHR: true, - x86_SHRD: true, - x86_SUB: true, - x86_TEST: true, - x86_XADD: true, - x86_XCHG: true, - x86_XOR: true, -} - -var x86_plan9Reg = [...]string{ - x86_AL: "AL", - x86_CL: "CL", - x86_BL: "BL", - x86_DL: "DL", - x86_AH: "AH", - x86_CH: "CH", - x86_BH: "BH", - x86_DH: "DH", - x86_SPB: "SP", - x86_BPB: "BP", - x86_SIB: "SI", - x86_DIB: "DI", - x86_R8B: "R8", - x86_R9B: "R9", - x86_R10B: "R10", - x86_R11B: "R11", - x86_R12B: "R12", - x86_R13B: "R13", - x86_R14B: "R14", - x86_R15B: "R15", - x86_AX: "AX", - x86_CX: "CX", - x86_BX: "BX", - x86_DX: "DX", - x86_SP: "SP", - x86_BP: "BP", - x86_SI: "SI", - x86_DI: "DI", - x86_R8W: "R8", - x86_R9W: "R9", - x86_R10W: "R10", - x86_R11W: "R11", - x86_R12W: "R12", - x86_R13W: "R13", - x86_R14W: "R14", - x86_R15W: "R15", - x86_EAX: "AX", - x86_ECX: "CX", - x86_EDX: "DX", - x86_EBX: "BX", - x86_ESP: "SP", - x86_EBP: "BP", - x86_ESI: "SI", - x86_EDI: "DI", - x86_R8L: "R8", - x86_R9L: "R9", - x86_R10L: "R10", - x86_R11L: "R11", - x86_R12L: "R12", - x86_R13L: "R13", - x86_R14L: "R14", - x86_R15L: "R15", - x86_RAX: "AX", - x86_RCX: "CX", - x86_RDX: "DX", - x86_RBX: "BX", - x86_RSP: "SP", - x86_RBP: "BP", - x86_RSI: "SI", - x86_RDI: "DI", - x86_R8: "R8", - x86_R9: "R9", - x86_R10: "R10", - x86_R11: "R11", - x86_R12: "R12", - x86_R13: "R13", - x86_R14: "R14", - x86_R15: "R15", - x86_IP: "IP", - x86_EIP: "IP", - x86_RIP: "IP", - x86_F0: "F0", - x86_F1: "F1", - x86_F2: "F2", - x86_F3: "F3", - x86_F4: "F4", - x86_F5: "F5", - x86_F6: "F6", - x86_F7: "F7", - x86_M0: "M0", - x86_M1: "M1", - x86_M2: "M2", - x86_M3: "M3", - x86_M4: "M4", - x86_M5: "M5", - x86_M6: "M6", - x86_M7: "M7", - x86_X0: "X0", - x86_X1: "X1", - x86_X2: "X2", - x86_X3: "X3", - x86_X4: "X4", - x86_X5: "X5", - x86_X6: "X6", - x86_X7: "X7", - x86_X8: "X8", - x86_X9: "X9", - x86_X10: "X10", - x86_X11: "X11", - x86_X12: "X12", - x86_X13: "X13", - x86_X14: "X14", - x86_X15: "X15", - x86_CS: "CS", - x86_SS: "SS", - x86_DS: "DS", - x86_ES: "ES", - x86_FS: "FS", - x86_GS: "GS", - x86_GDTR: "GDTR", - x86_IDTR: "IDTR", - x86_LDTR: "LDTR", - x86_MSW: "MSW", - x86_TASK: "TASK", - x86_CR0: "CR0", - x86_CR1: "CR1", - x86_CR2: "CR2", - x86_CR3: "CR3", - x86_CR4: "CR4", - x86_CR5: "CR5", - x86_CR6: "CR6", - x86_CR7: "CR7", - x86_CR8: "CR8", - x86_CR9: "CR9", - x86_CR10: "CR10", - x86_CR11: "CR11", - x86_CR12: "CR12", - x86_CR13: "CR13", - x86_CR14: "CR14", - x86_CR15: "CR15", - x86_DR0: "DR0", - x86_DR1: "DR1", - x86_DR2: "DR2", - x86_DR3: "DR3", - x86_DR4: "DR4", - x86_DR5: "DR5", - x86_DR6: "DR6", - x86_DR7: "DR7", - x86_DR8: "DR8", - x86_DR9: "DR9", - x86_DR10: "DR10", - x86_DR11: "DR11", - x86_DR12: "DR12", - x86_DR13: "DR13", - x86_DR14: "DR14", - x86_DR15: "DR15", - x86_TR0: "TR0", - x86_TR1: "TR1", - x86_TR2: "TR2", - x86_TR3: "TR3", - x86_TR4: "TR4", - x86_TR5: "TR5", - x86_TR6: "TR6", - x86_TR7: "TR7", -} - -/* tables.go */ - -// DO NOT EDIT -// generated by: x86map -fmt=decoder ../x86.csv - -var x86_decoder = [...]uint16{ - uint16(x86_xFail), - /*1*/ uint16(x86_xCondByte), 243, - 0x00, 490, - 0x01, 496, - 0x02, 525, - 0x03, 531, - 0x04, 560, - 0x05, 566, - 0x06, 595, - 0x07, 602, - 0x08, 609, - 0x09, 615, - 0x0A, 644, - 0x0B, 650, - 0x0C, 679, - 0x0D, 685, - 0x0E, 714, - 0x0F, 721, - 0x10, 8026, - 0x11, 8032, - 0x12, 8061, - 0x13, 8067, - 0x14, 8096, - 0x15, 8102, - 0x16, 8131, - 0x17, 8138, - 0x18, 8145, - 0x19, 8151, - 0x1A, 8180, - 0x1B, 8186, - 0x1C, 8215, - 0x1D, 8221, - 0x1E, 8250, - 0x1F, 8257, - 0x20, 8264, - 0x21, 8270, - 0x22, 8299, - 0x23, 8305, - 0x24, 8334, - 0x25, 8340, - 0x27, 8369, - 0x28, 8375, - 0x29, 8381, - 0x2A, 8410, - 0x2B, 8416, - 0x2C, 8445, - 0x2D, 8451, - 0x2F, 8480, - 0x30, 8486, - 0x31, 8492, - 0x32, 8521, - 0x33, 8527, - 0x34, 8556, - 0x35, 8562, - 0x37, 8591, - 0x38, 8597, - 0x39, 8603, - 0x3A, 8632, - 0x3B, 8638, - 0x3C, 8667, - 0x3D, 8673, - 0x3F, 8702, - 0x40, 8708, - 0x41, 8708, - 0x42, 8708, - 0x43, 8708, - 0x44, 8708, - 0x45, 8708, - 0x46, 8708, - 0x47, 8708, - 0x48, 8723, - 0x49, 8723, - 0x4a, 8723, - 0x4b, 8723, - 0x4c, 8723, - 0x4d, 8723, - 0x4e, 8723, - 0x4f, 8723, - 0x50, 8738, - 0x51, 8738, - 0x52, 8738, - 0x53, 8738, - 0x54, 8738, - 0x55, 8738, - 0x56, 8738, - 0x57, 8738, - 0x58, 8765, - 0x59, 8765, - 0x5a, 8765, - 0x5b, 8765, - 0x5c, 8765, - 0x5d, 8765, - 0x5e, 8765, - 0x5f, 8765, - 0x60, 8792, - 0x61, 8805, - 0x62, 8818, - 0x63, 8837, - 0x68, 8868, - 0x69, 8887, - 0x6A, 8922, - 0x6B, 8927, - 0x6C, 8962, - 0x6D, 8965, - 0x6E, 8978, - 0x6F, 8981, - 0x70, 8994, - 0x71, 8999, - 0x72, 9004, - 0x73, 9009, - 0x74, 9014, - 0x75, 9019, - 0x76, 9024, - 0x77, 9029, - 0x78, 9034, - 0x79, 9039, - 0x7A, 9044, - 0x7B, 9049, - 0x7C, 9054, - 0x7D, 9059, - 0x7E, 9064, - 0x7F, 9069, - 0x80, 9074, - 0x81, 9131, - 0x83, 9372, - 0x84, 9613, - 0x85, 9619, - 0x86, 9648, - 0x87, 9654, - 0x88, 9683, - 0x89, 9689, - 0x8A, 9711, - 0x8B, 9717, - 0x8C, 9739, - 0x8D, 9768, - 0x8E, 9797, - 0x8F, 9826, - 0x90, 9862, - 0x91, 9862, - 0x92, 9862, - 0x93, 9862, - 0x94, 9862, - 0x95, 9862, - 0x96, 9862, - 0x97, 9862, - 0x98, 9888, - 0x99, 9908, - 0x9A, 9928, - 0x9B, 9945, - 0x9C, 9948, - 0x9D, 9971, - 0x9E, 9994, - 0x9F, 9997, - 0xA0, 10000, - 0xA1, 10019, - 0xA2, 10041, - 0xA3, 10060, - 0xA4, 10082, - 0xA5, 10085, - 0xA6, 10105, - 0xA7, 10108, - 0xA8, 10128, - 0xA9, 10134, - 0xAA, 10163, - 0xAB, 10166, - 0xAC, 10186, - 0xAD, 10189, - 0xAE, 10209, - 0xAF, 10212, - 0xb0, 10232, - 0xb1, 10232, - 0xb2, 10232, - 0xb3, 10232, - 0xb4, 10232, - 0xb5, 10232, - 0xb6, 10232, - 0xb7, 10232, - 0xb8, 10238, - 0xb9, 10238, - 0xba, 10238, - 0xbb, 10238, - 0xbc, 10238, - 0xbd, 10238, - 0xbe, 10238, - 0xbf, 10238, - 0xC0, 10267, - 0xC1, 10318, - 0xC2, 10516, - 0xC3, 10521, - 0xC4, 10524, - 0xC5, 10543, - 0xC6, 10562, - 0xC7, 10586, - 0xC8, 10647, - 0xC9, 10654, - 0xCA, 10677, - 0xCB, 10682, - 0xCC, 10685, - 0xCD, 10689, - 0xCE, 10694, - 0xCF, 10700, - 0xD0, 10720, - 0xD1, 10764, - 0xD2, 10955, - 0xD3, 10999, - 0xD4, 11190, - 0xD5, 11198, - 0xD7, 11206, - 0xD8, 11219, - 0xD9, 11428, - 0xDA, 11637, - 0xDB, 11769, - 0xDC, 11940, - 0xDD, 12109, - 0xDE, 12248, - 0xDF, 12422, - 0xE0, 12533, - 0xE1, 12538, - 0xE2, 12543, - 0xE3, 12548, - 0xE4, 12574, - 0xE5, 12580, - 0xE6, 12602, - 0xE7, 12608, - 0xE8, 12630, - 0xE9, 12661, - 0xEA, 12692, - 0xEB, 12709, - 0xEC, 12714, - 0xED, 12719, - 0xEE, 12738, - 0xEF, 12743, - 0xF1, 12762, - 0xF4, 12765, - 0xF5, 12768, - 0xF6, 12771, - 0xF7, 12810, - 0xF8, 12986, - 0xF9, 12989, - 0xFA, 12992, - 0xFB, 12995, - 0xFC, 12998, - 0xFD, 13001, - 0xFE, 13004, - 0xFF, 13021, - uint16(x86_xFail), - /*490*/ uint16(x86_xSetOp), uint16(x86_ADD), - /*492*/ uint16(x86_xReadSlashR), - /*493*/ uint16(x86_xArgRM8), - /*494*/ uint16(x86_xArgR8), - /*495*/ uint16(x86_xMatch), - /*496*/ uint16(x86_xCondIs64), 499, 515, - /*499*/ uint16(x86_xCondDataSize), 503, 509, 0, - /*503*/ uint16(x86_xSetOp), uint16(x86_ADD), - /*505*/ uint16(x86_xReadSlashR), - /*506*/ uint16(x86_xArgRM16), - /*507*/ uint16(x86_xArgR16), - /*508*/ uint16(x86_xMatch), - /*509*/ uint16(x86_xSetOp), uint16(x86_ADD), - /*511*/ uint16(x86_xReadSlashR), - /*512*/ uint16(x86_xArgRM32), - /*513*/ uint16(x86_xArgR32), - /*514*/ uint16(x86_xMatch), - /*515*/ uint16(x86_xCondDataSize), 503, 509, 519, - /*519*/ uint16(x86_xSetOp), uint16(x86_ADD), - /*521*/ uint16(x86_xReadSlashR), - /*522*/ uint16(x86_xArgRM64), - /*523*/ uint16(x86_xArgR64), - /*524*/ uint16(x86_xMatch), - /*525*/ uint16(x86_xSetOp), uint16(x86_ADD), - /*527*/ uint16(x86_xReadSlashR), - /*528*/ uint16(x86_xArgR8), - /*529*/ uint16(x86_xArgRM8), - /*530*/ uint16(x86_xMatch), - /*531*/ uint16(x86_xCondIs64), 534, 550, - /*534*/ uint16(x86_xCondDataSize), 538, 544, 0, - /*538*/ uint16(x86_xSetOp), uint16(x86_ADD), - /*540*/ uint16(x86_xReadSlashR), - /*541*/ uint16(x86_xArgR16), - /*542*/ uint16(x86_xArgRM16), - /*543*/ uint16(x86_xMatch), - /*544*/ uint16(x86_xSetOp), uint16(x86_ADD), - /*546*/ uint16(x86_xReadSlashR), - /*547*/ uint16(x86_xArgR32), - /*548*/ uint16(x86_xArgRM32), - /*549*/ uint16(x86_xMatch), - /*550*/ uint16(x86_xCondDataSize), 538, 544, 554, - /*554*/ uint16(x86_xSetOp), uint16(x86_ADD), - /*556*/ uint16(x86_xReadSlashR), - /*557*/ uint16(x86_xArgR64), - /*558*/ uint16(x86_xArgRM64), - /*559*/ uint16(x86_xMatch), - /*560*/ uint16(x86_xSetOp), uint16(x86_ADD), - /*562*/ uint16(x86_xReadIb), - /*563*/ uint16(x86_xArgAL), - /*564*/ uint16(x86_xArgImm8u), - /*565*/ uint16(x86_xMatch), - /*566*/ uint16(x86_xCondIs64), 569, 585, - /*569*/ uint16(x86_xCondDataSize), 573, 579, 0, - /*573*/ uint16(x86_xSetOp), uint16(x86_ADD), - /*575*/ uint16(x86_xReadIw), - /*576*/ uint16(x86_xArgAX), - /*577*/ uint16(x86_xArgImm16), - /*578*/ uint16(x86_xMatch), - /*579*/ uint16(x86_xSetOp), uint16(x86_ADD), - /*581*/ uint16(x86_xReadId), - /*582*/ uint16(x86_xArgEAX), - /*583*/ uint16(x86_xArgImm32), - /*584*/ uint16(x86_xMatch), - /*585*/ uint16(x86_xCondDataSize), 573, 579, 589, - /*589*/ uint16(x86_xSetOp), uint16(x86_ADD), - /*591*/ uint16(x86_xReadId), - /*592*/ uint16(x86_xArgRAX), - /*593*/ uint16(x86_xArgImm32), - /*594*/ uint16(x86_xMatch), - /*595*/ uint16(x86_xCondIs64), 598, 0, - /*598*/ uint16(x86_xSetOp), uint16(x86_PUSH), - /*600*/ uint16(x86_xArgES), - /*601*/ uint16(x86_xMatch), - /*602*/ uint16(x86_xCondIs64), 605, 0, - /*605*/ uint16(x86_xSetOp), uint16(x86_POP), - /*607*/ uint16(x86_xArgES), - /*608*/ uint16(x86_xMatch), - /*609*/ uint16(x86_xSetOp), uint16(x86_OR), - /*611*/ uint16(x86_xReadSlashR), - /*612*/ uint16(x86_xArgRM8), - /*613*/ uint16(x86_xArgR8), - /*614*/ uint16(x86_xMatch), - /*615*/ uint16(x86_xCondIs64), 618, 634, - /*618*/ uint16(x86_xCondDataSize), 622, 628, 0, - /*622*/ uint16(x86_xSetOp), uint16(x86_OR), - /*624*/ uint16(x86_xReadSlashR), - /*625*/ uint16(x86_xArgRM16), - /*626*/ uint16(x86_xArgR16), - /*627*/ uint16(x86_xMatch), - /*628*/ uint16(x86_xSetOp), uint16(x86_OR), - /*630*/ uint16(x86_xReadSlashR), - /*631*/ uint16(x86_xArgRM32), - /*632*/ uint16(x86_xArgR32), - /*633*/ uint16(x86_xMatch), - /*634*/ uint16(x86_xCondDataSize), 622, 628, 638, - /*638*/ uint16(x86_xSetOp), uint16(x86_OR), - /*640*/ uint16(x86_xReadSlashR), - /*641*/ uint16(x86_xArgRM64), - /*642*/ uint16(x86_xArgR64), - /*643*/ uint16(x86_xMatch), - /*644*/ uint16(x86_xSetOp), uint16(x86_OR), - /*646*/ uint16(x86_xReadSlashR), - /*647*/ uint16(x86_xArgR8), - /*648*/ uint16(x86_xArgRM8), - /*649*/ uint16(x86_xMatch), - /*650*/ uint16(x86_xCondIs64), 653, 669, - /*653*/ uint16(x86_xCondDataSize), 657, 663, 0, - /*657*/ uint16(x86_xSetOp), uint16(x86_OR), - /*659*/ uint16(x86_xReadSlashR), - /*660*/ uint16(x86_xArgR16), - /*661*/ uint16(x86_xArgRM16), - /*662*/ uint16(x86_xMatch), - /*663*/ uint16(x86_xSetOp), uint16(x86_OR), - /*665*/ uint16(x86_xReadSlashR), - /*666*/ uint16(x86_xArgR32), - /*667*/ uint16(x86_xArgRM32), - /*668*/ uint16(x86_xMatch), - /*669*/ uint16(x86_xCondDataSize), 657, 663, 673, - /*673*/ uint16(x86_xSetOp), uint16(x86_OR), - /*675*/ uint16(x86_xReadSlashR), - /*676*/ uint16(x86_xArgR64), - /*677*/ uint16(x86_xArgRM64), - /*678*/ uint16(x86_xMatch), - /*679*/ uint16(x86_xSetOp), uint16(x86_OR), - /*681*/ uint16(x86_xReadIb), - /*682*/ uint16(x86_xArgAL), - /*683*/ uint16(x86_xArgImm8u), - /*684*/ uint16(x86_xMatch), - /*685*/ uint16(x86_xCondIs64), 688, 704, - /*688*/ uint16(x86_xCondDataSize), 692, 698, 0, - /*692*/ uint16(x86_xSetOp), uint16(x86_OR), - /*694*/ uint16(x86_xReadIw), - /*695*/ uint16(x86_xArgAX), - /*696*/ uint16(x86_xArgImm16), - /*697*/ uint16(x86_xMatch), - /*698*/ uint16(x86_xSetOp), uint16(x86_OR), - /*700*/ uint16(x86_xReadId), - /*701*/ uint16(x86_xArgEAX), - /*702*/ uint16(x86_xArgImm32), - /*703*/ uint16(x86_xMatch), - /*704*/ uint16(x86_xCondDataSize), 692, 698, 708, - /*708*/ uint16(x86_xSetOp), uint16(x86_OR), - /*710*/ uint16(x86_xReadId), - /*711*/ uint16(x86_xArgRAX), - /*712*/ uint16(x86_xArgImm32), - /*713*/ uint16(x86_xMatch), - /*714*/ uint16(x86_xCondIs64), 717, 0, - /*717*/ uint16(x86_xSetOp), uint16(x86_PUSH), - /*719*/ uint16(x86_xArgCS), - /*720*/ uint16(x86_xMatch), - /*721*/ uint16(x86_xCondByte), 228, - 0x00, 1180, - 0x01, 1237, - 0x02, 1345, - 0x03, 1367, - 0x05, 1389, - 0x06, 1395, - 0x07, 1398, - 0x08, 1404, - 0x09, 1407, - 0x0B, 1410, - 0x0D, 1413, - 0x10, 1426, - 0x11, 1460, - 0x12, 1494, - 0x13, 1537, - 0x14, 1555, - 0x15, 1573, - 0x16, 1591, - 0x17, 1626, - 0x18, 1644, - 0x1F, 1669, - 0x20, 1690, - 0x21, 1705, - 0x22, 1720, - 0x23, 1735, - 0x24, 1750, - 0x26, 1765, - 0x28, 1780, - 0x29, 1798, - 0x2A, 1816, - 0x2B, 1903, - 0x2C, 1937, - 0x2D, 2024, - 0x2E, 2111, - 0x2F, 2129, - 0x30, 2147, - 0x31, 2150, - 0x32, 2153, - 0x33, 2156, - 0x34, 2159, - 0x35, 2162, - 0x38, 2172, - 0x3A, 3073, - 0x40, 3484, - 0x41, 3513, - 0x42, 3542, - 0x43, 3571, - 0x44, 3600, - 0x45, 3629, - 0x46, 3658, - 0x47, 3687, - 0x48, 3716, - 0x49, 3745, - 0x4A, 3774, - 0x4B, 3803, - 0x4C, 3832, - 0x4D, 3861, - 0x4E, 3890, - 0x4F, 3919, - 0x50, 3948, - 0x51, 3966, - 0x52, 4000, - 0x53, 4018, - 0x54, 4036, - 0x55, 4054, - 0x56, 4072, - 0x57, 4090, - 0x58, 4108, - 0x59, 4142, - 0x5A, 4176, - 0x5B, 4210, - 0x5C, 4236, - 0x5D, 4270, - 0x5E, 4304, - 0x5F, 4338, - 0x60, 4372, - 0x61, 4390, - 0x62, 4408, - 0x63, 4426, - 0x64, 4444, - 0x65, 4462, - 0x66, 4480, - 0x67, 4498, - 0x68, 4516, - 0x69, 4534, - 0x6A, 4552, - 0x6B, 4570, - 0x6C, 4588, - 0x6D, 4598, - 0x6E, 4608, - 0x6F, 4675, - 0x70, 4701, - 0x71, 4743, - 0x72, 4806, - 0x73, 4869, - 0x74, 4934, - 0x75, 4952, - 0x76, 4970, - 0x77, 4988, - 0x7C, 4991, - 0x7D, 5009, - 0x7E, 5027, - 0x7F, 5104, - 0x80, 5130, - 0x81, 5161, - 0x82, 5192, - 0x83, 5223, - 0x84, 5254, - 0x85, 5285, - 0x86, 5316, - 0x87, 5347, - 0x88, 5378, - 0x89, 5409, - 0x8A, 5440, - 0x8B, 5471, - 0x8C, 5502, - 0x8D, 5533, - 0x8E, 5564, - 0x8F, 5595, - 0x90, 5626, - 0x91, 5631, - 0x92, 5636, - 0x93, 5641, - 0x94, 5646, - 0x95, 5651, - 0x96, 5656, - 0x97, 5661, - 0x98, 5666, - 0x99, 5671, - 0x9A, 5676, - 0x9B, 5681, - 0x9C, 5686, - 0x9D, 5691, - 0x9E, 5696, - 0x9F, 5701, - 0xA0, 5706, - 0xA1, 5710, - 0xA2, 5737, - 0xA3, 5740, - 0xA4, 5769, - 0xA5, 5804, - 0xA8, 5836, - 0xA9, 5840, - 0xAA, 5867, - 0xAB, 5870, - 0xAC, 5899, - 0xAD, 5934, - 0xAE, 5966, - 0xAF, 6224, - 0xB0, 6253, - 0xB1, 6259, - 0xB2, 6288, - 0xB3, 6317, - 0xB4, 6346, - 0xB5, 6375, - 0xB6, 6404, - 0xB7, 6433, - 0xB8, 6462, - 0xB9, 6499, - 0xBA, 6502, - 0xBB, 6627, - 0xBC, 6656, - 0xBD, 6723, - 0xBE, 6790, - 0xBF, 6819, - 0xC0, 6848, - 0xC1, 6854, - 0xC2, 6883, - 0xC3, 6925, - 0xC4, 6954, - 0xC5, 6976, - 0xC6, 6998, - 0xC7, 7020, - 0xc8, 7149, - 0xc9, 7149, - 0xca, 7149, - 0xcb, 7149, - 0xcc, 7149, - 0xcd, 7149, - 0xce, 7149, - 0xcf, 7149, - 0xD0, 7172, - 0xD1, 7190, - 0xD2, 7208, - 0xD3, 7226, - 0xD4, 7244, - 0xD5, 7262, - 0xD6, 7280, - 0xD7, 7306, - 0xD8, 7324, - 0xD9, 7342, - 0xDA, 7360, - 0xDB, 7378, - 0xDC, 7396, - 0xDD, 7414, - 0xDE, 7432, - 0xDF, 7450, - 0xE0, 7468, - 0xE1, 7486, - 0xE2, 7504, - 0xE3, 7522, - 0xE4, 7540, - 0xE5, 7558, - 0xE6, 7576, - 0xE7, 7602, - 0xE8, 7620, - 0xE9, 7638, - 0xEA, 7656, - 0xEB, 7674, - 0xEC, 7692, - 0xED, 7710, - 0xEE, 7728, - 0xEF, 7746, - 0xF0, 7764, - 0xF1, 7774, - 0xF2, 7792, - 0xF3, 7810, - 0xF4, 7828, - 0xF5, 7846, - 0xF6, 7864, - 0xF7, 7882, - 0xF8, 7900, - 0xF9, 7918, - 0xFA, 7936, - 0xFB, 7954, - 0xFC, 7972, - 0xFD, 7990, - 0xFE, 8008, - uint16(x86_xFail), - /*1180*/ uint16(x86_xCondSlashR), - 1189, // 0 - 1205, // 1 - 1221, // 2 - 1225, // 3 - 1229, // 4 - 1233, // 5 - 0, // 6 - 0, // 7 - /*1189*/ uint16(x86_xCondDataSize), 1193, 1197, 1201, - /*1193*/ uint16(x86_xSetOp), uint16(x86_SLDT), - /*1195*/ uint16(x86_xArgRM16), - /*1196*/ uint16(x86_xMatch), - /*1197*/ uint16(x86_xSetOp), uint16(x86_SLDT), - /*1199*/ uint16(x86_xArgR32M16), - /*1200*/ uint16(x86_xMatch), - /*1201*/ uint16(x86_xSetOp), uint16(x86_SLDT), - /*1203*/ uint16(x86_xArgR64M16), - /*1204*/ uint16(x86_xMatch), - /*1205*/ uint16(x86_xCondDataSize), 1209, 1213, 1217, - /*1209*/ uint16(x86_xSetOp), uint16(x86_STR), - /*1211*/ uint16(x86_xArgRM16), - /*1212*/ uint16(x86_xMatch), - /*1213*/ uint16(x86_xSetOp), uint16(x86_STR), - /*1215*/ uint16(x86_xArgR32M16), - /*1216*/ uint16(x86_xMatch), - /*1217*/ uint16(x86_xSetOp), uint16(x86_STR), - /*1219*/ uint16(x86_xArgR64M16), - /*1220*/ uint16(x86_xMatch), - /*1221*/ uint16(x86_xSetOp), uint16(x86_LLDT), - /*1223*/ uint16(x86_xArgRM16), - /*1224*/ uint16(x86_xMatch), - /*1225*/ uint16(x86_xSetOp), uint16(x86_LTR), - /*1227*/ uint16(x86_xArgRM16), - /*1228*/ uint16(x86_xMatch), - /*1229*/ uint16(x86_xSetOp), uint16(x86_VERR), - /*1231*/ uint16(x86_xArgRM16), - /*1232*/ uint16(x86_xMatch), - /*1233*/ uint16(x86_xSetOp), uint16(x86_VERW), - /*1235*/ uint16(x86_xArgRM16), - /*1236*/ uint16(x86_xMatch), - /*1237*/ uint16(x86_xCondByte), 8, - 0xC8, 1318, - 0xC9, 1321, - 0xD0, 1324, - 0xD1, 1327, - 0xD5, 1330, - 0xD6, 1333, - 0xF8, 1336, - 0xF9, 1342, - /*1255*/ uint16(x86_xCondSlashR), - 1264, // 0 - 1268, // 1 - 1272, // 2 - 1283, // 3 - 1294, // 4 - 0, // 5 - 1310, // 6 - 1314, // 7 - /*1264*/ uint16(x86_xSetOp), uint16(x86_SGDT), - /*1266*/ uint16(x86_xArgM), - /*1267*/ uint16(x86_xMatch), - /*1268*/ uint16(x86_xSetOp), uint16(x86_SIDT), - /*1270*/ uint16(x86_xArgM), - /*1271*/ uint16(x86_xMatch), - /*1272*/ uint16(x86_xCondIs64), 1275, 1279, - /*1275*/ uint16(x86_xSetOp), uint16(x86_LGDT), - /*1277*/ uint16(x86_xArgM16and32), - /*1278*/ uint16(x86_xMatch), - /*1279*/ uint16(x86_xSetOp), uint16(x86_LGDT), - /*1281*/ uint16(x86_xArgM16and64), - /*1282*/ uint16(x86_xMatch), - /*1283*/ uint16(x86_xCondIs64), 1286, 1290, - /*1286*/ uint16(x86_xSetOp), uint16(x86_LIDT), - /*1288*/ uint16(x86_xArgM16and32), - /*1289*/ uint16(x86_xMatch), - /*1290*/ uint16(x86_xSetOp), uint16(x86_LIDT), - /*1292*/ uint16(x86_xArgM16and64), - /*1293*/ uint16(x86_xMatch), - /*1294*/ uint16(x86_xCondDataSize), 1298, 1302, 1306, - /*1298*/ uint16(x86_xSetOp), uint16(x86_SMSW), - /*1300*/ uint16(x86_xArgRM16), - /*1301*/ uint16(x86_xMatch), - /*1302*/ uint16(x86_xSetOp), uint16(x86_SMSW), - /*1304*/ uint16(x86_xArgR32M16), - /*1305*/ uint16(x86_xMatch), - /*1306*/ uint16(x86_xSetOp), uint16(x86_SMSW), - /*1308*/ uint16(x86_xArgR64M16), - /*1309*/ uint16(x86_xMatch), - /*1310*/ uint16(x86_xSetOp), uint16(x86_LMSW), - /*1312*/ uint16(x86_xArgRM16), - /*1313*/ uint16(x86_xMatch), - /*1314*/ uint16(x86_xSetOp), uint16(x86_INVLPG), - /*1316*/ uint16(x86_xArgM), - /*1317*/ uint16(x86_xMatch), - /*1318*/ uint16(x86_xSetOp), uint16(x86_MONITOR), - /*1320*/ uint16(x86_xMatch), - /*1321*/ uint16(x86_xSetOp), uint16(x86_MWAIT), - /*1323*/ uint16(x86_xMatch), - /*1324*/ uint16(x86_xSetOp), uint16(x86_XGETBV), - /*1326*/ uint16(x86_xMatch), - /*1327*/ uint16(x86_xSetOp), uint16(x86_XSETBV), - /*1329*/ uint16(x86_xMatch), - /*1330*/ uint16(x86_xSetOp), uint16(x86_XEND), - /*1332*/ uint16(x86_xMatch), - /*1333*/ uint16(x86_xSetOp), uint16(x86_XTEST), - /*1335*/ uint16(x86_xMatch), - /*1336*/ uint16(x86_xCondIs64), 0, 1339, - /*1339*/ uint16(x86_xSetOp), uint16(x86_SWAPGS), - /*1341*/ uint16(x86_xMatch), - /*1342*/ uint16(x86_xSetOp), uint16(x86_RDTSCP), - /*1344*/ uint16(x86_xMatch), - /*1345*/ uint16(x86_xCondDataSize), 1349, 1355, 1361, - /*1349*/ uint16(x86_xSetOp), uint16(x86_LAR), - /*1351*/ uint16(x86_xReadSlashR), - /*1352*/ uint16(x86_xArgR16), - /*1353*/ uint16(x86_xArgRM16), - /*1354*/ uint16(x86_xMatch), - /*1355*/ uint16(x86_xSetOp), uint16(x86_LAR), - /*1357*/ uint16(x86_xReadSlashR), - /*1358*/ uint16(x86_xArgR32), - /*1359*/ uint16(x86_xArgR32M16), - /*1360*/ uint16(x86_xMatch), - /*1361*/ uint16(x86_xSetOp), uint16(x86_LAR), - /*1363*/ uint16(x86_xReadSlashR), - /*1364*/ uint16(x86_xArgR64), - /*1365*/ uint16(x86_xArgR64M16), - /*1366*/ uint16(x86_xMatch), - /*1367*/ uint16(x86_xCondDataSize), 1371, 1377, 1383, - /*1371*/ uint16(x86_xSetOp), uint16(x86_LSL), - /*1373*/ uint16(x86_xReadSlashR), - /*1374*/ uint16(x86_xArgR16), - /*1375*/ uint16(x86_xArgRM16), - /*1376*/ uint16(x86_xMatch), - /*1377*/ uint16(x86_xSetOp), uint16(x86_LSL), - /*1379*/ uint16(x86_xReadSlashR), - /*1380*/ uint16(x86_xArgR32), - /*1381*/ uint16(x86_xArgR32M16), - /*1382*/ uint16(x86_xMatch), - /*1383*/ uint16(x86_xSetOp), uint16(x86_LSL), - /*1385*/ uint16(x86_xReadSlashR), - /*1386*/ uint16(x86_xArgR64), - /*1387*/ uint16(x86_xArgR32M16), - /*1388*/ uint16(x86_xMatch), - /*1389*/ uint16(x86_xCondIs64), 0, 1392, - /*1392*/ uint16(x86_xSetOp), uint16(x86_SYSCALL), - /*1394*/ uint16(x86_xMatch), - /*1395*/ uint16(x86_xSetOp), uint16(x86_CLTS), - /*1397*/ uint16(x86_xMatch), - /*1398*/ uint16(x86_xCondIs64), 0, 1401, - /*1401*/ uint16(x86_xSetOp), uint16(x86_SYSRET), - /*1403*/ uint16(x86_xMatch), - /*1404*/ uint16(x86_xSetOp), uint16(x86_INVD), - /*1406*/ uint16(x86_xMatch), - /*1407*/ uint16(x86_xSetOp), uint16(x86_WBINVD), - /*1409*/ uint16(x86_xMatch), - /*1410*/ uint16(x86_xSetOp), uint16(x86_UD2), - /*1412*/ uint16(x86_xMatch), - /*1413*/ uint16(x86_xCondSlashR), - 0, // 0 - 1422, // 1 - 0, // 2 - 0, // 3 - 0, // 4 - 0, // 5 - 0, // 6 - 0, // 7 - /*1422*/ uint16(x86_xSetOp), uint16(x86_PREFETCHW), - /*1424*/ uint16(x86_xArgM8), - /*1425*/ uint16(x86_xMatch), - /*1426*/ uint16(x86_xCondPrefix), 4, - 0xF3, 1454, - 0xF2, 1448, - 0x66, 1442, - 0x0, 1436, - /*1436*/ uint16(x86_xSetOp), uint16(x86_MOVUPS), - /*1438*/ uint16(x86_xReadSlashR), - /*1439*/ uint16(x86_xArgXmm1), - /*1440*/ uint16(x86_xArgXmm2M128), - /*1441*/ uint16(x86_xMatch), - /*1442*/ uint16(x86_xSetOp), uint16(x86_MOVUPD), - /*1444*/ uint16(x86_xReadSlashR), - /*1445*/ uint16(x86_xArgXmm1), - /*1446*/ uint16(x86_xArgXmm2M128), - /*1447*/ uint16(x86_xMatch), - /*1448*/ uint16(x86_xSetOp), uint16(x86_MOVSD_XMM), - /*1450*/ uint16(x86_xReadSlashR), - /*1451*/ uint16(x86_xArgXmm1), - /*1452*/ uint16(x86_xArgXmm2M64), - /*1453*/ uint16(x86_xMatch), - /*1454*/ uint16(x86_xSetOp), uint16(x86_MOVSS), - /*1456*/ uint16(x86_xReadSlashR), - /*1457*/ uint16(x86_xArgXmm1), - /*1458*/ uint16(x86_xArgXmm2M32), - /*1459*/ uint16(x86_xMatch), - /*1460*/ uint16(x86_xCondPrefix), 4, - 0xF3, 1488, - 0xF2, 1482, - 0x66, 1476, - 0x0, 1470, - /*1470*/ uint16(x86_xSetOp), uint16(x86_MOVUPS), - /*1472*/ uint16(x86_xReadSlashR), - /*1473*/ uint16(x86_xArgXmm2M128), - /*1474*/ uint16(x86_xArgXmm1), - /*1475*/ uint16(x86_xMatch), - /*1476*/ uint16(x86_xSetOp), uint16(x86_MOVUPD), - /*1478*/ uint16(x86_xReadSlashR), - /*1479*/ uint16(x86_xArgXmm2M128), - /*1480*/ uint16(x86_xArgXmm), - /*1481*/ uint16(x86_xMatch), - /*1482*/ uint16(x86_xSetOp), uint16(x86_MOVSD_XMM), - /*1484*/ uint16(x86_xReadSlashR), - /*1485*/ uint16(x86_xArgXmm2M64), - /*1486*/ uint16(x86_xArgXmm1), - /*1487*/ uint16(x86_xMatch), - /*1488*/ uint16(x86_xSetOp), uint16(x86_MOVSS), - /*1490*/ uint16(x86_xReadSlashR), - /*1491*/ uint16(x86_xArgXmm2M32), - /*1492*/ uint16(x86_xArgXmm), - /*1493*/ uint16(x86_xMatch), - /*1494*/ uint16(x86_xCondPrefix), 4, - 0xF3, 1531, - 0xF2, 1525, - 0x66, 1519, - 0x0, 1504, - /*1504*/ uint16(x86_xCondIsMem), 1507, 1513, - /*1507*/ uint16(x86_xSetOp), uint16(x86_MOVHLPS), - /*1509*/ uint16(x86_xReadSlashR), - /*1510*/ uint16(x86_xArgXmm1), - /*1511*/ uint16(x86_xArgXmm2), - /*1512*/ uint16(x86_xMatch), - /*1513*/ uint16(x86_xSetOp), uint16(x86_MOVLPS), - /*1515*/ uint16(x86_xReadSlashR), - /*1516*/ uint16(x86_xArgXmm), - /*1517*/ uint16(x86_xArgM64), - /*1518*/ uint16(x86_xMatch), - /*1519*/ uint16(x86_xSetOp), uint16(x86_MOVLPD), - /*1521*/ uint16(x86_xReadSlashR), - /*1522*/ uint16(x86_xArgXmm), - /*1523*/ uint16(x86_xArgXmm2M64), - /*1524*/ uint16(x86_xMatch), - /*1525*/ uint16(x86_xSetOp), uint16(x86_MOVDDUP), - /*1527*/ uint16(x86_xReadSlashR), - /*1528*/ uint16(x86_xArgXmm1), - /*1529*/ uint16(x86_xArgXmm2M64), - /*1530*/ uint16(x86_xMatch), - /*1531*/ uint16(x86_xSetOp), uint16(x86_MOVSLDUP), - /*1533*/ uint16(x86_xReadSlashR), - /*1534*/ uint16(x86_xArgXmm1), - /*1535*/ uint16(x86_xArgXmm2M128), - /*1536*/ uint16(x86_xMatch), - /*1537*/ uint16(x86_xCondPrefix), 2, - 0x66, 1549, - 0x0, 1543, - /*1543*/ uint16(x86_xSetOp), uint16(x86_MOVLPS), - /*1545*/ uint16(x86_xReadSlashR), - /*1546*/ uint16(x86_xArgM64), - /*1547*/ uint16(x86_xArgXmm), - /*1548*/ uint16(x86_xMatch), - /*1549*/ uint16(x86_xSetOp), uint16(x86_MOVLPD), - /*1551*/ uint16(x86_xReadSlashR), - /*1552*/ uint16(x86_xArgXmm2M64), - /*1553*/ uint16(x86_xArgXmm), - /*1554*/ uint16(x86_xMatch), - /*1555*/ uint16(x86_xCondPrefix), 2, - 0x66, 1567, - 0x0, 1561, - /*1561*/ uint16(x86_xSetOp), uint16(x86_UNPCKLPS), - /*1563*/ uint16(x86_xReadSlashR), - /*1564*/ uint16(x86_xArgXmm1), - /*1565*/ uint16(x86_xArgXmm2M128), - /*1566*/ uint16(x86_xMatch), - /*1567*/ uint16(x86_xSetOp), uint16(x86_UNPCKLPD), - /*1569*/ uint16(x86_xReadSlashR), - /*1570*/ uint16(x86_xArgXmm1), - /*1571*/ uint16(x86_xArgXmm2M128), - /*1572*/ uint16(x86_xMatch), - /*1573*/ uint16(x86_xCondPrefix), 2, - 0x66, 1585, - 0x0, 1579, - /*1579*/ uint16(x86_xSetOp), uint16(x86_UNPCKHPS), - /*1581*/ uint16(x86_xReadSlashR), - /*1582*/ uint16(x86_xArgXmm1), - /*1583*/ uint16(x86_xArgXmm2M128), - /*1584*/ uint16(x86_xMatch), - /*1585*/ uint16(x86_xSetOp), uint16(x86_UNPCKHPD), - /*1587*/ uint16(x86_xReadSlashR), - /*1588*/ uint16(x86_xArgXmm1), - /*1589*/ uint16(x86_xArgXmm2M128), - /*1590*/ uint16(x86_xMatch), - /*1591*/ uint16(x86_xCondPrefix), 3, - 0xF3, 1620, - 0x66, 1614, - 0x0, 1599, - /*1599*/ uint16(x86_xCondIsMem), 1602, 1608, - /*1602*/ uint16(x86_xSetOp), uint16(x86_MOVLHPS), - /*1604*/ uint16(x86_xReadSlashR), - /*1605*/ uint16(x86_xArgXmm1), - /*1606*/ uint16(x86_xArgXmm2), - /*1607*/ uint16(x86_xMatch), - /*1608*/ uint16(x86_xSetOp), uint16(x86_MOVHPS), - /*1610*/ uint16(x86_xReadSlashR), - /*1611*/ uint16(x86_xArgXmm), - /*1612*/ uint16(x86_xArgM64), - /*1613*/ uint16(x86_xMatch), - /*1614*/ uint16(x86_xSetOp), uint16(x86_MOVHPD), - /*1616*/ uint16(x86_xReadSlashR), - /*1617*/ uint16(x86_xArgXmm), - /*1618*/ uint16(x86_xArgXmm2M64), - /*1619*/ uint16(x86_xMatch), - /*1620*/ uint16(x86_xSetOp), uint16(x86_MOVSHDUP), - /*1622*/ uint16(x86_xReadSlashR), - /*1623*/ uint16(x86_xArgXmm1), - /*1624*/ uint16(x86_xArgXmm2M128), - /*1625*/ uint16(x86_xMatch), - /*1626*/ uint16(x86_xCondPrefix), 2, - 0x66, 1638, - 0x0, 1632, - /*1632*/ uint16(x86_xSetOp), uint16(x86_MOVHPS), - /*1634*/ uint16(x86_xReadSlashR), - /*1635*/ uint16(x86_xArgM64), - /*1636*/ uint16(x86_xArgXmm), - /*1637*/ uint16(x86_xMatch), - /*1638*/ uint16(x86_xSetOp), uint16(x86_MOVHPD), - /*1640*/ uint16(x86_xReadSlashR), - /*1641*/ uint16(x86_xArgXmm2M64), - /*1642*/ uint16(x86_xArgXmm), - /*1643*/ uint16(x86_xMatch), - /*1644*/ uint16(x86_xCondSlashR), - 1653, // 0 - 1657, // 1 - 1661, // 2 - 1665, // 3 - 0, // 4 - 0, // 5 - 0, // 6 - 0, // 7 - /*1653*/ uint16(x86_xSetOp), uint16(x86_PREFETCHNTA), - /*1655*/ uint16(x86_xArgM8), - /*1656*/ uint16(x86_xMatch), - /*1657*/ uint16(x86_xSetOp), uint16(x86_PREFETCHT0), - /*1659*/ uint16(x86_xArgM8), - /*1660*/ uint16(x86_xMatch), - /*1661*/ uint16(x86_xSetOp), uint16(x86_PREFETCHT1), - /*1663*/ uint16(x86_xArgM8), - /*1664*/ uint16(x86_xMatch), - /*1665*/ uint16(x86_xSetOp), uint16(x86_PREFETCHT2), - /*1667*/ uint16(x86_xArgM8), - /*1668*/ uint16(x86_xMatch), - /*1669*/ uint16(x86_xCondSlashR), - 1678, // 0 - 0, // 1 - 0, // 2 - 0, // 3 - 0, // 4 - 0, // 5 - 0, // 6 - 0, // 7 - /*1678*/ uint16(x86_xCondDataSize), 1682, 1686, 0, - /*1682*/ uint16(x86_xSetOp), uint16(x86_NOP), - /*1684*/ uint16(x86_xArgRM16), - /*1685*/ uint16(x86_xMatch), - /*1686*/ uint16(x86_xSetOp), uint16(x86_NOP), - /*1688*/ uint16(x86_xArgRM32), - /*1689*/ uint16(x86_xMatch), - /*1690*/ uint16(x86_xCondIs64), 1693, 1699, - /*1693*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*1695*/ uint16(x86_xReadSlashR), - /*1696*/ uint16(x86_xArgRmf32), - /*1697*/ uint16(x86_xArgCR0dashCR7), - /*1698*/ uint16(x86_xMatch), - /*1699*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*1701*/ uint16(x86_xReadSlashR), - /*1702*/ uint16(x86_xArgRmf64), - /*1703*/ uint16(x86_xArgCR0dashCR7), - /*1704*/ uint16(x86_xMatch), - /*1705*/ uint16(x86_xCondIs64), 1708, 1714, - /*1708*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*1710*/ uint16(x86_xReadSlashR), - /*1711*/ uint16(x86_xArgRmf32), - /*1712*/ uint16(x86_xArgDR0dashDR7), - /*1713*/ uint16(x86_xMatch), - /*1714*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*1716*/ uint16(x86_xReadSlashR), - /*1717*/ uint16(x86_xArgRmf64), - /*1718*/ uint16(x86_xArgDR0dashDR7), - /*1719*/ uint16(x86_xMatch), - /*1720*/ uint16(x86_xCondIs64), 1723, 1729, - /*1723*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*1725*/ uint16(x86_xReadSlashR), - /*1726*/ uint16(x86_xArgCR0dashCR7), - /*1727*/ uint16(x86_xArgRmf32), - /*1728*/ uint16(x86_xMatch), - /*1729*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*1731*/ uint16(x86_xReadSlashR), - /*1732*/ uint16(x86_xArgCR0dashCR7), - /*1733*/ uint16(x86_xArgRmf64), - /*1734*/ uint16(x86_xMatch), - /*1735*/ uint16(x86_xCondIs64), 1738, 1744, - /*1738*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*1740*/ uint16(x86_xReadSlashR), - /*1741*/ uint16(x86_xArgDR0dashDR7), - /*1742*/ uint16(x86_xArgRmf32), - /*1743*/ uint16(x86_xMatch), - /*1744*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*1746*/ uint16(x86_xReadSlashR), - /*1747*/ uint16(x86_xArgDR0dashDR7), - /*1748*/ uint16(x86_xArgRmf64), - /*1749*/ uint16(x86_xMatch), - /*1750*/ uint16(x86_xCondIs64), 1753, 1759, - /*1753*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*1755*/ uint16(x86_xReadSlashR), - /*1756*/ uint16(x86_xArgRmf32), - /*1757*/ uint16(x86_xArgTR0dashTR7), - /*1758*/ uint16(x86_xMatch), - /*1759*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*1761*/ uint16(x86_xReadSlashR), - /*1762*/ uint16(x86_xArgRmf64), - /*1763*/ uint16(x86_xArgTR0dashTR7), - /*1764*/ uint16(x86_xMatch), - /*1765*/ uint16(x86_xCondIs64), 1768, 1774, - /*1768*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*1770*/ uint16(x86_xReadSlashR), - /*1771*/ uint16(x86_xArgTR0dashTR7), - /*1772*/ uint16(x86_xArgRmf32), - /*1773*/ uint16(x86_xMatch), - /*1774*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*1776*/ uint16(x86_xReadSlashR), - /*1777*/ uint16(x86_xArgTR0dashTR7), - /*1778*/ uint16(x86_xArgRmf64), - /*1779*/ uint16(x86_xMatch), - /*1780*/ uint16(x86_xCondPrefix), 2, - 0x66, 1792, - 0x0, 1786, - /*1786*/ uint16(x86_xSetOp), uint16(x86_MOVAPS), - /*1788*/ uint16(x86_xReadSlashR), - /*1789*/ uint16(x86_xArgXmm1), - /*1790*/ uint16(x86_xArgXmm2M128), - /*1791*/ uint16(x86_xMatch), - /*1792*/ uint16(x86_xSetOp), uint16(x86_MOVAPD), - /*1794*/ uint16(x86_xReadSlashR), - /*1795*/ uint16(x86_xArgXmm1), - /*1796*/ uint16(x86_xArgXmm2M128), - /*1797*/ uint16(x86_xMatch), - /*1798*/ uint16(x86_xCondPrefix), 2, - 0x66, 1810, - 0x0, 1804, - /*1804*/ uint16(x86_xSetOp), uint16(x86_MOVAPS), - /*1806*/ uint16(x86_xReadSlashR), - /*1807*/ uint16(x86_xArgXmm2M128), - /*1808*/ uint16(x86_xArgXmm1), - /*1809*/ uint16(x86_xMatch), - /*1810*/ uint16(x86_xSetOp), uint16(x86_MOVAPD), - /*1812*/ uint16(x86_xReadSlashR), - /*1813*/ uint16(x86_xArgXmm2M128), - /*1814*/ uint16(x86_xArgXmm1), - /*1815*/ uint16(x86_xMatch), - /*1816*/ uint16(x86_xCondIs64), 1819, 1873, - /*1819*/ uint16(x86_xCondPrefix), 4, - 0xF3, 1857, - 0xF2, 1841, - 0x66, 1835, - 0x0, 1829, - /*1829*/ uint16(x86_xSetOp), uint16(x86_CVTPI2PS), - /*1831*/ uint16(x86_xReadSlashR), - /*1832*/ uint16(x86_xArgXmm), - /*1833*/ uint16(x86_xArgMmM64), - /*1834*/ uint16(x86_xMatch), - /*1835*/ uint16(x86_xSetOp), uint16(x86_CVTPI2PD), - /*1837*/ uint16(x86_xReadSlashR), - /*1838*/ uint16(x86_xArgXmm), - /*1839*/ uint16(x86_xArgMmM64), - /*1840*/ uint16(x86_xMatch), - /*1841*/ uint16(x86_xCondDataSize), 1845, 1851, 0, - /*1845*/ uint16(x86_xSetOp), uint16(x86_CVTSI2SD), - /*1847*/ uint16(x86_xReadSlashR), - /*1848*/ uint16(x86_xArgXmm), - /*1849*/ uint16(x86_xArgRM32), - /*1850*/ uint16(x86_xMatch), - /*1851*/ uint16(x86_xSetOp), uint16(x86_CVTSI2SD), - /*1853*/ uint16(x86_xReadSlashR), - /*1854*/ uint16(x86_xArgXmm), - /*1855*/ uint16(x86_xArgRM32), - /*1856*/ uint16(x86_xMatch), - /*1857*/ uint16(x86_xCondDataSize), 1861, 1867, 0, - /*1861*/ uint16(x86_xSetOp), uint16(x86_CVTSI2SS), - /*1863*/ uint16(x86_xReadSlashR), - /*1864*/ uint16(x86_xArgXmm), - /*1865*/ uint16(x86_xArgRM32), - /*1866*/ uint16(x86_xMatch), - /*1867*/ uint16(x86_xSetOp), uint16(x86_CVTSI2SS), - /*1869*/ uint16(x86_xReadSlashR), - /*1870*/ uint16(x86_xArgXmm), - /*1871*/ uint16(x86_xArgRM32), - /*1872*/ uint16(x86_xMatch), - /*1873*/ uint16(x86_xCondPrefix), 4, - 0xF3, 1893, - 0xF2, 1883, - 0x66, 1835, - 0x0, 1829, - /*1883*/ uint16(x86_xCondDataSize), 1845, 1851, 1887, - /*1887*/ uint16(x86_xSetOp), uint16(x86_CVTSI2SD), - /*1889*/ uint16(x86_xReadSlashR), - /*1890*/ uint16(x86_xArgXmm), - /*1891*/ uint16(x86_xArgRM64), - /*1892*/ uint16(x86_xMatch), - /*1893*/ uint16(x86_xCondDataSize), 1861, 1867, 1897, - /*1897*/ uint16(x86_xSetOp), uint16(x86_CVTSI2SS), - /*1899*/ uint16(x86_xReadSlashR), - /*1900*/ uint16(x86_xArgXmm), - /*1901*/ uint16(x86_xArgRM64), - /*1902*/ uint16(x86_xMatch), - /*1903*/ uint16(x86_xCondPrefix), 4, - 0xF3, 1931, - 0xF2, 1925, - 0x66, 1919, - 0x0, 1913, - /*1913*/ uint16(x86_xSetOp), uint16(x86_MOVNTPS), - /*1915*/ uint16(x86_xReadSlashR), - /*1916*/ uint16(x86_xArgM128), - /*1917*/ uint16(x86_xArgXmm), - /*1918*/ uint16(x86_xMatch), - /*1919*/ uint16(x86_xSetOp), uint16(x86_MOVNTPD), - /*1921*/ uint16(x86_xReadSlashR), - /*1922*/ uint16(x86_xArgM128), - /*1923*/ uint16(x86_xArgXmm), - /*1924*/ uint16(x86_xMatch), - /*1925*/ uint16(x86_xSetOp), uint16(x86_MOVNTSD), - /*1927*/ uint16(x86_xReadSlashR), - /*1928*/ uint16(x86_xArgM64), - /*1929*/ uint16(x86_xArgXmm), - /*1930*/ uint16(x86_xMatch), - /*1931*/ uint16(x86_xSetOp), uint16(x86_MOVNTSS), - /*1933*/ uint16(x86_xReadSlashR), - /*1934*/ uint16(x86_xArgM32), - /*1935*/ uint16(x86_xArgXmm), - /*1936*/ uint16(x86_xMatch), - /*1937*/ uint16(x86_xCondIs64), 1940, 1994, - /*1940*/ uint16(x86_xCondPrefix), 4, - 0xF3, 1978, - 0xF2, 1962, - 0x66, 1956, - 0x0, 1950, - /*1950*/ uint16(x86_xSetOp), uint16(x86_CVTTPS2PI), - /*1952*/ uint16(x86_xReadSlashR), - /*1953*/ uint16(x86_xArgMm), - /*1954*/ uint16(x86_xArgXmmM64), - /*1955*/ uint16(x86_xMatch), - /*1956*/ uint16(x86_xSetOp), uint16(x86_CVTTPD2PI), - /*1958*/ uint16(x86_xReadSlashR), - /*1959*/ uint16(x86_xArgMm), - /*1960*/ uint16(x86_xArgXmmM128), - /*1961*/ uint16(x86_xMatch), - /*1962*/ uint16(x86_xCondDataSize), 1966, 1972, 0, - /*1966*/ uint16(x86_xSetOp), uint16(x86_CVTTSD2SI), - /*1968*/ uint16(x86_xReadSlashR), - /*1969*/ uint16(x86_xArgR32), - /*1970*/ uint16(x86_xArgXmmM64), - /*1971*/ uint16(x86_xMatch), - /*1972*/ uint16(x86_xSetOp), uint16(x86_CVTTSD2SI), - /*1974*/ uint16(x86_xReadSlashR), - /*1975*/ uint16(x86_xArgR32), - /*1976*/ uint16(x86_xArgXmmM64), - /*1977*/ uint16(x86_xMatch), - /*1978*/ uint16(x86_xCondDataSize), 1982, 1988, 0, - /*1982*/ uint16(x86_xSetOp), uint16(x86_CVTTSS2SI), - /*1984*/ uint16(x86_xReadSlashR), - /*1985*/ uint16(x86_xArgR32), - /*1986*/ uint16(x86_xArgXmmM32), - /*1987*/ uint16(x86_xMatch), - /*1988*/ uint16(x86_xSetOp), uint16(x86_CVTTSS2SI), - /*1990*/ uint16(x86_xReadSlashR), - /*1991*/ uint16(x86_xArgR32), - /*1992*/ uint16(x86_xArgXmmM32), - /*1993*/ uint16(x86_xMatch), - /*1994*/ uint16(x86_xCondPrefix), 4, - 0xF3, 2014, - 0xF2, 2004, - 0x66, 1956, - 0x0, 1950, - /*2004*/ uint16(x86_xCondDataSize), 1966, 1972, 2008, - /*2008*/ uint16(x86_xSetOp), uint16(x86_CVTTSD2SI), - /*2010*/ uint16(x86_xReadSlashR), - /*2011*/ uint16(x86_xArgR64), - /*2012*/ uint16(x86_xArgXmmM64), - /*2013*/ uint16(x86_xMatch), - /*2014*/ uint16(x86_xCondDataSize), 1982, 1988, 2018, - /*2018*/ uint16(x86_xSetOp), uint16(x86_CVTTSS2SI), - /*2020*/ uint16(x86_xReadSlashR), - /*2021*/ uint16(x86_xArgR64), - /*2022*/ uint16(x86_xArgXmmM32), - /*2023*/ uint16(x86_xMatch), - /*2024*/ uint16(x86_xCondIs64), 2027, 2081, - /*2027*/ uint16(x86_xCondPrefix), 4, - 0xF3, 2065, - 0xF2, 2049, - 0x66, 2043, - 0x0, 2037, - /*2037*/ uint16(x86_xSetOp), uint16(x86_CVTPS2PI), - /*2039*/ uint16(x86_xReadSlashR), - /*2040*/ uint16(x86_xArgMm), - /*2041*/ uint16(x86_xArgXmmM64), - /*2042*/ uint16(x86_xMatch), - /*2043*/ uint16(x86_xSetOp), uint16(x86_CVTPD2PI), - /*2045*/ uint16(x86_xReadSlashR), - /*2046*/ uint16(x86_xArgMm), - /*2047*/ uint16(x86_xArgXmmM128), - /*2048*/ uint16(x86_xMatch), - /*2049*/ uint16(x86_xCondDataSize), 2053, 2059, 0, - /*2053*/ uint16(x86_xSetOp), uint16(x86_CVTSD2SI), - /*2055*/ uint16(x86_xReadSlashR), - /*2056*/ uint16(x86_xArgR32), - /*2057*/ uint16(x86_xArgXmmM64), - /*2058*/ uint16(x86_xMatch), - /*2059*/ uint16(x86_xSetOp), uint16(x86_CVTSD2SI), - /*2061*/ uint16(x86_xReadSlashR), - /*2062*/ uint16(x86_xArgR32), - /*2063*/ uint16(x86_xArgXmmM64), - /*2064*/ uint16(x86_xMatch), - /*2065*/ uint16(x86_xCondDataSize), 2069, 2075, 0, - /*2069*/ uint16(x86_xSetOp), uint16(x86_CVTSS2SI), - /*2071*/ uint16(x86_xReadSlashR), - /*2072*/ uint16(x86_xArgR32), - /*2073*/ uint16(x86_xArgXmmM32), - /*2074*/ uint16(x86_xMatch), - /*2075*/ uint16(x86_xSetOp), uint16(x86_CVTSS2SI), - /*2077*/ uint16(x86_xReadSlashR), - /*2078*/ uint16(x86_xArgR32), - /*2079*/ uint16(x86_xArgXmmM32), - /*2080*/ uint16(x86_xMatch), - /*2081*/ uint16(x86_xCondPrefix), 4, - 0xF3, 2101, - 0xF2, 2091, - 0x66, 2043, - 0x0, 2037, - /*2091*/ uint16(x86_xCondDataSize), 2053, 2059, 2095, - /*2095*/ uint16(x86_xSetOp), uint16(x86_CVTSD2SI), - /*2097*/ uint16(x86_xReadSlashR), - /*2098*/ uint16(x86_xArgR64), - /*2099*/ uint16(x86_xArgXmmM64), - /*2100*/ uint16(x86_xMatch), - /*2101*/ uint16(x86_xCondDataSize), 2069, 2075, 2105, - /*2105*/ uint16(x86_xSetOp), uint16(x86_CVTSS2SI), - /*2107*/ uint16(x86_xReadSlashR), - /*2108*/ uint16(x86_xArgR64), - /*2109*/ uint16(x86_xArgXmmM32), - /*2110*/ uint16(x86_xMatch), - /*2111*/ uint16(x86_xCondPrefix), 2, - 0x66, 2123, - 0x0, 2117, - /*2117*/ uint16(x86_xSetOp), uint16(x86_UCOMISS), - /*2119*/ uint16(x86_xReadSlashR), - /*2120*/ uint16(x86_xArgXmm1), - /*2121*/ uint16(x86_xArgXmm2M32), - /*2122*/ uint16(x86_xMatch), - /*2123*/ uint16(x86_xSetOp), uint16(x86_UCOMISD), - /*2125*/ uint16(x86_xReadSlashR), - /*2126*/ uint16(x86_xArgXmm1), - /*2127*/ uint16(x86_xArgXmm2M64), - /*2128*/ uint16(x86_xMatch), - /*2129*/ uint16(x86_xCondPrefix), 2, - 0x66, 2141, - 0x0, 2135, - /*2135*/ uint16(x86_xSetOp), uint16(x86_COMISS), - /*2137*/ uint16(x86_xReadSlashR), - /*2138*/ uint16(x86_xArgXmm1), - /*2139*/ uint16(x86_xArgXmm2M32), - /*2140*/ uint16(x86_xMatch), - /*2141*/ uint16(x86_xSetOp), uint16(x86_COMISD), - /*2143*/ uint16(x86_xReadSlashR), - /*2144*/ uint16(x86_xArgXmm1), - /*2145*/ uint16(x86_xArgXmm2M64), - /*2146*/ uint16(x86_xMatch), - /*2147*/ uint16(x86_xSetOp), uint16(x86_WRMSR), - /*2149*/ uint16(x86_xMatch), - /*2150*/ uint16(x86_xSetOp), uint16(x86_RDTSC), - /*2152*/ uint16(x86_xMatch), - /*2153*/ uint16(x86_xSetOp), uint16(x86_RDMSR), - /*2155*/ uint16(x86_xMatch), - /*2156*/ uint16(x86_xSetOp), uint16(x86_RDPMC), - /*2158*/ uint16(x86_xMatch), - /*2159*/ uint16(x86_xSetOp), uint16(x86_SYSENTER), - /*2161*/ uint16(x86_xMatch), - /*2162*/ uint16(x86_xCondDataSize), 2166, 2166, 2169, - /*2166*/ uint16(x86_xSetOp), uint16(x86_SYSEXIT), - /*2168*/ uint16(x86_xMatch), - /*2169*/ uint16(x86_xSetOp), uint16(x86_SYSEXIT), - /*2171*/ uint16(x86_xMatch), - /*2172*/ uint16(x86_xCondByte), 54, - 0x00, 2283, - 0x01, 2301, - 0x02, 2319, - 0x03, 2337, - 0x04, 2355, - 0x05, 2373, - 0x06, 2391, - 0x07, 2409, - 0x08, 2427, - 0x09, 2445, - 0x0A, 2463, - 0x0B, 2481, - 0x10, 2499, - 0x14, 2510, - 0x15, 2521, - 0x17, 2532, - 0x1C, 2542, - 0x1D, 2560, - 0x1E, 2578, - 0x20, 2596, - 0x21, 2606, - 0x22, 2616, - 0x23, 2626, - 0x24, 2636, - 0x25, 2646, - 0x28, 2656, - 0x29, 2666, - 0x2A, 2676, - 0x2B, 2686, - 0x30, 2696, - 0x31, 2706, - 0x32, 2716, - 0x33, 2726, - 0x34, 2736, - 0x35, 2746, - 0x37, 2756, - 0x38, 2766, - 0x39, 2776, - 0x3A, 2786, - 0x3B, 2796, - 0x3C, 2806, - 0x3D, 2816, - 0x3E, 2826, - 0x3F, 2836, - 0x40, 2846, - 0x41, 2856, - 0x82, 2866, - 0xDB, 2889, - 0xDC, 2899, - 0xDD, 2909, - 0xDE, 2919, - 0xDF, 2929, - 0xF0, 2939, - 0xF1, 3006, - uint16(x86_xFail), - /*2283*/ uint16(x86_xCondPrefix), 2, - 0x66, 2295, - 0x0, 2289, - /*2289*/ uint16(x86_xSetOp), uint16(x86_PSHUFB), - /*2291*/ uint16(x86_xReadSlashR), - /*2292*/ uint16(x86_xArgMm1), - /*2293*/ uint16(x86_xArgMm2M64), - /*2294*/ uint16(x86_xMatch), - /*2295*/ uint16(x86_xSetOp), uint16(x86_PSHUFB), - /*2297*/ uint16(x86_xReadSlashR), - /*2298*/ uint16(x86_xArgXmm1), - /*2299*/ uint16(x86_xArgXmm2M128), - /*2300*/ uint16(x86_xMatch), - /*2301*/ uint16(x86_xCondPrefix), 2, - 0x66, 2313, - 0x0, 2307, - /*2307*/ uint16(x86_xSetOp), uint16(x86_PHADDW), - /*2309*/ uint16(x86_xReadSlashR), - /*2310*/ uint16(x86_xArgMm1), - /*2311*/ uint16(x86_xArgMm2M64), - /*2312*/ uint16(x86_xMatch), - /*2313*/ uint16(x86_xSetOp), uint16(x86_PHADDW), - /*2315*/ uint16(x86_xReadSlashR), - /*2316*/ uint16(x86_xArgXmm1), - /*2317*/ uint16(x86_xArgXmm2M128), - /*2318*/ uint16(x86_xMatch), - /*2319*/ uint16(x86_xCondPrefix), 2, - 0x66, 2331, - 0x0, 2325, - /*2325*/ uint16(x86_xSetOp), uint16(x86_PHADDD), - /*2327*/ uint16(x86_xReadSlashR), - /*2328*/ uint16(x86_xArgMm1), - /*2329*/ uint16(x86_xArgMm2M64), - /*2330*/ uint16(x86_xMatch), - /*2331*/ uint16(x86_xSetOp), uint16(x86_PHADDD), - /*2333*/ uint16(x86_xReadSlashR), - /*2334*/ uint16(x86_xArgXmm1), - /*2335*/ uint16(x86_xArgXmm2M128), - /*2336*/ uint16(x86_xMatch), - /*2337*/ uint16(x86_xCondPrefix), 2, - 0x66, 2349, - 0x0, 2343, - /*2343*/ uint16(x86_xSetOp), uint16(x86_PHADDSW), - /*2345*/ uint16(x86_xReadSlashR), - /*2346*/ uint16(x86_xArgMm1), - /*2347*/ uint16(x86_xArgMm2M64), - /*2348*/ uint16(x86_xMatch), - /*2349*/ uint16(x86_xSetOp), uint16(x86_PHADDSW), - /*2351*/ uint16(x86_xReadSlashR), - /*2352*/ uint16(x86_xArgXmm1), - /*2353*/ uint16(x86_xArgXmm2M128), - /*2354*/ uint16(x86_xMatch), - /*2355*/ uint16(x86_xCondPrefix), 2, - 0x66, 2367, - 0x0, 2361, - /*2361*/ uint16(x86_xSetOp), uint16(x86_PMADDUBSW), - /*2363*/ uint16(x86_xReadSlashR), - /*2364*/ uint16(x86_xArgMm1), - /*2365*/ uint16(x86_xArgMm2M64), - /*2366*/ uint16(x86_xMatch), - /*2367*/ uint16(x86_xSetOp), uint16(x86_PMADDUBSW), - /*2369*/ uint16(x86_xReadSlashR), - /*2370*/ uint16(x86_xArgXmm1), - /*2371*/ uint16(x86_xArgXmm2M128), - /*2372*/ uint16(x86_xMatch), - /*2373*/ uint16(x86_xCondPrefix), 2, - 0x66, 2385, - 0x0, 2379, - /*2379*/ uint16(x86_xSetOp), uint16(x86_PHSUBW), - /*2381*/ uint16(x86_xReadSlashR), - /*2382*/ uint16(x86_xArgMm1), - /*2383*/ uint16(x86_xArgMm2M64), - /*2384*/ uint16(x86_xMatch), - /*2385*/ uint16(x86_xSetOp), uint16(x86_PHSUBW), - /*2387*/ uint16(x86_xReadSlashR), - /*2388*/ uint16(x86_xArgXmm1), - /*2389*/ uint16(x86_xArgXmm2M128), - /*2390*/ uint16(x86_xMatch), - /*2391*/ uint16(x86_xCondPrefix), 2, - 0x66, 2403, - 0x0, 2397, - /*2397*/ uint16(x86_xSetOp), uint16(x86_PHSUBD), - /*2399*/ uint16(x86_xReadSlashR), - /*2400*/ uint16(x86_xArgMm1), - /*2401*/ uint16(x86_xArgMm2M64), - /*2402*/ uint16(x86_xMatch), - /*2403*/ uint16(x86_xSetOp), uint16(x86_PHSUBD), - /*2405*/ uint16(x86_xReadSlashR), - /*2406*/ uint16(x86_xArgXmm1), - /*2407*/ uint16(x86_xArgXmm2M128), - /*2408*/ uint16(x86_xMatch), - /*2409*/ uint16(x86_xCondPrefix), 2, - 0x66, 2421, - 0x0, 2415, - /*2415*/ uint16(x86_xSetOp), uint16(x86_PHSUBSW), - /*2417*/ uint16(x86_xReadSlashR), - /*2418*/ uint16(x86_xArgMm1), - /*2419*/ uint16(x86_xArgMm2M64), - /*2420*/ uint16(x86_xMatch), - /*2421*/ uint16(x86_xSetOp), uint16(x86_PHSUBSW), - /*2423*/ uint16(x86_xReadSlashR), - /*2424*/ uint16(x86_xArgXmm1), - /*2425*/ uint16(x86_xArgXmm2M128), - /*2426*/ uint16(x86_xMatch), - /*2427*/ uint16(x86_xCondPrefix), 2, - 0x66, 2439, - 0x0, 2433, - /*2433*/ uint16(x86_xSetOp), uint16(x86_PSIGNB), - /*2435*/ uint16(x86_xReadSlashR), - /*2436*/ uint16(x86_xArgMm1), - /*2437*/ uint16(x86_xArgMm2M64), - /*2438*/ uint16(x86_xMatch), - /*2439*/ uint16(x86_xSetOp), uint16(x86_PSIGNB), - /*2441*/ uint16(x86_xReadSlashR), - /*2442*/ uint16(x86_xArgXmm1), - /*2443*/ uint16(x86_xArgXmm2M128), - /*2444*/ uint16(x86_xMatch), - /*2445*/ uint16(x86_xCondPrefix), 2, - 0x66, 2457, - 0x0, 2451, - /*2451*/ uint16(x86_xSetOp), uint16(x86_PSIGNW), - /*2453*/ uint16(x86_xReadSlashR), - /*2454*/ uint16(x86_xArgMm1), - /*2455*/ uint16(x86_xArgMm2M64), - /*2456*/ uint16(x86_xMatch), - /*2457*/ uint16(x86_xSetOp), uint16(x86_PSIGNW), - /*2459*/ uint16(x86_xReadSlashR), - /*2460*/ uint16(x86_xArgXmm1), - /*2461*/ uint16(x86_xArgXmm2M128), - /*2462*/ uint16(x86_xMatch), - /*2463*/ uint16(x86_xCondPrefix), 2, - 0x66, 2475, - 0x0, 2469, - /*2469*/ uint16(x86_xSetOp), uint16(x86_PSIGND), - /*2471*/ uint16(x86_xReadSlashR), - /*2472*/ uint16(x86_xArgMm1), - /*2473*/ uint16(x86_xArgMm2M64), - /*2474*/ uint16(x86_xMatch), - /*2475*/ uint16(x86_xSetOp), uint16(x86_PSIGND), - /*2477*/ uint16(x86_xReadSlashR), - /*2478*/ uint16(x86_xArgXmm1), - /*2479*/ uint16(x86_xArgXmm2M128), - /*2480*/ uint16(x86_xMatch), - /*2481*/ uint16(x86_xCondPrefix), 2, - 0x66, 2493, - 0x0, 2487, - /*2487*/ uint16(x86_xSetOp), uint16(x86_PMULHRSW), - /*2489*/ uint16(x86_xReadSlashR), - /*2490*/ uint16(x86_xArgMm1), - /*2491*/ uint16(x86_xArgMm2M64), - /*2492*/ uint16(x86_xMatch), - /*2493*/ uint16(x86_xSetOp), uint16(x86_PMULHRSW), - /*2495*/ uint16(x86_xReadSlashR), - /*2496*/ uint16(x86_xArgXmm1), - /*2497*/ uint16(x86_xArgXmm2M128), - /*2498*/ uint16(x86_xMatch), - /*2499*/ uint16(x86_xCondPrefix), 1, - 0x66, 2503, - /*2503*/ uint16(x86_xSetOp), uint16(x86_PBLENDVB), - /*2505*/ uint16(x86_xReadSlashR), - /*2506*/ uint16(x86_xArgXmm1), - /*2507*/ uint16(x86_xArgXmm2M128), - /*2508*/ uint16(x86_xArgXMM0), - /*2509*/ uint16(x86_xMatch), - /*2510*/ uint16(x86_xCondPrefix), 1, - 0x66, 2514, - /*2514*/ uint16(x86_xSetOp), uint16(x86_BLENDVPS), - /*2516*/ uint16(x86_xReadSlashR), - /*2517*/ uint16(x86_xArgXmm1), - /*2518*/ uint16(x86_xArgXmm2M128), - /*2519*/ uint16(x86_xArgXMM0), - /*2520*/ uint16(x86_xMatch), - /*2521*/ uint16(x86_xCondPrefix), 1, - 0x66, 2525, - /*2525*/ uint16(x86_xSetOp), uint16(x86_BLENDVPD), - /*2527*/ uint16(x86_xReadSlashR), - /*2528*/ uint16(x86_xArgXmm1), - /*2529*/ uint16(x86_xArgXmm2M128), - /*2530*/ uint16(x86_xArgXMM0), - /*2531*/ uint16(x86_xMatch), - /*2532*/ uint16(x86_xCondPrefix), 1, - 0x66, 2536, - /*2536*/ uint16(x86_xSetOp), uint16(x86_PTEST), - /*2538*/ uint16(x86_xReadSlashR), - /*2539*/ uint16(x86_xArgXmm1), - /*2540*/ uint16(x86_xArgXmm2M128), - /*2541*/ uint16(x86_xMatch), - /*2542*/ uint16(x86_xCondPrefix), 2, - 0x66, 2554, - 0x0, 2548, - /*2548*/ uint16(x86_xSetOp), uint16(x86_PABSB), - /*2550*/ uint16(x86_xReadSlashR), - /*2551*/ uint16(x86_xArgMm1), - /*2552*/ uint16(x86_xArgMm2M64), - /*2553*/ uint16(x86_xMatch), - /*2554*/ uint16(x86_xSetOp), uint16(x86_PABSB), - /*2556*/ uint16(x86_xReadSlashR), - /*2557*/ uint16(x86_xArgXmm1), - /*2558*/ uint16(x86_xArgXmm2M128), - /*2559*/ uint16(x86_xMatch), - /*2560*/ uint16(x86_xCondPrefix), 2, - 0x66, 2572, - 0x0, 2566, - /*2566*/ uint16(x86_xSetOp), uint16(x86_PABSW), - /*2568*/ uint16(x86_xReadSlashR), - /*2569*/ uint16(x86_xArgMm1), - /*2570*/ uint16(x86_xArgMm2M64), - /*2571*/ uint16(x86_xMatch), - /*2572*/ uint16(x86_xSetOp), uint16(x86_PABSW), - /*2574*/ uint16(x86_xReadSlashR), - /*2575*/ uint16(x86_xArgXmm1), - /*2576*/ uint16(x86_xArgXmm2M128), - /*2577*/ uint16(x86_xMatch), - /*2578*/ uint16(x86_xCondPrefix), 2, - 0x66, 2590, - 0x0, 2584, - /*2584*/ uint16(x86_xSetOp), uint16(x86_PABSD), - /*2586*/ uint16(x86_xReadSlashR), - /*2587*/ uint16(x86_xArgMm1), - /*2588*/ uint16(x86_xArgMm2M64), - /*2589*/ uint16(x86_xMatch), - /*2590*/ uint16(x86_xSetOp), uint16(x86_PABSD), - /*2592*/ uint16(x86_xReadSlashR), - /*2593*/ uint16(x86_xArgXmm1), - /*2594*/ uint16(x86_xArgXmm2M128), - /*2595*/ uint16(x86_xMatch), - /*2596*/ uint16(x86_xCondPrefix), 1, - 0x66, 2600, - /*2600*/ uint16(x86_xSetOp), uint16(x86_PMOVSXBW), - /*2602*/ uint16(x86_xReadSlashR), - /*2603*/ uint16(x86_xArgXmm1), - /*2604*/ uint16(x86_xArgXmm2M64), - /*2605*/ uint16(x86_xMatch), - /*2606*/ uint16(x86_xCondPrefix), 1, - 0x66, 2610, - /*2610*/ uint16(x86_xSetOp), uint16(x86_PMOVSXBD), - /*2612*/ uint16(x86_xReadSlashR), - /*2613*/ uint16(x86_xArgXmm1), - /*2614*/ uint16(x86_xArgXmm2M32), - /*2615*/ uint16(x86_xMatch), - /*2616*/ uint16(x86_xCondPrefix), 1, - 0x66, 2620, - /*2620*/ uint16(x86_xSetOp), uint16(x86_PMOVSXBQ), - /*2622*/ uint16(x86_xReadSlashR), - /*2623*/ uint16(x86_xArgXmm1), - /*2624*/ uint16(x86_xArgXmm2M16), - /*2625*/ uint16(x86_xMatch), - /*2626*/ uint16(x86_xCondPrefix), 1, - 0x66, 2630, - /*2630*/ uint16(x86_xSetOp), uint16(x86_PMOVSXWD), - /*2632*/ uint16(x86_xReadSlashR), - /*2633*/ uint16(x86_xArgXmm1), - /*2634*/ uint16(x86_xArgXmm2M64), - /*2635*/ uint16(x86_xMatch), - /*2636*/ uint16(x86_xCondPrefix), 1, - 0x66, 2640, - /*2640*/ uint16(x86_xSetOp), uint16(x86_PMOVSXWQ), - /*2642*/ uint16(x86_xReadSlashR), - /*2643*/ uint16(x86_xArgXmm1), - /*2644*/ uint16(x86_xArgXmm2M32), - /*2645*/ uint16(x86_xMatch), - /*2646*/ uint16(x86_xCondPrefix), 1, - 0x66, 2650, - /*2650*/ uint16(x86_xSetOp), uint16(x86_PMOVSXDQ), - /*2652*/ uint16(x86_xReadSlashR), - /*2653*/ uint16(x86_xArgXmm1), - /*2654*/ uint16(x86_xArgXmm2M64), - /*2655*/ uint16(x86_xMatch), - /*2656*/ uint16(x86_xCondPrefix), 1, - 0x66, 2660, - /*2660*/ uint16(x86_xSetOp), uint16(x86_PMULDQ), - /*2662*/ uint16(x86_xReadSlashR), - /*2663*/ uint16(x86_xArgXmm1), - /*2664*/ uint16(x86_xArgXmm2M128), - /*2665*/ uint16(x86_xMatch), - /*2666*/ uint16(x86_xCondPrefix), 1, - 0x66, 2670, - /*2670*/ uint16(x86_xSetOp), uint16(x86_PCMPEQQ), - /*2672*/ uint16(x86_xReadSlashR), - /*2673*/ uint16(x86_xArgXmm1), - /*2674*/ uint16(x86_xArgXmm2M128), - /*2675*/ uint16(x86_xMatch), - /*2676*/ uint16(x86_xCondPrefix), 1, - 0x66, 2680, - /*2680*/ uint16(x86_xSetOp), uint16(x86_MOVNTDQA), - /*2682*/ uint16(x86_xReadSlashR), - /*2683*/ uint16(x86_xArgXmm1), - /*2684*/ uint16(x86_xArgM128), - /*2685*/ uint16(x86_xMatch), - /*2686*/ uint16(x86_xCondPrefix), 1, - 0x66, 2690, - /*2690*/ uint16(x86_xSetOp), uint16(x86_PACKUSDW), - /*2692*/ uint16(x86_xReadSlashR), - /*2693*/ uint16(x86_xArgXmm1), - /*2694*/ uint16(x86_xArgXmm2M128), - /*2695*/ uint16(x86_xMatch), - /*2696*/ uint16(x86_xCondPrefix), 1, - 0x66, 2700, - /*2700*/ uint16(x86_xSetOp), uint16(x86_PMOVZXBW), - /*2702*/ uint16(x86_xReadSlashR), - /*2703*/ uint16(x86_xArgXmm1), - /*2704*/ uint16(x86_xArgXmm2M64), - /*2705*/ uint16(x86_xMatch), - /*2706*/ uint16(x86_xCondPrefix), 1, - 0x66, 2710, - /*2710*/ uint16(x86_xSetOp), uint16(x86_PMOVZXBD), - /*2712*/ uint16(x86_xReadSlashR), - /*2713*/ uint16(x86_xArgXmm1), - /*2714*/ uint16(x86_xArgXmm2M32), - /*2715*/ uint16(x86_xMatch), - /*2716*/ uint16(x86_xCondPrefix), 1, - 0x66, 2720, - /*2720*/ uint16(x86_xSetOp), uint16(x86_PMOVZXBQ), - /*2722*/ uint16(x86_xReadSlashR), - /*2723*/ uint16(x86_xArgXmm1), - /*2724*/ uint16(x86_xArgXmm2M16), - /*2725*/ uint16(x86_xMatch), - /*2726*/ uint16(x86_xCondPrefix), 1, - 0x66, 2730, - /*2730*/ uint16(x86_xSetOp), uint16(x86_PMOVZXWD), - /*2732*/ uint16(x86_xReadSlashR), - /*2733*/ uint16(x86_xArgXmm1), - /*2734*/ uint16(x86_xArgXmm2M64), - /*2735*/ uint16(x86_xMatch), - /*2736*/ uint16(x86_xCondPrefix), 1, - 0x66, 2740, - /*2740*/ uint16(x86_xSetOp), uint16(x86_PMOVZXWQ), - /*2742*/ uint16(x86_xReadSlashR), - /*2743*/ uint16(x86_xArgXmm1), - /*2744*/ uint16(x86_xArgXmm2M32), - /*2745*/ uint16(x86_xMatch), - /*2746*/ uint16(x86_xCondPrefix), 1, - 0x66, 2750, - /*2750*/ uint16(x86_xSetOp), uint16(x86_PMOVZXDQ), - /*2752*/ uint16(x86_xReadSlashR), - /*2753*/ uint16(x86_xArgXmm1), - /*2754*/ uint16(x86_xArgXmm2M64), - /*2755*/ uint16(x86_xMatch), - /*2756*/ uint16(x86_xCondPrefix), 1, - 0x66, 2760, - /*2760*/ uint16(x86_xSetOp), uint16(x86_PCMPGTQ), - /*2762*/ uint16(x86_xReadSlashR), - /*2763*/ uint16(x86_xArgXmm1), - /*2764*/ uint16(x86_xArgXmm2M128), - /*2765*/ uint16(x86_xMatch), - /*2766*/ uint16(x86_xCondPrefix), 1, - 0x66, 2770, - /*2770*/ uint16(x86_xSetOp), uint16(x86_PMINSB), - /*2772*/ uint16(x86_xReadSlashR), - /*2773*/ uint16(x86_xArgXmm1), - /*2774*/ uint16(x86_xArgXmm2M128), - /*2775*/ uint16(x86_xMatch), - /*2776*/ uint16(x86_xCondPrefix), 1, - 0x66, 2780, - /*2780*/ uint16(x86_xSetOp), uint16(x86_PMINSD), - /*2782*/ uint16(x86_xReadSlashR), - /*2783*/ uint16(x86_xArgXmm1), - /*2784*/ uint16(x86_xArgXmm2M128), - /*2785*/ uint16(x86_xMatch), - /*2786*/ uint16(x86_xCondPrefix), 1, - 0x66, 2790, - /*2790*/ uint16(x86_xSetOp), uint16(x86_PMINUW), - /*2792*/ uint16(x86_xReadSlashR), - /*2793*/ uint16(x86_xArgXmm1), - /*2794*/ uint16(x86_xArgXmm2M128), - /*2795*/ uint16(x86_xMatch), - /*2796*/ uint16(x86_xCondPrefix), 1, - 0x66, 2800, - /*2800*/ uint16(x86_xSetOp), uint16(x86_PMINUD), - /*2802*/ uint16(x86_xReadSlashR), - /*2803*/ uint16(x86_xArgXmm1), - /*2804*/ uint16(x86_xArgXmm2M128), - /*2805*/ uint16(x86_xMatch), - /*2806*/ uint16(x86_xCondPrefix), 1, - 0x66, 2810, - /*2810*/ uint16(x86_xSetOp), uint16(x86_PMAXSB), - /*2812*/ uint16(x86_xReadSlashR), - /*2813*/ uint16(x86_xArgXmm1), - /*2814*/ uint16(x86_xArgXmm2M128), - /*2815*/ uint16(x86_xMatch), - /*2816*/ uint16(x86_xCondPrefix), 1, - 0x66, 2820, - /*2820*/ uint16(x86_xSetOp), uint16(x86_PMAXSD), - /*2822*/ uint16(x86_xReadSlashR), - /*2823*/ uint16(x86_xArgXmm1), - /*2824*/ uint16(x86_xArgXmm2M128), - /*2825*/ uint16(x86_xMatch), - /*2826*/ uint16(x86_xCondPrefix), 1, - 0x66, 2830, - /*2830*/ uint16(x86_xSetOp), uint16(x86_PMAXUW), - /*2832*/ uint16(x86_xReadSlashR), - /*2833*/ uint16(x86_xArgXmm1), - /*2834*/ uint16(x86_xArgXmm2M128), - /*2835*/ uint16(x86_xMatch), - /*2836*/ uint16(x86_xCondPrefix), 1, - 0x66, 2840, - /*2840*/ uint16(x86_xSetOp), uint16(x86_PMAXUD), - /*2842*/ uint16(x86_xReadSlashR), - /*2843*/ uint16(x86_xArgXmm1), - /*2844*/ uint16(x86_xArgXmm2M128), - /*2845*/ uint16(x86_xMatch), - /*2846*/ uint16(x86_xCondPrefix), 1, - 0x66, 2850, - /*2850*/ uint16(x86_xSetOp), uint16(x86_PMULLD), - /*2852*/ uint16(x86_xReadSlashR), - /*2853*/ uint16(x86_xArgXmm1), - /*2854*/ uint16(x86_xArgXmm2M128), - /*2855*/ uint16(x86_xMatch), - /*2856*/ uint16(x86_xCondPrefix), 1, - 0x66, 2860, - /*2860*/ uint16(x86_xSetOp), uint16(x86_PHMINPOSUW), - /*2862*/ uint16(x86_xReadSlashR), - /*2863*/ uint16(x86_xArgXmm1), - /*2864*/ uint16(x86_xArgXmm2M128), - /*2865*/ uint16(x86_xMatch), - /*2866*/ uint16(x86_xCondIs64), 2869, 2879, - /*2869*/ uint16(x86_xCondPrefix), 1, - 0x66, 2873, - /*2873*/ uint16(x86_xSetOp), uint16(x86_INVPCID), - /*2875*/ uint16(x86_xReadSlashR), - /*2876*/ uint16(x86_xArgR32), - /*2877*/ uint16(x86_xArgM128), - /*2878*/ uint16(x86_xMatch), - /*2879*/ uint16(x86_xCondPrefix), 1, - 0x66, 2883, - /*2883*/ uint16(x86_xSetOp), uint16(x86_INVPCID), - /*2885*/ uint16(x86_xReadSlashR), - /*2886*/ uint16(x86_xArgR64), - /*2887*/ uint16(x86_xArgM128), - /*2888*/ uint16(x86_xMatch), - /*2889*/ uint16(x86_xCondPrefix), 1, - 0x66, 2893, - /*2893*/ uint16(x86_xSetOp), uint16(x86_AESIMC), - /*2895*/ uint16(x86_xReadSlashR), - /*2896*/ uint16(x86_xArgXmm1), - /*2897*/ uint16(x86_xArgXmm2M128), - /*2898*/ uint16(x86_xMatch), - /*2899*/ uint16(x86_xCondPrefix), 1, - 0x66, 2903, - /*2903*/ uint16(x86_xSetOp), uint16(x86_AESENC), - /*2905*/ uint16(x86_xReadSlashR), - /*2906*/ uint16(x86_xArgXmm1), - /*2907*/ uint16(x86_xArgXmm2M128), - /*2908*/ uint16(x86_xMatch), - /*2909*/ uint16(x86_xCondPrefix), 1, - 0x66, 2913, - /*2913*/ uint16(x86_xSetOp), uint16(x86_AESENCLAST), - /*2915*/ uint16(x86_xReadSlashR), - /*2916*/ uint16(x86_xArgXmm1), - /*2917*/ uint16(x86_xArgXmm2M128), - /*2918*/ uint16(x86_xMatch), - /*2919*/ uint16(x86_xCondPrefix), 1, - 0x66, 2923, - /*2923*/ uint16(x86_xSetOp), uint16(x86_AESDEC), - /*2925*/ uint16(x86_xReadSlashR), - /*2926*/ uint16(x86_xArgXmm1), - /*2927*/ uint16(x86_xArgXmm2M128), - /*2928*/ uint16(x86_xMatch), - /*2929*/ uint16(x86_xCondPrefix), 1, - 0x66, 2933, - /*2933*/ uint16(x86_xSetOp), uint16(x86_AESDECLAST), - /*2935*/ uint16(x86_xReadSlashR), - /*2936*/ uint16(x86_xArgXmm1), - /*2937*/ uint16(x86_xArgXmm2M128), - /*2938*/ uint16(x86_xMatch), - /*2939*/ uint16(x86_xCondIs64), 2942, 2980, - /*2942*/ uint16(x86_xCondPrefix), 2, - 0xF2, 2964, - 0x0, 2948, - /*2948*/ uint16(x86_xCondDataSize), 2952, 2958, 0, - /*2952*/ uint16(x86_xSetOp), uint16(x86_MOVBE), - /*2954*/ uint16(x86_xReadSlashR), - /*2955*/ uint16(x86_xArgR16), - /*2956*/ uint16(x86_xArgM16), - /*2957*/ uint16(x86_xMatch), - /*2958*/ uint16(x86_xSetOp), uint16(x86_MOVBE), - /*2960*/ uint16(x86_xReadSlashR), - /*2961*/ uint16(x86_xArgR32), - /*2962*/ uint16(x86_xArgM32), - /*2963*/ uint16(x86_xMatch), - /*2964*/ uint16(x86_xCondDataSize), 2968, 2974, 0, - /*2968*/ uint16(x86_xSetOp), uint16(x86_CRC32), - /*2970*/ uint16(x86_xReadSlashR), - /*2971*/ uint16(x86_xArgR32), - /*2972*/ uint16(x86_xArgRM8), - /*2973*/ uint16(x86_xMatch), - /*2974*/ uint16(x86_xSetOp), uint16(x86_CRC32), - /*2976*/ uint16(x86_xReadSlashR), - /*2977*/ uint16(x86_xArgR32), - /*2978*/ uint16(x86_xArgRM8), - /*2979*/ uint16(x86_xMatch), - /*2980*/ uint16(x86_xCondPrefix), 2, - 0xF2, 2996, - 0x0, 2986, - /*2986*/ uint16(x86_xCondDataSize), 2952, 2958, 2990, - /*2990*/ uint16(x86_xSetOp), uint16(x86_MOVBE), - /*2992*/ uint16(x86_xReadSlashR), - /*2993*/ uint16(x86_xArgR64), - /*2994*/ uint16(x86_xArgM64), - /*2995*/ uint16(x86_xMatch), - /*2996*/ uint16(x86_xCondDataSize), 2968, 2974, 3000, - /*3000*/ uint16(x86_xSetOp), uint16(x86_CRC32), - /*3002*/ uint16(x86_xReadSlashR), - /*3003*/ uint16(x86_xArgR64), - /*3004*/ uint16(x86_xArgRM8), - /*3005*/ uint16(x86_xMatch), - /*3006*/ uint16(x86_xCondIs64), 3009, 3047, - /*3009*/ uint16(x86_xCondPrefix), 2, - 0xF2, 3031, - 0x0, 3015, - /*3015*/ uint16(x86_xCondDataSize), 3019, 3025, 0, - /*3019*/ uint16(x86_xSetOp), uint16(x86_MOVBE), - /*3021*/ uint16(x86_xReadSlashR), - /*3022*/ uint16(x86_xArgM16), - /*3023*/ uint16(x86_xArgR16), - /*3024*/ uint16(x86_xMatch), - /*3025*/ uint16(x86_xSetOp), uint16(x86_MOVBE), - /*3027*/ uint16(x86_xReadSlashR), - /*3028*/ uint16(x86_xArgM32), - /*3029*/ uint16(x86_xArgR32), - /*3030*/ uint16(x86_xMatch), - /*3031*/ uint16(x86_xCondDataSize), 3035, 3041, 0, - /*3035*/ uint16(x86_xSetOp), uint16(x86_CRC32), - /*3037*/ uint16(x86_xReadSlashR), - /*3038*/ uint16(x86_xArgR32), - /*3039*/ uint16(x86_xArgRM16), - /*3040*/ uint16(x86_xMatch), - /*3041*/ uint16(x86_xSetOp), uint16(x86_CRC32), - /*3043*/ uint16(x86_xReadSlashR), - /*3044*/ uint16(x86_xArgR32), - /*3045*/ uint16(x86_xArgRM32), - /*3046*/ uint16(x86_xMatch), - /*3047*/ uint16(x86_xCondPrefix), 2, - 0xF2, 3063, - 0x0, 3053, - /*3053*/ uint16(x86_xCondDataSize), 3019, 3025, 3057, - /*3057*/ uint16(x86_xSetOp), uint16(x86_MOVBE), - /*3059*/ uint16(x86_xReadSlashR), - /*3060*/ uint16(x86_xArgM64), - /*3061*/ uint16(x86_xArgR64), - /*3062*/ uint16(x86_xMatch), - /*3063*/ uint16(x86_xCondDataSize), 3035, 3041, 3067, - /*3067*/ uint16(x86_xSetOp), uint16(x86_CRC32), - /*3069*/ uint16(x86_xReadSlashR), - /*3070*/ uint16(x86_xArgR64), - /*3071*/ uint16(x86_xArgRM64), - /*3072*/ uint16(x86_xMatch), - /*3073*/ uint16(x86_xCondByte), 24, - 0x08, 3124, - 0x09, 3136, - 0x0A, 3148, - 0x0B, 3160, - 0x0C, 3172, - 0x0D, 3184, - 0x0E, 3196, - 0x0F, 3208, - 0x14, 3230, - 0x15, 3242, - 0x16, 3254, - 0x17, 3297, - 0x20, 3309, - 0x21, 3321, - 0x22, 3333, - 0x40, 3376, - 0x41, 3388, - 0x42, 3400, - 0x44, 3412, - 0x60, 3424, - 0x61, 3436, - 0x62, 3448, - 0x63, 3460, - 0xDF, 3472, - uint16(x86_xFail), - /*3124*/ uint16(x86_xCondPrefix), 1, - 0x66, 3128, - /*3128*/ uint16(x86_xSetOp), uint16(x86_ROUNDPS), - /*3130*/ uint16(x86_xReadSlashR), - /*3131*/ uint16(x86_xReadIb), - /*3132*/ uint16(x86_xArgXmm1), - /*3133*/ uint16(x86_xArgXmm2M128), - /*3134*/ uint16(x86_xArgImm8u), - /*3135*/ uint16(x86_xMatch), - /*3136*/ uint16(x86_xCondPrefix), 1, - 0x66, 3140, - /*3140*/ uint16(x86_xSetOp), uint16(x86_ROUNDPD), - /*3142*/ uint16(x86_xReadSlashR), - /*3143*/ uint16(x86_xReadIb), - /*3144*/ uint16(x86_xArgXmm1), - /*3145*/ uint16(x86_xArgXmm2M128), - /*3146*/ uint16(x86_xArgImm8u), - /*3147*/ uint16(x86_xMatch), - /*3148*/ uint16(x86_xCondPrefix), 1, - 0x66, 3152, - /*3152*/ uint16(x86_xSetOp), uint16(x86_ROUNDSS), - /*3154*/ uint16(x86_xReadSlashR), - /*3155*/ uint16(x86_xReadIb), - /*3156*/ uint16(x86_xArgXmm1), - /*3157*/ uint16(x86_xArgXmm2M32), - /*3158*/ uint16(x86_xArgImm8u), - /*3159*/ uint16(x86_xMatch), - /*3160*/ uint16(x86_xCondPrefix), 1, - 0x66, 3164, - /*3164*/ uint16(x86_xSetOp), uint16(x86_ROUNDSD), - /*3166*/ uint16(x86_xReadSlashR), - /*3167*/ uint16(x86_xReadIb), - /*3168*/ uint16(x86_xArgXmm1), - /*3169*/ uint16(x86_xArgXmm2M64), - /*3170*/ uint16(x86_xArgImm8u), - /*3171*/ uint16(x86_xMatch), - /*3172*/ uint16(x86_xCondPrefix), 1, - 0x66, 3176, - /*3176*/ uint16(x86_xSetOp), uint16(x86_BLENDPS), - /*3178*/ uint16(x86_xReadSlashR), - /*3179*/ uint16(x86_xReadIb), - /*3180*/ uint16(x86_xArgXmm1), - /*3181*/ uint16(x86_xArgXmm2M128), - /*3182*/ uint16(x86_xArgImm8u), - /*3183*/ uint16(x86_xMatch), - /*3184*/ uint16(x86_xCondPrefix), 1, - 0x66, 3188, - /*3188*/ uint16(x86_xSetOp), uint16(x86_BLENDPD), - /*3190*/ uint16(x86_xReadSlashR), - /*3191*/ uint16(x86_xReadIb), - /*3192*/ uint16(x86_xArgXmm1), - /*3193*/ uint16(x86_xArgXmm2M128), - /*3194*/ uint16(x86_xArgImm8u), - /*3195*/ uint16(x86_xMatch), - /*3196*/ uint16(x86_xCondPrefix), 1, - 0x66, 3200, - /*3200*/ uint16(x86_xSetOp), uint16(x86_PBLENDW), - /*3202*/ uint16(x86_xReadSlashR), - /*3203*/ uint16(x86_xReadIb), - /*3204*/ uint16(x86_xArgXmm1), - /*3205*/ uint16(x86_xArgXmm2M128), - /*3206*/ uint16(x86_xArgImm8u), - /*3207*/ uint16(x86_xMatch), - /*3208*/ uint16(x86_xCondPrefix), 2, - 0x66, 3222, - 0x0, 3214, - /*3214*/ uint16(x86_xSetOp), uint16(x86_PALIGNR), - /*3216*/ uint16(x86_xReadSlashR), - /*3217*/ uint16(x86_xReadIb), - /*3218*/ uint16(x86_xArgMm1), - /*3219*/ uint16(x86_xArgMm2M64), - /*3220*/ uint16(x86_xArgImm8u), - /*3221*/ uint16(x86_xMatch), - /*3222*/ uint16(x86_xSetOp), uint16(x86_PALIGNR), - /*3224*/ uint16(x86_xReadSlashR), - /*3225*/ uint16(x86_xReadIb), - /*3226*/ uint16(x86_xArgXmm1), - /*3227*/ uint16(x86_xArgXmm2M128), - /*3228*/ uint16(x86_xArgImm8u), - /*3229*/ uint16(x86_xMatch), - /*3230*/ uint16(x86_xCondPrefix), 1, - 0x66, 3234, - /*3234*/ uint16(x86_xSetOp), uint16(x86_PEXTRB), - /*3236*/ uint16(x86_xReadSlashR), - /*3237*/ uint16(x86_xReadIb), - /*3238*/ uint16(x86_xArgR32M8), - /*3239*/ uint16(x86_xArgXmm1), - /*3240*/ uint16(x86_xArgImm8u), - /*3241*/ uint16(x86_xMatch), - /*3242*/ uint16(x86_xCondPrefix), 1, - 0x66, 3246, - /*3246*/ uint16(x86_xSetOp), uint16(x86_PEXTRW), - /*3248*/ uint16(x86_xReadSlashR), - /*3249*/ uint16(x86_xReadIb), - /*3250*/ uint16(x86_xArgR32M16), - /*3251*/ uint16(x86_xArgXmm1), - /*3252*/ uint16(x86_xArgImm8u), - /*3253*/ uint16(x86_xMatch), - /*3254*/ uint16(x86_xCondIs64), 3257, 3281, - /*3257*/ uint16(x86_xCondPrefix), 1, - 0x66, 3261, - /*3261*/ uint16(x86_xCondDataSize), 3265, 3273, 0, - /*3265*/ uint16(x86_xSetOp), uint16(x86_PEXTRD), - /*3267*/ uint16(x86_xReadSlashR), - /*3268*/ uint16(x86_xReadIb), - /*3269*/ uint16(x86_xArgRM32), - /*3270*/ uint16(x86_xArgXmm1), - /*3271*/ uint16(x86_xArgImm8u), - /*3272*/ uint16(x86_xMatch), - /*3273*/ uint16(x86_xSetOp), uint16(x86_PEXTRD), - /*3275*/ uint16(x86_xReadSlashR), - /*3276*/ uint16(x86_xReadIb), - /*3277*/ uint16(x86_xArgRM32), - /*3278*/ uint16(x86_xArgXmm1), - /*3279*/ uint16(x86_xArgImm8u), - /*3280*/ uint16(x86_xMatch), - /*3281*/ uint16(x86_xCondPrefix), 1, - 0x66, 3285, - /*3285*/ uint16(x86_xCondDataSize), 3265, 3273, 3289, - /*3289*/ uint16(x86_xSetOp), uint16(x86_PEXTRQ), - /*3291*/ uint16(x86_xReadSlashR), - /*3292*/ uint16(x86_xReadIb), - /*3293*/ uint16(x86_xArgRM64), - /*3294*/ uint16(x86_xArgXmm1), - /*3295*/ uint16(x86_xArgImm8u), - /*3296*/ uint16(x86_xMatch), - /*3297*/ uint16(x86_xCondPrefix), 1, - 0x66, 3301, - /*3301*/ uint16(x86_xSetOp), uint16(x86_EXTRACTPS), - /*3303*/ uint16(x86_xReadSlashR), - /*3304*/ uint16(x86_xReadIb), - /*3305*/ uint16(x86_xArgRM32), - /*3306*/ uint16(x86_xArgXmm1), - /*3307*/ uint16(x86_xArgImm8u), - /*3308*/ uint16(x86_xMatch), - /*3309*/ uint16(x86_xCondPrefix), 1, - 0x66, 3313, - /*3313*/ uint16(x86_xSetOp), uint16(x86_PINSRB), - /*3315*/ uint16(x86_xReadSlashR), - /*3316*/ uint16(x86_xReadIb), - /*3317*/ uint16(x86_xArgXmm1), - /*3318*/ uint16(x86_xArgR32M8), - /*3319*/ uint16(x86_xArgImm8u), - /*3320*/ uint16(x86_xMatch), - /*3321*/ uint16(x86_xCondPrefix), 1, - 0x66, 3325, - /*3325*/ uint16(x86_xSetOp), uint16(x86_INSERTPS), - /*3327*/ uint16(x86_xReadSlashR), - /*3328*/ uint16(x86_xReadIb), - /*3329*/ uint16(x86_xArgXmm1), - /*3330*/ uint16(x86_xArgXmm2M32), - /*3331*/ uint16(x86_xArgImm8u), - /*3332*/ uint16(x86_xMatch), - /*3333*/ uint16(x86_xCondIs64), 3336, 3360, - /*3336*/ uint16(x86_xCondPrefix), 1, - 0x66, 3340, - /*3340*/ uint16(x86_xCondDataSize), 3344, 3352, 0, - /*3344*/ uint16(x86_xSetOp), uint16(x86_PINSRD), - /*3346*/ uint16(x86_xReadSlashR), - /*3347*/ uint16(x86_xReadIb), - /*3348*/ uint16(x86_xArgXmm1), - /*3349*/ uint16(x86_xArgRM32), - /*3350*/ uint16(x86_xArgImm8u), - /*3351*/ uint16(x86_xMatch), - /*3352*/ uint16(x86_xSetOp), uint16(x86_PINSRD), - /*3354*/ uint16(x86_xReadSlashR), - /*3355*/ uint16(x86_xReadIb), - /*3356*/ uint16(x86_xArgXmm1), - /*3357*/ uint16(x86_xArgRM32), - /*3358*/ uint16(x86_xArgImm8u), - /*3359*/ uint16(x86_xMatch), - /*3360*/ uint16(x86_xCondPrefix), 1, - 0x66, 3364, - /*3364*/ uint16(x86_xCondDataSize), 3344, 3352, 3368, - /*3368*/ uint16(x86_xSetOp), uint16(x86_PINSRQ), - /*3370*/ uint16(x86_xReadSlashR), - /*3371*/ uint16(x86_xReadIb), - /*3372*/ uint16(x86_xArgXmm1), - /*3373*/ uint16(x86_xArgRM64), - /*3374*/ uint16(x86_xArgImm8u), - /*3375*/ uint16(x86_xMatch), - /*3376*/ uint16(x86_xCondPrefix), 1, - 0x66, 3380, - /*3380*/ uint16(x86_xSetOp), uint16(x86_DPPS), - /*3382*/ uint16(x86_xReadSlashR), - /*3383*/ uint16(x86_xReadIb), - /*3384*/ uint16(x86_xArgXmm1), - /*3385*/ uint16(x86_xArgXmm2M128), - /*3386*/ uint16(x86_xArgImm8u), - /*3387*/ uint16(x86_xMatch), - /*3388*/ uint16(x86_xCondPrefix), 1, - 0x66, 3392, - /*3392*/ uint16(x86_xSetOp), uint16(x86_DPPD), - /*3394*/ uint16(x86_xReadSlashR), - /*3395*/ uint16(x86_xReadIb), - /*3396*/ uint16(x86_xArgXmm1), - /*3397*/ uint16(x86_xArgXmm2M128), - /*3398*/ uint16(x86_xArgImm8u), - /*3399*/ uint16(x86_xMatch), - /*3400*/ uint16(x86_xCondPrefix), 1, - 0x66, 3404, - /*3404*/ uint16(x86_xSetOp), uint16(x86_MPSADBW), - /*3406*/ uint16(x86_xReadSlashR), - /*3407*/ uint16(x86_xReadIb), - /*3408*/ uint16(x86_xArgXmm1), - /*3409*/ uint16(x86_xArgXmm2M128), - /*3410*/ uint16(x86_xArgImm8u), - /*3411*/ uint16(x86_xMatch), - /*3412*/ uint16(x86_xCondPrefix), 1, - 0x66, 3416, - /*3416*/ uint16(x86_xSetOp), uint16(x86_PCLMULQDQ), - /*3418*/ uint16(x86_xReadSlashR), - /*3419*/ uint16(x86_xReadIb), - /*3420*/ uint16(x86_xArgXmm1), - /*3421*/ uint16(x86_xArgXmm2M128), - /*3422*/ uint16(x86_xArgImm8u), - /*3423*/ uint16(x86_xMatch), - /*3424*/ uint16(x86_xCondPrefix), 1, - 0x66, 3428, - /*3428*/ uint16(x86_xSetOp), uint16(x86_PCMPESTRM), - /*3430*/ uint16(x86_xReadSlashR), - /*3431*/ uint16(x86_xReadIb), - /*3432*/ uint16(x86_xArgXmm1), - /*3433*/ uint16(x86_xArgXmm2M128), - /*3434*/ uint16(x86_xArgImm8u), - /*3435*/ uint16(x86_xMatch), - /*3436*/ uint16(x86_xCondPrefix), 1, - 0x66, 3440, - /*3440*/ uint16(x86_xSetOp), uint16(x86_PCMPESTRI), - /*3442*/ uint16(x86_xReadSlashR), - /*3443*/ uint16(x86_xReadIb), - /*3444*/ uint16(x86_xArgXmm1), - /*3445*/ uint16(x86_xArgXmm2M128), - /*3446*/ uint16(x86_xArgImm8u), - /*3447*/ uint16(x86_xMatch), - /*3448*/ uint16(x86_xCondPrefix), 1, - 0x66, 3452, - /*3452*/ uint16(x86_xSetOp), uint16(x86_PCMPISTRM), - /*3454*/ uint16(x86_xReadSlashR), - /*3455*/ uint16(x86_xReadIb), - /*3456*/ uint16(x86_xArgXmm1), - /*3457*/ uint16(x86_xArgXmm2M128), - /*3458*/ uint16(x86_xArgImm8u), - /*3459*/ uint16(x86_xMatch), - /*3460*/ uint16(x86_xCondPrefix), 1, - 0x66, 3464, - /*3464*/ uint16(x86_xSetOp), uint16(x86_PCMPISTRI), - /*3466*/ uint16(x86_xReadSlashR), - /*3467*/ uint16(x86_xReadIb), - /*3468*/ uint16(x86_xArgXmm1), - /*3469*/ uint16(x86_xArgXmm2M128), - /*3470*/ uint16(x86_xArgImm8u), - /*3471*/ uint16(x86_xMatch), - /*3472*/ uint16(x86_xCondPrefix), 1, - 0x66, 3476, - /*3476*/ uint16(x86_xSetOp), uint16(x86_AESKEYGENASSIST), - /*3478*/ uint16(x86_xReadSlashR), - /*3479*/ uint16(x86_xReadIb), - /*3480*/ uint16(x86_xArgXmm1), - /*3481*/ uint16(x86_xArgXmm2M128), - /*3482*/ uint16(x86_xArgImm8u), - /*3483*/ uint16(x86_xMatch), - /*3484*/ uint16(x86_xCondIs64), 3487, 3503, - /*3487*/ uint16(x86_xCondDataSize), 3491, 3497, 0, - /*3491*/ uint16(x86_xSetOp), uint16(x86_CMOVO), - /*3493*/ uint16(x86_xReadSlashR), - /*3494*/ uint16(x86_xArgR16), - /*3495*/ uint16(x86_xArgRM16), - /*3496*/ uint16(x86_xMatch), - /*3497*/ uint16(x86_xSetOp), uint16(x86_CMOVO), - /*3499*/ uint16(x86_xReadSlashR), - /*3500*/ uint16(x86_xArgR32), - /*3501*/ uint16(x86_xArgRM32), - /*3502*/ uint16(x86_xMatch), - /*3503*/ uint16(x86_xCondDataSize), 3491, 3497, 3507, - /*3507*/ uint16(x86_xSetOp), uint16(x86_CMOVO), - /*3509*/ uint16(x86_xReadSlashR), - /*3510*/ uint16(x86_xArgR64), - /*3511*/ uint16(x86_xArgRM64), - /*3512*/ uint16(x86_xMatch), - /*3513*/ uint16(x86_xCondIs64), 3516, 3532, - /*3516*/ uint16(x86_xCondDataSize), 3520, 3526, 0, - /*3520*/ uint16(x86_xSetOp), uint16(x86_CMOVNO), - /*3522*/ uint16(x86_xReadSlashR), - /*3523*/ uint16(x86_xArgR16), - /*3524*/ uint16(x86_xArgRM16), - /*3525*/ uint16(x86_xMatch), - /*3526*/ uint16(x86_xSetOp), uint16(x86_CMOVNO), - /*3528*/ uint16(x86_xReadSlashR), - /*3529*/ uint16(x86_xArgR32), - /*3530*/ uint16(x86_xArgRM32), - /*3531*/ uint16(x86_xMatch), - /*3532*/ uint16(x86_xCondDataSize), 3520, 3526, 3536, - /*3536*/ uint16(x86_xSetOp), uint16(x86_CMOVNO), - /*3538*/ uint16(x86_xReadSlashR), - /*3539*/ uint16(x86_xArgR64), - /*3540*/ uint16(x86_xArgRM64), - /*3541*/ uint16(x86_xMatch), - /*3542*/ uint16(x86_xCondIs64), 3545, 3561, - /*3545*/ uint16(x86_xCondDataSize), 3549, 3555, 0, - /*3549*/ uint16(x86_xSetOp), uint16(x86_CMOVB), - /*3551*/ uint16(x86_xReadSlashR), - /*3552*/ uint16(x86_xArgR16), - /*3553*/ uint16(x86_xArgRM16), - /*3554*/ uint16(x86_xMatch), - /*3555*/ uint16(x86_xSetOp), uint16(x86_CMOVB), - /*3557*/ uint16(x86_xReadSlashR), - /*3558*/ uint16(x86_xArgR32), - /*3559*/ uint16(x86_xArgRM32), - /*3560*/ uint16(x86_xMatch), - /*3561*/ uint16(x86_xCondDataSize), 3549, 3555, 3565, - /*3565*/ uint16(x86_xSetOp), uint16(x86_CMOVB), - /*3567*/ uint16(x86_xReadSlashR), - /*3568*/ uint16(x86_xArgR64), - /*3569*/ uint16(x86_xArgRM64), - /*3570*/ uint16(x86_xMatch), - /*3571*/ uint16(x86_xCondIs64), 3574, 3590, - /*3574*/ uint16(x86_xCondDataSize), 3578, 3584, 0, - /*3578*/ uint16(x86_xSetOp), uint16(x86_CMOVAE), - /*3580*/ uint16(x86_xReadSlashR), - /*3581*/ uint16(x86_xArgR16), - /*3582*/ uint16(x86_xArgRM16), - /*3583*/ uint16(x86_xMatch), - /*3584*/ uint16(x86_xSetOp), uint16(x86_CMOVAE), - /*3586*/ uint16(x86_xReadSlashR), - /*3587*/ uint16(x86_xArgR32), - /*3588*/ uint16(x86_xArgRM32), - /*3589*/ uint16(x86_xMatch), - /*3590*/ uint16(x86_xCondDataSize), 3578, 3584, 3594, - /*3594*/ uint16(x86_xSetOp), uint16(x86_CMOVAE), - /*3596*/ uint16(x86_xReadSlashR), - /*3597*/ uint16(x86_xArgR64), - /*3598*/ uint16(x86_xArgRM64), - /*3599*/ uint16(x86_xMatch), - /*3600*/ uint16(x86_xCondIs64), 3603, 3619, - /*3603*/ uint16(x86_xCondDataSize), 3607, 3613, 0, - /*3607*/ uint16(x86_xSetOp), uint16(x86_CMOVE), - /*3609*/ uint16(x86_xReadSlashR), - /*3610*/ uint16(x86_xArgR16), - /*3611*/ uint16(x86_xArgRM16), - /*3612*/ uint16(x86_xMatch), - /*3613*/ uint16(x86_xSetOp), uint16(x86_CMOVE), - /*3615*/ uint16(x86_xReadSlashR), - /*3616*/ uint16(x86_xArgR32), - /*3617*/ uint16(x86_xArgRM32), - /*3618*/ uint16(x86_xMatch), - /*3619*/ uint16(x86_xCondDataSize), 3607, 3613, 3623, - /*3623*/ uint16(x86_xSetOp), uint16(x86_CMOVE), - /*3625*/ uint16(x86_xReadSlashR), - /*3626*/ uint16(x86_xArgR64), - /*3627*/ uint16(x86_xArgRM64), - /*3628*/ uint16(x86_xMatch), - /*3629*/ uint16(x86_xCondIs64), 3632, 3648, - /*3632*/ uint16(x86_xCondDataSize), 3636, 3642, 0, - /*3636*/ uint16(x86_xSetOp), uint16(x86_CMOVNE), - /*3638*/ uint16(x86_xReadSlashR), - /*3639*/ uint16(x86_xArgR16), - /*3640*/ uint16(x86_xArgRM16), - /*3641*/ uint16(x86_xMatch), - /*3642*/ uint16(x86_xSetOp), uint16(x86_CMOVNE), - /*3644*/ uint16(x86_xReadSlashR), - /*3645*/ uint16(x86_xArgR32), - /*3646*/ uint16(x86_xArgRM32), - /*3647*/ uint16(x86_xMatch), - /*3648*/ uint16(x86_xCondDataSize), 3636, 3642, 3652, - /*3652*/ uint16(x86_xSetOp), uint16(x86_CMOVNE), - /*3654*/ uint16(x86_xReadSlashR), - /*3655*/ uint16(x86_xArgR64), - /*3656*/ uint16(x86_xArgRM64), - /*3657*/ uint16(x86_xMatch), - /*3658*/ uint16(x86_xCondIs64), 3661, 3677, - /*3661*/ uint16(x86_xCondDataSize), 3665, 3671, 0, - /*3665*/ uint16(x86_xSetOp), uint16(x86_CMOVBE), - /*3667*/ uint16(x86_xReadSlashR), - /*3668*/ uint16(x86_xArgR16), - /*3669*/ uint16(x86_xArgRM16), - /*3670*/ uint16(x86_xMatch), - /*3671*/ uint16(x86_xSetOp), uint16(x86_CMOVBE), - /*3673*/ uint16(x86_xReadSlashR), - /*3674*/ uint16(x86_xArgR32), - /*3675*/ uint16(x86_xArgRM32), - /*3676*/ uint16(x86_xMatch), - /*3677*/ uint16(x86_xCondDataSize), 3665, 3671, 3681, - /*3681*/ uint16(x86_xSetOp), uint16(x86_CMOVBE), - /*3683*/ uint16(x86_xReadSlashR), - /*3684*/ uint16(x86_xArgR64), - /*3685*/ uint16(x86_xArgRM64), - /*3686*/ uint16(x86_xMatch), - /*3687*/ uint16(x86_xCondIs64), 3690, 3706, - /*3690*/ uint16(x86_xCondDataSize), 3694, 3700, 0, - /*3694*/ uint16(x86_xSetOp), uint16(x86_CMOVA), - /*3696*/ uint16(x86_xReadSlashR), - /*3697*/ uint16(x86_xArgR16), - /*3698*/ uint16(x86_xArgRM16), - /*3699*/ uint16(x86_xMatch), - /*3700*/ uint16(x86_xSetOp), uint16(x86_CMOVA), - /*3702*/ uint16(x86_xReadSlashR), - /*3703*/ uint16(x86_xArgR32), - /*3704*/ uint16(x86_xArgRM32), - /*3705*/ uint16(x86_xMatch), - /*3706*/ uint16(x86_xCondDataSize), 3694, 3700, 3710, - /*3710*/ uint16(x86_xSetOp), uint16(x86_CMOVA), - /*3712*/ uint16(x86_xReadSlashR), - /*3713*/ uint16(x86_xArgR64), - /*3714*/ uint16(x86_xArgRM64), - /*3715*/ uint16(x86_xMatch), - /*3716*/ uint16(x86_xCondIs64), 3719, 3735, - /*3719*/ uint16(x86_xCondDataSize), 3723, 3729, 0, - /*3723*/ uint16(x86_xSetOp), uint16(x86_CMOVS), - /*3725*/ uint16(x86_xReadSlashR), - /*3726*/ uint16(x86_xArgR16), - /*3727*/ uint16(x86_xArgRM16), - /*3728*/ uint16(x86_xMatch), - /*3729*/ uint16(x86_xSetOp), uint16(x86_CMOVS), - /*3731*/ uint16(x86_xReadSlashR), - /*3732*/ uint16(x86_xArgR32), - /*3733*/ uint16(x86_xArgRM32), - /*3734*/ uint16(x86_xMatch), - /*3735*/ uint16(x86_xCondDataSize), 3723, 3729, 3739, - /*3739*/ uint16(x86_xSetOp), uint16(x86_CMOVS), - /*3741*/ uint16(x86_xReadSlashR), - /*3742*/ uint16(x86_xArgR64), - /*3743*/ uint16(x86_xArgRM64), - /*3744*/ uint16(x86_xMatch), - /*3745*/ uint16(x86_xCondIs64), 3748, 3764, - /*3748*/ uint16(x86_xCondDataSize), 3752, 3758, 0, - /*3752*/ uint16(x86_xSetOp), uint16(x86_CMOVNS), - /*3754*/ uint16(x86_xReadSlashR), - /*3755*/ uint16(x86_xArgR16), - /*3756*/ uint16(x86_xArgRM16), - /*3757*/ uint16(x86_xMatch), - /*3758*/ uint16(x86_xSetOp), uint16(x86_CMOVNS), - /*3760*/ uint16(x86_xReadSlashR), - /*3761*/ uint16(x86_xArgR32), - /*3762*/ uint16(x86_xArgRM32), - /*3763*/ uint16(x86_xMatch), - /*3764*/ uint16(x86_xCondDataSize), 3752, 3758, 3768, - /*3768*/ uint16(x86_xSetOp), uint16(x86_CMOVNS), - /*3770*/ uint16(x86_xReadSlashR), - /*3771*/ uint16(x86_xArgR64), - /*3772*/ uint16(x86_xArgRM64), - /*3773*/ uint16(x86_xMatch), - /*3774*/ uint16(x86_xCondIs64), 3777, 3793, - /*3777*/ uint16(x86_xCondDataSize), 3781, 3787, 0, - /*3781*/ uint16(x86_xSetOp), uint16(x86_CMOVP), - /*3783*/ uint16(x86_xReadSlashR), - /*3784*/ uint16(x86_xArgR16), - /*3785*/ uint16(x86_xArgRM16), - /*3786*/ uint16(x86_xMatch), - /*3787*/ uint16(x86_xSetOp), uint16(x86_CMOVP), - /*3789*/ uint16(x86_xReadSlashR), - /*3790*/ uint16(x86_xArgR32), - /*3791*/ uint16(x86_xArgRM32), - /*3792*/ uint16(x86_xMatch), - /*3793*/ uint16(x86_xCondDataSize), 3781, 3787, 3797, - /*3797*/ uint16(x86_xSetOp), uint16(x86_CMOVP), - /*3799*/ uint16(x86_xReadSlashR), - /*3800*/ uint16(x86_xArgR64), - /*3801*/ uint16(x86_xArgRM64), - /*3802*/ uint16(x86_xMatch), - /*3803*/ uint16(x86_xCondIs64), 3806, 3822, - /*3806*/ uint16(x86_xCondDataSize), 3810, 3816, 0, - /*3810*/ uint16(x86_xSetOp), uint16(x86_CMOVNP), - /*3812*/ uint16(x86_xReadSlashR), - /*3813*/ uint16(x86_xArgR16), - /*3814*/ uint16(x86_xArgRM16), - /*3815*/ uint16(x86_xMatch), - /*3816*/ uint16(x86_xSetOp), uint16(x86_CMOVNP), - /*3818*/ uint16(x86_xReadSlashR), - /*3819*/ uint16(x86_xArgR32), - /*3820*/ uint16(x86_xArgRM32), - /*3821*/ uint16(x86_xMatch), - /*3822*/ uint16(x86_xCondDataSize), 3810, 3816, 3826, - /*3826*/ uint16(x86_xSetOp), uint16(x86_CMOVNP), - /*3828*/ uint16(x86_xReadSlashR), - /*3829*/ uint16(x86_xArgR64), - /*3830*/ uint16(x86_xArgRM64), - /*3831*/ uint16(x86_xMatch), - /*3832*/ uint16(x86_xCondIs64), 3835, 3851, - /*3835*/ uint16(x86_xCondDataSize), 3839, 3845, 0, - /*3839*/ uint16(x86_xSetOp), uint16(x86_CMOVL), - /*3841*/ uint16(x86_xReadSlashR), - /*3842*/ uint16(x86_xArgR16), - /*3843*/ uint16(x86_xArgRM16), - /*3844*/ uint16(x86_xMatch), - /*3845*/ uint16(x86_xSetOp), uint16(x86_CMOVL), - /*3847*/ uint16(x86_xReadSlashR), - /*3848*/ uint16(x86_xArgR32), - /*3849*/ uint16(x86_xArgRM32), - /*3850*/ uint16(x86_xMatch), - /*3851*/ uint16(x86_xCondDataSize), 3839, 3845, 3855, - /*3855*/ uint16(x86_xSetOp), uint16(x86_CMOVL), - /*3857*/ uint16(x86_xReadSlashR), - /*3858*/ uint16(x86_xArgR64), - /*3859*/ uint16(x86_xArgRM64), - /*3860*/ uint16(x86_xMatch), - /*3861*/ uint16(x86_xCondIs64), 3864, 3880, - /*3864*/ uint16(x86_xCondDataSize), 3868, 3874, 0, - /*3868*/ uint16(x86_xSetOp), uint16(x86_CMOVGE), - /*3870*/ uint16(x86_xReadSlashR), - /*3871*/ uint16(x86_xArgR16), - /*3872*/ uint16(x86_xArgRM16), - /*3873*/ uint16(x86_xMatch), - /*3874*/ uint16(x86_xSetOp), uint16(x86_CMOVGE), - /*3876*/ uint16(x86_xReadSlashR), - /*3877*/ uint16(x86_xArgR32), - /*3878*/ uint16(x86_xArgRM32), - /*3879*/ uint16(x86_xMatch), - /*3880*/ uint16(x86_xCondDataSize), 3868, 3874, 3884, - /*3884*/ uint16(x86_xSetOp), uint16(x86_CMOVGE), - /*3886*/ uint16(x86_xReadSlashR), - /*3887*/ uint16(x86_xArgR64), - /*3888*/ uint16(x86_xArgRM64), - /*3889*/ uint16(x86_xMatch), - /*3890*/ uint16(x86_xCondIs64), 3893, 3909, - /*3893*/ uint16(x86_xCondDataSize), 3897, 3903, 0, - /*3897*/ uint16(x86_xSetOp), uint16(x86_CMOVLE), - /*3899*/ uint16(x86_xReadSlashR), - /*3900*/ uint16(x86_xArgR16), - /*3901*/ uint16(x86_xArgRM16), - /*3902*/ uint16(x86_xMatch), - /*3903*/ uint16(x86_xSetOp), uint16(x86_CMOVLE), - /*3905*/ uint16(x86_xReadSlashR), - /*3906*/ uint16(x86_xArgR32), - /*3907*/ uint16(x86_xArgRM32), - /*3908*/ uint16(x86_xMatch), - /*3909*/ uint16(x86_xCondDataSize), 3897, 3903, 3913, - /*3913*/ uint16(x86_xSetOp), uint16(x86_CMOVLE), - /*3915*/ uint16(x86_xReadSlashR), - /*3916*/ uint16(x86_xArgR64), - /*3917*/ uint16(x86_xArgRM64), - /*3918*/ uint16(x86_xMatch), - /*3919*/ uint16(x86_xCondIs64), 3922, 3938, - /*3922*/ uint16(x86_xCondDataSize), 3926, 3932, 0, - /*3926*/ uint16(x86_xSetOp), uint16(x86_CMOVG), - /*3928*/ uint16(x86_xReadSlashR), - /*3929*/ uint16(x86_xArgR16), - /*3930*/ uint16(x86_xArgRM16), - /*3931*/ uint16(x86_xMatch), - /*3932*/ uint16(x86_xSetOp), uint16(x86_CMOVG), - /*3934*/ uint16(x86_xReadSlashR), - /*3935*/ uint16(x86_xArgR32), - /*3936*/ uint16(x86_xArgRM32), - /*3937*/ uint16(x86_xMatch), - /*3938*/ uint16(x86_xCondDataSize), 3926, 3932, 3942, - /*3942*/ uint16(x86_xSetOp), uint16(x86_CMOVG), - /*3944*/ uint16(x86_xReadSlashR), - /*3945*/ uint16(x86_xArgR64), - /*3946*/ uint16(x86_xArgRM64), - /*3947*/ uint16(x86_xMatch), - /*3948*/ uint16(x86_xCondPrefix), 2, - 0x66, 3960, - 0x0, 3954, - /*3954*/ uint16(x86_xSetOp), uint16(x86_MOVMSKPS), - /*3956*/ uint16(x86_xReadSlashR), - /*3957*/ uint16(x86_xArgR32), - /*3958*/ uint16(x86_xArgXmm2), - /*3959*/ uint16(x86_xMatch), - /*3960*/ uint16(x86_xSetOp), uint16(x86_MOVMSKPD), - /*3962*/ uint16(x86_xReadSlashR), - /*3963*/ uint16(x86_xArgR32), - /*3964*/ uint16(x86_xArgXmm2), - /*3965*/ uint16(x86_xMatch), - /*3966*/ uint16(x86_xCondPrefix), 4, - 0xF3, 3994, - 0xF2, 3988, - 0x66, 3982, - 0x0, 3976, - /*3976*/ uint16(x86_xSetOp), uint16(x86_SQRTPS), - /*3978*/ uint16(x86_xReadSlashR), - /*3979*/ uint16(x86_xArgXmm1), - /*3980*/ uint16(x86_xArgXmm2M128), - /*3981*/ uint16(x86_xMatch), - /*3982*/ uint16(x86_xSetOp), uint16(x86_SQRTPD), - /*3984*/ uint16(x86_xReadSlashR), - /*3985*/ uint16(x86_xArgXmm1), - /*3986*/ uint16(x86_xArgXmm2M128), - /*3987*/ uint16(x86_xMatch), - /*3988*/ uint16(x86_xSetOp), uint16(x86_SQRTSD), - /*3990*/ uint16(x86_xReadSlashR), - /*3991*/ uint16(x86_xArgXmm1), - /*3992*/ uint16(x86_xArgXmm2M64), - /*3993*/ uint16(x86_xMatch), - /*3994*/ uint16(x86_xSetOp), uint16(x86_SQRTSS), - /*3996*/ uint16(x86_xReadSlashR), - /*3997*/ uint16(x86_xArgXmm1), - /*3998*/ uint16(x86_xArgXmm2M32), - /*3999*/ uint16(x86_xMatch), - /*4000*/ uint16(x86_xCondPrefix), 2, - 0xF3, 4012, - 0x0, 4006, - /*4006*/ uint16(x86_xSetOp), uint16(x86_RSQRTPS), - /*4008*/ uint16(x86_xReadSlashR), - /*4009*/ uint16(x86_xArgXmm1), - /*4010*/ uint16(x86_xArgXmm2M128), - /*4011*/ uint16(x86_xMatch), - /*4012*/ uint16(x86_xSetOp), uint16(x86_RSQRTSS), - /*4014*/ uint16(x86_xReadSlashR), - /*4015*/ uint16(x86_xArgXmm1), - /*4016*/ uint16(x86_xArgXmm2M32), - /*4017*/ uint16(x86_xMatch), - /*4018*/ uint16(x86_xCondPrefix), 2, - 0xF3, 4030, - 0x0, 4024, - /*4024*/ uint16(x86_xSetOp), uint16(x86_RCPPS), - /*4026*/ uint16(x86_xReadSlashR), - /*4027*/ uint16(x86_xArgXmm1), - /*4028*/ uint16(x86_xArgXmm2M128), - /*4029*/ uint16(x86_xMatch), - /*4030*/ uint16(x86_xSetOp), uint16(x86_RCPSS), - /*4032*/ uint16(x86_xReadSlashR), - /*4033*/ uint16(x86_xArgXmm1), - /*4034*/ uint16(x86_xArgXmm2M32), - /*4035*/ uint16(x86_xMatch), - /*4036*/ uint16(x86_xCondPrefix), 2, - 0x66, 4048, - 0x0, 4042, - /*4042*/ uint16(x86_xSetOp), uint16(x86_ANDPS), - /*4044*/ uint16(x86_xReadSlashR), - /*4045*/ uint16(x86_xArgXmm1), - /*4046*/ uint16(x86_xArgXmm2M128), - /*4047*/ uint16(x86_xMatch), - /*4048*/ uint16(x86_xSetOp), uint16(x86_ANDPD), - /*4050*/ uint16(x86_xReadSlashR), - /*4051*/ uint16(x86_xArgXmm1), - /*4052*/ uint16(x86_xArgXmm2M128), - /*4053*/ uint16(x86_xMatch), - /*4054*/ uint16(x86_xCondPrefix), 2, - 0x66, 4066, - 0x0, 4060, - /*4060*/ uint16(x86_xSetOp), uint16(x86_ANDNPS), - /*4062*/ uint16(x86_xReadSlashR), - /*4063*/ uint16(x86_xArgXmm1), - /*4064*/ uint16(x86_xArgXmm2M128), - /*4065*/ uint16(x86_xMatch), - /*4066*/ uint16(x86_xSetOp), uint16(x86_ANDNPD), - /*4068*/ uint16(x86_xReadSlashR), - /*4069*/ uint16(x86_xArgXmm1), - /*4070*/ uint16(x86_xArgXmm2M128), - /*4071*/ uint16(x86_xMatch), - /*4072*/ uint16(x86_xCondPrefix), 2, - 0x66, 4084, - 0x0, 4078, - /*4078*/ uint16(x86_xSetOp), uint16(x86_ORPS), - /*4080*/ uint16(x86_xReadSlashR), - /*4081*/ uint16(x86_xArgXmm1), - /*4082*/ uint16(x86_xArgXmm2M128), - /*4083*/ uint16(x86_xMatch), - /*4084*/ uint16(x86_xSetOp), uint16(x86_ORPD), - /*4086*/ uint16(x86_xReadSlashR), - /*4087*/ uint16(x86_xArgXmm1), - /*4088*/ uint16(x86_xArgXmm2M128), - /*4089*/ uint16(x86_xMatch), - /*4090*/ uint16(x86_xCondPrefix), 2, - 0x66, 4102, - 0x0, 4096, - /*4096*/ uint16(x86_xSetOp), uint16(x86_XORPS), - /*4098*/ uint16(x86_xReadSlashR), - /*4099*/ uint16(x86_xArgXmm1), - /*4100*/ uint16(x86_xArgXmm2M128), - /*4101*/ uint16(x86_xMatch), - /*4102*/ uint16(x86_xSetOp), uint16(x86_XORPD), - /*4104*/ uint16(x86_xReadSlashR), - /*4105*/ uint16(x86_xArgXmm1), - /*4106*/ uint16(x86_xArgXmm2M128), - /*4107*/ uint16(x86_xMatch), - /*4108*/ uint16(x86_xCondPrefix), 4, - 0xF3, 4136, - 0xF2, 4130, - 0x66, 4124, - 0x0, 4118, - /*4118*/ uint16(x86_xSetOp), uint16(x86_ADDPS), - /*4120*/ uint16(x86_xReadSlashR), - /*4121*/ uint16(x86_xArgXmm1), - /*4122*/ uint16(x86_xArgXmm2M128), - /*4123*/ uint16(x86_xMatch), - /*4124*/ uint16(x86_xSetOp), uint16(x86_ADDPD), - /*4126*/ uint16(x86_xReadSlashR), - /*4127*/ uint16(x86_xArgXmm1), - /*4128*/ uint16(x86_xArgXmm2M128), - /*4129*/ uint16(x86_xMatch), - /*4130*/ uint16(x86_xSetOp), uint16(x86_ADDSD), - /*4132*/ uint16(x86_xReadSlashR), - /*4133*/ uint16(x86_xArgXmm1), - /*4134*/ uint16(x86_xArgXmm2M64), - /*4135*/ uint16(x86_xMatch), - /*4136*/ uint16(x86_xSetOp), uint16(x86_ADDSS), - /*4138*/ uint16(x86_xReadSlashR), - /*4139*/ uint16(x86_xArgXmm1), - /*4140*/ uint16(x86_xArgXmm2M32), - /*4141*/ uint16(x86_xMatch), - /*4142*/ uint16(x86_xCondPrefix), 4, - 0xF3, 4170, - 0xF2, 4164, - 0x66, 4158, - 0x0, 4152, - /*4152*/ uint16(x86_xSetOp), uint16(x86_MULPS), - /*4154*/ uint16(x86_xReadSlashR), - /*4155*/ uint16(x86_xArgXmm1), - /*4156*/ uint16(x86_xArgXmm2M128), - /*4157*/ uint16(x86_xMatch), - /*4158*/ uint16(x86_xSetOp), uint16(x86_MULPD), - /*4160*/ uint16(x86_xReadSlashR), - /*4161*/ uint16(x86_xArgXmm1), - /*4162*/ uint16(x86_xArgXmm2M128), - /*4163*/ uint16(x86_xMatch), - /*4164*/ uint16(x86_xSetOp), uint16(x86_MULSD), - /*4166*/ uint16(x86_xReadSlashR), - /*4167*/ uint16(x86_xArgXmm1), - /*4168*/ uint16(x86_xArgXmm2M64), - /*4169*/ uint16(x86_xMatch), - /*4170*/ uint16(x86_xSetOp), uint16(x86_MULSS), - /*4172*/ uint16(x86_xReadSlashR), - /*4173*/ uint16(x86_xArgXmm1), - /*4174*/ uint16(x86_xArgXmm2M32), - /*4175*/ uint16(x86_xMatch), - /*4176*/ uint16(x86_xCondPrefix), 4, - 0xF3, 4204, - 0xF2, 4198, - 0x66, 4192, - 0x0, 4186, - /*4186*/ uint16(x86_xSetOp), uint16(x86_CVTPS2PD), - /*4188*/ uint16(x86_xReadSlashR), - /*4189*/ uint16(x86_xArgXmm1), - /*4190*/ uint16(x86_xArgXmm2M64), - /*4191*/ uint16(x86_xMatch), - /*4192*/ uint16(x86_xSetOp), uint16(x86_CVTPD2PS), - /*4194*/ uint16(x86_xReadSlashR), - /*4195*/ uint16(x86_xArgXmm1), - /*4196*/ uint16(x86_xArgXmm2M128), - /*4197*/ uint16(x86_xMatch), - /*4198*/ uint16(x86_xSetOp), uint16(x86_CVTSD2SS), - /*4200*/ uint16(x86_xReadSlashR), - /*4201*/ uint16(x86_xArgXmm1), - /*4202*/ uint16(x86_xArgXmm2M64), - /*4203*/ uint16(x86_xMatch), - /*4204*/ uint16(x86_xSetOp), uint16(x86_CVTSS2SD), - /*4206*/ uint16(x86_xReadSlashR), - /*4207*/ uint16(x86_xArgXmm1), - /*4208*/ uint16(x86_xArgXmm2M32), - /*4209*/ uint16(x86_xMatch), - /*4210*/ uint16(x86_xCondPrefix), 3, - 0xF3, 4230, - 0x66, 4224, - 0x0, 4218, - /*4218*/ uint16(x86_xSetOp), uint16(x86_CVTDQ2PS), - /*4220*/ uint16(x86_xReadSlashR), - /*4221*/ uint16(x86_xArgXmm1), - /*4222*/ uint16(x86_xArgXmm2M128), - /*4223*/ uint16(x86_xMatch), - /*4224*/ uint16(x86_xSetOp), uint16(x86_CVTPS2DQ), - /*4226*/ uint16(x86_xReadSlashR), - /*4227*/ uint16(x86_xArgXmm1), - /*4228*/ uint16(x86_xArgXmm2M128), - /*4229*/ uint16(x86_xMatch), - /*4230*/ uint16(x86_xSetOp), uint16(x86_CVTTPS2DQ), - /*4232*/ uint16(x86_xReadSlashR), - /*4233*/ uint16(x86_xArgXmm1), - /*4234*/ uint16(x86_xArgXmm2M128), - /*4235*/ uint16(x86_xMatch), - /*4236*/ uint16(x86_xCondPrefix), 4, - 0xF3, 4264, - 0xF2, 4258, - 0x66, 4252, - 0x0, 4246, - /*4246*/ uint16(x86_xSetOp), uint16(x86_SUBPS), - /*4248*/ uint16(x86_xReadSlashR), - /*4249*/ uint16(x86_xArgXmm1), - /*4250*/ uint16(x86_xArgXmm2M128), - /*4251*/ uint16(x86_xMatch), - /*4252*/ uint16(x86_xSetOp), uint16(x86_SUBPD), - /*4254*/ uint16(x86_xReadSlashR), - /*4255*/ uint16(x86_xArgXmm1), - /*4256*/ uint16(x86_xArgXmm2M128), - /*4257*/ uint16(x86_xMatch), - /*4258*/ uint16(x86_xSetOp), uint16(x86_SUBSD), - /*4260*/ uint16(x86_xReadSlashR), - /*4261*/ uint16(x86_xArgXmm1), - /*4262*/ uint16(x86_xArgXmm2M64), - /*4263*/ uint16(x86_xMatch), - /*4264*/ uint16(x86_xSetOp), uint16(x86_SUBSS), - /*4266*/ uint16(x86_xReadSlashR), - /*4267*/ uint16(x86_xArgXmm1), - /*4268*/ uint16(x86_xArgXmm2M32), - /*4269*/ uint16(x86_xMatch), - /*4270*/ uint16(x86_xCondPrefix), 4, - 0xF3, 4298, - 0xF2, 4292, - 0x66, 4286, - 0x0, 4280, - /*4280*/ uint16(x86_xSetOp), uint16(x86_MINPS), - /*4282*/ uint16(x86_xReadSlashR), - /*4283*/ uint16(x86_xArgXmm1), - /*4284*/ uint16(x86_xArgXmm2M128), - /*4285*/ uint16(x86_xMatch), - /*4286*/ uint16(x86_xSetOp), uint16(x86_MINPD), - /*4288*/ uint16(x86_xReadSlashR), - /*4289*/ uint16(x86_xArgXmm1), - /*4290*/ uint16(x86_xArgXmm2M128), - /*4291*/ uint16(x86_xMatch), - /*4292*/ uint16(x86_xSetOp), uint16(x86_MINSD), - /*4294*/ uint16(x86_xReadSlashR), - /*4295*/ uint16(x86_xArgXmm1), - /*4296*/ uint16(x86_xArgXmm2M64), - /*4297*/ uint16(x86_xMatch), - /*4298*/ uint16(x86_xSetOp), uint16(x86_MINSS), - /*4300*/ uint16(x86_xReadSlashR), - /*4301*/ uint16(x86_xArgXmm1), - /*4302*/ uint16(x86_xArgXmm2M32), - /*4303*/ uint16(x86_xMatch), - /*4304*/ uint16(x86_xCondPrefix), 4, - 0xF3, 4332, - 0xF2, 4326, - 0x66, 4320, - 0x0, 4314, - /*4314*/ uint16(x86_xSetOp), uint16(x86_DIVPS), - /*4316*/ uint16(x86_xReadSlashR), - /*4317*/ uint16(x86_xArgXmm1), - /*4318*/ uint16(x86_xArgXmm2M128), - /*4319*/ uint16(x86_xMatch), - /*4320*/ uint16(x86_xSetOp), uint16(x86_DIVPD), - /*4322*/ uint16(x86_xReadSlashR), - /*4323*/ uint16(x86_xArgXmm1), - /*4324*/ uint16(x86_xArgXmm2M128), - /*4325*/ uint16(x86_xMatch), - /*4326*/ uint16(x86_xSetOp), uint16(x86_DIVSD), - /*4328*/ uint16(x86_xReadSlashR), - /*4329*/ uint16(x86_xArgXmm1), - /*4330*/ uint16(x86_xArgXmm2M64), - /*4331*/ uint16(x86_xMatch), - /*4332*/ uint16(x86_xSetOp), uint16(x86_DIVSS), - /*4334*/ uint16(x86_xReadSlashR), - /*4335*/ uint16(x86_xArgXmm1), - /*4336*/ uint16(x86_xArgXmm2M32), - /*4337*/ uint16(x86_xMatch), - /*4338*/ uint16(x86_xCondPrefix), 4, - 0xF3, 4366, - 0xF2, 4360, - 0x66, 4354, - 0x0, 4348, - /*4348*/ uint16(x86_xSetOp), uint16(x86_MAXPS), - /*4350*/ uint16(x86_xReadSlashR), - /*4351*/ uint16(x86_xArgXmm1), - /*4352*/ uint16(x86_xArgXmm2M128), - /*4353*/ uint16(x86_xMatch), - /*4354*/ uint16(x86_xSetOp), uint16(x86_MAXPD), - /*4356*/ uint16(x86_xReadSlashR), - /*4357*/ uint16(x86_xArgXmm1), - /*4358*/ uint16(x86_xArgXmm2M128), - /*4359*/ uint16(x86_xMatch), - /*4360*/ uint16(x86_xSetOp), uint16(x86_MAXSD), - /*4362*/ uint16(x86_xReadSlashR), - /*4363*/ uint16(x86_xArgXmm1), - /*4364*/ uint16(x86_xArgXmm2M64), - /*4365*/ uint16(x86_xMatch), - /*4366*/ uint16(x86_xSetOp), uint16(x86_MAXSS), - /*4368*/ uint16(x86_xReadSlashR), - /*4369*/ uint16(x86_xArgXmm1), - /*4370*/ uint16(x86_xArgXmm2M32), - /*4371*/ uint16(x86_xMatch), - /*4372*/ uint16(x86_xCondPrefix), 2, - 0x66, 4384, - 0x0, 4378, - /*4378*/ uint16(x86_xSetOp), uint16(x86_PUNPCKLBW), - /*4380*/ uint16(x86_xReadSlashR), - /*4381*/ uint16(x86_xArgMm), - /*4382*/ uint16(x86_xArgMmM32), - /*4383*/ uint16(x86_xMatch), - /*4384*/ uint16(x86_xSetOp), uint16(x86_PUNPCKLBW), - /*4386*/ uint16(x86_xReadSlashR), - /*4387*/ uint16(x86_xArgXmm1), - /*4388*/ uint16(x86_xArgXmm2M128), - /*4389*/ uint16(x86_xMatch), - /*4390*/ uint16(x86_xCondPrefix), 2, - 0x66, 4402, - 0x0, 4396, - /*4396*/ uint16(x86_xSetOp), uint16(x86_PUNPCKLWD), - /*4398*/ uint16(x86_xReadSlashR), - /*4399*/ uint16(x86_xArgMm), - /*4400*/ uint16(x86_xArgMmM32), - /*4401*/ uint16(x86_xMatch), - /*4402*/ uint16(x86_xSetOp), uint16(x86_PUNPCKLWD), - /*4404*/ uint16(x86_xReadSlashR), - /*4405*/ uint16(x86_xArgXmm1), - /*4406*/ uint16(x86_xArgXmm2M128), - /*4407*/ uint16(x86_xMatch), - /*4408*/ uint16(x86_xCondPrefix), 2, - 0x66, 4420, - 0x0, 4414, - /*4414*/ uint16(x86_xSetOp), uint16(x86_PUNPCKLDQ), - /*4416*/ uint16(x86_xReadSlashR), - /*4417*/ uint16(x86_xArgMm), - /*4418*/ uint16(x86_xArgMmM32), - /*4419*/ uint16(x86_xMatch), - /*4420*/ uint16(x86_xSetOp), uint16(x86_PUNPCKLDQ), - /*4422*/ uint16(x86_xReadSlashR), - /*4423*/ uint16(x86_xArgXmm1), - /*4424*/ uint16(x86_xArgXmm2M128), - /*4425*/ uint16(x86_xMatch), - /*4426*/ uint16(x86_xCondPrefix), 2, - 0x66, 4438, - 0x0, 4432, - /*4432*/ uint16(x86_xSetOp), uint16(x86_PACKSSWB), - /*4434*/ uint16(x86_xReadSlashR), - /*4435*/ uint16(x86_xArgMm1), - /*4436*/ uint16(x86_xArgMm2M64), - /*4437*/ uint16(x86_xMatch), - /*4438*/ uint16(x86_xSetOp), uint16(x86_PACKSSWB), - /*4440*/ uint16(x86_xReadSlashR), - /*4441*/ uint16(x86_xArgXmm1), - /*4442*/ uint16(x86_xArgXmm2M128), - /*4443*/ uint16(x86_xMatch), - /*4444*/ uint16(x86_xCondPrefix), 2, - 0x66, 4456, - 0x0, 4450, - /*4450*/ uint16(x86_xSetOp), uint16(x86_PCMPGTB), - /*4452*/ uint16(x86_xReadSlashR), - /*4453*/ uint16(x86_xArgMm), - /*4454*/ uint16(x86_xArgMmM64), - /*4455*/ uint16(x86_xMatch), - /*4456*/ uint16(x86_xSetOp), uint16(x86_PCMPGTB), - /*4458*/ uint16(x86_xReadSlashR), - /*4459*/ uint16(x86_xArgXmm1), - /*4460*/ uint16(x86_xArgXmm2M128), - /*4461*/ uint16(x86_xMatch), - /*4462*/ uint16(x86_xCondPrefix), 2, - 0x66, 4474, - 0x0, 4468, - /*4468*/ uint16(x86_xSetOp), uint16(x86_PCMPGTW), - /*4470*/ uint16(x86_xReadSlashR), - /*4471*/ uint16(x86_xArgMm), - /*4472*/ uint16(x86_xArgMmM64), - /*4473*/ uint16(x86_xMatch), - /*4474*/ uint16(x86_xSetOp), uint16(x86_PCMPGTW), - /*4476*/ uint16(x86_xReadSlashR), - /*4477*/ uint16(x86_xArgXmm1), - /*4478*/ uint16(x86_xArgXmm2M128), - /*4479*/ uint16(x86_xMatch), - /*4480*/ uint16(x86_xCondPrefix), 2, - 0x66, 4492, - 0x0, 4486, - /*4486*/ uint16(x86_xSetOp), uint16(x86_PCMPGTD), - /*4488*/ uint16(x86_xReadSlashR), - /*4489*/ uint16(x86_xArgMm), - /*4490*/ uint16(x86_xArgMmM64), - /*4491*/ uint16(x86_xMatch), - /*4492*/ uint16(x86_xSetOp), uint16(x86_PCMPGTD), - /*4494*/ uint16(x86_xReadSlashR), - /*4495*/ uint16(x86_xArgXmm1), - /*4496*/ uint16(x86_xArgXmm2M128), - /*4497*/ uint16(x86_xMatch), - /*4498*/ uint16(x86_xCondPrefix), 2, - 0x66, 4510, - 0x0, 4504, - /*4504*/ uint16(x86_xSetOp), uint16(x86_PACKUSWB), - /*4506*/ uint16(x86_xReadSlashR), - /*4507*/ uint16(x86_xArgMm), - /*4508*/ uint16(x86_xArgMmM64), - /*4509*/ uint16(x86_xMatch), - /*4510*/ uint16(x86_xSetOp), uint16(x86_PACKUSWB), - /*4512*/ uint16(x86_xReadSlashR), - /*4513*/ uint16(x86_xArgXmm1), - /*4514*/ uint16(x86_xArgXmm2M128), - /*4515*/ uint16(x86_xMatch), - /*4516*/ uint16(x86_xCondPrefix), 2, - 0x66, 4528, - 0x0, 4522, - /*4522*/ uint16(x86_xSetOp), uint16(x86_PUNPCKHBW), - /*4524*/ uint16(x86_xReadSlashR), - /*4525*/ uint16(x86_xArgMm), - /*4526*/ uint16(x86_xArgMmM64), - /*4527*/ uint16(x86_xMatch), - /*4528*/ uint16(x86_xSetOp), uint16(x86_PUNPCKHBW), - /*4530*/ uint16(x86_xReadSlashR), - /*4531*/ uint16(x86_xArgXmm1), - /*4532*/ uint16(x86_xArgXmm2M128), - /*4533*/ uint16(x86_xMatch), - /*4534*/ uint16(x86_xCondPrefix), 2, - 0x66, 4546, - 0x0, 4540, - /*4540*/ uint16(x86_xSetOp), uint16(x86_PUNPCKHWD), - /*4542*/ uint16(x86_xReadSlashR), - /*4543*/ uint16(x86_xArgMm), - /*4544*/ uint16(x86_xArgMmM64), - /*4545*/ uint16(x86_xMatch), - /*4546*/ uint16(x86_xSetOp), uint16(x86_PUNPCKHWD), - /*4548*/ uint16(x86_xReadSlashR), - /*4549*/ uint16(x86_xArgXmm1), - /*4550*/ uint16(x86_xArgXmm2M128), - /*4551*/ uint16(x86_xMatch), - /*4552*/ uint16(x86_xCondPrefix), 2, - 0x66, 4564, - 0x0, 4558, - /*4558*/ uint16(x86_xSetOp), uint16(x86_PUNPCKHDQ), - /*4560*/ uint16(x86_xReadSlashR), - /*4561*/ uint16(x86_xArgMm), - /*4562*/ uint16(x86_xArgMmM64), - /*4563*/ uint16(x86_xMatch), - /*4564*/ uint16(x86_xSetOp), uint16(x86_PUNPCKHDQ), - /*4566*/ uint16(x86_xReadSlashR), - /*4567*/ uint16(x86_xArgXmm1), - /*4568*/ uint16(x86_xArgXmm2M128), - /*4569*/ uint16(x86_xMatch), - /*4570*/ uint16(x86_xCondPrefix), 2, - 0x66, 4582, - 0x0, 4576, - /*4576*/ uint16(x86_xSetOp), uint16(x86_PACKSSDW), - /*4578*/ uint16(x86_xReadSlashR), - /*4579*/ uint16(x86_xArgMm1), - /*4580*/ uint16(x86_xArgMm2M64), - /*4581*/ uint16(x86_xMatch), - /*4582*/ uint16(x86_xSetOp), uint16(x86_PACKSSDW), - /*4584*/ uint16(x86_xReadSlashR), - /*4585*/ uint16(x86_xArgXmm1), - /*4586*/ uint16(x86_xArgXmm2M128), - /*4587*/ uint16(x86_xMatch), - /*4588*/ uint16(x86_xCondPrefix), 1, - 0x66, 4592, - /*4592*/ uint16(x86_xSetOp), uint16(x86_PUNPCKLQDQ), - /*4594*/ uint16(x86_xReadSlashR), - /*4595*/ uint16(x86_xArgXmm1), - /*4596*/ uint16(x86_xArgXmm2M128), - /*4597*/ uint16(x86_xMatch), - /*4598*/ uint16(x86_xCondPrefix), 1, - 0x66, 4602, - /*4602*/ uint16(x86_xSetOp), uint16(x86_PUNPCKHQDQ), - /*4604*/ uint16(x86_xReadSlashR), - /*4605*/ uint16(x86_xArgXmm1), - /*4606*/ uint16(x86_xArgXmm2M128), - /*4607*/ uint16(x86_xMatch), - /*4608*/ uint16(x86_xCondIs64), 4611, 4649, - /*4611*/ uint16(x86_xCondPrefix), 2, - 0x66, 4633, - 0x0, 4617, - /*4617*/ uint16(x86_xCondDataSize), 4621, 4627, 0, - /*4621*/ uint16(x86_xSetOp), uint16(x86_MOVD), - /*4623*/ uint16(x86_xReadSlashR), - /*4624*/ uint16(x86_xArgMm), - /*4625*/ uint16(x86_xArgRM32), - /*4626*/ uint16(x86_xMatch), - /*4627*/ uint16(x86_xSetOp), uint16(x86_MOVD), - /*4629*/ uint16(x86_xReadSlashR), - /*4630*/ uint16(x86_xArgMm), - /*4631*/ uint16(x86_xArgRM32), - /*4632*/ uint16(x86_xMatch), - /*4633*/ uint16(x86_xCondDataSize), 4637, 4643, 0, - /*4637*/ uint16(x86_xSetOp), uint16(x86_MOVD), - /*4639*/ uint16(x86_xReadSlashR), - /*4640*/ uint16(x86_xArgXmm), - /*4641*/ uint16(x86_xArgRM32), - /*4642*/ uint16(x86_xMatch), - /*4643*/ uint16(x86_xSetOp), uint16(x86_MOVD), - /*4645*/ uint16(x86_xReadSlashR), - /*4646*/ uint16(x86_xArgXmm), - /*4647*/ uint16(x86_xArgRM32), - /*4648*/ uint16(x86_xMatch), - /*4649*/ uint16(x86_xCondPrefix), 2, - 0x66, 4665, - 0x0, 4655, - /*4655*/ uint16(x86_xCondDataSize), 4621, 4627, 4659, - /*4659*/ uint16(x86_xSetOp), uint16(x86_MOVQ), - /*4661*/ uint16(x86_xReadSlashR), - /*4662*/ uint16(x86_xArgMm), - /*4663*/ uint16(x86_xArgRM64), - /*4664*/ uint16(x86_xMatch), - /*4665*/ uint16(x86_xCondDataSize), 4637, 4643, 4669, - /*4669*/ uint16(x86_xSetOp), uint16(x86_MOVQ), - /*4671*/ uint16(x86_xReadSlashR), - /*4672*/ uint16(x86_xArgXmm), - /*4673*/ uint16(x86_xArgRM64), - /*4674*/ uint16(x86_xMatch), - /*4675*/ uint16(x86_xCondPrefix), 3, - 0xF3, 4695, - 0x66, 4689, - 0x0, 4683, - /*4683*/ uint16(x86_xSetOp), uint16(x86_MOVQ), - /*4685*/ uint16(x86_xReadSlashR), - /*4686*/ uint16(x86_xArgMm), - /*4687*/ uint16(x86_xArgMmM64), - /*4688*/ uint16(x86_xMatch), - /*4689*/ uint16(x86_xSetOp), uint16(x86_MOVDQA), - /*4691*/ uint16(x86_xReadSlashR), - /*4692*/ uint16(x86_xArgXmm1), - /*4693*/ uint16(x86_xArgXmm2M128), - /*4694*/ uint16(x86_xMatch), - /*4695*/ uint16(x86_xSetOp), uint16(x86_MOVDQU), - /*4697*/ uint16(x86_xReadSlashR), - /*4698*/ uint16(x86_xArgXmm1), - /*4699*/ uint16(x86_xArgXmm2M128), - /*4700*/ uint16(x86_xMatch), - /*4701*/ uint16(x86_xCondPrefix), 4, - 0xF3, 4735, - 0xF2, 4727, - 0x66, 4719, - 0x0, 4711, - /*4711*/ uint16(x86_xSetOp), uint16(x86_PSHUFW), - /*4713*/ uint16(x86_xReadSlashR), - /*4714*/ uint16(x86_xReadIb), - /*4715*/ uint16(x86_xArgMm1), - /*4716*/ uint16(x86_xArgMm2M64), - /*4717*/ uint16(x86_xArgImm8u), - /*4718*/ uint16(x86_xMatch), - /*4719*/ uint16(x86_xSetOp), uint16(x86_PSHUFD), - /*4721*/ uint16(x86_xReadSlashR), - /*4722*/ uint16(x86_xReadIb), - /*4723*/ uint16(x86_xArgXmm1), - /*4724*/ uint16(x86_xArgXmm2M128), - /*4725*/ uint16(x86_xArgImm8u), - /*4726*/ uint16(x86_xMatch), - /*4727*/ uint16(x86_xSetOp), uint16(x86_PSHUFLW), - /*4729*/ uint16(x86_xReadSlashR), - /*4730*/ uint16(x86_xReadIb), - /*4731*/ uint16(x86_xArgXmm1), - /*4732*/ uint16(x86_xArgXmm2M128), - /*4733*/ uint16(x86_xArgImm8u), - /*4734*/ uint16(x86_xMatch), - /*4735*/ uint16(x86_xSetOp), uint16(x86_PSHUFHW), - /*4737*/ uint16(x86_xReadSlashR), - /*4738*/ uint16(x86_xReadIb), - /*4739*/ uint16(x86_xArgXmm1), - /*4740*/ uint16(x86_xArgXmm2M128), - /*4741*/ uint16(x86_xArgImm8u), - /*4742*/ uint16(x86_xMatch), - /*4743*/ uint16(x86_xCondSlashR), - 0, // 0 - 0, // 1 - 4752, // 2 - 0, // 3 - 4770, // 4 - 0, // 5 - 4788, // 6 - 0, // 7 - /*4752*/ uint16(x86_xCondPrefix), 2, - 0x66, 4764, - 0x0, 4758, - /*4758*/ uint16(x86_xSetOp), uint16(x86_PSRLW), - /*4760*/ uint16(x86_xReadIb), - /*4761*/ uint16(x86_xArgMm2), - /*4762*/ uint16(x86_xArgImm8u), - /*4763*/ uint16(x86_xMatch), - /*4764*/ uint16(x86_xSetOp), uint16(x86_PSRLW), - /*4766*/ uint16(x86_xReadIb), - /*4767*/ uint16(x86_xArgXmm2), - /*4768*/ uint16(x86_xArgImm8u), - /*4769*/ uint16(x86_xMatch), - /*4770*/ uint16(x86_xCondPrefix), 2, - 0x66, 4782, - 0x0, 4776, - /*4776*/ uint16(x86_xSetOp), uint16(x86_PSRAW), - /*4778*/ uint16(x86_xReadIb), - /*4779*/ uint16(x86_xArgMm2), - /*4780*/ uint16(x86_xArgImm8u), - /*4781*/ uint16(x86_xMatch), - /*4782*/ uint16(x86_xSetOp), uint16(x86_PSRAW), - /*4784*/ uint16(x86_xReadIb), - /*4785*/ uint16(x86_xArgXmm2), - /*4786*/ uint16(x86_xArgImm8u), - /*4787*/ uint16(x86_xMatch), - /*4788*/ uint16(x86_xCondPrefix), 2, - 0x66, 4800, - 0x0, 4794, - /*4794*/ uint16(x86_xSetOp), uint16(x86_PSLLW), - /*4796*/ uint16(x86_xReadIb), - /*4797*/ uint16(x86_xArgMm2), - /*4798*/ uint16(x86_xArgImm8u), - /*4799*/ uint16(x86_xMatch), - /*4800*/ uint16(x86_xSetOp), uint16(x86_PSLLW), - /*4802*/ uint16(x86_xReadIb), - /*4803*/ uint16(x86_xArgXmm2), - /*4804*/ uint16(x86_xArgImm8u), - /*4805*/ uint16(x86_xMatch), - /*4806*/ uint16(x86_xCondSlashR), - 0, // 0 - 0, // 1 - 4815, // 2 - 0, // 3 - 4833, // 4 - 0, // 5 - 4851, // 6 - 0, // 7 - /*4815*/ uint16(x86_xCondPrefix), 2, - 0x66, 4827, - 0x0, 4821, - /*4821*/ uint16(x86_xSetOp), uint16(x86_PSRLD), - /*4823*/ uint16(x86_xReadIb), - /*4824*/ uint16(x86_xArgMm2), - /*4825*/ uint16(x86_xArgImm8u), - /*4826*/ uint16(x86_xMatch), - /*4827*/ uint16(x86_xSetOp), uint16(x86_PSRLD), - /*4829*/ uint16(x86_xReadIb), - /*4830*/ uint16(x86_xArgXmm2), - /*4831*/ uint16(x86_xArgImm8u), - /*4832*/ uint16(x86_xMatch), - /*4833*/ uint16(x86_xCondPrefix), 2, - 0x66, 4845, - 0x0, 4839, - /*4839*/ uint16(x86_xSetOp), uint16(x86_PSRAD), - /*4841*/ uint16(x86_xReadIb), - /*4842*/ uint16(x86_xArgMm2), - /*4843*/ uint16(x86_xArgImm8u), - /*4844*/ uint16(x86_xMatch), - /*4845*/ uint16(x86_xSetOp), uint16(x86_PSRAD), - /*4847*/ uint16(x86_xReadIb), - /*4848*/ uint16(x86_xArgXmm2), - /*4849*/ uint16(x86_xArgImm8u), - /*4850*/ uint16(x86_xMatch), - /*4851*/ uint16(x86_xCondPrefix), 2, - 0x66, 4863, - 0x0, 4857, - /*4857*/ uint16(x86_xSetOp), uint16(x86_PSLLD), - /*4859*/ uint16(x86_xReadIb), - /*4860*/ uint16(x86_xArgMm2), - /*4861*/ uint16(x86_xArgImm8u), - /*4862*/ uint16(x86_xMatch), - /*4863*/ uint16(x86_xSetOp), uint16(x86_PSLLD), - /*4865*/ uint16(x86_xReadIb), - /*4866*/ uint16(x86_xArgXmm2), - /*4867*/ uint16(x86_xArgImm8u), - /*4868*/ uint16(x86_xMatch), - /*4869*/ uint16(x86_xCondSlashR), - 0, // 0 - 0, // 1 - 4878, // 2 - 4896, // 3 - 0, // 4 - 0, // 5 - 4906, // 6 - 4924, // 7 - /*4878*/ uint16(x86_xCondPrefix), 2, - 0x66, 4890, - 0x0, 4884, - /*4884*/ uint16(x86_xSetOp), uint16(x86_PSRLQ), - /*4886*/ uint16(x86_xReadIb), - /*4887*/ uint16(x86_xArgMm2), - /*4888*/ uint16(x86_xArgImm8u), - /*4889*/ uint16(x86_xMatch), - /*4890*/ uint16(x86_xSetOp), uint16(x86_PSRLQ), - /*4892*/ uint16(x86_xReadIb), - /*4893*/ uint16(x86_xArgXmm2), - /*4894*/ uint16(x86_xArgImm8u), - /*4895*/ uint16(x86_xMatch), - /*4896*/ uint16(x86_xCondPrefix), 1, - 0x66, 4900, - /*4900*/ uint16(x86_xSetOp), uint16(x86_PSRLDQ), - /*4902*/ uint16(x86_xReadIb), - /*4903*/ uint16(x86_xArgXmm2), - /*4904*/ uint16(x86_xArgImm8u), - /*4905*/ uint16(x86_xMatch), - /*4906*/ uint16(x86_xCondPrefix), 2, - 0x66, 4918, - 0x0, 4912, - /*4912*/ uint16(x86_xSetOp), uint16(x86_PSLLQ), - /*4914*/ uint16(x86_xReadIb), - /*4915*/ uint16(x86_xArgMm2), - /*4916*/ uint16(x86_xArgImm8u), - /*4917*/ uint16(x86_xMatch), - /*4918*/ uint16(x86_xSetOp), uint16(x86_PSLLQ), - /*4920*/ uint16(x86_xReadIb), - /*4921*/ uint16(x86_xArgXmm2), - /*4922*/ uint16(x86_xArgImm8u), - /*4923*/ uint16(x86_xMatch), - /*4924*/ uint16(x86_xCondPrefix), 1, - 0x66, 4928, - /*4928*/ uint16(x86_xSetOp), uint16(x86_PSLLDQ), - /*4930*/ uint16(x86_xReadIb), - /*4931*/ uint16(x86_xArgXmm2), - /*4932*/ uint16(x86_xArgImm8u), - /*4933*/ uint16(x86_xMatch), - /*4934*/ uint16(x86_xCondPrefix), 2, - 0x66, 4946, - 0x0, 4940, - /*4940*/ uint16(x86_xSetOp), uint16(x86_PCMPEQB), - /*4942*/ uint16(x86_xReadSlashR), - /*4943*/ uint16(x86_xArgMm), - /*4944*/ uint16(x86_xArgMmM64), - /*4945*/ uint16(x86_xMatch), - /*4946*/ uint16(x86_xSetOp), uint16(x86_PCMPEQB), - /*4948*/ uint16(x86_xReadSlashR), - /*4949*/ uint16(x86_xArgXmm1), - /*4950*/ uint16(x86_xArgXmm2M128), - /*4951*/ uint16(x86_xMatch), - /*4952*/ uint16(x86_xCondPrefix), 2, - 0x66, 4964, - 0x0, 4958, - /*4958*/ uint16(x86_xSetOp), uint16(x86_PCMPEQW), - /*4960*/ uint16(x86_xReadSlashR), - /*4961*/ uint16(x86_xArgMm), - /*4962*/ uint16(x86_xArgMmM64), - /*4963*/ uint16(x86_xMatch), - /*4964*/ uint16(x86_xSetOp), uint16(x86_PCMPEQW), - /*4966*/ uint16(x86_xReadSlashR), - /*4967*/ uint16(x86_xArgXmm1), - /*4968*/ uint16(x86_xArgXmm2M128), - /*4969*/ uint16(x86_xMatch), - /*4970*/ uint16(x86_xCondPrefix), 2, - 0x66, 4982, - 0x0, 4976, - /*4976*/ uint16(x86_xSetOp), uint16(x86_PCMPEQD), - /*4978*/ uint16(x86_xReadSlashR), - /*4979*/ uint16(x86_xArgMm), - /*4980*/ uint16(x86_xArgMmM64), - /*4981*/ uint16(x86_xMatch), - /*4982*/ uint16(x86_xSetOp), uint16(x86_PCMPEQD), - /*4984*/ uint16(x86_xReadSlashR), - /*4985*/ uint16(x86_xArgXmm1), - /*4986*/ uint16(x86_xArgXmm2M128), - /*4987*/ uint16(x86_xMatch), - /*4988*/ uint16(x86_xSetOp), uint16(x86_EMMS), - /*4990*/ uint16(x86_xMatch), - /*4991*/ uint16(x86_xCondPrefix), 2, - 0xF2, 5003, - 0x66, 4997, - /*4997*/ uint16(x86_xSetOp), uint16(x86_HADDPD), - /*4999*/ uint16(x86_xReadSlashR), - /*5000*/ uint16(x86_xArgXmm1), - /*5001*/ uint16(x86_xArgXmm2M128), - /*5002*/ uint16(x86_xMatch), - /*5003*/ uint16(x86_xSetOp), uint16(x86_HADDPS), - /*5005*/ uint16(x86_xReadSlashR), - /*5006*/ uint16(x86_xArgXmm1), - /*5007*/ uint16(x86_xArgXmm2M128), - /*5008*/ uint16(x86_xMatch), - /*5009*/ uint16(x86_xCondPrefix), 2, - 0xF2, 5021, - 0x66, 5015, - /*5015*/ uint16(x86_xSetOp), uint16(x86_HSUBPD), - /*5017*/ uint16(x86_xReadSlashR), - /*5018*/ uint16(x86_xArgXmm1), - /*5019*/ uint16(x86_xArgXmm2M128), - /*5020*/ uint16(x86_xMatch), - /*5021*/ uint16(x86_xSetOp), uint16(x86_HSUBPS), - /*5023*/ uint16(x86_xReadSlashR), - /*5024*/ uint16(x86_xArgXmm1), - /*5025*/ uint16(x86_xArgXmm2M128), - /*5026*/ uint16(x86_xMatch), - /*5027*/ uint16(x86_xCondIs64), 5030, 5076, - /*5030*/ uint16(x86_xCondPrefix), 3, - 0xF3, 5070, - 0x66, 5054, - 0x0, 5038, - /*5038*/ uint16(x86_xCondDataSize), 5042, 5048, 0, - /*5042*/ uint16(x86_xSetOp), uint16(x86_MOVD), - /*5044*/ uint16(x86_xReadSlashR), - /*5045*/ uint16(x86_xArgRM32), - /*5046*/ uint16(x86_xArgMm), - /*5047*/ uint16(x86_xMatch), - /*5048*/ uint16(x86_xSetOp), uint16(x86_MOVD), - /*5050*/ uint16(x86_xReadSlashR), - /*5051*/ uint16(x86_xArgRM32), - /*5052*/ uint16(x86_xArgMm), - /*5053*/ uint16(x86_xMatch), - /*5054*/ uint16(x86_xCondDataSize), 5058, 5064, 0, - /*5058*/ uint16(x86_xSetOp), uint16(x86_MOVD), - /*5060*/ uint16(x86_xReadSlashR), - /*5061*/ uint16(x86_xArgRM32), - /*5062*/ uint16(x86_xArgXmm), - /*5063*/ uint16(x86_xMatch), - /*5064*/ uint16(x86_xSetOp), uint16(x86_MOVD), - /*5066*/ uint16(x86_xReadSlashR), - /*5067*/ uint16(x86_xArgRM32), - /*5068*/ uint16(x86_xArgXmm), - /*5069*/ uint16(x86_xMatch), - /*5070*/ uint16(x86_xSetOp), uint16(x86_MOVQ), - /*5072*/ uint16(x86_xReadSlashR), - /*5073*/ uint16(x86_xArgXmm1), - /*5074*/ uint16(x86_xArgXmm2M64), - /*5075*/ uint16(x86_xMatch), - /*5076*/ uint16(x86_xCondPrefix), 3, - 0xF3, 5070, - 0x66, 5094, - 0x0, 5084, - /*5084*/ uint16(x86_xCondDataSize), 5042, 5048, 5088, - /*5088*/ uint16(x86_xSetOp), uint16(x86_MOVQ), - /*5090*/ uint16(x86_xReadSlashR), - /*5091*/ uint16(x86_xArgRM64), - /*5092*/ uint16(x86_xArgMm), - /*5093*/ uint16(x86_xMatch), - /*5094*/ uint16(x86_xCondDataSize), 5058, 5064, 5098, - /*5098*/ uint16(x86_xSetOp), uint16(x86_MOVQ), - /*5100*/ uint16(x86_xReadSlashR), - /*5101*/ uint16(x86_xArgRM64), - /*5102*/ uint16(x86_xArgXmm), - /*5103*/ uint16(x86_xMatch), - /*5104*/ uint16(x86_xCondPrefix), 3, - 0xF3, 5124, - 0x66, 5118, - 0x0, 5112, - /*5112*/ uint16(x86_xSetOp), uint16(x86_MOVQ), - /*5114*/ uint16(x86_xReadSlashR), - /*5115*/ uint16(x86_xArgMmM64), - /*5116*/ uint16(x86_xArgMm), - /*5117*/ uint16(x86_xMatch), - /*5118*/ uint16(x86_xSetOp), uint16(x86_MOVDQA), - /*5120*/ uint16(x86_xReadSlashR), - /*5121*/ uint16(x86_xArgXmm2M128), - /*5122*/ uint16(x86_xArgXmm1), - /*5123*/ uint16(x86_xMatch), - /*5124*/ uint16(x86_xSetOp), uint16(x86_MOVDQU), - /*5126*/ uint16(x86_xReadSlashR), - /*5127*/ uint16(x86_xArgXmm2M128), - /*5128*/ uint16(x86_xArgXmm1), - /*5129*/ uint16(x86_xMatch), - /*5130*/ uint16(x86_xCondIs64), 5133, 5147, - /*5133*/ uint16(x86_xCondDataSize), 5137, 5142, 0, - /*5137*/ uint16(x86_xSetOp), uint16(x86_JO), - /*5139*/ uint16(x86_xReadCw), - /*5140*/ uint16(x86_xArgRel16), - /*5141*/ uint16(x86_xMatch), - /*5142*/ uint16(x86_xSetOp), uint16(x86_JO), - /*5144*/ uint16(x86_xReadCd), - /*5145*/ uint16(x86_xArgRel32), - /*5146*/ uint16(x86_xMatch), - /*5147*/ uint16(x86_xCondDataSize), 5151, 5142, 5156, - /*5151*/ uint16(x86_xSetOp), uint16(x86_JO), - /*5153*/ uint16(x86_xReadCd), - /*5154*/ uint16(x86_xArgRel32), - /*5155*/ uint16(x86_xMatch), - /*5156*/ uint16(x86_xSetOp), uint16(x86_JO), - /*5158*/ uint16(x86_xReadCd), - /*5159*/ uint16(x86_xArgRel32), - /*5160*/ uint16(x86_xMatch), - /*5161*/ uint16(x86_xCondIs64), 5164, 5178, - /*5164*/ uint16(x86_xCondDataSize), 5168, 5173, 0, - /*5168*/ uint16(x86_xSetOp), uint16(x86_JNO), - /*5170*/ uint16(x86_xReadCw), - /*5171*/ uint16(x86_xArgRel16), - /*5172*/ uint16(x86_xMatch), - /*5173*/ uint16(x86_xSetOp), uint16(x86_JNO), - /*5175*/ uint16(x86_xReadCd), - /*5176*/ uint16(x86_xArgRel32), - /*5177*/ uint16(x86_xMatch), - /*5178*/ uint16(x86_xCondDataSize), 5182, 5173, 5187, - /*5182*/ uint16(x86_xSetOp), uint16(x86_JNO), - /*5184*/ uint16(x86_xReadCd), - /*5185*/ uint16(x86_xArgRel32), - /*5186*/ uint16(x86_xMatch), - /*5187*/ uint16(x86_xSetOp), uint16(x86_JNO), - /*5189*/ uint16(x86_xReadCd), - /*5190*/ uint16(x86_xArgRel32), - /*5191*/ uint16(x86_xMatch), - /*5192*/ uint16(x86_xCondIs64), 5195, 5209, - /*5195*/ uint16(x86_xCondDataSize), 5199, 5204, 0, - /*5199*/ uint16(x86_xSetOp), uint16(x86_JB), - /*5201*/ uint16(x86_xReadCw), - /*5202*/ uint16(x86_xArgRel16), - /*5203*/ uint16(x86_xMatch), - /*5204*/ uint16(x86_xSetOp), uint16(x86_JB), - /*5206*/ uint16(x86_xReadCd), - /*5207*/ uint16(x86_xArgRel32), - /*5208*/ uint16(x86_xMatch), - /*5209*/ uint16(x86_xCondDataSize), 5213, 5204, 5218, - /*5213*/ uint16(x86_xSetOp), uint16(x86_JB), - /*5215*/ uint16(x86_xReadCd), - /*5216*/ uint16(x86_xArgRel32), - /*5217*/ uint16(x86_xMatch), - /*5218*/ uint16(x86_xSetOp), uint16(x86_JB), - /*5220*/ uint16(x86_xReadCd), - /*5221*/ uint16(x86_xArgRel32), - /*5222*/ uint16(x86_xMatch), - /*5223*/ uint16(x86_xCondIs64), 5226, 5240, - /*5226*/ uint16(x86_xCondDataSize), 5230, 5235, 0, - /*5230*/ uint16(x86_xSetOp), uint16(x86_JAE), - /*5232*/ uint16(x86_xReadCw), - /*5233*/ uint16(x86_xArgRel16), - /*5234*/ uint16(x86_xMatch), - /*5235*/ uint16(x86_xSetOp), uint16(x86_JAE), - /*5237*/ uint16(x86_xReadCd), - /*5238*/ uint16(x86_xArgRel32), - /*5239*/ uint16(x86_xMatch), - /*5240*/ uint16(x86_xCondDataSize), 5244, 5235, 5249, - /*5244*/ uint16(x86_xSetOp), uint16(x86_JAE), - /*5246*/ uint16(x86_xReadCd), - /*5247*/ uint16(x86_xArgRel32), - /*5248*/ uint16(x86_xMatch), - /*5249*/ uint16(x86_xSetOp), uint16(x86_JAE), - /*5251*/ uint16(x86_xReadCd), - /*5252*/ uint16(x86_xArgRel32), - /*5253*/ uint16(x86_xMatch), - /*5254*/ uint16(x86_xCondIs64), 5257, 5271, - /*5257*/ uint16(x86_xCondDataSize), 5261, 5266, 0, - /*5261*/ uint16(x86_xSetOp), uint16(x86_JE), - /*5263*/ uint16(x86_xReadCw), - /*5264*/ uint16(x86_xArgRel16), - /*5265*/ uint16(x86_xMatch), - /*5266*/ uint16(x86_xSetOp), uint16(x86_JE), - /*5268*/ uint16(x86_xReadCd), - /*5269*/ uint16(x86_xArgRel32), - /*5270*/ uint16(x86_xMatch), - /*5271*/ uint16(x86_xCondDataSize), 5275, 5266, 5280, - /*5275*/ uint16(x86_xSetOp), uint16(x86_JE), - /*5277*/ uint16(x86_xReadCd), - /*5278*/ uint16(x86_xArgRel32), - /*5279*/ uint16(x86_xMatch), - /*5280*/ uint16(x86_xSetOp), uint16(x86_JE), - /*5282*/ uint16(x86_xReadCd), - /*5283*/ uint16(x86_xArgRel32), - /*5284*/ uint16(x86_xMatch), - /*5285*/ uint16(x86_xCondIs64), 5288, 5302, - /*5288*/ uint16(x86_xCondDataSize), 5292, 5297, 0, - /*5292*/ uint16(x86_xSetOp), uint16(x86_JNE), - /*5294*/ uint16(x86_xReadCw), - /*5295*/ uint16(x86_xArgRel16), - /*5296*/ uint16(x86_xMatch), - /*5297*/ uint16(x86_xSetOp), uint16(x86_JNE), - /*5299*/ uint16(x86_xReadCd), - /*5300*/ uint16(x86_xArgRel32), - /*5301*/ uint16(x86_xMatch), - /*5302*/ uint16(x86_xCondDataSize), 5306, 5297, 5311, - /*5306*/ uint16(x86_xSetOp), uint16(x86_JNE), - /*5308*/ uint16(x86_xReadCd), - /*5309*/ uint16(x86_xArgRel32), - /*5310*/ uint16(x86_xMatch), - /*5311*/ uint16(x86_xSetOp), uint16(x86_JNE), - /*5313*/ uint16(x86_xReadCd), - /*5314*/ uint16(x86_xArgRel32), - /*5315*/ uint16(x86_xMatch), - /*5316*/ uint16(x86_xCondIs64), 5319, 5333, - /*5319*/ uint16(x86_xCondDataSize), 5323, 5328, 0, - /*5323*/ uint16(x86_xSetOp), uint16(x86_JBE), - /*5325*/ uint16(x86_xReadCw), - /*5326*/ uint16(x86_xArgRel16), - /*5327*/ uint16(x86_xMatch), - /*5328*/ uint16(x86_xSetOp), uint16(x86_JBE), - /*5330*/ uint16(x86_xReadCd), - /*5331*/ uint16(x86_xArgRel32), - /*5332*/ uint16(x86_xMatch), - /*5333*/ uint16(x86_xCondDataSize), 5337, 5328, 5342, - /*5337*/ uint16(x86_xSetOp), uint16(x86_JBE), - /*5339*/ uint16(x86_xReadCd), - /*5340*/ uint16(x86_xArgRel32), - /*5341*/ uint16(x86_xMatch), - /*5342*/ uint16(x86_xSetOp), uint16(x86_JBE), - /*5344*/ uint16(x86_xReadCd), - /*5345*/ uint16(x86_xArgRel32), - /*5346*/ uint16(x86_xMatch), - /*5347*/ uint16(x86_xCondIs64), 5350, 5364, - /*5350*/ uint16(x86_xCondDataSize), 5354, 5359, 0, - /*5354*/ uint16(x86_xSetOp), uint16(x86_JA), - /*5356*/ uint16(x86_xReadCw), - /*5357*/ uint16(x86_xArgRel16), - /*5358*/ uint16(x86_xMatch), - /*5359*/ uint16(x86_xSetOp), uint16(x86_JA), - /*5361*/ uint16(x86_xReadCd), - /*5362*/ uint16(x86_xArgRel32), - /*5363*/ uint16(x86_xMatch), - /*5364*/ uint16(x86_xCondDataSize), 5368, 5359, 5373, - /*5368*/ uint16(x86_xSetOp), uint16(x86_JA), - /*5370*/ uint16(x86_xReadCd), - /*5371*/ uint16(x86_xArgRel32), - /*5372*/ uint16(x86_xMatch), - /*5373*/ uint16(x86_xSetOp), uint16(x86_JA), - /*5375*/ uint16(x86_xReadCd), - /*5376*/ uint16(x86_xArgRel32), - /*5377*/ uint16(x86_xMatch), - /*5378*/ uint16(x86_xCondIs64), 5381, 5395, - /*5381*/ uint16(x86_xCondDataSize), 5385, 5390, 0, - /*5385*/ uint16(x86_xSetOp), uint16(x86_JS), - /*5387*/ uint16(x86_xReadCw), - /*5388*/ uint16(x86_xArgRel16), - /*5389*/ uint16(x86_xMatch), - /*5390*/ uint16(x86_xSetOp), uint16(x86_JS), - /*5392*/ uint16(x86_xReadCd), - /*5393*/ uint16(x86_xArgRel32), - /*5394*/ uint16(x86_xMatch), - /*5395*/ uint16(x86_xCondDataSize), 5399, 5390, 5404, - /*5399*/ uint16(x86_xSetOp), uint16(x86_JS), - /*5401*/ uint16(x86_xReadCd), - /*5402*/ uint16(x86_xArgRel32), - /*5403*/ uint16(x86_xMatch), - /*5404*/ uint16(x86_xSetOp), uint16(x86_JS), - /*5406*/ uint16(x86_xReadCd), - /*5407*/ uint16(x86_xArgRel32), - /*5408*/ uint16(x86_xMatch), - /*5409*/ uint16(x86_xCondIs64), 5412, 5426, - /*5412*/ uint16(x86_xCondDataSize), 5416, 5421, 0, - /*5416*/ uint16(x86_xSetOp), uint16(x86_JNS), - /*5418*/ uint16(x86_xReadCw), - /*5419*/ uint16(x86_xArgRel16), - /*5420*/ uint16(x86_xMatch), - /*5421*/ uint16(x86_xSetOp), uint16(x86_JNS), - /*5423*/ uint16(x86_xReadCd), - /*5424*/ uint16(x86_xArgRel32), - /*5425*/ uint16(x86_xMatch), - /*5426*/ uint16(x86_xCondDataSize), 5430, 5421, 5435, - /*5430*/ uint16(x86_xSetOp), uint16(x86_JNS), - /*5432*/ uint16(x86_xReadCd), - /*5433*/ uint16(x86_xArgRel32), - /*5434*/ uint16(x86_xMatch), - /*5435*/ uint16(x86_xSetOp), uint16(x86_JNS), - /*5437*/ uint16(x86_xReadCd), - /*5438*/ uint16(x86_xArgRel32), - /*5439*/ uint16(x86_xMatch), - /*5440*/ uint16(x86_xCondIs64), 5443, 5457, - /*5443*/ uint16(x86_xCondDataSize), 5447, 5452, 0, - /*5447*/ uint16(x86_xSetOp), uint16(x86_JP), - /*5449*/ uint16(x86_xReadCw), - /*5450*/ uint16(x86_xArgRel16), - /*5451*/ uint16(x86_xMatch), - /*5452*/ uint16(x86_xSetOp), uint16(x86_JP), - /*5454*/ uint16(x86_xReadCd), - /*5455*/ uint16(x86_xArgRel32), - /*5456*/ uint16(x86_xMatch), - /*5457*/ uint16(x86_xCondDataSize), 5461, 5452, 5466, - /*5461*/ uint16(x86_xSetOp), uint16(x86_JP), - /*5463*/ uint16(x86_xReadCd), - /*5464*/ uint16(x86_xArgRel32), - /*5465*/ uint16(x86_xMatch), - /*5466*/ uint16(x86_xSetOp), uint16(x86_JP), - /*5468*/ uint16(x86_xReadCd), - /*5469*/ uint16(x86_xArgRel32), - /*5470*/ uint16(x86_xMatch), - /*5471*/ uint16(x86_xCondIs64), 5474, 5488, - /*5474*/ uint16(x86_xCondDataSize), 5478, 5483, 0, - /*5478*/ uint16(x86_xSetOp), uint16(x86_JNP), - /*5480*/ uint16(x86_xReadCw), - /*5481*/ uint16(x86_xArgRel16), - /*5482*/ uint16(x86_xMatch), - /*5483*/ uint16(x86_xSetOp), uint16(x86_JNP), - /*5485*/ uint16(x86_xReadCd), - /*5486*/ uint16(x86_xArgRel32), - /*5487*/ uint16(x86_xMatch), - /*5488*/ uint16(x86_xCondDataSize), 5492, 5483, 5497, - /*5492*/ uint16(x86_xSetOp), uint16(x86_JNP), - /*5494*/ uint16(x86_xReadCd), - /*5495*/ uint16(x86_xArgRel32), - /*5496*/ uint16(x86_xMatch), - /*5497*/ uint16(x86_xSetOp), uint16(x86_JNP), - /*5499*/ uint16(x86_xReadCd), - /*5500*/ uint16(x86_xArgRel32), - /*5501*/ uint16(x86_xMatch), - /*5502*/ uint16(x86_xCondIs64), 5505, 5519, - /*5505*/ uint16(x86_xCondDataSize), 5509, 5514, 0, - /*5509*/ uint16(x86_xSetOp), uint16(x86_JL), - /*5511*/ uint16(x86_xReadCw), - /*5512*/ uint16(x86_xArgRel16), - /*5513*/ uint16(x86_xMatch), - /*5514*/ uint16(x86_xSetOp), uint16(x86_JL), - /*5516*/ uint16(x86_xReadCd), - /*5517*/ uint16(x86_xArgRel32), - /*5518*/ uint16(x86_xMatch), - /*5519*/ uint16(x86_xCondDataSize), 5523, 5514, 5528, - /*5523*/ uint16(x86_xSetOp), uint16(x86_JL), - /*5525*/ uint16(x86_xReadCd), - /*5526*/ uint16(x86_xArgRel32), - /*5527*/ uint16(x86_xMatch), - /*5528*/ uint16(x86_xSetOp), uint16(x86_JL), - /*5530*/ uint16(x86_xReadCd), - /*5531*/ uint16(x86_xArgRel32), - /*5532*/ uint16(x86_xMatch), - /*5533*/ uint16(x86_xCondIs64), 5536, 5550, - /*5536*/ uint16(x86_xCondDataSize), 5540, 5545, 0, - /*5540*/ uint16(x86_xSetOp), uint16(x86_JGE), - /*5542*/ uint16(x86_xReadCw), - /*5543*/ uint16(x86_xArgRel16), - /*5544*/ uint16(x86_xMatch), - /*5545*/ uint16(x86_xSetOp), uint16(x86_JGE), - /*5547*/ uint16(x86_xReadCd), - /*5548*/ uint16(x86_xArgRel32), - /*5549*/ uint16(x86_xMatch), - /*5550*/ uint16(x86_xCondDataSize), 5554, 5545, 5559, - /*5554*/ uint16(x86_xSetOp), uint16(x86_JGE), - /*5556*/ uint16(x86_xReadCd), - /*5557*/ uint16(x86_xArgRel32), - /*5558*/ uint16(x86_xMatch), - /*5559*/ uint16(x86_xSetOp), uint16(x86_JGE), - /*5561*/ uint16(x86_xReadCd), - /*5562*/ uint16(x86_xArgRel32), - /*5563*/ uint16(x86_xMatch), - /*5564*/ uint16(x86_xCondIs64), 5567, 5581, - /*5567*/ uint16(x86_xCondDataSize), 5571, 5576, 0, - /*5571*/ uint16(x86_xSetOp), uint16(x86_JLE), - /*5573*/ uint16(x86_xReadCw), - /*5574*/ uint16(x86_xArgRel16), - /*5575*/ uint16(x86_xMatch), - /*5576*/ uint16(x86_xSetOp), uint16(x86_JLE), - /*5578*/ uint16(x86_xReadCd), - /*5579*/ uint16(x86_xArgRel32), - /*5580*/ uint16(x86_xMatch), - /*5581*/ uint16(x86_xCondDataSize), 5585, 5576, 5590, - /*5585*/ uint16(x86_xSetOp), uint16(x86_JLE), - /*5587*/ uint16(x86_xReadCd), - /*5588*/ uint16(x86_xArgRel32), - /*5589*/ uint16(x86_xMatch), - /*5590*/ uint16(x86_xSetOp), uint16(x86_JLE), - /*5592*/ uint16(x86_xReadCd), - /*5593*/ uint16(x86_xArgRel32), - /*5594*/ uint16(x86_xMatch), - /*5595*/ uint16(x86_xCondIs64), 5598, 5612, - /*5598*/ uint16(x86_xCondDataSize), 5602, 5607, 0, - /*5602*/ uint16(x86_xSetOp), uint16(x86_JG), - /*5604*/ uint16(x86_xReadCw), - /*5605*/ uint16(x86_xArgRel16), - /*5606*/ uint16(x86_xMatch), - /*5607*/ uint16(x86_xSetOp), uint16(x86_JG), - /*5609*/ uint16(x86_xReadCd), - /*5610*/ uint16(x86_xArgRel32), - /*5611*/ uint16(x86_xMatch), - /*5612*/ uint16(x86_xCondDataSize), 5616, 5607, 5621, - /*5616*/ uint16(x86_xSetOp), uint16(x86_JG), - /*5618*/ uint16(x86_xReadCd), - /*5619*/ uint16(x86_xArgRel32), - /*5620*/ uint16(x86_xMatch), - /*5621*/ uint16(x86_xSetOp), uint16(x86_JG), - /*5623*/ uint16(x86_xReadCd), - /*5624*/ uint16(x86_xArgRel32), - /*5625*/ uint16(x86_xMatch), - /*5626*/ uint16(x86_xSetOp), uint16(x86_SETO), - /*5628*/ uint16(x86_xReadSlashR), - /*5629*/ uint16(x86_xArgRM8), - /*5630*/ uint16(x86_xMatch), - /*5631*/ uint16(x86_xSetOp), uint16(x86_SETNO), - /*5633*/ uint16(x86_xReadSlashR), - /*5634*/ uint16(x86_xArgRM8), - /*5635*/ uint16(x86_xMatch), - /*5636*/ uint16(x86_xSetOp), uint16(x86_SETB), - /*5638*/ uint16(x86_xReadSlashR), - /*5639*/ uint16(x86_xArgRM8), - /*5640*/ uint16(x86_xMatch), - /*5641*/ uint16(x86_xSetOp), uint16(x86_SETAE), - /*5643*/ uint16(x86_xReadSlashR), - /*5644*/ uint16(x86_xArgRM8), - /*5645*/ uint16(x86_xMatch), - /*5646*/ uint16(x86_xSetOp), uint16(x86_SETE), - /*5648*/ uint16(x86_xReadSlashR), - /*5649*/ uint16(x86_xArgRM8), - /*5650*/ uint16(x86_xMatch), - /*5651*/ uint16(x86_xSetOp), uint16(x86_SETNE), - /*5653*/ uint16(x86_xReadSlashR), - /*5654*/ uint16(x86_xArgRM8), - /*5655*/ uint16(x86_xMatch), - /*5656*/ uint16(x86_xSetOp), uint16(x86_SETBE), - /*5658*/ uint16(x86_xReadSlashR), - /*5659*/ uint16(x86_xArgRM8), - /*5660*/ uint16(x86_xMatch), - /*5661*/ uint16(x86_xSetOp), uint16(x86_SETA), - /*5663*/ uint16(x86_xReadSlashR), - /*5664*/ uint16(x86_xArgRM8), - /*5665*/ uint16(x86_xMatch), - /*5666*/ uint16(x86_xSetOp), uint16(x86_SETS), - /*5668*/ uint16(x86_xReadSlashR), - /*5669*/ uint16(x86_xArgRM8), - /*5670*/ uint16(x86_xMatch), - /*5671*/ uint16(x86_xSetOp), uint16(x86_SETNS), - /*5673*/ uint16(x86_xReadSlashR), - /*5674*/ uint16(x86_xArgRM8), - /*5675*/ uint16(x86_xMatch), - /*5676*/ uint16(x86_xSetOp), uint16(x86_SETP), - /*5678*/ uint16(x86_xReadSlashR), - /*5679*/ uint16(x86_xArgRM8), - /*5680*/ uint16(x86_xMatch), - /*5681*/ uint16(x86_xSetOp), uint16(x86_SETNP), - /*5683*/ uint16(x86_xReadSlashR), - /*5684*/ uint16(x86_xArgRM8), - /*5685*/ uint16(x86_xMatch), - /*5686*/ uint16(x86_xSetOp), uint16(x86_SETL), - /*5688*/ uint16(x86_xReadSlashR), - /*5689*/ uint16(x86_xArgRM8), - /*5690*/ uint16(x86_xMatch), - /*5691*/ uint16(x86_xSetOp), uint16(x86_SETGE), - /*5693*/ uint16(x86_xReadSlashR), - /*5694*/ uint16(x86_xArgRM8), - /*5695*/ uint16(x86_xMatch), - /*5696*/ uint16(x86_xSetOp), uint16(x86_SETLE), - /*5698*/ uint16(x86_xReadSlashR), - /*5699*/ uint16(x86_xArgRM8), - /*5700*/ uint16(x86_xMatch), - /*5701*/ uint16(x86_xSetOp), uint16(x86_SETG), - /*5703*/ uint16(x86_xReadSlashR), - /*5704*/ uint16(x86_xArgRM8), - /*5705*/ uint16(x86_xMatch), - /*5706*/ uint16(x86_xSetOp), uint16(x86_PUSH), - /*5708*/ uint16(x86_xArgFS), - /*5709*/ uint16(x86_xMatch), - /*5710*/ uint16(x86_xCondIs64), 5713, 5725, - /*5713*/ uint16(x86_xCondDataSize), 5717, 5721, 0, - /*5717*/ uint16(x86_xSetOp), uint16(x86_POP), - /*5719*/ uint16(x86_xArgFS), - /*5720*/ uint16(x86_xMatch), - /*5721*/ uint16(x86_xSetOp), uint16(x86_POP), - /*5723*/ uint16(x86_xArgFS), - /*5724*/ uint16(x86_xMatch), - /*5725*/ uint16(x86_xCondDataSize), 5717, 5729, 5733, - /*5729*/ uint16(x86_xSetOp), uint16(x86_POP), - /*5731*/ uint16(x86_xArgFS), - /*5732*/ uint16(x86_xMatch), - /*5733*/ uint16(x86_xSetOp), uint16(x86_POP), - /*5735*/ uint16(x86_xArgFS), - /*5736*/ uint16(x86_xMatch), - /*5737*/ uint16(x86_xSetOp), uint16(x86_CPUID), - /*5739*/ uint16(x86_xMatch), - /*5740*/ uint16(x86_xCondIs64), 5743, 5759, - /*5743*/ uint16(x86_xCondDataSize), 5747, 5753, 0, - /*5747*/ uint16(x86_xSetOp), uint16(x86_BT), - /*5749*/ uint16(x86_xReadSlashR), - /*5750*/ uint16(x86_xArgRM16), - /*5751*/ uint16(x86_xArgR16), - /*5752*/ uint16(x86_xMatch), - /*5753*/ uint16(x86_xSetOp), uint16(x86_BT), - /*5755*/ uint16(x86_xReadSlashR), - /*5756*/ uint16(x86_xArgRM32), - /*5757*/ uint16(x86_xArgR32), - /*5758*/ uint16(x86_xMatch), - /*5759*/ uint16(x86_xCondDataSize), 5747, 5753, 5763, - /*5763*/ uint16(x86_xSetOp), uint16(x86_BT), - /*5765*/ uint16(x86_xReadSlashR), - /*5766*/ uint16(x86_xArgRM64), - /*5767*/ uint16(x86_xArgR64), - /*5768*/ uint16(x86_xMatch), - /*5769*/ uint16(x86_xCondIs64), 5772, 5792, - /*5772*/ uint16(x86_xCondDataSize), 5776, 5784, 0, - /*5776*/ uint16(x86_xSetOp), uint16(x86_SHLD), - /*5778*/ uint16(x86_xReadSlashR), - /*5779*/ uint16(x86_xReadIb), - /*5780*/ uint16(x86_xArgRM16), - /*5781*/ uint16(x86_xArgR16), - /*5782*/ uint16(x86_xArgImm8u), - /*5783*/ uint16(x86_xMatch), - /*5784*/ uint16(x86_xSetOp), uint16(x86_SHLD), - /*5786*/ uint16(x86_xReadSlashR), - /*5787*/ uint16(x86_xReadIb), - /*5788*/ uint16(x86_xArgRM32), - /*5789*/ uint16(x86_xArgR32), - /*5790*/ uint16(x86_xArgImm8u), - /*5791*/ uint16(x86_xMatch), - /*5792*/ uint16(x86_xCondDataSize), 5776, 5784, 5796, - /*5796*/ uint16(x86_xSetOp), uint16(x86_SHLD), - /*5798*/ uint16(x86_xReadSlashR), - /*5799*/ uint16(x86_xReadIb), - /*5800*/ uint16(x86_xArgRM64), - /*5801*/ uint16(x86_xArgR64), - /*5802*/ uint16(x86_xArgImm8u), - /*5803*/ uint16(x86_xMatch), - /*5804*/ uint16(x86_xCondIs64), 5807, 5825, - /*5807*/ uint16(x86_xCondDataSize), 5811, 5818, 0, - /*5811*/ uint16(x86_xSetOp), uint16(x86_SHLD), - /*5813*/ uint16(x86_xReadSlashR), - /*5814*/ uint16(x86_xArgRM16), - /*5815*/ uint16(x86_xArgR16), - /*5816*/ uint16(x86_xArgCL), - /*5817*/ uint16(x86_xMatch), - /*5818*/ uint16(x86_xSetOp), uint16(x86_SHLD), - /*5820*/ uint16(x86_xReadSlashR), - /*5821*/ uint16(x86_xArgRM32), - /*5822*/ uint16(x86_xArgR32), - /*5823*/ uint16(x86_xArgCL), - /*5824*/ uint16(x86_xMatch), - /*5825*/ uint16(x86_xCondDataSize), 5811, 5818, 5829, - /*5829*/ uint16(x86_xSetOp), uint16(x86_SHLD), - /*5831*/ uint16(x86_xReadSlashR), - /*5832*/ uint16(x86_xArgRM64), - /*5833*/ uint16(x86_xArgR64), - /*5834*/ uint16(x86_xArgCL), - /*5835*/ uint16(x86_xMatch), - /*5836*/ uint16(x86_xSetOp), uint16(x86_PUSH), - /*5838*/ uint16(x86_xArgGS), - /*5839*/ uint16(x86_xMatch), - /*5840*/ uint16(x86_xCondIs64), 5843, 5855, - /*5843*/ uint16(x86_xCondDataSize), 5847, 5851, 0, - /*5847*/ uint16(x86_xSetOp), uint16(x86_POP), - /*5849*/ uint16(x86_xArgGS), - /*5850*/ uint16(x86_xMatch), - /*5851*/ uint16(x86_xSetOp), uint16(x86_POP), - /*5853*/ uint16(x86_xArgGS), - /*5854*/ uint16(x86_xMatch), - /*5855*/ uint16(x86_xCondDataSize), 5847, 5859, 5863, - /*5859*/ uint16(x86_xSetOp), uint16(x86_POP), - /*5861*/ uint16(x86_xArgGS), - /*5862*/ uint16(x86_xMatch), - /*5863*/ uint16(x86_xSetOp), uint16(x86_POP), - /*5865*/ uint16(x86_xArgGS), - /*5866*/ uint16(x86_xMatch), - /*5867*/ uint16(x86_xSetOp), uint16(x86_RSM), - /*5869*/ uint16(x86_xMatch), - /*5870*/ uint16(x86_xCondIs64), 5873, 5889, - /*5873*/ uint16(x86_xCondDataSize), 5877, 5883, 0, - /*5877*/ uint16(x86_xSetOp), uint16(x86_BTS), - /*5879*/ uint16(x86_xReadSlashR), - /*5880*/ uint16(x86_xArgRM16), - /*5881*/ uint16(x86_xArgR16), - /*5882*/ uint16(x86_xMatch), - /*5883*/ uint16(x86_xSetOp), uint16(x86_BTS), - /*5885*/ uint16(x86_xReadSlashR), - /*5886*/ uint16(x86_xArgRM32), - /*5887*/ uint16(x86_xArgR32), - /*5888*/ uint16(x86_xMatch), - /*5889*/ uint16(x86_xCondDataSize), 5877, 5883, 5893, - /*5893*/ uint16(x86_xSetOp), uint16(x86_BTS), - /*5895*/ uint16(x86_xReadSlashR), - /*5896*/ uint16(x86_xArgRM64), - /*5897*/ uint16(x86_xArgR64), - /*5898*/ uint16(x86_xMatch), - /*5899*/ uint16(x86_xCondIs64), 5902, 5922, - /*5902*/ uint16(x86_xCondDataSize), 5906, 5914, 0, - /*5906*/ uint16(x86_xSetOp), uint16(x86_SHRD), - /*5908*/ uint16(x86_xReadSlashR), - /*5909*/ uint16(x86_xReadIb), - /*5910*/ uint16(x86_xArgRM16), - /*5911*/ uint16(x86_xArgR16), - /*5912*/ uint16(x86_xArgImm8u), - /*5913*/ uint16(x86_xMatch), - /*5914*/ uint16(x86_xSetOp), uint16(x86_SHRD), - /*5916*/ uint16(x86_xReadSlashR), - /*5917*/ uint16(x86_xReadIb), - /*5918*/ uint16(x86_xArgRM32), - /*5919*/ uint16(x86_xArgR32), - /*5920*/ uint16(x86_xArgImm8u), - /*5921*/ uint16(x86_xMatch), - /*5922*/ uint16(x86_xCondDataSize), 5906, 5914, 5926, - /*5926*/ uint16(x86_xSetOp), uint16(x86_SHRD), - /*5928*/ uint16(x86_xReadSlashR), - /*5929*/ uint16(x86_xReadIb), - /*5930*/ uint16(x86_xArgRM64), - /*5931*/ uint16(x86_xArgR64), - /*5932*/ uint16(x86_xArgImm8u), - /*5933*/ uint16(x86_xMatch), - /*5934*/ uint16(x86_xCondIs64), 5937, 5955, - /*5937*/ uint16(x86_xCondDataSize), 5941, 5948, 0, - /*5941*/ uint16(x86_xSetOp), uint16(x86_SHRD), - /*5943*/ uint16(x86_xReadSlashR), - /*5944*/ uint16(x86_xArgRM16), - /*5945*/ uint16(x86_xArgR16), - /*5946*/ uint16(x86_xArgCL), - /*5947*/ uint16(x86_xMatch), - /*5948*/ uint16(x86_xSetOp), uint16(x86_SHRD), - /*5950*/ uint16(x86_xReadSlashR), - /*5951*/ uint16(x86_xArgRM32), - /*5952*/ uint16(x86_xArgR32), - /*5953*/ uint16(x86_xArgCL), - /*5954*/ uint16(x86_xMatch), - /*5955*/ uint16(x86_xCondDataSize), 5941, 5948, 5959, - /*5959*/ uint16(x86_xSetOp), uint16(x86_SHRD), - /*5961*/ uint16(x86_xReadSlashR), - /*5962*/ uint16(x86_xArgRM64), - /*5963*/ uint16(x86_xArgR64), - /*5964*/ uint16(x86_xArgCL), - /*5965*/ uint16(x86_xMatch), - /*5966*/ uint16(x86_xCondByte), 3, - 0xE8, 6215, - 0xF0, 6218, - 0xF8, 6221, - /*5974*/ uint16(x86_xCondSlashR), - 5983, // 0 - 6037, // 1 - 6091, // 2 - 6120, // 3 - 6149, // 4 - 6172, // 5 - 6195, // 6 - 6211, // 7 - /*5983*/ uint16(x86_xCondIs64), 5986, 5998, - /*5986*/ uint16(x86_xCondDataSize), 5990, 5994, 0, - /*5990*/ uint16(x86_xSetOp), uint16(x86_FXSAVE), - /*5992*/ uint16(x86_xArgM512byte), - /*5993*/ uint16(x86_xMatch), - /*5994*/ uint16(x86_xSetOp), uint16(x86_FXSAVE), - /*5996*/ uint16(x86_xArgM512byte), - /*5997*/ uint16(x86_xMatch), - /*5998*/ uint16(x86_xCondPrefix), 2, - 0xF3, 6012, - 0x0, 6004, - /*6004*/ uint16(x86_xCondDataSize), 5990, 5994, 6008, - /*6008*/ uint16(x86_xSetOp), uint16(x86_FXSAVE64), - /*6010*/ uint16(x86_xArgM512byte), - /*6011*/ uint16(x86_xMatch), - /*6012*/ uint16(x86_xCondDataSize), 6016, 6023, 6030, - /*6016*/ uint16(x86_xCondIsMem), 6019, 0, - /*6019*/ uint16(x86_xSetOp), uint16(x86_RDFSBASE), - /*6021*/ uint16(x86_xArgRM32), - /*6022*/ uint16(x86_xMatch), - /*6023*/ uint16(x86_xCondIsMem), 6026, 0, - /*6026*/ uint16(x86_xSetOp), uint16(x86_RDFSBASE), - /*6028*/ uint16(x86_xArgRM32), - /*6029*/ uint16(x86_xMatch), - /*6030*/ uint16(x86_xCondIsMem), 6033, 0, - /*6033*/ uint16(x86_xSetOp), uint16(x86_RDFSBASE), - /*6035*/ uint16(x86_xArgRM64), - /*6036*/ uint16(x86_xMatch), - /*6037*/ uint16(x86_xCondIs64), 6040, 6052, - /*6040*/ uint16(x86_xCondDataSize), 6044, 6048, 0, - /*6044*/ uint16(x86_xSetOp), uint16(x86_FXRSTOR), - /*6046*/ uint16(x86_xArgM512byte), - /*6047*/ uint16(x86_xMatch), - /*6048*/ uint16(x86_xSetOp), uint16(x86_FXRSTOR), - /*6050*/ uint16(x86_xArgM512byte), - /*6051*/ uint16(x86_xMatch), - /*6052*/ uint16(x86_xCondPrefix), 2, - 0xF3, 6066, - 0x0, 6058, - /*6058*/ uint16(x86_xCondDataSize), 6044, 6048, 6062, - /*6062*/ uint16(x86_xSetOp), uint16(x86_FXRSTOR64), - /*6064*/ uint16(x86_xArgM512byte), - /*6065*/ uint16(x86_xMatch), - /*6066*/ uint16(x86_xCondDataSize), 6070, 6077, 6084, - /*6070*/ uint16(x86_xCondIsMem), 6073, 0, - /*6073*/ uint16(x86_xSetOp), uint16(x86_RDGSBASE), - /*6075*/ uint16(x86_xArgRM32), - /*6076*/ uint16(x86_xMatch), - /*6077*/ uint16(x86_xCondIsMem), 6080, 0, - /*6080*/ uint16(x86_xSetOp), uint16(x86_RDGSBASE), - /*6082*/ uint16(x86_xArgRM32), - /*6083*/ uint16(x86_xMatch), - /*6084*/ uint16(x86_xCondIsMem), 6087, 0, - /*6087*/ uint16(x86_xSetOp), uint16(x86_RDGSBASE), - /*6089*/ uint16(x86_xArgRM64), - /*6090*/ uint16(x86_xMatch), - /*6091*/ uint16(x86_xCondIs64), 6094, 6098, - /*6094*/ uint16(x86_xSetOp), uint16(x86_LDMXCSR), - /*6096*/ uint16(x86_xArgM32), - /*6097*/ uint16(x86_xMatch), - /*6098*/ uint16(x86_xCondPrefix), 2, - 0xF3, 6104, - 0x0, 6094, - /*6104*/ uint16(x86_xCondDataSize), 6108, 6112, 6116, - /*6108*/ uint16(x86_xSetOp), uint16(x86_WRFSBASE), - /*6110*/ uint16(x86_xArgRM32), - /*6111*/ uint16(x86_xMatch), - /*6112*/ uint16(x86_xSetOp), uint16(x86_WRFSBASE), - /*6114*/ uint16(x86_xArgRM32), - /*6115*/ uint16(x86_xMatch), - /*6116*/ uint16(x86_xSetOp), uint16(x86_WRFSBASE), - /*6118*/ uint16(x86_xArgRM64), - /*6119*/ uint16(x86_xMatch), - /*6120*/ uint16(x86_xCondIs64), 6123, 6127, - /*6123*/ uint16(x86_xSetOp), uint16(x86_STMXCSR), - /*6125*/ uint16(x86_xArgM32), - /*6126*/ uint16(x86_xMatch), - /*6127*/ uint16(x86_xCondPrefix), 2, - 0xF3, 6133, - 0x0, 6123, - /*6133*/ uint16(x86_xCondDataSize), 6137, 6141, 6145, - /*6137*/ uint16(x86_xSetOp), uint16(x86_WRGSBASE), - /*6139*/ uint16(x86_xArgRM32), - /*6140*/ uint16(x86_xMatch), - /*6141*/ uint16(x86_xSetOp), uint16(x86_WRGSBASE), - /*6143*/ uint16(x86_xArgRM32), - /*6144*/ uint16(x86_xMatch), - /*6145*/ uint16(x86_xSetOp), uint16(x86_WRGSBASE), - /*6147*/ uint16(x86_xArgRM64), - /*6148*/ uint16(x86_xMatch), - /*6149*/ uint16(x86_xCondIs64), 6152, 6164, - /*6152*/ uint16(x86_xCondDataSize), 6156, 6160, 0, - /*6156*/ uint16(x86_xSetOp), uint16(x86_XSAVE), - /*6158*/ uint16(x86_xArgMem), - /*6159*/ uint16(x86_xMatch), - /*6160*/ uint16(x86_xSetOp), uint16(x86_XSAVE), - /*6162*/ uint16(x86_xArgMem), - /*6163*/ uint16(x86_xMatch), - /*6164*/ uint16(x86_xCondDataSize), 6156, 6160, 6168, - /*6168*/ uint16(x86_xSetOp), uint16(x86_XSAVE64), - /*6170*/ uint16(x86_xArgMem), - /*6171*/ uint16(x86_xMatch), - /*6172*/ uint16(x86_xCondIs64), 6175, 6187, - /*6175*/ uint16(x86_xCondDataSize), 6179, 6183, 0, - /*6179*/ uint16(x86_xSetOp), uint16(x86_XRSTOR), - /*6181*/ uint16(x86_xArgMem), - /*6182*/ uint16(x86_xMatch), - /*6183*/ uint16(x86_xSetOp), uint16(x86_XRSTOR), - /*6185*/ uint16(x86_xArgMem), - /*6186*/ uint16(x86_xMatch), - /*6187*/ uint16(x86_xCondDataSize), 6179, 6183, 6191, - /*6191*/ uint16(x86_xSetOp), uint16(x86_XRSTOR64), - /*6193*/ uint16(x86_xArgMem), - /*6194*/ uint16(x86_xMatch), - /*6195*/ uint16(x86_xCondDataSize), 6199, 6203, 6207, - /*6199*/ uint16(x86_xSetOp), uint16(x86_XSAVEOPT), - /*6201*/ uint16(x86_xArgMem), - /*6202*/ uint16(x86_xMatch), - /*6203*/ uint16(x86_xSetOp), uint16(x86_XSAVEOPT), - /*6205*/ uint16(x86_xArgMem), - /*6206*/ uint16(x86_xMatch), - /*6207*/ uint16(x86_xSetOp), uint16(x86_XSAVEOPT64), - /*6209*/ uint16(x86_xArgMem), - /*6210*/ uint16(x86_xMatch), - /*6211*/ uint16(x86_xSetOp), uint16(x86_CLFLUSH), - /*6213*/ uint16(x86_xArgM8), - /*6214*/ uint16(x86_xMatch), - /*6215*/ uint16(x86_xSetOp), uint16(x86_LFENCE), - /*6217*/ uint16(x86_xMatch), - /*6218*/ uint16(x86_xSetOp), uint16(x86_MFENCE), - /*6220*/ uint16(x86_xMatch), - /*6221*/ uint16(x86_xSetOp), uint16(x86_SFENCE), - /*6223*/ uint16(x86_xMatch), - /*6224*/ uint16(x86_xCondIs64), 6227, 6243, - /*6227*/ uint16(x86_xCondDataSize), 6231, 6237, 0, - /*6231*/ uint16(x86_xSetOp), uint16(x86_IMUL), - /*6233*/ uint16(x86_xReadSlashR), - /*6234*/ uint16(x86_xArgR16), - /*6235*/ uint16(x86_xArgRM16), - /*6236*/ uint16(x86_xMatch), - /*6237*/ uint16(x86_xSetOp), uint16(x86_IMUL), - /*6239*/ uint16(x86_xReadSlashR), - /*6240*/ uint16(x86_xArgR32), - /*6241*/ uint16(x86_xArgRM32), - /*6242*/ uint16(x86_xMatch), - /*6243*/ uint16(x86_xCondDataSize), 6231, 6237, 6247, - /*6247*/ uint16(x86_xSetOp), uint16(x86_IMUL), - /*6249*/ uint16(x86_xReadSlashR), - /*6250*/ uint16(x86_xArgR64), - /*6251*/ uint16(x86_xArgRM64), - /*6252*/ uint16(x86_xMatch), - /*6253*/ uint16(x86_xSetOp), uint16(x86_CMPXCHG), - /*6255*/ uint16(x86_xReadSlashR), - /*6256*/ uint16(x86_xArgRM8), - /*6257*/ uint16(x86_xArgR8), - /*6258*/ uint16(x86_xMatch), - /*6259*/ uint16(x86_xCondIs64), 6262, 6278, - /*6262*/ uint16(x86_xCondDataSize), 6266, 6272, 0, - /*6266*/ uint16(x86_xSetOp), uint16(x86_CMPXCHG), - /*6268*/ uint16(x86_xReadSlashR), - /*6269*/ uint16(x86_xArgRM16), - /*6270*/ uint16(x86_xArgR16), - /*6271*/ uint16(x86_xMatch), - /*6272*/ uint16(x86_xSetOp), uint16(x86_CMPXCHG), - /*6274*/ uint16(x86_xReadSlashR), - /*6275*/ uint16(x86_xArgRM32), - /*6276*/ uint16(x86_xArgR32), - /*6277*/ uint16(x86_xMatch), - /*6278*/ uint16(x86_xCondDataSize), 6266, 6272, 6282, - /*6282*/ uint16(x86_xSetOp), uint16(x86_CMPXCHG), - /*6284*/ uint16(x86_xReadSlashR), - /*6285*/ uint16(x86_xArgRM64), - /*6286*/ uint16(x86_xArgR64), - /*6287*/ uint16(x86_xMatch), - /*6288*/ uint16(x86_xCondIs64), 6291, 6307, - /*6291*/ uint16(x86_xCondDataSize), 6295, 6301, 0, - /*6295*/ uint16(x86_xSetOp), uint16(x86_LSS), - /*6297*/ uint16(x86_xReadSlashR), - /*6298*/ uint16(x86_xArgR16), - /*6299*/ uint16(x86_xArgM16colon16), - /*6300*/ uint16(x86_xMatch), - /*6301*/ uint16(x86_xSetOp), uint16(x86_LSS), - /*6303*/ uint16(x86_xReadSlashR), - /*6304*/ uint16(x86_xArgR32), - /*6305*/ uint16(x86_xArgM16colon32), - /*6306*/ uint16(x86_xMatch), - /*6307*/ uint16(x86_xCondDataSize), 6295, 6301, 6311, - /*6311*/ uint16(x86_xSetOp), uint16(x86_LSS), - /*6313*/ uint16(x86_xReadSlashR), - /*6314*/ uint16(x86_xArgR64), - /*6315*/ uint16(x86_xArgM16colon64), - /*6316*/ uint16(x86_xMatch), - /*6317*/ uint16(x86_xCondIs64), 6320, 6336, - /*6320*/ uint16(x86_xCondDataSize), 6324, 6330, 0, - /*6324*/ uint16(x86_xSetOp), uint16(x86_BTR), - /*6326*/ uint16(x86_xReadSlashR), - /*6327*/ uint16(x86_xArgRM16), - /*6328*/ uint16(x86_xArgR16), - /*6329*/ uint16(x86_xMatch), - /*6330*/ uint16(x86_xSetOp), uint16(x86_BTR), - /*6332*/ uint16(x86_xReadSlashR), - /*6333*/ uint16(x86_xArgRM32), - /*6334*/ uint16(x86_xArgR32), - /*6335*/ uint16(x86_xMatch), - /*6336*/ uint16(x86_xCondDataSize), 6324, 6330, 6340, - /*6340*/ uint16(x86_xSetOp), uint16(x86_BTR), - /*6342*/ uint16(x86_xReadSlashR), - /*6343*/ uint16(x86_xArgRM64), - /*6344*/ uint16(x86_xArgR64), - /*6345*/ uint16(x86_xMatch), - /*6346*/ uint16(x86_xCondIs64), 6349, 6365, - /*6349*/ uint16(x86_xCondDataSize), 6353, 6359, 0, - /*6353*/ uint16(x86_xSetOp), uint16(x86_LFS), - /*6355*/ uint16(x86_xReadSlashR), - /*6356*/ uint16(x86_xArgR16), - /*6357*/ uint16(x86_xArgM16colon16), - /*6358*/ uint16(x86_xMatch), - /*6359*/ uint16(x86_xSetOp), uint16(x86_LFS), - /*6361*/ uint16(x86_xReadSlashR), - /*6362*/ uint16(x86_xArgR32), - /*6363*/ uint16(x86_xArgM16colon32), - /*6364*/ uint16(x86_xMatch), - /*6365*/ uint16(x86_xCondDataSize), 6353, 6359, 6369, - /*6369*/ uint16(x86_xSetOp), uint16(x86_LFS), - /*6371*/ uint16(x86_xReadSlashR), - /*6372*/ uint16(x86_xArgR64), - /*6373*/ uint16(x86_xArgM16colon64), - /*6374*/ uint16(x86_xMatch), - /*6375*/ uint16(x86_xCondIs64), 6378, 6394, - /*6378*/ uint16(x86_xCondDataSize), 6382, 6388, 0, - /*6382*/ uint16(x86_xSetOp), uint16(x86_LGS), - /*6384*/ uint16(x86_xReadSlashR), - /*6385*/ uint16(x86_xArgR16), - /*6386*/ uint16(x86_xArgM16colon16), - /*6387*/ uint16(x86_xMatch), - /*6388*/ uint16(x86_xSetOp), uint16(x86_LGS), - /*6390*/ uint16(x86_xReadSlashR), - /*6391*/ uint16(x86_xArgR32), - /*6392*/ uint16(x86_xArgM16colon32), - /*6393*/ uint16(x86_xMatch), - /*6394*/ uint16(x86_xCondDataSize), 6382, 6388, 6398, - /*6398*/ uint16(x86_xSetOp), uint16(x86_LGS), - /*6400*/ uint16(x86_xReadSlashR), - /*6401*/ uint16(x86_xArgR64), - /*6402*/ uint16(x86_xArgM16colon64), - /*6403*/ uint16(x86_xMatch), - /*6404*/ uint16(x86_xCondIs64), 6407, 6423, - /*6407*/ uint16(x86_xCondDataSize), 6411, 6417, 0, - /*6411*/ uint16(x86_xSetOp), uint16(x86_MOVZX), - /*6413*/ uint16(x86_xReadSlashR), - /*6414*/ uint16(x86_xArgR16), - /*6415*/ uint16(x86_xArgRM8), - /*6416*/ uint16(x86_xMatch), - /*6417*/ uint16(x86_xSetOp), uint16(x86_MOVZX), - /*6419*/ uint16(x86_xReadSlashR), - /*6420*/ uint16(x86_xArgR32), - /*6421*/ uint16(x86_xArgRM8), - /*6422*/ uint16(x86_xMatch), - /*6423*/ uint16(x86_xCondDataSize), 6411, 6417, 6427, - /*6427*/ uint16(x86_xSetOp), uint16(x86_MOVZX), - /*6429*/ uint16(x86_xReadSlashR), - /*6430*/ uint16(x86_xArgR64), - /*6431*/ uint16(x86_xArgRM8), - /*6432*/ uint16(x86_xMatch), - /*6433*/ uint16(x86_xCondIs64), 6436, 6452, - /*6436*/ uint16(x86_xCondDataSize), 6440, 6446, 0, - /*6440*/ uint16(x86_xSetOp), uint16(x86_MOVZX), - /*6442*/ uint16(x86_xReadSlashR), - /*6443*/ uint16(x86_xArgR16), - /*6444*/ uint16(x86_xArgRM16), - /*6445*/ uint16(x86_xMatch), - /*6446*/ uint16(x86_xSetOp), uint16(x86_MOVZX), - /*6448*/ uint16(x86_xReadSlashR), - /*6449*/ uint16(x86_xArgR32), - /*6450*/ uint16(x86_xArgRM16), - /*6451*/ uint16(x86_xMatch), - /*6452*/ uint16(x86_xCondDataSize), 6440, 6446, 6456, - /*6456*/ uint16(x86_xSetOp), uint16(x86_MOVZX), - /*6458*/ uint16(x86_xReadSlashR), - /*6459*/ uint16(x86_xArgR64), - /*6460*/ uint16(x86_xArgRM16), - /*6461*/ uint16(x86_xMatch), - /*6462*/ uint16(x86_xCondIs64), 6465, 6485, - /*6465*/ uint16(x86_xCondPrefix), 1, - 0xF3, 6469, - /*6469*/ uint16(x86_xCondDataSize), 6473, 6479, 0, - /*6473*/ uint16(x86_xSetOp), uint16(x86_POPCNT), - /*6475*/ uint16(x86_xReadSlashR), - /*6476*/ uint16(x86_xArgR16), - /*6477*/ uint16(x86_xArgRM16), - /*6478*/ uint16(x86_xMatch), - /*6479*/ uint16(x86_xSetOp), uint16(x86_POPCNT), - /*6481*/ uint16(x86_xReadSlashR), - /*6482*/ uint16(x86_xArgR32), - /*6483*/ uint16(x86_xArgRM32), - /*6484*/ uint16(x86_xMatch), - /*6485*/ uint16(x86_xCondPrefix), 1, - 0xF3, 6489, - /*6489*/ uint16(x86_xCondDataSize), 6473, 6479, 6493, - /*6493*/ uint16(x86_xSetOp), uint16(x86_POPCNT), - /*6495*/ uint16(x86_xReadSlashR), - /*6496*/ uint16(x86_xArgR64), - /*6497*/ uint16(x86_xArgRM64), - /*6498*/ uint16(x86_xMatch), - /*6499*/ uint16(x86_xSetOp), uint16(x86_UD1), - /*6501*/ uint16(x86_xMatch), - /*6502*/ uint16(x86_xCondSlashR), - 0, // 0 - 0, // 1 - 0, // 2 - 0, // 3 - 6511, // 4 - 6540, // 5 - 6569, // 6 - 6598, // 7 - /*6511*/ uint16(x86_xCondIs64), 6514, 6530, - /*6514*/ uint16(x86_xCondDataSize), 6518, 6524, 0, - /*6518*/ uint16(x86_xSetOp), uint16(x86_BT), - /*6520*/ uint16(x86_xReadIb), - /*6521*/ uint16(x86_xArgRM16), - /*6522*/ uint16(x86_xArgImm8u), - /*6523*/ uint16(x86_xMatch), - /*6524*/ uint16(x86_xSetOp), uint16(x86_BT), - /*6526*/ uint16(x86_xReadIb), - /*6527*/ uint16(x86_xArgRM32), - /*6528*/ uint16(x86_xArgImm8u), - /*6529*/ uint16(x86_xMatch), - /*6530*/ uint16(x86_xCondDataSize), 6518, 6524, 6534, - /*6534*/ uint16(x86_xSetOp), uint16(x86_BT), - /*6536*/ uint16(x86_xReadIb), - /*6537*/ uint16(x86_xArgRM64), - /*6538*/ uint16(x86_xArgImm8u), - /*6539*/ uint16(x86_xMatch), - /*6540*/ uint16(x86_xCondIs64), 6543, 6559, - /*6543*/ uint16(x86_xCondDataSize), 6547, 6553, 0, - /*6547*/ uint16(x86_xSetOp), uint16(x86_BTS), - /*6549*/ uint16(x86_xReadIb), - /*6550*/ uint16(x86_xArgRM16), - /*6551*/ uint16(x86_xArgImm8u), - /*6552*/ uint16(x86_xMatch), - /*6553*/ uint16(x86_xSetOp), uint16(x86_BTS), - /*6555*/ uint16(x86_xReadIb), - /*6556*/ uint16(x86_xArgRM32), - /*6557*/ uint16(x86_xArgImm8u), - /*6558*/ uint16(x86_xMatch), - /*6559*/ uint16(x86_xCondDataSize), 6547, 6553, 6563, - /*6563*/ uint16(x86_xSetOp), uint16(x86_BTS), - /*6565*/ uint16(x86_xReadIb), - /*6566*/ uint16(x86_xArgRM64), - /*6567*/ uint16(x86_xArgImm8u), - /*6568*/ uint16(x86_xMatch), - /*6569*/ uint16(x86_xCondIs64), 6572, 6588, - /*6572*/ uint16(x86_xCondDataSize), 6576, 6582, 0, - /*6576*/ uint16(x86_xSetOp), uint16(x86_BTR), - /*6578*/ uint16(x86_xReadIb), - /*6579*/ uint16(x86_xArgRM16), - /*6580*/ uint16(x86_xArgImm8u), - /*6581*/ uint16(x86_xMatch), - /*6582*/ uint16(x86_xSetOp), uint16(x86_BTR), - /*6584*/ uint16(x86_xReadIb), - /*6585*/ uint16(x86_xArgRM32), - /*6586*/ uint16(x86_xArgImm8u), - /*6587*/ uint16(x86_xMatch), - /*6588*/ uint16(x86_xCondDataSize), 6576, 6582, 6592, - /*6592*/ uint16(x86_xSetOp), uint16(x86_BTR), - /*6594*/ uint16(x86_xReadIb), - /*6595*/ uint16(x86_xArgRM64), - /*6596*/ uint16(x86_xArgImm8u), - /*6597*/ uint16(x86_xMatch), - /*6598*/ uint16(x86_xCondIs64), 6601, 6617, - /*6601*/ uint16(x86_xCondDataSize), 6605, 6611, 0, - /*6605*/ uint16(x86_xSetOp), uint16(x86_BTC), - /*6607*/ uint16(x86_xReadIb), - /*6608*/ uint16(x86_xArgRM16), - /*6609*/ uint16(x86_xArgImm8u), - /*6610*/ uint16(x86_xMatch), - /*6611*/ uint16(x86_xSetOp), uint16(x86_BTC), - /*6613*/ uint16(x86_xReadIb), - /*6614*/ uint16(x86_xArgRM32), - /*6615*/ uint16(x86_xArgImm8u), - /*6616*/ uint16(x86_xMatch), - /*6617*/ uint16(x86_xCondDataSize), 6605, 6611, 6621, - /*6621*/ uint16(x86_xSetOp), uint16(x86_BTC), - /*6623*/ uint16(x86_xReadIb), - /*6624*/ uint16(x86_xArgRM64), - /*6625*/ uint16(x86_xArgImm8u), - /*6626*/ uint16(x86_xMatch), - /*6627*/ uint16(x86_xCondIs64), 6630, 6646, - /*6630*/ uint16(x86_xCondDataSize), 6634, 6640, 0, - /*6634*/ uint16(x86_xSetOp), uint16(x86_BTC), - /*6636*/ uint16(x86_xReadSlashR), - /*6637*/ uint16(x86_xArgRM16), - /*6638*/ uint16(x86_xArgR16), - /*6639*/ uint16(x86_xMatch), - /*6640*/ uint16(x86_xSetOp), uint16(x86_BTC), - /*6642*/ uint16(x86_xReadSlashR), - /*6643*/ uint16(x86_xArgRM32), - /*6644*/ uint16(x86_xArgR32), - /*6645*/ uint16(x86_xMatch), - /*6646*/ uint16(x86_xCondDataSize), 6634, 6640, 6650, - /*6650*/ uint16(x86_xSetOp), uint16(x86_BTC), - /*6652*/ uint16(x86_xReadSlashR), - /*6653*/ uint16(x86_xArgRM64), - /*6654*/ uint16(x86_xArgR64), - /*6655*/ uint16(x86_xMatch), - /*6656*/ uint16(x86_xCondIs64), 6659, 6697, - /*6659*/ uint16(x86_xCondPrefix), 2, - 0xF3, 6681, - 0x0, 6665, - /*6665*/ uint16(x86_xCondDataSize), 6669, 6675, 0, - /*6669*/ uint16(x86_xSetOp), uint16(x86_BSF), - /*6671*/ uint16(x86_xReadSlashR), - /*6672*/ uint16(x86_xArgR16), - /*6673*/ uint16(x86_xArgRM16), - /*6674*/ uint16(x86_xMatch), - /*6675*/ uint16(x86_xSetOp), uint16(x86_BSF), - /*6677*/ uint16(x86_xReadSlashR), - /*6678*/ uint16(x86_xArgR32), - /*6679*/ uint16(x86_xArgRM32), - /*6680*/ uint16(x86_xMatch), - /*6681*/ uint16(x86_xCondDataSize), 6685, 6691, 0, - /*6685*/ uint16(x86_xSetOp), uint16(x86_TZCNT), - /*6687*/ uint16(x86_xReadSlashR), - /*6688*/ uint16(x86_xArgR16), - /*6689*/ uint16(x86_xArgRM16), - /*6690*/ uint16(x86_xMatch), - /*6691*/ uint16(x86_xSetOp), uint16(x86_TZCNT), - /*6693*/ uint16(x86_xReadSlashR), - /*6694*/ uint16(x86_xArgR32), - /*6695*/ uint16(x86_xArgRM32), - /*6696*/ uint16(x86_xMatch), - /*6697*/ uint16(x86_xCondPrefix), 2, - 0xF3, 6713, - 0x0, 6703, - /*6703*/ uint16(x86_xCondDataSize), 6669, 6675, 6707, - /*6707*/ uint16(x86_xSetOp), uint16(x86_BSF), - /*6709*/ uint16(x86_xReadSlashR), - /*6710*/ uint16(x86_xArgR64), - /*6711*/ uint16(x86_xArgRM64), - /*6712*/ uint16(x86_xMatch), - /*6713*/ uint16(x86_xCondDataSize), 6685, 6691, 6717, - /*6717*/ uint16(x86_xSetOp), uint16(x86_TZCNT), - /*6719*/ uint16(x86_xReadSlashR), - /*6720*/ uint16(x86_xArgR64), - /*6721*/ uint16(x86_xArgRM64), - /*6722*/ uint16(x86_xMatch), - /*6723*/ uint16(x86_xCondIs64), 6726, 6764, - /*6726*/ uint16(x86_xCondPrefix), 2, - 0xF3, 6748, - 0x0, 6732, - /*6732*/ uint16(x86_xCondDataSize), 6736, 6742, 0, - /*6736*/ uint16(x86_xSetOp), uint16(x86_BSR), - /*6738*/ uint16(x86_xReadSlashR), - /*6739*/ uint16(x86_xArgR16), - /*6740*/ uint16(x86_xArgRM16), - /*6741*/ uint16(x86_xMatch), - /*6742*/ uint16(x86_xSetOp), uint16(x86_BSR), - /*6744*/ uint16(x86_xReadSlashR), - /*6745*/ uint16(x86_xArgR32), - /*6746*/ uint16(x86_xArgRM32), - /*6747*/ uint16(x86_xMatch), - /*6748*/ uint16(x86_xCondDataSize), 6752, 6758, 0, - /*6752*/ uint16(x86_xSetOp), uint16(x86_LZCNT), - /*6754*/ uint16(x86_xReadSlashR), - /*6755*/ uint16(x86_xArgR16), - /*6756*/ uint16(x86_xArgRM16), - /*6757*/ uint16(x86_xMatch), - /*6758*/ uint16(x86_xSetOp), uint16(x86_LZCNT), - /*6760*/ uint16(x86_xReadSlashR), - /*6761*/ uint16(x86_xArgR32), - /*6762*/ uint16(x86_xArgRM32), - /*6763*/ uint16(x86_xMatch), - /*6764*/ uint16(x86_xCondPrefix), 2, - 0xF3, 6780, - 0x0, 6770, - /*6770*/ uint16(x86_xCondDataSize), 6736, 6742, 6774, - /*6774*/ uint16(x86_xSetOp), uint16(x86_BSR), - /*6776*/ uint16(x86_xReadSlashR), - /*6777*/ uint16(x86_xArgR64), - /*6778*/ uint16(x86_xArgRM64), - /*6779*/ uint16(x86_xMatch), - /*6780*/ uint16(x86_xCondDataSize), 6752, 6758, 6784, - /*6784*/ uint16(x86_xSetOp), uint16(x86_LZCNT), - /*6786*/ uint16(x86_xReadSlashR), - /*6787*/ uint16(x86_xArgR64), - /*6788*/ uint16(x86_xArgRM64), - /*6789*/ uint16(x86_xMatch), - /*6790*/ uint16(x86_xCondIs64), 6793, 6809, - /*6793*/ uint16(x86_xCondDataSize), 6797, 6803, 0, - /*6797*/ uint16(x86_xSetOp), uint16(x86_MOVSX), - /*6799*/ uint16(x86_xReadSlashR), - /*6800*/ uint16(x86_xArgR16), - /*6801*/ uint16(x86_xArgRM8), - /*6802*/ uint16(x86_xMatch), - /*6803*/ uint16(x86_xSetOp), uint16(x86_MOVSX), - /*6805*/ uint16(x86_xReadSlashR), - /*6806*/ uint16(x86_xArgR32), - /*6807*/ uint16(x86_xArgRM8), - /*6808*/ uint16(x86_xMatch), - /*6809*/ uint16(x86_xCondDataSize), 6797, 6803, 6813, - /*6813*/ uint16(x86_xSetOp), uint16(x86_MOVSX), - /*6815*/ uint16(x86_xReadSlashR), - /*6816*/ uint16(x86_xArgR64), - /*6817*/ uint16(x86_xArgRM8), - /*6818*/ uint16(x86_xMatch), - /*6819*/ uint16(x86_xCondIs64), 6822, 6838, - /*6822*/ uint16(x86_xCondDataSize), 6826, 6832, 0, - /*6826*/ uint16(x86_xSetOp), uint16(x86_MOVSX), - /*6828*/ uint16(x86_xReadSlashR), - /*6829*/ uint16(x86_xArgR16), - /*6830*/ uint16(x86_xArgRM16), - /*6831*/ uint16(x86_xMatch), - /*6832*/ uint16(x86_xSetOp), uint16(x86_MOVSX), - /*6834*/ uint16(x86_xReadSlashR), - /*6835*/ uint16(x86_xArgR32), - /*6836*/ uint16(x86_xArgRM16), - /*6837*/ uint16(x86_xMatch), - /*6838*/ uint16(x86_xCondDataSize), 6826, 6832, 6842, - /*6842*/ uint16(x86_xSetOp), uint16(x86_MOVSX), - /*6844*/ uint16(x86_xReadSlashR), - /*6845*/ uint16(x86_xArgR64), - /*6846*/ uint16(x86_xArgRM16), - /*6847*/ uint16(x86_xMatch), - /*6848*/ uint16(x86_xSetOp), uint16(x86_XADD), - /*6850*/ uint16(x86_xReadSlashR), - /*6851*/ uint16(x86_xArgRM8), - /*6852*/ uint16(x86_xArgR8), - /*6853*/ uint16(x86_xMatch), - /*6854*/ uint16(x86_xCondIs64), 6857, 6873, - /*6857*/ uint16(x86_xCondDataSize), 6861, 6867, 0, - /*6861*/ uint16(x86_xSetOp), uint16(x86_XADD), - /*6863*/ uint16(x86_xReadSlashR), - /*6864*/ uint16(x86_xArgRM16), - /*6865*/ uint16(x86_xArgR16), - /*6866*/ uint16(x86_xMatch), - /*6867*/ uint16(x86_xSetOp), uint16(x86_XADD), - /*6869*/ uint16(x86_xReadSlashR), - /*6870*/ uint16(x86_xArgRM32), - /*6871*/ uint16(x86_xArgR32), - /*6872*/ uint16(x86_xMatch), - /*6873*/ uint16(x86_xCondDataSize), 6861, 6867, 6877, - /*6877*/ uint16(x86_xSetOp), uint16(x86_XADD), - /*6879*/ uint16(x86_xReadSlashR), - /*6880*/ uint16(x86_xArgRM64), - /*6881*/ uint16(x86_xArgR64), - /*6882*/ uint16(x86_xMatch), - /*6883*/ uint16(x86_xCondPrefix), 4, - 0xF3, 6917, - 0xF2, 6909, - 0x66, 6901, - 0x0, 6893, - /*6893*/ uint16(x86_xSetOp), uint16(x86_CMPPS), - /*6895*/ uint16(x86_xReadSlashR), - /*6896*/ uint16(x86_xReadIb), - /*6897*/ uint16(x86_xArgXmm1), - /*6898*/ uint16(x86_xArgXmm2M128), - /*6899*/ uint16(x86_xArgImm8u), - /*6900*/ uint16(x86_xMatch), - /*6901*/ uint16(x86_xSetOp), uint16(x86_CMPPD), - /*6903*/ uint16(x86_xReadSlashR), - /*6904*/ uint16(x86_xReadIb), - /*6905*/ uint16(x86_xArgXmm1), - /*6906*/ uint16(x86_xArgXmm2M128), - /*6907*/ uint16(x86_xArgImm8u), - /*6908*/ uint16(x86_xMatch), - /*6909*/ uint16(x86_xSetOp), uint16(x86_CMPSD_XMM), - /*6911*/ uint16(x86_xReadSlashR), - /*6912*/ uint16(x86_xReadIb), - /*6913*/ uint16(x86_xArgXmm1), - /*6914*/ uint16(x86_xArgXmm2M64), - /*6915*/ uint16(x86_xArgImm8u), - /*6916*/ uint16(x86_xMatch), - /*6917*/ uint16(x86_xSetOp), uint16(x86_CMPSS), - /*6919*/ uint16(x86_xReadSlashR), - /*6920*/ uint16(x86_xReadIb), - /*6921*/ uint16(x86_xArgXmm1), - /*6922*/ uint16(x86_xArgXmm2M32), - /*6923*/ uint16(x86_xArgImm8u), - /*6924*/ uint16(x86_xMatch), - /*6925*/ uint16(x86_xCondIs64), 6928, 6944, - /*6928*/ uint16(x86_xCondDataSize), 6932, 6938, 0, - /*6932*/ uint16(x86_xSetOp), uint16(x86_MOVNTI), - /*6934*/ uint16(x86_xReadSlashR), - /*6935*/ uint16(x86_xArgM32), - /*6936*/ uint16(x86_xArgR32), - /*6937*/ uint16(x86_xMatch), - /*6938*/ uint16(x86_xSetOp), uint16(x86_MOVNTI), - /*6940*/ uint16(x86_xReadSlashR), - /*6941*/ uint16(x86_xArgM32), - /*6942*/ uint16(x86_xArgR32), - /*6943*/ uint16(x86_xMatch), - /*6944*/ uint16(x86_xCondDataSize), 6932, 6938, 6948, - /*6948*/ uint16(x86_xSetOp), uint16(x86_MOVNTI), - /*6950*/ uint16(x86_xReadSlashR), - /*6951*/ uint16(x86_xArgM64), - /*6952*/ uint16(x86_xArgR64), - /*6953*/ uint16(x86_xMatch), - /*6954*/ uint16(x86_xCondPrefix), 2, - 0x66, 6968, - 0x0, 6960, - /*6960*/ uint16(x86_xSetOp), uint16(x86_PINSRW), - /*6962*/ uint16(x86_xReadSlashR), - /*6963*/ uint16(x86_xReadIb), - /*6964*/ uint16(x86_xArgMm), - /*6965*/ uint16(x86_xArgR32M16), - /*6966*/ uint16(x86_xArgImm8u), - /*6967*/ uint16(x86_xMatch), - /*6968*/ uint16(x86_xSetOp), uint16(x86_PINSRW), - /*6970*/ uint16(x86_xReadSlashR), - /*6971*/ uint16(x86_xReadIb), - /*6972*/ uint16(x86_xArgXmm), - /*6973*/ uint16(x86_xArgR32M16), - /*6974*/ uint16(x86_xArgImm8u), - /*6975*/ uint16(x86_xMatch), - /*6976*/ uint16(x86_xCondPrefix), 2, - 0x66, 6990, - 0x0, 6982, - /*6982*/ uint16(x86_xSetOp), uint16(x86_PEXTRW), - /*6984*/ uint16(x86_xReadSlashR), - /*6985*/ uint16(x86_xReadIb), - /*6986*/ uint16(x86_xArgR32), - /*6987*/ uint16(x86_xArgMm2), - /*6988*/ uint16(x86_xArgImm8u), - /*6989*/ uint16(x86_xMatch), - /*6990*/ uint16(x86_xSetOp), uint16(x86_PEXTRW), - /*6992*/ uint16(x86_xReadSlashR), - /*6993*/ uint16(x86_xReadIb), - /*6994*/ uint16(x86_xArgR32), - /*6995*/ uint16(x86_xArgXmm2), - /*6996*/ uint16(x86_xArgImm8u), - /*6997*/ uint16(x86_xMatch), - /*6998*/ uint16(x86_xCondPrefix), 2, - 0x66, 7012, - 0x0, 7004, - /*7004*/ uint16(x86_xSetOp), uint16(x86_SHUFPS), - /*7006*/ uint16(x86_xReadSlashR), - /*7007*/ uint16(x86_xReadIb), - /*7008*/ uint16(x86_xArgXmm1), - /*7009*/ uint16(x86_xArgXmm2M128), - /*7010*/ uint16(x86_xArgImm8u), - /*7011*/ uint16(x86_xMatch), - /*7012*/ uint16(x86_xSetOp), uint16(x86_SHUFPD), - /*7014*/ uint16(x86_xReadSlashR), - /*7015*/ uint16(x86_xReadIb), - /*7016*/ uint16(x86_xArgXmm1), - /*7017*/ uint16(x86_xArgXmm2M128), - /*7018*/ uint16(x86_xArgImm8u), - /*7019*/ uint16(x86_xMatch), - /*7020*/ uint16(x86_xCondSlashR), - 0, // 0 - 7029, // 1 - 0, // 2 - 7052, // 3 - 7075, // 4 - 7098, // 5 - 7121, // 6 - 0, // 7 - /*7029*/ uint16(x86_xCondIs64), 7032, 7044, - /*7032*/ uint16(x86_xCondDataSize), 7036, 7040, 0, - /*7036*/ uint16(x86_xSetOp), uint16(x86_CMPXCHG8B), - /*7038*/ uint16(x86_xArgM64), - /*7039*/ uint16(x86_xMatch), - /*7040*/ uint16(x86_xSetOp), uint16(x86_CMPXCHG8B), - /*7042*/ uint16(x86_xArgM64), - /*7043*/ uint16(x86_xMatch), - /*7044*/ uint16(x86_xCondDataSize), 7036, 7040, 7048, - /*7048*/ uint16(x86_xSetOp), uint16(x86_CMPXCHG16B), - /*7050*/ uint16(x86_xArgM128), - /*7051*/ uint16(x86_xMatch), - /*7052*/ uint16(x86_xCondIs64), 7055, 7067, - /*7055*/ uint16(x86_xCondDataSize), 7059, 7063, 0, - /*7059*/ uint16(x86_xSetOp), uint16(x86_XRSTORS), - /*7061*/ uint16(x86_xArgMem), - /*7062*/ uint16(x86_xMatch), - /*7063*/ uint16(x86_xSetOp), uint16(x86_XRSTORS), - /*7065*/ uint16(x86_xArgMem), - /*7066*/ uint16(x86_xMatch), - /*7067*/ uint16(x86_xCondDataSize), 7059, 7063, 7071, - /*7071*/ uint16(x86_xSetOp), uint16(x86_XRSTORS64), - /*7073*/ uint16(x86_xArgMem), - /*7074*/ uint16(x86_xMatch), - /*7075*/ uint16(x86_xCondIs64), 7078, 7090, - /*7078*/ uint16(x86_xCondDataSize), 7082, 7086, 0, - /*7082*/ uint16(x86_xSetOp), uint16(x86_XSAVEC), - /*7084*/ uint16(x86_xArgMem), - /*7085*/ uint16(x86_xMatch), - /*7086*/ uint16(x86_xSetOp), uint16(x86_XSAVEC), - /*7088*/ uint16(x86_xArgMem), - /*7089*/ uint16(x86_xMatch), - /*7090*/ uint16(x86_xCondDataSize), 7082, 7086, 7094, - /*7094*/ uint16(x86_xSetOp), uint16(x86_XSAVEC64), - /*7096*/ uint16(x86_xArgMem), - /*7097*/ uint16(x86_xMatch), - /*7098*/ uint16(x86_xCondIs64), 7101, 7113, - /*7101*/ uint16(x86_xCondDataSize), 7105, 7109, 0, - /*7105*/ uint16(x86_xSetOp), uint16(x86_XSAVES), - /*7107*/ uint16(x86_xArgMem), - /*7108*/ uint16(x86_xMatch), - /*7109*/ uint16(x86_xSetOp), uint16(x86_XSAVES), - /*7111*/ uint16(x86_xArgMem), - /*7112*/ uint16(x86_xMatch), - /*7113*/ uint16(x86_xCondDataSize), 7105, 7109, 7117, - /*7117*/ uint16(x86_xSetOp), uint16(x86_XSAVES64), - /*7119*/ uint16(x86_xArgMem), - /*7120*/ uint16(x86_xMatch), - /*7121*/ uint16(x86_xCondIs64), 7124, 7142, - /*7124*/ uint16(x86_xCondDataSize), 7128, 7135, 0, - /*7128*/ uint16(x86_xCondIsMem), 7131, 0, - /*7131*/ uint16(x86_xSetOp), uint16(x86_RDRAND), - /*7133*/ uint16(x86_xArgRmf16), - /*7134*/ uint16(x86_xMatch), - /*7135*/ uint16(x86_xCondIsMem), 7138, 0, - /*7138*/ uint16(x86_xSetOp), uint16(x86_RDRAND), - /*7140*/ uint16(x86_xArgRmf32), - /*7141*/ uint16(x86_xMatch), - /*7142*/ uint16(x86_xCondDataSize), 7128, 7135, 7146, - /*7146*/ uint16(x86_xSetOp), uint16(x86_RDRAND), - /*7148*/ uint16(x86_xMatch), - /*7149*/ uint16(x86_xCondIs64), 7152, 7164, - /*7152*/ uint16(x86_xCondDataSize), 7156, 7160, 0, - /*7156*/ uint16(x86_xSetOp), uint16(x86_BSWAP), - /*7158*/ uint16(x86_xArgR16op), - /*7159*/ uint16(x86_xMatch), - /*7160*/ uint16(x86_xSetOp), uint16(x86_BSWAP), - /*7162*/ uint16(x86_xArgR32op), - /*7163*/ uint16(x86_xMatch), - /*7164*/ uint16(x86_xCondDataSize), 7156, 7160, 7168, - /*7168*/ uint16(x86_xSetOp), uint16(x86_BSWAP), - /*7170*/ uint16(x86_xArgR64op), - /*7171*/ uint16(x86_xMatch), - /*7172*/ uint16(x86_xCondPrefix), 2, - 0xF2, 7184, - 0x66, 7178, - /*7178*/ uint16(x86_xSetOp), uint16(x86_ADDSUBPD), - /*7180*/ uint16(x86_xReadSlashR), - /*7181*/ uint16(x86_xArgXmm1), - /*7182*/ uint16(x86_xArgXmm2M128), - /*7183*/ uint16(x86_xMatch), - /*7184*/ uint16(x86_xSetOp), uint16(x86_ADDSUBPS), - /*7186*/ uint16(x86_xReadSlashR), - /*7187*/ uint16(x86_xArgXmm1), - /*7188*/ uint16(x86_xArgXmm2M128), - /*7189*/ uint16(x86_xMatch), - /*7190*/ uint16(x86_xCondPrefix), 2, - 0x66, 7202, - 0x0, 7196, - /*7196*/ uint16(x86_xSetOp), uint16(x86_PSRLW), - /*7198*/ uint16(x86_xReadSlashR), - /*7199*/ uint16(x86_xArgMm), - /*7200*/ uint16(x86_xArgMmM64), - /*7201*/ uint16(x86_xMatch), - /*7202*/ uint16(x86_xSetOp), uint16(x86_PSRLW), - /*7204*/ uint16(x86_xReadSlashR), - /*7205*/ uint16(x86_xArgXmm1), - /*7206*/ uint16(x86_xArgXmm2M128), - /*7207*/ uint16(x86_xMatch), - /*7208*/ uint16(x86_xCondPrefix), 2, - 0x66, 7220, - 0x0, 7214, - /*7214*/ uint16(x86_xSetOp), uint16(x86_PSRLD), - /*7216*/ uint16(x86_xReadSlashR), - /*7217*/ uint16(x86_xArgMm), - /*7218*/ uint16(x86_xArgMmM64), - /*7219*/ uint16(x86_xMatch), - /*7220*/ uint16(x86_xSetOp), uint16(x86_PSRLD), - /*7222*/ uint16(x86_xReadSlashR), - /*7223*/ uint16(x86_xArgXmm1), - /*7224*/ uint16(x86_xArgXmm2M128), - /*7225*/ uint16(x86_xMatch), - /*7226*/ uint16(x86_xCondPrefix), 2, - 0x66, 7238, - 0x0, 7232, - /*7232*/ uint16(x86_xSetOp), uint16(x86_PSRLQ), - /*7234*/ uint16(x86_xReadSlashR), - /*7235*/ uint16(x86_xArgMm), - /*7236*/ uint16(x86_xArgMmM64), - /*7237*/ uint16(x86_xMatch), - /*7238*/ uint16(x86_xSetOp), uint16(x86_PSRLQ), - /*7240*/ uint16(x86_xReadSlashR), - /*7241*/ uint16(x86_xArgXmm1), - /*7242*/ uint16(x86_xArgXmm2M128), - /*7243*/ uint16(x86_xMatch), - /*7244*/ uint16(x86_xCondPrefix), 2, - 0x66, 7256, - 0x0, 7250, - /*7250*/ uint16(x86_xSetOp), uint16(x86_PADDQ), - /*7252*/ uint16(x86_xReadSlashR), - /*7253*/ uint16(x86_xArgMm1), - /*7254*/ uint16(x86_xArgMm2M64), - /*7255*/ uint16(x86_xMatch), - /*7256*/ uint16(x86_xSetOp), uint16(x86_PADDQ), - /*7258*/ uint16(x86_xReadSlashR), - /*7259*/ uint16(x86_xArgXmm1), - /*7260*/ uint16(x86_xArgXmm2M128), - /*7261*/ uint16(x86_xMatch), - /*7262*/ uint16(x86_xCondPrefix), 2, - 0x66, 7274, - 0x0, 7268, - /*7268*/ uint16(x86_xSetOp), uint16(x86_PMULLW), - /*7270*/ uint16(x86_xReadSlashR), - /*7271*/ uint16(x86_xArgMm), - /*7272*/ uint16(x86_xArgMmM64), - /*7273*/ uint16(x86_xMatch), - /*7274*/ uint16(x86_xSetOp), uint16(x86_PMULLW), - /*7276*/ uint16(x86_xReadSlashR), - /*7277*/ uint16(x86_xArgXmm1), - /*7278*/ uint16(x86_xArgXmm2M128), - /*7279*/ uint16(x86_xMatch), - /*7280*/ uint16(x86_xCondPrefix), 3, - 0xF3, 7300, - 0xF2, 7294, - 0x66, 7288, - /*7288*/ uint16(x86_xSetOp), uint16(x86_MOVQ), - /*7290*/ uint16(x86_xReadSlashR), - /*7291*/ uint16(x86_xArgXmm2M64), - /*7292*/ uint16(x86_xArgXmm1), - /*7293*/ uint16(x86_xMatch), - /*7294*/ uint16(x86_xSetOp), uint16(x86_MOVDQ2Q), - /*7296*/ uint16(x86_xReadSlashR), - /*7297*/ uint16(x86_xArgMm), - /*7298*/ uint16(x86_xArgXmm2), - /*7299*/ uint16(x86_xMatch), - /*7300*/ uint16(x86_xSetOp), uint16(x86_MOVQ2DQ), - /*7302*/ uint16(x86_xReadSlashR), - /*7303*/ uint16(x86_xArgXmm1), - /*7304*/ uint16(x86_xArgMm2), - /*7305*/ uint16(x86_xMatch), - /*7306*/ uint16(x86_xCondPrefix), 2, - 0x66, 7318, - 0x0, 7312, - /*7312*/ uint16(x86_xSetOp), uint16(x86_PMOVMSKB), - /*7314*/ uint16(x86_xReadSlashR), - /*7315*/ uint16(x86_xArgR32), - /*7316*/ uint16(x86_xArgMm2), - /*7317*/ uint16(x86_xMatch), - /*7318*/ uint16(x86_xSetOp), uint16(x86_PMOVMSKB), - /*7320*/ uint16(x86_xReadSlashR), - /*7321*/ uint16(x86_xArgR32), - /*7322*/ uint16(x86_xArgXmm2), - /*7323*/ uint16(x86_xMatch), - /*7324*/ uint16(x86_xCondPrefix), 2, - 0x66, 7336, - 0x0, 7330, - /*7330*/ uint16(x86_xSetOp), uint16(x86_PSUBUSB), - /*7332*/ uint16(x86_xReadSlashR), - /*7333*/ uint16(x86_xArgMm), - /*7334*/ uint16(x86_xArgMmM64), - /*7335*/ uint16(x86_xMatch), - /*7336*/ uint16(x86_xSetOp), uint16(x86_PSUBUSB), - /*7338*/ uint16(x86_xReadSlashR), - /*7339*/ uint16(x86_xArgXmm1), - /*7340*/ uint16(x86_xArgXmm2M128), - /*7341*/ uint16(x86_xMatch), - /*7342*/ uint16(x86_xCondPrefix), 2, - 0x66, 7354, - 0x0, 7348, - /*7348*/ uint16(x86_xSetOp), uint16(x86_PSUBUSW), - /*7350*/ uint16(x86_xReadSlashR), - /*7351*/ uint16(x86_xArgMm), - /*7352*/ uint16(x86_xArgMmM64), - /*7353*/ uint16(x86_xMatch), - /*7354*/ uint16(x86_xSetOp), uint16(x86_PSUBUSW), - /*7356*/ uint16(x86_xReadSlashR), - /*7357*/ uint16(x86_xArgXmm1), - /*7358*/ uint16(x86_xArgXmm2M128), - /*7359*/ uint16(x86_xMatch), - /*7360*/ uint16(x86_xCondPrefix), 2, - 0x66, 7372, - 0x0, 7366, - /*7366*/ uint16(x86_xSetOp), uint16(x86_PMINUB), - /*7368*/ uint16(x86_xReadSlashR), - /*7369*/ uint16(x86_xArgMm1), - /*7370*/ uint16(x86_xArgMm2M64), - /*7371*/ uint16(x86_xMatch), - /*7372*/ uint16(x86_xSetOp), uint16(x86_PMINUB), - /*7374*/ uint16(x86_xReadSlashR), - /*7375*/ uint16(x86_xArgXmm1), - /*7376*/ uint16(x86_xArgXmm2M128), - /*7377*/ uint16(x86_xMatch), - /*7378*/ uint16(x86_xCondPrefix), 2, - 0x66, 7390, - 0x0, 7384, - /*7384*/ uint16(x86_xSetOp), uint16(x86_PAND), - /*7386*/ uint16(x86_xReadSlashR), - /*7387*/ uint16(x86_xArgMm), - /*7388*/ uint16(x86_xArgMmM64), - /*7389*/ uint16(x86_xMatch), - /*7390*/ uint16(x86_xSetOp), uint16(x86_PAND), - /*7392*/ uint16(x86_xReadSlashR), - /*7393*/ uint16(x86_xArgXmm1), - /*7394*/ uint16(x86_xArgXmm2M128), - /*7395*/ uint16(x86_xMatch), - /*7396*/ uint16(x86_xCondPrefix), 2, - 0x66, 7408, - 0x0, 7402, - /*7402*/ uint16(x86_xSetOp), uint16(x86_PADDUSB), - /*7404*/ uint16(x86_xReadSlashR), - /*7405*/ uint16(x86_xArgMm), - /*7406*/ uint16(x86_xArgMmM64), - /*7407*/ uint16(x86_xMatch), - /*7408*/ uint16(x86_xSetOp), uint16(x86_PADDUSB), - /*7410*/ uint16(x86_xReadSlashR), - /*7411*/ uint16(x86_xArgXmm1), - /*7412*/ uint16(x86_xArgXmm2M128), - /*7413*/ uint16(x86_xMatch), - /*7414*/ uint16(x86_xCondPrefix), 2, - 0x66, 7426, - 0x0, 7420, - /*7420*/ uint16(x86_xSetOp), uint16(x86_PADDUSW), - /*7422*/ uint16(x86_xReadSlashR), - /*7423*/ uint16(x86_xArgMm), - /*7424*/ uint16(x86_xArgMmM64), - /*7425*/ uint16(x86_xMatch), - /*7426*/ uint16(x86_xSetOp), uint16(x86_PADDUSW), - /*7428*/ uint16(x86_xReadSlashR), - /*7429*/ uint16(x86_xArgXmm1), - /*7430*/ uint16(x86_xArgXmm2M128), - /*7431*/ uint16(x86_xMatch), - /*7432*/ uint16(x86_xCondPrefix), 2, - 0x66, 7444, - 0x0, 7438, - /*7438*/ uint16(x86_xSetOp), uint16(x86_PMAXUB), - /*7440*/ uint16(x86_xReadSlashR), - /*7441*/ uint16(x86_xArgMm1), - /*7442*/ uint16(x86_xArgMm2M64), - /*7443*/ uint16(x86_xMatch), - /*7444*/ uint16(x86_xSetOp), uint16(x86_PMAXUB), - /*7446*/ uint16(x86_xReadSlashR), - /*7447*/ uint16(x86_xArgXmm1), - /*7448*/ uint16(x86_xArgXmm2M128), - /*7449*/ uint16(x86_xMatch), - /*7450*/ uint16(x86_xCondPrefix), 2, - 0x66, 7462, - 0x0, 7456, - /*7456*/ uint16(x86_xSetOp), uint16(x86_PANDN), - /*7458*/ uint16(x86_xReadSlashR), - /*7459*/ uint16(x86_xArgMm), - /*7460*/ uint16(x86_xArgMmM64), - /*7461*/ uint16(x86_xMatch), - /*7462*/ uint16(x86_xSetOp), uint16(x86_PANDN), - /*7464*/ uint16(x86_xReadSlashR), - /*7465*/ uint16(x86_xArgXmm1), - /*7466*/ uint16(x86_xArgXmm2M128), - /*7467*/ uint16(x86_xMatch), - /*7468*/ uint16(x86_xCondPrefix), 2, - 0x66, 7480, - 0x0, 7474, - /*7474*/ uint16(x86_xSetOp), uint16(x86_PAVGB), - /*7476*/ uint16(x86_xReadSlashR), - /*7477*/ uint16(x86_xArgMm1), - /*7478*/ uint16(x86_xArgMm2M64), - /*7479*/ uint16(x86_xMatch), - /*7480*/ uint16(x86_xSetOp), uint16(x86_PAVGB), - /*7482*/ uint16(x86_xReadSlashR), - /*7483*/ uint16(x86_xArgXmm1), - /*7484*/ uint16(x86_xArgXmm2M128), - /*7485*/ uint16(x86_xMatch), - /*7486*/ uint16(x86_xCondPrefix), 2, - 0x66, 7498, - 0x0, 7492, - /*7492*/ uint16(x86_xSetOp), uint16(x86_PSRAW), - /*7494*/ uint16(x86_xReadSlashR), - /*7495*/ uint16(x86_xArgMm), - /*7496*/ uint16(x86_xArgMmM64), - /*7497*/ uint16(x86_xMatch), - /*7498*/ uint16(x86_xSetOp), uint16(x86_PSRAW), - /*7500*/ uint16(x86_xReadSlashR), - /*7501*/ uint16(x86_xArgXmm1), - /*7502*/ uint16(x86_xArgXmm2M128), - /*7503*/ uint16(x86_xMatch), - /*7504*/ uint16(x86_xCondPrefix), 2, - 0x66, 7516, - 0x0, 7510, - /*7510*/ uint16(x86_xSetOp), uint16(x86_PSRAD), - /*7512*/ uint16(x86_xReadSlashR), - /*7513*/ uint16(x86_xArgMm), - /*7514*/ uint16(x86_xArgMmM64), - /*7515*/ uint16(x86_xMatch), - /*7516*/ uint16(x86_xSetOp), uint16(x86_PSRAD), - /*7518*/ uint16(x86_xReadSlashR), - /*7519*/ uint16(x86_xArgXmm1), - /*7520*/ uint16(x86_xArgXmm2M128), - /*7521*/ uint16(x86_xMatch), - /*7522*/ uint16(x86_xCondPrefix), 2, - 0x66, 7534, - 0x0, 7528, - /*7528*/ uint16(x86_xSetOp), uint16(x86_PAVGW), - /*7530*/ uint16(x86_xReadSlashR), - /*7531*/ uint16(x86_xArgMm1), - /*7532*/ uint16(x86_xArgMm2M64), - /*7533*/ uint16(x86_xMatch), - /*7534*/ uint16(x86_xSetOp), uint16(x86_PAVGW), - /*7536*/ uint16(x86_xReadSlashR), - /*7537*/ uint16(x86_xArgXmm1), - /*7538*/ uint16(x86_xArgXmm2M128), - /*7539*/ uint16(x86_xMatch), - /*7540*/ uint16(x86_xCondPrefix), 2, - 0x66, 7552, - 0x0, 7546, - /*7546*/ uint16(x86_xSetOp), uint16(x86_PMULHUW), - /*7548*/ uint16(x86_xReadSlashR), - /*7549*/ uint16(x86_xArgMm1), - /*7550*/ uint16(x86_xArgMm2M64), - /*7551*/ uint16(x86_xMatch), - /*7552*/ uint16(x86_xSetOp), uint16(x86_PMULHUW), - /*7554*/ uint16(x86_xReadSlashR), - /*7555*/ uint16(x86_xArgXmm1), - /*7556*/ uint16(x86_xArgXmm2M128), - /*7557*/ uint16(x86_xMatch), - /*7558*/ uint16(x86_xCondPrefix), 2, - 0x66, 7570, - 0x0, 7564, - /*7564*/ uint16(x86_xSetOp), uint16(x86_PMULHW), - /*7566*/ uint16(x86_xReadSlashR), - /*7567*/ uint16(x86_xArgMm), - /*7568*/ uint16(x86_xArgMmM64), - /*7569*/ uint16(x86_xMatch), - /*7570*/ uint16(x86_xSetOp), uint16(x86_PMULHW), - /*7572*/ uint16(x86_xReadSlashR), - /*7573*/ uint16(x86_xArgXmm1), - /*7574*/ uint16(x86_xArgXmm2M128), - /*7575*/ uint16(x86_xMatch), - /*7576*/ uint16(x86_xCondPrefix), 3, - 0xF3, 7596, - 0xF2, 7590, - 0x66, 7584, - /*7584*/ uint16(x86_xSetOp), uint16(x86_CVTTPD2DQ), - /*7586*/ uint16(x86_xReadSlashR), - /*7587*/ uint16(x86_xArgXmm1), - /*7588*/ uint16(x86_xArgXmm2M128), - /*7589*/ uint16(x86_xMatch), - /*7590*/ uint16(x86_xSetOp), uint16(x86_CVTPD2DQ), - /*7592*/ uint16(x86_xReadSlashR), - /*7593*/ uint16(x86_xArgXmm1), - /*7594*/ uint16(x86_xArgXmm2M128), - /*7595*/ uint16(x86_xMatch), - /*7596*/ uint16(x86_xSetOp), uint16(x86_CVTDQ2PD), - /*7598*/ uint16(x86_xReadSlashR), - /*7599*/ uint16(x86_xArgXmm1), - /*7600*/ uint16(x86_xArgXmm2M64), - /*7601*/ uint16(x86_xMatch), - /*7602*/ uint16(x86_xCondPrefix), 2, - 0x66, 7614, - 0x0, 7608, - /*7608*/ uint16(x86_xSetOp), uint16(x86_MOVNTQ), - /*7610*/ uint16(x86_xReadSlashR), - /*7611*/ uint16(x86_xArgM64), - /*7612*/ uint16(x86_xArgMm), - /*7613*/ uint16(x86_xMatch), - /*7614*/ uint16(x86_xSetOp), uint16(x86_MOVNTDQ), - /*7616*/ uint16(x86_xReadSlashR), - /*7617*/ uint16(x86_xArgM128), - /*7618*/ uint16(x86_xArgXmm), - /*7619*/ uint16(x86_xMatch), - /*7620*/ uint16(x86_xCondPrefix), 2, - 0x66, 7632, - 0x0, 7626, - /*7626*/ uint16(x86_xSetOp), uint16(x86_PSUBSB), - /*7628*/ uint16(x86_xReadSlashR), - /*7629*/ uint16(x86_xArgMm), - /*7630*/ uint16(x86_xArgMmM64), - /*7631*/ uint16(x86_xMatch), - /*7632*/ uint16(x86_xSetOp), uint16(x86_PSUBSB), - /*7634*/ uint16(x86_xReadSlashR), - /*7635*/ uint16(x86_xArgXmm1), - /*7636*/ uint16(x86_xArgXmm2M128), - /*7637*/ uint16(x86_xMatch), - /*7638*/ uint16(x86_xCondPrefix), 2, - 0x66, 7650, - 0x0, 7644, - /*7644*/ uint16(x86_xSetOp), uint16(x86_PSUBSW), - /*7646*/ uint16(x86_xReadSlashR), - /*7647*/ uint16(x86_xArgMm), - /*7648*/ uint16(x86_xArgMmM64), - /*7649*/ uint16(x86_xMatch), - /*7650*/ uint16(x86_xSetOp), uint16(x86_PSUBSW), - /*7652*/ uint16(x86_xReadSlashR), - /*7653*/ uint16(x86_xArgXmm1), - /*7654*/ uint16(x86_xArgXmm2M128), - /*7655*/ uint16(x86_xMatch), - /*7656*/ uint16(x86_xCondPrefix), 2, - 0x66, 7668, - 0x0, 7662, - /*7662*/ uint16(x86_xSetOp), uint16(x86_PMINSW), - /*7664*/ uint16(x86_xReadSlashR), - /*7665*/ uint16(x86_xArgMm1), - /*7666*/ uint16(x86_xArgMm2M64), - /*7667*/ uint16(x86_xMatch), - /*7668*/ uint16(x86_xSetOp), uint16(x86_PMINSW), - /*7670*/ uint16(x86_xReadSlashR), - /*7671*/ uint16(x86_xArgXmm1), - /*7672*/ uint16(x86_xArgXmm2M128), - /*7673*/ uint16(x86_xMatch), - /*7674*/ uint16(x86_xCondPrefix), 2, - 0x66, 7686, - 0x0, 7680, - /*7680*/ uint16(x86_xSetOp), uint16(x86_POR), - /*7682*/ uint16(x86_xReadSlashR), - /*7683*/ uint16(x86_xArgMm), - /*7684*/ uint16(x86_xArgMmM64), - /*7685*/ uint16(x86_xMatch), - /*7686*/ uint16(x86_xSetOp), uint16(x86_POR), - /*7688*/ uint16(x86_xReadSlashR), - /*7689*/ uint16(x86_xArgXmm1), - /*7690*/ uint16(x86_xArgXmm2M128), - /*7691*/ uint16(x86_xMatch), - /*7692*/ uint16(x86_xCondPrefix), 2, - 0x66, 7704, - 0x0, 7698, - /*7698*/ uint16(x86_xSetOp), uint16(x86_PADDSB), - /*7700*/ uint16(x86_xReadSlashR), - /*7701*/ uint16(x86_xArgMm), - /*7702*/ uint16(x86_xArgMmM64), - /*7703*/ uint16(x86_xMatch), - /*7704*/ uint16(x86_xSetOp), uint16(x86_PADDSB), - /*7706*/ uint16(x86_xReadSlashR), - /*7707*/ uint16(x86_xArgXmm1), - /*7708*/ uint16(x86_xArgXmm2M128), - /*7709*/ uint16(x86_xMatch), - /*7710*/ uint16(x86_xCondPrefix), 2, - 0x66, 7722, - 0x0, 7716, - /*7716*/ uint16(x86_xSetOp), uint16(x86_PADDSW), - /*7718*/ uint16(x86_xReadSlashR), - /*7719*/ uint16(x86_xArgMm), - /*7720*/ uint16(x86_xArgMmM64), - /*7721*/ uint16(x86_xMatch), - /*7722*/ uint16(x86_xSetOp), uint16(x86_PADDSW), - /*7724*/ uint16(x86_xReadSlashR), - /*7725*/ uint16(x86_xArgXmm1), - /*7726*/ uint16(x86_xArgXmm2M128), - /*7727*/ uint16(x86_xMatch), - /*7728*/ uint16(x86_xCondPrefix), 2, - 0x66, 7740, - 0x0, 7734, - /*7734*/ uint16(x86_xSetOp), uint16(x86_PMAXSW), - /*7736*/ uint16(x86_xReadSlashR), - /*7737*/ uint16(x86_xArgMm1), - /*7738*/ uint16(x86_xArgMm2M64), - /*7739*/ uint16(x86_xMatch), - /*7740*/ uint16(x86_xSetOp), uint16(x86_PMAXSW), - /*7742*/ uint16(x86_xReadSlashR), - /*7743*/ uint16(x86_xArgXmm1), - /*7744*/ uint16(x86_xArgXmm2M128), - /*7745*/ uint16(x86_xMatch), - /*7746*/ uint16(x86_xCondPrefix), 2, - 0x66, 7758, - 0x0, 7752, - /*7752*/ uint16(x86_xSetOp), uint16(x86_PXOR), - /*7754*/ uint16(x86_xReadSlashR), - /*7755*/ uint16(x86_xArgMm), - /*7756*/ uint16(x86_xArgMmM64), - /*7757*/ uint16(x86_xMatch), - /*7758*/ uint16(x86_xSetOp), uint16(x86_PXOR), - /*7760*/ uint16(x86_xReadSlashR), - /*7761*/ uint16(x86_xArgXmm1), - /*7762*/ uint16(x86_xArgXmm2M128), - /*7763*/ uint16(x86_xMatch), - /*7764*/ uint16(x86_xCondPrefix), 1, - 0xF2, 7768, - /*7768*/ uint16(x86_xSetOp), uint16(x86_LDDQU), - /*7770*/ uint16(x86_xReadSlashR), - /*7771*/ uint16(x86_xArgXmm1), - /*7772*/ uint16(x86_xArgM128), - /*7773*/ uint16(x86_xMatch), - /*7774*/ uint16(x86_xCondPrefix), 2, - 0x66, 7786, - 0x0, 7780, - /*7780*/ uint16(x86_xSetOp), uint16(x86_PSLLW), - /*7782*/ uint16(x86_xReadSlashR), - /*7783*/ uint16(x86_xArgMm), - /*7784*/ uint16(x86_xArgMmM64), - /*7785*/ uint16(x86_xMatch), - /*7786*/ uint16(x86_xSetOp), uint16(x86_PSLLW), - /*7788*/ uint16(x86_xReadSlashR), - /*7789*/ uint16(x86_xArgXmm1), - /*7790*/ uint16(x86_xArgXmm2M128), - /*7791*/ uint16(x86_xMatch), - /*7792*/ uint16(x86_xCondPrefix), 2, - 0x66, 7804, - 0x0, 7798, - /*7798*/ uint16(x86_xSetOp), uint16(x86_PSLLD), - /*7800*/ uint16(x86_xReadSlashR), - /*7801*/ uint16(x86_xArgMm), - /*7802*/ uint16(x86_xArgMmM64), - /*7803*/ uint16(x86_xMatch), - /*7804*/ uint16(x86_xSetOp), uint16(x86_PSLLD), - /*7806*/ uint16(x86_xReadSlashR), - /*7807*/ uint16(x86_xArgXmm1), - /*7808*/ uint16(x86_xArgXmm2M128), - /*7809*/ uint16(x86_xMatch), - /*7810*/ uint16(x86_xCondPrefix), 2, - 0x66, 7822, - 0x0, 7816, - /*7816*/ uint16(x86_xSetOp), uint16(x86_PSLLQ), - /*7818*/ uint16(x86_xReadSlashR), - /*7819*/ uint16(x86_xArgMm), - /*7820*/ uint16(x86_xArgMmM64), - /*7821*/ uint16(x86_xMatch), - /*7822*/ uint16(x86_xSetOp), uint16(x86_PSLLQ), - /*7824*/ uint16(x86_xReadSlashR), - /*7825*/ uint16(x86_xArgXmm1), - /*7826*/ uint16(x86_xArgXmm2M128), - /*7827*/ uint16(x86_xMatch), - /*7828*/ uint16(x86_xCondPrefix), 2, - 0x66, 7840, - 0x0, 7834, - /*7834*/ uint16(x86_xSetOp), uint16(x86_PMULUDQ), - /*7836*/ uint16(x86_xReadSlashR), - /*7837*/ uint16(x86_xArgMm1), - /*7838*/ uint16(x86_xArgMm2M64), - /*7839*/ uint16(x86_xMatch), - /*7840*/ uint16(x86_xSetOp), uint16(x86_PMULUDQ), - /*7842*/ uint16(x86_xReadSlashR), - /*7843*/ uint16(x86_xArgXmm1), - /*7844*/ uint16(x86_xArgXmm2M128), - /*7845*/ uint16(x86_xMatch), - /*7846*/ uint16(x86_xCondPrefix), 2, - 0x66, 7858, - 0x0, 7852, - /*7852*/ uint16(x86_xSetOp), uint16(x86_PMADDWD), - /*7854*/ uint16(x86_xReadSlashR), - /*7855*/ uint16(x86_xArgMm), - /*7856*/ uint16(x86_xArgMmM64), - /*7857*/ uint16(x86_xMatch), - /*7858*/ uint16(x86_xSetOp), uint16(x86_PMADDWD), - /*7860*/ uint16(x86_xReadSlashR), - /*7861*/ uint16(x86_xArgXmm1), - /*7862*/ uint16(x86_xArgXmm2M128), - /*7863*/ uint16(x86_xMatch), - /*7864*/ uint16(x86_xCondPrefix), 2, - 0x66, 7876, - 0x0, 7870, - /*7870*/ uint16(x86_xSetOp), uint16(x86_PSADBW), - /*7872*/ uint16(x86_xReadSlashR), - /*7873*/ uint16(x86_xArgMm1), - /*7874*/ uint16(x86_xArgMm2M64), - /*7875*/ uint16(x86_xMatch), - /*7876*/ uint16(x86_xSetOp), uint16(x86_PSADBW), - /*7878*/ uint16(x86_xReadSlashR), - /*7879*/ uint16(x86_xArgXmm1), - /*7880*/ uint16(x86_xArgXmm2M128), - /*7881*/ uint16(x86_xMatch), - /*7882*/ uint16(x86_xCondPrefix), 2, - 0x66, 7894, - 0x0, 7888, - /*7888*/ uint16(x86_xSetOp), uint16(x86_MASKMOVQ), - /*7890*/ uint16(x86_xReadSlashR), - /*7891*/ uint16(x86_xArgMm1), - /*7892*/ uint16(x86_xArgMm2), - /*7893*/ uint16(x86_xMatch), - /*7894*/ uint16(x86_xSetOp), uint16(x86_MASKMOVDQU), - /*7896*/ uint16(x86_xReadSlashR), - /*7897*/ uint16(x86_xArgXmm1), - /*7898*/ uint16(x86_xArgXmm2), - /*7899*/ uint16(x86_xMatch), - /*7900*/ uint16(x86_xCondPrefix), 2, - 0x66, 7912, - 0x0, 7906, - /*7906*/ uint16(x86_xSetOp), uint16(x86_PSUBB), - /*7908*/ uint16(x86_xReadSlashR), - /*7909*/ uint16(x86_xArgMm), - /*7910*/ uint16(x86_xArgMmM64), - /*7911*/ uint16(x86_xMatch), - /*7912*/ uint16(x86_xSetOp), uint16(x86_PSUBB), - /*7914*/ uint16(x86_xReadSlashR), - /*7915*/ uint16(x86_xArgXmm1), - /*7916*/ uint16(x86_xArgXmm2M128), - /*7917*/ uint16(x86_xMatch), - /*7918*/ uint16(x86_xCondPrefix), 2, - 0x66, 7930, - 0x0, 7924, - /*7924*/ uint16(x86_xSetOp), uint16(x86_PSUBW), - /*7926*/ uint16(x86_xReadSlashR), - /*7927*/ uint16(x86_xArgMm), - /*7928*/ uint16(x86_xArgMmM64), - /*7929*/ uint16(x86_xMatch), - /*7930*/ uint16(x86_xSetOp), uint16(x86_PSUBW), - /*7932*/ uint16(x86_xReadSlashR), - /*7933*/ uint16(x86_xArgXmm1), - /*7934*/ uint16(x86_xArgXmm2M128), - /*7935*/ uint16(x86_xMatch), - /*7936*/ uint16(x86_xCondPrefix), 2, - 0x66, 7948, - 0x0, 7942, - /*7942*/ uint16(x86_xSetOp), uint16(x86_PSUBD), - /*7944*/ uint16(x86_xReadSlashR), - /*7945*/ uint16(x86_xArgMm), - /*7946*/ uint16(x86_xArgMmM64), - /*7947*/ uint16(x86_xMatch), - /*7948*/ uint16(x86_xSetOp), uint16(x86_PSUBD), - /*7950*/ uint16(x86_xReadSlashR), - /*7951*/ uint16(x86_xArgXmm1), - /*7952*/ uint16(x86_xArgXmm2M128), - /*7953*/ uint16(x86_xMatch), - /*7954*/ uint16(x86_xCondPrefix), 2, - 0x66, 7966, - 0x0, 7960, - /*7960*/ uint16(x86_xSetOp), uint16(x86_PSUBQ), - /*7962*/ uint16(x86_xReadSlashR), - /*7963*/ uint16(x86_xArgMm1), - /*7964*/ uint16(x86_xArgMm2M64), - /*7965*/ uint16(x86_xMatch), - /*7966*/ uint16(x86_xSetOp), uint16(x86_PSUBQ), - /*7968*/ uint16(x86_xReadSlashR), - /*7969*/ uint16(x86_xArgXmm1), - /*7970*/ uint16(x86_xArgXmm2M128), - /*7971*/ uint16(x86_xMatch), - /*7972*/ uint16(x86_xCondPrefix), 2, - 0x66, 7984, - 0x0, 7978, - /*7978*/ uint16(x86_xSetOp), uint16(x86_PADDB), - /*7980*/ uint16(x86_xReadSlashR), - /*7981*/ uint16(x86_xArgMm), - /*7982*/ uint16(x86_xArgMmM64), - /*7983*/ uint16(x86_xMatch), - /*7984*/ uint16(x86_xSetOp), uint16(x86_PADDB), - /*7986*/ uint16(x86_xReadSlashR), - /*7987*/ uint16(x86_xArgXmm1), - /*7988*/ uint16(x86_xArgXmm2M128), - /*7989*/ uint16(x86_xMatch), - /*7990*/ uint16(x86_xCondPrefix), 2, - 0x66, 8002, - 0x0, 7996, - /*7996*/ uint16(x86_xSetOp), uint16(x86_PADDW), - /*7998*/ uint16(x86_xReadSlashR), - /*7999*/ uint16(x86_xArgMm), - /*8000*/ uint16(x86_xArgMmM64), - /*8001*/ uint16(x86_xMatch), - /*8002*/ uint16(x86_xSetOp), uint16(x86_PADDW), - /*8004*/ uint16(x86_xReadSlashR), - /*8005*/ uint16(x86_xArgXmm1), - /*8006*/ uint16(x86_xArgXmm2M128), - /*8007*/ uint16(x86_xMatch), - /*8008*/ uint16(x86_xCondPrefix), 2, - 0x66, 8020, - 0x0, 8014, - /*8014*/ uint16(x86_xSetOp), uint16(x86_PADDD), - /*8016*/ uint16(x86_xReadSlashR), - /*8017*/ uint16(x86_xArgMm), - /*8018*/ uint16(x86_xArgMmM64), - /*8019*/ uint16(x86_xMatch), - /*8020*/ uint16(x86_xSetOp), uint16(x86_PADDD), - /*8022*/ uint16(x86_xReadSlashR), - /*8023*/ uint16(x86_xArgXmm1), - /*8024*/ uint16(x86_xArgXmm2M128), - /*8025*/ uint16(x86_xMatch), - /*8026*/ uint16(x86_xSetOp), uint16(x86_ADC), - /*8028*/ uint16(x86_xReadSlashR), - /*8029*/ uint16(x86_xArgRM8), - /*8030*/ uint16(x86_xArgR8), - /*8031*/ uint16(x86_xMatch), - /*8032*/ uint16(x86_xCondIs64), 8035, 8051, - /*8035*/ uint16(x86_xCondDataSize), 8039, 8045, 0, - /*8039*/ uint16(x86_xSetOp), uint16(x86_ADC), - /*8041*/ uint16(x86_xReadSlashR), - /*8042*/ uint16(x86_xArgRM16), - /*8043*/ uint16(x86_xArgR16), - /*8044*/ uint16(x86_xMatch), - /*8045*/ uint16(x86_xSetOp), uint16(x86_ADC), - /*8047*/ uint16(x86_xReadSlashR), - /*8048*/ uint16(x86_xArgRM32), - /*8049*/ uint16(x86_xArgR32), - /*8050*/ uint16(x86_xMatch), - /*8051*/ uint16(x86_xCondDataSize), 8039, 8045, 8055, - /*8055*/ uint16(x86_xSetOp), uint16(x86_ADC), - /*8057*/ uint16(x86_xReadSlashR), - /*8058*/ uint16(x86_xArgRM64), - /*8059*/ uint16(x86_xArgR64), - /*8060*/ uint16(x86_xMatch), - /*8061*/ uint16(x86_xSetOp), uint16(x86_ADC), - /*8063*/ uint16(x86_xReadSlashR), - /*8064*/ uint16(x86_xArgR8), - /*8065*/ uint16(x86_xArgRM8), - /*8066*/ uint16(x86_xMatch), - /*8067*/ uint16(x86_xCondIs64), 8070, 8086, - /*8070*/ uint16(x86_xCondDataSize), 8074, 8080, 0, - /*8074*/ uint16(x86_xSetOp), uint16(x86_ADC), - /*8076*/ uint16(x86_xReadSlashR), - /*8077*/ uint16(x86_xArgR16), - /*8078*/ uint16(x86_xArgRM16), - /*8079*/ uint16(x86_xMatch), - /*8080*/ uint16(x86_xSetOp), uint16(x86_ADC), - /*8082*/ uint16(x86_xReadSlashR), - /*8083*/ uint16(x86_xArgR32), - /*8084*/ uint16(x86_xArgRM32), - /*8085*/ uint16(x86_xMatch), - /*8086*/ uint16(x86_xCondDataSize), 8074, 8080, 8090, - /*8090*/ uint16(x86_xSetOp), uint16(x86_ADC), - /*8092*/ uint16(x86_xReadSlashR), - /*8093*/ uint16(x86_xArgR64), - /*8094*/ uint16(x86_xArgRM64), - /*8095*/ uint16(x86_xMatch), - /*8096*/ uint16(x86_xSetOp), uint16(x86_ADC), - /*8098*/ uint16(x86_xReadIb), - /*8099*/ uint16(x86_xArgAL), - /*8100*/ uint16(x86_xArgImm8u), - /*8101*/ uint16(x86_xMatch), - /*8102*/ uint16(x86_xCondIs64), 8105, 8121, - /*8105*/ uint16(x86_xCondDataSize), 8109, 8115, 0, - /*8109*/ uint16(x86_xSetOp), uint16(x86_ADC), - /*8111*/ uint16(x86_xReadIw), - /*8112*/ uint16(x86_xArgAX), - /*8113*/ uint16(x86_xArgImm16), - /*8114*/ uint16(x86_xMatch), - /*8115*/ uint16(x86_xSetOp), uint16(x86_ADC), - /*8117*/ uint16(x86_xReadId), - /*8118*/ uint16(x86_xArgEAX), - /*8119*/ uint16(x86_xArgImm32), - /*8120*/ uint16(x86_xMatch), - /*8121*/ uint16(x86_xCondDataSize), 8109, 8115, 8125, - /*8125*/ uint16(x86_xSetOp), uint16(x86_ADC), - /*8127*/ uint16(x86_xReadId), - /*8128*/ uint16(x86_xArgRAX), - /*8129*/ uint16(x86_xArgImm32), - /*8130*/ uint16(x86_xMatch), - /*8131*/ uint16(x86_xCondIs64), 8134, 0, - /*8134*/ uint16(x86_xSetOp), uint16(x86_PUSH), - /*8136*/ uint16(x86_xArgSS), - /*8137*/ uint16(x86_xMatch), - /*8138*/ uint16(x86_xCondIs64), 8141, 0, - /*8141*/ uint16(x86_xSetOp), uint16(x86_POP), - /*8143*/ uint16(x86_xArgSS), - /*8144*/ uint16(x86_xMatch), - /*8145*/ uint16(x86_xSetOp), uint16(x86_SBB), - /*8147*/ uint16(x86_xReadSlashR), - /*8148*/ uint16(x86_xArgRM8), - /*8149*/ uint16(x86_xArgR8), - /*8150*/ uint16(x86_xMatch), - /*8151*/ uint16(x86_xCondIs64), 8154, 8170, - /*8154*/ uint16(x86_xCondDataSize), 8158, 8164, 0, - /*8158*/ uint16(x86_xSetOp), uint16(x86_SBB), - /*8160*/ uint16(x86_xReadSlashR), - /*8161*/ uint16(x86_xArgRM16), - /*8162*/ uint16(x86_xArgR16), - /*8163*/ uint16(x86_xMatch), - /*8164*/ uint16(x86_xSetOp), uint16(x86_SBB), - /*8166*/ uint16(x86_xReadSlashR), - /*8167*/ uint16(x86_xArgRM32), - /*8168*/ uint16(x86_xArgR32), - /*8169*/ uint16(x86_xMatch), - /*8170*/ uint16(x86_xCondDataSize), 8158, 8164, 8174, - /*8174*/ uint16(x86_xSetOp), uint16(x86_SBB), - /*8176*/ uint16(x86_xReadSlashR), - /*8177*/ uint16(x86_xArgRM64), - /*8178*/ uint16(x86_xArgR64), - /*8179*/ uint16(x86_xMatch), - /*8180*/ uint16(x86_xSetOp), uint16(x86_SBB), - /*8182*/ uint16(x86_xReadSlashR), - /*8183*/ uint16(x86_xArgR8), - /*8184*/ uint16(x86_xArgRM8), - /*8185*/ uint16(x86_xMatch), - /*8186*/ uint16(x86_xCondIs64), 8189, 8205, - /*8189*/ uint16(x86_xCondDataSize), 8193, 8199, 0, - /*8193*/ uint16(x86_xSetOp), uint16(x86_SBB), - /*8195*/ uint16(x86_xReadSlashR), - /*8196*/ uint16(x86_xArgR16), - /*8197*/ uint16(x86_xArgRM16), - /*8198*/ uint16(x86_xMatch), - /*8199*/ uint16(x86_xSetOp), uint16(x86_SBB), - /*8201*/ uint16(x86_xReadSlashR), - /*8202*/ uint16(x86_xArgR32), - /*8203*/ uint16(x86_xArgRM32), - /*8204*/ uint16(x86_xMatch), - /*8205*/ uint16(x86_xCondDataSize), 8193, 8199, 8209, - /*8209*/ uint16(x86_xSetOp), uint16(x86_SBB), - /*8211*/ uint16(x86_xReadSlashR), - /*8212*/ uint16(x86_xArgR64), - /*8213*/ uint16(x86_xArgRM64), - /*8214*/ uint16(x86_xMatch), - /*8215*/ uint16(x86_xSetOp), uint16(x86_SBB), - /*8217*/ uint16(x86_xReadIb), - /*8218*/ uint16(x86_xArgAL), - /*8219*/ uint16(x86_xArgImm8u), - /*8220*/ uint16(x86_xMatch), - /*8221*/ uint16(x86_xCondIs64), 8224, 8240, - /*8224*/ uint16(x86_xCondDataSize), 8228, 8234, 0, - /*8228*/ uint16(x86_xSetOp), uint16(x86_SBB), - /*8230*/ uint16(x86_xReadIw), - /*8231*/ uint16(x86_xArgAX), - /*8232*/ uint16(x86_xArgImm16), - /*8233*/ uint16(x86_xMatch), - /*8234*/ uint16(x86_xSetOp), uint16(x86_SBB), - /*8236*/ uint16(x86_xReadId), - /*8237*/ uint16(x86_xArgEAX), - /*8238*/ uint16(x86_xArgImm32), - /*8239*/ uint16(x86_xMatch), - /*8240*/ uint16(x86_xCondDataSize), 8228, 8234, 8244, - /*8244*/ uint16(x86_xSetOp), uint16(x86_SBB), - /*8246*/ uint16(x86_xReadId), - /*8247*/ uint16(x86_xArgRAX), - /*8248*/ uint16(x86_xArgImm32), - /*8249*/ uint16(x86_xMatch), - /*8250*/ uint16(x86_xCondIs64), 8253, 0, - /*8253*/ uint16(x86_xSetOp), uint16(x86_PUSH), - /*8255*/ uint16(x86_xArgDS), - /*8256*/ uint16(x86_xMatch), - /*8257*/ uint16(x86_xCondIs64), 8260, 0, - /*8260*/ uint16(x86_xSetOp), uint16(x86_POP), - /*8262*/ uint16(x86_xArgDS), - /*8263*/ uint16(x86_xMatch), - /*8264*/ uint16(x86_xSetOp), uint16(x86_AND), - /*8266*/ uint16(x86_xReadSlashR), - /*8267*/ uint16(x86_xArgRM8), - /*8268*/ uint16(x86_xArgR8), - /*8269*/ uint16(x86_xMatch), - /*8270*/ uint16(x86_xCondIs64), 8273, 8289, - /*8273*/ uint16(x86_xCondDataSize), 8277, 8283, 0, - /*8277*/ uint16(x86_xSetOp), uint16(x86_AND), - /*8279*/ uint16(x86_xReadSlashR), - /*8280*/ uint16(x86_xArgRM16), - /*8281*/ uint16(x86_xArgR16), - /*8282*/ uint16(x86_xMatch), - /*8283*/ uint16(x86_xSetOp), uint16(x86_AND), - /*8285*/ uint16(x86_xReadSlashR), - /*8286*/ uint16(x86_xArgRM32), - /*8287*/ uint16(x86_xArgR32), - /*8288*/ uint16(x86_xMatch), - /*8289*/ uint16(x86_xCondDataSize), 8277, 8283, 8293, - /*8293*/ uint16(x86_xSetOp), uint16(x86_AND), - /*8295*/ uint16(x86_xReadSlashR), - /*8296*/ uint16(x86_xArgRM64), - /*8297*/ uint16(x86_xArgR64), - /*8298*/ uint16(x86_xMatch), - /*8299*/ uint16(x86_xSetOp), uint16(x86_AND), - /*8301*/ uint16(x86_xReadSlashR), - /*8302*/ uint16(x86_xArgR8), - /*8303*/ uint16(x86_xArgRM8), - /*8304*/ uint16(x86_xMatch), - /*8305*/ uint16(x86_xCondIs64), 8308, 8324, - /*8308*/ uint16(x86_xCondDataSize), 8312, 8318, 0, - /*8312*/ uint16(x86_xSetOp), uint16(x86_AND), - /*8314*/ uint16(x86_xReadSlashR), - /*8315*/ uint16(x86_xArgR16), - /*8316*/ uint16(x86_xArgRM16), - /*8317*/ uint16(x86_xMatch), - /*8318*/ uint16(x86_xSetOp), uint16(x86_AND), - /*8320*/ uint16(x86_xReadSlashR), - /*8321*/ uint16(x86_xArgR32), - /*8322*/ uint16(x86_xArgRM32), - /*8323*/ uint16(x86_xMatch), - /*8324*/ uint16(x86_xCondDataSize), 8312, 8318, 8328, - /*8328*/ uint16(x86_xSetOp), uint16(x86_AND), - /*8330*/ uint16(x86_xReadSlashR), - /*8331*/ uint16(x86_xArgR64), - /*8332*/ uint16(x86_xArgRM64), - /*8333*/ uint16(x86_xMatch), - /*8334*/ uint16(x86_xSetOp), uint16(x86_AND), - /*8336*/ uint16(x86_xReadIb), - /*8337*/ uint16(x86_xArgAL), - /*8338*/ uint16(x86_xArgImm8u), - /*8339*/ uint16(x86_xMatch), - /*8340*/ uint16(x86_xCondIs64), 8343, 8359, - /*8343*/ uint16(x86_xCondDataSize), 8347, 8353, 0, - /*8347*/ uint16(x86_xSetOp), uint16(x86_AND), - /*8349*/ uint16(x86_xReadIw), - /*8350*/ uint16(x86_xArgAX), - /*8351*/ uint16(x86_xArgImm16), - /*8352*/ uint16(x86_xMatch), - /*8353*/ uint16(x86_xSetOp), uint16(x86_AND), - /*8355*/ uint16(x86_xReadId), - /*8356*/ uint16(x86_xArgEAX), - /*8357*/ uint16(x86_xArgImm32), - /*8358*/ uint16(x86_xMatch), - /*8359*/ uint16(x86_xCondDataSize), 8347, 8353, 8363, - /*8363*/ uint16(x86_xSetOp), uint16(x86_AND), - /*8365*/ uint16(x86_xReadId), - /*8366*/ uint16(x86_xArgRAX), - /*8367*/ uint16(x86_xArgImm32), - /*8368*/ uint16(x86_xMatch), - /*8369*/ uint16(x86_xCondIs64), 8372, 0, - /*8372*/ uint16(x86_xSetOp), uint16(x86_DAA), - /*8374*/ uint16(x86_xMatch), - /*8375*/ uint16(x86_xSetOp), uint16(x86_SUB), - /*8377*/ uint16(x86_xReadSlashR), - /*8378*/ uint16(x86_xArgRM8), - /*8379*/ uint16(x86_xArgR8), - /*8380*/ uint16(x86_xMatch), - /*8381*/ uint16(x86_xCondIs64), 8384, 8400, - /*8384*/ uint16(x86_xCondDataSize), 8388, 8394, 0, - /*8388*/ uint16(x86_xSetOp), uint16(x86_SUB), - /*8390*/ uint16(x86_xReadSlashR), - /*8391*/ uint16(x86_xArgRM16), - /*8392*/ uint16(x86_xArgR16), - /*8393*/ uint16(x86_xMatch), - /*8394*/ uint16(x86_xSetOp), uint16(x86_SUB), - /*8396*/ uint16(x86_xReadSlashR), - /*8397*/ uint16(x86_xArgRM32), - /*8398*/ uint16(x86_xArgR32), - /*8399*/ uint16(x86_xMatch), - /*8400*/ uint16(x86_xCondDataSize), 8388, 8394, 8404, - /*8404*/ uint16(x86_xSetOp), uint16(x86_SUB), - /*8406*/ uint16(x86_xReadSlashR), - /*8407*/ uint16(x86_xArgRM64), - /*8408*/ uint16(x86_xArgR64), - /*8409*/ uint16(x86_xMatch), - /*8410*/ uint16(x86_xSetOp), uint16(x86_SUB), - /*8412*/ uint16(x86_xReadSlashR), - /*8413*/ uint16(x86_xArgR8), - /*8414*/ uint16(x86_xArgRM8), - /*8415*/ uint16(x86_xMatch), - /*8416*/ uint16(x86_xCondIs64), 8419, 8435, - /*8419*/ uint16(x86_xCondDataSize), 8423, 8429, 0, - /*8423*/ uint16(x86_xSetOp), uint16(x86_SUB), - /*8425*/ uint16(x86_xReadSlashR), - /*8426*/ uint16(x86_xArgR16), - /*8427*/ uint16(x86_xArgRM16), - /*8428*/ uint16(x86_xMatch), - /*8429*/ uint16(x86_xSetOp), uint16(x86_SUB), - /*8431*/ uint16(x86_xReadSlashR), - /*8432*/ uint16(x86_xArgR32), - /*8433*/ uint16(x86_xArgRM32), - /*8434*/ uint16(x86_xMatch), - /*8435*/ uint16(x86_xCondDataSize), 8423, 8429, 8439, - /*8439*/ uint16(x86_xSetOp), uint16(x86_SUB), - /*8441*/ uint16(x86_xReadSlashR), - /*8442*/ uint16(x86_xArgR64), - /*8443*/ uint16(x86_xArgRM64), - /*8444*/ uint16(x86_xMatch), - /*8445*/ uint16(x86_xSetOp), uint16(x86_SUB), - /*8447*/ uint16(x86_xReadIb), - /*8448*/ uint16(x86_xArgAL), - /*8449*/ uint16(x86_xArgImm8u), - /*8450*/ uint16(x86_xMatch), - /*8451*/ uint16(x86_xCondIs64), 8454, 8470, - /*8454*/ uint16(x86_xCondDataSize), 8458, 8464, 0, - /*8458*/ uint16(x86_xSetOp), uint16(x86_SUB), - /*8460*/ uint16(x86_xReadIw), - /*8461*/ uint16(x86_xArgAX), - /*8462*/ uint16(x86_xArgImm16), - /*8463*/ uint16(x86_xMatch), - /*8464*/ uint16(x86_xSetOp), uint16(x86_SUB), - /*8466*/ uint16(x86_xReadId), - /*8467*/ uint16(x86_xArgEAX), - /*8468*/ uint16(x86_xArgImm32), - /*8469*/ uint16(x86_xMatch), - /*8470*/ uint16(x86_xCondDataSize), 8458, 8464, 8474, - /*8474*/ uint16(x86_xSetOp), uint16(x86_SUB), - /*8476*/ uint16(x86_xReadId), - /*8477*/ uint16(x86_xArgRAX), - /*8478*/ uint16(x86_xArgImm32), - /*8479*/ uint16(x86_xMatch), - /*8480*/ uint16(x86_xCondIs64), 8483, 0, - /*8483*/ uint16(x86_xSetOp), uint16(x86_DAS), - /*8485*/ uint16(x86_xMatch), - /*8486*/ uint16(x86_xSetOp), uint16(x86_XOR), - /*8488*/ uint16(x86_xReadSlashR), - /*8489*/ uint16(x86_xArgRM8), - /*8490*/ uint16(x86_xArgR8), - /*8491*/ uint16(x86_xMatch), - /*8492*/ uint16(x86_xCondIs64), 8495, 8511, - /*8495*/ uint16(x86_xCondDataSize), 8499, 8505, 0, - /*8499*/ uint16(x86_xSetOp), uint16(x86_XOR), - /*8501*/ uint16(x86_xReadSlashR), - /*8502*/ uint16(x86_xArgRM16), - /*8503*/ uint16(x86_xArgR16), - /*8504*/ uint16(x86_xMatch), - /*8505*/ uint16(x86_xSetOp), uint16(x86_XOR), - /*8507*/ uint16(x86_xReadSlashR), - /*8508*/ uint16(x86_xArgRM32), - /*8509*/ uint16(x86_xArgR32), - /*8510*/ uint16(x86_xMatch), - /*8511*/ uint16(x86_xCondDataSize), 8499, 8505, 8515, - /*8515*/ uint16(x86_xSetOp), uint16(x86_XOR), - /*8517*/ uint16(x86_xReadSlashR), - /*8518*/ uint16(x86_xArgRM64), - /*8519*/ uint16(x86_xArgR64), - /*8520*/ uint16(x86_xMatch), - /*8521*/ uint16(x86_xSetOp), uint16(x86_XOR), - /*8523*/ uint16(x86_xReadSlashR), - /*8524*/ uint16(x86_xArgR8), - /*8525*/ uint16(x86_xArgRM8), - /*8526*/ uint16(x86_xMatch), - /*8527*/ uint16(x86_xCondIs64), 8530, 8546, - /*8530*/ uint16(x86_xCondDataSize), 8534, 8540, 0, - /*8534*/ uint16(x86_xSetOp), uint16(x86_XOR), - /*8536*/ uint16(x86_xReadSlashR), - /*8537*/ uint16(x86_xArgR16), - /*8538*/ uint16(x86_xArgRM16), - /*8539*/ uint16(x86_xMatch), - /*8540*/ uint16(x86_xSetOp), uint16(x86_XOR), - /*8542*/ uint16(x86_xReadSlashR), - /*8543*/ uint16(x86_xArgR32), - /*8544*/ uint16(x86_xArgRM32), - /*8545*/ uint16(x86_xMatch), - /*8546*/ uint16(x86_xCondDataSize), 8534, 8540, 8550, - /*8550*/ uint16(x86_xSetOp), uint16(x86_XOR), - /*8552*/ uint16(x86_xReadSlashR), - /*8553*/ uint16(x86_xArgR64), - /*8554*/ uint16(x86_xArgRM64), - /*8555*/ uint16(x86_xMatch), - /*8556*/ uint16(x86_xSetOp), uint16(x86_XOR), - /*8558*/ uint16(x86_xReadIb), - /*8559*/ uint16(x86_xArgAL), - /*8560*/ uint16(x86_xArgImm8u), - /*8561*/ uint16(x86_xMatch), - /*8562*/ uint16(x86_xCondIs64), 8565, 8581, - /*8565*/ uint16(x86_xCondDataSize), 8569, 8575, 0, - /*8569*/ uint16(x86_xSetOp), uint16(x86_XOR), - /*8571*/ uint16(x86_xReadIw), - /*8572*/ uint16(x86_xArgAX), - /*8573*/ uint16(x86_xArgImm16), - /*8574*/ uint16(x86_xMatch), - /*8575*/ uint16(x86_xSetOp), uint16(x86_XOR), - /*8577*/ uint16(x86_xReadId), - /*8578*/ uint16(x86_xArgEAX), - /*8579*/ uint16(x86_xArgImm32), - /*8580*/ uint16(x86_xMatch), - /*8581*/ uint16(x86_xCondDataSize), 8569, 8575, 8585, - /*8585*/ uint16(x86_xSetOp), uint16(x86_XOR), - /*8587*/ uint16(x86_xReadId), - /*8588*/ uint16(x86_xArgRAX), - /*8589*/ uint16(x86_xArgImm32), - /*8590*/ uint16(x86_xMatch), - /*8591*/ uint16(x86_xCondIs64), 8594, 0, - /*8594*/ uint16(x86_xSetOp), uint16(x86_AAA), - /*8596*/ uint16(x86_xMatch), - /*8597*/ uint16(x86_xSetOp), uint16(x86_CMP), - /*8599*/ uint16(x86_xReadSlashR), - /*8600*/ uint16(x86_xArgRM8), - /*8601*/ uint16(x86_xArgR8), - /*8602*/ uint16(x86_xMatch), - /*8603*/ uint16(x86_xCondIs64), 8606, 8622, - /*8606*/ uint16(x86_xCondDataSize), 8610, 8616, 0, - /*8610*/ uint16(x86_xSetOp), uint16(x86_CMP), - /*8612*/ uint16(x86_xReadSlashR), - /*8613*/ uint16(x86_xArgRM16), - /*8614*/ uint16(x86_xArgR16), - /*8615*/ uint16(x86_xMatch), - /*8616*/ uint16(x86_xSetOp), uint16(x86_CMP), - /*8618*/ uint16(x86_xReadSlashR), - /*8619*/ uint16(x86_xArgRM32), - /*8620*/ uint16(x86_xArgR32), - /*8621*/ uint16(x86_xMatch), - /*8622*/ uint16(x86_xCondDataSize), 8610, 8616, 8626, - /*8626*/ uint16(x86_xSetOp), uint16(x86_CMP), - /*8628*/ uint16(x86_xReadSlashR), - /*8629*/ uint16(x86_xArgRM64), - /*8630*/ uint16(x86_xArgR64), - /*8631*/ uint16(x86_xMatch), - /*8632*/ uint16(x86_xSetOp), uint16(x86_CMP), - /*8634*/ uint16(x86_xReadSlashR), - /*8635*/ uint16(x86_xArgR8), - /*8636*/ uint16(x86_xArgRM8), - /*8637*/ uint16(x86_xMatch), - /*8638*/ uint16(x86_xCondIs64), 8641, 8657, - /*8641*/ uint16(x86_xCondDataSize), 8645, 8651, 0, - /*8645*/ uint16(x86_xSetOp), uint16(x86_CMP), - /*8647*/ uint16(x86_xReadSlashR), - /*8648*/ uint16(x86_xArgR16), - /*8649*/ uint16(x86_xArgRM16), - /*8650*/ uint16(x86_xMatch), - /*8651*/ uint16(x86_xSetOp), uint16(x86_CMP), - /*8653*/ uint16(x86_xReadSlashR), - /*8654*/ uint16(x86_xArgR32), - /*8655*/ uint16(x86_xArgRM32), - /*8656*/ uint16(x86_xMatch), - /*8657*/ uint16(x86_xCondDataSize), 8645, 8651, 8661, - /*8661*/ uint16(x86_xSetOp), uint16(x86_CMP), - /*8663*/ uint16(x86_xReadSlashR), - /*8664*/ uint16(x86_xArgR64), - /*8665*/ uint16(x86_xArgRM64), - /*8666*/ uint16(x86_xMatch), - /*8667*/ uint16(x86_xSetOp), uint16(x86_CMP), - /*8669*/ uint16(x86_xReadIb), - /*8670*/ uint16(x86_xArgAL), - /*8671*/ uint16(x86_xArgImm8u), - /*8672*/ uint16(x86_xMatch), - /*8673*/ uint16(x86_xCondIs64), 8676, 8692, - /*8676*/ uint16(x86_xCondDataSize), 8680, 8686, 0, - /*8680*/ uint16(x86_xSetOp), uint16(x86_CMP), - /*8682*/ uint16(x86_xReadIw), - /*8683*/ uint16(x86_xArgAX), - /*8684*/ uint16(x86_xArgImm16), - /*8685*/ uint16(x86_xMatch), - /*8686*/ uint16(x86_xSetOp), uint16(x86_CMP), - /*8688*/ uint16(x86_xReadId), - /*8689*/ uint16(x86_xArgEAX), - /*8690*/ uint16(x86_xArgImm32), - /*8691*/ uint16(x86_xMatch), - /*8692*/ uint16(x86_xCondDataSize), 8680, 8686, 8696, - /*8696*/ uint16(x86_xSetOp), uint16(x86_CMP), - /*8698*/ uint16(x86_xReadId), - /*8699*/ uint16(x86_xArgRAX), - /*8700*/ uint16(x86_xArgImm32), - /*8701*/ uint16(x86_xMatch), - /*8702*/ uint16(x86_xCondIs64), 8705, 0, - /*8705*/ uint16(x86_xSetOp), uint16(x86_AAS), - /*8707*/ uint16(x86_xMatch), - /*8708*/ uint16(x86_xCondIs64), 8711, 0, - /*8711*/ uint16(x86_xCondDataSize), 8715, 8719, 0, - /*8715*/ uint16(x86_xSetOp), uint16(x86_INC), - /*8717*/ uint16(x86_xArgR16op), - /*8718*/ uint16(x86_xMatch), - /*8719*/ uint16(x86_xSetOp), uint16(x86_INC), - /*8721*/ uint16(x86_xArgR32op), - /*8722*/ uint16(x86_xMatch), - /*8723*/ uint16(x86_xCondIs64), 8726, 0, - /*8726*/ uint16(x86_xCondDataSize), 8730, 8734, 0, - /*8730*/ uint16(x86_xSetOp), uint16(x86_DEC), - /*8732*/ uint16(x86_xArgR16op), - /*8733*/ uint16(x86_xMatch), - /*8734*/ uint16(x86_xSetOp), uint16(x86_DEC), - /*8736*/ uint16(x86_xArgR32op), - /*8737*/ uint16(x86_xMatch), - /*8738*/ uint16(x86_xCondIs64), 8741, 8753, - /*8741*/ uint16(x86_xCondDataSize), 8745, 8749, 0, - /*8745*/ uint16(x86_xSetOp), uint16(x86_PUSH), - /*8747*/ uint16(x86_xArgR16op), - /*8748*/ uint16(x86_xMatch), - /*8749*/ uint16(x86_xSetOp), uint16(x86_PUSH), - /*8751*/ uint16(x86_xArgR32op), - /*8752*/ uint16(x86_xMatch), - /*8753*/ uint16(x86_xCondDataSize), 8745, 8757, 8761, - /*8757*/ uint16(x86_xSetOp), uint16(x86_PUSH), - /*8759*/ uint16(x86_xArgR64op), - /*8760*/ uint16(x86_xMatch), - /*8761*/ uint16(x86_xSetOp), uint16(x86_PUSH), - /*8763*/ uint16(x86_xArgR64op), - /*8764*/ uint16(x86_xMatch), - /*8765*/ uint16(x86_xCondIs64), 8768, 8780, - /*8768*/ uint16(x86_xCondDataSize), 8772, 8776, 0, - /*8772*/ uint16(x86_xSetOp), uint16(x86_POP), - /*8774*/ uint16(x86_xArgR16op), - /*8775*/ uint16(x86_xMatch), - /*8776*/ uint16(x86_xSetOp), uint16(x86_POP), - /*8778*/ uint16(x86_xArgR32op), - /*8779*/ uint16(x86_xMatch), - /*8780*/ uint16(x86_xCondDataSize), 8772, 8784, 8788, - /*8784*/ uint16(x86_xSetOp), uint16(x86_POP), - /*8786*/ uint16(x86_xArgR64op), - /*8787*/ uint16(x86_xMatch), - /*8788*/ uint16(x86_xSetOp), uint16(x86_POP), - /*8790*/ uint16(x86_xArgR64op), - /*8791*/ uint16(x86_xMatch), - /*8792*/ uint16(x86_xCondIs64), 8795, 0, - /*8795*/ uint16(x86_xCondDataSize), 8799, 8802, 0, - /*8799*/ uint16(x86_xSetOp), uint16(x86_PUSHA), - /*8801*/ uint16(x86_xMatch), - /*8802*/ uint16(x86_xSetOp), uint16(x86_PUSHAD), - /*8804*/ uint16(x86_xMatch), - /*8805*/ uint16(x86_xCondIs64), 8808, 0, - /*8808*/ uint16(x86_xCondDataSize), 8812, 8815, 0, - /*8812*/ uint16(x86_xSetOp), uint16(x86_POPA), - /*8814*/ uint16(x86_xMatch), - /*8815*/ uint16(x86_xSetOp), uint16(x86_POPAD), - /*8817*/ uint16(x86_xMatch), - /*8818*/ uint16(x86_xCondIs64), 8821, 0, - /*8821*/ uint16(x86_xCondDataSize), 8825, 8831, 0, - /*8825*/ uint16(x86_xSetOp), uint16(x86_BOUND), - /*8827*/ uint16(x86_xReadSlashR), - /*8828*/ uint16(x86_xArgR16), - /*8829*/ uint16(x86_xArgM16and16), - /*8830*/ uint16(x86_xMatch), - /*8831*/ uint16(x86_xSetOp), uint16(x86_BOUND), - /*8833*/ uint16(x86_xReadSlashR), - /*8834*/ uint16(x86_xArgR32), - /*8835*/ uint16(x86_xArgM32and32), - /*8836*/ uint16(x86_xMatch), - /*8837*/ uint16(x86_xCondIs64), 8840, 8846, - /*8840*/ uint16(x86_xSetOp), uint16(x86_ARPL), - /*8842*/ uint16(x86_xReadSlashR), - /*8843*/ uint16(x86_xArgRM16), - /*8844*/ uint16(x86_xArgR16), - /*8845*/ uint16(x86_xMatch), - /*8846*/ uint16(x86_xCondDataSize), 8850, 8856, 8862, - /*8850*/ uint16(x86_xSetOp), uint16(x86_MOVSXD), - /*8852*/ uint16(x86_xReadSlashR), - /*8853*/ uint16(x86_xArgR16), - /*8854*/ uint16(x86_xArgRM32), - /*8855*/ uint16(x86_xMatch), - /*8856*/ uint16(x86_xSetOp), uint16(x86_MOVSXD), - /*8858*/ uint16(x86_xReadSlashR), - /*8859*/ uint16(x86_xArgR32), - /*8860*/ uint16(x86_xArgRM32), - /*8861*/ uint16(x86_xMatch), - /*8862*/ uint16(x86_xSetOp), uint16(x86_MOVSXD), - /*8864*/ uint16(x86_xReadSlashR), - /*8865*/ uint16(x86_xArgR64), - /*8866*/ uint16(x86_xArgRM32), - /*8867*/ uint16(x86_xMatch), - /*8868*/ uint16(x86_xCondDataSize), 8872, 8877, 8882, - /*8872*/ uint16(x86_xSetOp), uint16(x86_PUSH), - /*8874*/ uint16(x86_xReadIw), - /*8875*/ uint16(x86_xArgImm16), - /*8876*/ uint16(x86_xMatch), - /*8877*/ uint16(x86_xSetOp), uint16(x86_PUSH), - /*8879*/ uint16(x86_xReadId), - /*8880*/ uint16(x86_xArgImm32), - /*8881*/ uint16(x86_xMatch), - /*8882*/ uint16(x86_xSetOp), uint16(x86_PUSH), - /*8884*/ uint16(x86_xReadId), - /*8885*/ uint16(x86_xArgImm32), - /*8886*/ uint16(x86_xMatch), - /*8887*/ uint16(x86_xCondIs64), 8890, 8910, - /*8890*/ uint16(x86_xCondDataSize), 8894, 8902, 0, - /*8894*/ uint16(x86_xSetOp), uint16(x86_IMUL), - /*8896*/ uint16(x86_xReadSlashR), - /*8897*/ uint16(x86_xReadIw), - /*8898*/ uint16(x86_xArgR16), - /*8899*/ uint16(x86_xArgRM16), - /*8900*/ uint16(x86_xArgImm16), - /*8901*/ uint16(x86_xMatch), - /*8902*/ uint16(x86_xSetOp), uint16(x86_IMUL), - /*8904*/ uint16(x86_xReadSlashR), - /*8905*/ uint16(x86_xReadId), - /*8906*/ uint16(x86_xArgR32), - /*8907*/ uint16(x86_xArgRM32), - /*8908*/ uint16(x86_xArgImm32), - /*8909*/ uint16(x86_xMatch), - /*8910*/ uint16(x86_xCondDataSize), 8894, 8902, 8914, - /*8914*/ uint16(x86_xSetOp), uint16(x86_IMUL), - /*8916*/ uint16(x86_xReadSlashR), - /*8917*/ uint16(x86_xReadId), - /*8918*/ uint16(x86_xArgR64), - /*8919*/ uint16(x86_xArgRM64), - /*8920*/ uint16(x86_xArgImm32), - /*8921*/ uint16(x86_xMatch), - /*8922*/ uint16(x86_xSetOp), uint16(x86_PUSH), - /*8924*/ uint16(x86_xReadIb), - /*8925*/ uint16(x86_xArgImm8), - /*8926*/ uint16(x86_xMatch), - /*8927*/ uint16(x86_xCondIs64), 8930, 8950, - /*8930*/ uint16(x86_xCondDataSize), 8934, 8942, 0, - /*8934*/ uint16(x86_xSetOp), uint16(x86_IMUL), - /*8936*/ uint16(x86_xReadSlashR), - /*8937*/ uint16(x86_xReadIb), - /*8938*/ uint16(x86_xArgR16), - /*8939*/ uint16(x86_xArgRM16), - /*8940*/ uint16(x86_xArgImm8), - /*8941*/ uint16(x86_xMatch), - /*8942*/ uint16(x86_xSetOp), uint16(x86_IMUL), - /*8944*/ uint16(x86_xReadSlashR), - /*8945*/ uint16(x86_xReadIb), - /*8946*/ uint16(x86_xArgR32), - /*8947*/ uint16(x86_xArgRM32), - /*8948*/ uint16(x86_xArgImm8), - /*8949*/ uint16(x86_xMatch), - /*8950*/ uint16(x86_xCondDataSize), 8934, 8942, 8954, - /*8954*/ uint16(x86_xSetOp), uint16(x86_IMUL), - /*8956*/ uint16(x86_xReadSlashR), - /*8957*/ uint16(x86_xReadIb), - /*8958*/ uint16(x86_xArgR64), - /*8959*/ uint16(x86_xArgRM64), - /*8960*/ uint16(x86_xArgImm8), - /*8961*/ uint16(x86_xMatch), - /*8962*/ uint16(x86_xSetOp), uint16(x86_INSB), - /*8964*/ uint16(x86_xMatch), - /*8965*/ uint16(x86_xCondDataSize), 8969, 8972, 8975, - /*8969*/ uint16(x86_xSetOp), uint16(x86_INSW), - /*8971*/ uint16(x86_xMatch), - /*8972*/ uint16(x86_xSetOp), uint16(x86_INSD), - /*8974*/ uint16(x86_xMatch), - /*8975*/ uint16(x86_xSetOp), uint16(x86_INSD), - /*8977*/ uint16(x86_xMatch), - /*8978*/ uint16(x86_xSetOp), uint16(x86_OUTSB), - /*8980*/ uint16(x86_xMatch), - /*8981*/ uint16(x86_xCondDataSize), 8985, 8988, 8991, - /*8985*/ uint16(x86_xSetOp), uint16(x86_OUTSW), - /*8987*/ uint16(x86_xMatch), - /*8988*/ uint16(x86_xSetOp), uint16(x86_OUTSD), - /*8990*/ uint16(x86_xMatch), - /*8991*/ uint16(x86_xSetOp), uint16(x86_OUTSD), - /*8993*/ uint16(x86_xMatch), - /*8994*/ uint16(x86_xSetOp), uint16(x86_JO), - /*8996*/ uint16(x86_xReadCb), - /*8997*/ uint16(x86_xArgRel8), - /*8998*/ uint16(x86_xMatch), - /*8999*/ uint16(x86_xSetOp), uint16(x86_JNO), - /*9001*/ uint16(x86_xReadCb), - /*9002*/ uint16(x86_xArgRel8), - /*9003*/ uint16(x86_xMatch), - /*9004*/ uint16(x86_xSetOp), uint16(x86_JB), - /*9006*/ uint16(x86_xReadCb), - /*9007*/ uint16(x86_xArgRel8), - /*9008*/ uint16(x86_xMatch), - /*9009*/ uint16(x86_xSetOp), uint16(x86_JAE), - /*9011*/ uint16(x86_xReadCb), - /*9012*/ uint16(x86_xArgRel8), - /*9013*/ uint16(x86_xMatch), - /*9014*/ uint16(x86_xSetOp), uint16(x86_JE), - /*9016*/ uint16(x86_xReadCb), - /*9017*/ uint16(x86_xArgRel8), - /*9018*/ uint16(x86_xMatch), - /*9019*/ uint16(x86_xSetOp), uint16(x86_JNE), - /*9021*/ uint16(x86_xReadCb), - /*9022*/ uint16(x86_xArgRel8), - /*9023*/ uint16(x86_xMatch), - /*9024*/ uint16(x86_xSetOp), uint16(x86_JBE), - /*9026*/ uint16(x86_xReadCb), - /*9027*/ uint16(x86_xArgRel8), - /*9028*/ uint16(x86_xMatch), - /*9029*/ uint16(x86_xSetOp), uint16(x86_JA), - /*9031*/ uint16(x86_xReadCb), - /*9032*/ uint16(x86_xArgRel8), - /*9033*/ uint16(x86_xMatch), - /*9034*/ uint16(x86_xSetOp), uint16(x86_JS), - /*9036*/ uint16(x86_xReadCb), - /*9037*/ uint16(x86_xArgRel8), - /*9038*/ uint16(x86_xMatch), - /*9039*/ uint16(x86_xSetOp), uint16(x86_JNS), - /*9041*/ uint16(x86_xReadCb), - /*9042*/ uint16(x86_xArgRel8), - /*9043*/ uint16(x86_xMatch), - /*9044*/ uint16(x86_xSetOp), uint16(x86_JP), - /*9046*/ uint16(x86_xReadCb), - /*9047*/ uint16(x86_xArgRel8), - /*9048*/ uint16(x86_xMatch), - /*9049*/ uint16(x86_xSetOp), uint16(x86_JNP), - /*9051*/ uint16(x86_xReadCb), - /*9052*/ uint16(x86_xArgRel8), - /*9053*/ uint16(x86_xMatch), - /*9054*/ uint16(x86_xSetOp), uint16(x86_JL), - /*9056*/ uint16(x86_xReadCb), - /*9057*/ uint16(x86_xArgRel8), - /*9058*/ uint16(x86_xMatch), - /*9059*/ uint16(x86_xSetOp), uint16(x86_JGE), - /*9061*/ uint16(x86_xReadCb), - /*9062*/ uint16(x86_xArgRel8), - /*9063*/ uint16(x86_xMatch), - /*9064*/ uint16(x86_xSetOp), uint16(x86_JLE), - /*9066*/ uint16(x86_xReadCb), - /*9067*/ uint16(x86_xArgRel8), - /*9068*/ uint16(x86_xMatch), - /*9069*/ uint16(x86_xSetOp), uint16(x86_JG), - /*9071*/ uint16(x86_xReadCb), - /*9072*/ uint16(x86_xArgRel8), - /*9073*/ uint16(x86_xMatch), - /*9074*/ uint16(x86_xCondSlashR), - 9083, // 0 - 9089, // 1 - 9095, // 2 - 9101, // 3 - 9107, // 4 - 9113, // 5 - 9119, // 6 - 9125, // 7 - /*9083*/ uint16(x86_xSetOp), uint16(x86_ADD), - /*9085*/ uint16(x86_xReadIb), - /*9086*/ uint16(x86_xArgRM8), - /*9087*/ uint16(x86_xArgImm8u), - /*9088*/ uint16(x86_xMatch), - /*9089*/ uint16(x86_xSetOp), uint16(x86_OR), - /*9091*/ uint16(x86_xReadIb), - /*9092*/ uint16(x86_xArgRM8), - /*9093*/ uint16(x86_xArgImm8u), - /*9094*/ uint16(x86_xMatch), - /*9095*/ uint16(x86_xSetOp), uint16(x86_ADC), - /*9097*/ uint16(x86_xReadIb), - /*9098*/ uint16(x86_xArgRM8), - /*9099*/ uint16(x86_xArgImm8u), - /*9100*/ uint16(x86_xMatch), - /*9101*/ uint16(x86_xSetOp), uint16(x86_SBB), - /*9103*/ uint16(x86_xReadIb), - /*9104*/ uint16(x86_xArgRM8), - /*9105*/ uint16(x86_xArgImm8u), - /*9106*/ uint16(x86_xMatch), - /*9107*/ uint16(x86_xSetOp), uint16(x86_AND), - /*9109*/ uint16(x86_xReadIb), - /*9110*/ uint16(x86_xArgRM8), - /*9111*/ uint16(x86_xArgImm8u), - /*9112*/ uint16(x86_xMatch), - /*9113*/ uint16(x86_xSetOp), uint16(x86_SUB), - /*9115*/ uint16(x86_xReadIb), - /*9116*/ uint16(x86_xArgRM8), - /*9117*/ uint16(x86_xArgImm8u), - /*9118*/ uint16(x86_xMatch), - /*9119*/ uint16(x86_xSetOp), uint16(x86_XOR), - /*9121*/ uint16(x86_xReadIb), - /*9122*/ uint16(x86_xArgRM8), - /*9123*/ uint16(x86_xArgImm8u), - /*9124*/ uint16(x86_xMatch), - /*9125*/ uint16(x86_xSetOp), uint16(x86_CMP), - /*9127*/ uint16(x86_xReadIb), - /*9128*/ uint16(x86_xArgRM8), - /*9129*/ uint16(x86_xArgImm8u), - /*9130*/ uint16(x86_xMatch), - /*9131*/ uint16(x86_xCondSlashR), - 9140, // 0 - 9169, // 1 - 9198, // 2 - 9227, // 3 - 9256, // 4 - 9285, // 5 - 9314, // 6 - 9343, // 7 - /*9140*/ uint16(x86_xCondIs64), 9143, 9159, - /*9143*/ uint16(x86_xCondDataSize), 9147, 9153, 0, - /*9147*/ uint16(x86_xSetOp), uint16(x86_ADD), - /*9149*/ uint16(x86_xReadIw), - /*9150*/ uint16(x86_xArgRM16), - /*9151*/ uint16(x86_xArgImm16), - /*9152*/ uint16(x86_xMatch), - /*9153*/ uint16(x86_xSetOp), uint16(x86_ADD), - /*9155*/ uint16(x86_xReadId), - /*9156*/ uint16(x86_xArgRM32), - /*9157*/ uint16(x86_xArgImm32), - /*9158*/ uint16(x86_xMatch), - /*9159*/ uint16(x86_xCondDataSize), 9147, 9153, 9163, - /*9163*/ uint16(x86_xSetOp), uint16(x86_ADD), - /*9165*/ uint16(x86_xReadId), - /*9166*/ uint16(x86_xArgRM64), - /*9167*/ uint16(x86_xArgImm32), - /*9168*/ uint16(x86_xMatch), - /*9169*/ uint16(x86_xCondIs64), 9172, 9188, - /*9172*/ uint16(x86_xCondDataSize), 9176, 9182, 0, - /*9176*/ uint16(x86_xSetOp), uint16(x86_OR), - /*9178*/ uint16(x86_xReadIw), - /*9179*/ uint16(x86_xArgRM16), - /*9180*/ uint16(x86_xArgImm16), - /*9181*/ uint16(x86_xMatch), - /*9182*/ uint16(x86_xSetOp), uint16(x86_OR), - /*9184*/ uint16(x86_xReadId), - /*9185*/ uint16(x86_xArgRM32), - /*9186*/ uint16(x86_xArgImm32), - /*9187*/ uint16(x86_xMatch), - /*9188*/ uint16(x86_xCondDataSize), 9176, 9182, 9192, - /*9192*/ uint16(x86_xSetOp), uint16(x86_OR), - /*9194*/ uint16(x86_xReadId), - /*9195*/ uint16(x86_xArgRM64), - /*9196*/ uint16(x86_xArgImm32), - /*9197*/ uint16(x86_xMatch), - /*9198*/ uint16(x86_xCondIs64), 9201, 9217, - /*9201*/ uint16(x86_xCondDataSize), 9205, 9211, 0, - /*9205*/ uint16(x86_xSetOp), uint16(x86_ADC), - /*9207*/ uint16(x86_xReadIw), - /*9208*/ uint16(x86_xArgRM16), - /*9209*/ uint16(x86_xArgImm16), - /*9210*/ uint16(x86_xMatch), - /*9211*/ uint16(x86_xSetOp), uint16(x86_ADC), - /*9213*/ uint16(x86_xReadId), - /*9214*/ uint16(x86_xArgRM32), - /*9215*/ uint16(x86_xArgImm32), - /*9216*/ uint16(x86_xMatch), - /*9217*/ uint16(x86_xCondDataSize), 9205, 9211, 9221, - /*9221*/ uint16(x86_xSetOp), uint16(x86_ADC), - /*9223*/ uint16(x86_xReadId), - /*9224*/ uint16(x86_xArgRM64), - /*9225*/ uint16(x86_xArgImm32), - /*9226*/ uint16(x86_xMatch), - /*9227*/ uint16(x86_xCondIs64), 9230, 9246, - /*9230*/ uint16(x86_xCondDataSize), 9234, 9240, 0, - /*9234*/ uint16(x86_xSetOp), uint16(x86_SBB), - /*9236*/ uint16(x86_xReadIw), - /*9237*/ uint16(x86_xArgRM16), - /*9238*/ uint16(x86_xArgImm16), - /*9239*/ uint16(x86_xMatch), - /*9240*/ uint16(x86_xSetOp), uint16(x86_SBB), - /*9242*/ uint16(x86_xReadId), - /*9243*/ uint16(x86_xArgRM32), - /*9244*/ uint16(x86_xArgImm32), - /*9245*/ uint16(x86_xMatch), - /*9246*/ uint16(x86_xCondDataSize), 9234, 9240, 9250, - /*9250*/ uint16(x86_xSetOp), uint16(x86_SBB), - /*9252*/ uint16(x86_xReadId), - /*9253*/ uint16(x86_xArgRM64), - /*9254*/ uint16(x86_xArgImm32), - /*9255*/ uint16(x86_xMatch), - /*9256*/ uint16(x86_xCondIs64), 9259, 9275, - /*9259*/ uint16(x86_xCondDataSize), 9263, 9269, 0, - /*9263*/ uint16(x86_xSetOp), uint16(x86_AND), - /*9265*/ uint16(x86_xReadIw), - /*9266*/ uint16(x86_xArgRM16), - /*9267*/ uint16(x86_xArgImm16), - /*9268*/ uint16(x86_xMatch), - /*9269*/ uint16(x86_xSetOp), uint16(x86_AND), - /*9271*/ uint16(x86_xReadId), - /*9272*/ uint16(x86_xArgRM32), - /*9273*/ uint16(x86_xArgImm32), - /*9274*/ uint16(x86_xMatch), - /*9275*/ uint16(x86_xCondDataSize), 9263, 9269, 9279, - /*9279*/ uint16(x86_xSetOp), uint16(x86_AND), - /*9281*/ uint16(x86_xReadId), - /*9282*/ uint16(x86_xArgRM64), - /*9283*/ uint16(x86_xArgImm32), - /*9284*/ uint16(x86_xMatch), - /*9285*/ uint16(x86_xCondIs64), 9288, 9304, - /*9288*/ uint16(x86_xCondDataSize), 9292, 9298, 0, - /*9292*/ uint16(x86_xSetOp), uint16(x86_SUB), - /*9294*/ uint16(x86_xReadIw), - /*9295*/ uint16(x86_xArgRM16), - /*9296*/ uint16(x86_xArgImm16), - /*9297*/ uint16(x86_xMatch), - /*9298*/ uint16(x86_xSetOp), uint16(x86_SUB), - /*9300*/ uint16(x86_xReadId), - /*9301*/ uint16(x86_xArgRM32), - /*9302*/ uint16(x86_xArgImm32), - /*9303*/ uint16(x86_xMatch), - /*9304*/ uint16(x86_xCondDataSize), 9292, 9298, 9308, - /*9308*/ uint16(x86_xSetOp), uint16(x86_SUB), - /*9310*/ uint16(x86_xReadId), - /*9311*/ uint16(x86_xArgRM64), - /*9312*/ uint16(x86_xArgImm32), - /*9313*/ uint16(x86_xMatch), - /*9314*/ uint16(x86_xCondIs64), 9317, 9333, - /*9317*/ uint16(x86_xCondDataSize), 9321, 9327, 0, - /*9321*/ uint16(x86_xSetOp), uint16(x86_XOR), - /*9323*/ uint16(x86_xReadIw), - /*9324*/ uint16(x86_xArgRM16), - /*9325*/ uint16(x86_xArgImm16), - /*9326*/ uint16(x86_xMatch), - /*9327*/ uint16(x86_xSetOp), uint16(x86_XOR), - /*9329*/ uint16(x86_xReadId), - /*9330*/ uint16(x86_xArgRM32), - /*9331*/ uint16(x86_xArgImm32), - /*9332*/ uint16(x86_xMatch), - /*9333*/ uint16(x86_xCondDataSize), 9321, 9327, 9337, - /*9337*/ uint16(x86_xSetOp), uint16(x86_XOR), - /*9339*/ uint16(x86_xReadId), - /*9340*/ uint16(x86_xArgRM64), - /*9341*/ uint16(x86_xArgImm32), - /*9342*/ uint16(x86_xMatch), - /*9343*/ uint16(x86_xCondIs64), 9346, 9362, - /*9346*/ uint16(x86_xCondDataSize), 9350, 9356, 0, - /*9350*/ uint16(x86_xSetOp), uint16(x86_CMP), - /*9352*/ uint16(x86_xReadIw), - /*9353*/ uint16(x86_xArgRM16), - /*9354*/ uint16(x86_xArgImm16), - /*9355*/ uint16(x86_xMatch), - /*9356*/ uint16(x86_xSetOp), uint16(x86_CMP), - /*9358*/ uint16(x86_xReadId), - /*9359*/ uint16(x86_xArgRM32), - /*9360*/ uint16(x86_xArgImm32), - /*9361*/ uint16(x86_xMatch), - /*9362*/ uint16(x86_xCondDataSize), 9350, 9356, 9366, - /*9366*/ uint16(x86_xSetOp), uint16(x86_CMP), - /*9368*/ uint16(x86_xReadId), - /*9369*/ uint16(x86_xArgRM64), - /*9370*/ uint16(x86_xArgImm32), - /*9371*/ uint16(x86_xMatch), - /*9372*/ uint16(x86_xCondSlashR), - 9381, // 0 - 9410, // 1 - 9439, // 2 - 9468, // 3 - 9497, // 4 - 9526, // 5 - 9555, // 6 - 9584, // 7 - /*9381*/ uint16(x86_xCondIs64), 9384, 9400, - /*9384*/ uint16(x86_xCondDataSize), 9388, 9394, 0, - /*9388*/ uint16(x86_xSetOp), uint16(x86_ADD), - /*9390*/ uint16(x86_xReadIb), - /*9391*/ uint16(x86_xArgRM16), - /*9392*/ uint16(x86_xArgImm8), - /*9393*/ uint16(x86_xMatch), - /*9394*/ uint16(x86_xSetOp), uint16(x86_ADD), - /*9396*/ uint16(x86_xReadIb), - /*9397*/ uint16(x86_xArgRM32), - /*9398*/ uint16(x86_xArgImm8), - /*9399*/ uint16(x86_xMatch), - /*9400*/ uint16(x86_xCondDataSize), 9388, 9394, 9404, - /*9404*/ uint16(x86_xSetOp), uint16(x86_ADD), - /*9406*/ uint16(x86_xReadIb), - /*9407*/ uint16(x86_xArgRM64), - /*9408*/ uint16(x86_xArgImm8), - /*9409*/ uint16(x86_xMatch), - /*9410*/ uint16(x86_xCondIs64), 9413, 9429, - /*9413*/ uint16(x86_xCondDataSize), 9417, 9423, 0, - /*9417*/ uint16(x86_xSetOp), uint16(x86_OR), - /*9419*/ uint16(x86_xReadIb), - /*9420*/ uint16(x86_xArgRM16), - /*9421*/ uint16(x86_xArgImm8), - /*9422*/ uint16(x86_xMatch), - /*9423*/ uint16(x86_xSetOp), uint16(x86_OR), - /*9425*/ uint16(x86_xReadIb), - /*9426*/ uint16(x86_xArgRM32), - /*9427*/ uint16(x86_xArgImm8), - /*9428*/ uint16(x86_xMatch), - /*9429*/ uint16(x86_xCondDataSize), 9417, 9423, 9433, - /*9433*/ uint16(x86_xSetOp), uint16(x86_OR), - /*9435*/ uint16(x86_xReadIb), - /*9436*/ uint16(x86_xArgRM64), - /*9437*/ uint16(x86_xArgImm8), - /*9438*/ uint16(x86_xMatch), - /*9439*/ uint16(x86_xCondIs64), 9442, 9458, - /*9442*/ uint16(x86_xCondDataSize), 9446, 9452, 0, - /*9446*/ uint16(x86_xSetOp), uint16(x86_ADC), - /*9448*/ uint16(x86_xReadIb), - /*9449*/ uint16(x86_xArgRM16), - /*9450*/ uint16(x86_xArgImm8), - /*9451*/ uint16(x86_xMatch), - /*9452*/ uint16(x86_xSetOp), uint16(x86_ADC), - /*9454*/ uint16(x86_xReadIb), - /*9455*/ uint16(x86_xArgRM32), - /*9456*/ uint16(x86_xArgImm8), - /*9457*/ uint16(x86_xMatch), - /*9458*/ uint16(x86_xCondDataSize), 9446, 9452, 9462, - /*9462*/ uint16(x86_xSetOp), uint16(x86_ADC), - /*9464*/ uint16(x86_xReadIb), - /*9465*/ uint16(x86_xArgRM64), - /*9466*/ uint16(x86_xArgImm8), - /*9467*/ uint16(x86_xMatch), - /*9468*/ uint16(x86_xCondIs64), 9471, 9487, - /*9471*/ uint16(x86_xCondDataSize), 9475, 9481, 0, - /*9475*/ uint16(x86_xSetOp), uint16(x86_SBB), - /*9477*/ uint16(x86_xReadIb), - /*9478*/ uint16(x86_xArgRM16), - /*9479*/ uint16(x86_xArgImm8), - /*9480*/ uint16(x86_xMatch), - /*9481*/ uint16(x86_xSetOp), uint16(x86_SBB), - /*9483*/ uint16(x86_xReadIb), - /*9484*/ uint16(x86_xArgRM32), - /*9485*/ uint16(x86_xArgImm8), - /*9486*/ uint16(x86_xMatch), - /*9487*/ uint16(x86_xCondDataSize), 9475, 9481, 9491, - /*9491*/ uint16(x86_xSetOp), uint16(x86_SBB), - /*9493*/ uint16(x86_xReadIb), - /*9494*/ uint16(x86_xArgRM64), - /*9495*/ uint16(x86_xArgImm8), - /*9496*/ uint16(x86_xMatch), - /*9497*/ uint16(x86_xCondIs64), 9500, 9516, - /*9500*/ uint16(x86_xCondDataSize), 9504, 9510, 0, - /*9504*/ uint16(x86_xSetOp), uint16(x86_AND), - /*9506*/ uint16(x86_xReadIb), - /*9507*/ uint16(x86_xArgRM16), - /*9508*/ uint16(x86_xArgImm8), - /*9509*/ uint16(x86_xMatch), - /*9510*/ uint16(x86_xSetOp), uint16(x86_AND), - /*9512*/ uint16(x86_xReadIb), - /*9513*/ uint16(x86_xArgRM32), - /*9514*/ uint16(x86_xArgImm8), - /*9515*/ uint16(x86_xMatch), - /*9516*/ uint16(x86_xCondDataSize), 9504, 9510, 9520, - /*9520*/ uint16(x86_xSetOp), uint16(x86_AND), - /*9522*/ uint16(x86_xReadIb), - /*9523*/ uint16(x86_xArgRM64), - /*9524*/ uint16(x86_xArgImm8), - /*9525*/ uint16(x86_xMatch), - /*9526*/ uint16(x86_xCondIs64), 9529, 9545, - /*9529*/ uint16(x86_xCondDataSize), 9533, 9539, 0, - /*9533*/ uint16(x86_xSetOp), uint16(x86_SUB), - /*9535*/ uint16(x86_xReadIb), - /*9536*/ uint16(x86_xArgRM16), - /*9537*/ uint16(x86_xArgImm8), - /*9538*/ uint16(x86_xMatch), - /*9539*/ uint16(x86_xSetOp), uint16(x86_SUB), - /*9541*/ uint16(x86_xReadIb), - /*9542*/ uint16(x86_xArgRM32), - /*9543*/ uint16(x86_xArgImm8), - /*9544*/ uint16(x86_xMatch), - /*9545*/ uint16(x86_xCondDataSize), 9533, 9539, 9549, - /*9549*/ uint16(x86_xSetOp), uint16(x86_SUB), - /*9551*/ uint16(x86_xReadIb), - /*9552*/ uint16(x86_xArgRM64), - /*9553*/ uint16(x86_xArgImm8), - /*9554*/ uint16(x86_xMatch), - /*9555*/ uint16(x86_xCondIs64), 9558, 9574, - /*9558*/ uint16(x86_xCondDataSize), 9562, 9568, 0, - /*9562*/ uint16(x86_xSetOp), uint16(x86_XOR), - /*9564*/ uint16(x86_xReadIb), - /*9565*/ uint16(x86_xArgRM16), - /*9566*/ uint16(x86_xArgImm8), - /*9567*/ uint16(x86_xMatch), - /*9568*/ uint16(x86_xSetOp), uint16(x86_XOR), - /*9570*/ uint16(x86_xReadIb), - /*9571*/ uint16(x86_xArgRM32), - /*9572*/ uint16(x86_xArgImm8), - /*9573*/ uint16(x86_xMatch), - /*9574*/ uint16(x86_xCondDataSize), 9562, 9568, 9578, - /*9578*/ uint16(x86_xSetOp), uint16(x86_XOR), - /*9580*/ uint16(x86_xReadIb), - /*9581*/ uint16(x86_xArgRM64), - /*9582*/ uint16(x86_xArgImm8), - /*9583*/ uint16(x86_xMatch), - /*9584*/ uint16(x86_xCondIs64), 9587, 9603, - /*9587*/ uint16(x86_xCondDataSize), 9591, 9597, 0, - /*9591*/ uint16(x86_xSetOp), uint16(x86_CMP), - /*9593*/ uint16(x86_xReadIb), - /*9594*/ uint16(x86_xArgRM16), - /*9595*/ uint16(x86_xArgImm8), - /*9596*/ uint16(x86_xMatch), - /*9597*/ uint16(x86_xSetOp), uint16(x86_CMP), - /*9599*/ uint16(x86_xReadIb), - /*9600*/ uint16(x86_xArgRM32), - /*9601*/ uint16(x86_xArgImm8), - /*9602*/ uint16(x86_xMatch), - /*9603*/ uint16(x86_xCondDataSize), 9591, 9597, 9607, - /*9607*/ uint16(x86_xSetOp), uint16(x86_CMP), - /*9609*/ uint16(x86_xReadIb), - /*9610*/ uint16(x86_xArgRM64), - /*9611*/ uint16(x86_xArgImm8), - /*9612*/ uint16(x86_xMatch), - /*9613*/ uint16(x86_xSetOp), uint16(x86_TEST), - /*9615*/ uint16(x86_xReadSlashR), - /*9616*/ uint16(x86_xArgRM8), - /*9617*/ uint16(x86_xArgR8), - /*9618*/ uint16(x86_xMatch), - /*9619*/ uint16(x86_xCondIs64), 9622, 9638, - /*9622*/ uint16(x86_xCondDataSize), 9626, 9632, 0, - /*9626*/ uint16(x86_xSetOp), uint16(x86_TEST), - /*9628*/ uint16(x86_xReadSlashR), - /*9629*/ uint16(x86_xArgRM16), - /*9630*/ uint16(x86_xArgR16), - /*9631*/ uint16(x86_xMatch), - /*9632*/ uint16(x86_xSetOp), uint16(x86_TEST), - /*9634*/ uint16(x86_xReadSlashR), - /*9635*/ uint16(x86_xArgRM32), - /*9636*/ uint16(x86_xArgR32), - /*9637*/ uint16(x86_xMatch), - /*9638*/ uint16(x86_xCondDataSize), 9626, 9632, 9642, - /*9642*/ uint16(x86_xSetOp), uint16(x86_TEST), - /*9644*/ uint16(x86_xReadSlashR), - /*9645*/ uint16(x86_xArgRM64), - /*9646*/ uint16(x86_xArgR64), - /*9647*/ uint16(x86_xMatch), - /*9648*/ uint16(x86_xSetOp), uint16(x86_XCHG), - /*9650*/ uint16(x86_xReadSlashR), - /*9651*/ uint16(x86_xArgRM8), - /*9652*/ uint16(x86_xArgR8), - /*9653*/ uint16(x86_xMatch), - /*9654*/ uint16(x86_xCondIs64), 9657, 9673, - /*9657*/ uint16(x86_xCondDataSize), 9661, 9667, 0, - /*9661*/ uint16(x86_xSetOp), uint16(x86_XCHG), - /*9663*/ uint16(x86_xReadSlashR), - /*9664*/ uint16(x86_xArgRM16), - /*9665*/ uint16(x86_xArgR16), - /*9666*/ uint16(x86_xMatch), - /*9667*/ uint16(x86_xSetOp), uint16(x86_XCHG), - /*9669*/ uint16(x86_xReadSlashR), - /*9670*/ uint16(x86_xArgRM32), - /*9671*/ uint16(x86_xArgR32), - /*9672*/ uint16(x86_xMatch), - /*9673*/ uint16(x86_xCondDataSize), 9661, 9667, 9677, - /*9677*/ uint16(x86_xSetOp), uint16(x86_XCHG), - /*9679*/ uint16(x86_xReadSlashR), - /*9680*/ uint16(x86_xArgRM64), - /*9681*/ uint16(x86_xArgR64), - /*9682*/ uint16(x86_xMatch), - /*9683*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*9685*/ uint16(x86_xReadSlashR), - /*9686*/ uint16(x86_xArgRM8), - /*9687*/ uint16(x86_xArgR8), - /*9688*/ uint16(x86_xMatch), - /*9689*/ uint16(x86_xCondDataSize), 9693, 9699, 9705, - /*9693*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*9695*/ uint16(x86_xReadSlashR), - /*9696*/ uint16(x86_xArgRM16), - /*9697*/ uint16(x86_xArgR16), - /*9698*/ uint16(x86_xMatch), - /*9699*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*9701*/ uint16(x86_xReadSlashR), - /*9702*/ uint16(x86_xArgRM32), - /*9703*/ uint16(x86_xArgR32), - /*9704*/ uint16(x86_xMatch), - /*9705*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*9707*/ uint16(x86_xReadSlashR), - /*9708*/ uint16(x86_xArgRM64), - /*9709*/ uint16(x86_xArgR64), - /*9710*/ uint16(x86_xMatch), - /*9711*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*9713*/ uint16(x86_xReadSlashR), - /*9714*/ uint16(x86_xArgR8), - /*9715*/ uint16(x86_xArgRM8), - /*9716*/ uint16(x86_xMatch), - /*9717*/ uint16(x86_xCondDataSize), 9721, 9727, 9733, - /*9721*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*9723*/ uint16(x86_xReadSlashR), - /*9724*/ uint16(x86_xArgR16), - /*9725*/ uint16(x86_xArgRM16), - /*9726*/ uint16(x86_xMatch), - /*9727*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*9729*/ uint16(x86_xReadSlashR), - /*9730*/ uint16(x86_xArgR32), - /*9731*/ uint16(x86_xArgRM32), - /*9732*/ uint16(x86_xMatch), - /*9733*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*9735*/ uint16(x86_xReadSlashR), - /*9736*/ uint16(x86_xArgR64), - /*9737*/ uint16(x86_xArgRM64), - /*9738*/ uint16(x86_xMatch), - /*9739*/ uint16(x86_xCondIs64), 9742, 9758, - /*9742*/ uint16(x86_xCondDataSize), 9746, 9752, 0, - /*9746*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*9748*/ uint16(x86_xReadSlashR), - /*9749*/ uint16(x86_xArgRM16), - /*9750*/ uint16(x86_xArgSreg), - /*9751*/ uint16(x86_xMatch), - /*9752*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*9754*/ uint16(x86_xReadSlashR), - /*9755*/ uint16(x86_xArgR32M16), - /*9756*/ uint16(x86_xArgSreg), - /*9757*/ uint16(x86_xMatch), - /*9758*/ uint16(x86_xCondDataSize), 9746, 9752, 9762, - /*9762*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*9764*/ uint16(x86_xReadSlashR), - /*9765*/ uint16(x86_xArgR64M16), - /*9766*/ uint16(x86_xArgSreg), - /*9767*/ uint16(x86_xMatch), - /*9768*/ uint16(x86_xCondIs64), 9771, 9787, - /*9771*/ uint16(x86_xCondDataSize), 9775, 9781, 0, - /*9775*/ uint16(x86_xSetOp), uint16(x86_LEA), - /*9777*/ uint16(x86_xReadSlashR), - /*9778*/ uint16(x86_xArgR16), - /*9779*/ uint16(x86_xArgM), - /*9780*/ uint16(x86_xMatch), - /*9781*/ uint16(x86_xSetOp), uint16(x86_LEA), - /*9783*/ uint16(x86_xReadSlashR), - /*9784*/ uint16(x86_xArgR32), - /*9785*/ uint16(x86_xArgM), - /*9786*/ uint16(x86_xMatch), - /*9787*/ uint16(x86_xCondDataSize), 9775, 9781, 9791, - /*9791*/ uint16(x86_xSetOp), uint16(x86_LEA), - /*9793*/ uint16(x86_xReadSlashR), - /*9794*/ uint16(x86_xArgR64), - /*9795*/ uint16(x86_xArgM), - /*9796*/ uint16(x86_xMatch), - /*9797*/ uint16(x86_xCondIs64), 9800, 9816, - /*9800*/ uint16(x86_xCondDataSize), 9804, 9810, 0, - /*9804*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*9806*/ uint16(x86_xReadSlashR), - /*9807*/ uint16(x86_xArgSreg), - /*9808*/ uint16(x86_xArgRM16), - /*9809*/ uint16(x86_xMatch), - /*9810*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*9812*/ uint16(x86_xReadSlashR), - /*9813*/ uint16(x86_xArgSreg), - /*9814*/ uint16(x86_xArgR32M16), - /*9815*/ uint16(x86_xMatch), - /*9816*/ uint16(x86_xCondDataSize), 9804, 9810, 9820, - /*9820*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*9822*/ uint16(x86_xReadSlashR), - /*9823*/ uint16(x86_xArgSreg), - /*9824*/ uint16(x86_xArgR64M16), - /*9825*/ uint16(x86_xMatch), - /*9826*/ uint16(x86_xCondSlashR), - 9835, // 0 - 0, // 1 - 0, // 2 - 0, // 3 - 0, // 4 - 0, // 5 - 0, // 6 - 0, // 7 - /*9835*/ uint16(x86_xCondIs64), 9838, 9850, - /*9838*/ uint16(x86_xCondDataSize), 9842, 9846, 0, - /*9842*/ uint16(x86_xSetOp), uint16(x86_POP), - /*9844*/ uint16(x86_xArgRM16), - /*9845*/ uint16(x86_xMatch), - /*9846*/ uint16(x86_xSetOp), uint16(x86_POP), - /*9848*/ uint16(x86_xArgRM32), - /*9849*/ uint16(x86_xMatch), - /*9850*/ uint16(x86_xCondDataSize), 9842, 9854, 9858, - /*9854*/ uint16(x86_xSetOp), uint16(x86_POP), - /*9856*/ uint16(x86_xArgRM64), - /*9857*/ uint16(x86_xMatch), - /*9858*/ uint16(x86_xSetOp), uint16(x86_POP), - /*9860*/ uint16(x86_xArgRM64), - /*9861*/ uint16(x86_xMatch), - /*9862*/ uint16(x86_xCondIs64), 9865, 9879, - /*9865*/ uint16(x86_xCondDataSize), 9869, 9874, 0, - /*9869*/ uint16(x86_xSetOp), uint16(x86_XCHG), - /*9871*/ uint16(x86_xArgR16op), - /*9872*/ uint16(x86_xArgAX), - /*9873*/ uint16(x86_xMatch), - /*9874*/ uint16(x86_xSetOp), uint16(x86_XCHG), - /*9876*/ uint16(x86_xArgR32op), - /*9877*/ uint16(x86_xArgEAX), - /*9878*/ uint16(x86_xMatch), - /*9879*/ uint16(x86_xCondDataSize), 9869, 9874, 9883, - /*9883*/ uint16(x86_xSetOp), uint16(x86_XCHG), - /*9885*/ uint16(x86_xArgR64op), - /*9886*/ uint16(x86_xArgRAX), - /*9887*/ uint16(x86_xMatch), - /*9888*/ uint16(x86_xCondIs64), 9891, 9901, - /*9891*/ uint16(x86_xCondDataSize), 9895, 9898, 0, - /*9895*/ uint16(x86_xSetOp), uint16(x86_CBW), - /*9897*/ uint16(x86_xMatch), - /*9898*/ uint16(x86_xSetOp), uint16(x86_CWDE), - /*9900*/ uint16(x86_xMatch), - /*9901*/ uint16(x86_xCondDataSize), 9895, 9898, 9905, - /*9905*/ uint16(x86_xSetOp), uint16(x86_CDQE), - /*9907*/ uint16(x86_xMatch), - /*9908*/ uint16(x86_xCondIs64), 9911, 9921, - /*9911*/ uint16(x86_xCondDataSize), 9915, 9918, 0, - /*9915*/ uint16(x86_xSetOp), uint16(x86_CWD), - /*9917*/ uint16(x86_xMatch), - /*9918*/ uint16(x86_xSetOp), uint16(x86_CDQ), - /*9920*/ uint16(x86_xMatch), - /*9921*/ uint16(x86_xCondDataSize), 9915, 9918, 9925, - /*9925*/ uint16(x86_xSetOp), uint16(x86_CQO), - /*9927*/ uint16(x86_xMatch), - /*9928*/ uint16(x86_xCondIs64), 9931, 0, - /*9931*/ uint16(x86_xCondDataSize), 9935, 9940, 0, - /*9935*/ uint16(x86_xSetOp), uint16(x86_LCALL), - /*9937*/ uint16(x86_xReadCd), - /*9938*/ uint16(x86_xArgPtr16colon16), - /*9939*/ uint16(x86_xMatch), - /*9940*/ uint16(x86_xSetOp), uint16(x86_LCALL), - /*9942*/ uint16(x86_xReadCp), - /*9943*/ uint16(x86_xArgPtr16colon32), - /*9944*/ uint16(x86_xMatch), - /*9945*/ uint16(x86_xSetOp), uint16(x86_FWAIT), - /*9947*/ uint16(x86_xMatch), - /*9948*/ uint16(x86_xCondIs64), 9951, 9961, - /*9951*/ uint16(x86_xCondDataSize), 9955, 9958, 0, - /*9955*/ uint16(x86_xSetOp), uint16(x86_PUSHF), - /*9957*/ uint16(x86_xMatch), - /*9958*/ uint16(x86_xSetOp), uint16(x86_PUSHFD), - /*9960*/ uint16(x86_xMatch), - /*9961*/ uint16(x86_xCondDataSize), 9955, 9965, 9968, - /*9965*/ uint16(x86_xSetOp), uint16(x86_PUSHFQ), - /*9967*/ uint16(x86_xMatch), - /*9968*/ uint16(x86_xSetOp), uint16(x86_PUSHFQ), - /*9970*/ uint16(x86_xMatch), - /*9971*/ uint16(x86_xCondIs64), 9974, 9984, - /*9974*/ uint16(x86_xCondDataSize), 9978, 9981, 0, - /*9978*/ uint16(x86_xSetOp), uint16(x86_POPF), - /*9980*/ uint16(x86_xMatch), - /*9981*/ uint16(x86_xSetOp), uint16(x86_POPFD), - /*9983*/ uint16(x86_xMatch), - /*9984*/ uint16(x86_xCondDataSize), 9978, 9988, 9991, - /*9988*/ uint16(x86_xSetOp), uint16(x86_POPFQ), - /*9990*/ uint16(x86_xMatch), - /*9991*/ uint16(x86_xSetOp), uint16(x86_POPFQ), - /*9993*/ uint16(x86_xMatch), - /*9994*/ uint16(x86_xSetOp), uint16(x86_SAHF), - /*9996*/ uint16(x86_xMatch), - /*9997*/ uint16(x86_xSetOp), uint16(x86_LAHF), - /*9999*/ uint16(x86_xMatch), - /*10000*/ uint16(x86_xCondIs64), 10003, 10009, - /*10003*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*10005*/ uint16(x86_xReadCm), - /*10006*/ uint16(x86_xArgAL), - /*10007*/ uint16(x86_xArgMoffs8), - /*10008*/ uint16(x86_xMatch), - /*10009*/ uint16(x86_xCondDataSize), 10003, 10003, 10013, - /*10013*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*10015*/ uint16(x86_xReadCm), - /*10016*/ uint16(x86_xArgAL), - /*10017*/ uint16(x86_xArgMoffs8), - /*10018*/ uint16(x86_xMatch), - /*10019*/ uint16(x86_xCondDataSize), 10023, 10029, 10035, - /*10023*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*10025*/ uint16(x86_xReadCm), - /*10026*/ uint16(x86_xArgAX), - /*10027*/ uint16(x86_xArgMoffs16), - /*10028*/ uint16(x86_xMatch), - /*10029*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*10031*/ uint16(x86_xReadCm), - /*10032*/ uint16(x86_xArgEAX), - /*10033*/ uint16(x86_xArgMoffs32), - /*10034*/ uint16(x86_xMatch), - /*10035*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*10037*/ uint16(x86_xReadCm), - /*10038*/ uint16(x86_xArgRAX), - /*10039*/ uint16(x86_xArgMoffs64), - /*10040*/ uint16(x86_xMatch), - /*10041*/ uint16(x86_xCondIs64), 10044, 10050, - /*10044*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*10046*/ uint16(x86_xReadCm), - /*10047*/ uint16(x86_xArgMoffs8), - /*10048*/ uint16(x86_xArgAL), - /*10049*/ uint16(x86_xMatch), - /*10050*/ uint16(x86_xCondDataSize), 10044, 10044, 10054, - /*10054*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*10056*/ uint16(x86_xReadCm), - /*10057*/ uint16(x86_xArgMoffs8), - /*10058*/ uint16(x86_xArgAL), - /*10059*/ uint16(x86_xMatch), - /*10060*/ uint16(x86_xCondDataSize), 10064, 10070, 10076, - /*10064*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*10066*/ uint16(x86_xReadCm), - /*10067*/ uint16(x86_xArgMoffs16), - /*10068*/ uint16(x86_xArgAX), - /*10069*/ uint16(x86_xMatch), - /*10070*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*10072*/ uint16(x86_xReadCm), - /*10073*/ uint16(x86_xArgMoffs32), - /*10074*/ uint16(x86_xArgEAX), - /*10075*/ uint16(x86_xMatch), - /*10076*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*10078*/ uint16(x86_xReadCm), - /*10079*/ uint16(x86_xArgMoffs64), - /*10080*/ uint16(x86_xArgRAX), - /*10081*/ uint16(x86_xMatch), - /*10082*/ uint16(x86_xSetOp), uint16(x86_MOVSB), - /*10084*/ uint16(x86_xMatch), - /*10085*/ uint16(x86_xCondIs64), 10088, 10098, - /*10088*/ uint16(x86_xCondDataSize), 10092, 10095, 0, - /*10092*/ uint16(x86_xSetOp), uint16(x86_MOVSW), - /*10094*/ uint16(x86_xMatch), - /*10095*/ uint16(x86_xSetOp), uint16(x86_MOVSD), - /*10097*/ uint16(x86_xMatch), - /*10098*/ uint16(x86_xCondDataSize), 10092, 10095, 10102, - /*10102*/ uint16(x86_xSetOp), uint16(x86_MOVSQ), - /*10104*/ uint16(x86_xMatch), - /*10105*/ uint16(x86_xSetOp), uint16(x86_CMPSB), - /*10107*/ uint16(x86_xMatch), - /*10108*/ uint16(x86_xCondIs64), 10111, 10121, - /*10111*/ uint16(x86_xCondDataSize), 10115, 10118, 0, - /*10115*/ uint16(x86_xSetOp), uint16(x86_CMPSW), - /*10117*/ uint16(x86_xMatch), - /*10118*/ uint16(x86_xSetOp), uint16(x86_CMPSD), - /*10120*/ uint16(x86_xMatch), - /*10121*/ uint16(x86_xCondDataSize), 10115, 10118, 10125, - /*10125*/ uint16(x86_xSetOp), uint16(x86_CMPSQ), - /*10127*/ uint16(x86_xMatch), - /*10128*/ uint16(x86_xSetOp), uint16(x86_TEST), - /*10130*/ uint16(x86_xReadIb), - /*10131*/ uint16(x86_xArgAL), - /*10132*/ uint16(x86_xArgImm8u), - /*10133*/ uint16(x86_xMatch), - /*10134*/ uint16(x86_xCondIs64), 10137, 10153, - /*10137*/ uint16(x86_xCondDataSize), 10141, 10147, 0, - /*10141*/ uint16(x86_xSetOp), uint16(x86_TEST), - /*10143*/ uint16(x86_xReadIw), - /*10144*/ uint16(x86_xArgAX), - /*10145*/ uint16(x86_xArgImm16), - /*10146*/ uint16(x86_xMatch), - /*10147*/ uint16(x86_xSetOp), uint16(x86_TEST), - /*10149*/ uint16(x86_xReadId), - /*10150*/ uint16(x86_xArgEAX), - /*10151*/ uint16(x86_xArgImm32), - /*10152*/ uint16(x86_xMatch), - /*10153*/ uint16(x86_xCondDataSize), 10141, 10147, 10157, - /*10157*/ uint16(x86_xSetOp), uint16(x86_TEST), - /*10159*/ uint16(x86_xReadId), - /*10160*/ uint16(x86_xArgRAX), - /*10161*/ uint16(x86_xArgImm32), - /*10162*/ uint16(x86_xMatch), - /*10163*/ uint16(x86_xSetOp), uint16(x86_STOSB), - /*10165*/ uint16(x86_xMatch), - /*10166*/ uint16(x86_xCondIs64), 10169, 10179, - /*10169*/ uint16(x86_xCondDataSize), 10173, 10176, 0, - /*10173*/ uint16(x86_xSetOp), uint16(x86_STOSW), - /*10175*/ uint16(x86_xMatch), - /*10176*/ uint16(x86_xSetOp), uint16(x86_STOSD), - /*10178*/ uint16(x86_xMatch), - /*10179*/ uint16(x86_xCondDataSize), 10173, 10176, 10183, - /*10183*/ uint16(x86_xSetOp), uint16(x86_STOSQ), - /*10185*/ uint16(x86_xMatch), - /*10186*/ uint16(x86_xSetOp), uint16(x86_LODSB), - /*10188*/ uint16(x86_xMatch), - /*10189*/ uint16(x86_xCondIs64), 10192, 10202, - /*10192*/ uint16(x86_xCondDataSize), 10196, 10199, 0, - /*10196*/ uint16(x86_xSetOp), uint16(x86_LODSW), - /*10198*/ uint16(x86_xMatch), - /*10199*/ uint16(x86_xSetOp), uint16(x86_LODSD), - /*10201*/ uint16(x86_xMatch), - /*10202*/ uint16(x86_xCondDataSize), 10196, 10199, 10206, - /*10206*/ uint16(x86_xSetOp), uint16(x86_LODSQ), - /*10208*/ uint16(x86_xMatch), - /*10209*/ uint16(x86_xSetOp), uint16(x86_SCASB), - /*10211*/ uint16(x86_xMatch), - /*10212*/ uint16(x86_xCondIs64), 10215, 10225, - /*10215*/ uint16(x86_xCondDataSize), 10219, 10222, 0, - /*10219*/ uint16(x86_xSetOp), uint16(x86_SCASW), - /*10221*/ uint16(x86_xMatch), - /*10222*/ uint16(x86_xSetOp), uint16(x86_SCASD), - /*10224*/ uint16(x86_xMatch), - /*10225*/ uint16(x86_xCondDataSize), 10219, 10222, 10229, - /*10229*/ uint16(x86_xSetOp), uint16(x86_SCASQ), - /*10231*/ uint16(x86_xMatch), - /*10232*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*10234*/ uint16(x86_xReadIb), - /*10235*/ uint16(x86_xArgR8op), - /*10236*/ uint16(x86_xArgImm8u), - /*10237*/ uint16(x86_xMatch), - /*10238*/ uint16(x86_xCondIs64), 10241, 10257, - /*10241*/ uint16(x86_xCondDataSize), 10245, 10251, 0, - /*10245*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*10247*/ uint16(x86_xReadIw), - /*10248*/ uint16(x86_xArgR16op), - /*10249*/ uint16(x86_xArgImm16), - /*10250*/ uint16(x86_xMatch), - /*10251*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*10253*/ uint16(x86_xReadId), - /*10254*/ uint16(x86_xArgR32op), - /*10255*/ uint16(x86_xArgImm32), - /*10256*/ uint16(x86_xMatch), - /*10257*/ uint16(x86_xCondDataSize), 10245, 10251, 10261, - /*10261*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*10263*/ uint16(x86_xReadIo), - /*10264*/ uint16(x86_xArgR64op), - /*10265*/ uint16(x86_xArgImm64), - /*10266*/ uint16(x86_xMatch), - /*10267*/ uint16(x86_xCondSlashR), - 10276, // 0 - 10282, // 1 - 10288, // 2 - 10294, // 3 - 10300, // 4 - 10306, // 5 - 0, // 6 - 10312, // 7 - /*10276*/ uint16(x86_xSetOp), uint16(x86_ROL), - /*10278*/ uint16(x86_xReadIb), - /*10279*/ uint16(x86_xArgRM8), - /*10280*/ uint16(x86_xArgImm8u), - /*10281*/ uint16(x86_xMatch), - /*10282*/ uint16(x86_xSetOp), uint16(x86_ROR), - /*10284*/ uint16(x86_xReadIb), - /*10285*/ uint16(x86_xArgRM8), - /*10286*/ uint16(x86_xArgImm8u), - /*10287*/ uint16(x86_xMatch), - /*10288*/ uint16(x86_xSetOp), uint16(x86_RCL), - /*10290*/ uint16(x86_xReadIb), - /*10291*/ uint16(x86_xArgRM8), - /*10292*/ uint16(x86_xArgImm8u), - /*10293*/ uint16(x86_xMatch), - /*10294*/ uint16(x86_xSetOp), uint16(x86_RCR), - /*10296*/ uint16(x86_xReadIb), - /*10297*/ uint16(x86_xArgRM8), - /*10298*/ uint16(x86_xArgImm8u), - /*10299*/ uint16(x86_xMatch), - /*10300*/ uint16(x86_xSetOp), uint16(x86_SHL), - /*10302*/ uint16(x86_xReadIb), - /*10303*/ uint16(x86_xArgRM8), - /*10304*/ uint16(x86_xArgImm8u), - /*10305*/ uint16(x86_xMatch), - /*10306*/ uint16(x86_xSetOp), uint16(x86_SHR), - /*10308*/ uint16(x86_xReadIb), - /*10309*/ uint16(x86_xArgRM8), - /*10310*/ uint16(x86_xArgImm8u), - /*10311*/ uint16(x86_xMatch), - /*10312*/ uint16(x86_xSetOp), uint16(x86_SAR), - /*10314*/ uint16(x86_xReadIb), - /*10315*/ uint16(x86_xArgRM8), - /*10316*/ uint16(x86_xArgImm8u), - /*10317*/ uint16(x86_xMatch), - /*10318*/ uint16(x86_xCondSlashR), - 10327, // 0 - 10349, // 1 - 10371, // 2 - 10400, // 3 - 10429, // 4 - 10458, // 5 - 0, // 6 - 10487, // 7 - /*10327*/ uint16(x86_xCondDataSize), 10331, 10337, 10343, - /*10331*/ uint16(x86_xSetOp), uint16(x86_ROL), - /*10333*/ uint16(x86_xReadIb), - /*10334*/ uint16(x86_xArgRM16), - /*10335*/ uint16(x86_xArgImm8u), - /*10336*/ uint16(x86_xMatch), - /*10337*/ uint16(x86_xSetOp), uint16(x86_ROL), - /*10339*/ uint16(x86_xReadIb), - /*10340*/ uint16(x86_xArgRM32), - /*10341*/ uint16(x86_xArgImm8u), - /*10342*/ uint16(x86_xMatch), - /*10343*/ uint16(x86_xSetOp), uint16(x86_ROL), - /*10345*/ uint16(x86_xReadIb), - /*10346*/ uint16(x86_xArgRM64), - /*10347*/ uint16(x86_xArgImm8u), - /*10348*/ uint16(x86_xMatch), - /*10349*/ uint16(x86_xCondDataSize), 10353, 10359, 10365, - /*10353*/ uint16(x86_xSetOp), uint16(x86_ROR), - /*10355*/ uint16(x86_xReadIb), - /*10356*/ uint16(x86_xArgRM16), - /*10357*/ uint16(x86_xArgImm8u), - /*10358*/ uint16(x86_xMatch), - /*10359*/ uint16(x86_xSetOp), uint16(x86_ROR), - /*10361*/ uint16(x86_xReadIb), - /*10362*/ uint16(x86_xArgRM32), - /*10363*/ uint16(x86_xArgImm8u), - /*10364*/ uint16(x86_xMatch), - /*10365*/ uint16(x86_xSetOp), uint16(x86_ROR), - /*10367*/ uint16(x86_xReadIb), - /*10368*/ uint16(x86_xArgRM64), - /*10369*/ uint16(x86_xArgImm8u), - /*10370*/ uint16(x86_xMatch), - /*10371*/ uint16(x86_xCondIs64), 10374, 10390, - /*10374*/ uint16(x86_xCondDataSize), 10378, 10384, 0, - /*10378*/ uint16(x86_xSetOp), uint16(x86_RCL), - /*10380*/ uint16(x86_xReadIb), - /*10381*/ uint16(x86_xArgRM16), - /*10382*/ uint16(x86_xArgImm8u), - /*10383*/ uint16(x86_xMatch), - /*10384*/ uint16(x86_xSetOp), uint16(x86_RCL), - /*10386*/ uint16(x86_xReadIb), - /*10387*/ uint16(x86_xArgRM32), - /*10388*/ uint16(x86_xArgImm8u), - /*10389*/ uint16(x86_xMatch), - /*10390*/ uint16(x86_xCondDataSize), 10378, 10384, 10394, - /*10394*/ uint16(x86_xSetOp), uint16(x86_RCL), - /*10396*/ uint16(x86_xReadIb), - /*10397*/ uint16(x86_xArgRM64), - /*10398*/ uint16(x86_xArgImm8u), - /*10399*/ uint16(x86_xMatch), - /*10400*/ uint16(x86_xCondIs64), 10403, 10419, - /*10403*/ uint16(x86_xCondDataSize), 10407, 10413, 0, - /*10407*/ uint16(x86_xSetOp), uint16(x86_RCR), - /*10409*/ uint16(x86_xReadIb), - /*10410*/ uint16(x86_xArgRM16), - /*10411*/ uint16(x86_xArgImm8u), - /*10412*/ uint16(x86_xMatch), - /*10413*/ uint16(x86_xSetOp), uint16(x86_RCR), - /*10415*/ uint16(x86_xReadIb), - /*10416*/ uint16(x86_xArgRM32), - /*10417*/ uint16(x86_xArgImm8u), - /*10418*/ uint16(x86_xMatch), - /*10419*/ uint16(x86_xCondDataSize), 10407, 10413, 10423, - /*10423*/ uint16(x86_xSetOp), uint16(x86_RCR), - /*10425*/ uint16(x86_xReadIb), - /*10426*/ uint16(x86_xArgRM64), - /*10427*/ uint16(x86_xArgImm8u), - /*10428*/ uint16(x86_xMatch), - /*10429*/ uint16(x86_xCondIs64), 10432, 10448, - /*10432*/ uint16(x86_xCondDataSize), 10436, 10442, 0, - /*10436*/ uint16(x86_xSetOp), uint16(x86_SHL), - /*10438*/ uint16(x86_xReadIb), - /*10439*/ uint16(x86_xArgRM16), - /*10440*/ uint16(x86_xArgImm8u), - /*10441*/ uint16(x86_xMatch), - /*10442*/ uint16(x86_xSetOp), uint16(x86_SHL), - /*10444*/ uint16(x86_xReadIb), - /*10445*/ uint16(x86_xArgRM32), - /*10446*/ uint16(x86_xArgImm8u), - /*10447*/ uint16(x86_xMatch), - /*10448*/ uint16(x86_xCondDataSize), 10436, 10442, 10452, - /*10452*/ uint16(x86_xSetOp), uint16(x86_SHL), - /*10454*/ uint16(x86_xReadIb), - /*10455*/ uint16(x86_xArgRM64), - /*10456*/ uint16(x86_xArgImm8u), - /*10457*/ uint16(x86_xMatch), - /*10458*/ uint16(x86_xCondIs64), 10461, 10477, - /*10461*/ uint16(x86_xCondDataSize), 10465, 10471, 0, - /*10465*/ uint16(x86_xSetOp), uint16(x86_SHR), - /*10467*/ uint16(x86_xReadIb), - /*10468*/ uint16(x86_xArgRM16), - /*10469*/ uint16(x86_xArgImm8u), - /*10470*/ uint16(x86_xMatch), - /*10471*/ uint16(x86_xSetOp), uint16(x86_SHR), - /*10473*/ uint16(x86_xReadIb), - /*10474*/ uint16(x86_xArgRM32), - /*10475*/ uint16(x86_xArgImm8u), - /*10476*/ uint16(x86_xMatch), - /*10477*/ uint16(x86_xCondDataSize), 10465, 10471, 10481, - /*10481*/ uint16(x86_xSetOp), uint16(x86_SHR), - /*10483*/ uint16(x86_xReadIb), - /*10484*/ uint16(x86_xArgRM64), - /*10485*/ uint16(x86_xArgImm8u), - /*10486*/ uint16(x86_xMatch), - /*10487*/ uint16(x86_xCondIs64), 10490, 10506, - /*10490*/ uint16(x86_xCondDataSize), 10494, 10500, 0, - /*10494*/ uint16(x86_xSetOp), uint16(x86_SAR), - /*10496*/ uint16(x86_xReadIb), - /*10497*/ uint16(x86_xArgRM16), - /*10498*/ uint16(x86_xArgImm8u), - /*10499*/ uint16(x86_xMatch), - /*10500*/ uint16(x86_xSetOp), uint16(x86_SAR), - /*10502*/ uint16(x86_xReadIb), - /*10503*/ uint16(x86_xArgRM32), - /*10504*/ uint16(x86_xArgImm8u), - /*10505*/ uint16(x86_xMatch), - /*10506*/ uint16(x86_xCondDataSize), 10494, 10500, 10510, - /*10510*/ uint16(x86_xSetOp), uint16(x86_SAR), - /*10512*/ uint16(x86_xReadIb), - /*10513*/ uint16(x86_xArgRM64), - /*10514*/ uint16(x86_xArgImm8u), - /*10515*/ uint16(x86_xMatch), - /*10516*/ uint16(x86_xSetOp), uint16(x86_RET), - /*10518*/ uint16(x86_xReadIw), - /*10519*/ uint16(x86_xArgImm16u), - /*10520*/ uint16(x86_xMatch), - /*10521*/ uint16(x86_xSetOp), uint16(x86_RET), - /*10523*/ uint16(x86_xMatch), - /*10524*/ uint16(x86_xCondIs64), 10527, 0, - /*10527*/ uint16(x86_xCondDataSize), 10531, 10537, 0, - /*10531*/ uint16(x86_xSetOp), uint16(x86_LES), - /*10533*/ uint16(x86_xReadSlashR), - /*10534*/ uint16(x86_xArgR16), - /*10535*/ uint16(x86_xArgM16colon16), - /*10536*/ uint16(x86_xMatch), - /*10537*/ uint16(x86_xSetOp), uint16(x86_LES), - /*10539*/ uint16(x86_xReadSlashR), - /*10540*/ uint16(x86_xArgR32), - /*10541*/ uint16(x86_xArgM16colon32), - /*10542*/ uint16(x86_xMatch), - /*10543*/ uint16(x86_xCondIs64), 10546, 0, - /*10546*/ uint16(x86_xCondDataSize), 10550, 10556, 0, - /*10550*/ uint16(x86_xSetOp), uint16(x86_LDS), - /*10552*/ uint16(x86_xReadSlashR), - /*10553*/ uint16(x86_xArgR16), - /*10554*/ uint16(x86_xArgM16colon16), - /*10555*/ uint16(x86_xMatch), - /*10556*/ uint16(x86_xSetOp), uint16(x86_LDS), - /*10558*/ uint16(x86_xReadSlashR), - /*10559*/ uint16(x86_xArgR32), - /*10560*/ uint16(x86_xArgM16colon32), - /*10561*/ uint16(x86_xMatch), - /*10562*/ uint16(x86_xCondByte), 1, - 0xF8, 10581, - /*10566*/ uint16(x86_xCondSlashR), - 10575, // 0 - 0, // 1 - 0, // 2 - 0, // 3 - 0, // 4 - 0, // 5 - 0, // 6 - 0, // 7 - /*10575*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*10577*/ uint16(x86_xReadIb), - /*10578*/ uint16(x86_xArgRM8), - /*10579*/ uint16(x86_xArgImm8u), - /*10580*/ uint16(x86_xMatch), - /*10581*/ uint16(x86_xSetOp), uint16(x86_XABORT), - /*10583*/ uint16(x86_xReadIb), - /*10584*/ uint16(x86_xArgImm8u), - /*10585*/ uint16(x86_xMatch), - /*10586*/ uint16(x86_xCondByte), 1, - 0xF8, 10628, - /*10590*/ uint16(x86_xCondSlashR), - 10599, // 0 - 0, // 1 - 0, // 2 - 0, // 3 - 0, // 4 - 0, // 5 - 0, // 6 - 0, // 7 - /*10599*/ uint16(x86_xCondIs64), 10602, 10618, - /*10602*/ uint16(x86_xCondDataSize), 10606, 10612, 0, - /*10606*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*10608*/ uint16(x86_xReadIw), - /*10609*/ uint16(x86_xArgRM16), - /*10610*/ uint16(x86_xArgImm16), - /*10611*/ uint16(x86_xMatch), - /*10612*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*10614*/ uint16(x86_xReadId), - /*10615*/ uint16(x86_xArgRM32), - /*10616*/ uint16(x86_xArgImm32), - /*10617*/ uint16(x86_xMatch), - /*10618*/ uint16(x86_xCondDataSize), 10606, 10612, 10622, - /*10622*/ uint16(x86_xSetOp), uint16(x86_MOV), - /*10624*/ uint16(x86_xReadId), - /*10625*/ uint16(x86_xArgRM64), - /*10626*/ uint16(x86_xArgImm32), - /*10627*/ uint16(x86_xMatch), - /*10628*/ uint16(x86_xCondDataSize), 10632, 10637, 10642, - /*10632*/ uint16(x86_xSetOp), uint16(x86_XBEGIN), - /*10634*/ uint16(x86_xReadCw), - /*10635*/ uint16(x86_xArgRel16), - /*10636*/ uint16(x86_xMatch), - /*10637*/ uint16(x86_xSetOp), uint16(x86_XBEGIN), - /*10639*/ uint16(x86_xReadCd), - /*10640*/ uint16(x86_xArgRel32), - /*10641*/ uint16(x86_xMatch), - /*10642*/ uint16(x86_xSetOp), uint16(x86_XBEGIN), - /*10644*/ uint16(x86_xReadCd), - /*10645*/ uint16(x86_xArgRel32), - /*10646*/ uint16(x86_xMatch), - /*10647*/ uint16(x86_xSetOp), uint16(x86_ENTER), - /*10649*/ uint16(x86_xReadIw), - /*10650*/ uint16(x86_xReadIb), - /*10651*/ uint16(x86_xArgImm16u), - /*10652*/ uint16(x86_xArgImm8u), - /*10653*/ uint16(x86_xMatch), - /*10654*/ uint16(x86_xCondIs64), 10657, 10667, - /*10657*/ uint16(x86_xCondDataSize), 10661, 10664, 0, - /*10661*/ uint16(x86_xSetOp), uint16(x86_LEAVE), - /*10663*/ uint16(x86_xMatch), - /*10664*/ uint16(x86_xSetOp), uint16(x86_LEAVE), - /*10666*/ uint16(x86_xMatch), - /*10667*/ uint16(x86_xCondDataSize), 10661, 10671, 10674, - /*10671*/ uint16(x86_xSetOp), uint16(x86_LEAVE), - /*10673*/ uint16(x86_xMatch), - /*10674*/ uint16(x86_xSetOp), uint16(x86_LEAVE), - /*10676*/ uint16(x86_xMatch), - /*10677*/ uint16(x86_xSetOp), uint16(x86_LRET), - /*10679*/ uint16(x86_xReadIw), - /*10680*/ uint16(x86_xArgImm16u), - /*10681*/ uint16(x86_xMatch), - /*10682*/ uint16(x86_xSetOp), uint16(x86_LRET), - /*10684*/ uint16(x86_xMatch), - /*10685*/ uint16(x86_xSetOp), uint16(x86_INT), - /*10687*/ uint16(x86_xArg3), - /*10688*/ uint16(x86_xMatch), - /*10689*/ uint16(x86_xSetOp), uint16(x86_INT), - /*10691*/ uint16(x86_xReadIb), - /*10692*/ uint16(x86_xArgImm8u), - /*10693*/ uint16(x86_xMatch), - /*10694*/ uint16(x86_xCondIs64), 10697, 0, - /*10697*/ uint16(x86_xSetOp), uint16(x86_INTO), - /*10699*/ uint16(x86_xMatch), - /*10700*/ uint16(x86_xCondIs64), 10703, 10713, - /*10703*/ uint16(x86_xCondDataSize), 10707, 10710, 0, - /*10707*/ uint16(x86_xSetOp), uint16(x86_IRET), - /*10709*/ uint16(x86_xMatch), - /*10710*/ uint16(x86_xSetOp), uint16(x86_IRETD), - /*10712*/ uint16(x86_xMatch), - /*10713*/ uint16(x86_xCondDataSize), 10707, 10710, 10717, - /*10717*/ uint16(x86_xSetOp), uint16(x86_IRETQ), - /*10719*/ uint16(x86_xMatch), - /*10720*/ uint16(x86_xCondSlashR), - 10729, // 0 - 10734, // 1 - 10739, // 2 - 10744, // 3 - 10749, // 4 - 10754, // 5 - 0, // 6 - 10759, // 7 - /*10729*/ uint16(x86_xSetOp), uint16(x86_ROL), - /*10731*/ uint16(x86_xArgRM8), - /*10732*/ uint16(x86_xArg1), - /*10733*/ uint16(x86_xMatch), - /*10734*/ uint16(x86_xSetOp), uint16(x86_ROR), - /*10736*/ uint16(x86_xArgRM8), - /*10737*/ uint16(x86_xArg1), - /*10738*/ uint16(x86_xMatch), - /*10739*/ uint16(x86_xSetOp), uint16(x86_RCL), - /*10741*/ uint16(x86_xArgRM8), - /*10742*/ uint16(x86_xArg1), - /*10743*/ uint16(x86_xMatch), - /*10744*/ uint16(x86_xSetOp), uint16(x86_RCR), - /*10746*/ uint16(x86_xArgRM8), - /*10747*/ uint16(x86_xArg1), - /*10748*/ uint16(x86_xMatch), - /*10749*/ uint16(x86_xSetOp), uint16(x86_SHL), - /*10751*/ uint16(x86_xArgRM8), - /*10752*/ uint16(x86_xArg1), - /*10753*/ uint16(x86_xMatch), - /*10754*/ uint16(x86_xSetOp), uint16(x86_SHR), - /*10756*/ uint16(x86_xArgRM8), - /*10757*/ uint16(x86_xArg1), - /*10758*/ uint16(x86_xMatch), - /*10759*/ uint16(x86_xSetOp), uint16(x86_SAR), - /*10761*/ uint16(x86_xArgRM8), - /*10762*/ uint16(x86_xArg1), - /*10763*/ uint16(x86_xMatch), - /*10764*/ uint16(x86_xCondSlashR), - 10773, // 0 - 10799, // 1 - 10825, // 2 - 10851, // 3 - 10877, // 4 - 10903, // 5 - 0, // 6 - 10929, // 7 - /*10773*/ uint16(x86_xCondIs64), 10776, 10790, - /*10776*/ uint16(x86_xCondDataSize), 10780, 10785, 0, - /*10780*/ uint16(x86_xSetOp), uint16(x86_ROL), - /*10782*/ uint16(x86_xArgRM16), - /*10783*/ uint16(x86_xArg1), - /*10784*/ uint16(x86_xMatch), - /*10785*/ uint16(x86_xSetOp), uint16(x86_ROL), - /*10787*/ uint16(x86_xArgRM32), - /*10788*/ uint16(x86_xArg1), - /*10789*/ uint16(x86_xMatch), - /*10790*/ uint16(x86_xCondDataSize), 10780, 10785, 10794, - /*10794*/ uint16(x86_xSetOp), uint16(x86_ROL), - /*10796*/ uint16(x86_xArgRM64), - /*10797*/ uint16(x86_xArg1), - /*10798*/ uint16(x86_xMatch), - /*10799*/ uint16(x86_xCondIs64), 10802, 10816, - /*10802*/ uint16(x86_xCondDataSize), 10806, 10811, 0, - /*10806*/ uint16(x86_xSetOp), uint16(x86_ROR), - /*10808*/ uint16(x86_xArgRM16), - /*10809*/ uint16(x86_xArg1), - /*10810*/ uint16(x86_xMatch), - /*10811*/ uint16(x86_xSetOp), uint16(x86_ROR), - /*10813*/ uint16(x86_xArgRM32), - /*10814*/ uint16(x86_xArg1), - /*10815*/ uint16(x86_xMatch), - /*10816*/ uint16(x86_xCondDataSize), 10806, 10811, 10820, - /*10820*/ uint16(x86_xSetOp), uint16(x86_ROR), - /*10822*/ uint16(x86_xArgRM64), - /*10823*/ uint16(x86_xArg1), - /*10824*/ uint16(x86_xMatch), - /*10825*/ uint16(x86_xCondIs64), 10828, 10842, - /*10828*/ uint16(x86_xCondDataSize), 10832, 10837, 0, - /*10832*/ uint16(x86_xSetOp), uint16(x86_RCL), - /*10834*/ uint16(x86_xArgRM16), - /*10835*/ uint16(x86_xArg1), - /*10836*/ uint16(x86_xMatch), - /*10837*/ uint16(x86_xSetOp), uint16(x86_RCL), - /*10839*/ uint16(x86_xArgRM32), - /*10840*/ uint16(x86_xArg1), - /*10841*/ uint16(x86_xMatch), - /*10842*/ uint16(x86_xCondDataSize), 10832, 10837, 10846, - /*10846*/ uint16(x86_xSetOp), uint16(x86_RCL), - /*10848*/ uint16(x86_xArgRM64), - /*10849*/ uint16(x86_xArg1), - /*10850*/ uint16(x86_xMatch), - /*10851*/ uint16(x86_xCondIs64), 10854, 10868, - /*10854*/ uint16(x86_xCondDataSize), 10858, 10863, 0, - /*10858*/ uint16(x86_xSetOp), uint16(x86_RCR), - /*10860*/ uint16(x86_xArgRM16), - /*10861*/ uint16(x86_xArg1), - /*10862*/ uint16(x86_xMatch), - /*10863*/ uint16(x86_xSetOp), uint16(x86_RCR), - /*10865*/ uint16(x86_xArgRM32), - /*10866*/ uint16(x86_xArg1), - /*10867*/ uint16(x86_xMatch), - /*10868*/ uint16(x86_xCondDataSize), 10858, 10863, 10872, - /*10872*/ uint16(x86_xSetOp), uint16(x86_RCR), - /*10874*/ uint16(x86_xArgRM64), - /*10875*/ uint16(x86_xArg1), - /*10876*/ uint16(x86_xMatch), - /*10877*/ uint16(x86_xCondIs64), 10880, 10894, - /*10880*/ uint16(x86_xCondDataSize), 10884, 10889, 0, - /*10884*/ uint16(x86_xSetOp), uint16(x86_SHL), - /*10886*/ uint16(x86_xArgRM16), - /*10887*/ uint16(x86_xArg1), - /*10888*/ uint16(x86_xMatch), - /*10889*/ uint16(x86_xSetOp), uint16(x86_SHL), - /*10891*/ uint16(x86_xArgRM32), - /*10892*/ uint16(x86_xArg1), - /*10893*/ uint16(x86_xMatch), - /*10894*/ uint16(x86_xCondDataSize), 10884, 10889, 10898, - /*10898*/ uint16(x86_xSetOp), uint16(x86_SHL), - /*10900*/ uint16(x86_xArgRM64), - /*10901*/ uint16(x86_xArg1), - /*10902*/ uint16(x86_xMatch), - /*10903*/ uint16(x86_xCondIs64), 10906, 10920, - /*10906*/ uint16(x86_xCondDataSize), 10910, 10915, 0, - /*10910*/ uint16(x86_xSetOp), uint16(x86_SHR), - /*10912*/ uint16(x86_xArgRM16), - /*10913*/ uint16(x86_xArg1), - /*10914*/ uint16(x86_xMatch), - /*10915*/ uint16(x86_xSetOp), uint16(x86_SHR), - /*10917*/ uint16(x86_xArgRM32), - /*10918*/ uint16(x86_xArg1), - /*10919*/ uint16(x86_xMatch), - /*10920*/ uint16(x86_xCondDataSize), 10910, 10915, 10924, - /*10924*/ uint16(x86_xSetOp), uint16(x86_SHR), - /*10926*/ uint16(x86_xArgRM64), - /*10927*/ uint16(x86_xArg1), - /*10928*/ uint16(x86_xMatch), - /*10929*/ uint16(x86_xCondIs64), 10932, 10946, - /*10932*/ uint16(x86_xCondDataSize), 10936, 10941, 0, - /*10936*/ uint16(x86_xSetOp), uint16(x86_SAR), - /*10938*/ uint16(x86_xArgRM16), - /*10939*/ uint16(x86_xArg1), - /*10940*/ uint16(x86_xMatch), - /*10941*/ uint16(x86_xSetOp), uint16(x86_SAR), - /*10943*/ uint16(x86_xArgRM32), - /*10944*/ uint16(x86_xArg1), - /*10945*/ uint16(x86_xMatch), - /*10946*/ uint16(x86_xCondDataSize), 10936, 10941, 10950, - /*10950*/ uint16(x86_xSetOp), uint16(x86_SAR), - /*10952*/ uint16(x86_xArgRM64), - /*10953*/ uint16(x86_xArg1), - /*10954*/ uint16(x86_xMatch), - /*10955*/ uint16(x86_xCondSlashR), - 10964, // 0 - 10969, // 1 - 10974, // 2 - 10979, // 3 - 10984, // 4 - 10989, // 5 - 0, // 6 - 10994, // 7 - /*10964*/ uint16(x86_xSetOp), uint16(x86_ROL), - /*10966*/ uint16(x86_xArgRM8), - /*10967*/ uint16(x86_xArgCL), - /*10968*/ uint16(x86_xMatch), - /*10969*/ uint16(x86_xSetOp), uint16(x86_ROR), - /*10971*/ uint16(x86_xArgRM8), - /*10972*/ uint16(x86_xArgCL), - /*10973*/ uint16(x86_xMatch), - /*10974*/ uint16(x86_xSetOp), uint16(x86_RCL), - /*10976*/ uint16(x86_xArgRM8), - /*10977*/ uint16(x86_xArgCL), - /*10978*/ uint16(x86_xMatch), - /*10979*/ uint16(x86_xSetOp), uint16(x86_RCR), - /*10981*/ uint16(x86_xArgRM8), - /*10982*/ uint16(x86_xArgCL), - /*10983*/ uint16(x86_xMatch), - /*10984*/ uint16(x86_xSetOp), uint16(x86_SHL), - /*10986*/ uint16(x86_xArgRM8), - /*10987*/ uint16(x86_xArgCL), - /*10988*/ uint16(x86_xMatch), - /*10989*/ uint16(x86_xSetOp), uint16(x86_SHR), - /*10991*/ uint16(x86_xArgRM8), - /*10992*/ uint16(x86_xArgCL), - /*10993*/ uint16(x86_xMatch), - /*10994*/ uint16(x86_xSetOp), uint16(x86_SAR), - /*10996*/ uint16(x86_xArgRM8), - /*10997*/ uint16(x86_xArgCL), - /*10998*/ uint16(x86_xMatch), - /*10999*/ uint16(x86_xCondSlashR), - 11008, // 0 - 11034, // 1 - 11060, // 2 - 11086, // 3 - 11112, // 4 - 11138, // 5 - 0, // 6 - 11164, // 7 - /*11008*/ uint16(x86_xCondIs64), 11011, 11025, - /*11011*/ uint16(x86_xCondDataSize), 11015, 11020, 0, - /*11015*/ uint16(x86_xSetOp), uint16(x86_ROL), - /*11017*/ uint16(x86_xArgRM16), - /*11018*/ uint16(x86_xArgCL), - /*11019*/ uint16(x86_xMatch), - /*11020*/ uint16(x86_xSetOp), uint16(x86_ROL), - /*11022*/ uint16(x86_xArgRM32), - /*11023*/ uint16(x86_xArgCL), - /*11024*/ uint16(x86_xMatch), - /*11025*/ uint16(x86_xCondDataSize), 11015, 11020, 11029, - /*11029*/ uint16(x86_xSetOp), uint16(x86_ROL), - /*11031*/ uint16(x86_xArgRM64), - /*11032*/ uint16(x86_xArgCL), - /*11033*/ uint16(x86_xMatch), - /*11034*/ uint16(x86_xCondIs64), 11037, 11051, - /*11037*/ uint16(x86_xCondDataSize), 11041, 11046, 0, - /*11041*/ uint16(x86_xSetOp), uint16(x86_ROR), - /*11043*/ uint16(x86_xArgRM16), - /*11044*/ uint16(x86_xArgCL), - /*11045*/ uint16(x86_xMatch), - /*11046*/ uint16(x86_xSetOp), uint16(x86_ROR), - /*11048*/ uint16(x86_xArgRM32), - /*11049*/ uint16(x86_xArgCL), - /*11050*/ uint16(x86_xMatch), - /*11051*/ uint16(x86_xCondDataSize), 11041, 11046, 11055, - /*11055*/ uint16(x86_xSetOp), uint16(x86_ROR), - /*11057*/ uint16(x86_xArgRM64), - /*11058*/ uint16(x86_xArgCL), - /*11059*/ uint16(x86_xMatch), - /*11060*/ uint16(x86_xCondIs64), 11063, 11077, - /*11063*/ uint16(x86_xCondDataSize), 11067, 11072, 0, - /*11067*/ uint16(x86_xSetOp), uint16(x86_RCL), - /*11069*/ uint16(x86_xArgRM16), - /*11070*/ uint16(x86_xArgCL), - /*11071*/ uint16(x86_xMatch), - /*11072*/ uint16(x86_xSetOp), uint16(x86_RCL), - /*11074*/ uint16(x86_xArgRM32), - /*11075*/ uint16(x86_xArgCL), - /*11076*/ uint16(x86_xMatch), - /*11077*/ uint16(x86_xCondDataSize), 11067, 11072, 11081, - /*11081*/ uint16(x86_xSetOp), uint16(x86_RCL), - /*11083*/ uint16(x86_xArgRM64), - /*11084*/ uint16(x86_xArgCL), - /*11085*/ uint16(x86_xMatch), - /*11086*/ uint16(x86_xCondIs64), 11089, 11103, - /*11089*/ uint16(x86_xCondDataSize), 11093, 11098, 0, - /*11093*/ uint16(x86_xSetOp), uint16(x86_RCR), - /*11095*/ uint16(x86_xArgRM16), - /*11096*/ uint16(x86_xArgCL), - /*11097*/ uint16(x86_xMatch), - /*11098*/ uint16(x86_xSetOp), uint16(x86_RCR), - /*11100*/ uint16(x86_xArgRM32), - /*11101*/ uint16(x86_xArgCL), - /*11102*/ uint16(x86_xMatch), - /*11103*/ uint16(x86_xCondDataSize), 11093, 11098, 11107, - /*11107*/ uint16(x86_xSetOp), uint16(x86_RCR), - /*11109*/ uint16(x86_xArgRM64), - /*11110*/ uint16(x86_xArgCL), - /*11111*/ uint16(x86_xMatch), - /*11112*/ uint16(x86_xCondIs64), 11115, 11129, - /*11115*/ uint16(x86_xCondDataSize), 11119, 11124, 0, - /*11119*/ uint16(x86_xSetOp), uint16(x86_SHL), - /*11121*/ uint16(x86_xArgRM16), - /*11122*/ uint16(x86_xArgCL), - /*11123*/ uint16(x86_xMatch), - /*11124*/ uint16(x86_xSetOp), uint16(x86_SHL), - /*11126*/ uint16(x86_xArgRM32), - /*11127*/ uint16(x86_xArgCL), - /*11128*/ uint16(x86_xMatch), - /*11129*/ uint16(x86_xCondDataSize), 11119, 11124, 11133, - /*11133*/ uint16(x86_xSetOp), uint16(x86_SHL), - /*11135*/ uint16(x86_xArgRM64), - /*11136*/ uint16(x86_xArgCL), - /*11137*/ uint16(x86_xMatch), - /*11138*/ uint16(x86_xCondIs64), 11141, 11155, - /*11141*/ uint16(x86_xCondDataSize), 11145, 11150, 0, - /*11145*/ uint16(x86_xSetOp), uint16(x86_SHR), - /*11147*/ uint16(x86_xArgRM16), - /*11148*/ uint16(x86_xArgCL), - /*11149*/ uint16(x86_xMatch), - /*11150*/ uint16(x86_xSetOp), uint16(x86_SHR), - /*11152*/ uint16(x86_xArgRM32), - /*11153*/ uint16(x86_xArgCL), - /*11154*/ uint16(x86_xMatch), - /*11155*/ uint16(x86_xCondDataSize), 11145, 11150, 11159, - /*11159*/ uint16(x86_xSetOp), uint16(x86_SHR), - /*11161*/ uint16(x86_xArgRM64), - /*11162*/ uint16(x86_xArgCL), - /*11163*/ uint16(x86_xMatch), - /*11164*/ uint16(x86_xCondIs64), 11167, 11181, - /*11167*/ uint16(x86_xCondDataSize), 11171, 11176, 0, - /*11171*/ uint16(x86_xSetOp), uint16(x86_SAR), - /*11173*/ uint16(x86_xArgRM16), - /*11174*/ uint16(x86_xArgCL), - /*11175*/ uint16(x86_xMatch), - /*11176*/ uint16(x86_xSetOp), uint16(x86_SAR), - /*11178*/ uint16(x86_xArgRM32), - /*11179*/ uint16(x86_xArgCL), - /*11180*/ uint16(x86_xMatch), - /*11181*/ uint16(x86_xCondDataSize), 11171, 11176, 11185, - /*11185*/ uint16(x86_xSetOp), uint16(x86_SAR), - /*11187*/ uint16(x86_xArgRM64), - /*11188*/ uint16(x86_xArgCL), - /*11189*/ uint16(x86_xMatch), - /*11190*/ uint16(x86_xCondIs64), 11193, 0, - /*11193*/ uint16(x86_xSetOp), uint16(x86_AAM), - /*11195*/ uint16(x86_xReadIb), - /*11196*/ uint16(x86_xArgImm8u), - /*11197*/ uint16(x86_xMatch), - /*11198*/ uint16(x86_xCondIs64), 11201, 0, - /*11201*/ uint16(x86_xSetOp), uint16(x86_AAD), - /*11203*/ uint16(x86_xReadIb), - /*11204*/ uint16(x86_xArgImm8u), - /*11205*/ uint16(x86_xMatch), - /*11206*/ uint16(x86_xCondIs64), 11209, 11212, - /*11209*/ uint16(x86_xSetOp), uint16(x86_XLATB), - /*11211*/ uint16(x86_xMatch), - /*11212*/ uint16(x86_xCondDataSize), 11209, 11209, 11216, - /*11216*/ uint16(x86_xSetOp), uint16(x86_XLATB), - /*11218*/ uint16(x86_xMatch), - /*11219*/ uint16(x86_xCondByte), 64, - 0xc0, 11390, - 0xc1, 11390, - 0xc2, 11390, - 0xc3, 11390, - 0xc4, 11390, - 0xc5, 11390, - 0xc6, 11390, - 0xc7, 11390, - 0xc8, 11395, - 0xc9, 11395, - 0xca, 11395, - 0xcb, 11395, - 0xcc, 11395, - 0xcd, 11395, - 0xce, 11395, - 0xcf, 11395, - 0xd0, 11400, - 0xd1, 11400, - 0xd2, 11400, - 0xd3, 11400, - 0xd4, 11400, - 0xd5, 11400, - 0xd6, 11400, - 0xd7, 11400, - 0xd8, 11404, - 0xd9, 11404, - 0xda, 11404, - 0xdb, 11404, - 0xdc, 11404, - 0xdd, 11404, - 0xde, 11404, - 0xdf, 11404, - 0xe0, 11408, - 0xe1, 11408, - 0xe2, 11408, - 0xe3, 11408, - 0xe4, 11408, - 0xe5, 11408, - 0xe6, 11408, - 0xe7, 11408, - 0xe8, 11413, - 0xe9, 11413, - 0xea, 11413, - 0xeb, 11413, - 0xec, 11413, - 0xed, 11413, - 0xee, 11413, - 0xef, 11413, - 0xf0, 11418, - 0xf1, 11418, - 0xf2, 11418, - 0xf3, 11418, - 0xf4, 11418, - 0xf5, 11418, - 0xf6, 11418, - 0xf7, 11418, - 0xf8, 11423, - 0xf9, 11423, - 0xfa, 11423, - 0xfb, 11423, - 0xfc, 11423, - 0xfd, 11423, - 0xfe, 11423, - 0xff, 11423, - /*11349*/ uint16(x86_xCondSlashR), - 11358, // 0 - 11362, // 1 - 11366, // 2 - 11370, // 3 - 11374, // 4 - 11378, // 5 - 11382, // 6 - 11386, // 7 - /*11358*/ uint16(x86_xSetOp), uint16(x86_FADD), - /*11360*/ uint16(x86_xArgM32fp), - /*11361*/ uint16(x86_xMatch), - /*11362*/ uint16(x86_xSetOp), uint16(x86_FMUL), - /*11364*/ uint16(x86_xArgM32fp), - /*11365*/ uint16(x86_xMatch), - /*11366*/ uint16(x86_xSetOp), uint16(x86_FCOM), - /*11368*/ uint16(x86_xArgM32fp), - /*11369*/ uint16(x86_xMatch), - /*11370*/ uint16(x86_xSetOp), uint16(x86_FCOMP), - /*11372*/ uint16(x86_xArgM32fp), - /*11373*/ uint16(x86_xMatch), - /*11374*/ uint16(x86_xSetOp), uint16(x86_FSUB), - /*11376*/ uint16(x86_xArgM32fp), - /*11377*/ uint16(x86_xMatch), - /*11378*/ uint16(x86_xSetOp), uint16(x86_FSUBR), - /*11380*/ uint16(x86_xArgM32fp), - /*11381*/ uint16(x86_xMatch), - /*11382*/ uint16(x86_xSetOp), uint16(x86_FDIV), - /*11384*/ uint16(x86_xArgM32fp), - /*11385*/ uint16(x86_xMatch), - /*11386*/ uint16(x86_xSetOp), uint16(x86_FDIVR), - /*11388*/ uint16(x86_xArgM32fp), - /*11389*/ uint16(x86_xMatch), - /*11390*/ uint16(x86_xSetOp), uint16(x86_FADD), - /*11392*/ uint16(x86_xArgST), - /*11393*/ uint16(x86_xArgSTi), - /*11394*/ uint16(x86_xMatch), - /*11395*/ uint16(x86_xSetOp), uint16(x86_FMUL), - /*11397*/ uint16(x86_xArgST), - /*11398*/ uint16(x86_xArgSTi), - /*11399*/ uint16(x86_xMatch), - /*11400*/ uint16(x86_xSetOp), uint16(x86_FCOM), - /*11402*/ uint16(x86_xArgSTi), - /*11403*/ uint16(x86_xMatch), - /*11404*/ uint16(x86_xSetOp), uint16(x86_FCOMP), - /*11406*/ uint16(x86_xArgSTi), - /*11407*/ uint16(x86_xMatch), - /*11408*/ uint16(x86_xSetOp), uint16(x86_FSUB), - /*11410*/ uint16(x86_xArgST), - /*11411*/ uint16(x86_xArgSTi), - /*11412*/ uint16(x86_xMatch), - /*11413*/ uint16(x86_xSetOp), uint16(x86_FSUBR), - /*11415*/ uint16(x86_xArgST), - /*11416*/ uint16(x86_xArgSTi), - /*11417*/ uint16(x86_xMatch), - /*11418*/ uint16(x86_xSetOp), uint16(x86_FDIV), - /*11420*/ uint16(x86_xArgST), - /*11421*/ uint16(x86_xArgSTi), - /*11422*/ uint16(x86_xMatch), - /*11423*/ uint16(x86_xSetOp), uint16(x86_FDIVR), - /*11425*/ uint16(x86_xArgST), - /*11426*/ uint16(x86_xArgSTi), - /*11427*/ uint16(x86_xMatch), - /*11428*/ uint16(x86_xCondByte), 42, - 0xc0, 11551, - 0xc1, 11551, - 0xc2, 11551, - 0xc3, 11551, - 0xc4, 11551, - 0xc5, 11551, - 0xc6, 11551, - 0xc7, 11551, - 0xc8, 11555, - 0xc9, 11555, - 0xca, 11555, - 0xcb, 11555, - 0xcc, 11555, - 0xcd, 11555, - 0xce, 11555, - 0xcf, 11555, - 0xD0, 11559, - 0xE0, 11562, - 0xE1, 11565, - 0xE4, 11568, - 0xE5, 11571, - 0xE8, 11574, - 0xE9, 11577, - 0xEA, 11580, - 0xEB, 11583, - 0xEC, 11586, - 0xF0, 11589, - 0xF1, 11592, - 0xF2, 11595, - 0xF3, 11598, - 0xF4, 11601, - 0xF5, 11604, - 0xF6, 11607, - 0xF7, 11610, - 0xF8, 11613, - 0xF9, 11616, - 0xFA, 11619, - 0xFB, 11622, - 0xFC, 11625, - 0xFD, 11628, - 0xFE, 11631, - 0xFF, 11634, - /*11514*/ uint16(x86_xCondSlashR), - 11523, // 0 - 0, // 1 - 11527, // 2 - 11531, // 3 - 11535, // 4 - 11539, // 5 - 11543, // 6 - 11547, // 7 - /*11523*/ uint16(x86_xSetOp), uint16(x86_FLD), - /*11525*/ uint16(x86_xArgM32fp), - /*11526*/ uint16(x86_xMatch), - /*11527*/ uint16(x86_xSetOp), uint16(x86_FST), - /*11529*/ uint16(x86_xArgM32fp), - /*11530*/ uint16(x86_xMatch), - /*11531*/ uint16(x86_xSetOp), uint16(x86_FSTP), - /*11533*/ uint16(x86_xArgM32fp), - /*11534*/ uint16(x86_xMatch), - /*11535*/ uint16(x86_xSetOp), uint16(x86_FLDENV), - /*11537*/ uint16(x86_xArgM1428byte), - /*11538*/ uint16(x86_xMatch), - /*11539*/ uint16(x86_xSetOp), uint16(x86_FLDCW), - /*11541*/ uint16(x86_xArgM2byte), - /*11542*/ uint16(x86_xMatch), - /*11543*/ uint16(x86_xSetOp), uint16(x86_FNSTENV), - /*11545*/ uint16(x86_xArgM1428byte), - /*11546*/ uint16(x86_xMatch), - /*11547*/ uint16(x86_xSetOp), uint16(x86_FNSTCW), - /*11549*/ uint16(x86_xArgM2byte), - /*11550*/ uint16(x86_xMatch), - /*11551*/ uint16(x86_xSetOp), uint16(x86_FLD), - /*11553*/ uint16(x86_xArgSTi), - /*11554*/ uint16(x86_xMatch), - /*11555*/ uint16(x86_xSetOp), uint16(x86_FXCH), - /*11557*/ uint16(x86_xArgSTi), - /*11558*/ uint16(x86_xMatch), - /*11559*/ uint16(x86_xSetOp), uint16(x86_FNOP), - /*11561*/ uint16(x86_xMatch), - /*11562*/ uint16(x86_xSetOp), uint16(x86_FCHS), - /*11564*/ uint16(x86_xMatch), - /*11565*/ uint16(x86_xSetOp), uint16(x86_FABS), - /*11567*/ uint16(x86_xMatch), - /*11568*/ uint16(x86_xSetOp), uint16(x86_FTST), - /*11570*/ uint16(x86_xMatch), - /*11571*/ uint16(x86_xSetOp), uint16(x86_FXAM), - /*11573*/ uint16(x86_xMatch), - /*11574*/ uint16(x86_xSetOp), uint16(x86_FLD1), - /*11576*/ uint16(x86_xMatch), - /*11577*/ uint16(x86_xSetOp), uint16(x86_FLDL2T), - /*11579*/ uint16(x86_xMatch), - /*11580*/ uint16(x86_xSetOp), uint16(x86_FLDL2E), - /*11582*/ uint16(x86_xMatch), - /*11583*/ uint16(x86_xSetOp), uint16(x86_FLDPI), - /*11585*/ uint16(x86_xMatch), - /*11586*/ uint16(x86_xSetOp), uint16(x86_FLDLG2), - /*11588*/ uint16(x86_xMatch), - /*11589*/ uint16(x86_xSetOp), uint16(x86_F2XM1), - /*11591*/ uint16(x86_xMatch), - /*11592*/ uint16(x86_xSetOp), uint16(x86_FYL2X), - /*11594*/ uint16(x86_xMatch), - /*11595*/ uint16(x86_xSetOp), uint16(x86_FPTAN), - /*11597*/ uint16(x86_xMatch), - /*11598*/ uint16(x86_xSetOp), uint16(x86_FPATAN), - /*11600*/ uint16(x86_xMatch), - /*11601*/ uint16(x86_xSetOp), uint16(x86_FXTRACT), - /*11603*/ uint16(x86_xMatch), - /*11604*/ uint16(x86_xSetOp), uint16(x86_FPREM1), - /*11606*/ uint16(x86_xMatch), - /*11607*/ uint16(x86_xSetOp), uint16(x86_FDECSTP), - /*11609*/ uint16(x86_xMatch), - /*11610*/ uint16(x86_xSetOp), uint16(x86_FINCSTP), - /*11612*/ uint16(x86_xMatch), - /*11613*/ uint16(x86_xSetOp), uint16(x86_FPREM), - /*11615*/ uint16(x86_xMatch), - /*11616*/ uint16(x86_xSetOp), uint16(x86_FYL2XP1), - /*11618*/ uint16(x86_xMatch), - /*11619*/ uint16(x86_xSetOp), uint16(x86_FSQRT), - /*11621*/ uint16(x86_xMatch), - /*11622*/ uint16(x86_xSetOp), uint16(x86_FSINCOS), - /*11624*/ uint16(x86_xMatch), - /*11625*/ uint16(x86_xSetOp), uint16(x86_FRNDINT), - /*11627*/ uint16(x86_xMatch), - /*11628*/ uint16(x86_xSetOp), uint16(x86_FSCALE), - /*11630*/ uint16(x86_xMatch), - /*11631*/ uint16(x86_xSetOp), uint16(x86_FSIN), - /*11633*/ uint16(x86_xMatch), - /*11634*/ uint16(x86_xSetOp), uint16(x86_FCOS), - /*11636*/ uint16(x86_xMatch), - /*11637*/ uint16(x86_xCondByte), 33, - 0xc0, 11746, - 0xc1, 11746, - 0xc2, 11746, - 0xc3, 11746, - 0xc4, 11746, - 0xc5, 11746, - 0xc6, 11746, - 0xc7, 11746, - 0xc8, 11751, - 0xc9, 11751, - 0xca, 11751, - 0xcb, 11751, - 0xcc, 11751, - 0xcd, 11751, - 0xce, 11751, - 0xcf, 11751, - 0xd0, 11756, - 0xd1, 11756, - 0xd2, 11756, - 0xd3, 11756, - 0xd4, 11756, - 0xd5, 11756, - 0xd6, 11756, - 0xd7, 11756, - 0xd8, 11761, - 0xd9, 11761, - 0xda, 11761, - 0xdb, 11761, - 0xdc, 11761, - 0xdd, 11761, - 0xde, 11761, - 0xdf, 11761, - 0xE9, 11766, - /*11705*/ uint16(x86_xCondSlashR), - 11714, // 0 - 11718, // 1 - 11722, // 2 - 11726, // 3 - 11730, // 4 - 11734, // 5 - 11738, // 6 - 11742, // 7 - /*11714*/ uint16(x86_xSetOp), uint16(x86_FIADD), - /*11716*/ uint16(x86_xArgM32int), - /*11717*/ uint16(x86_xMatch), - /*11718*/ uint16(x86_xSetOp), uint16(x86_FIMUL), - /*11720*/ uint16(x86_xArgM32int), - /*11721*/ uint16(x86_xMatch), - /*11722*/ uint16(x86_xSetOp), uint16(x86_FICOM), - /*11724*/ uint16(x86_xArgM32int), - /*11725*/ uint16(x86_xMatch), - /*11726*/ uint16(x86_xSetOp), uint16(x86_FICOMP), - /*11728*/ uint16(x86_xArgM32int), - /*11729*/ uint16(x86_xMatch), - /*11730*/ uint16(x86_xSetOp), uint16(x86_FISUB), - /*11732*/ uint16(x86_xArgM32int), - /*11733*/ uint16(x86_xMatch), - /*11734*/ uint16(x86_xSetOp), uint16(x86_FISUBR), - /*11736*/ uint16(x86_xArgM32int), - /*11737*/ uint16(x86_xMatch), - /*11738*/ uint16(x86_xSetOp), uint16(x86_FIDIV), - /*11740*/ uint16(x86_xArgM32int), - /*11741*/ uint16(x86_xMatch), - /*11742*/ uint16(x86_xSetOp), uint16(x86_FIDIVR), - /*11744*/ uint16(x86_xArgM32int), - /*11745*/ uint16(x86_xMatch), - /*11746*/ uint16(x86_xSetOp), uint16(x86_FCMOVB), - /*11748*/ uint16(x86_xArgST), - /*11749*/ uint16(x86_xArgSTi), - /*11750*/ uint16(x86_xMatch), - /*11751*/ uint16(x86_xSetOp), uint16(x86_FCMOVE), - /*11753*/ uint16(x86_xArgST), - /*11754*/ uint16(x86_xArgSTi), - /*11755*/ uint16(x86_xMatch), - /*11756*/ uint16(x86_xSetOp), uint16(x86_FCMOVBE), - /*11758*/ uint16(x86_xArgST), - /*11759*/ uint16(x86_xArgSTi), - /*11760*/ uint16(x86_xMatch), - /*11761*/ uint16(x86_xSetOp), uint16(x86_FCMOVU), - /*11763*/ uint16(x86_xArgST), - /*11764*/ uint16(x86_xArgSTi), - /*11765*/ uint16(x86_xMatch), - /*11766*/ uint16(x86_xSetOp), uint16(x86_FUCOMPP), - /*11768*/ uint16(x86_xMatch), - /*11769*/ uint16(x86_xCondByte), 50, - 0xc0, 11904, - 0xc1, 11904, - 0xc2, 11904, - 0xc3, 11904, - 0xc4, 11904, - 0xc5, 11904, - 0xc6, 11904, - 0xc7, 11904, - 0xc8, 11909, - 0xc9, 11909, - 0xca, 11909, - 0xcb, 11909, - 0xcc, 11909, - 0xcd, 11909, - 0xce, 11909, - 0xcf, 11909, - 0xd0, 11914, - 0xd1, 11914, - 0xd2, 11914, - 0xd3, 11914, - 0xd4, 11914, - 0xd5, 11914, - 0xd6, 11914, - 0xd7, 11914, - 0xd8, 11919, - 0xd9, 11919, - 0xda, 11919, - 0xdb, 11919, - 0xdc, 11919, - 0xdd, 11919, - 0xde, 11919, - 0xdf, 11919, - 0xE2, 11924, - 0xE3, 11927, - 0xe8, 11930, - 0xe9, 11930, - 0xea, 11930, - 0xeb, 11930, - 0xec, 11930, - 0xed, 11930, - 0xee, 11930, - 0xef, 11930, - 0xf0, 11935, - 0xf1, 11935, - 0xf2, 11935, - 0xf3, 11935, - 0xf4, 11935, - 0xf5, 11935, - 0xf6, 11935, - 0xf7, 11935, - /*11871*/ uint16(x86_xCondSlashR), - 11880, // 0 - 11884, // 1 - 11888, // 2 - 11892, // 3 - 0, // 4 - 11896, // 5 - 0, // 6 - 11900, // 7 - /*11880*/ uint16(x86_xSetOp), uint16(x86_FILD), - /*11882*/ uint16(x86_xArgM32int), - /*11883*/ uint16(x86_xMatch), - /*11884*/ uint16(x86_xSetOp), uint16(x86_FISTTP), - /*11886*/ uint16(x86_xArgM32int), - /*11887*/ uint16(x86_xMatch), - /*11888*/ uint16(x86_xSetOp), uint16(x86_FIST), - /*11890*/ uint16(x86_xArgM32int), - /*11891*/ uint16(x86_xMatch), - /*11892*/ uint16(x86_xSetOp), uint16(x86_FISTP), - /*11894*/ uint16(x86_xArgM32int), - /*11895*/ uint16(x86_xMatch), - /*11896*/ uint16(x86_xSetOp), uint16(x86_FLD), - /*11898*/ uint16(x86_xArgM80fp), - /*11899*/ uint16(x86_xMatch), - /*11900*/ uint16(x86_xSetOp), uint16(x86_FSTP), - /*11902*/ uint16(x86_xArgM80fp), - /*11903*/ uint16(x86_xMatch), - /*11904*/ uint16(x86_xSetOp), uint16(x86_FCMOVNB), - /*11906*/ uint16(x86_xArgST), - /*11907*/ uint16(x86_xArgSTi), - /*11908*/ uint16(x86_xMatch), - /*11909*/ uint16(x86_xSetOp), uint16(x86_FCMOVNE), - /*11911*/ uint16(x86_xArgST), - /*11912*/ uint16(x86_xArgSTi), - /*11913*/ uint16(x86_xMatch), - /*11914*/ uint16(x86_xSetOp), uint16(x86_FCMOVNBE), - /*11916*/ uint16(x86_xArgST), - /*11917*/ uint16(x86_xArgSTi), - /*11918*/ uint16(x86_xMatch), - /*11919*/ uint16(x86_xSetOp), uint16(x86_FCMOVNU), - /*11921*/ uint16(x86_xArgST), - /*11922*/ uint16(x86_xArgSTi), - /*11923*/ uint16(x86_xMatch), - /*11924*/ uint16(x86_xSetOp), uint16(x86_FNCLEX), - /*11926*/ uint16(x86_xMatch), - /*11927*/ uint16(x86_xSetOp), uint16(x86_FNINIT), - /*11929*/ uint16(x86_xMatch), - /*11930*/ uint16(x86_xSetOp), uint16(x86_FUCOMI), - /*11932*/ uint16(x86_xArgST), - /*11933*/ uint16(x86_xArgSTi), - /*11934*/ uint16(x86_xMatch), - /*11935*/ uint16(x86_xSetOp), uint16(x86_FCOMI), - /*11937*/ uint16(x86_xArgST), - /*11938*/ uint16(x86_xArgSTi), - /*11939*/ uint16(x86_xMatch), - /*11940*/ uint16(x86_xCondByte), 48, - 0xc0, 12079, - 0xc1, 12079, - 0xc2, 12079, - 0xc3, 12079, - 0xc4, 12079, - 0xc5, 12079, - 0xc6, 12079, - 0xc7, 12079, - 0xc8, 12084, - 0xc9, 12084, - 0xca, 12084, - 0xcb, 12084, - 0xcc, 12084, - 0xcd, 12084, - 0xce, 12084, - 0xcf, 12084, - 0xe0, 12089, - 0xe1, 12089, - 0xe2, 12089, - 0xe3, 12089, - 0xe4, 12089, - 0xe5, 12089, - 0xe6, 12089, - 0xe7, 12089, - 0xe8, 12094, - 0xe9, 12094, - 0xea, 12094, - 0xeb, 12094, - 0xec, 12094, - 0xed, 12094, - 0xee, 12094, - 0xef, 12094, - 0xf0, 12099, - 0xf1, 12099, - 0xf2, 12099, - 0xf3, 12099, - 0xf4, 12099, - 0xf5, 12099, - 0xf6, 12099, - 0xf7, 12099, - 0xf8, 12104, - 0xf9, 12104, - 0xfa, 12104, - 0xfb, 12104, - 0xfc, 12104, - 0xfd, 12104, - 0xfe, 12104, - 0xff, 12104, - /*12038*/ uint16(x86_xCondSlashR), - 12047, // 0 - 12051, // 1 - 12055, // 2 - 12059, // 3 - 12063, // 4 - 12067, // 5 - 12071, // 6 - 12075, // 7 - /*12047*/ uint16(x86_xSetOp), uint16(x86_FADD), - /*12049*/ uint16(x86_xArgM64fp), - /*12050*/ uint16(x86_xMatch), - /*12051*/ uint16(x86_xSetOp), uint16(x86_FMUL), - /*12053*/ uint16(x86_xArgM64fp), - /*12054*/ uint16(x86_xMatch), - /*12055*/ uint16(x86_xSetOp), uint16(x86_FCOM), - /*12057*/ uint16(x86_xArgM64fp), - /*12058*/ uint16(x86_xMatch), - /*12059*/ uint16(x86_xSetOp), uint16(x86_FCOMP), - /*12061*/ uint16(x86_xArgM64fp), - /*12062*/ uint16(x86_xMatch), - /*12063*/ uint16(x86_xSetOp), uint16(x86_FSUB), - /*12065*/ uint16(x86_xArgM64fp), - /*12066*/ uint16(x86_xMatch), - /*12067*/ uint16(x86_xSetOp), uint16(x86_FSUBR), - /*12069*/ uint16(x86_xArgM64fp), - /*12070*/ uint16(x86_xMatch), - /*12071*/ uint16(x86_xSetOp), uint16(x86_FDIV), - /*12073*/ uint16(x86_xArgM64fp), - /*12074*/ uint16(x86_xMatch), - /*12075*/ uint16(x86_xSetOp), uint16(x86_FDIVR), - /*12077*/ uint16(x86_xArgM64fp), - /*12078*/ uint16(x86_xMatch), - /*12079*/ uint16(x86_xSetOp), uint16(x86_FADD), - /*12081*/ uint16(x86_xArgSTi), - /*12082*/ uint16(x86_xArgST), - /*12083*/ uint16(x86_xMatch), - /*12084*/ uint16(x86_xSetOp), uint16(x86_FMUL), - /*12086*/ uint16(x86_xArgSTi), - /*12087*/ uint16(x86_xArgST), - /*12088*/ uint16(x86_xMatch), - /*12089*/ uint16(x86_xSetOp), uint16(x86_FSUBR), - /*12091*/ uint16(x86_xArgSTi), - /*12092*/ uint16(x86_xArgST), - /*12093*/ uint16(x86_xMatch), - /*12094*/ uint16(x86_xSetOp), uint16(x86_FSUB), - /*12096*/ uint16(x86_xArgSTi), - /*12097*/ uint16(x86_xArgST), - /*12098*/ uint16(x86_xMatch), - /*12099*/ uint16(x86_xSetOp), uint16(x86_FDIVR), - /*12101*/ uint16(x86_xArgSTi), - /*12102*/ uint16(x86_xArgST), - /*12103*/ uint16(x86_xMatch), - /*12104*/ uint16(x86_xSetOp), uint16(x86_FDIV), - /*12106*/ uint16(x86_xArgSTi), - /*12107*/ uint16(x86_xArgST), - /*12108*/ uint16(x86_xMatch), - /*12109*/ uint16(x86_xCondByte), 40, - 0xc0, 12228, - 0xc1, 12228, - 0xc2, 12228, - 0xc3, 12228, - 0xc4, 12228, - 0xc5, 12228, - 0xc6, 12228, - 0xc7, 12228, - 0xd0, 12232, - 0xd1, 12232, - 0xd2, 12232, - 0xd3, 12232, - 0xd4, 12232, - 0xd5, 12232, - 0xd6, 12232, - 0xd7, 12232, - 0xd8, 12236, - 0xd9, 12236, - 0xda, 12236, - 0xdb, 12236, - 0xdc, 12236, - 0xdd, 12236, - 0xde, 12236, - 0xdf, 12236, - 0xe0, 12240, - 0xe1, 12240, - 0xe2, 12240, - 0xe3, 12240, - 0xe4, 12240, - 0xe5, 12240, - 0xe6, 12240, - 0xe7, 12240, - 0xe8, 12244, - 0xe9, 12244, - 0xea, 12244, - 0xeb, 12244, - 0xec, 12244, - 0xed, 12244, - 0xee, 12244, - 0xef, 12244, - /*12191*/ uint16(x86_xCondSlashR), - 12200, // 0 - 12204, // 1 - 12208, // 2 - 12212, // 3 - 12216, // 4 - 0, // 5 - 12220, // 6 - 12224, // 7 - /*12200*/ uint16(x86_xSetOp), uint16(x86_FLD), - /*12202*/ uint16(x86_xArgM64fp), - /*12203*/ uint16(x86_xMatch), - /*12204*/ uint16(x86_xSetOp), uint16(x86_FISTTP), - /*12206*/ uint16(x86_xArgM64int), - /*12207*/ uint16(x86_xMatch), - /*12208*/ uint16(x86_xSetOp), uint16(x86_FST), - /*12210*/ uint16(x86_xArgM64fp), - /*12211*/ uint16(x86_xMatch), - /*12212*/ uint16(x86_xSetOp), uint16(x86_FSTP), - /*12214*/ uint16(x86_xArgM64fp), - /*12215*/ uint16(x86_xMatch), - /*12216*/ uint16(x86_xSetOp), uint16(x86_FRSTOR), - /*12218*/ uint16(x86_xArgM94108byte), - /*12219*/ uint16(x86_xMatch), - /*12220*/ uint16(x86_xSetOp), uint16(x86_FNSAVE), - /*12222*/ uint16(x86_xArgM94108byte), - /*12223*/ uint16(x86_xMatch), - /*12224*/ uint16(x86_xSetOp), uint16(x86_FNSTSW), - /*12226*/ uint16(x86_xArgM2byte), - /*12227*/ uint16(x86_xMatch), - /*12228*/ uint16(x86_xSetOp), uint16(x86_FFREE), - /*12230*/ uint16(x86_xArgSTi), - /*12231*/ uint16(x86_xMatch), - /*12232*/ uint16(x86_xSetOp), uint16(x86_FST), - /*12234*/ uint16(x86_xArgSTi), - /*12235*/ uint16(x86_xMatch), - /*12236*/ uint16(x86_xSetOp), uint16(x86_FSTP), - /*12238*/ uint16(x86_xArgSTi), - /*12239*/ uint16(x86_xMatch), - /*12240*/ uint16(x86_xSetOp), uint16(x86_FUCOM), - /*12242*/ uint16(x86_xArgSTi), - /*12243*/ uint16(x86_xMatch), - /*12244*/ uint16(x86_xSetOp), uint16(x86_FUCOMP), - /*12246*/ uint16(x86_xArgSTi), - /*12247*/ uint16(x86_xMatch), - /*12248*/ uint16(x86_xCondByte), 49, - 0xc0, 12389, - 0xc1, 12389, - 0xc2, 12389, - 0xc3, 12389, - 0xc4, 12389, - 0xc5, 12389, - 0xc6, 12389, - 0xc7, 12389, - 0xc8, 12394, - 0xc9, 12394, - 0xca, 12394, - 0xcb, 12394, - 0xcc, 12394, - 0xcd, 12394, - 0xce, 12394, - 0xcf, 12394, - 0xD9, 12399, - 0xe0, 12402, - 0xe1, 12402, - 0xe2, 12402, - 0xe3, 12402, - 0xe4, 12402, - 0xe5, 12402, - 0xe6, 12402, - 0xe7, 12402, - 0xe8, 12407, - 0xe9, 12407, - 0xea, 12407, - 0xeb, 12407, - 0xec, 12407, - 0xed, 12407, - 0xee, 12407, - 0xef, 12407, - 0xf0, 12412, - 0xf1, 12412, - 0xf2, 12412, - 0xf3, 12412, - 0xf4, 12412, - 0xf5, 12412, - 0xf6, 12412, - 0xf7, 12412, - 0xf8, 12417, - 0xf9, 12417, - 0xfa, 12417, - 0xfb, 12417, - 0xfc, 12417, - 0xfd, 12417, - 0xfe, 12417, - 0xff, 12417, - /*12348*/ uint16(x86_xCondSlashR), - 12357, // 0 - 12361, // 1 - 12365, // 2 - 12369, // 3 - 12373, // 4 - 12377, // 5 - 12381, // 6 - 12385, // 7 - /*12357*/ uint16(x86_xSetOp), uint16(x86_FIADD), - /*12359*/ uint16(x86_xArgM16int), - /*12360*/ uint16(x86_xMatch), - /*12361*/ uint16(x86_xSetOp), uint16(x86_FIMUL), - /*12363*/ uint16(x86_xArgM16int), - /*12364*/ uint16(x86_xMatch), - /*12365*/ uint16(x86_xSetOp), uint16(x86_FICOM), - /*12367*/ uint16(x86_xArgM16int), - /*12368*/ uint16(x86_xMatch), - /*12369*/ uint16(x86_xSetOp), uint16(x86_FICOMP), - /*12371*/ uint16(x86_xArgM16int), - /*12372*/ uint16(x86_xMatch), - /*12373*/ uint16(x86_xSetOp), uint16(x86_FISUB), - /*12375*/ uint16(x86_xArgM16int), - /*12376*/ uint16(x86_xMatch), - /*12377*/ uint16(x86_xSetOp), uint16(x86_FISUBR), - /*12379*/ uint16(x86_xArgM16int), - /*12380*/ uint16(x86_xMatch), - /*12381*/ uint16(x86_xSetOp), uint16(x86_FIDIV), - /*12383*/ uint16(x86_xArgM16int), - /*12384*/ uint16(x86_xMatch), - /*12385*/ uint16(x86_xSetOp), uint16(x86_FIDIVR), - /*12387*/ uint16(x86_xArgM16int), - /*12388*/ uint16(x86_xMatch), - /*12389*/ uint16(x86_xSetOp), uint16(x86_FADDP), - /*12391*/ uint16(x86_xArgSTi), - /*12392*/ uint16(x86_xArgST), - /*12393*/ uint16(x86_xMatch), - /*12394*/ uint16(x86_xSetOp), uint16(x86_FMULP), - /*12396*/ uint16(x86_xArgSTi), - /*12397*/ uint16(x86_xArgST), - /*12398*/ uint16(x86_xMatch), - /*12399*/ uint16(x86_xSetOp), uint16(x86_FCOMPP), - /*12401*/ uint16(x86_xMatch), - /*12402*/ uint16(x86_xSetOp), uint16(x86_FSUBRP), - /*12404*/ uint16(x86_xArgSTi), - /*12405*/ uint16(x86_xArgST), - /*12406*/ uint16(x86_xMatch), - /*12407*/ uint16(x86_xSetOp), uint16(x86_FSUBP), - /*12409*/ uint16(x86_xArgSTi), - /*12410*/ uint16(x86_xArgST), - /*12411*/ uint16(x86_xMatch), - /*12412*/ uint16(x86_xSetOp), uint16(x86_FDIVRP), - /*12414*/ uint16(x86_xArgSTi), - /*12415*/ uint16(x86_xArgST), - /*12416*/ uint16(x86_xMatch), - /*12417*/ uint16(x86_xSetOp), uint16(x86_FDIVP), - /*12419*/ uint16(x86_xArgSTi), - /*12420*/ uint16(x86_xArgST), - /*12421*/ uint16(x86_xMatch), - /*12422*/ uint16(x86_xCondByte), 25, - 0xc0, 12515, - 0xc1, 12515, - 0xc2, 12515, - 0xc3, 12515, - 0xc4, 12515, - 0xc5, 12515, - 0xc6, 12515, - 0xc7, 12515, - 0xE0, 12519, - 0xe8, 12523, - 0xe9, 12523, - 0xea, 12523, - 0xeb, 12523, - 0xec, 12523, - 0xed, 12523, - 0xee, 12523, - 0xef, 12523, - 0xf0, 12528, - 0xf1, 12528, - 0xf2, 12528, - 0xf3, 12528, - 0xf4, 12528, - 0xf5, 12528, - 0xf6, 12528, - 0xf7, 12528, - /*12474*/ uint16(x86_xCondSlashR), - 12483, // 0 - 12487, // 1 - 12491, // 2 - 12495, // 3 - 12499, // 4 - 12503, // 5 - 12507, // 6 - 12511, // 7 - /*12483*/ uint16(x86_xSetOp), uint16(x86_FILD), - /*12485*/ uint16(x86_xArgM16int), - /*12486*/ uint16(x86_xMatch), - /*12487*/ uint16(x86_xSetOp), uint16(x86_FISTTP), - /*12489*/ uint16(x86_xArgM16int), - /*12490*/ uint16(x86_xMatch), - /*12491*/ uint16(x86_xSetOp), uint16(x86_FIST), - /*12493*/ uint16(x86_xArgM16int), - /*12494*/ uint16(x86_xMatch), - /*12495*/ uint16(x86_xSetOp), uint16(x86_FISTP), - /*12497*/ uint16(x86_xArgM16int), - /*12498*/ uint16(x86_xMatch), - /*12499*/ uint16(x86_xSetOp), uint16(x86_FBLD), - /*12501*/ uint16(x86_xArgM80dec), - /*12502*/ uint16(x86_xMatch), - /*12503*/ uint16(x86_xSetOp), uint16(x86_FILD), - /*12505*/ uint16(x86_xArgM64int), - /*12506*/ uint16(x86_xMatch), - /*12507*/ uint16(x86_xSetOp), uint16(x86_FBSTP), - /*12509*/ uint16(x86_xArgM80bcd), - /*12510*/ uint16(x86_xMatch), - /*12511*/ uint16(x86_xSetOp), uint16(x86_FISTP), - /*12513*/ uint16(x86_xArgM64int), - /*12514*/ uint16(x86_xMatch), - /*12515*/ uint16(x86_xSetOp), uint16(x86_FFREEP), - /*12517*/ uint16(x86_xArgSTi), - /*12518*/ uint16(x86_xMatch), - /*12519*/ uint16(x86_xSetOp), uint16(x86_FNSTSW), - /*12521*/ uint16(x86_xArgAX), - /*12522*/ uint16(x86_xMatch), - /*12523*/ uint16(x86_xSetOp), uint16(x86_FUCOMIP), - /*12525*/ uint16(x86_xArgST), - /*12526*/ uint16(x86_xArgSTi), - /*12527*/ uint16(x86_xMatch), - /*12528*/ uint16(x86_xSetOp), uint16(x86_FCOMIP), - /*12530*/ uint16(x86_xArgST), - /*12531*/ uint16(x86_xArgSTi), - /*12532*/ uint16(x86_xMatch), - /*12533*/ uint16(x86_xSetOp), uint16(x86_LOOPNE), - /*12535*/ uint16(x86_xReadCb), - /*12536*/ uint16(x86_xArgRel8), - /*12537*/ uint16(x86_xMatch), - /*12538*/ uint16(x86_xSetOp), uint16(x86_LOOPE), - /*12540*/ uint16(x86_xReadCb), - /*12541*/ uint16(x86_xArgRel8), - /*12542*/ uint16(x86_xMatch), - /*12543*/ uint16(x86_xSetOp), uint16(x86_LOOP), - /*12545*/ uint16(x86_xReadCb), - /*12546*/ uint16(x86_xArgRel8), - /*12547*/ uint16(x86_xMatch), - /*12548*/ uint16(x86_xCondIs64), 12551, 12565, - /*12551*/ uint16(x86_xCondAddrSize), 12555, 12560, 0, - /*12555*/ uint16(x86_xSetOp), uint16(x86_JCXZ), - /*12557*/ uint16(x86_xReadCb), - /*12558*/ uint16(x86_xArgRel8), - /*12559*/ uint16(x86_xMatch), - /*12560*/ uint16(x86_xSetOp), uint16(x86_JECXZ), - /*12562*/ uint16(x86_xReadCb), - /*12563*/ uint16(x86_xArgRel8), - /*12564*/ uint16(x86_xMatch), - /*12565*/ uint16(x86_xCondAddrSize), 0, 12560, 12569, - /*12569*/ uint16(x86_xSetOp), uint16(x86_JRCXZ), - /*12571*/ uint16(x86_xReadCb), - /*12572*/ uint16(x86_xArgRel8), - /*12573*/ uint16(x86_xMatch), - /*12574*/ uint16(x86_xSetOp), uint16(x86_IN), - /*12576*/ uint16(x86_xReadIb), - /*12577*/ uint16(x86_xArgAL), - /*12578*/ uint16(x86_xArgImm8u), - /*12579*/ uint16(x86_xMatch), - /*12580*/ uint16(x86_xCondDataSize), 12584, 12590, 12596, - /*12584*/ uint16(x86_xSetOp), uint16(x86_IN), - /*12586*/ uint16(x86_xReadIb), - /*12587*/ uint16(x86_xArgAX), - /*12588*/ uint16(x86_xArgImm8u), - /*12589*/ uint16(x86_xMatch), - /*12590*/ uint16(x86_xSetOp), uint16(x86_IN), - /*12592*/ uint16(x86_xReadIb), - /*12593*/ uint16(x86_xArgEAX), - /*12594*/ uint16(x86_xArgImm8u), - /*12595*/ uint16(x86_xMatch), - /*12596*/ uint16(x86_xSetOp), uint16(x86_IN), - /*12598*/ uint16(x86_xReadIb), - /*12599*/ uint16(x86_xArgEAX), - /*12600*/ uint16(x86_xArgImm8u), - /*12601*/ uint16(x86_xMatch), - /*12602*/ uint16(x86_xSetOp), uint16(x86_OUT), - /*12604*/ uint16(x86_xReadIb), - /*12605*/ uint16(x86_xArgImm8u), - /*12606*/ uint16(x86_xArgAL), - /*12607*/ uint16(x86_xMatch), - /*12608*/ uint16(x86_xCondDataSize), 12612, 12618, 12624, - /*12612*/ uint16(x86_xSetOp), uint16(x86_OUT), - /*12614*/ uint16(x86_xReadIb), - /*12615*/ uint16(x86_xArgImm8u), - /*12616*/ uint16(x86_xArgAX), - /*12617*/ uint16(x86_xMatch), - /*12618*/ uint16(x86_xSetOp), uint16(x86_OUT), - /*12620*/ uint16(x86_xReadIb), - /*12621*/ uint16(x86_xArgImm8u), - /*12622*/ uint16(x86_xArgEAX), - /*12623*/ uint16(x86_xMatch), - /*12624*/ uint16(x86_xSetOp), uint16(x86_OUT), - /*12626*/ uint16(x86_xReadIb), - /*12627*/ uint16(x86_xArgImm8u), - /*12628*/ uint16(x86_xArgEAX), - /*12629*/ uint16(x86_xMatch), - /*12630*/ uint16(x86_xCondIs64), 12633, 12647, - /*12633*/ uint16(x86_xCondDataSize), 12637, 12642, 0, - /*12637*/ uint16(x86_xSetOp), uint16(x86_CALL), - /*12639*/ uint16(x86_xReadCw), - /*12640*/ uint16(x86_xArgRel16), - /*12641*/ uint16(x86_xMatch), - /*12642*/ uint16(x86_xSetOp), uint16(x86_CALL), - /*12644*/ uint16(x86_xReadCd), - /*12645*/ uint16(x86_xArgRel32), - /*12646*/ uint16(x86_xMatch), - /*12647*/ uint16(x86_xCondDataSize), 12651, 12642, 12656, - /*12651*/ uint16(x86_xSetOp), uint16(x86_CALL), - /*12653*/ uint16(x86_xReadCd), - /*12654*/ uint16(x86_xArgRel32), - /*12655*/ uint16(x86_xMatch), - /*12656*/ uint16(x86_xSetOp), uint16(x86_CALL), - /*12658*/ uint16(x86_xReadCd), - /*12659*/ uint16(x86_xArgRel32), - /*12660*/ uint16(x86_xMatch), - /*12661*/ uint16(x86_xCondIs64), 12664, 12678, - /*12664*/ uint16(x86_xCondDataSize), 12668, 12673, 0, - /*12668*/ uint16(x86_xSetOp), uint16(x86_JMP), - /*12670*/ uint16(x86_xReadCw), - /*12671*/ uint16(x86_xArgRel16), - /*12672*/ uint16(x86_xMatch), - /*12673*/ uint16(x86_xSetOp), uint16(x86_JMP), - /*12675*/ uint16(x86_xReadCd), - /*12676*/ uint16(x86_xArgRel32), - /*12677*/ uint16(x86_xMatch), - /*12678*/ uint16(x86_xCondDataSize), 12682, 12673, 12687, - /*12682*/ uint16(x86_xSetOp), uint16(x86_JMP), - /*12684*/ uint16(x86_xReadCd), - /*12685*/ uint16(x86_xArgRel32), - /*12686*/ uint16(x86_xMatch), - /*12687*/ uint16(x86_xSetOp), uint16(x86_JMP), - /*12689*/ uint16(x86_xReadCd), - /*12690*/ uint16(x86_xArgRel32), - /*12691*/ uint16(x86_xMatch), - /*12692*/ uint16(x86_xCondIs64), 12695, 0, - /*12695*/ uint16(x86_xCondDataSize), 12699, 12704, 0, - /*12699*/ uint16(x86_xSetOp), uint16(x86_LJMP), - /*12701*/ uint16(x86_xReadCd), - /*12702*/ uint16(x86_xArgPtr16colon16), - /*12703*/ uint16(x86_xMatch), - /*12704*/ uint16(x86_xSetOp), uint16(x86_LJMP), - /*12706*/ uint16(x86_xReadCp), - /*12707*/ uint16(x86_xArgPtr16colon32), - /*12708*/ uint16(x86_xMatch), - /*12709*/ uint16(x86_xSetOp), uint16(x86_JMP), - /*12711*/ uint16(x86_xReadCb), - /*12712*/ uint16(x86_xArgRel8), - /*12713*/ uint16(x86_xMatch), - /*12714*/ uint16(x86_xSetOp), uint16(x86_IN), - /*12716*/ uint16(x86_xArgAL), - /*12717*/ uint16(x86_xArgDX), - /*12718*/ uint16(x86_xMatch), - /*12719*/ uint16(x86_xCondDataSize), 12723, 12728, 12733, - /*12723*/ uint16(x86_xSetOp), uint16(x86_IN), - /*12725*/ uint16(x86_xArgAX), - /*12726*/ uint16(x86_xArgDX), - /*12727*/ uint16(x86_xMatch), - /*12728*/ uint16(x86_xSetOp), uint16(x86_IN), - /*12730*/ uint16(x86_xArgEAX), - /*12731*/ uint16(x86_xArgDX), - /*12732*/ uint16(x86_xMatch), - /*12733*/ uint16(x86_xSetOp), uint16(x86_IN), - /*12735*/ uint16(x86_xArgEAX), - /*12736*/ uint16(x86_xArgDX), - /*12737*/ uint16(x86_xMatch), - /*12738*/ uint16(x86_xSetOp), uint16(x86_OUT), - /*12740*/ uint16(x86_xArgDX), - /*12741*/ uint16(x86_xArgAL), - /*12742*/ uint16(x86_xMatch), - /*12743*/ uint16(x86_xCondDataSize), 12747, 12752, 12757, - /*12747*/ uint16(x86_xSetOp), uint16(x86_OUT), - /*12749*/ uint16(x86_xArgDX), - /*12750*/ uint16(x86_xArgAX), - /*12751*/ uint16(x86_xMatch), - /*12752*/ uint16(x86_xSetOp), uint16(x86_OUT), - /*12754*/ uint16(x86_xArgDX), - /*12755*/ uint16(x86_xArgEAX), - /*12756*/ uint16(x86_xMatch), - /*12757*/ uint16(x86_xSetOp), uint16(x86_OUT), - /*12759*/ uint16(x86_xArgDX), - /*12760*/ uint16(x86_xArgEAX), - /*12761*/ uint16(x86_xMatch), - /*12762*/ uint16(x86_xSetOp), uint16(x86_ICEBP), - /*12764*/ uint16(x86_xMatch), - /*12765*/ uint16(x86_xSetOp), uint16(x86_HLT), - /*12767*/ uint16(x86_xMatch), - /*12768*/ uint16(x86_xSetOp), uint16(x86_CMC), - /*12770*/ uint16(x86_xMatch), - /*12771*/ uint16(x86_xCondSlashR), - 12780, // 0 - 0, // 1 - 12786, // 2 - 12790, // 3 - 12794, // 4 - 12798, // 5 - 12802, // 6 - 12806, // 7 - /*12780*/ uint16(x86_xSetOp), uint16(x86_TEST), - /*12782*/ uint16(x86_xReadIb), - /*12783*/ uint16(x86_xArgRM8), - /*12784*/ uint16(x86_xArgImm8u), - /*12785*/ uint16(x86_xMatch), - /*12786*/ uint16(x86_xSetOp), uint16(x86_NOT), - /*12788*/ uint16(x86_xArgRM8), - /*12789*/ uint16(x86_xMatch), - /*12790*/ uint16(x86_xSetOp), uint16(x86_NEG), - /*12792*/ uint16(x86_xArgRM8), - /*12793*/ uint16(x86_xMatch), - /*12794*/ uint16(x86_xSetOp), uint16(x86_MUL), - /*12796*/ uint16(x86_xArgRM8), - /*12797*/ uint16(x86_xMatch), - /*12798*/ uint16(x86_xSetOp), uint16(x86_IMUL), - /*12800*/ uint16(x86_xArgRM8), - /*12801*/ uint16(x86_xMatch), - /*12802*/ uint16(x86_xSetOp), uint16(x86_DIV), - /*12804*/ uint16(x86_xArgRM8), - /*12805*/ uint16(x86_xMatch), - /*12806*/ uint16(x86_xSetOp), uint16(x86_IDIV), - /*12808*/ uint16(x86_xArgRM8), - /*12809*/ uint16(x86_xMatch), - /*12810*/ uint16(x86_xCondSlashR), - 12819, // 0 - 0, // 1 - 12848, // 2 - 12871, // 3 - 12894, // 4 - 12917, // 5 - 12940, // 6 - 12963, // 7 - /*12819*/ uint16(x86_xCondIs64), 12822, 12838, - /*12822*/ uint16(x86_xCondDataSize), 12826, 12832, 0, - /*12826*/ uint16(x86_xSetOp), uint16(x86_TEST), - /*12828*/ uint16(x86_xReadIw), - /*12829*/ uint16(x86_xArgRM16), - /*12830*/ uint16(x86_xArgImm16), - /*12831*/ uint16(x86_xMatch), - /*12832*/ uint16(x86_xSetOp), uint16(x86_TEST), - /*12834*/ uint16(x86_xReadId), - /*12835*/ uint16(x86_xArgRM32), - /*12836*/ uint16(x86_xArgImm32), - /*12837*/ uint16(x86_xMatch), - /*12838*/ uint16(x86_xCondDataSize), 12826, 12832, 12842, - /*12842*/ uint16(x86_xSetOp), uint16(x86_TEST), - /*12844*/ uint16(x86_xReadId), - /*12845*/ uint16(x86_xArgRM64), - /*12846*/ uint16(x86_xArgImm32), - /*12847*/ uint16(x86_xMatch), - /*12848*/ uint16(x86_xCondIs64), 12851, 12863, - /*12851*/ uint16(x86_xCondDataSize), 12855, 12859, 0, - /*12855*/ uint16(x86_xSetOp), uint16(x86_NOT), - /*12857*/ uint16(x86_xArgRM16), - /*12858*/ uint16(x86_xMatch), - /*12859*/ uint16(x86_xSetOp), uint16(x86_NOT), - /*12861*/ uint16(x86_xArgRM32), - /*12862*/ uint16(x86_xMatch), - /*12863*/ uint16(x86_xCondDataSize), 12855, 12859, 12867, - /*12867*/ uint16(x86_xSetOp), uint16(x86_NOT), - /*12869*/ uint16(x86_xArgRM64), - /*12870*/ uint16(x86_xMatch), - /*12871*/ uint16(x86_xCondIs64), 12874, 12886, - /*12874*/ uint16(x86_xCondDataSize), 12878, 12882, 0, - /*12878*/ uint16(x86_xSetOp), uint16(x86_NEG), - /*12880*/ uint16(x86_xArgRM16), - /*12881*/ uint16(x86_xMatch), - /*12882*/ uint16(x86_xSetOp), uint16(x86_NEG), - /*12884*/ uint16(x86_xArgRM32), - /*12885*/ uint16(x86_xMatch), - /*12886*/ uint16(x86_xCondDataSize), 12878, 12882, 12890, - /*12890*/ uint16(x86_xSetOp), uint16(x86_NEG), - /*12892*/ uint16(x86_xArgRM64), - /*12893*/ uint16(x86_xMatch), - /*12894*/ uint16(x86_xCondIs64), 12897, 12909, - /*12897*/ uint16(x86_xCondDataSize), 12901, 12905, 0, - /*12901*/ uint16(x86_xSetOp), uint16(x86_MUL), - /*12903*/ uint16(x86_xArgRM16), - /*12904*/ uint16(x86_xMatch), - /*12905*/ uint16(x86_xSetOp), uint16(x86_MUL), - /*12907*/ uint16(x86_xArgRM32), - /*12908*/ uint16(x86_xMatch), - /*12909*/ uint16(x86_xCondDataSize), 12901, 12905, 12913, - /*12913*/ uint16(x86_xSetOp), uint16(x86_MUL), - /*12915*/ uint16(x86_xArgRM64), - /*12916*/ uint16(x86_xMatch), - /*12917*/ uint16(x86_xCondIs64), 12920, 12932, - /*12920*/ uint16(x86_xCondDataSize), 12924, 12928, 0, - /*12924*/ uint16(x86_xSetOp), uint16(x86_IMUL), - /*12926*/ uint16(x86_xArgRM16), - /*12927*/ uint16(x86_xMatch), - /*12928*/ uint16(x86_xSetOp), uint16(x86_IMUL), - /*12930*/ uint16(x86_xArgRM32), - /*12931*/ uint16(x86_xMatch), - /*12932*/ uint16(x86_xCondDataSize), 12924, 12928, 12936, - /*12936*/ uint16(x86_xSetOp), uint16(x86_IMUL), - /*12938*/ uint16(x86_xArgRM64), - /*12939*/ uint16(x86_xMatch), - /*12940*/ uint16(x86_xCondIs64), 12943, 12955, - /*12943*/ uint16(x86_xCondDataSize), 12947, 12951, 0, - /*12947*/ uint16(x86_xSetOp), uint16(x86_DIV), - /*12949*/ uint16(x86_xArgRM16), - /*12950*/ uint16(x86_xMatch), - /*12951*/ uint16(x86_xSetOp), uint16(x86_DIV), - /*12953*/ uint16(x86_xArgRM32), - /*12954*/ uint16(x86_xMatch), - /*12955*/ uint16(x86_xCondDataSize), 12947, 12951, 12959, - /*12959*/ uint16(x86_xSetOp), uint16(x86_DIV), - /*12961*/ uint16(x86_xArgRM64), - /*12962*/ uint16(x86_xMatch), - /*12963*/ uint16(x86_xCondIs64), 12966, 12978, - /*12966*/ uint16(x86_xCondDataSize), 12970, 12974, 0, - /*12970*/ uint16(x86_xSetOp), uint16(x86_IDIV), - /*12972*/ uint16(x86_xArgRM16), - /*12973*/ uint16(x86_xMatch), - /*12974*/ uint16(x86_xSetOp), uint16(x86_IDIV), - /*12976*/ uint16(x86_xArgRM32), - /*12977*/ uint16(x86_xMatch), - /*12978*/ uint16(x86_xCondDataSize), 12970, 12974, 12982, - /*12982*/ uint16(x86_xSetOp), uint16(x86_IDIV), - /*12984*/ uint16(x86_xArgRM64), - /*12985*/ uint16(x86_xMatch), - /*12986*/ uint16(x86_xSetOp), uint16(x86_CLC), - /*12988*/ uint16(x86_xMatch), - /*12989*/ uint16(x86_xSetOp), uint16(x86_STC), - /*12991*/ uint16(x86_xMatch), - /*12992*/ uint16(x86_xSetOp), uint16(x86_CLI), - /*12994*/ uint16(x86_xMatch), - /*12995*/ uint16(x86_xSetOp), uint16(x86_STI), - /*12997*/ uint16(x86_xMatch), - /*12998*/ uint16(x86_xSetOp), uint16(x86_CLD), - /*13000*/ uint16(x86_xMatch), - /*13001*/ uint16(x86_xSetOp), uint16(x86_STD), - /*13003*/ uint16(x86_xMatch), - /*13004*/ uint16(x86_xCondSlashR), - 13013, // 0 - 13017, // 1 - 0, // 2 - 0, // 3 - 0, // 4 - 0, // 5 - 0, // 6 - 0, // 7 - /*13013*/ uint16(x86_xSetOp), uint16(x86_INC), - /*13015*/ uint16(x86_xArgRM8), - /*13016*/ uint16(x86_xMatch), - /*13017*/ uint16(x86_xSetOp), uint16(x86_DEC), - /*13019*/ uint16(x86_xArgRM8), - /*13020*/ uint16(x86_xMatch), - /*13021*/ uint16(x86_xCondSlashR), - 13030, // 0 - 13053, // 1 - 13076, // 2 - 13095, // 3 - 13118, // 4 - 13137, // 5 - 13160, // 6 - 0, // 7 - /*13030*/ uint16(x86_xCondIs64), 13033, 13045, - /*13033*/ uint16(x86_xCondDataSize), 13037, 13041, 0, - /*13037*/ uint16(x86_xSetOp), uint16(x86_INC), - /*13039*/ uint16(x86_xArgRM16), - /*13040*/ uint16(x86_xMatch), - /*13041*/ uint16(x86_xSetOp), uint16(x86_INC), - /*13043*/ uint16(x86_xArgRM32), - /*13044*/ uint16(x86_xMatch), - /*13045*/ uint16(x86_xCondDataSize), 13037, 13041, 13049, - /*13049*/ uint16(x86_xSetOp), uint16(x86_INC), - /*13051*/ uint16(x86_xArgRM64), - /*13052*/ uint16(x86_xMatch), - /*13053*/ uint16(x86_xCondIs64), 13056, 13068, - /*13056*/ uint16(x86_xCondDataSize), 13060, 13064, 0, - /*13060*/ uint16(x86_xSetOp), uint16(x86_DEC), - /*13062*/ uint16(x86_xArgRM16), - /*13063*/ uint16(x86_xMatch), - /*13064*/ uint16(x86_xSetOp), uint16(x86_DEC), - /*13066*/ uint16(x86_xArgRM32), - /*13067*/ uint16(x86_xMatch), - /*13068*/ uint16(x86_xCondDataSize), 13060, 13064, 13072, - /*13072*/ uint16(x86_xSetOp), uint16(x86_DEC), - /*13074*/ uint16(x86_xArgRM64), - /*13075*/ uint16(x86_xMatch), - /*13076*/ uint16(x86_xCondIs64), 13079, 13091, - /*13079*/ uint16(x86_xCondDataSize), 13083, 13087, 0, - /*13083*/ uint16(x86_xSetOp), uint16(x86_CALL), - /*13085*/ uint16(x86_xArgRM16), - /*13086*/ uint16(x86_xMatch), - /*13087*/ uint16(x86_xSetOp), uint16(x86_CALL), - /*13089*/ uint16(x86_xArgRM32), - /*13090*/ uint16(x86_xMatch), - /*13091*/ uint16(x86_xSetOp), uint16(x86_CALL), - /*13093*/ uint16(x86_xArgRM64), - /*13094*/ uint16(x86_xMatch), - /*13095*/ uint16(x86_xCondIs64), 13098, 13110, - /*13098*/ uint16(x86_xCondDataSize), 13102, 13106, 0, - /*13102*/ uint16(x86_xSetOp), uint16(x86_LCALL), - /*13104*/ uint16(x86_xArgM16colon16), - /*13105*/ uint16(x86_xMatch), - /*13106*/ uint16(x86_xSetOp), uint16(x86_LCALL), - /*13108*/ uint16(x86_xArgM16colon32), - /*13109*/ uint16(x86_xMatch), - /*13110*/ uint16(x86_xCondDataSize), 13102, 13106, 13114, - /*13114*/ uint16(x86_xSetOp), uint16(x86_LCALL), - /*13116*/ uint16(x86_xArgM16colon64), - /*13117*/ uint16(x86_xMatch), - /*13118*/ uint16(x86_xCondIs64), 13121, 13133, - /*13121*/ uint16(x86_xCondDataSize), 13125, 13129, 0, - /*13125*/ uint16(x86_xSetOp), uint16(x86_JMP), - /*13127*/ uint16(x86_xArgRM16), - /*13128*/ uint16(x86_xMatch), - /*13129*/ uint16(x86_xSetOp), uint16(x86_JMP), - /*13131*/ uint16(x86_xArgRM32), - /*13132*/ uint16(x86_xMatch), - /*13133*/ uint16(x86_xSetOp), uint16(x86_JMP), - /*13135*/ uint16(x86_xArgRM64), - /*13136*/ uint16(x86_xMatch), - /*13137*/ uint16(x86_xCondIs64), 13140, 13152, - /*13140*/ uint16(x86_xCondDataSize), 13144, 13148, 0, - /*13144*/ uint16(x86_xSetOp), uint16(x86_LJMP), - /*13146*/ uint16(x86_xArgM16colon16), - /*13147*/ uint16(x86_xMatch), - /*13148*/ uint16(x86_xSetOp), uint16(x86_LJMP), - /*13150*/ uint16(x86_xArgM16colon32), - /*13151*/ uint16(x86_xMatch), - /*13152*/ uint16(x86_xCondDataSize), 13144, 13148, 13156, - /*13156*/ uint16(x86_xSetOp), uint16(x86_LJMP), - /*13158*/ uint16(x86_xArgM16colon64), - /*13159*/ uint16(x86_xMatch), - /*13160*/ uint16(x86_xCondIs64), 13163, 13175, - /*13163*/ uint16(x86_xCondDataSize), 13167, 13171, 0, - /*13167*/ uint16(x86_xSetOp), uint16(x86_PUSH), - /*13169*/ uint16(x86_xArgRM16), - /*13170*/ uint16(x86_xMatch), - /*13171*/ uint16(x86_xSetOp), uint16(x86_PUSH), - /*13173*/ uint16(x86_xArgRM32), - /*13174*/ uint16(x86_xMatch), - /*13175*/ uint16(x86_xCondDataSize), 13167, 13179, 13183, - /*13179*/ uint16(x86_xSetOp), uint16(x86_PUSH), - /*13181*/ uint16(x86_xArgRM64), - /*13182*/ uint16(x86_xMatch), - /*13183*/ uint16(x86_xSetOp), uint16(x86_PUSH), - /*13185*/ uint16(x86_xArgRM64), - /*13186*/ uint16(x86_xMatch), -} - -const ( - _ x86_Op = iota - - x86_AAA - x86_AAD - x86_AAM - x86_AAS - x86_ADC - x86_ADD - x86_ADDPD - x86_ADDPS - x86_ADDSD - x86_ADDSS - x86_ADDSUBPD - x86_ADDSUBPS - x86_AESDEC - x86_AESDECLAST - x86_AESENC - x86_AESENCLAST - x86_AESIMC - x86_AESKEYGENASSIST - x86_AND - x86_ANDNPD - x86_ANDNPS - x86_ANDPD - x86_ANDPS - x86_ARPL - x86_BLENDPD - x86_BLENDPS - x86_BLENDVPD - x86_BLENDVPS - x86_BOUND - x86_BSF - x86_BSR - x86_BSWAP - x86_BT - x86_BTC - x86_BTR - x86_BTS - x86_CALL - x86_CBW - x86_CDQ - x86_CDQE - x86_CLC - x86_CLD - x86_CLFLUSH - x86_CLI - x86_CLTS - x86_CMC - x86_CMOVA - x86_CMOVAE - x86_CMOVB - x86_CMOVBE - x86_CMOVE - x86_CMOVG - x86_CMOVGE - x86_CMOVL - x86_CMOVLE - x86_CMOVNE - x86_CMOVNO - x86_CMOVNP - x86_CMOVNS - x86_CMOVO - x86_CMOVP - x86_CMOVS - x86_CMP - x86_CMPPD - x86_CMPPS - x86_CMPSB - x86_CMPSD - x86_CMPSD_XMM - x86_CMPSQ - x86_CMPSS - x86_CMPSW - x86_CMPXCHG - x86_CMPXCHG16B - x86_CMPXCHG8B - x86_COMISD - x86_COMISS - x86_CPUID - x86_CQO - x86_CRC32 - x86_CVTDQ2PD - x86_CVTDQ2PS - x86_CVTPD2DQ - x86_CVTPD2PI - x86_CVTPD2PS - x86_CVTPI2PD - x86_CVTPI2PS - x86_CVTPS2DQ - x86_CVTPS2PD - x86_CVTPS2PI - x86_CVTSD2SI - x86_CVTSD2SS - x86_CVTSI2SD - x86_CVTSI2SS - x86_CVTSS2SD - x86_CVTSS2SI - x86_CVTTPD2DQ - x86_CVTTPD2PI - x86_CVTTPS2DQ - x86_CVTTPS2PI - x86_CVTTSD2SI - x86_CVTTSS2SI - x86_CWD - x86_CWDE - x86_DAA - x86_DAS - x86_DEC - x86_DIV - x86_DIVPD - x86_DIVPS - x86_DIVSD - x86_DIVSS - x86_DPPD - x86_DPPS - x86_EMMS - x86_ENTER - x86_EXTRACTPS - x86_F2XM1 - x86_FABS - x86_FADD - x86_FADDP - x86_FBLD - x86_FBSTP - x86_FCHS - x86_FCMOVB - x86_FCMOVBE - x86_FCMOVE - x86_FCMOVNB - x86_FCMOVNBE - x86_FCMOVNE - x86_FCMOVNU - x86_FCMOVU - x86_FCOM - x86_FCOMI - x86_FCOMIP - x86_FCOMP - x86_FCOMPP - x86_FCOS - x86_FDECSTP - x86_FDIV - x86_FDIVP - x86_FDIVR - x86_FDIVRP - x86_FFREE - x86_FFREEP - x86_FIADD - x86_FICOM - x86_FICOMP - x86_FIDIV - x86_FIDIVR - x86_FILD - x86_FIMUL - x86_FINCSTP - x86_FIST - x86_FISTP - x86_FISTTP - x86_FISUB - x86_FISUBR - x86_FLD - x86_FLD1 - x86_FLDCW - x86_FLDENV - x86_FLDL2E - x86_FLDL2T - x86_FLDLG2 - x86_FLDPI - x86_FMUL - x86_FMULP - x86_FNCLEX - x86_FNINIT - x86_FNOP - x86_FNSAVE - x86_FNSTCW - x86_FNSTENV - x86_FNSTSW - x86_FPATAN - x86_FPREM - x86_FPREM1 - x86_FPTAN - x86_FRNDINT - x86_FRSTOR - x86_FSCALE - x86_FSIN - x86_FSINCOS - x86_FSQRT - x86_FST - x86_FSTP - x86_FSUB - x86_FSUBP - x86_FSUBR - x86_FSUBRP - x86_FTST - x86_FUCOM - x86_FUCOMI - x86_FUCOMIP - x86_FUCOMP - x86_FUCOMPP - x86_FWAIT - x86_FXAM - x86_FXCH - x86_FXRSTOR - x86_FXRSTOR64 - x86_FXSAVE - x86_FXSAVE64 - x86_FXTRACT - x86_FYL2X - x86_FYL2XP1 - x86_HADDPD - x86_HADDPS - x86_HLT - x86_HSUBPD - x86_HSUBPS - x86_ICEBP - x86_IDIV - x86_IMUL - x86_IN - x86_INC - x86_INSB - x86_INSD - x86_INSERTPS - x86_INSW - x86_INT - x86_INTO - x86_INVD - x86_INVLPG - x86_INVPCID - x86_IRET - x86_IRETD - x86_IRETQ - x86_JA - x86_JAE - x86_JB - x86_JBE - x86_JCXZ - x86_JE - x86_JECXZ - x86_JG - x86_JGE - x86_JL - x86_JLE - x86_JMP - x86_JNE - x86_JNO - x86_JNP - x86_JNS - x86_JO - x86_JP - x86_JRCXZ - x86_JS - x86_LAHF - x86_LAR - x86_LCALL - x86_LDDQU - x86_LDMXCSR - x86_LDS - x86_LEA - x86_LEAVE - x86_LES - x86_LFENCE - x86_LFS - x86_LGDT - x86_LGS - x86_LIDT - x86_LJMP - x86_LLDT - x86_LMSW - x86_LODSB - x86_LODSD - x86_LODSQ - x86_LODSW - x86_LOOP - x86_LOOPE - x86_LOOPNE - x86_LRET - x86_LSL - x86_LSS - x86_LTR - x86_LZCNT - x86_MASKMOVDQU - x86_MASKMOVQ - x86_MAXPD - x86_MAXPS - x86_MAXSD - x86_MAXSS - x86_MFENCE - x86_MINPD - x86_MINPS - x86_MINSD - x86_MINSS - x86_MONITOR - x86_MOV - x86_MOVAPD - x86_MOVAPS - x86_MOVBE - x86_MOVD - x86_MOVDDUP - x86_MOVDQ2Q - x86_MOVDQA - x86_MOVDQU - x86_MOVHLPS - x86_MOVHPD - x86_MOVHPS - x86_MOVLHPS - x86_MOVLPD - x86_MOVLPS - x86_MOVMSKPD - x86_MOVMSKPS - x86_MOVNTDQ - x86_MOVNTDQA - x86_MOVNTI - x86_MOVNTPD - x86_MOVNTPS - x86_MOVNTQ - x86_MOVNTSD - x86_MOVNTSS - x86_MOVQ - x86_MOVQ2DQ - x86_MOVSB - x86_MOVSD - x86_MOVSD_XMM - x86_MOVSHDUP - x86_MOVSLDUP - x86_MOVSQ - x86_MOVSS - x86_MOVSW - x86_MOVSX - x86_MOVSXD - x86_MOVUPD - x86_MOVUPS - x86_MOVZX - x86_MPSADBW - x86_MUL - x86_MULPD - x86_MULPS - x86_MULSD - x86_MULSS - x86_MWAIT - x86_NEG - x86_NOP - x86_NOT - x86_OR - x86_ORPD - x86_ORPS - x86_OUT - x86_OUTSB - x86_OUTSD - x86_OUTSW - x86_PABSB - x86_PABSD - x86_PABSW - x86_PACKSSDW - x86_PACKSSWB - x86_PACKUSDW - x86_PACKUSWB - x86_PADDB - x86_PADDD - x86_PADDQ - x86_PADDSB - x86_PADDSW - x86_PADDUSB - x86_PADDUSW - x86_PADDW - x86_PALIGNR - x86_PAND - x86_PANDN - x86_PAUSE - x86_PAVGB - x86_PAVGW - x86_PBLENDVB - x86_PBLENDW - x86_PCLMULQDQ - x86_PCMPEQB - x86_PCMPEQD - x86_PCMPEQQ - x86_PCMPEQW - x86_PCMPESTRI - x86_PCMPESTRM - x86_PCMPGTB - x86_PCMPGTD - x86_PCMPGTQ - x86_PCMPGTW - x86_PCMPISTRI - x86_PCMPISTRM - x86_PEXTRB - x86_PEXTRD - x86_PEXTRQ - x86_PEXTRW - x86_PHADDD - x86_PHADDSW - x86_PHADDW - x86_PHMINPOSUW - x86_PHSUBD - x86_PHSUBSW - x86_PHSUBW - x86_PINSRB - x86_PINSRD - x86_PINSRQ - x86_PINSRW - x86_PMADDUBSW - x86_PMADDWD - x86_PMAXSB - x86_PMAXSD - x86_PMAXSW - x86_PMAXUB - x86_PMAXUD - x86_PMAXUW - x86_PMINSB - x86_PMINSD - x86_PMINSW - x86_PMINUB - x86_PMINUD - x86_PMINUW - x86_PMOVMSKB - x86_PMOVSXBD - x86_PMOVSXBQ - x86_PMOVSXBW - x86_PMOVSXDQ - x86_PMOVSXWD - x86_PMOVSXWQ - x86_PMOVZXBD - x86_PMOVZXBQ - x86_PMOVZXBW - x86_PMOVZXDQ - x86_PMOVZXWD - x86_PMOVZXWQ - x86_PMULDQ - x86_PMULHRSW - x86_PMULHUW - x86_PMULHW - x86_PMULLD - x86_PMULLW - x86_PMULUDQ - x86_POP - x86_POPA - x86_POPAD - x86_POPCNT - x86_POPF - x86_POPFD - x86_POPFQ - x86_POR - x86_PREFETCHNTA - x86_PREFETCHT0 - x86_PREFETCHT1 - x86_PREFETCHT2 - x86_PREFETCHW - x86_PSADBW - x86_PSHUFB - x86_PSHUFD - x86_PSHUFHW - x86_PSHUFLW - x86_PSHUFW - x86_PSIGNB - x86_PSIGND - x86_PSIGNW - x86_PSLLD - x86_PSLLDQ - x86_PSLLQ - x86_PSLLW - x86_PSRAD - x86_PSRAW - x86_PSRLD - x86_PSRLDQ - x86_PSRLQ - x86_PSRLW - x86_PSUBB - x86_PSUBD - x86_PSUBQ - x86_PSUBSB - x86_PSUBSW - x86_PSUBUSB - x86_PSUBUSW - x86_PSUBW - x86_PTEST - x86_PUNPCKHBW - x86_PUNPCKHDQ - x86_PUNPCKHQDQ - x86_PUNPCKHWD - x86_PUNPCKLBW - x86_PUNPCKLDQ - x86_PUNPCKLQDQ - x86_PUNPCKLWD - x86_PUSH - x86_PUSHA - x86_PUSHAD - x86_PUSHF - x86_PUSHFD - x86_PUSHFQ - x86_PXOR - x86_RCL - x86_RCPPS - x86_RCPSS - x86_RCR - x86_RDFSBASE - x86_RDGSBASE - x86_RDMSR - x86_RDPMC - x86_RDRAND - x86_RDTSC - x86_RDTSCP - x86_RET - x86_ROL - x86_ROR - x86_ROUNDPD - x86_ROUNDPS - x86_ROUNDSD - x86_ROUNDSS - x86_RSM - x86_RSQRTPS - x86_RSQRTSS - x86_SAHF - x86_SAR - x86_SBB - x86_SCASB - x86_SCASD - x86_SCASQ - x86_SCASW - x86_SETA - x86_SETAE - x86_SETB - x86_SETBE - x86_SETE - x86_SETG - x86_SETGE - x86_SETL - x86_SETLE - x86_SETNE - x86_SETNO - x86_SETNP - x86_SETNS - x86_SETO - x86_SETP - x86_SETS - x86_SFENCE - x86_SGDT - x86_SHL - x86_SHLD - x86_SHR - x86_SHRD - x86_SHUFPD - x86_SHUFPS - x86_SIDT - x86_SLDT - x86_SMSW - x86_SQRTPD - x86_SQRTPS - x86_SQRTSD - x86_SQRTSS - x86_STC - x86_STD - x86_STI - x86_STMXCSR - x86_STOSB - x86_STOSD - x86_STOSQ - x86_STOSW - x86_STR - x86_SUB - x86_SUBPD - x86_SUBPS - x86_SUBSD - x86_SUBSS - x86_SWAPGS - x86_SYSCALL - x86_SYSENTER - x86_SYSEXIT - x86_SYSRET - x86_TEST - x86_TZCNT - x86_UCOMISD - x86_UCOMISS - x86_UD1 - x86_UD2 - x86_UNPCKHPD - x86_UNPCKHPS - x86_UNPCKLPD - x86_UNPCKLPS - x86_VERR - x86_VERW - x86_WBINVD - x86_WRFSBASE - x86_WRGSBASE - x86_WRMSR - x86_XABORT - x86_XADD - x86_XBEGIN - x86_XCHG - x86_XEND - x86_XGETBV - x86_XLATB - x86_XOR - x86_XORPD - x86_XORPS - x86_XRSTOR - x86_XRSTOR64 - x86_XRSTORS - x86_XRSTORS64 - x86_XSAVE - x86_XSAVE64 - x86_XSAVEC - x86_XSAVEC64 - x86_XSAVEOPT - x86_XSAVEOPT64 - x86_XSAVES - x86_XSAVES64 - x86_XSETBV - x86_XTEST -) - -const x86_maxOp = x86_XTEST - -var x86_opNames = [...]string{ - x86_AAA: "AAA", - x86_AAD: "AAD", - x86_AAM: "AAM", - x86_AAS: "AAS", - x86_ADC: "ADC", - x86_ADD: "ADD", - x86_ADDPD: "ADDPD", - x86_ADDPS: "ADDPS", - x86_ADDSD: "ADDSD", - x86_ADDSS: "ADDSS", - x86_ADDSUBPD: "ADDSUBPD", - x86_ADDSUBPS: "ADDSUBPS", - x86_AESDEC: "AESDEC", - x86_AESDECLAST: "AESDECLAST", - x86_AESENC: "AESENC", - x86_AESENCLAST: "AESENCLAST", - x86_AESIMC: "AESIMC", - x86_AESKEYGENASSIST: "AESKEYGENASSIST", - x86_AND: "AND", - x86_ANDNPD: "ANDNPD", - x86_ANDNPS: "ANDNPS", - x86_ANDPD: "ANDPD", - x86_ANDPS: "ANDPS", - x86_ARPL: "ARPL", - x86_BLENDPD: "BLENDPD", - x86_BLENDPS: "BLENDPS", - x86_BLENDVPD: "BLENDVPD", - x86_BLENDVPS: "BLENDVPS", - x86_BOUND: "BOUND", - x86_BSF: "BSF", - x86_BSR: "BSR", - x86_BSWAP: "BSWAP", - x86_BT: "BT", - x86_BTC: "BTC", - x86_BTR: "BTR", - x86_BTS: "BTS", - x86_CALL: "CALL", - x86_CBW: "CBW", - x86_CDQ: "CDQ", - x86_CDQE: "CDQE", - x86_CLC: "CLC", - x86_CLD: "CLD", - x86_CLFLUSH: "CLFLUSH", - x86_CLI: "CLI", - x86_CLTS: "CLTS", - x86_CMC: "CMC", - x86_CMOVA: "CMOVA", - x86_CMOVAE: "CMOVAE", - x86_CMOVB: "CMOVB", - x86_CMOVBE: "CMOVBE", - x86_CMOVE: "CMOVE", - x86_CMOVG: "CMOVG", - x86_CMOVGE: "CMOVGE", - x86_CMOVL: "CMOVL", - x86_CMOVLE: "CMOVLE", - x86_CMOVNE: "CMOVNE", - x86_CMOVNO: "CMOVNO", - x86_CMOVNP: "CMOVNP", - x86_CMOVNS: "CMOVNS", - x86_CMOVO: "CMOVO", - x86_CMOVP: "CMOVP", - x86_CMOVS: "CMOVS", - x86_CMP: "CMP", - x86_CMPPD: "CMPPD", - x86_CMPPS: "CMPPS", - x86_CMPSB: "CMPSB", - x86_CMPSD: "CMPSD", - x86_CMPSD_XMM: "CMPSD_XMM", - x86_CMPSQ: "CMPSQ", - x86_CMPSS: "CMPSS", - x86_CMPSW: "CMPSW", - x86_CMPXCHG: "CMPXCHG", - x86_CMPXCHG16B: "CMPXCHG16B", - x86_CMPXCHG8B: "CMPXCHG8B", - x86_COMISD: "COMISD", - x86_COMISS: "COMISS", - x86_CPUID: "CPUID", - x86_CQO: "CQO", - x86_CRC32: "CRC32", - x86_CVTDQ2PD: "CVTDQ2PD", - x86_CVTDQ2PS: "CVTDQ2PS", - x86_CVTPD2DQ: "CVTPD2DQ", - x86_CVTPD2PI: "CVTPD2PI", - x86_CVTPD2PS: "CVTPD2PS", - x86_CVTPI2PD: "CVTPI2PD", - x86_CVTPI2PS: "CVTPI2PS", - x86_CVTPS2DQ: "CVTPS2DQ", - x86_CVTPS2PD: "CVTPS2PD", - x86_CVTPS2PI: "CVTPS2PI", - x86_CVTSD2SI: "CVTSD2SI", - x86_CVTSD2SS: "CVTSD2SS", - x86_CVTSI2SD: "CVTSI2SD", - x86_CVTSI2SS: "CVTSI2SS", - x86_CVTSS2SD: "CVTSS2SD", - x86_CVTSS2SI: "CVTSS2SI", - x86_CVTTPD2DQ: "CVTTPD2DQ", - x86_CVTTPD2PI: "CVTTPD2PI", - x86_CVTTPS2DQ: "CVTTPS2DQ", - x86_CVTTPS2PI: "CVTTPS2PI", - x86_CVTTSD2SI: "CVTTSD2SI", - x86_CVTTSS2SI: "CVTTSS2SI", - x86_CWD: "CWD", - x86_CWDE: "CWDE", - x86_DAA: "DAA", - x86_DAS: "DAS", - x86_DEC: "DEC", - x86_DIV: "DIV", - x86_DIVPD: "DIVPD", - x86_DIVPS: "DIVPS", - x86_DIVSD: "DIVSD", - x86_DIVSS: "DIVSS", - x86_DPPD: "DPPD", - x86_DPPS: "DPPS", - x86_EMMS: "EMMS", - x86_ENTER: "ENTER", - x86_EXTRACTPS: "EXTRACTPS", - x86_F2XM1: "F2XM1", - x86_FABS: "FABS", - x86_FADD: "FADD", - x86_FADDP: "FADDP", - x86_FBLD: "FBLD", - x86_FBSTP: "FBSTP", - x86_FCHS: "FCHS", - x86_FCMOVB: "FCMOVB", - x86_FCMOVBE: "FCMOVBE", - x86_FCMOVE: "FCMOVE", - x86_FCMOVNB: "FCMOVNB", - x86_FCMOVNBE: "FCMOVNBE", - x86_FCMOVNE: "FCMOVNE", - x86_FCMOVNU: "FCMOVNU", - x86_FCMOVU: "FCMOVU", - x86_FCOM: "FCOM", - x86_FCOMI: "FCOMI", - x86_FCOMIP: "FCOMIP", - x86_FCOMP: "FCOMP", - x86_FCOMPP: "FCOMPP", - x86_FCOS: "FCOS", - x86_FDECSTP: "FDECSTP", - x86_FDIV: "FDIV", - x86_FDIVP: "FDIVP", - x86_FDIVR: "FDIVR", - x86_FDIVRP: "FDIVRP", - x86_FFREE: "FFREE", - x86_FFREEP: "FFREEP", - x86_FIADD: "FIADD", - x86_FICOM: "FICOM", - x86_FICOMP: "FICOMP", - x86_FIDIV: "FIDIV", - x86_FIDIVR: "FIDIVR", - x86_FILD: "FILD", - x86_FIMUL: "FIMUL", - x86_FINCSTP: "FINCSTP", - x86_FIST: "FIST", - x86_FISTP: "FISTP", - x86_FISTTP: "FISTTP", - x86_FISUB: "FISUB", - x86_FISUBR: "FISUBR", - x86_FLD: "FLD", - x86_FLD1: "FLD1", - x86_FLDCW: "FLDCW", - x86_FLDENV: "FLDENV", - x86_FLDL2E: "FLDL2E", - x86_FLDL2T: "FLDL2T", - x86_FLDLG2: "FLDLG2", - x86_FLDPI: "FLDPI", - x86_FMUL: "FMUL", - x86_FMULP: "FMULP", - x86_FNCLEX: "FNCLEX", - x86_FNINIT: "FNINIT", - x86_FNOP: "FNOP", - x86_FNSAVE: "FNSAVE", - x86_FNSTCW: "FNSTCW", - x86_FNSTENV: "FNSTENV", - x86_FNSTSW: "FNSTSW", - x86_FPATAN: "FPATAN", - x86_FPREM: "FPREM", - x86_FPREM1: "FPREM1", - x86_FPTAN: "FPTAN", - x86_FRNDINT: "FRNDINT", - x86_FRSTOR: "FRSTOR", - x86_FSCALE: "FSCALE", - x86_FSIN: "FSIN", - x86_FSINCOS: "FSINCOS", - x86_FSQRT: "FSQRT", - x86_FST: "FST", - x86_FSTP: "FSTP", - x86_FSUB: "FSUB", - x86_FSUBP: "FSUBP", - x86_FSUBR: "FSUBR", - x86_FSUBRP: "FSUBRP", - x86_FTST: "FTST", - x86_FUCOM: "FUCOM", - x86_FUCOMI: "FUCOMI", - x86_FUCOMIP: "FUCOMIP", - x86_FUCOMP: "FUCOMP", - x86_FUCOMPP: "FUCOMPP", - x86_FWAIT: "FWAIT", - x86_FXAM: "FXAM", - x86_FXCH: "FXCH", - x86_FXRSTOR: "FXRSTOR", - x86_FXRSTOR64: "FXRSTOR64", - x86_FXSAVE: "FXSAVE", - x86_FXSAVE64: "FXSAVE64", - x86_FXTRACT: "FXTRACT", - x86_FYL2X: "FYL2X", - x86_FYL2XP1: "FYL2XP1", - x86_HADDPD: "HADDPD", - x86_HADDPS: "HADDPS", - x86_HLT: "HLT", - x86_HSUBPD: "HSUBPD", - x86_HSUBPS: "HSUBPS", - x86_ICEBP: "ICEBP", - x86_IDIV: "IDIV", - x86_IMUL: "IMUL", - x86_IN: "IN", - x86_INC: "INC", - x86_INSB: "INSB", - x86_INSD: "INSD", - x86_INSERTPS: "INSERTPS", - x86_INSW: "INSW", - x86_INT: "INT", - x86_INTO: "INTO", - x86_INVD: "INVD", - x86_INVLPG: "INVLPG", - x86_INVPCID: "INVPCID", - x86_IRET: "IRET", - x86_IRETD: "IRETD", - x86_IRETQ: "IRETQ", - x86_JA: "JA", - x86_JAE: "JAE", - x86_JB: "JB", - x86_JBE: "JBE", - x86_JCXZ: "JCXZ", - x86_JE: "JE", - x86_JECXZ: "JECXZ", - x86_JG: "JG", - x86_JGE: "JGE", - x86_JL: "JL", - x86_JLE: "JLE", - x86_JMP: "JMP", - x86_JNE: "JNE", - x86_JNO: "JNO", - x86_JNP: "JNP", - x86_JNS: "JNS", - x86_JO: "JO", - x86_JP: "JP", - x86_JRCXZ: "JRCXZ", - x86_JS: "JS", - x86_LAHF: "LAHF", - x86_LAR: "LAR", - x86_LCALL: "LCALL", - x86_LDDQU: "LDDQU", - x86_LDMXCSR: "LDMXCSR", - x86_LDS: "LDS", - x86_LEA: "LEA", - x86_LEAVE: "LEAVE", - x86_LES: "LES", - x86_LFENCE: "LFENCE", - x86_LFS: "LFS", - x86_LGDT: "LGDT", - x86_LGS: "LGS", - x86_LIDT: "LIDT", - x86_LJMP: "LJMP", - x86_LLDT: "LLDT", - x86_LMSW: "LMSW", - x86_LODSB: "LODSB", - x86_LODSD: "LODSD", - x86_LODSQ: "LODSQ", - x86_LODSW: "LODSW", - x86_LOOP: "LOOP", - x86_LOOPE: "LOOPE", - x86_LOOPNE: "LOOPNE", - x86_LRET: "LRET", - x86_LSL: "LSL", - x86_LSS: "LSS", - x86_LTR: "LTR", - x86_LZCNT: "LZCNT", - x86_MASKMOVDQU: "MASKMOVDQU", - x86_MASKMOVQ: "MASKMOVQ", - x86_MAXPD: "MAXPD", - x86_MAXPS: "MAXPS", - x86_MAXSD: "MAXSD", - x86_MAXSS: "MAXSS", - x86_MFENCE: "MFENCE", - x86_MINPD: "MINPD", - x86_MINPS: "MINPS", - x86_MINSD: "MINSD", - x86_MINSS: "MINSS", - x86_MONITOR: "MONITOR", - x86_MOV: "MOV", - x86_MOVAPD: "MOVAPD", - x86_MOVAPS: "MOVAPS", - x86_MOVBE: "MOVBE", - x86_MOVD: "MOVD", - x86_MOVDDUP: "MOVDDUP", - x86_MOVDQ2Q: "MOVDQ2Q", - x86_MOVDQA: "MOVDQA", - x86_MOVDQU: "MOVDQU", - x86_MOVHLPS: "MOVHLPS", - x86_MOVHPD: "MOVHPD", - x86_MOVHPS: "MOVHPS", - x86_MOVLHPS: "MOVLHPS", - x86_MOVLPD: "MOVLPD", - x86_MOVLPS: "MOVLPS", - x86_MOVMSKPD: "MOVMSKPD", - x86_MOVMSKPS: "MOVMSKPS", - x86_MOVNTDQ: "MOVNTDQ", - x86_MOVNTDQA: "MOVNTDQA", - x86_MOVNTI: "MOVNTI", - x86_MOVNTPD: "MOVNTPD", - x86_MOVNTPS: "MOVNTPS", - x86_MOVNTQ: "MOVNTQ", - x86_MOVNTSD: "MOVNTSD", - x86_MOVNTSS: "MOVNTSS", - x86_MOVQ: "MOVQ", - x86_MOVQ2DQ: "MOVQ2DQ", - x86_MOVSB: "MOVSB", - x86_MOVSD: "MOVSD", - x86_MOVSD_XMM: "MOVSD_XMM", - x86_MOVSHDUP: "MOVSHDUP", - x86_MOVSLDUP: "MOVSLDUP", - x86_MOVSQ: "MOVSQ", - x86_MOVSS: "MOVSS", - x86_MOVSW: "MOVSW", - x86_MOVSX: "MOVSX", - x86_MOVSXD: "MOVSXD", - x86_MOVUPD: "MOVUPD", - x86_MOVUPS: "MOVUPS", - x86_MOVZX: "MOVZX", - x86_MPSADBW: "MPSADBW", - x86_MUL: "MUL", - x86_MULPD: "MULPD", - x86_MULPS: "MULPS", - x86_MULSD: "MULSD", - x86_MULSS: "MULSS", - x86_MWAIT: "MWAIT", - x86_NEG: "NEG", - x86_NOP: "NOP", - x86_NOT: "NOT", - x86_OR: "OR", - x86_ORPD: "ORPD", - x86_ORPS: "ORPS", - x86_OUT: "OUT", - x86_OUTSB: "OUTSB", - x86_OUTSD: "OUTSD", - x86_OUTSW: "OUTSW", - x86_PABSB: "PABSB", - x86_PABSD: "PABSD", - x86_PABSW: "PABSW", - x86_PACKSSDW: "PACKSSDW", - x86_PACKSSWB: "PACKSSWB", - x86_PACKUSDW: "PACKUSDW", - x86_PACKUSWB: "PACKUSWB", - x86_PADDB: "PADDB", - x86_PADDD: "PADDD", - x86_PADDQ: "PADDQ", - x86_PADDSB: "PADDSB", - x86_PADDSW: "PADDSW", - x86_PADDUSB: "PADDUSB", - x86_PADDUSW: "PADDUSW", - x86_PADDW: "PADDW", - x86_PALIGNR: "PALIGNR", - x86_PAND: "PAND", - x86_PANDN: "PANDN", - x86_PAUSE: "PAUSE", - x86_PAVGB: "PAVGB", - x86_PAVGW: "PAVGW", - x86_PBLENDVB: "PBLENDVB", - x86_PBLENDW: "PBLENDW", - x86_PCLMULQDQ: "PCLMULQDQ", - x86_PCMPEQB: "PCMPEQB", - x86_PCMPEQD: "PCMPEQD", - x86_PCMPEQQ: "PCMPEQQ", - x86_PCMPEQW: "PCMPEQW", - x86_PCMPESTRI: "PCMPESTRI", - x86_PCMPESTRM: "PCMPESTRM", - x86_PCMPGTB: "PCMPGTB", - x86_PCMPGTD: "PCMPGTD", - x86_PCMPGTQ: "PCMPGTQ", - x86_PCMPGTW: "PCMPGTW", - x86_PCMPISTRI: "PCMPISTRI", - x86_PCMPISTRM: "PCMPISTRM", - x86_PEXTRB: "PEXTRB", - x86_PEXTRD: "PEXTRD", - x86_PEXTRQ: "PEXTRQ", - x86_PEXTRW: "PEXTRW", - x86_PHADDD: "PHADDD", - x86_PHADDSW: "PHADDSW", - x86_PHADDW: "PHADDW", - x86_PHMINPOSUW: "PHMINPOSUW", - x86_PHSUBD: "PHSUBD", - x86_PHSUBSW: "PHSUBSW", - x86_PHSUBW: "PHSUBW", - x86_PINSRB: "PINSRB", - x86_PINSRD: "PINSRD", - x86_PINSRQ: "PINSRQ", - x86_PINSRW: "PINSRW", - x86_PMADDUBSW: "PMADDUBSW", - x86_PMADDWD: "PMADDWD", - x86_PMAXSB: "PMAXSB", - x86_PMAXSD: "PMAXSD", - x86_PMAXSW: "PMAXSW", - x86_PMAXUB: "PMAXUB", - x86_PMAXUD: "PMAXUD", - x86_PMAXUW: "PMAXUW", - x86_PMINSB: "PMINSB", - x86_PMINSD: "PMINSD", - x86_PMINSW: "PMINSW", - x86_PMINUB: "PMINUB", - x86_PMINUD: "PMINUD", - x86_PMINUW: "PMINUW", - x86_PMOVMSKB: "PMOVMSKB", - x86_PMOVSXBD: "PMOVSXBD", - x86_PMOVSXBQ: "PMOVSXBQ", - x86_PMOVSXBW: "PMOVSXBW", - x86_PMOVSXDQ: "PMOVSXDQ", - x86_PMOVSXWD: "PMOVSXWD", - x86_PMOVSXWQ: "PMOVSXWQ", - x86_PMOVZXBD: "PMOVZXBD", - x86_PMOVZXBQ: "PMOVZXBQ", - x86_PMOVZXBW: "PMOVZXBW", - x86_PMOVZXDQ: "PMOVZXDQ", - x86_PMOVZXWD: "PMOVZXWD", - x86_PMOVZXWQ: "PMOVZXWQ", - x86_PMULDQ: "PMULDQ", - x86_PMULHRSW: "PMULHRSW", - x86_PMULHUW: "PMULHUW", - x86_PMULHW: "PMULHW", - x86_PMULLD: "PMULLD", - x86_PMULLW: "PMULLW", - x86_PMULUDQ: "PMULUDQ", - x86_POP: "POP", - x86_POPA: "POPA", - x86_POPAD: "POPAD", - x86_POPCNT: "POPCNT", - x86_POPF: "POPF", - x86_POPFD: "POPFD", - x86_POPFQ: "POPFQ", - x86_POR: "POR", - x86_PREFETCHNTA: "PREFETCHNTA", - x86_PREFETCHT0: "PREFETCHT0", - x86_PREFETCHT1: "PREFETCHT1", - x86_PREFETCHT2: "PREFETCHT2", - x86_PREFETCHW: "PREFETCHW", - x86_PSADBW: "PSADBW", - x86_PSHUFB: "PSHUFB", - x86_PSHUFD: "PSHUFD", - x86_PSHUFHW: "PSHUFHW", - x86_PSHUFLW: "PSHUFLW", - x86_PSHUFW: "PSHUFW", - x86_PSIGNB: "PSIGNB", - x86_PSIGND: "PSIGND", - x86_PSIGNW: "PSIGNW", - x86_PSLLD: "PSLLD", - x86_PSLLDQ: "PSLLDQ", - x86_PSLLQ: "PSLLQ", - x86_PSLLW: "PSLLW", - x86_PSRAD: "PSRAD", - x86_PSRAW: "PSRAW", - x86_PSRLD: "PSRLD", - x86_PSRLDQ: "PSRLDQ", - x86_PSRLQ: "PSRLQ", - x86_PSRLW: "PSRLW", - x86_PSUBB: "PSUBB", - x86_PSUBD: "PSUBD", - x86_PSUBQ: "PSUBQ", - x86_PSUBSB: "PSUBSB", - x86_PSUBSW: "PSUBSW", - x86_PSUBUSB: "PSUBUSB", - x86_PSUBUSW: "PSUBUSW", - x86_PSUBW: "PSUBW", - x86_PTEST: "PTEST", - x86_PUNPCKHBW: "PUNPCKHBW", - x86_PUNPCKHDQ: "PUNPCKHDQ", - x86_PUNPCKHQDQ: "PUNPCKHQDQ", - x86_PUNPCKHWD: "PUNPCKHWD", - x86_PUNPCKLBW: "PUNPCKLBW", - x86_PUNPCKLDQ: "PUNPCKLDQ", - x86_PUNPCKLQDQ: "PUNPCKLQDQ", - x86_PUNPCKLWD: "PUNPCKLWD", - x86_PUSH: "PUSH", - x86_PUSHA: "PUSHA", - x86_PUSHAD: "PUSHAD", - x86_PUSHF: "PUSHF", - x86_PUSHFD: "PUSHFD", - x86_PUSHFQ: "PUSHFQ", - x86_PXOR: "PXOR", - x86_RCL: "RCL", - x86_RCPPS: "RCPPS", - x86_RCPSS: "RCPSS", - x86_RCR: "RCR", - x86_RDFSBASE: "RDFSBASE", - x86_RDGSBASE: "RDGSBASE", - x86_RDMSR: "RDMSR", - x86_RDPMC: "RDPMC", - x86_RDRAND: "RDRAND", - x86_RDTSC: "RDTSC", - x86_RDTSCP: "RDTSCP", - x86_RET: "RET", - x86_ROL: "ROL", - x86_ROR: "ROR", - x86_ROUNDPD: "ROUNDPD", - x86_ROUNDPS: "ROUNDPS", - x86_ROUNDSD: "ROUNDSD", - x86_ROUNDSS: "ROUNDSS", - x86_RSM: "RSM", - x86_RSQRTPS: "RSQRTPS", - x86_RSQRTSS: "RSQRTSS", - x86_SAHF: "SAHF", - x86_SAR: "SAR", - x86_SBB: "SBB", - x86_SCASB: "SCASB", - x86_SCASD: "SCASD", - x86_SCASQ: "SCASQ", - x86_SCASW: "SCASW", - x86_SETA: "SETA", - x86_SETAE: "SETAE", - x86_SETB: "SETB", - x86_SETBE: "SETBE", - x86_SETE: "SETE", - x86_SETG: "SETG", - x86_SETGE: "SETGE", - x86_SETL: "SETL", - x86_SETLE: "SETLE", - x86_SETNE: "SETNE", - x86_SETNO: "SETNO", - x86_SETNP: "SETNP", - x86_SETNS: "SETNS", - x86_SETO: "SETO", - x86_SETP: "SETP", - x86_SETS: "SETS", - x86_SFENCE: "SFENCE", - x86_SGDT: "SGDT", - x86_SHL: "SHL", - x86_SHLD: "SHLD", - x86_SHR: "SHR", - x86_SHRD: "SHRD", - x86_SHUFPD: "SHUFPD", - x86_SHUFPS: "SHUFPS", - x86_SIDT: "SIDT", - x86_SLDT: "SLDT", - x86_SMSW: "SMSW", - x86_SQRTPD: "SQRTPD", - x86_SQRTPS: "SQRTPS", - x86_SQRTSD: "SQRTSD", - x86_SQRTSS: "SQRTSS", - x86_STC: "STC", - x86_STD: "STD", - x86_STI: "STI", - x86_STMXCSR: "STMXCSR", - x86_STOSB: "STOSB", - x86_STOSD: "STOSD", - x86_STOSQ: "STOSQ", - x86_STOSW: "STOSW", - x86_STR: "STR", - x86_SUB: "SUB", - x86_SUBPD: "SUBPD", - x86_SUBPS: "SUBPS", - x86_SUBSD: "SUBSD", - x86_SUBSS: "SUBSS", - x86_SWAPGS: "SWAPGS", - x86_SYSCALL: "SYSCALL", - x86_SYSENTER: "SYSENTER", - x86_SYSEXIT: "SYSEXIT", - x86_SYSRET: "SYSRET", - x86_TEST: "TEST", - x86_TZCNT: "TZCNT", - x86_UCOMISD: "UCOMISD", - x86_UCOMISS: "UCOMISS", - x86_UD1: "UD1", - x86_UD2: "UD2", - x86_UNPCKHPD: "UNPCKHPD", - x86_UNPCKHPS: "UNPCKHPS", - x86_UNPCKLPD: "UNPCKLPD", - x86_UNPCKLPS: "UNPCKLPS", - x86_VERR: "VERR", - x86_VERW: "VERW", - x86_WBINVD: "WBINVD", - x86_WRFSBASE: "WRFSBASE", - x86_WRGSBASE: "WRGSBASE", - x86_WRMSR: "WRMSR", - x86_XABORT: "XABORT", - x86_XADD: "XADD", - x86_XBEGIN: "XBEGIN", - x86_XCHG: "XCHG", - x86_XEND: "XEND", - x86_XGETBV: "XGETBV", - x86_XLATB: "XLATB", - x86_XOR: "XOR", - x86_XORPD: "XORPD", - x86_XORPS: "XORPS", - x86_XRSTOR: "XRSTOR", - x86_XRSTOR64: "XRSTOR64", - x86_XRSTORS: "XRSTORS", - x86_XRSTORS64: "XRSTORS64", - x86_XSAVE: "XSAVE", - x86_XSAVE64: "XSAVE64", - x86_XSAVEC: "XSAVEC", - x86_XSAVEC64: "XSAVEC64", - x86_XSAVEOPT: "XSAVEOPT", - x86_XSAVEOPT64: "XSAVEOPT64", - x86_XSAVES: "XSAVES", - x86_XSAVES64: "XSAVES64", - x86_XSETBV: "XSETBV", - x86_XTEST: "XTEST", -} |