diff options
Diffstat (limited to 'src/pkg/runtime/cgo/gcc_arm.S')
| -rw-r--r-- | src/pkg/runtime/cgo/gcc_arm.S | 21 |
1 files changed, 14 insertions, 7 deletions
diff --git a/src/pkg/runtime/cgo/gcc_arm.S b/src/pkg/runtime/cgo/gcc_arm.S index 3ec6e5d97..17e98d91f 100644 --- a/src/pkg/runtime/cgo/gcc_arm.S +++ b/src/pkg/runtime/cgo/gcc_arm.S @@ -12,7 +12,14 @@ #endif /* - * void crosscall_arm2(void (*fn)(void), void *g, void *m) + * Because the assembler might target an earlier revision of the ISA + * by default, we must explicitly specify the ISA revision to ensure + * BLX is recognized as a valid instruction. + */ +.arch armv5t + +/* + * void crosscall_arm2(void (*fn)(void), void (*setmg_gcc)(void *m, void *g), void *m, void *g) * * Calling into the 5c tool chain, where all registers are caller save. * Called from standard ARM EABI, where r4-r11 are callee-save, so they @@ -21,12 +28,12 @@ .globl EXT(crosscall_arm2) EXT(crosscall_arm2): push {r4, r5, r6, r7, r8, r9, r10, r11, ip, lr} - mov r10, r1 // g - mov r9, r2 // m - mov r3, r0 // save r0, cgo_tls_set_gm will clobber it - bl EXT(x_cgo_save_gm) // save current g and m into TLS variable - mov lr, pc - mov pc, r3 + mov r4, r0 + mov r5, r1 + mov r0, r2 + mov r1, r3 + blx r5 // setmg(m, g) + blx r4 // fn() pop {r4, r5, r6, r7, r8, r9, r10, r11, ip, pc} .globl EXT(__stack_chk_fail_local) |