diff options
Diffstat (limited to 'src/pkg/sync/atomic/asm_386.s')
| -rw-r--r-- | src/pkg/sync/atomic/asm_386.s | 52 |
1 files changed, 27 insertions, 25 deletions
diff --git a/src/pkg/sync/atomic/asm_386.s b/src/pkg/sync/atomic/asm_386.s index a406852f4..7a98a61d8 100644 --- a/src/pkg/sync/atomic/asm_386.s +++ b/src/pkg/sync/atomic/asm_386.s @@ -2,17 +2,19 @@ // Use of this source code is governed by a BSD-style // license that can be found in the LICENSE file. +// +build !race + TEXT ·CompareAndSwapInt32(SB),7,$0 JMP ·CompareAndSwapUint32(SB) TEXT ·CompareAndSwapUint32(SB),7,$0 - MOVL valptr+0(FP), BP + MOVL addr+0(FP), BP MOVL old+4(FP), AX MOVL new+8(FP), CX // CMPXCHGL was introduced on the 486. LOCK CMPXCHGL CX, 0(BP) - SETEQ ret+12(FP) + SETEQ swapped+12(FP) RET TEXT ·CompareAndSwapUintptr(SB),7,$0 @@ -25,29 +27,29 @@ TEXT ·CompareAndSwapInt64(SB),7,$0 JMP ·CompareAndSwapUint64(SB) TEXT ·CompareAndSwapUint64(SB),7,$0 - MOVL valptr+0(FP), BP - MOVL oldlo+4(FP), AX - MOVL oldhi+8(FP), DX - MOVL newlo+12(FP), BX - MOVL newhi+16(FP), CX + MOVL addr+0(FP), BP + MOVL old+4(FP), AX + MOVL old+8(FP), DX + MOVL new+12(FP), BX + MOVL new+16(FP), CX // CMPXCHG8B was introduced on the Pentium. LOCK CMPXCHG8B 0(BP) - SETEQ ret+20(FP) + SETEQ swapped+20(FP) RET TEXT ·AddInt32(SB),7,$0 JMP ·AddUint32(SB) TEXT ·AddUint32(SB),7,$0 - MOVL valptr+0(FP), BP + MOVL addr+0(FP), BP MOVL delta+4(FP), AX MOVL AX, CX // XADD was introduced on the 486. LOCK XADDL AX, 0(BP) ADDL AX, CX - MOVL CX, ret+8(FP) + MOVL CX, new+8(FP) RET TEXT ·AddUintptr(SB),7,$0 @@ -58,24 +60,24 @@ TEXT ·AddInt64(SB),7,$0 TEXT ·AddUint64(SB),7,$0 // no XADDQ so use CMPXCHG8B loop - MOVL valptr+0(FP), BP + MOVL addr+0(FP), BP // DI:SI = delta - MOVL deltalo+4(FP), SI - MOVL deltahi+8(FP), DI - // DX:AX = *valptr + MOVL delta+4(FP), SI + MOVL delta+8(FP), DI + // DX:AX = *addr MOVL 0(BP), AX MOVL 4(BP), DX addloop: - // CX:BX = DX:AX (*valptr) + DI:SI (delta) + // CX:BX = DX:AX (*addr) + DI:SI (delta) MOVL AX, BX MOVL DX, CX ADDL SI, BX ADCL DI, CX - // if *valptr == DX:AX { - // *valptr = CX:BX + // if *addr == DX:AX { + // *addr = CX:BX // } else { - // DX:AX = *valptr + // DX:AX = *addr // } // all in one instruction LOCK @@ -85,24 +87,24 @@ addloop: // success // return CX:BX - MOVL BX, retlo+12(FP) - MOVL CX, rethi+16(FP) + MOVL BX, new+12(FP) + MOVL CX, new+16(FP) RET TEXT ·LoadInt32(SB),7,$0 JMP ·LoadUint32(SB) TEXT ·LoadUint32(SB),7,$0 - MOVL addrptr+0(FP), AX + MOVL addr+0(FP), AX MOVL 0(AX), AX - MOVL AX, ret+4(FP) + MOVL AX, val+4(FP) RET TEXT ·LoadInt64(SB),7,$0 JMP ·LoadUint64(SB) TEXT ·LoadUint64(SB),7,$0 - MOVL addrptr+0(FP), AX + MOVL addr+0(FP), AX // MOVQ and EMMS were introduced on the Pentium MMX. // MOVQ (%EAX), %MM0 BYTE $0x0f; BYTE $0x6f; BYTE $0x00 @@ -121,7 +123,7 @@ TEXT ·StoreInt32(SB),7,$0 JMP ·StoreUint32(SB) TEXT ·StoreUint32(SB),7,$0 - MOVL addrptr+0(FP), BP + MOVL addr+0(FP), BP MOVL val+4(FP), AX XCHGL AX, 0(BP) RET @@ -130,7 +132,7 @@ TEXT ·StoreInt64(SB),7,$0 JMP ·StoreUint64(SB) TEXT ·StoreUint64(SB),7,$0 - MOVL addrptr+0(FP), AX + MOVL addr+0(FP), AX // MOVQ and EMMS were introduced on the Pentium MMX. // MOVQ 0x8(%ESP), %MM0 BYTE $0x0f; BYTE $0x6f; BYTE $0x44; BYTE $0x24; BYTE $0x08 |