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authorIgor Pashev <pashev.igor@gmail.com>2012-11-02 20:15:39 +0400
committerIgor Pashev <pashev.igor@gmail.com>2012-11-02 20:15:39 +0400
commitb13154de3eca5ba28fbb4854d916cd0be5febeed (patch)
tree30f2e9e89ab71a2df837076ac68c3ba770230294 /tests/expected/lscpu/lscpu-x86_64-necem14
downloadutil-linux-b13154de3eca5ba28fbb4854d916cd0be5febeed.tar.gz
Imported Upstream version 2.22upstream/2.22upstream
Diffstat (limited to 'tests/expected/lscpu/lscpu-x86_64-necem14')
-rw-r--r--tests/expected/lscpu/lscpu-x86_64-necem1422
1 files changed, 22 insertions, 0 deletions
diff --git a/tests/expected/lscpu/lscpu-x86_64-necem14 b/tests/expected/lscpu/lscpu-x86_64-necem14
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index 0000000..91d626e
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-x86_64-necem14
@@ -0,0 +1,22 @@
+CPU op-mode(s): 32-bit, 64-bit
+CPU(s): 2
+Thread(s) per core: 2
+Core(s) per socket: 1
+Socket(s): 1
+NUMA node(s): 1
+Vendor ID: GenuineIntel
+CPU family: 15
+Model: 4
+Stepping: 3
+CPU MHz: 3790.599
+BogoMIPS: 7579.94
+L1d cache: 16K
+L2 cache: 2048K
+NUMA node0 CPU(s): 0,1
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L2
+0,0,0,0,,0,0
+1,0,0,0,,0,0