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diff --git a/tests/expected/lscpu/lscpu-i386-intels5000phb b/tests/expected/lscpu/lscpu-i386-intels5000phb
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+CPU op-mode(s): 32-bit, 64-bit
+CPU(s): 8
+Thread(s) per core: 1
+Core(s) per socket: 4
+Socket(s): 2
+Vendor ID: GenuineIntel
+CPU family: 6
+Model: 15
+Stepping: 7
+CPU MHz: 1596.044
+BogoMIPS: 3191.91
+Virtualization: VT-x
+L1d cache: 32K
+L1i cache: 32K
+L2 cache: 4096K
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2
+0,0,0,,,0,0,0
+1,1,0,,,1,1,0
+2,2,0,,,2,2,1
+3,3,0,,,3,3,1
+4,4,1,,,4,4,2
+5,5,1,,,5,5,2
+6,6,1,,,6,6,3
+7,7,1,,,7,7,3