diff options
author | doko <doko@6ca36cf4-e1d1-0310-8c6f-e303bb2178ca> | 2013-05-23 11:02:02 +0000 |
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committer | doko <doko@6ca36cf4-e1d1-0310-8c6f-e303bb2178ca> | 2013-05-23 11:02:02 +0000 |
commit | 52d305f0575ad1372e64d1e967669ea9d69c9a0a (patch) | |
tree | a248e69c95d50d3bc61999c707a00783cf5e865b | |
parent | b0db42e34d915fbdf29a241111db3cb7b9f2ec7a (diff) | |
download | gcc-47-52d305f0575ad1372e64d1e967669ea9d69c9a0a.tar.gz |
[ Daniel Schepler ]
* Update the x32 support from the branch.
git-svn-id: svn://svn.debian.org/svn/gcccvs/branches/sid/gcc-4.7@6779 6ca36cf4-e1d1-0310-8c6f-e303bb2178ca
-rw-r--r-- | debian/changelog | 5 | ||||
-rw-r--r-- | debian/patches/hjl-x32-gcc-4_7-branch-doc.diff | 6 | ||||
-rw-r--r-- | debian/patches/hjl-x32-gcc-4_7-branch.diff | 1262 |
3 files changed, 916 insertions, 357 deletions
diff --git a/debian/changelog b/debian/changelog index 1a1bd47..6ea4bfe 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,10 +1,15 @@ gcc-4.7 (4.7.3-5) UNRELEASED; urgency=low * Update to SVN 20130517 (r199025) from the gcc-4_7-branch. + + [ Matthias Klose ] * Update the Linaro support to the 4.7-2013.05 release. * libgo: Overwrite the setcontext_clobbers_tls check on mips*, fails on some buildds. + [ Daniel Schepler ] + * Update the x32 support from the branch. + -- Matthias Klose <doko@debian.org> Fri, 17 May 2013 20:53:14 +0200 gcc-4.7 (4.7.3-4) unstable; urgency=medium diff --git a/debian/patches/hjl-x32-gcc-4_7-branch-doc.diff b/debian/patches/hjl-x32-gcc-4_7-branch-doc.diff index 6df6040..11f3736 100644 --- a/debian/patches/hjl-x32-gcc-4_7-branch-doc.diff +++ b/debian/patches/hjl-x32-gcc-4_7-branch-doc.diff @@ -1,5 +1,5 @@ diff --git a/src/gcc/doc/invoke.texi b/src/gcc/doc/invoke.texi -index 221a435..e0dd198 100644 +index f989952..db09d61 100644 --- a/src/gcc/doc/invoke.texi +++ b/src/gcc/doc/invoke.texi @@ -637,7 +637,7 @@ Objective-C and Objective-C++ Dialects}. @@ -11,7 +11,7 @@ index 221a435..e0dd198 100644 -m32 -m64 -mx32 -mlarge-data-threshold=@var{num} @gol -msse2avx -mfentry -m8bit-idiv @gol -mavx256-split-unaligned-load -mavx256-split-unaligned-store} -@@ -13568,6 +13568,12 @@ Attempt to keep the stack boundary aligned to a 2 raised to @var{num} +@@ -13575,6 +13575,12 @@ Attempt to keep the stack boundary aligned to a 2 raised to @var{num} byte boundary. If @option{-mpreferred-stack-boundary} is not specified, the default is 4 (16 bytes or 128 bits). @@ -24,7 +24,7 @@ index 221a435..e0dd198 100644 @item -mincoming-stack-boundary=@var{num} @opindex mincoming-stack-boundary Assume the incoming stack is aligned to a 2 raised to @var{num} byte -@@ -13966,6 +13972,18 @@ be statically or dynamically linked. +@@ -13973,6 +13979,18 @@ be statically or dynamically linked. @opindex mcmodel=large Generate code for the large model: This model makes no assumptions about addresses and sizes of sections. diff --git a/debian/patches/hjl-x32-gcc-4_7-branch.diff b/debian/patches/hjl-x32-gcc-4_7-branch.diff index 860a53d..b0d3d4d 100644 --- a/debian/patches/hjl-x32-gcc-4_7-branch.diff +++ b/debian/patches/hjl-x32-gcc-4_7-branch.diff @@ -1,5 +1,6 @@ -Index: b/src/ChangeLog.x32 -=================================================================== +diff --git a/src/ChangeLog.x32 b/src/ChangeLog.x32 +new file mode 100644 +index 0000000..b633cf6 --- /dev/null +++ b/src/ChangeLog.x32 @@ -0,0 +1,4 @@ @@ -7,8 +8,9 @@ Index: b/src/ChangeLog.x32 + + Merge upstream change + * libtool.m4 (_LT_ENABLE_LOCK): Support x32. -Index: b/src/boehm-gc/ChangeLog.x32 -=================================================================== +diff --git a/src/boehm-gc/ChangeLog.x32 b/src/boehm-gc/ChangeLog.x32 +new file mode 100644 +index 0000000..0990077 --- /dev/null +++ b/src/boehm-gc/ChangeLog.x32 @@ -0,0 +1,9 @@ @@ -21,11 +23,11 @@ Index: b/src/boehm-gc/ChangeLog.x32 + Merge upstream changes + * include/private/gcconfig.h: (ALIGNMENT): Set to 4 for x32. + (CPP_WORDSZ): Set to 32 for x32. -Index: b/src/boehm-gc/configure -=================================================================== +diff --git a/src/boehm-gc/configure b/src/boehm-gc/configure +index c76ea44..aa61053 100755 --- a/src/boehm-gc/configure +++ b/src/boehm-gc/configure -@@ -6786,7 +6786,14 @@ +@@ -6786,7 +6786,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; x86_64-*linux*) @@ -41,8 +43,26 @@ Index: b/src/boehm-gc/configure ;; ppc64-*linux*|powerpc64-*linux*) LD="${LD-ld} -m elf32ppclinux" -Index: b/src/boehm-gc/include/private/gcconfig.h -=================================================================== +@@ -11304,7 +11311,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11307 "configure" ++#line 11314 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -11410,7 +11417,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11413 "configure" ++#line 11420 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +diff --git a/src/boehm-gc/include/private/gcconfig.h b/src/boehm-gc/include/private/gcconfig.h +index fb09cf7..0263c13 100644 --- a/src/boehm-gc/include/private/gcconfig.h +++ b/src/boehm-gc/include/private/gcconfig.h @@ -1974,8 +1974,13 @@ @@ -61,8 +81,9 @@ Index: b/src/boehm-gc/include/private/gcconfig.h # ifndef HBLKSIZE # define HBLKSIZE 4096 # endif -Index: b/src/gcc/ChangeLog.pr53383 -=================================================================== +diff --git a/src/gcc/ChangeLog.pr53383 b/src/gcc/ChangeLog.pr53383 +new file mode 100644 +index 0000000..bcb48cc --- /dev/null +++ b/src/gcc/ChangeLog.pr53383 @@ -0,0 +1,10 @@ @@ -76,8 +97,9 @@ Index: b/src/gcc/ChangeLog.pr53383 + + * config/i386/i386.h (MIN_STACK_BOUNDARY): Set to 64 for 64-bit + if SSE is disenabled. -Index: b/src/gcc/ChangeLog.x32 -=================================================================== +diff --git a/src/gcc/ChangeLog.x32 b/src/gcc/ChangeLog.x32 +new file mode 100644 +index 0000000..6b8c31a --- /dev/null +++ b/src/gcc/ChangeLog.x32 @@ -0,0 +1,343 @@ @@ -424,8 +446,9 @@ Index: b/src/gcc/ChangeLog.x32 + + * config/i386/i386.c (ix86_expand_prologue): Check Pmode to set + adjust_stack_insn. -Index: b/src/gcc/ada/ChangeLog.x32 -=================================================================== +diff --git a/src/gcc/ada/ChangeLog.x32 b/src/gcc/ada/ChangeLog.x32 +new file mode 100644 +index 0000000..5d5bca2 --- /dev/null +++ b/src/gcc/ada/ChangeLog.x32 @@ -0,0 +1,10 @@ @@ -439,11 +462,11 @@ Index: b/src/gcc/ada/ChangeLog.x32 + * gcc-interface/Makefile.in (arch): Set to x32 if MULTISUBDIR + is /x32. + Support x32. -Index: b/src/gcc/ada/gcc-interface/Makefile.in -=================================================================== +diff --git a/src/gcc/ada/gcc-interface/Makefile.in b/src/gcc/ada/gcc-interface/Makefile.in +index 9f20f07..96fab00 100644 --- a/src/gcc/ada/gcc-interface/Makefile.in +++ b/src/gcc/ada/gcc-interface/Makefile.in -@@ -350,6 +350,10 @@ +@@ -350,6 +350,10 @@ GNATMAKE_OBJS = a-except.o ali.o ali-util.o aspects.o s-casuti.o alloc.o \ ifeq ($(strip $(filter-out %x86_64, $(arch))),) ifeq ($(strip $(MULTISUBDIR)),/32) arch:=i686 @@ -454,21 +477,10 @@ Index: b/src/gcc/ada/gcc-interface/Makefile.in endif endif -@@ -2120,6 +2124,43 @@ +@@ -2131,6 +2135,43 @@ ifeq ($(strip $(filter-out %x86_64 linux%,$(arch) $(osys))),) + LIBRARY_VERSION := $(LIB_VERSION) + endif - TOOLS_TARGET_PAIRS = \ - mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb \ -+ indepsw.adb<indepsw-gnu.adb -+ -+ EXTRA_GNATRTL_NONTASKING_OBJS=g-sse.o g-ssvety.o -+ EXTRA_GNATRTL_TASKING_OBJS=s-linux.o a-exetim.o -+ EH_MECHANISM=-gcc -+ THREADSLIB=-lpthread -lrt -+ GNATLIB_SHARED=gnatlib-shared-dual -+ GMEM_LIB = gmemlib -+ LIBRARY_VERSION := $(LIB_VERSION) -+endif -+ +ifeq ($(strip $(filter-out %x32 linux%,$(arch) $(osys))),) + LIBGNAT_TARGET_PAIRS = \ + a-exetim.adb<a-exetim-posix.adb \ @@ -495,14 +507,25 @@ Index: b/src/gcc/ada/gcc-interface/Makefile.in + + TOOLS_TARGET_PAIRS = \ + mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb \ - indepsw.adb<indepsw-gnu.adb - - EXTRA_GNATRTL_NONTASKING_OBJS=g-sse.o g-ssvety.o -Index: b/src/gcc/ada/init.c -=================================================================== ++ indepsw.adb<indepsw-gnu.adb ++ ++ EXTRA_GNATRTL_NONTASKING_OBJS=g-sse.o g-ssvety.o ++ EXTRA_GNATRTL_TASKING_OBJS=s-linux.o a-exetim.o ++ EH_MECHANISM=-gcc ++ THREADSLIB=-lpthread -lrt ++ GNATLIB_SHARED=gnatlib-shared-dual ++ GMEM_LIB = gmemlib ++ LIBRARY_VERSION := $(LIB_VERSION) ++endif ++ + ifeq ($(strip $(filter-out darwin%,$(osys))),) + SO_OPTS = -shared-libgcc + LIBGNAT_TARGET_PAIRS = \ +diff --git a/src/gcc/ada/init.c b/src/gcc/ada/init.c +index d8f5735..5015332 100644 --- a/src/gcc/ada/init.c +++ b/src/gcc/ada/init.c -@@ -615,9 +615,13 @@ +@@ -615,9 +615,13 @@ __gnat_adjust_context_for_raise (int signo ATTRIBUTE_UNUSED, void *ucontext) if (signo == SIGSEGV && pc && *pc == 0x00240c83) mcontext->gregs[REG_ESP] += 4096 + 4 * sizeof (unsigned long); #elif defined (__x86_64__) @@ -519,11 +542,11 @@ Index: b/src/gcc/ada/init.c mcontext->gregs[REG_RSP] += 4096 + 4 * sizeof (unsigned long); #elif defined (__ia64__) /* ??? The IA-64 unwinder doesn't compensate for signals. */ -Index: b/src/gcc/ada/link.c -=================================================================== +diff --git a/src/gcc/ada/link.c b/src/gcc/ada/link.c +index 51ea759..5a5dabe 100644 --- a/src/gcc/ada/link.c +++ b/src/gcc/ada/link.c -@@ -165,7 +165,11 @@ +@@ -165,7 +165,11 @@ unsigned char __gnat_objlist_file_supported = 1; const char *__gnat_object_library_extension = ".a"; unsigned char __gnat_separate_run_path_options = 0; #if defined (__x86_64) @@ -535,11 +558,11 @@ Index: b/src/gcc/ada/link.c #else const char *__gnat_default_libgcc_subdir = "lib"; #endif -Index: b/src/gcc/config.gcc -=================================================================== +diff --git a/src/gcc/config.gcc b/src/gcc/config.gcc +index 7282a68..a53c608 100644 --- a/src/gcc/config.gcc +++ b/src/gcc/config.gcc -@@ -494,6 +494,10 @@ +@@ -494,6 +494,10 @@ fi case ${target} in i[34567]86-*-*) @@ -550,7 +573,7 @@ Index: b/src/gcc/config.gcc if test "x$enable_cld" = xyes; then tm_defines="${tm_defines} USE_IX86_CLD=1" fi -@@ -503,7 +507,24 @@ +@@ -503,7 +507,24 @@ i[34567]86-*-*) tm_file="vxworks-dummy.h ${tm_file}" ;; x86_64-*-*) @@ -576,7 +599,7 @@ Index: b/src/gcc/config.gcc if test "x$enable_cld" = xyes; then tm_defines="${tm_defines} USE_IX86_CLD=1" fi -@@ -1326,7 +1347,14 @@ +@@ -1326,7 +1347,14 @@ x86_64-*-linux* | x86_64-*-kfreebsd*-gnu | x86_64-*-knetbsd*-gnu) tmake_file="${tmake_file} i386/t-linux64" x86_multilibs="${with_multilib_list}" if test "$x86_multilibs" = "default"; then @@ -592,7 +615,7 @@ Index: b/src/gcc/config.gcc fi x86_multilibs=`echo $x86_multilibs | sed -e 's/,/ /g'` for x86_multilib in ${x86_multilibs}; do -@@ -3245,7 +3273,7 @@ +@@ -3245,7 +3273,7 @@ case "${target}" in ;; i[34567]86-*-* | x86_64-*-*) @@ -601,11 +624,11 @@ Index: b/src/gcc/config.gcc for which in arch arch_32 arch_64 cpu cpu_32 cpu_64 tune tune_32 tune_64; do eval "val=\$with_$which" case ${val} in -Index: b/src/gcc/config/arm/arm.opt -=================================================================== +diff --git a/src/gcc/config/arm/arm.opt b/src/gcc/config/arm/arm.opt +index 934aa35..e03a163 100644 --- a/src/gcc/config/arm/arm.opt +++ b/src/gcc/config/arm/arm.opt -@@ -59,7 +59,7 @@ +@@ -59,7 +59,7 @@ Target Report Mask(ABORT_NORETURN) Generate a call to abort if a noreturn function returns mapcs @@ -614,11 +637,11 @@ Index: b/src/gcc/config/arm/arm.opt mapcs-float Target Report Mask(APCS_FLOAT) -Index: b/src/gcc/config/cris/linux.opt -=================================================================== +diff --git a/src/gcc/config/cris/linux.opt b/src/gcc/config/cris/linux.opt +index a57c48d..e93bb53 100644 --- a/src/gcc/config/cris/linux.opt +++ b/src/gcc/config/cris/linux.opt -@@ -23,7 +23,7 @@ +@@ -23,7 +23,7 @@ mlinux Target Report RejectNegative Undocumented mno-gotplt @@ -627,8 +650,8 @@ Index: b/src/gcc/config/cris/linux.opt Together with -fpic and -fPIC, do not use GOTPLT references ; There's a small added setup cost with using GOTPLT references -Index: b/src/gcc/config/host-linux.c -=================================================================== +diff --git a/src/gcc/config/host-linux.c b/src/gcc/config/host-linux.c +index 94b7a0b..b535758 100644 --- a/src/gcc/config/host-linux.c +++ b/src/gcc/config/host-linux.c @@ -68,8 +68,10 @@ @@ -643,19 +666,20 @@ Index: b/src/gcc/config/host-linux.c #elif defined(__i386) # define TRY_EMPTY_VM_SPACE 0x60000000 #elif defined(__powerpc__) -Index: b/src/gcc/config/i386/biarch64.h -=================================================================== +diff --git a/src/gcc/config/i386/biarch64.h b/src/gcc/config/i386/biarch64.h +index 629ec98..0c3811e 100644 --- a/src/gcc/config/i386/biarch64.h +++ b/src/gcc/config/i386/biarch64.h -@@ -25,5 +25,5 @@ +@@ -25,5 +25,5 @@ a copy of the GCC Runtime Library Exception along with this program; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see <http://www.gnu.org/licenses/>. */ -#define TARGET_64BIT_DEFAULT OPTION_MASK_ISA_64BIT +#define TARGET_64BIT_DEFAULT (OPTION_MASK_ISA_64BIT | OPTION_MASK_ABI_64) #define TARGET_BI_ARCH 1 -Index: b/src/gcc/config/i386/biarchx32.h -=================================================================== +diff --git a/src/gcc/config/i386/biarchx32.h b/src/gcc/config/i386/biarchx32.h +new file mode 100644 +index 0000000..69d6722 --- /dev/null +++ b/src/gcc/config/i386/biarchx32.h @@ -0,0 +1,28 @@ @@ -687,8 +711,8 @@ Index: b/src/gcc/config/i386/biarchx32.h + +#define TARGET_64BIT_DEFAULT (OPTION_MASK_ISA_64BIT | OPTION_MASK_ABI_X32) +#define TARGET_BI_ARCH 2 -Index: b/src/gcc/config/i386/constraints.md -=================================================================== +diff --git a/src/gcc/config/i386/constraints.md b/src/gcc/config/i386/constraints.md +index 25327dd..a937196 100644 --- a/src/gcc/config/i386/constraints.md +++ b/src/gcc/config/i386/constraints.md @@ -18,7 +18,7 @@ @@ -717,11 +741,11 @@ Index: b/src/gcc/config/i386/constraints.md (define_constraint "Z" "32-bit unsigned integer constant, or a symbolic reference known to fit that range (for immediate operands in zero-extending x86-64 -Index: b/src/gcc/config/i386/gnu-user64.h -=================================================================== +diff --git a/src/gcc/config/i386/gnu-user64.h b/src/gcc/config/i386/gnu-user64.h +index fd96df4..ba72f24 100644 --- a/src/gcc/config/i386/gnu-user64.h +++ b/src/gcc/config/i386/gnu-user64.h -@@ -58,8 +58,13 @@ +@@ -58,8 +58,13 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #if TARGET_64BIT_DEFAULT #define SPEC_32 "m32" @@ -735,7 +759,7 @@ Index: b/src/gcc/config/i386/gnu-user64.h #else #define SPEC_32 "m64|mx32:;" #define SPEC_64 "m64" -@@ -95,7 +100,11 @@ +@@ -95,7 +100,11 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see %{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s" #if TARGET_64BIT_DEFAULT @@ -747,18 +771,18 @@ Index: b/src/gcc/config/i386/gnu-user64.h #else #define MULTILIB_DEFAULTS { "m32" } #endif -@@ -130,3 +139,6 @@ +@@ -130,3 +139,6 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #define TARGET_THREAD_SPLIT_STACK_OFFSET \ (TARGET_64BIT ? (TARGET_X32 ? 0x40 : 0x70) : 0x30) #endif + +#undef WCHAR_TYPE +#define WCHAR_TYPE (TARGET_LP64 ? "int" : "long int") -Index: b/src/gcc/config/i386/i386-opts.h -=================================================================== +diff --git a/src/gcc/config/i386/i386-opts.h b/src/gcc/config/i386/i386-opts.h +index 3cc2253..eea85fd 100644 --- a/src/gcc/config/i386/i386-opts.h +++ b/src/gcc/config/i386/i386-opts.h -@@ -71,6 +71,11 @@ +@@ -71,6 +71,11 @@ enum cmodel { CM_LARGE_PIC /* No assumptions. */ }; @@ -770,11 +794,11 @@ Index: b/src/gcc/config/i386/i386-opts.h enum asm_dialect { ASM_ATT, ASM_INTEL -Index: b/src/gcc/config/i386/i386.c -=================================================================== +diff --git a/src/gcc/config/i386/i386.c b/src/gcc/config/i386/i386.c +index 5bcb7e0..05cc627 100644 --- a/src/gcc/config/i386/i386.c +++ b/src/gcc/config/i386/i386.c -@@ -2448,6 +2448,8 @@ +@@ -2448,6 +2448,8 @@ static rtx (*ix86_gen_andsp) (rtx, rtx, rtx); static rtx (*ix86_gen_allocate_stack_worker) (rtx, rtx); static rtx (*ix86_gen_adjust_stack_and_probe) (rtx, rtx, rtx); static rtx (*ix86_gen_probe_stack_range) (rtx, rtx, rtx); @@ -783,7 +807,7 @@ Index: b/src/gcc/config/i386/i386.c /* Preferred alignment for stack boundary in bits. */ unsigned int ix86_preferred_stack_boundary; -@@ -2658,7 +2660,6 @@ +@@ -2658,7 +2660,6 @@ ix86_target_string (HOST_WIDE_INT isa, int flags, const char *arch, preceding options while match those first. */ static struct ix86_target_opts isa_opts[] = { @@ -791,7 +815,7 @@ Index: b/src/gcc/config/i386/i386.c { "-mfma4", OPTION_MASK_ISA_FMA4 }, { "-mfma", OPTION_MASK_ISA_FMA }, { "-mxop", OPTION_MASK_ISA_XOP }, -@@ -2730,6 +2731,7 @@ +@@ -2730,6 +2731,7 @@ ix86_target_string (HOST_WIDE_INT isa, int flags, const char *arch, size_t len; size_t line_len; size_t sep_len; @@ -799,7 +823,7 @@ Index: b/src/gcc/config/i386/i386.c memset (opts, '\0', sizeof (opts)); -@@ -2747,6 +2749,21 @@ +@@ -2747,6 +2749,21 @@ ix86_target_string (HOST_WIDE_INT isa, int flags, const char *arch, opts[num++][1] = tune; } @@ -821,7 +845,7 @@ Index: b/src/gcc/config/i386/i386.c /* Pick out the options in isa options. */ for (i = 0; i < ARRAY_SIZE (isa_opts); i++) { -@@ -3095,6 +3112,46 @@ +@@ -3095,6 +3112,46 @@ ix86_option_override_internal (bool main_args_p) sw = "attribute"; } @@ -868,7 +892,7 @@ Index: b/src/gcc/config/i386/i386.c #ifdef SUBTARGET_OVERRIDE_OPTIONS SUBTARGET_OVERRIDE_OPTIONS; #endif -@@ -3103,9 +3160,6 @@ +@@ -3103,9 +3160,6 @@ ix86_option_override_internal (bool main_args_p) SUBSUBTARGET_OVERRIDE_OPTIONS; #endif @@ -878,7 +902,7 @@ Index: b/src/gcc/config/i386/i386.c /* -fPIC is the default for x86_64. */ if (TARGET_MACHO && TARGET_64BIT) flag_pic = 2; -@@ -3174,6 +3228,17 @@ +@@ -3174,6 +3228,17 @@ ix86_option_override_internal (bool main_args_p) else ix86_arch_specified = 1; @@ -896,7 +920,7 @@ Index: b/src/gcc/config/i386/i386.c if (!global_options_set.x_ix86_abi) ix86_abi = DEFAULT_ABI; -@@ -3587,7 +3652,7 @@ +@@ -3587,7 +3652,7 @@ ix86_option_override_internal (bool main_args_p) ix86_preferred_stack_boundary = PREFERRED_STACK_BOUNDARY_DEFAULT; if (global_options_set.x_ix86_preferred_stack_boundary_arg) { @@ -905,7 +929,7 @@ Index: b/src/gcc/config/i386/i386.c int max = (TARGET_SEH ? 4 : 12); if (ix86_preferred_stack_boundary_arg < min -@@ -3750,11 +3815,33 @@ +@@ -3750,11 +3815,33 @@ ix86_option_override_internal (bool main_args_p) if (TARGET_64BIT) { ix86_gen_leave = gen_leave_rex64; @@ -940,7 +964,7 @@ Index: b/src/gcc/config/i386/i386.c ix86_gen_andsp = gen_anddi3; ix86_gen_allocate_stack_worker = gen_allocate_stack_worker_probe_di; ix86_gen_adjust_stack_and_probe = gen_adjust_stack_and_probedi; -@@ -3762,12 +3849,10 @@ +@@ -3762,12 +3849,10 @@ ix86_option_override_internal (bool main_args_p) } else { @@ -953,7 +977,7 @@ Index: b/src/gcc/config/i386/i386.c ix86_gen_andsp = gen_andsi3; ix86_gen_allocate_stack_worker = gen_allocate_stack_worker_probe_si; ix86_gen_adjust_stack_and_probe = gen_adjust_stack_and_probesi; -@@ -7239,8 +7324,8 @@ +@@ -7239,8 +7324,8 @@ function_value_64 (enum machine_mode orig_mode, enum machine_mode mode, } else if (POINTER_TYPE_P (valtype)) { @@ -964,7 +988,7 @@ Index: b/src/gcc/config/i386/i386.c } ret = construct_container (mode, orig_mode, valtype, 1, -@@ -7311,7 +7396,8 @@ +@@ -7311,7 +7396,8 @@ ix86_function_value (const_tree valtype, const_tree fntype_or_decl, return ix86_function_value_1 (valtype, fntype_or_decl, orig_mode, mode); } @@ -974,7 +998,7 @@ Index: b/src/gcc/config/i386/i386.c static enum machine_mode ix86_promote_function_mode (const_tree type, enum machine_mode mode, -@@ -7321,7 +7407,7 @@ +@@ -7321,7 +7407,7 @@ ix86_promote_function_mode (const_tree type, enum machine_mode mode, if (type != NULL_TREE && POINTER_TYPE_P (type)) { *punsignedp = POINTERS_EXTEND_UNSIGNED; @@ -983,7 +1007,7 @@ Index: b/src/gcc/config/i386/i386.c } return default_promote_function_mode (type, mode, punsignedp, fntype, for_return); -@@ -7599,12 +7685,13 @@ +@@ -7599,12 +7685,13 @@ setup_incoming_varargs_64 (CUMULATIVE_ARGS *cum) for (i = cum->regno; i < max; i++) { @@ -1000,7 +1024,7 @@ Index: b/src/gcc/config/i386/i386.c } if (ix86_varargs_fpr_size) -@@ -8664,8 +8751,11 @@ +@@ -8664,8 +8751,11 @@ gen_push (rtx arg) m->fs.cfa_offset += UNITS_PER_WORD; m->fs.sp_offset += UNITS_PER_WORD; @@ -1013,7 +1037,7 @@ Index: b/src/gcc/config/i386/i386.c gen_rtx_PRE_DEC (Pmode, stack_pointer_rtx)), arg); -@@ -8676,9 +8766,12 @@ +@@ -8676,9 +8766,12 @@ gen_push (rtx arg) static rtx gen_pop (rtx arg) { @@ -1027,7 +1051,7 @@ Index: b/src/gcc/config/i386/i386.c gen_rtx_POST_INC (Pmode, stack_pointer_rtx))); } -@@ -9153,7 +9246,7 @@ +@@ -9153,7 +9246,7 @@ ix86_emit_save_regs (void) for (regno = FIRST_PSEUDO_REGISTER - 1; regno-- > 0; ) if (!SSE_REGNO_P (regno) && ix86_save_reg (regno, true)) { @@ -1036,7 +1060,7 @@ Index: b/src/gcc/config/i386/i386.c RTX_FRAME_RELATED_P (insn) = 1; } } -@@ -9233,7 +9326,7 @@ +@@ -9233,7 +9326,7 @@ ix86_emit_save_regs_using_mov (HOST_WIDE_INT cfa_offset) for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) if (!SSE_REGNO_P (regno) && ix86_save_reg (regno, true)) { @@ -1045,7 +1069,7 @@ Index: b/src/gcc/config/i386/i386.c cfa_offset -= UNITS_PER_WORD; } } -@@ -9308,7 +9401,7 @@ +@@ -9308,7 +9401,7 @@ pro_epilogue_adjust_stack (rtx dest, rtx src, rtx offset, rtx insn; bool add_frame_related_expr = false; @@ -1054,7 +1078,7 @@ Index: b/src/gcc/config/i386/i386.c insn = gen_pro_epilogue_adjust_stack_si_add (dest, src, offset); else if (x86_64_immediate_operand (offset, DImode)) insn = gen_pro_epilogue_adjust_stack_di_add (dest, src, offset); -@@ -10180,7 +10273,7 @@ +@@ -10180,7 +10273,7 @@ ix86_expand_prologue (void) to implement macro RETURN_ADDR_RTX and intrinsic function expand_builtin_return_addr etc. */ t = plus_constant (crtl->drap_reg, -UNITS_PER_WORD); @@ -1063,7 +1087,7 @@ Index: b/src/gcc/config/i386/i386.c insn = emit_insn (gen_push (t)); RTX_FRAME_RELATED_P (insn) = 1; -@@ -10400,7 +10493,7 @@ +@@ -10400,7 +10493,7 @@ ix86_expand_prologue (void) emit_insn (ix86_gen_allocate_stack_worker (eax, eax)); /* Use the fact that AX still contains ALLOCATE. */ @@ -1072,7 +1096,7 @@ Index: b/src/gcc/config/i386/i386.c ? gen_pro_epilogue_adjust_stack_di_sub : gen_pro_epilogue_adjust_stack_si_sub); -@@ -10422,14 +10515,18 @@ +@@ -10422,14 +10515,18 @@ ix86_expand_prologue (void) if (r10_live && eax_live) { t = choose_baseaddr (m->fs.sp_offset - allocate); @@ -1094,7 +1118,7 @@ Index: b/src/gcc/config/i386/i386.c } } gcc_assert (m->fs.sp_offset == frame.stack_pointer_offset); -@@ -10599,7 +10696,7 @@ +@@ -10599,7 +10696,7 @@ ix86_emit_restore_regs_using_pop (void) for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) if (!SSE_REGNO_P (regno) && ix86_save_reg (regno, false)) @@ -1103,7 +1127,7 @@ Index: b/src/gcc/config/i386/i386.c } /* Emit code and notes for the LEAVE instruction. */ -@@ -10642,11 +10739,11 @@ +@@ -10642,11 +10739,11 @@ ix86_emit_restore_regs_using_mov (HOST_WIDE_INT cfa_offset, for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) if (!SSE_REGNO_P (regno) && ix86_save_reg (regno, maybe_eh_return)) { @@ -1117,7 +1141,7 @@ Index: b/src/gcc/config/i386/i386.c insn = emit_move_insn (reg, mem); if (m->fs.cfa_reg == crtl->drap_reg && regno == REGNO (crtl->drap_reg)) -@@ -11265,8 +11362,8 @@ +@@ -11265,8 +11362,8 @@ ix86_expand_split_stack_prologue (void) { rtx rax; @@ -1128,7 +1152,7 @@ Index: b/src/gcc/config/i386/i386.c use_reg (&call_fusage, rax); } -@@ -11345,8 +11442,8 @@ +@@ -11345,8 +11442,8 @@ ix86_expand_split_stack_prologue (void) /* If we are in 64-bit mode and this function uses a static chain, we saved %r10 in %rax before calling _morestack. */ if (TARGET_64BIT && DECL_STATIC_CHAIN (cfun->decl)) @@ -1139,7 +1163,7 @@ Index: b/src/gcc/config/i386/i386.c /* If this function calls va_start, we need to store a pointer to the arguments on the old stack, because they may not have been -@@ -11560,6 +11657,12 @@ +@@ -11560,6 +11657,12 @@ ix86_decompose_address (rtx addr, struct ix86_address *out) scale = 1 << scale; break; @@ -1152,7 +1176,7 @@ Index: b/src/gcc/config/i386/i386.c case UNSPEC: if (XINT (op, 1) == UNSPEC_TP && TARGET_TLS_DIRECT_SEG_REFS -@@ -11642,6 +11745,12 @@ +@@ -11642,6 +11745,12 @@ ix86_decompose_address (rtx addr, struct ix86_address *out) return 0; } @@ -1165,7 +1189,7 @@ Index: b/src/gcc/config/i386/i386.c /* Extract the integral value of scale. */ if (scale_rtx) { -@@ -12599,15 +12708,20 @@ +@@ -12599,15 +12708,20 @@ legitimize_pic_address (rtx orig, rtx reg) /* Load the thread pointer. If TO_REG is true, force it into a register. */ static rtx @@ -1190,7 +1214,7 @@ Index: b/src/gcc/config/i386/i386.c return tp; } -@@ -12659,6 +12773,7 @@ +@@ -12659,6 +12773,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) { rtx dest, base, off; rtx pic = NULL_RTX, tp = NULL_RTX; @@ -1198,7 +1222,7 @@ Index: b/src/gcc/config/i386/i386.c int type; switch (model) -@@ -12684,7 +12799,7 @@ +@@ -12684,7 +12799,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) else emit_insn (gen_tls_dynamic_gnu2_32 (dest, x, pic)); @@ -1207,7 +1231,7 @@ Index: b/src/gcc/config/i386/i386.c dest = force_reg (Pmode, gen_rtx_PLUS (Pmode, tp, dest)); if (GET_MODE (x) != Pmode) -@@ -12702,7 +12817,8 @@ +@@ -12702,7 +12817,8 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) rtx insns; start_sequence (); @@ -1217,7 +1241,7 @@ Index: b/src/gcc/config/i386/i386.c insns = get_insns (); end_sequence (); -@@ -12740,7 +12856,7 @@ +@@ -12740,7 +12856,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) else emit_insn (gen_tls_dynamic_gnu2_32 (base, tmp, pic)); @@ -1226,7 +1250,7 @@ Index: b/src/gcc/config/i386/i386.c set_unique_reg_note (get_last_insn (), REG_EQUAL, gen_rtx_MINUS (Pmode, tmp, tp)); } -@@ -12754,7 +12870,8 @@ +@@ -12754,7 +12870,8 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) rtx insns, eqv; start_sequence (); @@ -1236,7 +1260,7 @@ Index: b/src/gcc/config/i386/i386.c insns = get_insns (); end_sequence (); -@@ -12800,6 +12917,9 @@ +@@ -12800,6 +12917,9 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) return dest; } @@ -1246,7 +1270,7 @@ Index: b/src/gcc/config/i386/i386.c pic = NULL; type = UNSPEC_GOTNTPOFF; } -@@ -12822,22 +12942,23 @@ +@@ -12822,22 +12942,23 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) type = UNSPEC_INDNTPOFF; } @@ -1278,7 +1302,7 @@ Index: b/src/gcc/config/i386/i386.c dest = gen_reg_rtx (Pmode); emit_insn (gen_subsi3 (dest, base, off)); } -@@ -12851,12 +12972,13 @@ +@@ -12851,12 +12972,13 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) if (TARGET_64BIT || TARGET_ANY_GNU_TLS) { @@ -1294,7 +1318,7 @@ Index: b/src/gcc/config/i386/i386.c dest = gen_reg_rtx (Pmode); emit_insn (gen_subsi3 (dest, base, off)); } -@@ -13937,6 +14059,7 @@ +@@ -13937,6 +14059,7 @@ get_some_local_dynamic_name (void) ; -- print a semicolon (after prefixes due to bug in older gas). ~ -- print "i" if TARGET_AVX2, "f" otherwise. @ -- print a segment register of thread base pointer load @@ -1302,7 +1326,7 @@ Index: b/src/gcc/config/i386/i386.c */ void -@@ -14447,6 +14570,11 @@ +@@ -14447,6 +14570,11 @@ ix86_print_operand (FILE *file, rtx x, int code) putc (TARGET_AVX2 ? 'i' : 'f', file); return; @@ -1314,7 +1338,7 @@ Index: b/src/gcc/config/i386/i386.c default: output_operand_lossage ("invalid operand code '%c'", code); } -@@ -14587,8 +14715,8 @@ +@@ -14587,8 +14715,8 @@ ix86_print_operand (FILE *file, rtx x, int code) static bool ix86_print_operand_punct_valid_p (unsigned char code) { @@ -1325,7 +1349,7 @@ Index: b/src/gcc/config/i386/i386.c } /* Print a memory operand whose address is ADDR. */ -@@ -20552,7 +20680,7 @@ +@@ -20552,7 +20680,7 @@ ix86_split_to_parts (rtx operand, rtx *parts, enum machine_mode mode) gcc_assert (ok); operand = copy_rtx (operand); @@ -1334,7 +1358,7 @@ Index: b/src/gcc/config/i386/i386.c parts[0] = parts[1] = parts[2] = parts[3] = operand; return size; } -@@ -20705,7 +20833,7 @@ +@@ -20705,7 +20833,7 @@ ix86_split_long_move (rtx operands[]) if (push_operand (operands[0], VOIDmode)) { operands[0] = copy_rtx (operands[0]); @@ -1343,7 +1367,7 @@ Index: b/src/gcc/config/i386/i386.c } else operands[0] = gen_lowpart (DImode, operands[0]); -@@ -21260,14 +21388,9 @@ +@@ -21260,14 +21388,9 @@ ix86_adjust_counter (rtx countreg, HOST_WIDE_INT value) rtx ix86_zero_extend_to_Pmode (rtx exp) { @@ -1361,7 +1385,7 @@ Index: b/src/gcc/config/i386/i386.c } /* Divide COUNTREG by SCALE. */ -@@ -22295,11 +22418,11 @@ +@@ -22295,11 +22418,11 @@ ix86_expand_movmem (rtx dst, rtx src, rtx count_exp, rtx align_exp, gcc_unreachable (); case loop: need_zero_guard = true; @@ -1375,7 +1399,7 @@ Index: b/src/gcc/config/i386/i386.c break; case rep_prefix_8_byte: size_needed = 8; -@@ -22465,13 +22588,13 @@ +@@ -22465,13 +22588,13 @@ ix86_expand_movmem (rtx dst, rtx src, rtx count_exp, rtx align_exp, break; case loop: expand_set_or_movmem_via_loop (dst, src, destreg, srcreg, NULL, @@ -1391,7 +1415,7 @@ Index: b/src/gcc/config/i386/i386.c expected_size); break; case rep_prefix_8_byte: -@@ -22683,11 +22806,11 @@ +@@ -22683,11 +22806,11 @@ ix86_expand_setmem (rtx dst, rtx count_exp, rtx val_exp, rtx align_exp, gcc_unreachable (); case loop: need_zero_guard = true; @@ -1405,7 +1429,7 @@ Index: b/src/gcc/config/i386/i386.c break; case rep_prefix_8_byte: size_needed = 8; -@@ -22858,11 +22981,11 @@ +@@ -22858,11 +22981,11 @@ ix86_expand_setmem (rtx dst, rtx count_exp, rtx val_exp, rtx align_exp, break; case loop: expand_set_or_movmem_via_loop (dst, NULL, destreg, NULL, promoted_val, @@ -1419,7 +1443,7 @@ Index: b/src/gcc/config/i386/i386.c break; case rep_prefix_8_byte: expand_setmem_via_rep_stos (dst, destreg, promoted_val, count_exp, -@@ -23225,13 +23348,13 @@ +@@ -23225,13 +23348,13 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1, && !local_symbolic_operand (XEXP (fnaddr, 0), VOIDmode)) fnaddr = gen_rtx_MEM (QImode, construct_plt_address (XEXP (fnaddr, 0))); else if (sibcall @@ -1438,7 +1462,7 @@ Index: b/src/gcc/config/i386/i386.c } vec_len = 0; -@@ -24547,10 +24670,13 @@ +@@ -24547,10 +24670,13 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) /* Load the function address to r11. Try to load address using the shorter movl instead of movabs. We may want to support movq for kernel mode, but kernel does not use trampolines at @@ -1455,7 +1479,7 @@ Index: b/src/gcc/config/i386/i386.c mem = adjust_address (m_tramp, HImode, offset); emit_move_insn (mem, gen_int_mode (0xbb41, HImode)); -@@ -24569,9 +24695,9 @@ +@@ -24569,9 +24695,9 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) offset += 10; } @@ -1468,7 +1492,7 @@ Index: b/src/gcc/config/i386/i386.c { opcode = 0xba41; size = 6; -@@ -32215,7 +32341,7 @@ +@@ -32215,7 +32341,7 @@ x86_this_parameter (tree function) parm_regs = x86_64_ms_abi_int_parameter_registers; else parm_regs = x86_64_int_parameter_registers; @@ -1477,11 +1501,11 @@ Index: b/src/gcc/config/i386/i386.c } nregs = ix86_function_regparm (type, function); -Index: b/src/gcc/config/i386/i386.h -=================================================================== +diff --git a/src/gcc/config/i386/i386.h b/src/gcc/config/i386/i386.h +index 835ea10..0a9a77a 100644 --- a/src/gcc/config/i386/i386.h +++ b/src/gcc/config/i386/i386.h -@@ -42,7 +42,6 @@ +@@ -42,7 +42,6 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see /* Redefines for option macros. */ #define TARGET_64BIT OPTION_ISA_64BIT @@ -1489,7 +1513,7 @@ Index: b/src/gcc/config/i386/i386.h #define TARGET_MMX OPTION_ISA_MMX #define TARGET_3DNOW OPTION_ISA_3DNOW #define TARGET_3DNOW_A OPTION_ISA_3DNOW_A -@@ -76,7 +75,8 @@ +@@ -76,7 +75,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #define TARGET_RDRND OPTION_ISA_RDRND #define TARGET_F16C OPTION_ISA_F16C @@ -1499,7 +1523,7 @@ Index: b/src/gcc/config/i386/i386.h /* SSE4.1 defines round instructions */ #define OPTION_MASK_ISA_ROUND OPTION_MASK_ISA_SSE4_1 -@@ -705,7 +705,7 @@ +@@ -705,7 +705,7 @@ enum target_cpu_default #define MAIN_STACK_BOUNDARY (TARGET_64BIT ? 128 : 32) /* Minimum stack boundary. */ @@ -1508,7 +1532,7 @@ Index: b/src/gcc/config/i386/i386.h /* Boundary (in *bits*) on which the stack pointer prefers to be aligned; the compiler cannot rely on having this alignment. */ -@@ -1780,7 +1780,7 @@ +@@ -1780,7 +1780,7 @@ do { \ /* Specify the machine mode that pointers have. After generation of rtl, the compiler makes no further distinction between pointers and any other objects of this machine mode. */ @@ -1517,8 +1541,8 @@ Index: b/src/gcc/config/i386/i386.h /* A C expression whose value is zero if pointers that need to be extended from being `POINTER_SIZE' bits wide to `Pmode' are sign-extended and -Index: b/src/gcc/config/i386/i386.md -=================================================================== +diff --git a/src/gcc/config/i386/i386.md b/src/gcc/config/i386/i386.md +index b0e278e..8da9770 100644 --- a/src/gcc/config/i386/i386.md +++ b/src/gcc/config/i386/i386.md @@ -61,7 +61,9 @@ @@ -1531,7 +1555,7 @@ Index: b/src/gcc/config/i386/i386.md (define_c_enum "unspec" [ ;; Relocation specifiers -@@ -895,6 +897,11 @@ +@@ -896,6 +898,11 @@ ;; pointer-sized quantities. Exactly one of the two alternatives will match. (define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")]) @@ -1543,7 +1567,7 @@ Index: b/src/gcc/config/i386/i386.md ;; This mode iterator allows :PTR to be used for patterns that operate on ;; ptr_mode sized quantities. (define_mode_iterator PTR -@@ -1703,8 +1710,8 @@ +@@ -1704,8 +1711,8 @@ (set_attr "mode" "SI")]) (define_insn "*push<mode>2_prologue" @@ -1554,7 +1578,7 @@ Index: b/src/gcc/config/i386/i386.md (clobber (mem:BLK (scratch)))] "" "push{<imodesuffix>}\t%1" -@@ -1712,16 +1719,16 @@ +@@ -1713,16 +1720,16 @@ (set_attr "mode" "<MODE>")]) (define_insn "*pop<mode>1" @@ -1575,7 +1599,19 @@ Index: b/src/gcc/config/i386/i386.md (clobber (mem:BLK (scratch)))] "" "pop{<imodesuffix>}\t%0" -@@ -11129,10 +11136,15 @@ +@@ -3443,9 +3450,9 @@ + }) + + (define_insn "*zero_extendsidi2_rex64" +- [(set (match_operand:DI 0 "nonimmediate_operand" "=r,o,?*Ym,?!*y,?*Yi,*x") ++ [(set (match_operand:DI 0 "nonimmediate_operand" "=r ,o,?*Ym,?!*y,?*Yi,*x") + (zero_extend:DI +- (match_operand:SI 1 "nonimmediate_operand" "rm,0,r ,m ,r ,m")))] ++ (match_operand:SI 1 "x86_64_zext_general_operand" "rmWz,0,r ,m ,r ,m")))] + "TARGET_64BIT" + "@ + mov{l}\t{%1, %k0|%k0, %1} +@@ -11128,10 +11135,15 @@ (set_attr "modrm" "0")]) (define_expand "indirect_jump" @@ -1593,7 +1629,7 @@ Index: b/src/gcc/config/i386/i386.md "" "jmp\t%A0" [(set_attr "type" "ibr") -@@ -11174,12 +11186,13 @@ +@@ -11173,12 +11185,13 @@ operands[0] = expand_simple_binop (Pmode, code, op0, op1, NULL_RTX, 0, OPTAB_DIRECT); } @@ -1610,7 +1646,7 @@ Index: b/src/gcc/config/i386/i386.md (use (label_ref (match_operand 1 "" "")))] "" "jmp\t%A0" -@@ -11267,7 +11280,7 @@ +@@ -11266,7 +11279,7 @@ }) (define_insn_and_split "*call_vzeroupper" @@ -1619,7 +1655,7 @@ Index: b/src/gcc/config/i386/i386.md (match_operand 1 "" "")) (unspec [(match_operand 2 "const_int_operand" "")] UNSPEC_CALL_NEEDS_VZEROUPPER)] -@@ -11279,7 +11292,7 @@ +@@ -11278,7 +11291,7 @@ [(set_attr "type" "call")]) (define_insn "*call" @@ -1628,7 +1664,7 @@ Index: b/src/gcc/config/i386/i386.md (match_operand 1 "" ""))] "!SIBLING_CALL_P (insn)" "* return ix86_output_call_insn (insn, operands[0]);" -@@ -11331,7 +11344,7 @@ +@@ -11330,7 +11343,7 @@ [(set_attr "type" "call")]) (define_insn_and_split "*sibcall_vzeroupper" @@ -1637,7 +1673,7 @@ Index: b/src/gcc/config/i386/i386.md (match_operand 1 "" "")) (unspec [(match_operand 2 "const_int_operand" "")] UNSPEC_CALL_NEEDS_VZEROUPPER)] -@@ -11343,7 +11356,7 @@ +@@ -11342,7 +11355,7 @@ [(set_attr "type" "call")]) (define_insn "*sibcall" @@ -1646,7 +1682,7 @@ Index: b/src/gcc/config/i386/i386.md (match_operand 1 "" ""))] "SIBLING_CALL_P (insn)" "* return ix86_output_call_insn (insn, operands[0]);" -@@ -11440,7 +11453,7 @@ +@@ -11439,7 +11452,7 @@ (define_insn_and_split "*call_value_vzeroupper" [(set (match_operand 0 "" "") @@ -1655,7 +1691,7 @@ Index: b/src/gcc/config/i386/i386.md (match_operand 2 "" ""))) (unspec [(match_operand 3 "const_int_operand" "")] UNSPEC_CALL_NEEDS_VZEROUPPER)] -@@ -11453,7 +11466,7 @@ +@@ -11452,7 +11465,7 @@ (define_insn "*call_value" [(set (match_operand 0 "" "") @@ -1664,7 +1700,7 @@ Index: b/src/gcc/config/i386/i386.md (match_operand 2 "" "")))] "!SIBLING_CALL_P (insn)" "* return ix86_output_call_insn (insn, operands[1]);" -@@ -11461,7 +11474,7 @@ +@@ -11460,7 +11473,7 @@ (define_insn_and_split "*sibcall_value_vzeroupper" [(set (match_operand 0 "" "") @@ -1673,7 +1709,7 @@ Index: b/src/gcc/config/i386/i386.md (match_operand 2 "" ""))) (unspec [(match_operand 3 "const_int_operand" "")] UNSPEC_CALL_NEEDS_VZEROUPPER)] -@@ -11474,7 +11487,7 @@ +@@ -11473,7 +11486,7 @@ (define_insn "*sibcall_value" [(set (match_operand 0 "" "") @@ -1682,7 +1718,7 @@ Index: b/src/gcc/config/i386/i386.md (match_operand 2 "" "")))] "SIBLING_CALL_P (insn)" "* return ix86_output_call_insn (insn, operands[1]);" -@@ -12579,7 +12592,7 @@ +@@ -12578,7 +12591,7 @@ [(set (match_operand:SI 0 "register_operand" "=a") (unspec:SI [(match_operand:SI 1 "register_operand" "b") @@ -1691,7 +1727,7 @@ Index: b/src/gcc/config/i386/i386.md (match_operand:SI 3 "constant_call_address_operand" "z")] UNSPEC_TLS_GD)) (clobber (match_scratch:SI 4 "=d")) -@@ -12604,20 +12617,20 @@ +@@ -12603,20 +12616,20 @@ [(parallel [(set (match_operand:SI 0 "register_operand" "") (unspec:SI [(match_operand:SI 2 "register_operand" "") @@ -1720,7 +1756,7 @@ Index: b/src/gcc/config/i386/i386.md "TARGET_64BIT" { if (!TARGET_X32) -@@ -12634,14 +12647,15 @@ +@@ -12633,14 +12646,15 @@ (set (attr "length") (symbol_ref "TARGET_X32 ? 15 : 16"))]) @@ -1742,7 +1778,7 @@ Index: b/src/gcc/config/i386/i386.md (define_insn "*tls_local_dynamic_base_32_gnu" [(set (match_operand:SI 0 "register_operand" "=a") -@@ -12678,12 +12692,12 @@ +@@ -12677,12 +12691,12 @@ (clobber (match_scratch:SI 4 "")) (clobber (reg:CC FLAGS_REG))])]) @@ -1761,7 +1797,7 @@ Index: b/src/gcc/config/i386/i386.md "TARGET_64BIT" { output_asm_insn -@@ -12695,13 +12709,14 @@ +@@ -12694,13 +12708,14 @@ [(set_attr "type" "multi") (set_attr "length" "12")]) @@ -1781,7 +1817,7 @@ Index: b/src/gcc/config/i386/i386.md ;; Local dynamic of a single variable is a lose. Show combine how ;; to convert that back to global dynamic. -@@ -12713,7 +12728,7 @@ +@@ -12712,7 +12727,7 @@ (match_operand:SI 2 "constant_call_address_operand" "z")] UNSPEC_TLS_LD_BASE) (const:SI (unspec:SI @@ -1790,7 +1826,7 @@ Index: b/src/gcc/config/i386/i386.md UNSPEC_DTPOFF)))) (clobber (match_scratch:SI 4 "=d")) (clobber (match_scratch:SI 5 "=c")) -@@ -12811,7 +12826,7 @@ +@@ -12810,7 +12825,7 @@ (define_insn "tls_initial_exec_64_sun" [(set (match_operand:DI 0 "register_operand" "=a") (unspec:DI @@ -1799,7 +1835,7 @@ Index: b/src/gcc/config/i386/i386.md UNSPEC_TLS_IE_SUN)) (clobber (reg:CC FLAGS_REG))] "TARGET_64BIT && TARGET_SUN_TLS" -@@ -12828,7 +12843,7 @@ +@@ -12827,7 +12842,7 @@ [(set (match_dup 3) (plus:SI (match_operand:SI 2 "register_operand" "") (const:SI @@ -1808,7 +1844,7 @@ Index: b/src/gcc/config/i386/i386.md UNSPEC_TLSDESC)))) (parallel [(set (match_operand:SI 0 "register_operand" "") -@@ -12846,7 +12861,7 @@ +@@ -12845,7 +12860,7 @@ [(set (match_operand:SI 0 "register_operand" "=r") (plus:SI (match_operand:SI 1 "register_operand" "b") (const:SI @@ -1817,7 +1853,7 @@ Index: b/src/gcc/config/i386/i386.md UNSPEC_TLSDESC))))] "!TARGET_64BIT && TARGET_GNU2_TLS" "lea{l}\t{%E2@TLSDESC(%1), %0|%0, %E2@TLSDESC[%1]}" -@@ -12857,7 +12872,7 @@ +@@ -12856,7 +12871,7 @@ (define_insn "*tls_dynamic_gnu2_call_32" [(set (match_operand:SI 0 "register_operand" "=a") @@ -1826,7 +1862,7 @@ Index: b/src/gcc/config/i386/i386.md (match_operand:SI 2 "register_operand" "0") ;; we have to make sure %ebx still points to the GOT (match_operand:SI 3 "register_operand" "b") -@@ -12873,13 +12888,13 @@ +@@ -12872,13 +12887,13 @@ (define_insn_and_split "*tls_dynamic_gnu2_combine_32" [(set (match_operand:SI 0 "register_operand" "=&a") (plus:SI @@ -1842,7 +1878,7 @@ Index: b/src/gcc/config/i386/i386.md UNSPEC_DTPOFF)))) (clobber (reg:CC FLAGS_REG))] "!TARGET_64BIT && TARGET_GNU2_TLS" -@@ -12933,7 +12948,7 @@ +@@ -12932,7 +12947,7 @@ (define_insn_and_split "*tls_dynamic_gnu2_combine_64" [(set (match_operand:DI 0 "register_operand" "=&a") (plus:DI @@ -1851,7 +1887,7 @@ Index: b/src/gcc/config/i386/i386.md (match_operand:DI 3 "" "") (reg:DI SP_REG)] UNSPEC_TLSDESC) -@@ -15729,17 +15744,17 @@ +@@ -15728,17 +15743,17 @@ "ix86_current_function_needs_cld = 1;") (define_insn "*strmovdi_rex_1" @@ -1878,7 +1914,7 @@ Index: b/src/gcc/config/i386/i386.md [(set_attr "type" "str") (set_attr "memory" "both") (set_attr "mode" "DI")]) -@@ -15754,7 +15769,7 @@ +@@ -15753,7 +15768,7 @@ (plus:P (match_dup 3) (const_int 4)))] "!(fixed_regs[SI_REG] || fixed_regs[DI_REG])" @@ -1887,7 +1923,7 @@ Index: b/src/gcc/config/i386/i386.md [(set_attr "type" "str") (set_attr "memory" "both") (set_attr "mode" "SI")]) -@@ -15769,7 +15784,7 @@ +@@ -15768,7 +15783,7 @@ (plus:P (match_dup 3) (const_int 2)))] "!(fixed_regs[SI_REG] || fixed_regs[DI_REG])" @@ -1896,7 +1932,7 @@ Index: b/src/gcc/config/i386/i386.md [(set_attr "type" "str") (set_attr "memory" "both") (set_attr "mode" "HI")]) -@@ -15784,7 +15799,7 @@ +@@ -15783,7 +15798,7 @@ (plus:P (match_dup 3) (const_int 1)))] "!(fixed_regs[SI_REG] || fixed_regs[DI_REG])" @@ -1905,7 +1941,7 @@ Index: b/src/gcc/config/i386/i386.md [(set_attr "type" "str") (set_attr "memory" "both") (set (attr "prefix_rex") -@@ -15807,20 +15822,20 @@ +@@ -15806,20 +15821,20 @@ "ix86_current_function_needs_cld = 1;") (define_insn "*rep_movdi_rex64" @@ -1935,7 +1971,7 @@ Index: b/src/gcc/config/i386/i386.md [(set_attr "type" "str") (set_attr "prefix_rep" "1") (set_attr "memory" "both") -@@ -15839,7 +15854,7 @@ +@@ -15838,7 +15853,7 @@ (mem:BLK (match_dup 4))) (use (match_dup 5))] "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" @@ -1944,7 +1980,7 @@ Index: b/src/gcc/config/i386/i386.md [(set_attr "type" "str") (set_attr "prefix_rep" "1") (set_attr "memory" "both") -@@ -15856,7 +15871,7 @@ +@@ -15855,7 +15870,7 @@ (mem:BLK (match_dup 4))) (use (match_dup 5))] "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" @@ -1953,7 +1989,7 @@ Index: b/src/gcc/config/i386/i386.md [(set_attr "type" "str") (set_attr "prefix_rep" "1") (set_attr "memory" "both") -@@ -15917,14 +15932,14 @@ +@@ -15917,15 +15932,15 @@ "ix86_current_function_needs_cld = 1;") (define_insn "*strsetdi_rex_1" @@ -1962,10 +1998,11 @@ Index: b/src/gcc/config/i386/i386.md (match_operand:DI 2 "register_operand" "a")) - (set (match_operand:DI 0 "register_operand" "=D") - (plus:DI (match_dup 1) -- (const_int 8)))] +- (const_int 8))) + (set (match_operand:P 0 "register_operand" "=D") + (plus:P (match_dup 1) -+ (const_int 8)))] ++ (const_int 8))) + (unspec [(const_int 0)] UNSPEC_STOS)] "TARGET_64BIT && !(fixed_regs[AX_REG] || fixed_regs[DI_REG])" - "stosq" @@ -1973,34 +2010,34 @@ Index: b/src/gcc/config/i386/i386.md [(set_attr "type" "str") (set_attr "memory" "store") (set_attr "mode" "DI")]) -@@ -15936,7 +15951,7 @@ - (plus:P (match_dup 1) - (const_int 4)))] +@@ -15938,7 +15953,7 @@ + (const_int 4))) + (unspec [(const_int 0)] UNSPEC_STOS)] "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" - "stos{l|d}" + "%^stos{l|d}" [(set_attr "type" "str") (set_attr "memory" "store") (set_attr "mode" "SI")]) -@@ -15948,7 +15963,7 @@ - (plus:P (match_dup 1) - (const_int 2)))] +@@ -15951,7 +15966,7 @@ + (const_int 2))) + (unspec [(const_int 0)] UNSPEC_STOS)] "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" - "stosw" + "%^stosw" [(set_attr "type" "str") (set_attr "memory" "store") (set_attr "mode" "HI")]) -@@ -15960,7 +15975,7 @@ - (plus:P (match_dup 1) - (const_int 1)))] +@@ -15964,7 +15979,7 @@ + (const_int 1))) + (unspec [(const_int 0)] UNSPEC_STOS)] "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" - "stosb" + "%^stosb" [(set_attr "type" "str") (set_attr "memory" "store") (set (attr "prefix_rex") -@@ -15981,18 +15996,18 @@ +@@ -15985,18 +16000,18 @@ "ix86_current_function_needs_cld = 1;") (define_insn "*rep_stosdi_rex64" @@ -2025,7 +2062,7 @@ Index: b/src/gcc/config/i386/i386.md [(set_attr "type" "str") (set_attr "prefix_rep" "1") (set_attr "memory" "store") -@@ -16009,7 +16024,7 @@ +@@ -16013,7 +16028,7 @@ (use (match_operand:SI 2 "register_operand" "a")) (use (match_dup 4))] "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])" @@ -2034,7 +2071,7 @@ Index: b/src/gcc/config/i386/i386.md [(set_attr "type" "str") (set_attr "prefix_rep" "1") (set_attr "memory" "store") -@@ -16025,7 +16040,7 @@ +@@ -16029,7 +16044,7 @@ (use (match_operand:QI 2 "register_operand" "a")) (use (match_dup 4))] "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])" @@ -2043,7 +2080,7 @@ Index: b/src/gcc/config/i386/i386.md [(set_attr "type" "str") (set_attr "prefix_rep" "1") (set_attr "memory" "store") -@@ -16146,7 +16161,7 @@ +@@ -16150,7 +16165,7 @@ (clobber (match_operand:P 1 "register_operand" "=D")) (clobber (match_operand:P 2 "register_operand" "=c"))] "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" @@ -2052,7 +2089,7 @@ Index: b/src/gcc/config/i386/i386.md [(set_attr "type" "str") (set_attr "mode" "QI") (set (attr "prefix_rex") -@@ -16186,7 +16201,7 @@ +@@ -16190,7 +16205,7 @@ (clobber (match_operand:P 1 "register_operand" "=D")) (clobber (match_operand:P 2 "register_operand" "=c"))] "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" @@ -2061,7 +2098,7 @@ Index: b/src/gcc/config/i386/i386.md [(set_attr "type" "str") (set_attr "mode" "QI") (set (attr "prefix_rex") -@@ -16227,7 +16242,7 @@ +@@ -16231,7 +16246,7 @@ (clobber (match_operand:P 1 "register_operand" "=D")) (clobber (reg:CC FLAGS_REG))] "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])" @@ -2070,7 +2107,7 @@ Index: b/src/gcc/config/i386/i386.md [(set_attr "type" "str") (set_attr "mode" "QI") (set (attr "prefix_rex") -@@ -17372,131 +17387,131 @@ +@@ -17376,131 +17391,131 @@ ;; alternative when no register is available later. (define_peephole2 @@ -2240,7 +2277,7 @@ Index: b/src/gcc/config/i386/i386.md ;; Convert compares with 1 to shorter inc/dec operations when CF is not ;; required and register dies. Similarly for 128 to -128. -@@ -17607,7 +17622,7 @@ +@@ -17611,7 +17626,7 @@ ;; leal (%edx,%eax,4), %eax (define_peephole2 @@ -2249,7 +2286,7 @@ Index: b/src/gcc/config/i386/i386.md (parallel [(set (match_operand 0 "register_operand" "") (ashift (match_operand 1 "register_operand" "") (match_operand 2 "const_int_operand" ""))) -@@ -17633,16 +17648,16 @@ +@@ -17637,16 +17652,16 @@ enum machine_mode op1mode = GET_MODE (operands[1]); enum machine_mode mode = op1mode == DImode ? DImode : SImode; int scale = 1 << INTVAL (operands[2]); @@ -2272,7 +2309,7 @@ Index: b/src/gcc/config/i386/i386.md operands[5] = gen_rtx_SUBREG (op1mode, operands[5], 0); operands[0] = dest; }) -@@ -18033,7 +18048,7 @@ +@@ -18037,7 +18052,7 @@ { rtx (*insn)(rtx); @@ -2281,11 +2318,11 @@ Index: b/src/gcc/config/i386/i386.md ? gen_lwp_slwpcbdi : gen_lwp_slwpcbsi); -Index: b/src/gcc/config/i386/i386.opt -=================================================================== +diff --git a/src/gcc/config/i386/i386.opt b/src/gcc/config/i386/i386.opt +index 6c516e7..97130e1 100644 --- a/src/gcc/config/i386/i386.opt +++ b/src/gcc/config/i386/i386.opt -@@ -159,6 +159,20 @@ +@@ -159,6 +159,20 @@ Enum(cmodel) String(32) Value(CM_32) EnumValue Enum(cmodel) String(kernel) Value(CM_KERNEL) @@ -2306,7 +2343,7 @@ Index: b/src/gcc/config/i386/i386.opt mcpu= Target RejectNegative Joined Undocumented Alias(mtune=) Warn(%<-mcpu=%> is deprecated; use %<-mtune=%> or %<-march=%> instead) -@@ -204,7 +218,7 @@ +@@ -204,7 +218,7 @@ EnumValue Enum(fpmath_unit) String(both) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) mhard-float @@ -2315,7 +2352,7 @@ Index: b/src/gcc/config/i386/i386.opt Use hardware fp mieee-fp -@@ -411,11 +425,11 @@ +@@ -411,11 +425,11 @@ Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) Var(ix86_isa_f Generate 32bit i386 code m64 @@ -2329,7 +2366,7 @@ Index: b/src/gcc/config/i386/i386.opt Generate 32bit x86-64 code mmmx -@@ -455,11 +469,11 @@ +@@ -455,11 +469,11 @@ Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation msse4 @@ -2343,8 +2380,8 @@ Index: b/src/gcc/config/i386/i386.opt Do not support SSE4.1 and SSE4.2 built-in functions and code generation msse5 -Index: b/src/gcc/config/i386/predicates.md -=================================================================== +diff --git a/src/gcc/config/i386/predicates.md b/src/gcc/config/i386/predicates.md +index 9e31291..3cafdb9 100644 --- a/src/gcc/config/i386/predicates.md +++ b/src/gcc/config/i386/predicates.md @@ -1,5 +1,5 @@ @@ -2416,8 +2453,8 @@ Index: b/src/gcc/config/i386/predicates.md (match_operand 0 "register_no_elim_operand"))) ;; Match exactly zero. -Index: b/src/gcc/config/i386/sse.md -=================================================================== +diff --git a/src/gcc/config/i386/sse.md b/src/gcc/config/i386/sse.md +index 8bffa52..c32ddf0 100644 --- a/src/gcc/config/i386/sse.md +++ b/src/gcc/config/i386/sse.md @@ -8083,8 +8083,8 @@ @@ -2431,11 +2468,11 @@ Index: b/src/gcc/config/i386/sse.md (match_operand:SI 1 "register_operand" "c") (match_operand:SI 2 "register_operand" "d")] UNSPECV_MONITOR)] -Index: b/src/gcc/config/m68k/m68k.opt -=================================================================== +diff --git a/src/gcc/config/m68k/m68k.opt b/src/gcc/config/m68k/m68k.opt +index 14428fc..00bc2d5 100644 --- a/src/gcc/config/m68k/m68k.opt +++ b/src/gcc/config/m68k/m68k.opt -@@ -136,7 +136,7 @@ +@@ -136,7 +136,7 @@ Target RejectNegative Generate code for a Fido A mhard-float @@ -2444,11 +2481,11 @@ Index: b/src/gcc/config/m68k/m68k.opt Generate code which uses hardware floating point instructions mid-shared-library -Index: b/src/gcc/config/mep/mep.opt -=================================================================== +diff --git a/src/gcc/config/mep/mep.opt b/src/gcc/config/mep/mep.opt +index 38b8f80..0ea19e6 100644 --- a/src/gcc/config/mep/mep.opt +++ b/src/gcc/config/mep/mep.opt -@@ -55,7 +55,7 @@ +@@ -55,7 +55,7 @@ Target Mask(COP) Enable MeP Coprocessor mcop32 @@ -2457,11 +2494,11 @@ Index: b/src/gcc/config/mep/mep.opt Enable MeP Coprocessor with 32-bit registers mcop64 -Index: b/src/gcc/config/pa/pa-hpux.opt -=================================================================== +diff --git a/src/gcc/config/pa/pa-hpux.opt b/src/gcc/config/pa/pa-hpux.opt +index ed5d6a4..b709b83 100644 --- a/src/gcc/config/pa/pa-hpux.opt +++ b/src/gcc/config/pa/pa-hpux.opt -@@ -23,7 +23,7 @@ +@@ -23,7 +23,7 @@ Variable int flag_pa_unix = TARGET_HPUX_11_31 ? 2003 : TARGET_HPUX_11_11 ? 1998 : TARGET_HPUX_10_10 ? 1995 : 1993 msio @@ -2470,8 +2507,8 @@ Index: b/src/gcc/config/pa/pa-hpux.opt Generate cpp defines for server IO munix=93 -Index: b/src/gcc/config/pa/pa64-hpux.opt -=================================================================== +diff --git a/src/gcc/config/pa/pa64-hpux.opt b/src/gcc/config/pa/pa64-hpux.opt +index 36b1c61..56ca35e 100644 --- a/src/gcc/config/pa/pa64-hpux.opt +++ b/src/gcc/config/pa/pa64-hpux.opt @@ -19,7 +19,7 @@ @@ -2483,21 +2520,21 @@ Index: b/src/gcc/config/pa/pa64-hpux.opt Assume code will be linked by GNU ld mhp-ld -Index: b/src/gcc/config/picochip/picochip.opt -=================================================================== +diff --git a/src/gcc/config/picochip/picochip.opt b/src/gcc/config/picochip/picochip.opt +index 4726f49..a4b25e5 100644 --- a/src/gcc/config/picochip/picochip.opt +++ b/src/gcc/config/picochip/picochip.opt -@@ -43,4 +43,4 @@ +@@ -43,4 +43,4 @@ Target Mask(INEFFICIENT_WARNINGS) Generate warnings when inefficient code is known to be generated. minefficient -Target Mask(INEFFICIENT_WARNINGS) MaskExists Undocumented +Target Mask(INEFFICIENT_WARNINGS) Undocumented -Index: b/src/gcc/config/rs6000/sysv4.opt -=================================================================== +diff --git a/src/gcc/config/rs6000/sysv4.opt b/src/gcc/config/rs6000/sysv4.opt +index 0d8d955..474203d 100644 --- a/src/gcc/config/rs6000/sysv4.opt +++ b/src/gcc/config/rs6000/sysv4.opt -@@ -66,7 +66,7 @@ +@@ -66,7 +66,7 @@ Target Report RejectNegative Mask(LITTLE_ENDIAN) Produce little endian code mlittle @@ -2506,11 +2543,11 @@ Index: b/src/gcc/config/rs6000/sysv4.opt Produce little endian code mbig-endian -Index: b/src/gcc/config/sh/sh.opt -=================================================================== +diff --git a/src/gcc/config/sh/sh.opt b/src/gcc/config/sh/sh.opt +index 0389fce..969bff0 100644 --- a/src/gcc/config/sh/sh.opt +++ b/src/gcc/config/sh/sh.opt -@@ -320,7 +320,7 @@ +@@ -320,7 +320,7 @@ Target Report RejectNegative Mask(RELAX) Shorten address references during linking mrenesas @@ -2519,8 +2556,8 @@ Index: b/src/gcc/config/sh/sh.opt Follow Renesas (formerly Hitachi) / SuperH calling conventions msoft-atomic -Index: b/src/gcc/config/sparc/long-double-switch.opt -=================================================================== +diff --git a/src/gcc/config/sparc/long-double-switch.opt b/src/gcc/config/sparc/long-double-switch.opt +index eb3c1a0..8ad32bd 100644 --- a/src/gcc/config/sparc/long-double-switch.opt +++ b/src/gcc/config/sparc/long-double-switch.opt @@ -19,7 +19,7 @@ @@ -2532,11 +2569,11 @@ Index: b/src/gcc/config/sparc/long-double-switch.opt Use 128-bit long double mlong-double-64 -Index: b/src/gcc/config/sparc/sparc.opt -=================================================================== +diff --git a/src/gcc/config/sparc/sparc.opt b/src/gcc/config/sparc/sparc.opt +index 01f3d43..58ba6b7 100644 --- a/src/gcc/config/sparc/sparc.opt +++ b/src/gcc/config/sparc/sparc.opt -@@ -30,7 +30,7 @@ +@@ -30,7 +30,7 @@ Target Report Mask(FPU) Use hardware FP mhard-float @@ -2545,11 +2582,11 @@ Index: b/src/gcc/config/sparc/sparc.opt Use hardware FP msoft-float -Index: b/src/gcc/config/v850/v850.opt -=================================================================== +diff --git a/src/gcc/config/v850/v850.opt b/src/gcc/config/v850/v850.opt +index 12b0937..8fe244b 100644 --- a/src/gcc/config/v850/v850.opt +++ b/src/gcc/config/v850/v850.opt -@@ -102,7 +102,7 @@ +@@ -102,7 +102,7 @@ Target RejectNegative Mask(V850E1) Compile for the v850e1 processor mv850es @@ -2558,11 +2595,11 @@ Index: b/src/gcc/config/v850/v850.opt Compile for the v850es variant of the v850e1 mv850e2 -Index: b/src/gcc/config/vax/vax.opt -=================================================================== +diff --git a/src/gcc/config/vax/vax.opt b/src/gcc/config/vax/vax.opt +index 82d6dee..83527ad 100644 --- a/src/gcc/config/vax/vax.opt +++ b/src/gcc/config/vax/vax.opt -@@ -31,7 +31,7 @@ +@@ -31,7 +31,7 @@ Target RejectNegative Mask(G_FLOAT) Generate GFLOAT double precision code mg-float @@ -2571,11 +2608,11 @@ Index: b/src/gcc/config/vax/vax.opt Generate GFLOAT double precision code mgnu -Index: b/src/gcc/configure -=================================================================== +diff --git a/src/gcc/configure b/src/gcc/configure +index 91adc79..814c68e 100755 --- a/src/gcc/configure +++ b/src/gcc/configure -@@ -13832,7 +13832,14 @@ +@@ -13832,7 +13832,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; x86_64-*linux*) @@ -2591,11 +2628,29 @@ Index: b/src/gcc/configure ;; ppc64-*linux*|powerpc64-*linux*) LD="${LD-ld} -m elf32ppclinux" -Index: b/src/gcc/dwarf2out.c -=================================================================== +@@ -18046,7 +18053,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 18049 "configure" ++#line 18056 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -18152,7 +18159,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 18155 "configure" ++#line 18162 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +diff --git a/src/gcc/dwarf2out.c b/src/gcc/dwarf2out.c +index b99e45b..7c4f796 100644 --- a/src/gcc/dwarf2out.c +++ b/src/gcc/dwarf2out.c -@@ -10183,7 +10183,9 @@ +@@ -10183,7 +10183,9 @@ dbx_reg_number (const_rtx rtl) } #endif @@ -2606,7 +2661,7 @@ Index: b/src/gcc/dwarf2out.c } /* Optionally add a DW_OP_piece term to a location description expression. -@@ -11680,6 +11682,8 @@ +@@ -11680,6 +11682,8 @@ mem_loc_descriptor (rtx rtl, enum machine_mode mode, case REG: if (GET_MODE_CLASS (mode) != MODE_INT || (GET_MODE_SIZE (mode) > DWARF2_ADDR_SIZE @@ -2615,7 +2670,7 @@ Index: b/src/gcc/dwarf2out.c #ifdef POINTERS_EXTEND_UNSIGNED && (mode != Pmode || mem_mode == VOIDmode) #endif -@@ -11952,7 +11956,9 @@ +@@ -11952,7 +11956,9 @@ mem_loc_descriptor (rtx rtl, enum machine_mode mode, case PLUS: plus: if (is_based_loc (rtl) @@ -2626,11 +2681,11 @@ Index: b/src/gcc/dwarf2out.c && GET_MODE_CLASS (mode) == MODE_INT) mem_loc_result = based_loc_descr (XEXP (rtl, 0), INTVAL (XEXP (rtl, 1)), -Index: b/src/gcc/emit-rtl.c -=================================================================== +diff --git a/src/gcc/emit-rtl.c b/src/gcc/emit-rtl.c +index 9d877a7..90a2491 100644 --- a/src/gcc/emit-rtl.c +++ b/src/gcc/emit-rtl.c -@@ -964,6 +964,22 @@ +@@ -964,6 +964,22 @@ void set_reg_attrs_from_value (rtx reg, rtx x) { int offset; @@ -2653,7 +2708,7 @@ Index: b/src/gcc/emit-rtl.c /* Hard registers can be reused for multiple purposes within the same function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN -@@ -977,14 +993,14 @@ +@@ -977,14 +993,14 @@ set_reg_attrs_from_value (rtx reg, rtx x) if (MEM_OFFSET_KNOWN_P (x)) REG_ATTRS (reg) = get_reg_attrs (MEM_EXPR (x), MEM_OFFSET (x) + offset); @@ -2670,11 +2725,11 @@ Index: b/src/gcc/emit-rtl.c mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x))); } } -Index: b/src/gcc/opth-gen.awk -=================================================================== +diff --git a/src/gcc/opth-gen.awk b/src/gcc/opth-gen.awk +index 541bc3e..9a7b6c3 100644 --- a/src/gcc/opth-gen.awk +++ b/src/gcc/opth-gen.awk -@@ -298,16 +298,25 @@ +@@ -298,16 +298,25 @@ print ""; for (i = 0; i < n_opts; i++) { name = opt_args("Mask", flags[i]) @@ -2708,7 +2763,7 @@ Index: b/src/gcc/opth-gen.awk } for (i = 0; i < n_extra_masks; i++) { print "#define MASK_" extra_masks[i] " (1 << " masknum[""]++ ")" -@@ -330,17 +339,26 @@ +@@ -330,17 +339,26 @@ print "" for (i = 0; i < n_opts; i++) { name = opt_args("Mask", flags[i]) @@ -2743,11 +2798,11 @@ Index: b/src/gcc/opth-gen.awk } for (i = 0; i < n_extra_masks; i++) { print "#define TARGET_" extra_masks[i] \ -Index: b/src/gcc/reginfo.c -=================================================================== +diff --git a/src/gcc/reginfo.c b/src/gcc/reginfo.c +index 6353126..f3a08f5 100644 --- a/src/gcc/reginfo.c +++ b/src/gcc/reginfo.c -@@ -1222,17 +1222,7 @@ +@@ -1222,17 +1222,7 @@ reg_scan_mark_refs (rtx x, rtx insn) /* If this is setting a register from a register or from a simple conversion of a register, propagate REG_EXPR. */ if (REG_P (dest) && !REG_ATTRS (dest)) @@ -2766,11 +2821,28 @@ Index: b/src/gcc/reginfo.c /* ... fall through ... */ -Index: b/src/gcc/testsuite/ChangeLog.x32 -=================================================================== +diff --git a/src/gcc/testsuite/ChangeLog.x32 b/src/gcc/testsuite/ChangeLog.x32 +new file mode 100644 +index 0000000..a80ca37 --- /dev/null +++ b/src/gcc/testsuite/ChangeLog.x32 -@@ -0,0 +1,34 @@ +@@ -0,0 +1,50 @@ ++2012-12-09 H.J. Lu <hjl.tools@gmail.com> ++ ++ * gcc.target/i386/pr55597.c: Compile with -maddress-mode=long. ++ ++2012-11-24 H.J. Lu <hjl.tools@gmail.com> ++ ++ * gcc.target/i386/pr55142-1.c: Require maybe_x32 target. Compile ++ with -maddress-mode=long. ++ * gcc.target/i386/pr55142-2.c: Likewise. ++ ++2012-11-03 H.J. Lu <hjl.tools@gmail.com> ++ Jack Howarth <howarth@bromo.med.uc.edu> ++ ++ * lib/target-supports.exp (check_effective_target_maybe_x32): New ++ proc. ++ +2012-08-24 H.J. Lu <hongjiu.lu@intel.com> + + PR debug/52857 @@ -2805,8 +2877,9 @@ Index: b/src/gcc/testsuite/ChangeLog.x32 + + PR target/52146 + * gcc.target/i386/pr52146.c: Update final-scan to allow $-18874240. -Index: b/src/gcc/testsuite/gcc.dg/torture/pr52530.c -=================================================================== +diff --git a/src/gcc/testsuite/gcc.dg/torture/pr52530.c b/src/gcc/testsuite/gcc.dg/torture/pr52530.c +new file mode 100644 +index 0000000..d32ea82 --- /dev/null +++ b/src/gcc/testsuite/gcc.dg/torture/pr52530.c @@ -0,0 +1,30 @@ @@ -2840,18 +2913,19 @@ Index: b/src/gcc/testsuite/gcc.dg/torture/pr52530.c + + return 0; +} -Index: b/src/gcc/testsuite/gcc.target/i386/pr52146.c -=================================================================== +diff --git a/src/gcc/testsuite/gcc.target/i386/pr52146.c b/src/gcc/testsuite/gcc.target/i386/pr52146.c +index a4804e6..4eb91c0 100644 --- a/src/gcc/testsuite/gcc.target/i386/pr52146.c +++ b/src/gcc/testsuite/gcc.target/i386/pr52146.c -@@ -15,4 +15,4 @@ +@@ -15,4 +15,4 @@ test2 (void) *apic_tpr_addr = 0; } -/* { dg-final { scan-assembler-not "-18874240" } } */ +/* { dg-final { scan-assembler-not "\[,\\t \]+-18874240" } } */ -Index: b/src/gcc/testsuite/gcc.target/i386/pr52857-1.c -=================================================================== +diff --git a/src/gcc/testsuite/gcc.target/i386/pr52857-1.c b/src/gcc/testsuite/gcc.target/i386/pr52857-1.c +new file mode 100644 +index 0000000..16fd78f --- /dev/null +++ b/src/gcc/testsuite/gcc.target/i386/pr52857-1.c @@ -0,0 +1,10 @@ @@ -2865,8 +2939,9 @@ Index: b/src/gcc/testsuite/gcc.target/i386/pr52857-1.c + int res; + get_BID128 (&res); +} -Index: b/src/gcc/testsuite/gcc.target/i386/pr52857-2.c -=================================================================== +diff --git a/src/gcc/testsuite/gcc.target/i386/pr52857-2.c b/src/gcc/testsuite/gcc.target/i386/pr52857-2.c +new file mode 100644 +index 0000000..879240a --- /dev/null +++ b/src/gcc/testsuite/gcc.target/i386/pr52857-2.c @@ -0,0 +1,8 @@ @@ -2878,8 +2953,9 @@ Index: b/src/gcc/testsuite/gcc.target/i386/pr52857-2.c +{ + uw_init_context_1 (__builtin_dwarf_cfa ()); +} -Index: b/src/gcc/testsuite/gcc.target/i386/pr52876.c -=================================================================== +diff --git a/src/gcc/testsuite/gcc.target/i386/pr52876.c b/src/gcc/testsuite/gcc.target/i386/pr52876.c +new file mode 100644 +index 0000000..6d5e47a --- /dev/null +++ b/src/gcc/testsuite/gcc.target/i386/pr52876.c @@ -0,0 +1,25 @@ @@ -2908,8 +2984,9 @@ Index: b/src/gcc/testsuite/gcc.target/i386/pr52876.c + + return 0; +} -Index: b/src/gcc/testsuite/gcc.target/i386/pr52882.c -=================================================================== +diff --git a/src/gcc/testsuite/gcc.target/i386/pr52882.c b/src/gcc/testsuite/gcc.target/i386/pr52882.c +new file mode 100644 +index 0000000..5f0f12a --- /dev/null +++ b/src/gcc/testsuite/gcc.target/i386/pr52882.c @@ -0,0 +1,19 @@ @@ -2932,8 +3009,9 @@ Index: b/src/gcc/testsuite/gcc.target/i386/pr52882.c + for (; a.f1;) { + } +} -Index: b/src/gcc/testsuite/gcc.target/i386/pr52883.c -=================================================================== +diff --git a/src/gcc/testsuite/gcc.target/i386/pr52883.c b/src/gcc/testsuite/gcc.target/i386/pr52883.c +new file mode 100644 +index 0000000..766e87e --- /dev/null +++ b/src/gcc/testsuite/gcc.target/i386/pr52883.c @@ -0,0 +1,25 @@ @@ -2962,8 +3040,8 @@ Index: b/src/gcc/testsuite/gcc.target/i386/pr52883.c + } else + i = g[c]; +} -Index: b/src/gcc/testsuite/gcc.target/i386/pr54157.c -=================================================================== +diff --git a/src/gcc/testsuite/gcc.target/i386/pr54157.c b/src/gcc/testsuite/gcc.target/i386/pr54157.c +index 59fcd79..b5c4528 100644 --- a/src/gcc/testsuite/gcc.target/i386/pr54157.c +++ b/src/gcc/testsuite/gcc.target/i386/pr54157.c @@ -1,5 +1,5 @@ @@ -2973,8 +3051,66 @@ Index: b/src/gcc/testsuite/gcc.target/i386/pr54157.c struct s2{ int n[24 -1][24 -1][24 -1]; -Index: b/src/libffi/ChangeLog.x32 -=================================================================== +diff --git a/src/gcc/testsuite/gcc.target/i386/pr55142-1.c b/src/gcc/testsuite/gcc.target/i386/pr55142-1.c +index 28375b5..e6b5f12 100644 +--- a/src/gcc/testsuite/gcc.target/i386/pr55142-1.c ++++ b/src/gcc/testsuite/gcc.target/i386/pr55142-1.c +@@ -1,6 +1,7 @@ + /* { dg-do compile { target { ! { ia32 } } } } */ ++/* { dg-require-effective-target maybe_x32 } */ + /* { dg-require-effective-target fpic } */ +-/* { dg-options "-O2 -mx32 -fpic" } */ ++/* { dg-options "-O2 -mx32 -maddress-mode=long -fpic" } */ + + typedef int int32_t; + typedef unsigned int uint32_t; +diff --git a/src/gcc/testsuite/gcc.target/i386/pr55142-2.c b/src/gcc/testsuite/gcc.target/i386/pr55142-2.c +index 9daae9d..34f4687 100644 +--- a/src/gcc/testsuite/gcc.target/i386/pr55142-2.c ++++ b/src/gcc/testsuite/gcc.target/i386/pr55142-2.c +@@ -1,6 +1,7 @@ + /* { dg-do compile { target { ! { ia32 } } } } */ ++/* { dg-require-effective-target maybe_x32 } */ + /* { dg-require-effective-target fpic } */ +-/* { dg-options "-O3 -mx32 -fpic" } */ ++/* { dg-options "-O3 -mx32 -maddress-mode=long -fpic" } */ + /* { dg-final { scan-assembler-not "movl\[\\t \]*%.*,\[\\t \]*-1073742592\\(%r(.x|.i|.p|\[1-9\]*)\\)" } } */ + + typedef int int32_t; +diff --git a/src/gcc/testsuite/gcc.target/i386/pr55597.c b/src/gcc/testsuite/gcc.target/i386/pr55597.c +index cafe194..0ed7a3a 100644 +--- a/src/gcc/testsuite/gcc.target/i386/pr55597.c ++++ b/src/gcc/testsuite/gcc.target/i386/pr55597.c +@@ -1,6 +1,6 @@ + /* { dg-do compile { target { ! { ia32 } } } } */ + /* { dg-require-effective-target fpic } */ +-/* { dg-options "-O2 -fPIC -mx32" } */ ++/* { dg-options "-O2 -fPIC -mx32 -maddress-mode=long" } */ + + struct initial_sp + { +diff --git a/src/gcc/testsuite/lib/target-supports.exp b/src/gcc/testsuite/lib/target-supports.exp +index d3898d6..16b2d59 100644 +--- a/src/gcc/testsuite/lib/target-supports.exp ++++ b/src/gcc/testsuite/lib/target-supports.exp +@@ -4458,6 +4458,14 @@ proc check_effective_target_lto { } { + return [info exists ENABLE_LTO] + } + ++# Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise. ++ ++proc check_effective_target_maybe_x32 { } { ++ return [check_no_compiler_messages maybe_x32 object { ++ void foo (void) {} ++ } "-mx32 -maddress-mode=short"] ++} ++ + # Return 1 if this target supports the -fsplit-stack option, 0 + # otherwise. + +diff --git a/src/libffi/ChangeLog.x32 b/src/libffi/ChangeLog.x32 +new file mode 100644 +index 0000000..2cbed64 --- /dev/null +++ b/src/libffi/ChangeLog.x32 @@ -0,0 +1,27 @@ @@ -3005,11 +3141,11 @@ Index: b/src/libffi/ChangeLog.x32 +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -Index: b/src/libffi/configure -=================================================================== +diff --git a/src/libffi/configure b/src/libffi/configure +index 1591495..28ed513 100755 --- a/src/libffi/configure +++ b/src/libffi/configure -@@ -6282,7 +6282,14 @@ +@@ -6282,7 +6282,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; x86_64-*linux*) @@ -3025,11 +3161,29 @@ Index: b/src/libffi/configure ;; ppc64-*linux*|powerpc64-*linux*) LD="${LD-ld} -m elf32ppclinux" -Index: b/src/libffi/src/x86/ffi64.c -=================================================================== +@@ -10766,7 +10773,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10769 "configure" ++#line 10776 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -10872,7 +10879,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10875 "configure" ++#line 10882 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +diff --git a/src/libffi/src/x86/ffi64.c b/src/libffi/src/x86/ffi64.c +index bd907d7..41c4e77 100644 --- a/src/libffi/src/x86/ffi64.c +++ b/src/libffi/src/x86/ffi64.c -@@ -426,7 +426,7 @@ +@@ -426,7 +426,7 @@ ffi_call (ffi_cif *cif, void (*fn)(void), void *rvalue, void **avalue) /* If the return value is passed in memory, add the pointer as the first integer argument. */ if (ret_in_memory) @@ -3038,7 +3192,7 @@ Index: b/src/libffi/src/x86/ffi64.c avn = cif->nargs; arg_types = cif->arg_types; -@@ -501,9 +501,11 @@ +@@ -501,9 +501,11 @@ ffi_prep_closure_loc (ffi_closure* closure, tramp = (volatile unsigned short *) &closure->tramp[0]; tramp[0] = 0xbb49; /* mov <code>, %r11 */ @@ -3052,7 +3206,7 @@ Index: b/src/libffi/src/x86/ffi64.c /* Set the carry bit iff the function uses any sse registers. This is clc or stc, together with the first byte of the jmp. */ -@@ -542,7 +544,7 @@ +@@ -542,7 +544,7 @@ ffi_closure_unix64_inner(ffi_closure *closure, void *rvalue, { /* The return value goes in memory. Arrange for the closure return value to go directly back to the original caller. */ @@ -3061,11 +3215,11 @@ Index: b/src/libffi/src/x86/ffi64.c /* We don't have to do anything in asm for the return. */ ret = FFI_TYPE_VOID; } -Index: b/src/libffi/src/x86/ffitarget.h -=================================================================== +diff --git a/src/libffi/src/x86/ffitarget.h b/src/libffi/src/x86/ffitarget.h +index dfecd1b..f9548c6 100644 --- a/src/libffi/src/x86/ffitarget.h +++ b/src/libffi/src/x86/ffitarget.h -@@ -53,9 +53,16 @@ +@@ -53,9 +53,16 @@ typedef unsigned long long ffi_arg; typedef long long ffi_sarg; #endif #else @@ -3082,20 +3236,73 @@ Index: b/src/libffi/src/x86/ffitarget.h typedef enum ffi_abi { FFI_FIRST_ABI = 0, -Index: b/src/libgcc/ChangeLog.x32 -=================================================================== +diff --git a/src/libgcc/ChangeLog.x32 b/src/libgcc/ChangeLog.x32 +new file mode 100644 +index 0000000..8b6d4a2 --- /dev/null +++ b/src/libgcc/ChangeLog.x32 -@@ -0,0 +1,4 @@ +@@ -0,0 +1,9 @@ ++2012-03-29 H.J. Lu <hongjiu.lu@intel.com> ++ ++ * config/i386/linux-unwind.h (x86_64_fallback_frame_state): Define ++ only for glibc. ++ +2012-03-13 H.J. Lu <hongjiu.lu@intel.com> + + * unwind-dw2.c (_Unwind_SetGRValue): Assert DWARF register size + <= saved reg size. -Index: b/src/libgcc/unwind-dw2.c -=================================================================== +diff --git a/src/libgcc/config/i386/linux-unwind.h b/src/libgcc/config/i386/linux-unwind.h +index cd9a9a1..02b1897 100644 +--- a/src/libgcc/config/i386/linux-unwind.h ++++ b/src/libgcc/config/i386/linux-unwind.h +@@ -29,11 +29,17 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + + #ifndef inhibit_libc + +-#ifdef __x86_64__ ++/* There's no sys/ucontext.h for glibc 2.0, so no ++ signal-turned-exceptions for them. There's also no configure-run for ++ the target, so we can't check on (e.g.) HAVE_SYS_UCONTEXT_H. Using the ++ target libc version macro should be enough. */ ++#if defined __GLIBC__ && !(__GLIBC__ == 2 && __GLIBC_MINOR__ == 0) + + #include <signal.h> + #include <sys/ucontext.h> + ++#ifdef __x86_64__ ++ + #define MD_FALLBACK_FRAME_STATE_FOR x86_64_fallback_frame_state + + static _Unwind_Reason_Code +@@ -108,15 +114,6 @@ x86_64_fallback_frame_state (struct _Unwind_Context *context, + + #else /* ifdef __x86_64__ */ + +-/* There's no sys/ucontext.h for glibc 2.0, so no +- signal-turned-exceptions for them. There's also no configure-run for +- the target, so we can't check on (e.g.) HAVE_SYS_UCONTEXT_H. Using the +- target libc version macro should be enough. */ +-#if defined __GLIBC__ && !(__GLIBC__ == 2 && __GLIBC_MINOR__ == 0) +- +-#include <signal.h> +-#include <sys/ucontext.h> +- + #define MD_FALLBACK_FRAME_STATE_FOR x86_fallback_frame_state + + static _Unwind_Reason_Code +@@ -197,6 +194,6 @@ x86_frob_update_context (struct _Unwind_Context *context, + _Unwind_SetSignalFrame (context, 1); + } + +-#endif /* not glibc 2.0 */ + #endif /* ifdef __x86_64__ */ ++#endif /* not glibc 2.0 */ + #endif /* ifdef inhibit_libc */ +diff --git a/src/libgcc/unwind-dw2.c b/src/libgcc/unwind-dw2.c +index 475ad00..d1c62ee 100644 --- a/src/libgcc/unwind-dw2.c +++ b/src/libgcc/unwind-dw2.c -@@ -294,7 +294,8 @@ +@@ -294,7 +294,8 @@ _Unwind_SetGRValue (struct _Unwind_Context *context, int index, { index = DWARF_REG_TO_UNWIND_COLUMN (index); gcc_assert (index < (int) sizeof(dwarf_reg_size_table)); @@ -3105,19 +3312,20 @@ Index: b/src/libgcc/unwind-dw2.c context->by_value[index] = 1; context->reg[index] = _Unwind_Get_Unwind_Context_Reg_Val (val); -Index: b/src/libgfortran/ChangeLog.x32 -=================================================================== +diff --git a/src/libgfortran/ChangeLog.x32 b/src/libgfortran/ChangeLog.x32 +new file mode 100644 +index 0000000..9a0c1eb --- /dev/null +++ b/src/libgfortran/ChangeLog.x32 @@ -0,0 +1,3 @@ +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -Index: b/src/libgfortran/configure -=================================================================== +diff --git a/src/libgfortran/configure b/src/libgfortran/configure +index 227f556..bd8e10b 100755 --- a/src/libgfortran/configure +++ b/src/libgfortran/configure -@@ -8071,7 +8071,14 @@ +@@ -8071,7 +8071,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; x86_64-*linux*) @@ -3133,8 +3341,27 @@ Index: b/src/libgfortran/configure ;; ppc64-*linux*|powerpc64-*linux*) LD="${LD-ld} -m elf32ppclinux" -Index: b/src/libgomp/ChangeLog.x32 -=================================================================== +@@ -12318,7 +12325,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 12321 "configure" ++#line 12328 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -12424,7 +12431,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 12427 "configure" ++#line 12434 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +diff --git a/src/libgomp/ChangeLog.x32 b/src/libgomp/ChangeLog.x32 +new file mode 100644 +index 0000000..36444bb --- /dev/null +++ b/src/libgomp/ChangeLog.x32 @@ -0,0 +1,8 @@ @@ -3146,11 +3373,11 @@ Index: b/src/libgomp/ChangeLog.x32 +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -Index: b/src/libgomp/configure -=================================================================== +diff --git a/src/libgomp/configure b/src/libgomp/configure +index 8ed841a..418c471 100755 --- a/src/libgomp/configure +++ b/src/libgomp/configure -@@ -6596,7 +6596,14 @@ +@@ -6596,7 +6596,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; x86_64-*linux*) @@ -3166,11 +3393,29 @@ Index: b/src/libgomp/configure ;; ppc64-*linux*|powerpc64-*linux*) LD="${LD-ld} -m elf32ppclinux" -Index: b/src/libgomp/configure.tgt -=================================================================== +@@ -11080,7 +11087,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11083 "configure" ++#line 11090 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -11186,7 +11193,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11189 "configure" ++#line 11196 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +diff --git a/src/libgomp/configure.tgt b/src/libgomp/configure.tgt +index 210dd5d..853e3fa 100644 --- a/src/libgomp/configure.tgt +++ b/src/libgomp/configure.tgt -@@ -59,7 +59,7 @@ +@@ -59,7 +59,7 @@ if test $enable_linux_futex = yes; then i[456]86-*-linux*) config_path="linux/x86 linux posix" case " ${CC} ${CFLAGS} " in @@ -3179,8 +3424,9 @@ Index: b/src/libgomp/configure.tgt ;; *) if test -z "$with_arch"; then -Index: b/src/libitm/ChangeLog.x32 -=================================================================== +diff --git a/src/libitm/ChangeLog.x32 b/src/libitm/ChangeLog.x32 +new file mode 100644 +index 0000000..36444bb --- /dev/null +++ b/src/libitm/ChangeLog.x32 @@ -0,0 +1,8 @@ @@ -3192,11 +3438,11 @@ Index: b/src/libitm/ChangeLog.x32 +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -Index: b/src/libitm/configure -=================================================================== +diff --git a/src/libitm/configure b/src/libitm/configure +index 30d2f73..9f89ebc 100644 --- a/src/libitm/configure +++ b/src/libitm/configure -@@ -7286,7 +7286,14 @@ +@@ -7286,7 +7286,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; x86_64-*linux*) @@ -3212,11 +3458,29 @@ Index: b/src/libitm/configure ;; ppc64-*linux*|powerpc64-*linux*) LD="${LD-ld} -m elf32ppclinux" -Index: b/src/libitm/configure.tgt -=================================================================== +@@ -11771,7 +11778,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11774 "configure" ++#line 11781 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -11877,7 +11884,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11880 "configure" ++#line 11887 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +diff --git a/src/libitm/configure.tgt b/src/libitm/configure.tgt +index b68c86b..333bdff 100644 --- a/src/libitm/configure.tgt +++ b/src/libitm/configure.tgt -@@ -53,7 +53,7 @@ +@@ -53,7 +53,7 @@ case "${target_cpu}" in i[3456]86) case " ${CC} ${CFLAGS} " in @@ -3225,8 +3489,9 @@ Index: b/src/libitm/configure.tgt ;; *) if test -z "$with_arch"; then -Index: b/src/libjava/ChangeLog.x32 -=================================================================== +diff --git a/src/libjava/ChangeLog.x32 b/src/libjava/ChangeLog.x32 +new file mode 100644 +index 0000000..43e8f70 --- /dev/null +++ b/src/libjava/ChangeLog.x32 @@ -0,0 +1,12 @@ @@ -3242,19 +3507,20 @@ Index: b/src/libjava/ChangeLog.x32 +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -Index: b/src/libjava/classpath/ChangeLog.x32 -=================================================================== +diff --git a/src/libjava/classpath/ChangeLog.x32 b/src/libjava/classpath/ChangeLog.x32 +new file mode 100644 +index 0000000..9a0c1eb --- /dev/null +++ b/src/libjava/classpath/ChangeLog.x32 @@ -0,0 +1,3 @@ +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -Index: b/src/libjava/classpath/configure -=================================================================== +diff --git a/src/libjava/classpath/configure b/src/libjava/classpath/configure +index a25f5f7..b6692b6 100755 --- a/src/libjava/classpath/configure +++ b/src/libjava/classpath/configure -@@ -7592,7 +7592,14 @@ +@@ -7592,7 +7592,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; x86_64-*linux*) @@ -3270,11 +3536,65 @@ Index: b/src/libjava/classpath/configure ;; ppc64-*linux*|powerpc64-*linux*) LD="${LD-ld} -m elf32ppclinux" -Index: b/src/libjava/configure -=================================================================== +@@ -11811,7 +11818,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11814 "configure" ++#line 11821 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -11917,7 +11924,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11920 "configure" ++#line 11927 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -23814,7 +23821,7 @@ else + JAVA_TEST=Object.java + CLASS_TEST=Object.class + cat << \EOF > $JAVA_TEST +-/* #line 23817 "configure" */ ++/* #line 23824 "configure" */ + package java.lang; + + public class Object +@@ -23907,7 +23914,7 @@ EOF + if uudecode$EXEEXT Test.uue; then + ac_cv_prog_uudecode_base64=yes + else +- echo "configure: 23910: uudecode had trouble decoding base 64 file 'Test.uue'" >&5 ++ echo "configure: 23917: uudecode had trouble decoding base 64 file 'Test.uue'" >&5 + echo "configure: failed file was:" >&5 + cat Test.uue >&5 + ac_cv_prog_uudecode_base64=no +@@ -23935,7 +23942,7 @@ JAVA_TEST=Test.java + CLASS_TEST=Test.class + TEST=Test + cat << \EOF > $JAVA_TEST +-/* [#]line 23938 "configure" */ ++/* [#]line 23945 "configure" */ + public class Test { + public static void main (String args[]) { + System.exit (0); +@@ -24143,7 +24150,7 @@ if test "x${use_glibj_zip}" = xfalse || \ + JAVA_TEST=Test.java + CLASS_TEST=Test.class + cat << \EOF > $JAVA_TEST +- /* #line 24146 "configure" */ ++ /* #line 24153 "configure" */ + public class Test + { + public static void main(String args) +diff --git a/src/libjava/configure b/src/libjava/configure +index d8a408d..be98354 100755 --- a/src/libjava/configure +++ b/src/libjava/configure -@@ -8843,7 +8843,14 @@ +@@ -8843,7 +8843,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; x86_64-*linux*) @@ -3290,11 +3610,38 @@ Index: b/src/libjava/configure ;; ppc64-*linux*|powerpc64-*linux*) LD="${LD-ld} -m elf32ppclinux" -Index: b/src/libjava/include/x86_64-signal.h -=================================================================== +@@ -13359,7 +13366,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 13362 "configure" ++#line 13369 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -13465,7 +13472,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 13468 "configure" ++#line 13475 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -19458,7 +19465,7 @@ if test "${enable_sjlj_exceptions+set}" = set; then : + enableval=$enable_sjlj_exceptions; : + else + cat > conftest.$ac_ext << EOF +-#line 19461 "configure" ++#line 19468 "configure" + struct S { ~S(); }; + void bar(); + void foo() +diff --git a/src/libjava/include/x86_64-signal.h b/src/libjava/include/x86_64-signal.h +index 4bd8a36..d03b914 100644 --- a/src/libjava/include/x86_64-signal.h +++ b/src/libjava/include/x86_64-signal.h -@@ -47,6 +47,10 @@ +@@ -47,6 +47,10 @@ do \ \ bool _is_64_bit = false; \ \ @@ -3305,7 +3652,7 @@ Index: b/src/libjava/include/x86_64-signal.h if ((_rip[0] & 0xf0) == 0x40) /* REX byte present. */ \ { \ unsigned char _rex = _rip[0] & 0x0f; \ -@@ -64,10 +68,10 @@ +@@ -64,10 +68,10 @@ do \ { \ if (_is_64_bit) \ _min_value_dividend = \ @@ -3318,19 +3665,20 @@ Index: b/src/libjava/include/x86_64-signal.h } \ \ if (_min_value_dividend) \ -Index: b/src/libmudflap/ChangeLog.x32 -=================================================================== +diff --git a/src/libmudflap/ChangeLog.x32 b/src/libmudflap/ChangeLog.x32 +new file mode 100644 +index 0000000..9a0c1eb --- /dev/null +++ b/src/libmudflap/ChangeLog.x32 @@ -0,0 +1,3 @@ +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -Index: b/src/libmudflap/configure -=================================================================== +diff --git a/src/libmudflap/configure b/src/libmudflap/configure +index f1c74a1..1a76202 100755 --- a/src/libmudflap/configure +++ b/src/libmudflap/configure -@@ -6393,7 +6393,14 @@ +@@ -6393,7 +6393,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; x86_64-*linux*) @@ -3346,19 +3694,38 @@ Index: b/src/libmudflap/configure ;; ppc64-*linux*|powerpc64-*linux*) LD="${LD-ld} -m elf32ppclinux" -Index: b/src/libobjc/ChangeLog.x32 -=================================================================== +@@ -10607,7 +10614,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10610 "configure" ++#line 10617 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -10713,7 +10720,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10716 "configure" ++#line 10723 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +diff --git a/src/libobjc/ChangeLog.x32 b/src/libobjc/ChangeLog.x32 +new file mode 100644 +index 0000000..9a0c1eb --- /dev/null +++ b/src/libobjc/ChangeLog.x32 @@ -0,0 +1,3 @@ +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -Index: b/src/libobjc/configure -=================================================================== +diff --git a/src/libobjc/configure b/src/libobjc/configure +index 8c07356..376f25e 100755 --- a/src/libobjc/configure +++ b/src/libobjc/configure -@@ -6079,7 +6079,14 @@ +@@ -6079,7 +6079,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; x86_64-*linux*) @@ -3374,19 +3741,20 @@ Index: b/src/libobjc/configure ;; ppc64-*linux*|powerpc64-*linux*) LD="${LD-ld} -m elf32ppclinux" -Index: b/src/libquadmath/ChangeLog.x32 -=================================================================== +diff --git a/src/libquadmath/ChangeLog.x32 b/src/libquadmath/ChangeLog.x32 +new file mode 100644 +index 0000000..9a0c1eb --- /dev/null +++ b/src/libquadmath/ChangeLog.x32 @@ -0,0 +1,3 @@ +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -Index: b/src/libquadmath/configure -=================================================================== +diff --git a/src/libquadmath/configure b/src/libquadmath/configure +index 82065c7..8beb1a6 100755 --- a/src/libquadmath/configure +++ b/src/libquadmath/configure -@@ -6264,7 +6264,14 @@ +@@ -6264,7 +6264,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; x86_64-*linux*) @@ -3402,19 +3770,38 @@ Index: b/src/libquadmath/configure ;; ppc64-*linux*|powerpc64-*linux*) LD="${LD-ld} -m elf32ppclinux" -Index: b/src/libssp/ChangeLog.x32 -=================================================================== +@@ -10513,7 +10520,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10516 "configure" ++#line 10523 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -10619,7 +10626,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10622 "configure" ++#line 10629 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +diff --git a/src/libssp/ChangeLog.x32 b/src/libssp/ChangeLog.x32 +new file mode 100644 +index 0000000..9a0c1eb --- /dev/null +++ b/src/libssp/ChangeLog.x32 @@ -0,0 +1,3 @@ +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -Index: b/src/libssp/configure -=================================================================== +diff --git a/src/libssp/configure b/src/libssp/configure +index 78abc70..84b3712 100755 --- a/src/libssp/configure +++ b/src/libssp/configure -@@ -6401,7 +6401,14 @@ +@@ -6401,7 +6401,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; x86_64-*linux*) @@ -3430,19 +3817,148 @@ Index: b/src/libssp/configure ;; ppc64-*linux*|powerpc64-*linux*) LD="${LD-ld} -m elf32ppclinux" -Index: b/src/libstdc++-v3/ChangeLog.x32 -=================================================================== +@@ -10650,7 +10657,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10653 "configure" ++#line 10660 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -10756,7 +10763,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10759 "configure" ++#line 10766 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +diff --git a/src/libstdc++-v3/ChangeLog.x32 b/src/libstdc++-v3/ChangeLog.x32 +new file mode 100644 +index 0000000..9a0c1eb --- /dev/null +++ b/src/libstdc++-v3/ChangeLog.x32 @@ -0,0 +1,3 @@ +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -Index: b/src/libtool.m4 -=================================================================== +diff --git a/src/libstdc++-v3/configure b/src/libstdc++-v3/configure +index b642495..3e3e9ca 100755 +--- a/src/libstdc++-v3/configure ++++ b/src/libstdc++-v3/configure +@@ -7122,7 +7122,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -11500,7 +11507,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11503 "configure" ++#line 11510 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -11606,7 +11613,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11609 "configure" ++#line 11616 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -14996,7 +15003,7 @@ fi + # + # Fake what AC_TRY_COMPILE does. XXX Look at redoing this new-style. + cat > conftest.$ac_ext << EOF +-#line 14999 "configure" ++#line 15006 "configure" + struct S { ~S(); }; + void bar(); + void foo() +@@ -15331,7 +15338,7 @@ $as_echo "$glibcxx_cv_atomic_long_long" >&6; } + # Fake what AC_TRY_COMPILE does. + + cat > conftest.$ac_ext << EOF +-#line 15334 "configure" ++#line 15341 "configure" + int main() + { + typedef bool atomic_type; +@@ -15366,7 +15373,7 @@ $as_echo "$glibcxx_cv_atomic_bool" >&6; } + rm -f conftest* + + cat > conftest.$ac_ext << EOF +-#line 15369 "configure" ++#line 15376 "configure" + int main() + { + typedef short atomic_type; +@@ -15401,7 +15408,7 @@ $as_echo "$glibcxx_cv_atomic_short" >&6; } + rm -f conftest* + + cat > conftest.$ac_ext << EOF +-#line 15404 "configure" ++#line 15411 "configure" + int main() + { + // NB: _Atomic_word not necessarily int. +@@ -15437,7 +15444,7 @@ $as_echo "$glibcxx_cv_atomic_int" >&6; } + rm -f conftest* + + cat > conftest.$ac_ext << EOF +-#line 15440 "configure" ++#line 15447 "configure" + int main() + { + typedef long long atomic_type; +@@ -15516,7 +15523,7 @@ $as_echo "$as_me: WARNING: Performance of certain classes will degrade as a resu + # unnecessary for this test. + + cat > conftest.$ac_ext << EOF +-#line 15519 "configure" ++#line 15526 "configure" + int main() + { + _Decimal32 d1; +@@ -15558,7 +15565,7 @@ ac_compiler_gnu=$ac_cv_cxx_compiler_gnu + # unnecessary for this test. + + cat > conftest.$ac_ext << EOF +-#line 15561 "configure" ++#line 15568 "configure" + template<typename T1, typename T2> + struct same + { typedef T2 type; }; +@@ -15592,7 +15599,7 @@ $as_echo "$enable_int128" >&6; } + rm -f conftest* + + cat > conftest.$ac_ext << EOF +-#line 15595 "configure" ++#line 15602 "configure" + template<typename T1, typename T2> + struct same + { typedef T2 type; }; +diff --git a/src/libtool.m4 b/src/libtool.m4 +index 67321a7..a7f99ac 100644 --- a/src/libtool.m4 +++ b/src/libtool.m4 -@@ -1232,7 +1232,14 @@ +@@ -1232,7 +1232,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; x86_64-*linux*) @@ -3458,19 +3974,20 @@ Index: b/src/libtool.m4 ;; ppc64-*linux*|powerpc64-*linux*) LD="${LD-ld} -m elf32ppclinux" -Index: b/src/lto-plugin/ChangeLog.x32 -=================================================================== +diff --git a/src/lto-plugin/ChangeLog.x32 b/src/lto-plugin/ChangeLog.x32 +new file mode 100644 +index 0000000..9a0c1eb --- /dev/null +++ b/src/lto-plugin/ChangeLog.x32 @@ -0,0 +1,3 @@ +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -Index: b/src/lto-plugin/configure -=================================================================== +diff --git a/src/lto-plugin/configure b/src/lto-plugin/configure +index 7f1ade1..bd7e75e 100755 --- a/src/lto-plugin/configure +++ b/src/lto-plugin/configure -@@ -6060,7 +6060,14 @@ +@@ -6060,7 +6060,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; x86_64-*linux*) @@ -3486,19 +4003,38 @@ Index: b/src/lto-plugin/configure ;; ppc64-*linux*|powerpc64-*linux*) LD="${LD-ld} -m elf32ppclinux" -Index: b/src/zlib/ChangeLog.x32 -=================================================================== +@@ -10544,7 +10551,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10547 "configure" ++#line 10554 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -10650,7 +10657,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10653 "configure" ++#line 10660 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +diff --git a/src/zlib/ChangeLog.x32 b/src/zlib/ChangeLog.x32 +new file mode 100644 +index 0000000..9a0c1eb --- /dev/null +++ b/src/zlib/ChangeLog.x32 @@ -0,0 +1,3 @@ +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -Index: b/src/zlib/configure -=================================================================== +diff --git a/src/zlib/configure b/src/zlib/configure +index f7fe2b7..478bef3 100755 --- a/src/zlib/configure +++ b/src/zlib/configure -@@ -5869,7 +5869,14 @@ +@@ -5869,7 +5869,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; x86_64-*linux*) @@ -3514,3 +4050,21 @@ Index: b/src/zlib/configure ;; ppc64-*linux*|powerpc64-*linux*) LD="${LD-ld} -m elf32ppclinux" +@@ -10386,7 +10393,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10389 "configure" ++#line 10396 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -10492,7 +10499,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10495 "configure" ++#line 10502 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H |