diff options
author | doko <doko@6ca36cf4-e1d1-0310-8c6f-e303bb2178ca> | 2013-06-14 09:46:57 +0000 |
---|---|---|
committer | doko <doko@6ca36cf4-e1d1-0310-8c6f-e303bb2178ca> | 2013-06-14 09:46:57 +0000 |
commit | 628208e3d482b132ba6f6ad98e6901fb4c7f94b4 (patch) | |
tree | e8a761c9ee2c2ba2353964221fb351c54578bc8a | |
parent | 1b904d9aa20c94e0183b2871ac04f56420804fa1 (diff) | |
download | gcc-47-628208e3d482b132ba6f6ad98e6901fb4c7f94b4.tar.gz |
* Update to SVN 20130614 (r200084) from the gcc-4_7-branch.
* Update the Linaro support to the 4.7-2013.06 release.
git-svn-id: svn://svn.debian.org/svn/gcccvs/branches/sid/gcc-4.7@6843 6ca36cf4-e1d1-0310-8c6f-e303bb2178ca
-rw-r--r-- | debian/changelog | 5 | ||||
-rw-r--r-- | debian/patches/gcc-linaro-doc.diff | 8 | ||||
-rw-r--r-- | debian/patches/gcc-linaro.diff | 1462 | ||||
-rw-r--r-- | debian/patches/svn-updates-linaro.diff | 1285 | ||||
-rw-r--r-- | debian/patches/svn-updates.diff | 406 |
5 files changed, 1975 insertions, 1191 deletions
diff --git a/debian/changelog b/debian/changelog index 72decb2..164493b 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,6 +1,6 @@ gcc-4.7 (4.7.3-5) UNRELEASED; urgency=low - * Update to SVN 20130530 (r199435) from the gcc-4_7-branch. + * Update to SVN 20130614 (r200084) from the gcc-4_7-branch. [ Matthias Klose ] * Update the Linaro support to the 4.7-2013.05 release. @@ -11,11 +11,12 @@ gcc-4.7 (4.7.3-5) UNRELEASED; urgency=low * Don't configure anymore with --enable-libstdcxx-time=yes. Addresses: #710220. * Drop build dependency on automake, not used anymore. + * Update the Linaro support to the 4.7-2013.06 release. [ Daniel Schepler ] * Update the x32 support from the branch. - -- Matthias Klose <doko@debian.org> Thu, 30 May 2013 08:57:32 +0200 + -- Matthias Klose <doko@debian.org> Fri, 14 Jun 2013 11:46:15 +0200 gcc-4.7 (4.7.3-4) unstable; urgency=medium diff --git a/debian/patches/gcc-linaro-doc.diff b/debian/patches/gcc-linaro-doc.diff index c9f2d6f..076e33e 100644 --- a/debian/patches/gcc-linaro-doc.diff +++ b/debian/patches/gcc-linaro-doc.diff @@ -1,5 +1,3 @@ -# DP: Changes for the Linaro 4.7-2013.05 release (documentation). - --- a/src/gcc/doc/extend.texi +++ b/src/gcc/doc/extend.texi @@ -8575,12 +8575,17 @@ @@ -95,7 +93,7 @@ .\" .IX Title "FSF-FUNDING 7" -.TH FSF-FUNDING 7 "2013-04-11" "gcc-4.7.3" "GNU" -+.TH FSF-FUNDING 7 "2013-05-08" "gcc-4.7.4" "GNU" ++.TH FSF-FUNDING 7 "2013-06-03" "gcc-4.7.4" "GNU" .\" For nroff, turn off justification. Always turn off hyphenation; it makes .\" way too many mistakes in technical documents. .if n .ad l @@ -141,7 +139,7 @@ .\" .IX Title "GFDL 7" -.TH GFDL 7 "2013-04-11" "gcc-4.7.3" "GNU" -+.TH GFDL 7 "2013-05-08" "gcc-4.7.4" "GNU" ++.TH GFDL 7 "2013-06-03" "gcc-4.7.4" "GNU" .\" For nroff, turn off justification. Always turn off hyphenation; it makes .\" way too many mistakes in technical documents. .if n .ad l @@ -199,7 +197,7 @@ .\" .IX Title "GPL 7" -.TH GPL 7 "2013-04-11" "gcc-4.7.3" "GNU" -+.TH GPL 7 "2013-05-08" "gcc-4.7.4" "GNU" ++.TH GPL 7 "2013-06-03" "gcc-4.7.4" "GNU" .\" For nroff, turn off justification. Always turn off hyphenation; it makes .\" way too many mistakes in technical documents. .if n .ad l diff --git a/debian/patches/gcc-linaro.diff b/debian/patches/gcc-linaro.diff index e25f258..9ba3a34 100644 --- a/debian/patches/gcc-linaro.diff +++ b/debian/patches/gcc-linaro.diff @@ -1,8 +1,24 @@ -# DP: Changes for the Linaro 4.7-2013.05 release. +# DP: Changes for the Linaro 4.7-2013.06 release. --- a/src/ChangeLog.linaro +++ b/src/ChangeLog.linaro -@@ -0,0 +1,2535 @@ +@@ -0,0 +1,2551 @@ ++2013-06-11 Rob Savoye <rob.savoye@linaro.org> ++ ++ GCC Linaro 4.7-2013.06 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2013-06-03 Christophe lyon <christophe.lyon@linaro.org> ++ ++ Merge from FSF GCC 4.7.4 (svn branches/gcc-4_7-branch 199594). ++ ++2013-05-14 Yvan Roux <yvan.roux@linaro.org> ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ +2013-05-14 Yvan Roux <yvan.roux@linaro.org> + + GCC Linaro 4.7-2013.05 released. @@ -2887,6 +2903,64 @@ ;; m68*-cisco) os=-aout +--- a/src/contrib/gcc_build ++++ b/src/contrib/gcc_build +@@ -146,7 +146,7 @@ + + # Bootstrap the compiler + echo "Building: ${MAKE} ${MAKE_BOOTSTRAP_OPTIONS} bootstrap" +- eval ${MAKE} ${MAKE_BOOTSTRAP_OPTIONS} bootstrap || \ ++ eval ${MAKE} -j8 ${MAKE_BOOTSTRAP_OPTIONS} bootstrap || \ + error "Could not bootstrap the compiler" + } + +@@ -159,8 +159,8 @@ + changedir ${OBJDIR} + + echo "Running tests... This will take a while." +- eval \${MAKE} -k ${MAKE_CHECK_OPTIONS} check +- ${DESTINATION}/contrib/test_summary ++ #eval \${MAKE} -k ${MAKE_CHECK_OPTIONS} check ++ #${DESTINATION}/contrib/test_summary + } + + # Export the GCC source tree. +--- a/src/gcc/ada/ChangeLog ++++ b/src/gcc/ada/ChangeLog +@@ -1,3 +1,8 @@ ++2013-05-26 Eric Botcazou <ebotcazou@adacore.com> ++ ++ * gcc-interface/trans.c (Attribute_to_gnu) <Attr_Last_Bit>: Add kludge ++ to avoid generating an overflow for -1. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +--- a/src/gcc/ada/gcc-interface/trans.c ++++ b/src/gcc/ada/gcc-interface/trans.c +@@ -1901,14 +1901,19 @@ + gnu_result = bitsize_int (bitpos % BITS_PER_UNIT); + gnu_result = size_binop (PLUS_EXPR, gnu_result, + TYPE_SIZE (TREE_TYPE (gnu_prefix))); +- gnu_result = size_binop (MINUS_EXPR, gnu_result, +- bitsize_one_node); ++ /* ??? Avoid a large unsigned result that will overflow when ++ converted to the signed universal_integer. */ ++ if (integer_zerop (gnu_result)) ++ gnu_result = integer_minus_one_node; ++ else ++ gnu_result ++ = size_binop (MINUS_EXPR, gnu_result, bitsize_one_node); + break; + + case Attr_Bit_Position: + gnu_result = gnu_field_bitpos; + break; +- } ++ } + + /* If this has a PLACEHOLDER_EXPR, qualify it by the object we are + handling. */ --- a/src/gcc/builtins.c +++ b/src/gcc/builtins.c @@ -4626,13 +4626,15 @@ @@ -3104,7 +3178,101 @@ { --- a/src/gcc/ChangeLog +++ b/src/gcc/ChangeLog -@@ -1,3 +1,126 @@ +@@ -1,3 +1,220 @@ ++2013-05-22 Uros Bizjak <ubizjak@gmail.com> ++ ++ PR target/57356 ++ * config/i386/i386.md (*movti_internal_rex64): Emit movaps/movups ++ for non-sse2 targets. Simplify mode attribute calculation. ++ ++2013-05-17 Uros Bizjak <ubizjak@gmail.com> ++ ++ Backport from mainline ++ 2013-05-16 Uros Bizjak <ubizjak@gmail.com> ++ ++ * config/i386/driver-i386.c (host_detect_local_cpu): Determine ++ cache parameters using detect_caches_amd also for CYRIX, ++ NSC and TM2 signatures. ++ ++ 2013-05-16 Uros Bizjak <ubizjak@gmail.com> ++ Dzianis Kahanovich <mahatma@eu.by> ++ ++ PR target/45359 ++ PR target/46396 ++ * config/i386/driver-i386.c (host_detect_local_cpu): Detect ++ VIA/Centaur processors and determine their cache parameters ++ using detect_caches_amd. ++ ++ 2013-05-15 Uros Bizjak <ubizjak@gmail.com> ++ ++ * config/i386/i386.c (ix86_option_override_internal): Add ++ PTA_POPCNT to corei7 entry. ++ ++2013-05-14 Richard Biener <rguenther@suse.de> ++ ++ PR gcov-profile/57269 ++ Backport from mainline ++ 2012-06-30 Nathan Sidwell <nathan@acm.org> ++ ++ * coverage.c (coverage_init): Read counts file before writing ++ graph header. ++ ++2013-05-13 Uros Bizjak <ubizjak@gmail.com> ++ ++ PR target/57264 ++ Backport from mainline ++ 2013-01-22 Jakub Jelinek <jakub@redhat.com> ++ ++ PR target/55686 ++ * config/i386/i386.md (UNSPEC_STOS): New. ++ (strset_singleop, *strsetdi_rex_1, *strsetsi_1, *strsethi_1, ++ *strsetqi_1): Add UNSPEC_STOS. ++ ++2013-05-10 Joey Ye <joey.ye@arm.com> ++ ++ Backport from mainline ++ 2012-11-29 Matthew Gretton-Dann <matthew.gretton-dann@linaro.org> ++ ++ PR target/54974 ++ * config/arm/arm.md (thumb2_pool_range, pool_range): Add comment on ++ Thumb pool ranges. ++ (thumb1_extendhisi2): Reduce Thumb pool range. ++ (arm_movdi): Likewise. ++ (thumb1_movdi_insn): Likewise. ++ (thumb1_movsi_insn): Likewise. ++ (pic_load_addr_unified): Likewise. ++ (pic_load_addr_32bit): Likewise. ++ (pic_load_addr_thumb1): Likewise. ++ (thumb1_movhf): Likewise. ++ (arm_movsf_soft_insn): Likewise. ++ (thumb1_movsf_soft_insn): Likewise. ++ (movdf_soft_insn): Likewise. ++ (thumb1_movdf_soft_insn): Likewise. ++ * config/arm/neon.md (*neon_mov<mode>): Likewise. ++ (*neon_mov<mode>): Likwise. ++ * config/arm/thumb2.md: (*thumb2_movsi_insn): Likewise. ++ (*thumb2_movhi_insn): Likewise. ++ (*thumb2_extendqisi_v6): Likewise. ++ (*thumb2_zero_extendqisi_v6): Likewise. ++ (*thumb2_zero_extendqisi2_v6): Likewise. ++ * config/arm/vfp.md: (*thumb2_movsi_vfp): Likewise. ++ (*movdi_vfp): Likewise. ++ (*movdi_vfp_cortexa8): Likewise. ++ (*thumb2_movsf_vfp): Likewise. ++ (*thumb2_movdf_vfp): Likewise. ++ ++2013-05-10 Sebastian Huber <sebastian.huber@embedded-brains.de> ++ ++ * config/arm/t-rtems-eabi: Remove mthumb/march=armv7 multilib. ++ Add mthumb/march=armv7-a multilib. ++ Add mthumb/march=armv7-r multilib. ++ Add mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard multilib. ++ ++2013-05-10 Ralf Corsépius <ralf.corsepius@rtems.org> ++ ++ PR target/57237 ++ * config/v850/t-rtems: Add more multilibs. ++ +2013-05-07 Michael Meissner <meissner@linux.vnet.ibm.com> + + Backport from trunk @@ -3127,7 +3295,7 @@ + 2013-04-25 Marek Polacek <polacek@redhat.com> + + PR tree-optimization/57066 -+ * builtins.c (fold_builtin_logb): Return +Inf for -Inf. ++ * builtins.c (fold_builtin_logb): Return +Inf for -Inf. + +2013-04-30 Uros Bizjak <ubizjak@gmail.com> + @@ -52325,7 +52493,7 @@ (const_string "yes")] (const_string "no"))) -@@ -247,11 +265,15 @@ +@@ -247,15 +265,22 @@ ; Enable all alternatives that are both arch_enabled and insn_enabled. (define_attr "enabled" "no,yes" @@ -52346,7 +52514,14 @@ ; POOL_RANGE is how far away from a constant pool entry that this insn ; can be placed. If the distance is zero, then this insn will never -@@ -283,7 +305,7 @@ + ; reference the pool. ++; Note that for Thumb constant pools the PC value is rounded down to the ++; nearest multiple of four. Therefore, THUMB2_POOL_RANGE (and POOL_RANGE for ++; Thumb insns) should be set to <max_range> - 2. + ; NEG_POOL_RANGE is nonzero for insns that can reference a constant pool entry + ; before its address. It is set to <max_range> - (8 + <data_size>). + (define_attr "arm_pool_range" "" (const_int 0)) +@@ -283,7 +308,7 @@ ;; scheduling information. (define_attr "insn" @@ -52355,7 +52530,7 @@ (const_string "other")) ; TYPE attribute is used to detect floating point instructions which, if -@@ -294,8 +316,15 @@ +@@ -294,8 +319,15 @@ ; Classification of each insn ; Note: vfp.md has different meanings for some of these, and some further ; types as well. See that file for details. @@ -52373,7 +52548,7 @@ ; alu_shift any data instruction that doesn't hit memory or fp ; regs, but has a source operand shifted by a constant ; alu_shift_reg any data instruction that doesn't hit memory or fp -@@ -338,11 +367,11 @@ +@@ -338,11 +370,11 @@ ; (define_attr "type" @@ -52387,7 +52562,7 @@ ; Is this an (integer side) multiply with a 64-bit result? (define_attr "mul64" "no,yes" -@@ -356,8 +385,6 @@ +@@ -356,8 +388,6 @@ (define_attr "ldsched" "no,yes" (const (symbol_ref "arm_ld_sched"))) ;; Classification of NEON instructions for scheduling purposes. @@ -52396,7 +52571,7 @@ (define_attr "neon_type" "neon_int_1,\ neon_int_2,\ -@@ -477,7 +504,7 @@ +@@ -477,7 +507,7 @@ ; than one on the main cpu execution unit. (define_attr "core_cycles" "single,multi" (if_then_else (eq_attr "type" @@ -52405,7 +52580,7 @@ (const_string "single") (const_string "multi"))) -@@ -514,7 +541,7 @@ +@@ -514,7 +544,7 @@ (define_attr "generic_sched" "yes,no" (const (if_then_else @@ -52414,7 +52589,7 @@ (eq_attr "tune_cortexr4" "yes")) (const_string "no") (const_string "yes")))) -@@ -522,7 +549,7 @@ +@@ -522,7 +552,7 @@ (define_attr "generic_vfp" "yes,no" (const (if_then_else (and (eq_attr "fpu" "vfp") @@ -52423,7 +52598,7 @@ (eq_attr "tune_cortexr4" "no")) (const_string "yes") (const_string "no")))) -@@ -538,6 +565,7 @@ +@@ -538,6 +568,7 @@ (include "fmp626.md") (include "fa726te.md") (include "cortex-a5.md") @@ -52431,7 +52606,7 @@ (include "cortex-a8.md") (include "cortex-a9.md") (include "cortex-a15.md") -@@ -563,7 +591,7 @@ +@@ -563,7 +594,7 @@ [(parallel [(set (match_operand:DI 0 "s_register_operand" "") (plus:DI (match_operand:DI 1 "s_register_operand" "") @@ -52440,7 +52615,7 @@ (clobber (reg:CC CC_REGNUM))])] "TARGET_EITHER" " -@@ -599,9 +627,9 @@ +@@ -599,9 +630,9 @@ ) (define_insn_and_split "*arm_adddi3" @@ -52453,7 +52628,7 @@ (clobber (reg:CC CC_REGNUM))] "TARGET_32BIT && !(TARGET_HARD_FLOAT && TARGET_MAVERICK) && !TARGET_NEON" "#" -@@ -619,7 +647,7 @@ +@@ -619,7 +650,7 @@ operands[0] = gen_lowpart (SImode, operands[0]); operands[4] = gen_highpart (SImode, operands[1]); operands[1] = gen_lowpart (SImode, operands[1]); @@ -52462,7 +52637,7 @@ operands[2] = gen_lowpart (SImode, operands[2]); }" [(set_attr "conds" "clob") -@@ -746,7 +774,11 @@ +@@ -746,7 +777,11 @@ " [(set_attr "length" "4,4,4,4,4,4,4,4,4,16") (set_attr "predicable" "yes") @@ -52475,7 +52650,7 @@ ) (define_insn_and_split "*thumb1_addsi3" -@@ -815,30 +847,35 @@ +@@ -815,30 +850,35 @@ (define_insn "addsi3_compare0" [(set (reg:CC_NOOV CC_REGNUM) (compare:CC_NOOV @@ -52520,7 +52695,7 @@ ) (define_insn "*compare_negsi_si" -@@ -913,78 +950,90 @@ +@@ -913,78 +953,90 @@ (define_insn "*addsi3_compare_op1" [(set (reg:CC_C CC_REGNUM) (compare:CC_C @@ -52636,7 +52811,7 @@ [(set_attr "conds" "use")] ) -@@ -1214,14 +1263,15 @@ +@@ -1214,14 +1266,15 @@ ; ??? Check Thumb-2 split length (define_insn_and_split "*arm_subsi3_insn" @@ -52655,7 +52830,7 @@ #" "&& (GET_CODE (operands[1]) == CONST_INT && !const_ok_for_arm (INTVAL (operands[1])))" -@@ -1231,8 +1281,9 @@ +@@ -1231,8 +1284,9 @@ INTVAL (operands[1]), operands[0], operands[2], 0); DONE; " @@ -52667,7 +52842,7 @@ ) (define_peephole2 -@@ -1251,29 +1302,33 @@ +@@ -1251,29 +1305,33 @@ (define_insn "*subsi3_compare0" [(set (reg:CC_NOOV CC_REGNUM) (compare:CC_NOOV @@ -52709,7 +52884,7 @@ ) (define_expand "decscc" -@@ -1295,7 +1350,8 @@ +@@ -1295,7 +1353,8 @@ sub%d2\\t%0, %1, #1 mov%D2\\t%0, %1\;sub%d2\\t%0, %1, #1" [(set_attr "conds" "use") @@ -52719,7 +52894,7 @@ ) (define_expand "subsf3" -@@ -2187,13 +2243,14 @@ +@@ -2187,13 +2246,14 @@ ; ??? Check split length for Thumb-2 (define_insn_and_split "*arm_andsi3_insn" @@ -52737,7 +52912,7 @@ #" "TARGET_32BIT && GET_CODE (operands[2]) == CONST_INT -@@ -2205,8 +2262,9 @@ +@@ -2205,8 +2265,9 @@ INTVAL (operands[2]), operands[0], operands[1], 0); DONE; " @@ -52749,7 +52924,7 @@ ) (define_insn "*thumb1_andsi3_insn" -@@ -2216,35 +2274,40 @@ +@@ -2216,35 +2277,40 @@ "TARGET_THUMB1" "and\\t%0, %2" [(set_attr "length" "2") @@ -52800,7 +52975,7 @@ ) (define_insn "*zeroextractsi_compare0_scratch" -@@ -2266,7 +2329,8 @@ +@@ -2266,7 +2332,8 @@ return \"\"; " [(set_attr "conds" "set") @@ -52810,7 +52985,7 @@ ) (define_insn_and_split "*ne_zeroextractsi" -@@ -2913,13 +2977,14 @@ +@@ -2913,13 +2980,14 @@ ) (define_insn_and_split "*iorsi3_insn" @@ -52828,7 +53003,7 @@ #" "TARGET_32BIT && GET_CODE (operands[2]) == CONST_INT -@@ -2931,9 +2996,11 @@ +@@ -2931,9 +2999,11 @@ INTVAL (operands[2]), operands[0], operands[1], 0); DONE; } @@ -52843,7 +53018,7 @@ (define_insn "*thumb1_iorsi3_insn" [(set (match_operand:SI 0 "register_operand" "=l") -@@ -2959,25 +3026,27 @@ +@@ -2959,25 +3029,27 @@ (define_insn "*iorsi3_compare0" [(set (reg:CC_NOOV CC_REGNUM) @@ -52879,7 +53054,7 @@ ) (define_expand "xordi3" -@@ -3051,12 +3120,13 @@ +@@ -3051,12 +3123,13 @@ ) (define_insn_and_split "*arm_xorsi3" @@ -52896,7 +53071,7 @@ #" "TARGET_32BIT && GET_CODE (operands[2]) == CONST_INT -@@ -3067,8 +3137,9 @@ +@@ -3067,8 +3140,9 @@ INTVAL (operands[2]), operands[0], operands[1], 0); DONE; } @@ -52908,7 +53083,7 @@ ) (define_insn "*thumb1_xorsi3_insn" -@@ -3078,28 +3149,32 @@ +@@ -3078,28 +3152,32 @@ "TARGET_THUMB1" "eor\\t%0, %2" [(set_attr "length" "2") @@ -52949,7 +53124,7 @@ ) ; By splitting (IOR (AND (NOT A) (NOT B)) C) as D = AND (IOR A B) (NOT C), -@@ -3446,30 +3521,114 @@ +@@ -3446,30 +3524,114 @@ (const_int 12)))] ) @@ -53019,15 +53194,15 @@ " - if (GET_CODE (operands[2]) == CONST_INT) + if (TARGET_NEON) -+ { + { +- if ((HOST_WIDE_INT) INTVAL (operands[2]) == 1) + /* Delay the decision whether to use NEON or core-regs until + register allocation. */ + emit_insn (gen_ashldi3_neon (operands[0], operands[1], operands[2])); + DONE; + } + else - { -- if ((HOST_WIDE_INT) INTVAL (operands[2]) == 1) ++ { + /* Only the NEON case can handle in-memory shift counts. */ + if (!reg_or_int_operand (operands[2], SImode)) + operands[2] = force_reg (SImode, operands[2]); @@ -53074,7 +53249,7 @@ " ) -@@ -3514,21 +3673,45 @@ +@@ -3514,21 +3676,45 @@ (match_operand:SI 2 "reg_or_int_operand" "")))] "TARGET_32BIT" " @@ -53129,13 +53304,14 @@ " ) -@@ -3571,21 +3754,45 @@ +@@ -3571,21 +3757,45 @@ (match_operand:SI 2 "reg_or_int_operand" "")))] "TARGET_32BIT" " - if (GET_CODE (operands[2]) == CONST_INT) + if (TARGET_NEON) -+ { + { +- if ((HOST_WIDE_INT) INTVAL (operands[2]) == 1) + /* Delay the decision whether to use NEON or core-regs until + register allocation. */ + emit_insn (gen_lshrdi3_neon (operands[0], operands[1], operands[2])); @@ -53146,8 +53322,7 @@ + && (TARGET_REALLY_IWMMXT || (TARGET_HARD_FLOAT && TARGET_MAVERICK))) + ; /* No special preparation statements; expand pattern as above. */ + else - { -- if ((HOST_WIDE_INT) INTVAL (operands[2]) == 1) ++ { + rtx scratch1, scratch2; + + if (CONST_INT_P (operands[2]) @@ -53184,7 +53359,7 @@ " ) -@@ -4037,7 +4244,13 @@ +@@ -4037,7 +4247,13 @@ (neg:DI (match_operand:DI 1 "s_register_operand" ""))) (clobber (reg:CC CC_REGNUM))])] "TARGET_EITHER" @@ -53199,7 +53374,7 @@ ) ;; The constraints here are to prevent a *partial* overlap (where %Q0 == %R1). -@@ -4125,7 +4338,7 @@ +@@ -4125,7 +4341,7 @@ eor%?\\t%0, %1, %1, asr #31\;sub%?\\t%0, %0, %1, asr #31" [(set_attr "conds" "clob,*") (set_attr "shift" "1") @@ -53208,7 +53383,7 @@ (set_attr "length" "8")] ) -@@ -4153,7 +4366,7 @@ +@@ -4153,7 +4369,7 @@ eor%?\\t%0, %1, %1, asr #31\;rsb%?\\t%0, %0, %1, asr #31" [(set_attr "conds" "clob,*") (set_attr "shift" "1") @@ -53217,7 +53392,7 @@ (set_attr "length" "8")] ) -@@ -4196,11 +4409,16 @@ +@@ -4196,11 +4412,16 @@ "") (define_insn_and_split "one_cmpldi2" @@ -53238,7 +53413,7 @@ [(set (match_dup 0) (not:SI (match_dup 1))) (set (match_dup 2) (not:SI (match_dup 3)))] " -@@ -4210,8 +4428,10 @@ +@@ -4210,8 +4431,10 @@ operands[3] = gen_highpart (SImode, operands[1]); operands[1] = gen_lowpart (SImode, operands[1]); }" @@ -53251,7 +53426,7 @@ ) (define_expand "one_cmplsi2" -@@ -4399,33 +4619,36 @@ +@@ -4399,33 +4622,36 @@ ;; Zero and sign extension instructions. (define_insn "zero_extend<mode>di2" @@ -53294,7 +53469,7 @@ [(set (match_dup 0) (match_dup 1))] { rtx lo_part = gen_lowpart (SImode, operands[0]); -@@ -4451,7 +4674,9 @@ +@@ -4451,7 +4677,9 @@ (define_split [(set (match_operand:DI 0 "s_register_operand" "") (sign_extend:DI (match_operand 1 "nonimmediate_operand" "")))] @@ -53305,7 +53480,7 @@ [(set (match_dup 0) (ashiftrt:SI (match_dup 1) (const_int 31)))] { rtx lo_part = gen_lowpart (SImode, operands[0]); -@@ -4544,7 +4769,7 @@ +@@ -4544,7 +4772,7 @@ [(if_then_else (eq_attr "is_arch6" "yes") (const_int 2) (const_int 4)) (const_int 4)]) @@ -53314,7 +53489,7 @@ ) (define_insn "*arm_zero_extendhisi2" -@@ -4565,8 +4790,8 @@ +@@ -4565,8 +4793,8 @@ "@ uxth%?\\t%0, %1 ldr%(h%)\\t%0, %1" @@ -53325,7 +53500,7 @@ ) (define_insn "*arm_zero_extendhisi2addsi" -@@ -4636,7 +4861,7 @@ +@@ -4636,7 +4864,7 @@ uxtb\\t%0, %1 ldrb\\t%0, %1" [(set_attr "length" "2") @@ -53334,7 +53509,7 @@ ) (define_insn "*arm_zero_extendqisi2" -@@ -4658,7 +4883,7 @@ +@@ -4658,7 +4886,7 @@ "@ uxtb%(%)\\t%0, %1 ldr%(b%)\\t%0, %1\\t%@ zero_extendqisi2" @@ -53343,16 +53518,18 @@ (set_attr "predicable" "yes")] ) -@@ -4832,7 +5057,7 @@ +@@ -4832,8 +5060,8 @@ [(if_then_else (eq_attr "is_arch6" "yes") (const_int 2) (const_int 4)) (const_int 4)]) - (set_attr "type" "alu_shift,load_byte") +- (set_attr "pool_range" "*,1020")] + (set_attr "type" "simple_alu_shift,load_byte") - (set_attr "pool_range" "*,1020")] ++ (set_attr "pool_range" "*,1018")] ) -@@ -4904,7 +5129,7 @@ + ;; This pattern will only be used when ldsh is not available +@@ -4904,7 +5132,7 @@ "@ sxth%?\\t%0, %1 ldr%(sh%)\\t%0, %1" @@ -53361,7 +53538,7 @@ (set_attr "predicable" "yes") (set_attr "pool_range" "*,256") (set_attr "neg_pool_range" "*,244")] -@@ -5004,7 +5229,7 @@ +@@ -5004,7 +5232,7 @@ "@ sxtb%?\\t%0, %1 ldr%(sb%)\\t%0, %1" @@ -53370,7 +53547,7 @@ (set_attr "predicable" "yes") (set_attr "pool_range" "*,256") (set_attr "neg_pool_range" "*,244")] -@@ -5117,7 +5342,7 @@ +@@ -5117,7 +5345,7 @@ (const_int 2) (if_then_else (eq_attr "is_arch6" "yes") (const_int 4) (const_int 6))]) @@ -53379,7 +53556,25 @@ ) (define_expand "extendsfdf2" -@@ -5500,7 +5725,7 @@ +@@ -5239,7 +5467,7 @@ + (set_attr "type" "*,*,*,load2,store2") + (set_attr "arm_pool_range" "*,*,*,1020,*") + (set_attr "arm_neg_pool_range" "*,*,*,1004,*") +- (set_attr "thumb2_pool_range" "*,*,*,4096,*") ++ (set_attr "thumb2_pool_range" "*,*,*,4094,*") + (set_attr "thumb2_neg_pool_range" "*,*,*,0,*")] + ) + +@@ -5379,7 +5607,7 @@ + [(set_attr "length" "4,4,6,2,2,6,4,4") + (set_attr "type" "*,*,*,load2,store2,load2,store2,*") + (set_attr "insn" "*,mov,*,*,*,*,*,mov") +- (set_attr "pool_range" "*,*,*,*,*,1020,*,*")] ++ (set_attr "pool_range" "*,*,*,*,*,1018,*,*")] + ) + + (define_expand "movsi" +@@ -5500,7 +5728,7 @@ movw%?\\t%0, %1 ldr%?\\t%0, %1 str%?\\t%1, %0" @@ -53388,7 +53583,46 @@ (set_attr "insn" "mov,mov,mvn,mov,*,*") (set_attr "predicable" "yes") (set_attr "pool_range" "*,*,*,*,4096,*") -@@ -5766,7 +5991,8 @@ +@@ -5539,7 +5767,7 @@ + mov\\t%0, %1" + [(set_attr "length" "2,2,4,4,2,2,2,2,2") + (set_attr "type" "*,*,*,*,load1,store1,load1,store1,*") +- (set_attr "pool_range" "*,*,*,*,*,*,1020,*,*") ++ (set_attr "pool_range" "*,*,*,*,*,*,1018,*,*") + (set_attr "conds" "set,clob,*,*,nocond,nocond,nocond,nocond,nocond")]) + + (define_split +@@ -5632,7 +5860,7 @@ + (match_dup 2)] UNSPEC_PIC_BASE))] + "operands[3] = TARGET_THUMB ? GEN_INT (4) : GEN_INT (8);" + [(set_attr "type" "load1,load1,load1") +- (set_attr "pool_range" "4096,4096,1024") ++ (set_attr "pool_range" "4096,4094,1022") + (set_attr "neg_pool_range" "4084,0,0") + (set_attr "arch" "a,t2,t1") + (set_attr "length" "8,6,4")] +@@ -5648,7 +5876,10 @@ + "TARGET_32BIT && flag_pic" + "ldr%?\\t%0, %1" + [(set_attr "type" "load1") +- (set_attr "pool_range" "4096") ++ (set (attr "pool_range") ++ (if_then_else (eq_attr "is_thumb" "no") ++ (const_int 4096) ++ (const_int 4094))) + (set (attr "neg_pool_range") + (if_then_else (eq_attr "is_thumb" "no") + (const_int 4084) +@@ -5661,7 +5892,7 @@ + "TARGET_THUMB1 && flag_pic" + "ldr\\t%0, %1" + [(set_attr "type" "load1") +- (set (attr "pool_range") (const_int 1024))] ++ (set (attr "pool_range") (const_int 1018))] + ) + + (define_insn "pic_add_dot_plus_four" +@@ -5766,7 +5997,8 @@ "@ cmp%?\\t%0, #0 sub%.\\t%0, %1, #0" @@ -53398,7 +53632,7 @@ ) ;; Subroutine to store a half word from a register into memory. -@@ -6179,22 +6405,30 @@ +@@ -6179,22 +6411,30 @@ mvn%?\\t%0, #%B1\\t%@ movhi str%(h%)\\t%1, %0\\t%@ movhi ldr%(h%)\\t%0, %1\\t%@ movhi" @@ -53435,7 +53669,7 @@ ) (define_expand "thumb_movhi_clobber" -@@ -6319,23 +6553,24 @@ +@@ -6319,23 +6559,24 @@ (define_insn "*arm_movqi_insn" @@ -53466,7 +53700,7 @@ ) (define_insn "*thumb1_movqi_insn" -@@ -6352,7 +6587,7 @@ +@@ -6352,7 +6593,7 @@ mov\\t%0, %1 mov\\t%0, %1" [(set_attr "length" "2") @@ -53475,7 +53709,54 @@ (set_attr "insn" "*,*,*,mov,mov,mov") (set_attr "pool_range" "*,32,*,*,*,*") (set_attr "conds" "clob,nocond,nocond,nocond,nocond,clob")]) -@@ -7499,7 +7734,8 @@ +@@ -6456,7 +6697,7 @@ + [(set_attr "length" "2") + (set_attr "type" "*,load1,store1,*,*") + (set_attr "insn" "mov,*,*,mov,mov") +- (set_attr "pool_range" "*,1020,*,*,*") ++ (set_attr "pool_range" "*,1018,*,*,*") + (set_attr "conds" "clob,nocond,nocond,nocond,nocond")]) + + (define_expand "movsf" +@@ -6511,7 +6752,8 @@ + [(set_attr "predicable" "yes") + (set_attr "type" "*,load1,store1") + (set_attr "insn" "mov,*,*") +- (set_attr "pool_range" "*,4096,*") ++ (set_attr "arm_pool_range" "*,4096,*") ++ (set_attr "thumb2_pool_range" "*,4094,*") + (set_attr "arm_neg_pool_range" "*,4084,*") + (set_attr "thumb2_neg_pool_range" "*,0,*")] + ) +@@ -6533,7 +6775,7 @@ + mov\\t%0, %1" + [(set_attr "length" "2") + (set_attr "type" "*,load1,store1,load1,store1,*,*") +- (set_attr "pool_range" "*,*,*,1020,*,*,*") ++ (set_attr "pool_range" "*,*,*,1018,*,*,*") + (set_attr "insn" "*,*,*,*,*,mov,mov") + (set_attr "conds" "clob,nocond,nocond,nocond,nocond,nocond,nocond")] + ) +@@ -6622,7 +6864,8 @@ + " + [(set_attr "length" "8,12,16,8,8") + (set_attr "type" "*,*,*,load2,store2") +- (set_attr "pool_range" "*,*,*,1020,*") ++ (set_attr "arm_pool_range" "*,*,*,1020,*") ++ (set_attr "thumb2_pool_range" "*,*,*,1018,*") + (set_attr "arm_neg_pool_range" "*,*,*,1004,*") + (set_attr "thumb2_neg_pool_range" "*,*,*,0,*")] + ) +@@ -6665,7 +6908,7 @@ + [(set_attr "length" "4,2,2,6,4,4") + (set_attr "type" "*,load2,store2,load2,store2,*") + (set_attr "insn" "*,*,*,*,*,mov") +- (set_attr "pool_range" "*,*,*,1020,*,*")] ++ (set_attr "pool_range" "*,*,*,1018,*,*")] + ) + + (define_expand "movxf" +@@ -7499,7 +7742,8 @@ [(set_attr "conds" "set") (set_attr "arch" "t2,t2,any,any") (set_attr "length" "2,2,4,4") @@ -53485,7 +53766,7 @@ ) (define_insn "*cmpsi_shiftsi" -@@ -7655,7 +7891,7 @@ +@@ -7655,7 +7899,7 @@ ;; Patterns to match conditional branch insns. ;; @@ -53494,7 +53775,7 @@ [(set (pc) (if_then_else (match_operator 1 "arm_comparison_operator" [(match_operand 2 "cc_register" "") (const_int 0)]) -@@ -8111,7 +8347,20 @@ +@@ -8111,7 +8355,20 @@ mvn%d3\\t%0, #%B1\;mvn%D3\\t%0, #%B2" [(set_attr "length" "4,4,4,4,8,8,8,8") (set_attr "conds" "use") @@ -53516,7 +53797,7 @@ ) (define_insn "*movsfcc_soft_insn" -@@ -9882,7 +10131,13 @@ +@@ -9882,7 +10139,13 @@ sub%d4\\t%0, %2, #%n3\;mov%D4\\t%0, %1" [(set_attr "conds" "use") (set_attr "length" "4,4,8,8") @@ -53531,7 +53812,7 @@ ) (define_insn "*ifcompare_move_plus" -@@ -9918,7 +10173,13 @@ +@@ -9918,7 +10181,13 @@ sub%D4\\t%0, %2, #%n3\;mov%d4\\t%0, %1" [(set_attr "conds" "use") (set_attr "length" "4,4,8,8") @@ -53546,7 +53827,7 @@ ) (define_insn "*ifcompare_arith_arith" -@@ -11225,20 +11486,15 @@ +@@ -11225,20 +11494,15 @@ ) (define_insn "*arm_rev" @@ -53576,7 +53857,7 @@ ) (define_expand "arm_legacy_rev" -@@ -11326,6 +11582,40 @@ +@@ -11326,6 +11590,40 @@ " ) @@ -55988,7 +56269,7 @@ case 2: gcc_unreachable (); case 4: return "vmov\t%Q0, %R0, %P1 @ <mode>"; case 5: return "vmov\t%P0, %Q1, %R1 @ <mode>"; -@@ -198,7 +194,7 @@ +@@ -198,10 +194,11 @@ } } [(set_attr "neon_type" "neon_int_1,*,neon_vmov,*,neon_mrrc,neon_mcr_2_mcrr,*,*,*") @@ -55996,8 +56277,13 @@ + (set_attr "type" "*,f_stored,*,f_loadd,*,*,alu_reg,load2,store2") (set_attr "insn" "*,*,*,*,*,*,mov,*,*") (set_attr "length" "4,4,4,4,4,4,8,8,8") - (set_attr "pool_range" "*,*,*,1020,*,*,*,1020,*") -@@ -243,7 +239,7 @@ +- (set_attr "pool_range" "*,*,*,1020,*,*,*,1020,*") ++ (set_attr "arm_pool_range" "*,*,*,1020,*,*,*,1020,*") ++ (set_attr "thumb2_pool_range" "*,*,*,1018,*,*,*,1018,*") + (set_attr "neg_pool_range" "*,*,*,1004,*,*,*,1004,*")]) + + (define_insn "*neon_mov<mode>" +@@ -243,10 +240,11 @@ } [(set_attr "neon_type" "neon_int_1,neon_stm_2,neon_vmov,neon_ldm_2,\ neon_mrrc,neon_mcr_2_mcrr,*,*,*") @@ -56005,8 +56291,13 @@ + (set_attr "type" "*,*,*,*,*,*,alu_reg,load4,store4") (set_attr "insn" "*,*,*,*,*,*,mov,*,*") (set_attr "length" "4,8,4,8,8,8,16,8,16") - (set_attr "pool_range" "*,*,*,1020,*,*,*,1020,*") -@@ -422,30 +418,33 @@ +- (set_attr "pool_range" "*,*,*,1020,*,*,*,1020,*") ++ (set_attr "arm_pool_range" "*,*,*,1020,*,*,*,1020,*") ++ (set_attr "thumb2_pool_range" "*,*,*,1018,*,*,*,1018,*") + (set_attr "neg_pool_range" "*,*,*,996,*,*,*,996,*")]) + + (define_expand "movti" +@@ -422,30 +420,33 @@ [(set_attr "neon_type" "neon_vld1_1_2_regs")]) (define_insn "vec_set<mode>_internal" @@ -56051,7 +56342,7 @@ "TARGET_NEON" { HOST_WIDE_INT elem = ffs ((int) INTVAL (operands[2])) - 1; -@@ -460,18 +459,21 @@ +@@ -460,18 +461,21 @@ operands[0] = gen_rtx_REG (<V_HALF>mode, regno + hi); operands[2] = GEN_INT (elt); @@ -56079,7 +56370,7 @@ "TARGET_NEON" { HOST_WIDE_INT elem = ffs ((int) INTVAL (operands[2])) - 1; -@@ -479,9 +481,12 @@ +@@ -479,9 +483,12 @@ operands[0] = gen_rtx_REG (DImode, regno); @@ -56094,7 +56385,7 @@ ) (define_expand "vec_set<mode>" -@@ -497,10 +502,10 @@ +@@ -497,10 +504,10 @@ }) (define_insn "vec_extract<mode>" @@ -56108,7 +56399,7 @@ "TARGET_NEON" { if (BYTES_BIG_ENDIAN) -@@ -509,16 +514,20 @@ +@@ -509,16 +516,20 @@ elt = GET_MODE_NUNITS (<MODE>mode) - 1 - elt; operands[2] = GEN_INT (elt); } @@ -56134,7 +56425,7 @@ "TARGET_NEON" { int half_elts = GET_MODE_NUNITS (<MODE>mode) / 2; -@@ -532,25 +541,31 @@ +@@ -532,25 +543,31 @@ operands[1] = gen_rtx_REG (<V_HALF>mode, regno + hi); operands[2] = GEN_INT (elt); @@ -56173,7 +56464,7 @@ ) (define_expand "vec_init<mode>" -@@ -582,9 +597,9 @@ +@@ -582,9 +599,9 @@ ) (define_insn "adddi3_neon" @@ -56186,7 +56477,7 @@ (clobber (reg:CC CC_REGNUM))] "TARGET_NEON" { -@@ -594,13 +609,16 @@ +@@ -594,13 +611,16 @@ case 3: return "vadd.i64\t%P0, %P1, %P2"; case 1: return "#"; case 2: return "#"; @@ -56207,7 +56498,7 @@ ) (define_insn "*sub<mode>3_neon" -@@ -637,7 +655,7 @@ +@@ -637,7 +657,7 @@ [(set_attr "neon_type" "neon_int_2,*,*,*,neon_int_2") (set_attr "conds" "*,clob,clob,clob,*") (set_attr "length" "*,8,8,8,*") @@ -56216,7 +56507,7 @@ ) (define_insn "*mul<mode>3_neon" -@@ -705,6 +723,63 @@ +@@ -705,6 +725,63 @@ (const_string "neon_mla_qqq_32_qqd_32_scalar")))))] ) @@ -56280,7 +56571,7 @@ (define_insn "ior<mode>3" [(set (match_operand:VDQ 0 "s_register_operand" "=w,w") (ior:VDQ (match_operand:VDQ 1 "s_register_operand" "w,0") -@@ -742,7 +817,7 @@ +@@ -742,7 +819,7 @@ } [(set_attr "neon_type" "neon_int_1,neon_int_1,*,*,neon_int_1,neon_int_1") (set_attr "length" "*,*,8,8,*,*") @@ -56289,7 +56580,7 @@ ) ;; The concrete forms of the Neon immediate-logic instructions are vbic and -@@ -787,7 +862,7 @@ +@@ -787,7 +864,7 @@ } [(set_attr "neon_type" "neon_int_1,neon_int_1,*,*,neon_int_1,neon_int_1") (set_attr "length" "*,*,8,8,*,*") @@ -56298,7 +56589,7 @@ ) (define_insn "orn<mode>3_neon" -@@ -883,7 +958,7 @@ +@@ -883,7 +960,7 @@ veor\t%P0, %P1, %P2" [(set_attr "neon_type" "neon_int_1,*,*,neon_int_1") (set_attr "length" "*,8,8,*") @@ -56307,7 +56598,7 @@ ) (define_insn "one_cmpl<mode>2" -@@ -920,6 +995,45 @@ +@@ -920,6 +997,45 @@ (const_string "neon_int_3")))] ) @@ -56353,7 +56644,7 @@ (define_insn "*umin<mode>3_neon" [(set (match_operand:VDQIW 0 "s_register_operand" "=w") (umin:VDQIW (match_operand:VDQIW 1 "s_register_operand" "w") -@@ -1088,6 +1202,189 @@ +@@ -1088,6 +1204,189 @@ DONE; }) @@ -56543,7 +56834,7 @@ ;; Widening operations (define_insn "widen_ssum<mode>3" -@@ -1843,6 +2140,32 @@ +@@ -1843,6 +2142,32 @@ DONE; }) @@ -56576,7 +56867,7 @@ ; Used for intrinsics when flag_unsafe_math_optimizations is false. (define_insn "neon_vmla<mode>_unspec" -@@ -2108,7 +2431,7 @@ +@@ -2108,7 +2433,7 @@ [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w,w") (unspec:<V_cmp_result> [(match_operand:VDQW 1 "s_register_operand" "w,w") @@ -56585,7 +56876,7 @@ (match_operand:SI 3 "immediate_operand" "i,i")] UNSPEC_VCEQ))] "TARGET_NEON" -@@ -2127,7 +2450,7 @@ +@@ -2127,7 +2452,7 @@ [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w,w") (unspec:<V_cmp_result> [(match_operand:VDQW 1 "s_register_operand" "w,w") @@ -56594,7 +56885,7 @@ (match_operand:SI 3 "immediate_operand" "i,i")] UNSPEC_VCGE))] "TARGET_NEON" -@@ -2158,7 +2481,7 @@ +@@ -2158,7 +2483,7 @@ [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w,w") (unspec:<V_cmp_result> [(match_operand:VDQW 1 "s_register_operand" "w,w") @@ -56603,7 +56894,7 @@ (match_operand:SI 3 "immediate_operand" "i,i")] UNSPEC_VCGT))] "TARGET_NEON" -@@ -2192,7 +2515,7 @@ +@@ -2192,7 +2517,7 @@ [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w") (unspec:<V_cmp_result> [(match_operand:VDQW 1 "s_register_operand" "w") @@ -56612,7 +56903,7 @@ (match_operand:SI 3 "immediate_operand" "i")] UNSPEC_VCLE))] "TARGET_NEON" -@@ -2209,7 +2532,7 @@ +@@ -2209,7 +2534,7 @@ [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w") (unspec:<V_cmp_result> [(match_operand:VDQW 1 "s_register_operand" "w") @@ -56621,7 +56912,7 @@ (match_operand:SI 3 "immediate_operand" "i")] UNSPEC_VCLT))] "TARGET_NEON" -@@ -2710,14 +3033,24 @@ +@@ -2710,14 +3035,24 @@ }) (define_expand "neon_vget_lanev2di" @@ -56652,7 +56943,7 @@ DONE; }) -@@ -4367,9 +4700,10 @@ +@@ -4367,9 +4702,10 @@ (define_insn "neon_vst1_lane<mode>" [(set (match_operand:<V_elem> 0 "neon_struct_operand" "=Um") @@ -56666,7 +56957,7 @@ "TARGET_NEON" { HOST_WIDE_INT lane = INTVAL (operands[2]); -@@ -4388,9 +4722,10 @@ +@@ -4388,9 +4724,10 @@ (define_insn "neon_vst1_lane<mode>" [(set (match_operand:<V_elem> 0 "neon_struct_operand" "=Um") @@ -56680,7 +56971,7 @@ "TARGET_NEON" { HOST_WIDE_INT lane = INTVAL (operands[2]); -@@ -5666,3 +6001,65 @@ +@@ -5666,3 +6003,65 @@ (const_string "neon_fp_vadd_qqq_vabs_qq")) (const_string "neon_int_5")))] ) @@ -56969,42 +57260,63 @@ (set_attr "length" "10,8")] ) -@@ -180,7 +182,7 @@ +@@ -180,9 +182,9 @@ ldr%?\\t%0, %1 str%?\\t%1, %0 str%?\\t%1, %0" - [(set_attr "type" "*,*,*,*,load1,load1,store1,store1") + [(set_attr "type" "*,*,simple_alu_imm,*,load1,load1,store1,store1") (set_attr "predicable" "yes") - (set_attr "pool_range" "*,*,*,*,1020,4096,*,*") +- (set_attr "pool_range" "*,*,*,*,1020,4096,*,*") ++ (set_attr "pool_range" "*,*,*,*,1018,4094,*,*") (set_attr "neg_pool_range" "*,*,*,*,0,0,*,*")] -@@ -568,7 +570,7 @@ + ) + +@@ -217,7 +219,7 @@ + ldr%(h%)\\t%0, %1\\t%@ movhi" + [(set_attr "type" "*,*,store1,load1") + (set_attr "predicable" "yes") +- (set_attr "pool_range" "*,*,*,4096") ++ (set_attr "pool_range" "*,*,*,4094") + (set_attr "neg_pool_range" "*,*,*,250")] + ) + +@@ -568,9 +570,9 @@ "@ sxtb%?\\t%0, %1 ldr%(sb%)\\t%0, %1" - [(set_attr "type" "alu_shift,load_byte") + [(set_attr "type" "simple_alu_shift,load_byte") (set_attr "predicable" "yes") - (set_attr "pool_range" "*,4096") +- (set_attr "pool_range" "*,4096") ++ (set_attr "pool_range" "*,4094") (set_attr "neg_pool_range" "*,250")] -@@ -581,7 +583,7 @@ + ) + +@@ -581,9 +583,9 @@ "@ uxth%?\\t%0, %1 ldr%(h%)\\t%0, %1" - [(set_attr "type" "alu_shift,load_byte") + [(set_attr "type" "simple_alu_shift,load_byte") (set_attr "predicable" "yes") - (set_attr "pool_range" "*,4096") +- (set_attr "pool_range" "*,4096") ++ (set_attr "pool_range" "*,4094") (set_attr "neg_pool_range" "*,250")] -@@ -594,7 +596,7 @@ + ) + +@@ -594,9 +596,9 @@ "@ uxtb%(%)\\t%0, %1 ldr%(b%)\\t%0, %1\\t%@ zero_extendqisi2" - [(set_attr "type" "alu_shift,load_byte") + [(set_attr "type" "simple_alu_shift,load_byte") (set_attr "predicable" "yes") - (set_attr "pool_range" "*,4096") +- (set_attr "pool_range" "*,4096") ++ (set_attr "pool_range" "*,4094") (set_attr "neg_pool_range" "*,250")] + ) + @@ -677,27 +679,6 @@ (set_attr "length" "2")] ) @@ -57169,6 +57481,62 @@ (define_insn "*thumb2_negsi2_short" [(set (match_operand:SI 0 "low_register_operand" "=l") (neg:SI (match_operand:SI 1 "low_register_operand" "l"))) +--- a/src/gcc/config/arm/t-rtems-eabi ++++ b/src/gcc/config/arm/t-rtems-eabi +@@ -1,8 +1,47 @@ + # Custom RTEMS EABI multilibs + +-MULTILIB_OPTIONS = mthumb march=armv6-m/march=armv7/march=armv7-m +-MULTILIB_DIRNAMES = thumb armv6-m armv7 armv7-m +-MULTILIB_EXCEPTIONS = march=armv6-m march=armv7 march=armv7-m +-MULTILIB_MATCHES = +-MULTILIB_EXCLUSIONS = +-MULTILIB_OSDIRNAMES = ++MULTILIB_OPTIONS = mthumb march=armv6-m/march=armv7-a/march=armv7-r/march=armv7-m mfpu=neon mfloat-abi=hard ++MULTILIB_DIRNAMES = thumb armv6-m armv7-a armv7-r armv7-m neon hard ++ ++# Enumeration of multilibs ++ ++MULTILIB_EXCEPTIONS = ++MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon ++MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfloat-abi=hard ++# MULTILIB_EXCEPTIONS += mthumb/march=armv6-m ++# MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfloat-abi=hard ++# MULTILIB_EXCEPTIONS += mthumb/march=armv7-a ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfloat-abi=hard ++# MULTILIB_EXCEPTIONS += mthumb/march=armv7-r ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfloat-abi=hard ++# MULTILIB_EXCEPTIONS += mthumb/march=armv7-m ++MULTILIB_EXCEPTIONS += mthumb/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += mthumb/mfpu=neon ++MULTILIB_EXCEPTIONS += mthumb/mfloat-abi=hard ++# MULTILIB_EXCEPTIONS += mthumb ++MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon ++MULTILIB_EXCEPTIONS += march=armv6-m/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv6-m ++MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon ++MULTILIB_EXCEPTIONS += march=armv7-a/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv7-a ++MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon ++MULTILIB_EXCEPTIONS += march=armv7-r/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv7-r ++MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon ++MULTILIB_EXCEPTIONS += march=armv7-m/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv7-m ++MULTILIB_EXCEPTIONS += mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += mfpu=neon ++MULTILIB_EXCEPTIONS += mfloat-abi=hard --- a/src/gcc/config/arm/vfp11.md +++ b/src/gcc/config/arm/vfp11.md @@ -56,12 +56,12 @@ @@ -57207,14 +57575,17 @@ (set_attr "insn" "mov,mov,mvn,mov,*,*,*,*,*,*,*") (set_attr "pool_range" "*,*,*,*,4096,*,*,*,*,1020,*") (set_attr "neg_pool_range" "*,*,*,*,4084,*,*,*,*,1008,*")] -@@ -125,6 +128,7 @@ +@@ -125,8 +128,9 @@ " [(set_attr "predicable" "yes") (set_attr "type" "*,*,*,*,load1,load1,store1,store1,r_2_f,f_2_r,fcpys,f_loads,f_stores") + (set_attr "neon_type" "*,*,*,*,*,*,*,*,neon_mcr,neon_mrc,neon_vmov,*,*") (set_attr "insn" "mov,mov,mvn,mov,*,*,*,*,*,*,*,*,*") - (set_attr "pool_range" "*,*,*,*,1020,4096,*,*,*,*,*,1020,*") +- (set_attr "pool_range" "*,*,*,*,1020,4096,*,*,*,*,*,1020,*") ++ (set_attr "pool_range" "*,*,*,*,1018,4094,*,*,*,*,*,1018,*") (set_attr "neg_pool_range" "*,*,*,*, 0, 0,*,*,*,*,*,1008,*")] + ) + @@ -138,7 +142,9 @@ (match_operand:DI 1 "di_operand" "r,rDa,Db,Dc,mi,mi,r,r,w,w,Uvi,w"))] "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP && arm_tune != cortexa8 @@ -57226,7 +57597,17 @@ "* switch (which_alternative) { -@@ -187,7 +193,8 @@ +@@ -177,7 +183,8 @@ + (const_int 8) + (const_int 4))] + (const_int 4))) +- (set_attr "pool_range" "*,*,*,*,1020,4096,*,*,*,*,1020,*") ++ (set_attr "arm_pool_range" "*,*,*,*,1020,4096,*,*,*,*,1020,*") ++ (set_attr "thumb2_pool_range" "*,*,*,*,1018,4094,*,*,*,*,1018,*") + (set_attr "neg_pool_range" "*,*,*,*,1004,0,*,*,*,*,1004,*") + (set_attr "arch" "t2,any,any,any,a,t2,any,any,any,any,any,any")] + ) +@@ -187,7 +194,8 @@ (match_operand:DI 1 "di_operand" "r,rDa,Db,Dc,mi,mi,r,r,w,w,Uvi,w"))] "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP && arm_tune == cortexa8 && ( register_operand (operands[0], DImode) @@ -57236,7 +57617,7 @@ "* switch (which_alternative) { -@@ -213,6 +220,7 @@ +@@ -213,6 +221,7 @@ } " [(set_attr "type" "*,*,*,*,load2,load2,store2,r_2_f,f_2_r,ffarithd,f_loadd,f_stored") @@ -57244,7 +57625,17 @@ (set (attr "length") (cond [(eq_attr "alternative" "1") (const_int 8) (eq_attr "alternative" "2") (const_int 12) (eq_attr "alternative" "3") (const_int 16) -@@ -371,6 +379,7 @@ +@@ -222,7 +231,8 @@ + * 4")] + (const_int 4))) + (set_attr "predicable" "yes") +- (set_attr "pool_range" "*,*,*,*,1020,4096,*,*,*,*,1020,*") ++ (set_attr "arm_pool_range" "*,*,*,*,1018,4094,*,*,*,*,1018,*") ++ (set_attr "thumb2_pool_range" "*,*,*,*,1018,4094,*,*,*,*,1018,*") + (set_attr "neg_pool_range" "*,*,*,*,1004,0,*,*,*,*,1004,*") + (set (attr "ce_count") + (symbol_ref "get_attr_length (insn) / 4")) +@@ -371,6 +381,7 @@ [(set_attr "predicable" "yes") (set_attr "type" "r_2_f,f_2_r,fconsts,f_loads,f_stores,load1,store1,fcpys,*") @@ -57252,15 +57643,18 @@ (set_attr "insn" "*,*,*,*,*,*,*,*,mov") (set_attr "pool_range" "*,*,*,1020,*,4096,*,*,*") (set_attr "neg_pool_range" "*,*,*,1008,*,4080,*,*,*")] -@@ -408,6 +417,7 @@ +@@ -408,8 +419,9 @@ [(set_attr "predicable" "yes") (set_attr "type" "r_2_f,f_2_r,fconsts,f_loads,f_stores,load1,store1,fcpys,*") + (set_attr "neon_type" "neon_mcr,neon_mrc,*,*,*,*,*,neon_vmov,*") (set_attr "insn" "*,*,*,*,*,*,*,*,mov") - (set_attr "pool_range" "*,*,*,1020,*,4092,*,*,*") +- (set_attr "pool_range" "*,*,*,1020,*,4092,*,*,*") ++ (set_attr "pool_range" "*,*,*,1018,*,4090,*,*,*") (set_attr "neg_pool_range" "*,*,*,1008,*,0,*,*,*")] -@@ -451,6 +461,7 @@ + ) + +@@ -451,6 +463,7 @@ " [(set_attr "type" "r_2_f,f_2_r,fconstd,f_loadd,f_stored,load2,store2,ffarithd,*") @@ -57268,7 +57662,7 @@ (set (attr "length") (cond [(eq_attr "alternative" "5,6,8") (const_int 8) (eq_attr "alternative" "7") (if_then_else -@@ -494,6 +505,7 @@ +@@ -494,6 +507,7 @@ " [(set_attr "type" "r_2_f,f_2_r,fconstd,f_loadd,f_stored,load2,store2,ffarithd,*") @@ -57276,7 +57670,16 @@ (set (attr "length") (cond [(eq_attr "alternative" "5,6,8") (const_int 8) (eq_attr "alternative" "7") (if_then_else -@@ -528,7 +540,8 @@ +@@ -501,7 +515,7 @@ + (const_int 8) + (const_int 4))] + (const_int 4))) +- (set_attr "pool_range" "*,*,*,1020,*,4096,*,*,*") ++ (set_attr "pool_range" "*,*,*,1018,*,4094,*,*,*") + (set_attr "neg_pool_range" "*,*,*,1008,*,0,*,*,*")] + ) + +@@ -528,7 +542,8 @@ fmrs%D3\\t%0, %2\;fmrs%d3\\t%0, %1" [(set_attr "conds" "use") (set_attr "length" "4,4,8,4,4,8,4,4,8") @@ -57286,7 +57689,7 @@ ) (define_insn "*thumb2_movsfcc_vfp" -@@ -551,7 +564,8 @@ +@@ -551,7 +566,8 @@ ite\\t%D3\;fmrs%D3\\t%0, %2\;fmrs%d3\\t%0, %1" [(set_attr "conds" "use") (set_attr "length" "6,6,10,6,6,10,6,6,10") @@ -57296,7 +57699,7 @@ ) (define_insn "*movdfcc_vfp" -@@ -574,7 +588,8 @@ +@@ -574,7 +590,8 @@ fmrrd%D3\\t%Q0, %R0, %P2\;fmrrd%d3\\t%Q0, %R0, %P1" [(set_attr "conds" "use") (set_attr "length" "4,4,8,4,4,8,4,4,8") @@ -57306,7 +57709,7 @@ ) (define_insn "*thumb2_movdfcc_vfp" -@@ -597,7 +612,8 @@ +@@ -597,7 +614,8 @@ ite\\t%D3\;fmrrd%D3\\t%Q0, %R0, %P2\;fmrrd%d3\\t%Q0, %R0, %P1" [(set_attr "conds" "use") (set_attr "length" "6,6,10,6,6,10,6,6,10") @@ -57316,7 +57719,7 @@ ) -@@ -886,6 +902,54 @@ +@@ -886,6 +904,54 @@ (set_attr "type" "fmacd")] ) @@ -57402,8 +57805,81 @@ /* When generating stabs debugging, use N_BINCL entries. */ #define DBX_USE_BINCL +--- a/src/gcc/config/i386/driver-i386.c ++++ b/src/gcc/config/i386/driver-i386.c +@@ -350,7 +350,10 @@ + enum vendor_signatures + { + SIG_INTEL = 0x756e6547 /* Genu */, +- SIG_AMD = 0x68747541 /* Auth */ ++ SIG_AMD = 0x68747541 /* Auth */, ++ SIG_CENTAUR = 0x746e6543 /* Cent */, ++ SIG_CYRIX = 0x69727943 /* Cyri */, ++ SIG_NSC = 0x646f6547 /* Geod */ + }; + + enum processor_signatures +@@ -510,7 +513,10 @@ + + if (!arch) + { +- if (vendor == SIG_AMD) ++ if (vendor == SIG_AMD ++ || vendor == SIG_CENTAUR ++ || vendor == SIG_CYRIX ++ || vendor == SIG_NSC) + cache = detect_caches_amd (ext_level); + else if (vendor == SIG_INTEL) + { +@@ -549,6 +555,37 @@ + else + processor = PROCESSOR_PENTIUM; + } ++ else if (vendor == SIG_CENTAUR) ++ { ++ if (arch) ++ { ++ switch (family) ++ { ++ case 6: ++ if (model > 9) ++ /* Use the default detection procedure. */ ++ processor = PROCESSOR_GENERIC32; ++ else if (model == 9) ++ cpu = "c3-2"; ++ else if (model >= 6) ++ cpu = "c3"; ++ else ++ processor = PROCESSOR_GENERIC32; ++ break; ++ case 5: ++ if (has_3dnow) ++ cpu = "winchip2"; ++ else if (has_mmx) ++ cpu = "winchip2-c6"; ++ else ++ processor = PROCESSOR_GENERIC32; ++ break; ++ default: ++ /* We have no idea. */ ++ processor = PROCESSOR_GENERIC32; ++ } ++ } ++ } + else + { + switch (family) --- a/src/gcc/config/i386/i386.c +++ b/src/gcc/config/i386/i386.c +@@ -2979,7 +2979,7 @@ + | PTA_SSSE3 | PTA_CX16}, + {"corei7", PROCESSOR_COREI7_64, CPU_COREI7, + PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 +- | PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16}, ++ | PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16 | PTA_POPCNT}, + {"corei7-avx", PROCESSOR_COREI7_64, CPU_COREI7, + PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 + | PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_AVX @@ -20026,7 +20026,7 @@ vec[i * 2 + 1] = const1_rtx; } @@ -57433,7 +57909,44 @@ --- a/src/gcc/config/i386/i386.md +++ b/src/gcc/config/i386/i386.md -@@ -3444,9 +3444,9 @@ +@@ -109,6 +109,7 @@ + UNSPEC_CALL_NEEDS_VZEROUPPER + UNSPEC_PAUSE + UNSPEC_LEA_ADDR ++ UNSPEC_STOS + + ;; For SSE/MMX support: + UNSPEC_FIX_NOTRUNC +@@ -1855,18 +1856,16 @@ + [(set_attr "type" "*,*,sselog1,ssemov,ssemov") + (set_attr "prefix" "*,*,maybe_vex,maybe_vex,maybe_vex") + (set (attr "mode") +- (cond [(eq_attr "alternative" "2,3") +- (if_then_else +- (match_test "optimize_function_for_size_p (cfun)") +- (const_string "V4SF") +- (const_string "TI")) +- (eq_attr "alternative" "4") +- (if_then_else +- (ior (match_test "TARGET_SSE_TYPELESS_STORES") +- (match_test "optimize_function_for_size_p (cfun)")) +- (const_string "V4SF") +- (const_string "TI"))] +- (const_string "DI")))]) ++ (cond [(eq_attr "alternative" "0,1") ++ (const_string "DI") ++ (ior (not (match_test "TARGET_SSE2")) ++ (match_test "optimize_function_for_size_p (cfun)")) ++ (const_string "V4SF") ++ (and (eq_attr "alternative" "4") ++ (match_test "TARGET_SSE_TYPELESS_STORES")) ++ (const_string "V4SF") ++ ] ++ (const_string "TI")))]) + + (define_split + [(set (match_operand:TI 0 "nonimmediate_operand" "") +@@ -3444,9 +3443,9 @@ }) (define_insn "*zero_extendsidi2_rex64" @@ -57445,7 +57958,7 @@ "TARGET_64BIT" "@ mov{l}\t{%1, %k0|%k0, %1} -@@ -3469,9 +3469,9 @@ +@@ -3469,9 +3468,9 @@ ;; %%% Kill me once multi-word ops are sane. (define_insn "zero_extendsidi2_1" @@ -57457,6 +57970,56 @@ (clobber (reg:CC FLAGS_REG))] "!TARGET_64BIT" "@ +@@ -15912,7 +15911,8 @@ + [(parallel [(set (match_operand 1 "memory_operand" "") + (match_operand 2 "register_operand" "")) + (set (match_operand 0 "register_operand" "") +- (match_operand 3 "" ""))])] ++ (match_operand 3 "" "")) ++ (unspec [(const_int 0)] UNSPEC_STOS)])] + "" + "ix86_current_function_needs_cld = 1;") + +@@ -15921,7 +15921,8 @@ + (match_operand:DI 2 "register_operand" "a")) + (set (match_operand:DI 0 "register_operand" "=D") + (plus:DI (match_dup 1) +- (const_int 8)))] ++ (const_int 8))) ++ (unspec [(const_int 0)] UNSPEC_STOS)] + "TARGET_64BIT + && !(fixed_regs[AX_REG] || fixed_regs[DI_REG])" + "stosq" +@@ -15934,7 +15935,8 @@ + (match_operand:SI 2 "register_operand" "a")) + (set (match_operand:P 0 "register_operand" "=D") + (plus:P (match_dup 1) +- (const_int 4)))] ++ (const_int 4))) ++ (unspec [(const_int 0)] UNSPEC_STOS)] + "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" + "stos{l|d}" + [(set_attr "type" "str") +@@ -15946,7 +15948,8 @@ + (match_operand:HI 2 "register_operand" "a")) + (set (match_operand:P 0 "register_operand" "=D") + (plus:P (match_dup 1) +- (const_int 2)))] ++ (const_int 2))) ++ (unspec [(const_int 0)] UNSPEC_STOS)] + "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" + "stosw" + [(set_attr "type" "str") +@@ -15958,7 +15961,8 @@ + (match_operand:QI 2 "register_operand" "a")) + (set (match_operand:P 0 "register_operand" "=D") + (plus:P (match_dup 1) +- (const_int 1)))] ++ (const_int 1))) ++ (unspec [(const_int 0)] UNSPEC_STOS)] + "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" + "stosb" + [(set_attr "type" "str") --- a/src/gcc/config/i386/sse.md +++ b/src/gcc/config/i386/sse.md @@ -11167,7 +11167,8 @@ @@ -57672,6 +58235,16 @@ sparc_mode_class[i] = 1 << (int) SF_MODE; else if (GET_MODE_SIZE (i) == 8) sparc_mode_class[i] = 1 << (int) DF_MODE; +--- a/src/gcc/config/v850/t-rtems ++++ b/src/gcc/config/v850/t-rtems +@@ -1,3 +1,7 @@ + # Custom multilibs for RTEMS + ++MULTILIB_OPTIONS = mv850/mv850e/mv850e2/mv850e2v3 ++MULTILIB_DIRNAMES = v850 v850e v850e2 v850e2v3 ++MULTILIB_MATCHES = mv850e=mv850e1 ++ + MULTILIB_MATCHES += mv850e=mv850es --- a/src/gcc/config.gcc +++ b/src/gcc/config.gcc @@ -317,6 +317,13 @@ @@ -57915,9 +58488,42 @@ powerpc-*-*) conftest_s=' .section ".tdata","awT",@progbits +--- a/src/gcc/coverage.c ++++ b/src/gcc/coverage.c +@@ -1099,6 +1099,9 @@ + memcpy (da_file_name + prefix_len, filename, len); + strcpy (da_file_name + prefix_len + len, GCOV_DATA_SUFFIX); + ++ if (flag_branch_probabilities) ++ read_counts_file (); ++ + /* Name of bbg file. */ + if (flag_test_coverage && !flag_compare_debug) + { +@@ -1118,9 +1121,6 @@ + gcov_write_unsigned (local_tick); + } + } +- +- if (flag_branch_probabilities) +- read_counts_file (); + } + + /* Performs file-level cleanup. Close graph file, generate coverage --- a/src/gcc/cp/ChangeLog +++ b/src/gcc/cp/ChangeLog -@@ -1,3 +1,13 @@ +@@ -1,3 +1,24 @@ ++2013-05-20 Jason Merrill <jason@redhat.com> ++ ++ PR c++/57325 ++ * tree.c (build_cplus_array_type): Copy layout info if element ++ type is complete. ++ ++2013-05-09 Jason Merrill <jason@redhat.com> ++ ++ PR c++/57047 ++ * semantics.c (cxx_fold_indirect_ref): Fix thinko. ++ +2013-04-21 Eric Botcazou <ebotcazou@adacore.com> + + * parser.c (cp_parser_late_return_type_opt): Fix C++ism. @@ -57955,7 +58561,28 @@ /* DR 1207: 'this' is in scope in the trailing return type. */ --- a/src/gcc/cp/semantics.c +++ b/src/gcc/cp/semantics.c -@@ -8959,13 +8959,12 @@ +@@ -7412,15 +7412,17 @@ + } + } + } +- /* *(foo *)fooarrptreturn> (*fooarrptr)[0] */ ++ /* *(foo *)fooarrptr => (*fooarrptr)[0] */ + else if (TREE_CODE (TREE_TYPE (subtype)) == ARRAY_TYPE + && (same_type_ignoring_top_level_qualifiers_p + (type, TREE_TYPE (TREE_TYPE (subtype))))) + { + tree type_domain; + tree min_val = size_zero_node; +- sub = cxx_fold_indirect_ref (loc, TREE_TYPE (subtype), sub, NULL); +- if (!sub) ++ tree newsub = cxx_fold_indirect_ref (loc, TREE_TYPE (subtype), sub, NULL); ++ if (newsub) ++ sub = newsub; ++ else + sub = build1_loc (loc, INDIRECT_REF, TREE_TYPE (subtype), sub); + type_domain = TYPE_DOMAIN (TREE_TYPE (sub)); + if (type_domain && TYPE_MIN_VALUE (type_domain)) +@@ -8959,13 +8961,12 @@ insert_capture_proxy (tree var) { cp_binding_level *b; @@ -57970,7 +58597,7 @@ { cp_binding_level *n = b->level_chain; if (n->kind == sk_function_parms) -@@ -8976,8 +8975,7 @@ +@@ -8976,8 +8977,7 @@ /* And put a DECL_EXPR in the STATEMENT_LIST for the same block. */ var = build_stmt (DECL_SOURCE_LOCATION (var), DECL_EXPR, var); @@ -57980,11 +58607,28 @@ gcc_assert (stmt_list); append_to_statement_list_force (var, &stmt_list); } +--- a/src/gcc/cp/tree.c ++++ b/src/gcc/cp/tree.c +@@ -816,10 +816,12 @@ + + if (TYPE_MAIN_VARIANT (t) != m) + { +- if (COMPLETE_TYPE_P (t) && !COMPLETE_TYPE_P (m)) ++ if (COMPLETE_TYPE_P (TREE_TYPE (t)) && !COMPLETE_TYPE_P (m)) + { + /* m was built before the element type was complete, so we +- also need to copy the layout info from t. */ ++ also need to copy the layout info from t. We might ++ end up doing this multiple times if t is an array of ++ unknown bound. */ + tree size = TYPE_SIZE (t); + tree size_unit = TYPE_SIZE_UNIT (t); + unsigned int align = TYPE_ALIGN (t); --- a/src/gcc/DATESTAMP +++ b/src/gcc/DATESTAMP @@ -1 +1 @@ -20130411 -+20130508 ++20130603 --- a/src/gcc/dwarf2out.c +++ b/src/gcc/dwarf2out.c @@ -22538,7 +22538,7 @@ @@ -58015,7 +58659,17 @@ { --- a/src/gcc/fortran/ChangeLog +++ b/src/gcc/fortran/ChangeLog -@@ -1,3 +1,39 @@ +@@ -1,3 +1,49 @@ ++2013-06-01 Janus Weil <janus@gcc.gnu.org> ++ Tobias Burnus <burnus@net-b.de> ++ ++ PR fortran/57217 ++ * interface.c (check_dummy_characteristics): Symmetrize type check. ++ ++2013-05-22 Janne Blomqvist <jb@gcc.gnu.org> ++ ++ * intrinsic.texi (RANDOM_SEED): Improve example. ++ +2013-05-07 Tobias Burnus <burnus@net-b.de> + + Backport from mainline @@ -58105,6 +58759,18 @@ } else { +--- a/src/gcc/fortran/interface.c ++++ b/src/gcc/fortran/interface.c +@@ -987,7 +987,8 @@ + bool type_must_agree, char *errmsg, int err_len) + { + /* Check type and rank. */ +- if (type_must_agree && !compare_type_rank (s2, s1)) ++ if (type_must_agree && ++ (!compare_type_rank (s1, s2) || !compare_type_rank (s2, s1))) + { + if (errmsg != NULL) + snprintf (errmsg, err_len, "Type/rank mismatch in argument '%s'", --- a/src/gcc/fortran/intrinsic.texi +++ b/src/gcc/fortran/intrinsic.texi @@ -9209,7 +9209,7 @@ @@ -58116,6 +58782,90 @@ not equal to zero. @end multitable +@@ -10134,9 +10134,12 @@ + Restarts or queries the state of the pseudorandom number generator used by + @code{RANDOM_NUMBER}. + +-If @code{RANDOM_SEED} is called without arguments, it is initialized to +-a default state. The example below shows how to initialize the random +-seed based on the system's time. ++If @code{RANDOM_SEED} is called without arguments, it is initialized ++to a default state. The example below shows how to initialize the ++random seed with a varying seed in order to ensure a different random ++number sequence for each invocation of the program. Note that setting ++any of the seed values to zero should be avoided as it can result in ++poor quality random numbers being generated. + + @item @emph{Standard}: + Fortran 95 and later +@@ -10164,20 +10167,53 @@ + + @item @emph{Example}: + @smallexample +-SUBROUTINE init_random_seed() +- INTEGER :: i, n, clock +- INTEGER, DIMENSION(:), ALLOCATABLE :: seed +- +- CALL RANDOM_SEED(size = n) +- ALLOCATE(seed(n)) +- +- CALL SYSTEM_CLOCK(COUNT=clock) +- +- seed = clock + 37 * (/ (i - 1, i = 1, n) /) +- CALL RANDOM_SEED(PUT = seed) +- +- DEALLOCATE(seed) +-END SUBROUTINE ++subroutine init_random_seed() ++ implicit none ++ integer, allocatable :: seed(:) ++ integer :: i, n, un, istat, dt(8), pid, t(2), s ++ integer(8) :: count, tms ++ ++ call random_seed(size = n) ++ allocate(seed(n)) ++ ! First try if the OS provides a random number generator ++ open(newunit=un, file="/dev/urandom", access="stream", & ++ form="unformatted", action="read", status="old", iostat=istat) ++ if (istat == 0) then ++ read(un) seed ++ close(un) ++ else ++ ! Fallback to XOR:ing the current time and pid. The PID is ++ ! useful in case one launches multiple instances of the same ++ ! program in parallel. ++ call system_clock(count) ++ if (count /= 0) then ++ t = transfer(count, t) ++ else ++ call date_and_time(values=dt) ++ tms = (dt(1) - 1970) * 365_8 * 24 * 60 * 60 * 1000 & ++ + dt(2) * 31_8 * 24 * 60 * 60 * 1000 & ++ + dt(3) * 24 * 60 * 60 * 60 * 1000 & ++ + dt(5) * 60 * 60 * 1000 & ++ + dt(6) * 60 * 1000 + dt(7) * 1000 & ++ + dt(8) ++ t = transfer(tms, t) ++ end if ++ s = ieor(t(1), t(2)) ++ pid = getpid() + 1099279 ! Add a prime ++ s = ieor(s, pid) ++ if (n >= 3) then ++ seed(1) = t(1) + 36269 ++ seed(2) = t(2) + 72551 ++ seed(3) = pid ++ if (n > 3) then ++ seed(4:) = s + 37 * (/ (i, i = 0, n - 4) /) ++ end if ++ else ++ seed = s + 37 * (/ (i, i = 0, n - 1 ) /) ++ end if ++ end if ++ call random_seed(put=seed) ++end subroutine init_random_seed + @end smallexample + + @item @emph{See also}: --- a/src/gcc/fortran/resolve.c +++ b/src/gcc/fortran/resolve.c @@ -3155,6 +3155,7 @@ @@ -58417,7 +59167,7 @@ #define YY_RESTORE_YY_MORE_OFFSET char *yytext; -#line 1 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 1 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 1 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" /* -*- indented-text -*- */ /* Process source files and output type information. Copyright (C) 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010 @@ -58426,7 +59176,7 @@ <http://www.gnu.org/licenses/>. */ #define YY_NO_INPUT 1 -#line 25 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 25 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 25 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" #ifdef GENERATOR_FILE #include "bconfig.h" #else @@ -58475,7 +59225,7 @@ register int yy_act; -#line 63 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 63 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 63 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" /* Do this on entry to yylex(): */ *yylval = 0; @@ -58493,7 +59243,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 74 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 74 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 74 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { BEGIN(in_struct); return TYPEDEF; @@ -58502,7 +59252,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 78 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 78 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 78 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { BEGIN(in_struct); return STRUCT; @@ -58511,7 +59261,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 82 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 82 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 82 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { BEGIN(in_struct); return UNION; @@ -58520,7 +59270,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 86 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 86 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 86 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { BEGIN(in_struct); return EXTERN; @@ -58529,7 +59279,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 90 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 90 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 90 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { BEGIN(in_struct); return STATIC; @@ -58538,7 +59288,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 95 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 95 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 95 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { BEGIN(in_struct); return DEFVEC_OP; @@ -58547,7 +59297,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 99 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 99 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 99 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { BEGIN(in_struct); return DEFVEC_I; @@ -58556,7 +59306,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 103 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 103 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 103 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { BEGIN(in_struct); return DEFVEC_ALLOC; @@ -58565,21 +59315,21 @@ case 9: YY_RULE_SETUP -#line 111 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 111 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 111 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { BEGIN(in_struct_comment); } YY_BREAK case 10: /* rule 10 can match eol */ YY_RULE_SETUP -#line 113 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 113 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 113 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { update_lineno (yytext, yyleng); } YY_BREAK case 11: /* rule 11 can match eol */ YY_RULE_SETUP -#line 114 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 114 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 114 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { lexer_line.line++; } YY_BREAK case 12: @@ -58588,7 +59338,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 116 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 116 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 116 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" /* don't care */ YY_BREAK case 13: @@ -58597,7 +59347,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 117 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 117 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 117 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { return GTY_TOKEN; } YY_BREAK case 14: @@ -58606,7 +59356,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 118 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 118 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 118 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { return VEC_TOKEN; } YY_BREAK case 15: @@ -58615,7 +59365,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 119 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 119 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 119 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { return UNION; } YY_BREAK case 16: @@ -58624,7 +59374,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 120 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 120 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 120 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { return STRUCT; } YY_BREAK case 17: @@ -58633,7 +59383,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 121 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 121 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 121 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { return ENUM; } YY_BREAK case 18: @@ -58642,7 +59392,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 122 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 122 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 122 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { return PTR_ALIAS; } YY_BREAK case 19: @@ -58651,13 +59401,13 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 123 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 123 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 123 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { return NESTED_PTR; } YY_BREAK case 20: YY_RULE_SETUP -#line 124 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 124 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 124 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { return NUM; } YY_BREAK case 21: @@ -58666,7 +59416,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 125 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 125 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 125 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { *yylval = XDUPVAR (const char, yytext, yyleng, yyleng+1); return PARAM_IS; @@ -58675,12 +59425,12 @@ (yy_c_buf_p) = yy_cp -= 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ -#line 131 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 131 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 131 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" case 23: /* rule 23 can match eol */ YY_RULE_SETUP -#line 131 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 131 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 131 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { size_t len; @@ -58689,7 +59439,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 143 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 143 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 143 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { *yylval = XDUPVAR (const char, yytext, yyleng, yyleng+1); return ID; @@ -58698,7 +59448,7 @@ /* rule 25 can match eol */ YY_RULE_SETUP -#line 148 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 148 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 148 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng-1); return STRING; @@ -58707,7 +59457,7 @@ /* rule 26 can match eol */ YY_RULE_SETUP -#line 153 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 153 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 153 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng-1); return ARRAY; @@ -58716,7 +59466,7 @@ /* rule 27 can match eol */ YY_RULE_SETUP -#line 157 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 157 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 157 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng); return CHAR; @@ -58725,13 +59475,13 @@ case 28: YY_RULE_SETUP -#line 162 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 162 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 162 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { return ELLIPSIS; } YY_BREAK case 29: YY_RULE_SETUP -#line 163 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 163 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 163 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { return yytext[0]; } YY_BREAK /* ignore pp-directives */ @@ -58739,13 +59489,13 @@ /* rule 30 can match eol */ YY_RULE_SETUP -#line 166 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 166 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 166 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" {lexer_line.line++;} YY_BREAK case 31: YY_RULE_SETUP -#line 168 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 168 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 168 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { error_at_line (&lexer_line, "unexpected character `%s'", yytext); } @@ -58754,35 +59504,35 @@ case 32: YY_RULE_SETUP -#line 173 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 173 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 173 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { BEGIN(in_comment); } YY_BREAK case 33: /* rule 33 can match eol */ YY_RULE_SETUP -#line 174 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 174 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 174 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { lexer_line.line++; } YY_BREAK case 34: -#line 176 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 176 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 176 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" case 35: /* rule 35 can match eol */ -#line 177 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 177 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 177 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" case 36: /* rule 36 can match eol */ YY_RULE_SETUP -#line 177 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 177 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 177 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" /* do nothing */ YY_BREAK case 37: /* rule 37 can match eol */ YY_RULE_SETUP -#line 178 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 178 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 178 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { update_lineno (yytext, yyleng); } YY_BREAK case 38: @@ -58791,7 +59541,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 179 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 179 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 179 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" /* do nothing */ YY_BREAK @@ -58799,16 +59549,16 @@ /* rule 39 can match eol */ YY_RULE_SETUP -#line 182 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 182 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 182 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { lexer_line.line++; } YY_BREAK case 40: -#line 184 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 184 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 184 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" case 41: YY_RULE_SETUP -#line 184 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 184 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 184 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" /* do nothing */ YY_BREAK case 42: @@ -58817,29 +59567,29 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 185 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 185 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 185 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" /* do nothing */ YY_BREAK case 43: YY_RULE_SETUP -#line 187 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 187 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 187 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { BEGIN(INITIAL); } YY_BREAK case 44: YY_RULE_SETUP -#line 188 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 188 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 188 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { BEGIN(in_struct); } YY_BREAK case 45: -#line 191 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 191 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 191 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" case 46: YY_RULE_SETUP -#line 191 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 191 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 191 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" { error_at_line (&lexer_line, "unterminated comment or string; unexpected EOF"); @@ -58848,13 +59598,13 @@ /* rule 47 can match eol */ YY_RULE_SETUP -#line 196 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 196 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 196 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" /* do nothing */ YY_BREAK case 48: YY_RULE_SETUP -#line 198 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 198 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 198 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" YY_FATAL_ERROR( "flex scanner jammed" ); YY_BREAK -#line 1654 "gengtype-lex.c" @@ -58878,7 +59628,7 @@ #define YYTABLES_NAME "yytables" -#line 198 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" -+#line 198 "/work1/rouxy/work/sources/gcc-linaro/release/4.7-2013.05/gcc-linaro-4.7-2013.05/gcc/gengtype-lex.l" ++#line 198 "/home/doko/gcc-4.7-RC-20130614/gcc-4.7-RC-20130614/gcc/gengtype-lex.l" @@ -60895,7 +61645,7 @@ --- a/src/gcc/LINARO-VERSION +++ b/src/gcc/LINARO-VERSION @@ -0,0 +1 @@ -+4.7-2013.05 ++4.7-2013.05-1~dev --- a/src/gcc/lower-subreg.c +++ b/src/gcc/lower-subreg.c @@ -233,9 +233,9 @@ @@ -62027,7 +62777,22 @@ bool, false) --- a/src/gcc/testsuite/ChangeLog +++ b/src/gcc/testsuite/ChangeLog -@@ -1,3 +1,105 @@ +@@ -1,3 +1,120 @@ ++2013-06-01 Janus Weil <janus@gcc.gnu.org> ++ Tobias Burnus <burnus@net-b.de> ++ ++ PR fortran/57217 ++ * gfortran.dg/typebound_override_4.f90: New. ++ ++2013-05-26 Eric Botcazou <ebotcazou@adacore.com> ++ ++ * gnat.dg/specs/last_bit.ads: New test. ++ ++2013-05-13 Uros Bizjak <ubizjak@gmail.com> ++ ++ PR target/57264 ++ * gcc.target/i386/pr57264.c: New test. ++ +2013-05-07 Michael Meissner <meissner@linux.vnet.ibm.com> + + Backport from trunk @@ -75774,6 +76539,27 @@ +{ + *p = __builtin_shuffle (*p, *mask); +} +--- a/src/gcc/testsuite/gcc.target/i386/pr57264.c ++++ b/src/gcc/testsuite/gcc.target/i386/pr57264.c +@@ -0,0 +1,18 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O1 -mcld" } */ ++ ++void test (int x, int **pp) ++{ ++ while (x) ++ { ++ int *ip = *pp; ++ int *op = *pp; ++ while (*ip) ++ { ++ int v = *ip++; ++ *op++ = v + 1; ++ } ++ } ++} ++ ++/* { dg-final { scan-assembler-not "stosl" } } */ --- a/src/gcc/testsuite/gcc.target/powerpc/pr57150.c +++ b/src/gcc/testsuite/gcc.target/powerpc/pr57150.c @@ -0,0 +1,23 @@ @@ -75915,6 +76701,63 @@ +// { dg-final { scan-assembler "_Z3f1912__Poly8x16_t:" } } +// { dg-final { scan-assembler "_Z3f2012__Poly16x8_t:" } } +// { dg-final { scan-assembler "_Z3f2111__Int8x16_tS_:" } } +--- a/src/gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr8.C ++++ b/src/gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr8.C +@@ -0,0 +1,54 @@ ++// PR c++/57047 ++// { dg-require-effective-target c++11 } ++ ++template <typename> ++struct A; ++template <typename T> ++struct A <T &> ++{ ++ typedef T type; ++}; ++template <typename T> ++constexpr T && foo (typename A <T>::type & __t) noexcept ++{ ++ return static_cast <T &&>(__t); ++} ++template <class T1, class T2> ++struct B ++{ ++ T1 t1; ++ T2 t2; ++ template <class U> ++ constexpr B (U && __x, const T2 & __y) : t1 (foo <U> (__x)), t2 (__y) {} ++}; ++static inline constexpr bool ++fn1 (const char c) ++{ ++ return ('0' <= c) && (c <= '9'); ++} ++static inline constexpr bool ++fn2 (const char c) ++{ ++ return (('A' <= c) && (c <= 'Z')) || (('a' <= c) && (c <= 'z')); ++} ++static constexpr bool ++fn3 (const char *const x) ++{ ++ return (x[1] == '\0' && x[0] == ']') ? true : (!fn1 (x[0])) ? false : fn3 (&x[1]); ++} ++static constexpr bool ++fn4 (const char *const x) ++{ ++ return (x[0] == '\0') ? fn3 (&x[1]) : fn4 (&x[1]); ++} ++static inline constexpr bool ++fn5 (const char *const x) ++{ ++ return fn2 (x[0]) ? fn4 (x) : false; ++} ++struct C final ++{ ++ constexpr C (const char *const t1) : c (fn5 (t1) ? 199 : 69) {} ++ unsigned c; ++}; ++B <C, C> p ("a", "b"); --- a/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-eh3.C +++ b/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-eh3.C @@ -0,0 +1,14 @@ @@ -75950,6 +76793,49 @@ /* { dg-options "-gstabs+ -fno-eliminate-unused-debug-types" } */ const int foobar = 4; +--- a/src/gcc/testsuite/g++.dg/template/array26.C ++++ b/src/gcc/testsuite/g++.dg/template/array26.C +@@ -0,0 +1,40 @@ ++// PR c++/57325 ++ ++class valarray { int _M_data; }; ++template < typename > struct SimpleJet { valarray partials; }; ++ ++template < class C > struct scoped_ptr_impl ++{ ++ scoped_ptr_impl (C *):data_ () { } ++ struct Data ++ { ++ C ptr; ++ }; ++ Data data_; ++}; ++ ++template < class, class = int >struct scoped_ptr; ++template < class C, class D > struct scoped_ptr <C[], D > ++{ ++ scoped_ptr ():impl_ (0) { } ++ scoped_ptr_impl < C > impl_; ++}; ++ ++template < typename JetsT > void ++TestJets (JetsT *) ++{ ++ typedef typename JetsT::JetType JetT; ++ scoped_ptr < JetT[] > a; ++} ++ ++template < typename T > struct SimpleJets ++{ ++ typedef SimpleJet < T > JetType; ++ scoped_ptr < SimpleJet < T >[] > vars_; ++}; ++ ++void fn () ++{ ++ SimpleJets < double >b; ++ TestJets (&b); ++} --- a/src/gcc/testsuite/g++.dg/torture/pr54684.C +++ b/src/gcc/testsuite/g++.dg/torture/pr54684.C @@ -0,0 +1,62 @@ @@ -76336,6 +77222,65 @@ + real(r8_),intent(out) :: val + val = transfer(byte_array(1:8),val) +end subroutine +--- a/src/gcc/testsuite/gfortran.dg/typebound_override_4.f90 ++++ b/src/gcc/testsuite/gfortran.dg/typebound_override_4.f90 +@@ -0,0 +1,34 @@ ++! { dg-do compile } ++! ++! PR 57217: [4.7/4.8/4.9 Regression][OOP] Accepts invalid TBP overriding - lacking arguments check ++! ++! Contributed by Salvatore Filippone <filippone.salvatore@gmail.com> ++ ++module base_mod ++ implicit none ++ type base_type ++ contains ++ procedure, pass(map) :: clone => base_clone ++ end type ++contains ++ subroutine base_clone(map,mapout) ++ class(base_type) :: map ++ class(base_type) :: mapout ++ end subroutine ++end module ++ ++module r_mod ++ use base_mod ++ implicit none ++ type, extends(base_type) :: r_type ++ contains ++ procedure, pass(map) :: clone => r_clone ! { dg-error "Type/rank mismatch in argument" } ++ end type ++contains ++ subroutine r_clone(map,mapout) ++ class(r_type) :: map ++ class(r_type) :: mapout ++ end subroutine ++end module ++ ++! { dg-final { cleanup-modules "base_mod r_mod" } } +--- a/src/gcc/testsuite/gnat.dg/specs/last_bit.ads ++++ b/src/gcc/testsuite/gnat.dg/specs/last_bit.ads +@@ -0,0 +1,19 @@ ++-- { dg-do compile } ++ ++package Last_Bit is ++ ++ Max_Components : constant := 100; ++ type Count_Type is new Natural range 0 .. Max_Components; ++ subtype Index_Type is Count_Type range 1 .. Count_Type'Last; ++ ++ type List_Type is array (Index_Type range <>) of Integer; ++ ++ type Record_Type (Count : Count_Type := 0) is record ++ List : List_Type (1 .. Count); ++ end record; ++ ++ Null_Record : Record_Type (Count => 0); ++ ++ List_Last_Bit : Integer := Null_Record.List'Last_Bit; ++ ++end Last_Bit; --- a/src/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C +++ b/src/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C @@ -7,7 +7,7 @@ @@ -78274,8 +79219,9 @@ <!-- --- a/src/LAST_UPDATED +++ b/src/LAST_UPDATED -@@ -1 +0,0 @@ +@@ -1 +1 @@ -Obtained from SVN: tags/gcc_4_7_3_release revision 197739 ++Obtained from SVN: branches/gcc-4_7-branch revision --- a/src/libcpp/ChangeLog.aarch64 +++ b/src/libcpp/ChangeLog.aarch64 @@ -0,0 +1,13 @@ @@ -78384,29 +79330,17 @@ #else /* We only have one accellerated alternative. Use a direct call so that -Binary files gcc-4.7.3/libcpp/po/be.gmo and gcc-linaro-4.7-2013.05/libcpp/po/be.gmo differ -Binary files gcc-4.7.3/libcpp/po/ca.gmo and gcc-linaro-4.7-2013.05/libcpp/po/ca.gmo differ -Binary files gcc-4.7.3/libcpp/po/da.gmo and gcc-linaro-4.7-2013.05/libcpp/po/da.gmo differ -Binary files gcc-4.7.3/libcpp/po/de.gmo and gcc-linaro-4.7-2013.05/libcpp/po/de.gmo differ -Binary files gcc-4.7.3/libcpp/po/el.gmo and gcc-linaro-4.7-2013.05/libcpp/po/el.gmo differ -Binary files gcc-4.7.3/libcpp/po/eo.gmo and gcc-linaro-4.7-2013.05/libcpp/po/eo.gmo differ -Binary files gcc-4.7.3/libcpp/po/es.gmo and gcc-linaro-4.7-2013.05/libcpp/po/es.gmo differ -Binary files gcc-4.7.3/libcpp/po/fi.gmo and gcc-linaro-4.7-2013.05/libcpp/po/fi.gmo differ -Binary files gcc-4.7.3/libcpp/po/fr.gmo and gcc-linaro-4.7-2013.05/libcpp/po/fr.gmo differ -Binary files gcc-4.7.3/libcpp/po/id.gmo and gcc-linaro-4.7-2013.05/libcpp/po/id.gmo differ -Binary files gcc-4.7.3/libcpp/po/ja.gmo and gcc-linaro-4.7-2013.05/libcpp/po/ja.gmo differ -Binary files gcc-4.7.3/libcpp/po/nl.gmo and gcc-linaro-4.7-2013.05/libcpp/po/nl.gmo differ -Binary files gcc-4.7.3/libcpp/po/ru.gmo and gcc-linaro-4.7-2013.05/libcpp/po/ru.gmo differ -Binary files gcc-4.7.3/libcpp/po/sr.gmo and gcc-linaro-4.7-2013.05/libcpp/po/sr.gmo differ -Binary files gcc-4.7.3/libcpp/po/sv.gmo and gcc-linaro-4.7-2013.05/libcpp/po/sv.gmo differ -Binary files gcc-4.7.3/libcpp/po/tr.gmo and gcc-linaro-4.7-2013.05/libcpp/po/tr.gmo differ -Binary files gcc-4.7.3/libcpp/po/uk.gmo and gcc-linaro-4.7-2013.05/libcpp/po/uk.gmo differ -Binary files gcc-4.7.3/libcpp/po/vi.gmo and gcc-linaro-4.7-2013.05/libcpp/po/vi.gmo differ -Binary files gcc-4.7.3/libcpp/po/zh_CN.gmo and gcc-linaro-4.7-2013.05/libcpp/po/zh_CN.gmo differ -Binary files gcc-4.7.3/libcpp/po/zh_TW.gmo and gcc-linaro-4.7-2013.05/libcpp/po/zh_TW.gmo differ --- a/src/libgcc/ChangeLog +++ b/src/libgcc/ChangeLog -@@ -1,3 +1,10 @@ +@@ -1,3 +1,18 @@ ++2013-05-20 Chung-Ju Wu <jasonwucj@gmail.com> ++ ++ Backport from mainline: ++ 2012-05-24 Olivier Hainque <hainque@adacore.com> ++ ++ * Makefile.in (clean): Remove libgcc_tm.stamp as well. ++ Use a separate command for stamp removals. ++ +2013-04-11 Julian Brown <julian@codesourcery.com> + + * config/arm/linux-atomic.c (SUBWORD_SYNC_OP, SUBWORD_VAL_CAS) @@ -79406,6 +80340,18 @@ Binary files gcc-4.7.3/libcpp/po/zh_TW.gmo and gcc-linaro-4.7-2013.05/libcpp/po/ #define COUNT_LEADING_ZEROS_0 32 #endif +--- a/src/libgcc/Makefile.in ++++ b/src/libgcc/Makefile.in +@@ -121,7 +121,8 @@ + .PHONY: all clean + + clean: +- -rm -f config.h libgcc_tm.h stamp-h stmp-ldirs libgcc.map ++ -rm -f config.h libgcc_tm.h libgcc.map ++ -rm -f libgcc_tm.stamp stamp-h stmp-ldirs + -rm -f *$(objext) + -rm -f *.dep + -rm -f *.a --- a/src/libgcc/soft-fp/op-common.h +++ b/src/libgcc/soft-fp/op-common.h @@ -1,5 +1,5 @@ @@ -79844,7 +80790,18 @@ Binary files gcc-4.7.3/libcpp/po/zh_TW.gmo and gcc-linaro-4.7-2013.05/libcpp/po/ AC_MSG_CHECKING([for clock_gettime, nanosleep and sched_yield]) --- a/src/libstdc++-v3/ChangeLog +++ b/src/libstdc++-v3/ChangeLog -@@ -1,3 +1,20 @@ +@@ -1,3 +1,31 @@ ++2013-05-15 Jonathan Wakely <jwakely.gcc@gmail.com> ++ ++ * include/bits/basic_string.h (getline): Fix doxygen comments. ++ ++2013-05-14 Evgeniy Stepanov <eugenis@google.com> ++ ++ * src/c++11/system_error.cc (generic_category_instance): Add ++ initializer. ++ (system_category_instance): Likewise. ++ * src/c++11/future.cc (__fec): Likewise. ++ +2013-04-15 Jack Howarth <howarth@bromo.med.uc.edu> + + Backport from mainline @@ -79959,6 +80916,60 @@ Binary files gcc-4.7.3/libcpp/po/zh_TW.gmo and gcc-linaro-4.7-2013.05/libcpp/po/ alpha*) try_cpu=alpha ;; +--- a/src/libstdc++-v3/include/bits/basic_string.h ++++ b/src/libstdc++-v3/include/bits/basic_string.h +@@ -2764,10 +2764,9 @@ + * + * Stores characters from @a __is into @a __str until @a __delim is + * found, the end of the stream is encountered, or str.max_size() +- * is reached. If is.width() is non-zero, that is the limit on the +- * number of characters stored into @a __str. Any previous +- * contents of @a __str are erased. If @a __delim was encountered, +- * it is extracted but not stored into @a __str. ++ * is reached. Any previous contents of @a __str are erased. If ++ * @a __delim is encountered, it is extracted but not stored into ++ * @a __str. + */ + template<typename _CharT, typename _Traits, typename _Alloc> + basic_istream<_CharT, _Traits>& +@@ -2782,10 +2781,9 @@ + * + * Stores characters from is into @a __str until '\n' is + * found, the end of the stream is encountered, or str.max_size() +- * is reached. If __is.width() is non-zero, that is the limit on +- * the number of characters stored into @a __str. Any previous +- * contents of @a __str are erased. If end of line was +- * encountered, it is extracted but not stored into @a __str. ++ * is reached. Any previous contents of @a __str are erased. If ++ * end of line is encountered, it is extracted but not stored into ++ * @a __str. + */ + template<typename _CharT, typename _Traits, typename _Alloc> + inline basic_istream<_CharT, _Traits>& +--- a/src/libstdc++-v3/src/c++11/future.cc ++++ b/src/libstdc++-v3/src/c++11/future.cc +@@ -60,7 +60,7 @@ + const future_error_category& + __future_category_instance() noexcept + { +- static const future_error_category __fec; ++ static const future_error_category __fec{}; + return __fec; + } + } +--- a/src/libstdc++-v3/src/c++11/system_error.cc ++++ b/src/libstdc++-v3/src/c++11/system_error.cc +@@ -62,8 +62,8 @@ + } + }; + +- const generic_error_category generic_category_instance; +- const system_error_category system_category_instance; ++ const generic_error_category generic_category_instance{}; ++ const system_error_category system_category_instance{}; + } + + namespace std _GLIBCXX_VISIBILITY(default) --- a/src/libstdc++-v3/testsuite/30_threads/condition_variable/members/53841.cc +++ b/src/libstdc++-v3/testsuite/30_threads/condition_variable/members/53841.cc @@ -1,5 +1,5 @@ @@ -79968,3 +80979,44 @@ Binary files gcc-4.7.3/libcpp/po/zh_TW.gmo and gcc-linaro-4.7-2013.05/libcpp/po/ // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } // { dg-require-cstdint "" } +--- a/src/maintainer-scripts/gcc_release ++++ b/src/maintainer-scripts/gcc_release +@@ -144,7 +144,7 @@ + fi + + # Tag the sources. +- if [ -n "${TAG}" ]; then ++ if false || [ -n "${TAG}" ]; then + inform "Tagging sources as ${TAG}" + # We don't want to overwrite an existing tag. So, if the tag + # already exists, issue an error message; the release manager can +@@ -157,13 +157,14 @@ + error "Could not tag sources" + SVNBRANCH=${TAG} + fi +- SVNREV=`${SVN} info "${SVNROOT}/${SVNBRANCH}"|awk '/Revision:/ {print $2}'` ++ #SVNREV=`${SVN} info "${SVNROOT}/${SVNBRANCH}"|awk '/Revision:/ {print $2}'` + + # Export the current sources. +- inform "Retrieving sources (svn export -r ${SVNREV} ${SVNROOT}/${SVNBRANCH})" ++ inform "Copying sources (cp -a /scratch/packages/gcc/bzr/4.7 ...)" + +- ${SVN} -q export -r${SVNREV} "${SVNROOT}/${SVNBRANCH}" "`basename ${SOURCE_DIRECTORY}`" ||\ +- error "Could not retrieve sources" ++ #${SVN} -q export -r${SVNREV} "${SVNROOT}/${SVNBRANCH}" "`basename ${SOURCE_DIRECTORY}`" ||\ ++ # error "Could not retrieve sources" ++ cp -a /scratch/packages/gcc/bzr/4.7 "`basename ${SOURCE_DIRECTORY}`" + + # Run gcc_update on them to set up the timestamps nicely, and (re)write + # the LAST_UPDATED file containing the SVN tag/revision used. +@@ -184,8 +185,8 @@ + ${SOURCE_DIRECTORY}/gcc/doc/install.texi2html + + # Regenerate the NEWS file. +- contrib/gennews > NEWS || \ +- error "Could not regenerate NEWS files" ++ #contrib/gennews > NEWS || \ ++ # error "Could not regenerate NEWS files" + + # Now, we must build the compiler in order to create any generated + # files that are supposed to go in the source directory. This is diff --git a/debian/patches/svn-updates-linaro.diff b/debian/patches/svn-updates-linaro.diff index 05b6530..47d1fd9 100644 --- a/debian/patches/svn-updates-linaro.diff +++ b/debian/patches/svn-updates-linaro.diff @@ -1,1039 +1,382 @@ -# DP: updates from the 4.7 branch upto 20130530 (r199435). +# DP: updates from the 4.7 branch upto 20130614 (r200084). last_updated() { cat > ${dir}LAST_UPDATED <<EOF -Thu May 30 08:55:17 CEST 2013 -Thu May 30 06:55:17 UTC 2013 (revision 199435) +Fri Jun 14 09:56:44 CEST 2013 +Fri Jun 14 07:56:44 UTC 2013 (revision 200084) EOF } -LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_7-branch@198701 svn://gcc.gnu.org/svn/gcc/branches/gcc-4_7-branch \ +LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_7-branch@199594 svn://gcc.gnu.org/svn/gcc/branches/gcc-4_7-branch \ | sed -r 's,^--- (\S+)\t(\S+)(.*)$,--- a/src/\1\t\2,;s,^\+\+\+ (\S+)\t(\S+)(.*)$,+++ b/src/\1\t\2,' \ | awk '/^Index:.*\.(class|texi)/ {skip=1; next} /^Index:/ { skip=0 } skip==0' -Index: libstdc++-v3/src/c++11/system_error.cc +Index: libgcc/config.host =================================================================== ---- a/src/libstdc++-v3/src/c++11/system_error.cc (revision -+++ b/src/libstdc++-v3/src/c++11/system_error.cc (revision -@@ -62,8 +62,8 @@ - } - }; - -- const generic_error_category generic_category_instance; -- const system_error_category system_category_instance; -+ const generic_error_category generic_category_instance{}; -+ const system_error_category system_category_instance{}; - } - - namespace std _GLIBCXX_VISIBILITY(default) -Index: libstdc++-v3/src/c++11/future.cc -=================================================================== ---- a/src/libstdc++-v3/src/c++11/future.cc (revision -+++ b/src/libstdc++-v3/src/c++11/future.cc (revision -@@ -60,7 +60,7 @@ - const future_error_category& - __future_category_instance() noexcept - { -- static const future_error_category __fec; -+ static const future_error_category __fec{}; - return __fec; - } - } -Index: libstdc++-v3/include/bits/basic_string.h -=================================================================== ---- a/src/libstdc++-v3/include/bits/basic_string.h (revision -+++ b/src/libstdc++-v3/include/bits/basic_string.h (revision -@@ -2764,10 +2764,9 @@ - * - * Stores characters from @a __is into @a __str until @a __delim is - * found, the end of the stream is encountered, or str.max_size() -- * is reached. If is.width() is non-zero, that is the limit on the -- * number of characters stored into @a __str. Any previous -- * contents of @a __str are erased. If @a __delim was encountered, -- * it is extracted but not stored into @a __str. -+ * is reached. Any previous contents of @a __str are erased. If -+ * @a __delim is encountered, it is extracted but not stored into -+ * @a __str. - */ - template<typename _CharT, typename _Traits, typename _Alloc> - basic_istream<_CharT, _Traits>& -@@ -2782,10 +2781,9 @@ - * - * Stores characters from is into @a __str until '\n' is - * found, the end of the stream is encountered, or str.max_size() -- * is reached. If __is.width() is non-zero, that is the limit on -- * the number of characters stored into @a __str. Any previous -- * contents of @a __str are erased. If end of line was -- * encountered, it is extracted but not stored into @a __str. -+ * is reached. Any previous contents of @a __str are erased. If -+ * end of line is encountered, it is extracted but not stored into -+ * @a __str. - */ - template<typename _CharT, typename _Traits, typename _Alloc> - inline basic_istream<_CharT, _Traits>& -Index: libstdc++-v3/ChangeLog -=================================================================== ---- a/src/libstdc++-v3/ChangeLog (revision -+++ b/src/libstdc++-v3/ChangeLog (revision -@@ -1,3 +1,14 @@ -+2013-05-15 Jonathan Wakely <jwakely.gcc@gmail.com> -+ -+ * include/bits/basic_string.h (getline): Fix doxygen comments. -+ -+2013-05-14 Evgeniy Stepanov <eugenis@google.com> -+ -+ * src/c++11/system_error.cc (generic_category_instance): Add -+ initializer. -+ (system_category_instance): Likewise. -+ * src/c++11/future.cc (__fec): Likewise. -+ - 2013-04-15 Jack Howarth <howarth@bromo.med.uc.edu> - - Backport from mainline -Index: libgcc/Makefile.in -=================================================================== ---- a/src/libgcc/Makefile.in (revision -+++ b/src/libgcc/Makefile.in (revision -@@ -121,7 +121,8 @@ - .PHONY: all clean - - clean: -- -rm -f config.h libgcc_tm.h stamp-h stmp-ldirs libgcc.map -+ -rm -f config.h libgcc_tm.h libgcc.map -+ -rm -f libgcc_tm.stamp stamp-h stmp-ldirs - -rm -f *$(objext) - -rm -f *.dep - -rm -f *.a +--- a/src/libgcc/config.host (revision ++++ b/src/libgcc/config.host (revision +@@ -315,7 +315,7 @@ + md_unwind_header=alpha/vms-unwind.h + ;; + arm-wrs-vxworks) +- tmake_file="$tmake_file arm/t-arm arm/t-vxworks t-fdpbit" ++ tmake_file="$tmake_file arm/t-arm arm/t-vxworks t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp" + extra_parts="$extra_parts crti.o crtn.o" + ;; + arm*-*-freebsd*) Index: libgcc/ChangeLog =================================================================== --- a/src/libgcc/ChangeLog (revision +++ b/src/libgcc/ChangeLog (revision -@@ -1,3 +1,11 @@ -+2013-05-20 Chung-Ju Wu <jasonwucj@gmail.com> +@@ -1,3 +1,16 @@ ++2013-06-08 Walter Lee <walt@tilera.com> + + Backport from mainline: -+ 2012-05-24 Olivier Hainque <hainque@adacore.com> ++ 2013-06-08 Walter Lee <walt@tilera.com> ++ ++ * config/tilepro/atomic.h: Don't include stdint.h or features.h. ++ Replace int64_t with long long. Add __extension__ where ++ appropriate. + -+ * Makefile.in (clean): Remove libgcc_tm.stamp as well. -+ Use a separate command for stamp removals. ++2013-06-06 Douglas B Rupp <rupp@adacore.com> + - 2013-04-11 Julian Brown <julian@codesourcery.com> ++ * config.host (arm-wrs-vxworks): Configure with other soft float. ++ + 2013-05-20 Chung-Ju Wu <jasonwucj@gmail.com> - * config/arm/linux-atomic.c (SUBWORD_SYNC_OP, SUBWORD_VAL_CAS) + Backport from mainline: +Index: libgcc/config/tilepro/atomic.h +=================================================================== +--- a/src/libgcc/config/tilepro/atomic.h (revision ++++ b/src/libgcc/config/tilepro/atomic.h (revision +@@ -1,6 +1,5 @@ + /* Macros for atomic functionality for tile. +- Copyright (C) 2011, 2012 +- Free Software Foundation, Inc. ++ Copyright (C) 2011-2013 Free Software Foundation, Inc. + Contributed by Walter Lee (walt@tilera.com) + + This file is free software; you can redistribute it and/or modify it +@@ -93,8 +92,6 @@ + compare-and-exchange routine, so may be potentially less efficient. */ + #endif + +-#include <stdint.h> +-#include <features.h> + #ifdef __tilegx__ + #include <arch/spr_def.h> + #else +@@ -123,9 +120,9 @@ + + /* 64-bit integer compare-and-exchange. */ + static __inline __attribute__ ((always_inline)) +- int64_t arch_atomic_val_compare_and_exchange_8 (volatile int64_t * mem, +- int64_t oldval, +- int64_t newval) ++ long long arch_atomic_val_compare_and_exchange_8 (volatile long long ++ *mem, long long oldval, ++ long long newval) + { + #ifdef __tilegx__ + __insn_mtspr (SPR_CMPEXCH_VALUE, oldval); +@@ -140,7 +137,7 @@ + "R04" (newval_lo), "R05" (newval_hi), + "m" (*mem):"r20", "r21", "r22", "r23", "r24", "r25", + "r26", "r27", "r28", "r29", "memory"); +- return ((uint64_t) result_hi) << 32 | result_lo; ++ return ((long long) result_hi) << 32 | result_lo; + #endif + } + +@@ -151,11 +148,11 @@ + + + #define arch_atomic_val_compare_and_exchange(mem, o, n) \ +- ({ \ ++ __extension__ ({ \ + (__typeof(*(mem)))(__typeof(*(mem)-*(mem))) \ + ((sizeof(*(mem)) == 8) ? \ + arch_atomic_val_compare_and_exchange_8( \ +- (volatile int64_t*)(mem), (__typeof((o)-(o)))(o), \ ++ (volatile long long*)(mem), (__typeof((o)-(o)))(o), \ + (__typeof((n)-(n)))(n)) : \ + (sizeof(*(mem)) == 4) ? \ + arch_atomic_val_compare_and_exchange_4( \ +@@ -165,7 +162,7 @@ + }) + + #define arch_atomic_bool_compare_and_exchange(mem, o, n) \ +- ({ \ ++ __extension__ ({ \ + __typeof(o) __o = (o); \ + __builtin_expect( \ + __o == arch_atomic_val_compare_and_exchange((mem), __o, (n)), 1); \ +@@ -175,7 +172,7 @@ + /* Loop with compare_and_exchange until we guess the correct value. + Normally "expr" will be an expression using __old and __value. */ + #define __arch_atomic_update_cmpxchg(mem, value, expr) \ +- ({ \ ++ __extension__ ({ \ + __typeof(value) __value = (value); \ + __typeof(*(mem)) *__mem = (mem), __old = *__mem, __guess; \ + do { \ +@@ -190,12 +187,14 @@ + /* Generic atomic op with 8- or 4-byte variant. + The _mask, _addend, and _expr arguments are ignored on tilegx. */ + #define __arch_atomic_update(mem, value, op, _mask, _addend, _expr) \ +- ({ \ ++ __extension__ ({ \ + ((__typeof(*(mem))) \ + ((sizeof(*(mem)) == 8) ? (__typeof(*(mem)-*(mem)))__insn_##op( \ +- (void *)(mem), (int64_t)(__typeof((value)-(value)))(value)) : \ ++ (volatile void *)(mem), \ ++ (long long)(__typeof((value)-(value)))(value)) : \ + (sizeof(*(mem)) == 4) ? (int)__insn_##op##4( \ +- (void *)(mem), (int32_t)(__typeof((value)-(value)))(value)) : \ ++ (volatile void *)(mem), \ ++ (int)(__typeof((value)-(value)))(value)) : \ + __arch_atomic_error_bad_argument_size())); \ + }) + +@@ -225,7 +224,7 @@ + /* Generic atomic op with 8- or 4-byte variant. + The _op argument is ignored on tilepro. */ + #define __arch_atomic_update(mem, value, _op, mask, addend, expr) \ +- ({ \ ++ __extension__ ({ \ + (__typeof(*(mem)))(__typeof(*(mem)-*(mem))) \ + ((sizeof(*(mem)) == 8) ? \ + __arch_atomic_update_cmpxchg((mem), (value), (expr)) : \ +@@ -264,13 +263,13 @@ + __arch_atomic_update_cmpxchg(mem, mask, ~(__old & __value)) + + #define arch_atomic_bit_set(mem, bit) \ +- ({ \ ++ __extension__ ({ \ + __typeof(*(mem)) __mask = (__typeof(*(mem)))1 << (bit); \ + __mask & arch_atomic_or((mem), __mask); \ + }) + + #define arch_atomic_bit_clear(mem, bit) \ +- ({ \ ++ __extension__ ({ \ + __typeof(*(mem)) __mask = (__typeof(*(mem)))1 << (bit); \ + __mask & arch_atomic_and((mem), ~__mask); \ + }) Index: gcc/DATESTAMP =================================================================== --- a/src/gcc/DATESTAMP (revision +++ b/src/gcc/DATESTAMP (revision @@ -1 +1 @@ --20130508 -+20130530 +-20130603 ++20130614 Index: gcc/ChangeLog =================================================================== --- a/src/gcc/ChangeLog (revision +++ b/src/gcc/ChangeLog (revision -@@ -1,3 +1,97 @@ -+2013-05-22 Uros Bizjak <ubizjak@gmail.com> -+ -+ PR target/57356 -+ * config/i386/i386.md (*movti_internal_rex64): Emit movaps/movups -+ for non-sse2 targets. Simplify mode attribute calculation. -+ -+2013-05-17 Uros Bizjak <ubizjak@gmail.com> +@@ -1,3 +1,31 @@ ++2013-06-07 Uros Bizjak <ubizjak@gmail.com> + + Backport from mainline -+ 2013-05-16 Uros Bizjak <ubizjak@gmail.com> -+ -+ * config/i386/driver-i386.c (host_detect_local_cpu): Determine -+ cache parameters using detect_caches_amd also for CYRIX, -+ NSC and TM2 signatures. -+ -+ 2013-05-16 Uros Bizjak <ubizjak@gmail.com> -+ Dzianis Kahanovich <mahatma@eu.by> ++ 2013-06-10 Uros Bizjak <ubizjak@gmail.com> + -+ PR target/45359 -+ PR target/46396 -+ * config/i386/driver-i386.c (host_detect_local_cpu): Detect -+ VIA/Centaur processors and determine their cache parameters -+ using detect_caches_amd. ++ * config/alpha/alpha.c (alpha_emit_xfloating_compare): Also use ++ cmp_code to construct REG_EQUAL note. + -+ 2013-05-15 Uros Bizjak <ubizjak@gmail.com> -+ -+ * config/i386/i386.c (ix86_option_override_internal): Add -+ PTA_POPCNT to corei7 entry. -+ -+2013-05-14 Richard Biener <rguenther@suse.de> -+ -+ PR gcov-profile/57269 + Backport from mainline -+ 2012-06-30 Nathan Sidwell <nathan@acm.org> -+ -+ * coverage.c (coverage_init): Read counts file before writing -+ graph header. ++ 2013-06-05 Uros Bizjak <ubizjak@gmail.com> + -+2013-05-13 Uros Bizjak <ubizjak@gmail.com> ++ * config/alpha/alpha.c (alpha_emit_conditional_move): Swap all ++ GE, GT, GEU and GTU compares, modulo DImode compares with zero. + -+ PR target/57264 + Backport from mainline -+ 2013-01-22 Jakub Jelinek <jakub@redhat.com> ++ 2013-05-23 Uros Bizjak <ubizjak@gmail.com> + -+ PR target/55686 -+ * config/i386/i386.md (UNSPEC_STOS): New. -+ (strset_singleop, *strsetdi_rex_1, *strsetsi_1, *strsethi_1, -+ *strsetqi_1): Add UNSPEC_STOS. ++ PR target/57379 ++ * config/alpha/alpha.md (unspec): Add UNSPEC_XFLT_COMPARE. ++ * config/alpha/alpha.c (alpha_emit_xfloating_compare): Construct ++ REG_EQUAL note as UNSPEC_XFLT_COMPARE unspec. + -+2013-05-10 Joey Ye <joey.ye@arm.com> ++2013-06-09 Jakub Jelinek <jakub@redhat.com> + -+ Backport from mainline -+ 2012-11-29 Matthew Gretton-Dann <matthew.gretton-dann@linaro.org> -+ -+ PR target/54974 -+ * config/arm/arm.md (thumb2_pool_range, pool_range): Add comment on -+ Thumb pool ranges. -+ (thumb1_extendhisi2): Reduce Thumb pool range. -+ (arm_movdi): Likewise. -+ (thumb1_movdi_insn): Likewise. -+ (thumb1_movsi_insn): Likewise. -+ (pic_load_addr_unified): Likewise. -+ (pic_load_addr_32bit): Likewise. -+ (pic_load_addr_thumb1): Likewise. -+ (thumb1_movhf): Likewise. -+ (arm_movsf_soft_insn): Likewise. -+ (thumb1_movsf_soft_insn): Likewise. -+ (movdf_soft_insn): Likewise. -+ (thumb1_movdf_soft_insn): Likewise. -+ * config/arm/neon.md (*neon_mov<mode>): Likewise. -+ (*neon_mov<mode>): Likwise. -+ * config/arm/thumb2.md: (*thumb2_movsi_insn): Likewise. -+ (*thumb2_movhi_insn): Likewise. -+ (*thumb2_extendqisi_v6): Likewise. -+ (*thumb2_zero_extendqisi_v6): Likewise. -+ (*thumb2_zero_extendqisi2_v6): Likewise. -+ * config/arm/vfp.md: (*thumb2_movsi_vfp): Likewise. -+ (*movdi_vfp): Likewise. -+ (*movdi_vfp_cortexa8): Likewise. -+ (*thumb2_movsf_vfp): Likewise. -+ (*thumb2_movdf_vfp): Likewise. -+ -+2013-05-10 Sebastian Huber <sebastian.huber@embedded-brains.de> -+ -+ * config/arm/t-rtems-eabi: Remove mthumb/march=armv7 multilib. -+ Add mthumb/march=armv7-a multilib. -+ Add mthumb/march=armv7-r multilib. -+ Add mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard multilib. ++ PR target/57568 ++ * config/i386/i386.md (TARGET_READ_MODIFY_WRITE peepholes): Ensure ++ that operands[2] doesn't overlap with operands[0]. + -+2013-05-10 Ralf Corsépius <ralf.corsepius@rtems.org> -+ -+ PR target/57237 -+ * config/v850/t-rtems: Add more multilibs. -+ - 2013-05-07 Michael Meissner <meissner@linux.vnet.ibm.com> - - Backport from trunk -@@ -20,7 +114,7 @@ - 2013-04-25 Marek Polacek <polacek@redhat.com> - - PR tree-optimization/57066 -- * builtins.c (fold_builtin_logb): Return +Inf for -Inf. -+ * builtins.c (fold_builtin_logb): Return +Inf for -Inf. + 2013-05-22 Uros Bizjak <ubizjak@gmail.com> - 2013-04-30 Uros Bizjak <ubizjak@gmail.com> - -Index: gcc/testsuite/gcc.target/i386/pr57264.c + PR target/57356 +Index: gcc/testsuite/gfortran.dg/do_5.f90 =================================================================== ---- a/src/gcc/testsuite/gcc.target/i386/pr57264.c (revision -+++ b/src/gcc/testsuite/gcc.target/i386/pr57264.c (revision -@@ -0,0 +1,18 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O1 -mcld" } */ -+ -+void test (int x, int **pp) -+{ -+ while (x) -+ { -+ int *ip = *pp; -+ int *op = *pp; -+ while (*ip) -+ { -+ int v = *ip++; -+ *op++ = v + 1; -+ } -+ } -+} -+ -+/* { dg-final { scan-assembler-not "stosl" } } */ -Index: gcc/testsuite/gnat.dg/specs/last_bit.ads +--- a/src/gcc/testsuite/gfortran.dg/do_5.f90 (revision ++++ b/src/gcc/testsuite/gfortran.dg/do_5.f90 (revision +@@ -0,0 +1,29 @@ ++! { dg-do compile } ++! ++! PR fortran/54370 ++! ++! The following program was ICEing at tree-check time ++! "L()" was regarded as default-kind logical. ++! ++! Contributed by Kirill Chilikin ++! ++ MODULE M ++ CONTAINS ++ ++ LOGICAL(C_BOOL) FUNCTION L() BIND(C) ++ USE, INTRINSIC :: ISO_C_BINDING ++ L = .FALSE. ++ END FUNCTION ++ ++ LOGICAL(8) FUNCTION L2() BIND(C) ! { dg-warning "may not be a C interoperable kind but it is bind" } ++ L2 = .FALSE._8 ++ END FUNCTION ++ ++ SUBROUTINE S() ++ DO WHILE (L()) ++ ENDDO ++ DO WHILE (L2()) ++ ENDDO ++ END ++ ++ END +Index: gcc/testsuite/gcc.c-torture/execute/pr57568.c =================================================================== ---- a/src/gcc/testsuite/gnat.dg/specs/last_bit.ads (revision -+++ b/src/gcc/testsuite/gnat.dg/specs/last_bit.ads (revision -@@ -0,0 +1,19 @@ -+-- { dg-do compile } -+ -+package Last_Bit is -+ -+ Max_Components : constant := 100; -+ type Count_Type is new Natural range 0 .. Max_Components; -+ subtype Index_Type is Count_Type range 1 .. Count_Type'Last; -+ -+ type List_Type is array (Index_Type range <>) of Integer; -+ -+ type Record_Type (Count : Count_Type := 0) is record -+ List : List_Type (1 .. Count); -+ end record; -+ -+ Null_Record : Record_Type (Count => 0); +--- a/src/gcc/testsuite/gcc.c-torture/execute/pr57568.c (revision ++++ b/src/gcc/testsuite/gcc.c-torture/execute/pr57568.c (revision +@@ -0,0 +1,12 @@ ++/* PR target/57568 */ + -+ List_Last_Bit : Integer := Null_Record.List'Last_Bit; ++extern void abort (void); ++int a[6][9] = { }, b = 1, *c = &a[3][5]; + -+end Last_Bit; ++int ++main () ++{ ++ if (b && (*c = *c + *c)) ++ abort (); ++ return 0; ++} Index: gcc/testsuite/ChangeLog =================================================================== --- a/src/gcc/testsuite/ChangeLog (revision +++ b/src/gcc/testsuite/ChangeLog (revision -@@ -1,3 +1,12 @@ -+2013-05-26 Eric Botcazou <ebotcazou@adacore.com> +@@ -1,3 +1,16 @@ ++2013-06-09 Jakub Jelinek <jakub@redhat.com> + -+ * gnat.dg/specs/last_bit.ads: New test. ++ PR target/57568 ++ * gcc.c-torture/execute/pr57568.c: New test. + -+2013-05-13 Uros Bizjak <ubizjak@gmail.com> ++2013-06-06 Tobias Burnus <burnus@net-b.de> + -+ PR target/57264 -+ * gcc.target/i386/pr57264.c: New test. -+ - 2013-05-07 Michael Meissner <meissner@linux.vnet.ibm.com> - - Backport from trunk -Index: gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr8.C -=================================================================== ---- a/src/gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr8.C (revision -+++ b/src/gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr8.C (revision -@@ -0,0 +1,54 @@ -+// PR c++/57047 -+// { dg-require-effective-target c++11 } -+ -+template <typename> -+struct A; -+template <typename T> -+struct A <T &> -+{ -+ typedef T type; -+}; -+template <typename T> -+constexpr T && foo (typename A <T>::type & __t) noexcept -+{ -+ return static_cast <T &&>(__t); -+} -+template <class T1, class T2> -+struct B -+{ -+ T1 t1; -+ T2 t2; -+ template <class U> -+ constexpr B (U && __x, const T2 & __y) : t1 (foo <U> (__x)), t2 (__y) {} -+}; -+static inline constexpr bool -+fn1 (const char c) -+{ -+ return ('0' <= c) && (c <= '9'); -+} -+static inline constexpr bool -+fn2 (const char c) -+{ -+ return (('A' <= c) && (c <= 'Z')) || (('a' <= c) && (c <= 'z')); -+} -+static constexpr bool -+fn3 (const char *const x) -+{ -+ return (x[1] == '\0' && x[0] == ']') ? true : (!fn1 (x[0])) ? false : fn3 (&x[1]); -+} -+static constexpr bool -+fn4 (const char *const x) -+{ -+ return (x[0] == '\0') ? fn3 (&x[1]) : fn4 (&x[1]); -+} -+static inline constexpr bool -+fn5 (const char *const x) -+{ -+ return fn2 (x[0]) ? fn4 (x) : false; -+} -+struct C final -+{ -+ constexpr C (const char *const t1) : c (fn5 (t1) ? 199 : 69) {} -+ unsigned c; -+}; -+B <C, C> p ("a", "b"); -Index: gcc/testsuite/g++.dg/template/array26.C -=================================================================== ---- a/src/gcc/testsuite/g++.dg/template/array26.C (revision -+++ b/src/gcc/testsuite/g++.dg/template/array26.C (revision -@@ -0,0 +1,40 @@ -+// PR c++/57325 -+ -+class valarray { int _M_data; }; -+template < typename > struct SimpleJet { valarray partials; }; -+ -+template < class C > struct scoped_ptr_impl -+{ -+ scoped_ptr_impl (C *):data_ () { } -+ struct Data -+ { -+ C ptr; -+ }; -+ Data data_; -+}; -+ -+template < class, class = int >struct scoped_ptr; -+template < class C, class D > struct scoped_ptr <C[], D > -+{ -+ scoped_ptr ():impl_ (0) { } -+ scoped_ptr_impl < C > impl_; -+}; -+ -+template < typename JetsT > void -+TestJets (JetsT *) -+{ -+ typedef typename JetsT::JetType JetT; -+ scoped_ptr < JetT[] > a; -+} -+ -+template < typename T > struct SimpleJets -+{ -+ typedef SimpleJet < T > JetType; -+ scoped_ptr < SimpleJet < T >[] > vars_; -+}; -+ -+void fn () -+{ -+ SimpleJets < double >b; -+ TestJets (&b); -+} -Index: gcc/cp/tree.c -=================================================================== ---- a/src/gcc/cp/tree.c (revision -+++ b/src/gcc/cp/tree.c (revision -@@ -816,10 +816,12 @@ - - if (TYPE_MAIN_VARIANT (t) != m) - { -- if (COMPLETE_TYPE_P (t) && !COMPLETE_TYPE_P (m)) -+ if (COMPLETE_TYPE_P (TREE_TYPE (t)) && !COMPLETE_TYPE_P (m)) - { - /* m was built before the element type was complete, so we -- also need to copy the layout info from t. */ -+ also need to copy the layout info from t. We might -+ end up doing this multiple times if t is an array of -+ unknown bound. */ - tree size = TYPE_SIZE (t); - tree size_unit = TYPE_SIZE_UNIT (t); - unsigned int align = TYPE_ALIGN (t); -Index: gcc/cp/ChangeLog -=================================================================== ---- a/src/gcc/cp/ChangeLog (revision -+++ b/src/gcc/cp/ChangeLog (revision -@@ -1,3 +1,14 @@ -+2013-05-20 Jason Merrill <jason@redhat.com> -+ -+ PR c++/57325 -+ * tree.c (build_cplus_array_type): Copy layout info if element -+ type is complete. -+ -+2013-05-09 Jason Merrill <jason@redhat.com> -+ -+ PR c++/57047 -+ * semantics.c (cxx_fold_indirect_ref): Fix thinko. -+ - 2013-04-21 Eric Botcazou <ebotcazou@adacore.com> - - * parser.c (cp_parser_late_return_type_opt): Fix C++ism. -Index: gcc/cp/semantics.c -=================================================================== ---- a/src/gcc/cp/semantics.c (revision -+++ b/src/gcc/cp/semantics.c (revision -@@ -7412,15 +7412,17 @@ - } - } - } -- /* *(foo *)fooarrptreturn> (*fooarrptr)[0] */ -+ /* *(foo *)fooarrptr => (*fooarrptr)[0] */ - else if (TREE_CODE (TREE_TYPE (subtype)) == ARRAY_TYPE - && (same_type_ignoring_top_level_qualifiers_p - (type, TREE_TYPE (TREE_TYPE (subtype))))) - { - tree type_domain; - tree min_val = size_zero_node; -- sub = cxx_fold_indirect_ref (loc, TREE_TYPE (subtype), sub, NULL); -- if (!sub) -+ tree newsub = cxx_fold_indirect_ref (loc, TREE_TYPE (subtype), sub, NULL); -+ if (newsub) -+ sub = newsub; -+ else - sub = build1_loc (loc, INDIRECT_REF, TREE_TYPE (subtype), sub); - type_domain = TYPE_DOMAIN (TREE_TYPE (sub)); - if (type_domain && TYPE_MIN_VALUE (type_domain)) -Index: gcc/ada/ChangeLog -=================================================================== ---- a/src/gcc/ada/ChangeLog (revision -+++ b/src/gcc/ada/ChangeLog (revision -@@ -1,3 +1,8 @@ -+2013-05-26 Eric Botcazou <ebotcazou@adacore.com> ++ Backport from mainline ++ 2012-08-27 Tobias Burnus <burnus@net-b.de> + -+ * gcc-interface/trans.c (Attribute_to_gnu) <Attr_Last_Bit>: Add kludge -+ to avoid generating an overflow for -1. ++ PR fortran/54370 ++ * gfortran.dg/do_5.f90: New. + - 2013-04-11 Release Manager - - * GCC 4.7.3 released. -Index: gcc/ada/gcc-interface/trans.c -=================================================================== ---- a/src/gcc/ada/gcc-interface/trans.c (revision -+++ b/src/gcc/ada/gcc-interface/trans.c (revision -@@ -1901,14 +1901,19 @@ - gnu_result = bitsize_int (bitpos % BITS_PER_UNIT); - gnu_result = size_binop (PLUS_EXPR, gnu_result, - TYPE_SIZE (TREE_TYPE (gnu_prefix))); -- gnu_result = size_binop (MINUS_EXPR, gnu_result, -- bitsize_one_node); -+ /* ??? Avoid a large unsigned result that will overflow when -+ converted to the signed universal_integer. */ -+ if (integer_zerop (gnu_result)) -+ gnu_result = integer_minus_one_node; -+ else -+ gnu_result -+ = size_binop (MINUS_EXPR, gnu_result, bitsize_one_node); - break; + 2013-06-01 Janus Weil <janus@gcc.gnu.org> + Tobias Burnus <burnus@net-b.de> - case Attr_Bit_Position: - gnu_result = gnu_field_bitpos; - break; -- } -+ } - - /* If this has a PLACEHOLDER_EXPR, qualify it by the object we are - handling. */ Index: gcc/fortran/ChangeLog =================================================================== --- a/src/gcc/fortran/ChangeLog (revision +++ b/src/gcc/fortran/ChangeLog (revision -@@ -1,3 +1,7 @@ -+2013-05-22 Janne Blomqvist <jb@gcc.gnu.org> +@@ -1,3 +1,12 @@ ++2013-06-06 Tobias Burnus <burnus@net-b.de> + -+ * intrinsic.texi (RANDOM_SEED): Improve example. ++ Backport from mainline ++ 2012-08-27 Tobias Burnus <burnus@net-b.de> + - 2013-05-07 Tobias Burnus <burnus@net-b.de> - - Backport from mainline -Index: gcc/coverage.c -=================================================================== ---- a/src/gcc/coverage.c (revision -+++ b/src/gcc/coverage.c (revision -@@ -1099,6 +1099,9 @@ - memcpy (da_file_name + prefix_len, filename, len); - strcpy (da_file_name + prefix_len + len, GCOV_DATA_SUFFIX); - -+ if (flag_branch_probabilities) -+ read_counts_file (); ++ PR fortran/54370 ++ * trans-stmt.c (gfc_trans_do_while): Don't change the logical ++ kind for negation of the condition. + - /* Name of bbg file. */ - if (flag_test_coverage && !flag_compare_debug) - { -@@ -1118,9 +1121,6 @@ - gcov_write_unsigned (local_tick); - } - } -- -- if (flag_branch_probabilities) -- read_counts_file (); - } + 2013-06-01 Janus Weil <janus@gcc.gnu.org> + Tobias Burnus <burnus@net-b.de> - /* Performs file-level cleanup. Close graph file, generate coverage -Index: gcc/config/i386/i386.md +Index: gcc/fortran/trans-stmt.c =================================================================== ---- a/src/gcc/config/i386/i386.md (revision -+++ b/src/gcc/config/i386/i386.md (revision -@@ -109,6 +109,7 @@ - UNSPEC_CALL_NEEDS_VZEROUPPER - UNSPEC_PAUSE - UNSPEC_LEA_ADDR -+ UNSPEC_STOS - - ;; For SSE/MMX support: - UNSPEC_FIX_NOTRUNC -@@ -1855,18 +1856,16 @@ - [(set_attr "type" "*,*,sselog1,ssemov,ssemov") - (set_attr "prefix" "*,*,maybe_vex,maybe_vex,maybe_vex") - (set (attr "mode") -- (cond [(eq_attr "alternative" "2,3") -- (if_then_else -- (match_test "optimize_function_for_size_p (cfun)") -- (const_string "V4SF") -- (const_string "TI")) -- (eq_attr "alternative" "4") -- (if_then_else -- (ior (match_test "TARGET_SSE_TYPELESS_STORES") -- (match_test "optimize_function_for_size_p (cfun)")) -- (const_string "V4SF") -- (const_string "TI"))] -- (const_string "DI")))]) -+ (cond [(eq_attr "alternative" "0,1") -+ (const_string "DI") -+ (ior (not (match_test "TARGET_SSE2")) -+ (match_test "optimize_function_for_size_p (cfun)")) -+ (const_string "V4SF") -+ (and (eq_attr "alternative" "4") -+ (match_test "TARGET_SSE_TYPELESS_STORES")) -+ (const_string "V4SF") -+ ] -+ (const_string "TI")))]) - - (define_split - [(set (match_operand:TI 0 "nonimmediate_operand" "") -@@ -15912,7 +15911,8 @@ - [(parallel [(set (match_operand 1 "memory_operand" "") - (match_operand 2 "register_operand" "")) - (set (match_operand 0 "register_operand" "") -- (match_operand 3 "" ""))])] -+ (match_operand 3 "" "")) -+ (unspec [(const_int 0)] UNSPEC_STOS)])] - "" - "ix86_current_function_needs_cld = 1;") - -@@ -15921,7 +15921,8 @@ - (match_operand:DI 2 "register_operand" "a")) - (set (match_operand:DI 0 "register_operand" "=D") - (plus:DI (match_dup 1) -- (const_int 8)))] -+ (const_int 8))) -+ (unspec [(const_int 0)] UNSPEC_STOS)] - "TARGET_64BIT - && !(fixed_regs[AX_REG] || fixed_regs[DI_REG])" - "stosq" -@@ -15934,7 +15935,8 @@ - (match_operand:SI 2 "register_operand" "a")) - (set (match_operand:P 0 "register_operand" "=D") - (plus:P (match_dup 1) -- (const_int 4)))] -+ (const_int 4))) -+ (unspec [(const_int 0)] UNSPEC_STOS)] - "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" - "stos{l|d}" - [(set_attr "type" "str") -@@ -15946,7 +15948,8 @@ - (match_operand:HI 2 "register_operand" "a")) - (set (match_operand:P 0 "register_operand" "=D") - (plus:P (match_dup 1) -- (const_int 2)))] -+ (const_int 2))) -+ (unspec [(const_int 0)] UNSPEC_STOS)] - "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" - "stosw" - [(set_attr "type" "str") -@@ -15958,7 +15961,8 @@ - (match_operand:QI 2 "register_operand" "a")) - (set (match_operand:P 0 "register_operand" "=D") - (plus:P (match_dup 1) -- (const_int 1)))] -+ (const_int 1))) -+ (unspec [(const_int 0)] UNSPEC_STOS)] - "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" - "stosb" - [(set_attr "type" "str") -Index: gcc/config/i386/driver-i386.c -=================================================================== ---- a/src/gcc/config/i386/driver-i386.c (revision -+++ b/src/gcc/config/i386/driver-i386.c (revision -@@ -350,7 +350,10 @@ - enum vendor_signatures - { - SIG_INTEL = 0x756e6547 /* Genu */, -- SIG_AMD = 0x68747541 /* Auth */ -+ SIG_AMD = 0x68747541 /* Auth */, -+ SIG_CENTAUR = 0x746e6543 /* Cent */, -+ SIG_CYRIX = 0x69727943 /* Cyri */, -+ SIG_NSC = 0x646f6547 /* Geod */ - }; - - enum processor_signatures -@@ -510,7 +513,10 @@ - - if (!arch) - { -- if (vendor == SIG_AMD) -+ if (vendor == SIG_AMD -+ || vendor == SIG_CENTAUR -+ || vendor == SIG_CYRIX -+ || vendor == SIG_NSC) - cache = detect_caches_amd (ext_level); - else if (vendor == SIG_INTEL) - { -@@ -549,6 +555,37 @@ - else - processor = PROCESSOR_PENTIUM; - } -+ else if (vendor == SIG_CENTAUR) -+ { -+ if (arch) -+ { -+ switch (family) -+ { -+ case 6: -+ if (model > 9) -+ /* Use the default detection procedure. */ -+ processor = PROCESSOR_GENERIC32; -+ else if (model == 9) -+ cpu = "c3-2"; -+ else if (model >= 6) -+ cpu = "c3"; -+ else -+ processor = PROCESSOR_GENERIC32; -+ break; -+ case 5: -+ if (has_3dnow) -+ cpu = "winchip2"; -+ else if (has_mmx) -+ cpu = "winchip2-c6"; -+ else -+ processor = PROCESSOR_GENERIC32; -+ break; -+ default: -+ /* We have no idea. */ -+ processor = PROCESSOR_GENERIC32; -+ } -+ } -+ } - else - { - switch (family) -Index: gcc/config/i386/i386.c -=================================================================== ---- a/src/gcc/config/i386/i386.c (revision -+++ b/src/gcc/config/i386/i386.c (revision -@@ -2979,7 +2979,7 @@ - | PTA_SSSE3 | PTA_CX16}, - {"corei7", PROCESSOR_COREI7_64, CPU_COREI7, - PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 -- | PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16}, -+ | PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16 | PTA_POPCNT}, - {"corei7-avx", PROCESSOR_COREI7_64, CPU_COREI7, - PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 - | PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_AVX -Index: gcc/config/arm/thumb2.md -=================================================================== ---- a/src/gcc/config/arm/thumb2.md (revision -+++ b/src/gcc/config/arm/thumb2.md (revision -@@ -182,7 +182,7 @@ - str%?\\t%1, %0" - [(set_attr "type" "*,*,*,*,load1,load1,store1,store1") - (set_attr "predicable" "yes") -- (set_attr "pool_range" "*,*,*,*,1020,4096,*,*") -+ (set_attr "pool_range" "*,*,*,*,1018,4094,*,*") - (set_attr "neg_pool_range" "*,*,*,*,0,0,*,*")] - ) - -@@ -217,7 +217,7 @@ - ldr%(h%)\\t%0, %1\\t%@ movhi" - [(set_attr "type" "*,*,store1,load1") - (set_attr "predicable" "yes") -- (set_attr "pool_range" "*,*,*,4096") -+ (set_attr "pool_range" "*,*,*,4094") - (set_attr "neg_pool_range" "*,*,*,250")] - ) - -@@ -570,7 +570,7 @@ - ldr%(sb%)\\t%0, %1" - [(set_attr "type" "alu_shift,load_byte") - (set_attr "predicable" "yes") -- (set_attr "pool_range" "*,4096") -+ (set_attr "pool_range" "*,4094") - (set_attr "neg_pool_range" "*,250")] - ) - -@@ -583,7 +583,7 @@ - ldr%(h%)\\t%0, %1" - [(set_attr "type" "alu_shift,load_byte") - (set_attr "predicable" "yes") -- (set_attr "pool_range" "*,4096") -+ (set_attr "pool_range" "*,4094") - (set_attr "neg_pool_range" "*,250")] - ) - -@@ -596,7 +596,7 @@ - ldr%(b%)\\t%0, %1\\t%@ zero_extendqisi2" - [(set_attr "type" "alu_shift,load_byte") - (set_attr "predicable" "yes") -- (set_attr "pool_range" "*,4096") -+ (set_attr "pool_range" "*,4094") - (set_attr "neg_pool_range" "*,250")] - ) - -Index: gcc/config/arm/vfp.md -=================================================================== ---- a/src/gcc/config/arm/vfp.md (revision -+++ b/src/gcc/config/arm/vfp.md (revision -@@ -126,7 +126,7 @@ - [(set_attr "predicable" "yes") - (set_attr "type" "*,*,*,*,load1,load1,store1,store1,r_2_f,f_2_r,fcpys,f_loads,f_stores") - (set_attr "insn" "mov,mov,mvn,mov,*,*,*,*,*,*,*,*,*") -- (set_attr "pool_range" "*,*,*,*,1020,4096,*,*,*,*,*,1020,*") -+ (set_attr "pool_range" "*,*,*,*,1018,4094,*,*,*,*,*,1018,*") - (set_attr "neg_pool_range" "*,*,*,*, 0, 0,*,*,*,*,*,1008,*")] - ) - -@@ -177,7 +177,8 @@ - (const_int 8) - (const_int 4))] - (const_int 4))) -- (set_attr "pool_range" "*,*,*,*,1020,4096,*,*,*,*,1020,*") -+ (set_attr "arm_pool_range" "*,*,*,*,1020,4096,*,*,*,*,1020,*") -+ (set_attr "thumb2_pool_range" "*,*,*,*,1018,4094,*,*,*,*,1018,*") - (set_attr "neg_pool_range" "*,*,*,*,1004,0,*,*,*,*,1004,*") - (set_attr "arch" "t2,any,any,any,a,t2,any,any,any,any,any,any")] - ) -@@ -222,7 +223,8 @@ - * 4")] - (const_int 4))) - (set_attr "predicable" "yes") -- (set_attr "pool_range" "*,*,*,*,1020,4096,*,*,*,*,1020,*") -+ (set_attr "arm_pool_range" "*,*,*,*,1018,4094,*,*,*,*,1018,*") -+ (set_attr "thumb2_pool_range" "*,*,*,*,1018,4094,*,*,*,*,1018,*") - (set_attr "neg_pool_range" "*,*,*,*,1004,0,*,*,*,*,1004,*") - (set (attr "ce_count") - (symbol_ref "get_attr_length (insn) / 4")) -@@ -409,7 +411,7 @@ - (set_attr "type" - "r_2_f,f_2_r,fconsts,f_loads,f_stores,load1,store1,fcpys,*") - (set_attr "insn" "*,*,*,*,*,*,*,*,mov") -- (set_attr "pool_range" "*,*,*,1020,*,4092,*,*,*") -+ (set_attr "pool_range" "*,*,*,1018,*,4090,*,*,*") - (set_attr "neg_pool_range" "*,*,*,1008,*,0,*,*,*")] - ) - -@@ -501,7 +503,7 @@ - (const_int 8) - (const_int 4))] - (const_int 4))) -- (set_attr "pool_range" "*,*,*,1020,*,4096,*,*,*") -+ (set_attr "pool_range" "*,*,*,1018,*,4094,*,*,*") - (set_attr "neg_pool_range" "*,*,*,1008,*,0,*,*,*")] - ) - -Index: gcc/config/arm/neon.md -=================================================================== ---- a/src/gcc/config/arm/neon.md (revision -+++ b/src/gcc/config/arm/neon.md (revision -@@ -201,7 +201,8 @@ - (set_attr "type" "*,f_stored,*,f_loadd,*,*,alu,load2,store2") - (set_attr "insn" "*,*,*,*,*,*,mov,*,*") - (set_attr "length" "4,4,4,4,4,4,8,8,8") -- (set_attr "pool_range" "*,*,*,1020,*,*,*,1020,*") -+ (set_attr "arm_pool_range" "*,*,*,1020,*,*,*,1020,*") -+ (set_attr "thumb2_pool_range" "*,*,*,1018,*,*,*,1018,*") - (set_attr "neg_pool_range" "*,*,*,1004,*,*,*,1004,*")]) - - (define_insn "*neon_mov<mode>" -@@ -246,7 +247,8 @@ - (set_attr "type" "*,*,*,*,*,*,alu,load4,store4") - (set_attr "insn" "*,*,*,*,*,*,mov,*,*") - (set_attr "length" "4,8,4,8,8,8,16,8,16") -- (set_attr "pool_range" "*,*,*,1020,*,*,*,1020,*") -+ (set_attr "arm_pool_range" "*,*,*,1020,*,*,*,1020,*") -+ (set_attr "thumb2_pool_range" "*,*,*,1018,*,*,*,1018,*") - (set_attr "neg_pool_range" "*,*,*,996,*,*,*,996,*")]) - - (define_expand "movti" -Index: gcc/config/arm/arm.md +--- a/src/gcc/fortran/trans-stmt.c (revision ++++ b/src/gcc/fortran/trans-stmt.c (revision +@@ -1743,7 +1743,7 @@ + gfc_conv_expr_val (&cond, code->expr1); + gfc_add_block_to_block (&block, &cond.pre); + cond.expr = fold_build1_loc (code->expr1->where.lb->location, +- TRUTH_NOT_EXPR, boolean_type_node, cond.expr); ++ TRUTH_NOT_EXPR, TREE_TYPE (cond.expr), cond.expr); + + /* Build "IF (! cond) GOTO exit_label". */ + tmp = build1_v (GOTO_EXPR, exit_label); +Index: gcc/config/alpha/alpha.md =================================================================== ---- a/src/gcc/config/arm/arm.md (revision -+++ b/src/gcc/config/arm/arm.md (revision -@@ -256,6 +256,9 @@ - ; POOL_RANGE is how far away from a constant pool entry that this insn - ; can be placed. If the distance is zero, then this insn will never - ; reference the pool. -+; Note that for Thumb constant pools the PC value is rounded down to the -+; nearest multiple of four. Therefore, THUMB2_POOL_RANGE (and POOL_RANGE for -+; Thumb insns) should be set to <max_range> - 2. - ; NEG_POOL_RANGE is nonzero for insns that can reference a constant pool entry - ; before its address. It is set to <max_range> - (8 + <data_size>). - (define_attr "arm_pool_range" "" (const_int 0)) -@@ -5058,7 +5058,7 @@ - (const_int 2) (const_int 4)) - (const_int 4)]) - (set_attr "type" "simple_alu_shift,load_byte") -- (set_attr "pool_range" "*,1020")] -+ (set_attr "pool_range" "*,1018")] - ) - - ;; This pattern will only be used when ldsh is not available -@@ -5239,7 +5242,7 @@ - (set_attr "type" "*,*,*,load2,store2") - (set_attr "arm_pool_range" "*,*,*,1020,*") - (set_attr "arm_neg_pool_range" "*,*,*,1004,*") -- (set_attr "thumb2_pool_range" "*,*,*,4096,*") -+ (set_attr "thumb2_pool_range" "*,*,*,4094,*") - (set_attr "thumb2_neg_pool_range" "*,*,*,0,*")] - ) - -@@ -5379,7 +5382,7 @@ - [(set_attr "length" "4,4,6,2,2,6,4,4") - (set_attr "type" "*,*,*,load2,store2,load2,store2,*") - (set_attr "insn" "*,mov,*,*,*,*,*,mov") -- (set_attr "pool_range" "*,*,*,*,*,1020,*,*")] -+ (set_attr "pool_range" "*,*,*,*,*,1018,*,*")] - ) - - (define_expand "movsi" -@@ -5539,7 +5542,7 @@ - mov\\t%0, %1" - [(set_attr "length" "2,2,4,4,2,2,2,2,2") - (set_attr "type" "*,*,*,*,load1,store1,load1,store1,*") -- (set_attr "pool_range" "*,*,*,*,*,*,1020,*,*") -+ (set_attr "pool_range" "*,*,*,*,*,*,1018,*,*") - (set_attr "conds" "set,clob,*,*,nocond,nocond,nocond,nocond,nocond")]) - - (define_split -@@ -5632,7 +5635,7 @@ - (match_dup 2)] UNSPEC_PIC_BASE))] - "operands[3] = TARGET_THUMB ? GEN_INT (4) : GEN_INT (8);" - [(set_attr "type" "load1,load1,load1") -- (set_attr "pool_range" "4096,4096,1024") -+ (set_attr "pool_range" "4096,4094,1022") - (set_attr "neg_pool_range" "4084,0,0") - (set_attr "arch" "a,t2,t1") - (set_attr "length" "8,6,4")] -@@ -5648,7 +5651,10 @@ - "TARGET_32BIT && flag_pic" - "ldr%?\\t%0, %1" - [(set_attr "type" "load1") -- (set_attr "pool_range" "4096") -+ (set (attr "pool_range") -+ (if_then_else (eq_attr "is_thumb" "no") -+ (const_int 4096) -+ (const_int 4094))) - (set (attr "neg_pool_range") - (if_then_else (eq_attr "is_thumb" "no") - (const_int 4084) -@@ -5661,7 +5667,7 @@ - "TARGET_THUMB1 && flag_pic" - "ldr\\t%0, %1" - [(set_attr "type" "load1") -- (set (attr "pool_range") (const_int 1024))] -+ (set (attr "pool_range") (const_int 1018))] - ) - - (define_insn "pic_add_dot_plus_four" -@@ -6456,7 +6462,7 @@ - [(set_attr "length" "2") - (set_attr "type" "*,load1,store1,*,*") - (set_attr "insn" "mov,*,*,mov,mov") -- (set_attr "pool_range" "*,1020,*,*,*") -+ (set_attr "pool_range" "*,1018,*,*,*") - (set_attr "conds" "clob,nocond,nocond,nocond,nocond")]) - - (define_expand "movsf" -@@ -6511,7 +6517,8 @@ - [(set_attr "predicable" "yes") - (set_attr "type" "*,load1,store1") - (set_attr "insn" "mov,*,*") -- (set_attr "pool_range" "*,4096,*") -+ (set_attr "arm_pool_range" "*,4096,*") -+ (set_attr "thumb2_pool_range" "*,4094,*") - (set_attr "arm_neg_pool_range" "*,4084,*") - (set_attr "thumb2_neg_pool_range" "*,0,*")] - ) -@@ -6533,7 +6540,7 @@ - mov\\t%0, %1" - [(set_attr "length" "2") - (set_attr "type" "*,load1,store1,load1,store1,*,*") -- (set_attr "pool_range" "*,*,*,1020,*,*,*") -+ (set_attr "pool_range" "*,*,*,1018,*,*,*") - (set_attr "insn" "*,*,*,*,*,mov,mov") - (set_attr "conds" "clob,nocond,nocond,nocond,nocond,nocond,nocond")] - ) -@@ -6622,7 +6629,8 @@ - " - [(set_attr "length" "8,12,16,8,8") - (set_attr "type" "*,*,*,load2,store2") -- (set_attr "pool_range" "*,*,*,1020,*") -+ (set_attr "arm_pool_range" "*,*,*,1020,*") -+ (set_attr "thumb2_pool_range" "*,*,*,1018,*") - (set_attr "arm_neg_pool_range" "*,*,*,1004,*") - (set_attr "thumb2_neg_pool_range" "*,*,*,0,*")] - ) -@@ -6665,7 +6673,7 @@ - [(set_attr "length" "4,2,2,6,4,4") - (set_attr "type" "*,load2,store2,load2,store2,*") - (set_attr "insn" "*,*,*,*,*,mov") -- (set_attr "pool_range" "*,*,*,1020,*,*")] -+ (set_attr "pool_range" "*,*,*,1018,*,*")] - ) - - (define_expand "movxf" -Index: gcc/config/arm/t-rtems-eabi +--- a/src/gcc/config/alpha/alpha.md (revision ++++ b/src/gcc/config/alpha/alpha.md (revision +@@ -25,6 +25,7 @@ + ;; Uses of UNSPEC in this file: + + (define_c_enum "unspec" [ ++ UNSPEC_XFLT_COMPARE + UNSPEC_ARG_HOME + UNSPEC_LDGP1 + UNSPEC_INSXH +Index: gcc/config/alpha/alpha.c =================================================================== ---- a/src/gcc/config/arm/t-rtems-eabi (revision -+++ b/src/gcc/config/arm/t-rtems-eabi (revision -@@ -1,8 +1,47 @@ - # Custom RTEMS EABI multilibs - --MULTILIB_OPTIONS = mthumb march=armv6-m/march=armv7/march=armv7-m --MULTILIB_DIRNAMES = thumb armv6-m armv7 armv7-m --MULTILIB_EXCEPTIONS = march=armv6-m march=armv7 march=armv7-m --MULTILIB_MATCHES = --MULTILIB_EXCLUSIONS = --MULTILIB_OSDIRNAMES = -+MULTILIB_OPTIONS = mthumb march=armv6-m/march=armv7-a/march=armv7-r/march=armv7-m mfpu=neon mfloat-abi=hard -+MULTILIB_DIRNAMES = thumb armv6-m armv7-a armv7-r armv7-m neon hard -+ -+# Enumeration of multilibs -+ -+MULTILIB_EXCEPTIONS = -+MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon/mfloat-abi=hard -+MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon -+MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfloat-abi=hard -+# MULTILIB_EXCEPTIONS += mthumb/march=armv6-m -+# MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard -+MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon -+MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfloat-abi=hard -+# MULTILIB_EXCEPTIONS += mthumb/march=armv7-a -+MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon/mfloat-abi=hard -+MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon -+MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfloat-abi=hard -+# MULTILIB_EXCEPTIONS += mthumb/march=armv7-r -+MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon/mfloat-abi=hard -+MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon -+MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfloat-abi=hard -+# MULTILIB_EXCEPTIONS += mthumb/march=armv7-m -+MULTILIB_EXCEPTIONS += mthumb/mfpu=neon/mfloat-abi=hard -+MULTILIB_EXCEPTIONS += mthumb/mfpu=neon -+MULTILIB_EXCEPTIONS += mthumb/mfloat-abi=hard -+# MULTILIB_EXCEPTIONS += mthumb -+MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon/mfloat-abi=hard -+MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon -+MULTILIB_EXCEPTIONS += march=armv6-m/mfloat-abi=hard -+MULTILIB_EXCEPTIONS += march=armv6-m -+MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon/mfloat-abi=hard -+MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon -+MULTILIB_EXCEPTIONS += march=armv7-a/mfloat-abi=hard -+MULTILIB_EXCEPTIONS += march=armv7-a -+MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon/mfloat-abi=hard -+MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon -+MULTILIB_EXCEPTIONS += march=armv7-r/mfloat-abi=hard -+MULTILIB_EXCEPTIONS += march=armv7-r -+MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon/mfloat-abi=hard -+MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon -+MULTILIB_EXCEPTIONS += march=armv7-m/mfloat-abi=hard -+MULTILIB_EXCEPTIONS += march=armv7-m -+MULTILIB_EXCEPTIONS += mfpu=neon/mfloat-abi=hard -+MULTILIB_EXCEPTIONS += mfpu=neon -+MULTILIB_EXCEPTIONS += mfloat-abi=hard -Index: gcc/config/v850/t-rtems +--- a/src/gcc/config/alpha/alpha.c (revision ++++ b/src/gcc/config/alpha/alpha.c (revision +@@ -2658,12 +2658,12 @@ + break; + + case GE: case GT: case GEU: case GTU: +- /* These must be swapped. */ +- if (op1 != CONST0_RTX (cmp_mode)) +- { +- code = swap_condition (code); +- tem = op0, op0 = op1, op1 = tem; +- } ++ /* These normally need swapping, but for integer zero we have ++ special patterns that recognize swapped operands. */ ++ if (cmp_mode == DImode && op1 == const0_rtx) ++ break; ++ code = swap_condition (code); ++ tem = op0, op0 = op1, op1 = tem; + break; + + default: +@@ -3025,12 +3025,9 @@ + operands[1] = op1; + out = gen_reg_rtx (DImode); + +- /* What's actually returned is -1,0,1, not a proper boolean value, +- so use an EXPR_LIST as with a generic libcall instead of a +- comparison type expression. */ +- note = gen_rtx_EXPR_LIST (VOIDmode, op1, NULL_RTX); +- note = gen_rtx_EXPR_LIST (VOIDmode, op0, note); +- note = gen_rtx_EXPR_LIST (VOIDmode, func, note); ++ /* What's actually returned is -1,0,1, not a proper boolean value. */ ++ note = gen_rtx_fmt_ee (cmp_code, VOIDmode, op0, op1); ++ note = gen_rtx_UNSPEC (DImode, gen_rtvec (1, note), UNSPEC_XFLT_COMPARE); + alpha_emit_xfloating_libcall (func, out, operands, 2, note); + + return out; +Index: gcc/config/i386/i386.md =================================================================== ---- a/src/gcc/config/v850/t-rtems (revision -+++ b/src/gcc/config/v850/t-rtems (revision -@@ -1,3 +1,7 @@ - # Custom multilibs for RTEMS - -+MULTILIB_OPTIONS = mv850/mv850e/mv850e2/mv850e2v3 -+MULTILIB_DIRNAMES = v850 v850e v850e2 v850e2v3 -+MULTILIB_MATCHES = mv850e=mv850e1 -+ - MULTILIB_MATCHES += mv850e=mv850es +--- a/src/gcc/config/i386/i386.md (revision ++++ b/src/gcc/config/i386/i386.md (revision +@@ -17194,6 +17194,7 @@ + "(TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ()) + && peep2_reg_dead_p (4, operands[0]) + && !reg_overlap_mentioned_p (operands[0], operands[1]) ++ && !reg_overlap_mentioned_p (operands[0], operands[2]) + && (<MODE>mode != QImode + || immediate_operand (operands[2], QImode) + || q_regs_operand (operands[2], QImode)) +@@ -17258,6 +17259,7 @@ + || immediate_operand (operands[2], SImode) + || q_regs_operand (operands[2], SImode)) + && !reg_overlap_mentioned_p (operands[0], operands[1]) ++ && !reg_overlap_mentioned_p (operands[0], operands[2]) + && ix86_match_ccmode (peep2_next_insn (3), + (GET_CODE (operands[3]) == PLUS + || GET_CODE (operands[3]) == MINUS) diff --git a/debian/patches/svn-updates.diff b/debian/patches/svn-updates.diff index c195ec6..61a6eb2 100644 --- a/debian/patches/svn-updates.diff +++ b/debian/patches/svn-updates.diff @@ -1,10 +1,10 @@ -# DP: updates from the 4.7 branch upto 20130530 (r199435). +# DP: updates from the 4.7 branch upto 20130614 (r200084). last_updated() { cat > ${dir}LAST_UPDATED <<EOF -Thu May 30 08:55:17 CEST 2013 -Thu May 30 06:55:17 UTC 2013 (revision 199435) +Fri Jun 14 09:56:44 CEST 2013 +Fri Jun 14 07:56:44 UTC 2013 (revision 200084) EOF } @@ -149,6 +149,19 @@ Index: libstdc++-v3/acinclude.m4 AC_DEFUN([GLIBCXX_ENABLE_LIBSTDCXX_TIME], [ AC_MSG_CHECKING([for clock_gettime, nanosleep and sched_yield]) +Index: libgcc/config.host +=================================================================== +--- a/src/libgcc/config.host (.../tags/gcc_4_7_3_release) ++++ b/src/libgcc/config.host (.../branches/gcc-4_7-branch) +@@ -315,7 +315,7 @@ + md_unwind_header=alpha/vms-unwind.h + ;; + arm-wrs-vxworks) +- tmake_file="$tmake_file arm/t-arm arm/t-vxworks t-fdpbit" ++ tmake_file="$tmake_file arm/t-arm arm/t-vxworks t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp" + extra_parts="$extra_parts crti.o crtn.o" + ;; + arm*-*-freebsd*) Index: libgcc/Makefile.in =================================================================== --- a/src/libgcc/Makefile.in (.../tags/gcc_4_7_3_release) @@ -167,7 +180,20 @@ Index: libgcc/ChangeLog =================================================================== --- a/src/libgcc/ChangeLog (.../tags/gcc_4_7_3_release) +++ b/src/libgcc/ChangeLog (.../branches/gcc-4_7-branch) -@@ -1,3 +1,18 @@ +@@ -1,3 +1,31 @@ ++2013-06-08 Walter Lee <walt@tilera.com> ++ ++ Backport from mainline: ++ 2013-06-08 Walter Lee <walt@tilera.com> ++ ++ * config/tilepro/atomic.h: Don't include stdint.h or features.h. ++ Replace int64_t with long long. Add __extension__ where ++ appropriate. ++ ++2013-06-06 Douglas B Rupp <rupp@adacore.com> ++ ++ * config.host (arm-wrs-vxworks): Configure with other soft float. ++ +2013-05-20 Chung-Ju Wu <jasonwucj@gmail.com> + + Backport from mainline: @@ -186,6 +212,124 @@ Index: libgcc/ChangeLog 2013-04-11 Release Manager * GCC 4.7.3 released. +Index: libgcc/config/tilepro/atomic.h +=================================================================== +--- a/src/libgcc/config/tilepro/atomic.h (.../tags/gcc_4_7_3_release) ++++ b/src/libgcc/config/tilepro/atomic.h (.../branches/gcc-4_7-branch) +@@ -1,6 +1,5 @@ + /* Macros for atomic functionality for tile. +- Copyright (C) 2011, 2012 +- Free Software Foundation, Inc. ++ Copyright (C) 2011-2013 Free Software Foundation, Inc. + Contributed by Walter Lee (walt@tilera.com) + + This file is free software; you can redistribute it and/or modify it +@@ -93,8 +92,6 @@ + compare-and-exchange routine, so may be potentially less efficient. */ + #endif + +-#include <stdint.h> +-#include <features.h> + #ifdef __tilegx__ + #include <arch/spr_def.h> + #else +@@ -123,9 +120,9 @@ + + /* 64-bit integer compare-and-exchange. */ + static __inline __attribute__ ((always_inline)) +- int64_t arch_atomic_val_compare_and_exchange_8 (volatile int64_t * mem, +- int64_t oldval, +- int64_t newval) ++ long long arch_atomic_val_compare_and_exchange_8 (volatile long long ++ *mem, long long oldval, ++ long long newval) + { + #ifdef __tilegx__ + __insn_mtspr (SPR_CMPEXCH_VALUE, oldval); +@@ -140,7 +137,7 @@ + "R04" (newval_lo), "R05" (newval_hi), + "m" (*mem):"r20", "r21", "r22", "r23", "r24", "r25", + "r26", "r27", "r28", "r29", "memory"); +- return ((uint64_t) result_hi) << 32 | result_lo; ++ return ((long long) result_hi) << 32 | result_lo; + #endif + } + +@@ -151,11 +148,11 @@ + + + #define arch_atomic_val_compare_and_exchange(mem, o, n) \ +- ({ \ ++ __extension__ ({ \ + (__typeof(*(mem)))(__typeof(*(mem)-*(mem))) \ + ((sizeof(*(mem)) == 8) ? \ + arch_atomic_val_compare_and_exchange_8( \ +- (volatile int64_t*)(mem), (__typeof((o)-(o)))(o), \ ++ (volatile long long*)(mem), (__typeof((o)-(o)))(o), \ + (__typeof((n)-(n)))(n)) : \ + (sizeof(*(mem)) == 4) ? \ + arch_atomic_val_compare_and_exchange_4( \ +@@ -165,7 +162,7 @@ + }) + + #define arch_atomic_bool_compare_and_exchange(mem, o, n) \ +- ({ \ ++ __extension__ ({ \ + __typeof(o) __o = (o); \ + __builtin_expect( \ + __o == arch_atomic_val_compare_and_exchange((mem), __o, (n)), 1); \ +@@ -175,7 +172,7 @@ + /* Loop with compare_and_exchange until we guess the correct value. + Normally "expr" will be an expression using __old and __value. */ + #define __arch_atomic_update_cmpxchg(mem, value, expr) \ +- ({ \ ++ __extension__ ({ \ + __typeof(value) __value = (value); \ + __typeof(*(mem)) *__mem = (mem), __old = *__mem, __guess; \ + do { \ +@@ -190,12 +187,14 @@ + /* Generic atomic op with 8- or 4-byte variant. + The _mask, _addend, and _expr arguments are ignored on tilegx. */ + #define __arch_atomic_update(mem, value, op, _mask, _addend, _expr) \ +- ({ \ ++ __extension__ ({ \ + ((__typeof(*(mem))) \ + ((sizeof(*(mem)) == 8) ? (__typeof(*(mem)-*(mem)))__insn_##op( \ +- (void *)(mem), (int64_t)(__typeof((value)-(value)))(value)) : \ ++ (volatile void *)(mem), \ ++ (long long)(__typeof((value)-(value)))(value)) : \ + (sizeof(*(mem)) == 4) ? (int)__insn_##op##4( \ +- (void *)(mem), (int32_t)(__typeof((value)-(value)))(value)) : \ ++ (volatile void *)(mem), \ ++ (int)(__typeof((value)-(value)))(value)) : \ + __arch_atomic_error_bad_argument_size())); \ + }) + +@@ -225,7 +224,7 @@ + /* Generic atomic op with 8- or 4-byte variant. + The _op argument is ignored on tilepro. */ + #define __arch_atomic_update(mem, value, _op, mask, addend, expr) \ +- ({ \ ++ __extension__ ({ \ + (__typeof(*(mem)))(__typeof(*(mem)-*(mem))) \ + ((sizeof(*(mem)) == 8) ? \ + __arch_atomic_update_cmpxchg((mem), (value), (expr)) : \ +@@ -264,13 +263,13 @@ + __arch_atomic_update_cmpxchg(mem, mask, ~(__old & __value)) + + #define arch_atomic_bit_set(mem, bit) \ +- ({ \ ++ __extension__ ({ \ + __typeof(*(mem)) __mask = (__typeof(*(mem)))1 << (bit); \ + __mask & arch_atomic_or((mem), __mask); \ + }) + + #define arch_atomic_bit_clear(mem, bit) \ +- ({ \ ++ __extension__ ({ \ + __typeof(*(mem)) __mask = (__typeof(*(mem)))1 << (bit); \ + __mask & arch_atomic_and((mem), ~__mask); \ + }) Index: libgcc/config/arm/linux-atomic.c =================================================================== --- a/src/libgcc/config/arm/linux-atomic.c (.../tags/gcc_4_7_3_release) @@ -320,7 +464,7 @@ Index: gcc/DATESTAMP +++ b/src/gcc/DATESTAMP (.../branches/gcc-4_7-branch) @@ -1 +1 @@ -20130411 -+20130530 ++20130614 Index: gcc/builtins.c =================================================================== --- a/src/gcc/builtins.c (.../tags/gcc_4_7_3_release) @@ -347,7 +491,35 @@ Index: gcc/ChangeLog =================================================================== --- a/src/gcc/ChangeLog (.../tags/gcc_4_7_3_release) +++ b/src/gcc/ChangeLog (.../branches/gcc-4_7-branch) -@@ -1,3 +1,220 @@ +@@ -1,3 +1,248 @@ ++2013-06-07 Uros Bizjak <ubizjak@gmail.com> ++ ++ Backport from mainline ++ 2013-06-10 Uros Bizjak <ubizjak@gmail.com> ++ ++ * config/alpha/alpha.c (alpha_emit_xfloating_compare): Also use ++ cmp_code to construct REG_EQUAL note. ++ ++ Backport from mainline ++ 2013-06-05 Uros Bizjak <ubizjak@gmail.com> ++ ++ * config/alpha/alpha.c (alpha_emit_conditional_move): Swap all ++ GE, GT, GEU and GTU compares, modulo DImode compares with zero. ++ ++ Backport from mainline ++ 2013-05-23 Uros Bizjak <ubizjak@gmail.com> ++ ++ PR target/57379 ++ * config/alpha/alpha.md (unspec): Add UNSPEC_XFLT_COMPARE. ++ * config/alpha/alpha.c (alpha_emit_xfloating_compare): Construct ++ REG_EQUAL note as UNSPEC_XFLT_COMPARE unspec. ++ ++2013-06-09 Jakub Jelinek <jakub@redhat.com> ++ ++ PR target/57568 ++ * config/i386/i386.md (TARGET_READ_MODIFY_WRITE peepholes): Ensure ++ that operands[2] doesn't overlap with operands[0]. ++ +2013-05-22 Uros Bizjak <ubizjak@gmail.com> + + PR target/57356 @@ -904,6 +1076,40 @@ Index: gcc/testsuite/gfortran.dg/size_kind_2.f90 +! { dg-final { scan-tree-dump "var2 = 4294967300;" "original" } } +! { dg-final { scan-tree-dump "var3 = 2147483650;" "original" } } +! { dg-final { cleanup-tree-dump "original" } } +Index: gcc/testsuite/gfortran.dg/do_5.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/do_5.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/do_5.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,29 @@ ++! { dg-do compile } ++! ++! PR fortran/54370 ++! ++! The following program was ICEing at tree-check time ++! "L()" was regarded as default-kind logical. ++! ++! Contributed by Kirill Chilikin ++! ++ MODULE M ++ CONTAINS ++ ++ LOGICAL(C_BOOL) FUNCTION L() BIND(C) ++ USE, INTRINSIC :: ISO_C_BINDING ++ L = .FALSE. ++ END FUNCTION ++ ++ LOGICAL(8) FUNCTION L2() BIND(C) ! { dg-warning "may not be a C interoperable kind but it is bind" } ++ L2 = .FALSE._8 ++ END FUNCTION ++ ++ SUBROUTINE S() ++ DO WHILE (L()) ++ ENDDO ++ DO WHILE (L2()) ++ ENDDO ++ END ++ ++ END Index: gcc/testsuite/gfortran.dg/proc_ptr_41.f90 =================================================================== --- a/src/gcc/testsuite/gfortran.dg/proc_ptr_41.f90 (.../tags/gcc_4_7_3_release) @@ -994,6 +1200,45 @@ Index: gcc/testsuite/gfortran.dg/namelist_81.f90 +call abort() + 60 close(99) +end +Index: gcc/testsuite/gfortran.dg/typebound_override_4.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/typebound_override_4.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/typebound_override_4.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,34 @@ ++! { dg-do compile } ++! ++! PR 57217: [4.7/4.8/4.9 Regression][OOP] Accepts invalid TBP overriding - lacking arguments check ++! ++! Contributed by Salvatore Filippone <filippone.salvatore@gmail.com> ++ ++module base_mod ++ implicit none ++ type base_type ++ contains ++ procedure, pass(map) :: clone => base_clone ++ end type ++contains ++ subroutine base_clone(map,mapout) ++ class(base_type) :: map ++ class(base_type) :: mapout ++ end subroutine ++end module ++ ++module r_mod ++ use base_mod ++ implicit none ++ type, extends(base_type) :: r_type ++ contains ++ procedure, pass(map) :: clone => r_clone ! { dg-error "Type/rank mismatch in argument" } ++ end type ++contains ++ subroutine r_clone(map,mapout) ++ class(r_type) :: map ++ class(r_type) :: mapout ++ end subroutine ++end module ++ ++! { dg-final { cleanup-modules "base_mod r_mod" } } Index: gcc/testsuite/gfortran.dg/namelist_78.f90 =================================================================== --- a/src/gcc/testsuite/gfortran.dg/namelist_78.f90 (.../tags/gcc_4_7_3_release) @@ -1033,6 +1278,23 @@ Index: gcc/testsuite/gfortran.dg/namelist_78.f90 + if (der%d(1)%k%j /= 1) call abort + if (der%d(2)%k%j /= 2) call abort +end program namelist +Index: gcc/testsuite/gcc.c-torture/execute/pr57568.c +=================================================================== +--- a/src/gcc/testsuite/gcc.c-torture/execute/pr57568.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.c-torture/execute/pr57568.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,12 @@ ++/* PR target/57568 */ ++ ++extern void abort (void); ++int a[6][9] = { }, b = 1, *c = &a[3][5]; ++ ++int ++main () ++{ ++ if (b && (*c = *c + *c)) ++ abort (); ++ return 0; ++} Index: gcc/testsuite/gcc.c-torture/execute/pr56866.c =================================================================== --- a/src/gcc/testsuite/gcc.c-torture/execute/pr56866.c (.../tags/gcc_4_7_3_release) @@ -1247,7 +1509,26 @@ Index: gcc/testsuite/ChangeLog =================================================================== --- a/src/gcc/testsuite/ChangeLog (.../tags/gcc_4_7_3_release) +++ b/src/gcc/testsuite/ChangeLog (.../branches/gcc-4_7-branch) -@@ -1,3 +1,114 @@ +@@ -1,3 +1,133 @@ ++2013-06-09 Jakub Jelinek <jakub@redhat.com> ++ ++ PR target/57568 ++ * gcc.c-torture/execute/pr57568.c: New test. ++ ++2013-06-06 Tobias Burnus <burnus@net-b.de> ++ ++ Backport from mainline ++ 2012-08-27 Tobias Burnus <burnus@net-b.de> ++ ++ PR fortran/54370 ++ * gfortran.dg/do_5.f90: New. ++ ++2013-06-01 Janus Weil <janus@gcc.gnu.org> ++ Tobias Burnus <burnus@net-b.de> ++ ++ PR fortran/57217 ++ * gfortran.dg/typebound_override_4.f90: New. ++ +2013-05-26 Eric Botcazou <ebotcazou@adacore.com> + + * gnat.dg/specs/last_bit.ads: New test. @@ -1686,11 +1967,40 @@ Index: gcc/ada/gcc-interface/trans.c /* If this has a PLACEHOLDER_EXPR, qualify it by the object we are handling. */ +Index: gcc/fortran/interface.c +=================================================================== +--- a/src/gcc/fortran/interface.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fortran/interface.c (.../branches/gcc-4_7-branch) +@@ -987,7 +987,8 @@ + bool type_must_agree, char *errmsg, int err_len) + { + /* Check type and rank. */ +- if (type_must_agree && !compare_type_rank (s2, s1)) ++ if (type_must_agree && ++ (!compare_type_rank (s1, s2) || !compare_type_rank (s2, s1))) + { + if (errmsg != NULL) + snprintf (errmsg, err_len, "Type/rank mismatch in argument '%s'", Index: gcc/fortran/ChangeLog =================================================================== --- a/src/gcc/fortran/ChangeLog (.../tags/gcc_4_7_3_release) +++ b/src/gcc/fortran/ChangeLog (.../branches/gcc-4_7-branch) -@@ -1,3 +1,43 @@ +@@ -1,3 +1,58 @@ ++2013-06-06 Tobias Burnus <burnus@net-b.de> ++ ++ Backport from mainline ++ 2012-08-27 Tobias Burnus <burnus@net-b.de> ++ ++ PR fortran/54370 ++ * trans-stmt.c (gfc_trans_do_while): Don't change the logical ++ kind for negation of the condition. ++ ++2013-06-01 Janus Weil <janus@gcc.gnu.org> ++ Tobias Burnus <burnus@net-b.de> ++ ++ PR fortran/57217 ++ * interface.c (check_dummy_characteristics): Symmetrize type check. ++ +2013-05-22 Janne Blomqvist <jb@gcc.gnu.org> + + * intrinsic.texi (RANDOM_SEED): Improve example. @@ -1734,6 +2044,19 @@ Index: gcc/fortran/ChangeLog 2013-04-11 Release Manager * GCC 4.7.3 released. +Index: gcc/fortran/trans-stmt.c +=================================================================== +--- a/src/gcc/fortran/trans-stmt.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fortran/trans-stmt.c (.../branches/gcc-4_7-branch) +@@ -1743,7 +1743,7 @@ + gfc_conv_expr_val (&cond, code->expr1); + gfc_add_block_to_block (&block, &cond.pre); + cond.expr = fold_build1_loc (code->expr1->where.lb->location, +- TRUTH_NOT_EXPR, boolean_type_node, cond.expr); ++ TRUTH_NOT_EXPR, TREE_TYPE (cond.expr), cond.expr); + + /* Build "IF (! cond) GOTO exit_label". */ + tmp = build1_v (GOTO_EXPR, exit_label); Index: gcc/fortran/expr.c =================================================================== --- a/src/gcc/fortran/expr.c (.../tags/gcc_4_7_3_release) @@ -2153,6 +2476,57 @@ Index: gcc/sched-deps.c flush_pending_lists (deps, insn, true, true); reg_pending_barrier = NOT_A_BARRIER; +Index: gcc/config/alpha/alpha.md +=================================================================== +--- a/src/gcc/config/alpha/alpha.md (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/alpha/alpha.md (.../branches/gcc-4_7-branch) +@@ -25,6 +25,7 @@ + ;; Uses of UNSPEC in this file: + + (define_c_enum "unspec" [ ++ UNSPEC_XFLT_COMPARE + UNSPEC_ARG_HOME + UNSPEC_LDGP1 + UNSPEC_INSXH +Index: gcc/config/alpha/alpha.c +=================================================================== +--- a/src/gcc/config/alpha/alpha.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/alpha/alpha.c (.../branches/gcc-4_7-branch) +@@ -2658,12 +2658,12 @@ + break; + + case GE: case GT: case GEU: case GTU: +- /* These must be swapped. */ +- if (op1 != CONST0_RTX (cmp_mode)) +- { +- code = swap_condition (code); +- tem = op0, op0 = op1, op1 = tem; +- } ++ /* These normally need swapping, but for integer zero we have ++ special patterns that recognize swapped operands. */ ++ if (cmp_mode == DImode && op1 == const0_rtx) ++ break; ++ code = swap_condition (code); ++ tem = op0, op0 = op1, op1 = tem; + break; + + default: +@@ -3025,12 +3025,9 @@ + operands[1] = op1; + out = gen_reg_rtx (DImode); + +- /* What's actually returned is -1,0,1, not a proper boolean value, +- so use an EXPR_LIST as with a generic libcall instead of a +- comparison type expression. */ +- note = gen_rtx_EXPR_LIST (VOIDmode, op1, NULL_RTX); +- note = gen_rtx_EXPR_LIST (VOIDmode, op0, note); +- note = gen_rtx_EXPR_LIST (VOIDmode, func, note); ++ /* What's actually returned is -1,0,1, not a proper boolean value. */ ++ note = gen_rtx_fmt_ee (cmp_code, VOIDmode, op0, op1); ++ note = gen_rtx_UNSPEC (DImode, gen_rtvec (1, note), UNSPEC_XFLT_COMPARE); + alpha_emit_xfloating_libcall (func, out, operands, 2, note); + + return out; Index: gcc/config/sparc/sparc.c =================================================================== --- a/src/gcc/config/sparc/sparc.c (.../tags/gcc_4_7_3_release) @@ -2338,6 +2712,22 @@ Index: gcc/config/i386/i386.md "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" "stosb" [(set_attr "type" "str") +@@ -17190,6 +17194,7 @@ + "(TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ()) + && peep2_reg_dead_p (4, operands[0]) + && !reg_overlap_mentioned_p (operands[0], operands[1]) ++ && !reg_overlap_mentioned_p (operands[0], operands[2]) + && (<MODE>mode != QImode + || immediate_operand (operands[2], QImode) + || q_regs_operand (operands[2], QImode)) +@@ -17254,6 +17259,7 @@ + || immediate_operand (operands[2], SImode) + || q_regs_operand (operands[2], SImode)) + && !reg_overlap_mentioned_p (operands[0], operands[1]) ++ && !reg_overlap_mentioned_p (operands[0], operands[2]) + && ix86_match_ccmode (peep2_next_insn (3), + (GET_CODE (operands[3]) == PLUS + || GET_CODE (operands[3]) == MINUS) Index: gcc/config/i386/sse.md =================================================================== --- a/src/gcc/config/i386/sse.md (.../tags/gcc_4_7_3_release) |