diff options
| author | doko <doko@6ca36cf4-e1d1-0310-8c6f-e303bb2178ca> | 2011-12-18 00:21:53 +0000 |
|---|---|---|
| committer | doko <doko@6ca36cf4-e1d1-0310-8c6f-e303bb2178ca> | 2011-12-18 00:21:53 +0000 |
| commit | c8fe5d134bd80456d4a7c30ea1a45e3a3967d144 (patch) | |
| tree | 920082a1c4771a92041023f84facbbcfc5e8c66f | |
| parent | 1ed753c7d69c8340eebc068b1d5b31d2554ce811 (diff) | |
| download | gcc-47-c8fe5d134bd80456d4a7c30ea1a45e3a3967d144.tar.gz | |
gcc-4.7 (4.7-20111217-1) experimental; urgency=low
* GCC-4.7 snapshot build.
- Including the GFDL documentation; will stay in experimental
until the 4.7.0 release sometime next year.
* Update patches for the trunk.
* Update symbols files.
* Build libitm packages.
-- Matthias Klose <doko@debian.org> Sat, 17 Dec 2011 23:19:46 +0100
git-svn-id: svn://svn.debian.org/svn/gcccvs/branches/sid/gcc-4.7@5759 6ca36cf4-e1d1-0310-8c6f-e303bb2178ca
131 files changed, 1737 insertions, 62135 deletions
diff --git a/debian/changelog b/debian/changelog index 6601fbf..2408a51 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,8 +1,29 @@ -gcc-4.6 (4.6.2-8) UNRELEASED; urgency=low +gcc-4.7 (4.7-20111217-1) experimental; urgency=low - * Update to SVN 20111215 (r182348) from the gcc-4_6-branch. + * GCC-4.7 snapshot build. + - Including the GFDL documentation; will stay in experimental + until the 4.7.0 release sometime next year. + * Update patches for the trunk. + * Update symbols files. + * Build libitm packages. + + -- Matthias Klose <doko@debian.org> Sat, 17 Dec 2011 23:19:46 +0100 + +gcc-4.6 (4.6.2-9) unstable; urgency=medium + + * Update to SVN 20111217 (r182430) from the gcc-4_6-branch. + - Fix PR c++/51331. + * Fix build dependencies for armel/armhf. + + -- Matthias Klose <doko@debian.org> Sat, 17 Dec 2011 10:40:26 +0100 + +gcc-4.6 (4.6.2-8) unstable; urgency=low + + * Update to SVN 20111216 (r182407) from the gcc-4_6-branch. - Fix PR tree-optimization/51485, PR tree-optimization/50569, PR c++/51248, - PR c++/51406, PR c++/51161, PR fortran/50923, PR fortran/51338. + PR c++/51406, PR c++/51161, PR rtl-optimization/49720, PR fortran/50923, + PR fortran/51338, PR fortran/51550, PR fortran/47545, PR fortran/49050, + PR fortran/51075. [ Matthias Klose ] * gdc-4.6: Provide <gnu-triplet>-{gdc,gdmd}-4.6 symlinks. @@ -22,7 +43,7 @@ gcc-4.6 (4.6.2-8) UNRELEASED; urgency=low with their 4.4 counterparts and priority optional packages may not conflict with one another, per Policy 2.5. - -- Matthias Klose <doko@debian.org> Thu, 15 Dec 2011 01:23:31 +0100 + -- Matthias Klose <doko@debian.org> Fri, 16 Dec 2011 16:59:30 +0100 gcc-4.6 (4.6.2-7) unstable; urgency=medium diff --git a/debian/control b/debian/control index b101848..efb7f50 100644 --- a/debian/control +++ b/debian/control @@ -1,4 +1,4 @@ -Source: gcc-4.6 +Source: gcc-4.7 Section: devel Priority: optional Maintainer: Debian GCC Maintainers <debian-gcc@lists.debian.org> @@ -7,10 +7,10 @@ Standards-Version: 3.9.2 Build-Depends: dpkg-dev (>= 1.16.0~ubuntu4), debhelper (>= 5.0.62), g++-multilib [amd64 i386 kfreebsd-amd64 mips mipsel powerpc ppc64 s390 s390x sparc], libc6.1-dev (>= 2.13-5) [alpha ia64] | libc0.3-dev (>= 2.13-5) [hurd-i386] | libc0.1-dev (>= 2.13-5) [kfreebsd-i386 kfreebsd-amd64] | libc6-dev (>= 2.13-5), libc6-dev-amd64 [i386], libc6-dev-sparc64 [sparc], libc6-dev-s390 [s390x], libc6-dev-s390x [s390], libc6-dev-i386 [amd64], libc6-dev-powerpc [ppc64], libc6-dev-ppc64 [powerpc], libc0.1-dev-i386 [kfreebsd-amd64], lib32gcc1 [amd64 ppc64 kfreebsd-amd64 s390x], lib64gcc1 [i386 powerpc sparc s390], libc6-dev-mips64 [mips mipsel], libc6-dev-mipsn32 [mips mipsel], m4, libtool, autoconf2.64, automake (>= 1:1.11), automake (<< 1:1.12), libunwind7-dev (>= 0.98.5-6) [ia64], libatomic-ops-dev [ia64], zlib1g-dev, gawk, lzma, xz-utils, patchutils, binutils (>= 2.21.1) | binutils-multiarch (>= 2.21.1), binutils-hppa64 (>= 2.21.1) [hppa], gperf (>= 3.0.1), bison (>= 1:2.3), flex, gettext, texinfo (>= 4.3), locales [!knetbsd-i386 !knetbsd-alpha], procps, sharutils, binutils-spu (>= 2.21.1) [powerpc ppc64], newlib-spu (>= 1.16.0) [powerpc ppc64], libcloog-ppl-dev (>= 0.15.9-2~), libmpc-dev, libmpfr-dev (>= 3.0.0-9~), libgmp-dev (>= 2:5.0.1~), libelfg0-dev (>= 0.8.12), dejagnu [!m68k !hurd-i386 !hurd-alpha], autogen, realpath (>= 1.9.12), chrpath, lsb-release, make (>= 3.81), quilt Build-Conflicts: binutils-gold Homepage: http://gcc.gnu.org/ -XS-Vcs-Browser: http://svn.debian.org/viewsvn/gcccvs/branches/sid/gcc-4.6/ -XS-Vcs-Svn: svn://svn.debian.org/svn/gcccvs/branches/sid/gcc-4.6 +XS-Vcs-Browser: http://svn.debian.org/viewsvn/gcccvs/branches/sid/gcc-4.7/ +XS-Vcs-Svn: svn://svn.debian.org/svn/gcccvs/branches/sid/gcc-4.7 -Package: gcc-4.6-base +Package: gcc-4.7-base Architecture: any Multi-Arch: same Section: libs @@ -26,7 +26,7 @@ Package: libgcc1 Architecture: any Section: libs Priority: required -Depends: gcc-4.6-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} Multi-Arch: same Pre-Depends: multiarch-support Breaks: ${multiarch:breaks} @@ -39,7 +39,7 @@ Package: libgcc1-dbg Architecture: any Section: debug Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), libgcc1 (= ${gcc:EpochVersion}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), libgcc1 (= ${gcc:EpochVersion}), ${misc:Depends} Multi-Arch: same Description: GCC support library (debug symbols) Debug symbols for the GCC support library. @@ -48,7 +48,7 @@ Package: libgcc2 Architecture: m68k Section: libs Priority: required -Depends: gcc-4.6-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} Multi-Arch: same Pre-Depends: multiarch-support Breaks: ${multiarch:breaks} @@ -61,7 +61,7 @@ Package: libgcc2-dbg Architecture: m68k Section: debug Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), libgcc2 (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), libgcc2 (= ${gcc:Version}), ${misc:Depends} Multi-Arch: same Description: GCC support library (debug symbols) Debug symbols for the GCC support library. @@ -73,7 +73,7 @@ Pre-Depends: multiarch-support Breaks: ${multiarch:breaks} Section: libs Priority: required -Depends: gcc-4.6-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} Description: GCC support library Shared version of the support library, a library of internal subroutines that GCC uses to overcome shortcomings of particular machines, or @@ -84,7 +84,7 @@ Architecture: hppa Multi-Arch: same Section: debug Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), libgcc4 (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), libgcc4 (= ${gcc:Version}), ${misc:Depends} Description: GCC support library (debug symbols) Debug symbols for the GCC support library. @@ -92,7 +92,7 @@ Package: lib64gcc1 Architecture: i386 powerpc sparc s390 mips mipsel Section: libs Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${dep:libcbiarch}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${misc:Depends} Conflicts: libgcc1 (<= 1:3.3-0pre9) Description: GCC support library (64bit) Shared version of the support library, a library of internal subroutines @@ -103,7 +103,7 @@ Package: lib64gcc1-dbg Architecture: i386 powerpc sparc s390 mips mipsel Section: debug Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), lib64gcc1 (= ${gcc:EpochVersion}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), lib64gcc1 (= ${gcc:EpochVersion}), ${misc:Depends} Description: GCC support library (debug symbols) Debug symbols for the GCC support library. @@ -111,7 +111,7 @@ Package: lib32gcc1 Architecture: amd64 ppc64 kfreebsd-amd64 s390x Section: libs Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), ${dep:libcbiarch}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${misc:Depends} Conflicts: ${confl:lib32} Description: GCC support library (32 bit Version) Shared version of the support library, a library of internal subroutines @@ -122,7 +122,7 @@ Package: lib32gcc1-dbg Architecture: amd64 ppc64 kfreebsd-amd64 s390x Section: debug Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), lib32gcc1 (= ${gcc:EpochVersion}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), lib32gcc1 (= ${gcc:EpochVersion}), ${misc:Depends} Description: GCC support library (debug symbols) Debug symbols for the GCC support library. @@ -130,7 +130,7 @@ Package: libn32gcc1 Architecture: mips mipsel Section: libs Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${dep:libcbiarch}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${misc:Depends} Conflicts: libgcc1 (<= 1:3.3-0pre9) Description: GCC support library (n32) Shared version of the support library, a library of internal subroutines @@ -141,26 +141,26 @@ Package: libn32gcc1-dbg Architecture: mips mipsel Section: debug Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), libn32gcc1 (= ${gcc:EpochVersion}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), libn32gcc1 (= ${gcc:EpochVersion}), ${misc:Depends} Description: GCC support library (debug symbols) Debug symbols for the GCC support library. -Package: gcc-4.6 +Package: gcc-4.7 Architecture: any Section: devel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), cpp-4.6 (= ${gcc:Version}), binutils (>= ${binutils:Version}), ${dep:libgcc}, ${dep:libssp}, ${dep:libgomp}, ${dep:libqmath}, ${dep:libunwinddev}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), cpp-4.7 (= ${gcc:Version}), binutils (>= ${binutils:Version}), ${dep:libgcc}, ${dep:libssp}, ${dep:libgomp}, ${dep:libitm}, ${dep:libqmath}, ${dep:libunwinddev}, ${shlibs:Depends}, ${misc:Depends} Recommends: ${dep:libcdev} -Suggests: ${gcc:multilib}, libmudflap0-4.6-dev (>= ${gcc:Version}), gcc-4.6-doc (>= ${gcc:SoftVersion}), gcc-4.6-locales (>= ${gcc:SoftVersion}), libgcc1-dbg, libgomp1-dbg, libquadmath0-dbg, libmudflap0-dbg, ${dep:libcloog}, ${dep:gold} +Suggests: ${gcc:multilib}, libmudflap0-4.7-dev (>= ${gcc:Version}), gcc-4.7-doc (>= ${gcc:SoftVersion}), gcc-4.7-locales (>= ${gcc:SoftVersion}), libgcc1-dbg, libgomp1-dbg, libitm1-dbg, libquadmath0-dbg, libmudflap0-dbg, ${dep:libcloog}, ${dep:gold} Provides: c-compiler Description: GNU C compiler This is the GNU C compiler, a fairly portable optimizing compiler for C. -Package: gcc-4.6-multilib +Package: gcc-4.7-multilib Architecture: amd64 i386 kfreebsd-amd64 mips mipsel powerpc ppc64 s390 s390x sparc Section: devel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), gcc-4.6 (= ${gcc:Version}), ${dep:libcbiarchdev}, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), ${dep:libcbiarchdev}, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} Suggests: ${dep:libmudflapbiarch} Description: GNU C compiler (multilib files) This is the GNU C compiler, a fairly portable optimizing compiler for C. @@ -168,59 +168,59 @@ Description: GNU C compiler (multilib files) On architectures with multilib support, the package contains files and dependencies for the non-default multilib architecture(s). -Package: gcc-4.6-plugin-dev +Package: gcc-4.7-plugin-dev Architecture: any Section: devel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), gcc-4.6 (= ${gcc:Version}), libgmp-dev (>= 2:5.0.1~), ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), libgmp-dev (>= 2:5.0.1~), ${shlibs:Depends}, ${misc:Depends} Description: Files for GNU GCC plugin development. This package contains (header) files for GNU GCC plugin development. It is only used for the development of GCC plugins, but not needed to run plugins. -Package: gcc-4.6-hppa64 +Package: gcc-4.7-hppa64 Architecture: hppa Section: devel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} Conflicts: gcc-3.3-hppa64 (<= 1:3.3.4-5), gcc-3.4-hppa64 (<= 3.4.1-3) Description: GNU C compiler (cross compiler for hppa64) This is the GNU C compiler, a fairly portable optimizing compiler for C. -Package: gcc-4.6-spu +Package: gcc-4.7-spu Architecture: powerpc ppc64 Section: devel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), binutils-spu (>= 2.18.1~cvs20080103-3), newlib-spu, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), binutils-spu (>= 2.18.1~cvs20080103-3), newlib-spu, ${shlibs:Depends}, ${misc:Depends} Provides: spu-gcc Description: SPU cross-compiler (preprocessor and C compiler) GNU Compiler Collection for the Cell Broadband Engine SPU (preprocessor and C compiler). -Package: g++-4.6-spu +Package: g++-4.7-spu Architecture: powerpc ppc64 Section: devel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), gcc-4.6-spu (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7-spu (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} Provides: spu-g++ Description: SPU cross-compiler (C++ compiler) GNU Compiler Collection for the Cell Broadband Engine SPU (C++ compiler). -Package: gfortran-4.6-spu +Package: gfortran-4.7-spu Architecture: powerpc ppc64 Section: devel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), gcc-4.6-spu (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7-spu (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} Provides: spu-gfortran Description: SPU cross-compiler (Fortran compiler) GNU Compiler Collection for the Cell Broadband Engine SPU (Fortran compiler). -Package: cpp-4.6 +Package: cpp-4.7 Architecture: any Section: interpreters Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} -Suggests: gcc-4.6-locales (>= ${gcc:SoftVersion}) +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Suggests: gcc-4.7-locales (>= ${gcc:SoftVersion}) Replaces: gcc-4.6 (<< 4.6.1-9) Description: GNU C preprocessor A macro processor that is used automatically by the GNU C compiler @@ -229,12 +229,20 @@ Description: GNU C preprocessor This package has been separated from gcc for the benefit of those who require the preprocessor but not the compiler. -Package: gcc-4.6-locales +Package: cpp-4.7-doc +Architecture: all +Section: doc +Priority: optional +Depends: gcc-4.7-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Description: Documentation for the GNU C preprocessor (cpp) + Documentation for the GNU C preprocessor in info format. + +Package: gcc-4.7-locales Architecture: all Section: devel Priority: optional -Depends: gcc-4.6-base (>= ${gcc:SoftVersion}), cpp-4.6 (>= ${gcc:SoftVersion}), ${misc:Depends} -Recommends: gcc-4.6 (>= ${gcc:SoftVersion}) +Depends: gcc-4.7-base (>= ${gcc:SoftVersion}), cpp-4.7 (>= ${gcc:SoftVersion}), ${misc:Depends} +Recommends: gcc-4.7 (>= ${gcc:SoftVersion}) Description: GCC, the GNU compiler collection (native language support files) Native language support for GCC. Lets GCC speak your language, if translations are available. @@ -242,21 +250,21 @@ Description: GCC, the GNU compiler collection (native language support files) Please do NOT submit bug reports in other languages than "C". Always reset your language settings to use the "C" locales. -Package: g++-4.6 +Package: g++-4.7 Architecture: any Section: devel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), gcc-4.6 (= ${gcc:Version}), libstdc++6-4.6-dev (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} Provides: c++-compiler, c++abi2-dev -Suggests: ${gxx:multilib}, gcc-4.6-doc (>= ${gcc:SoftVersion}), libstdc++6-4.6-dbg +Suggests: ${gxx:multilib}, gcc-4.7-doc (>= ${gcc:SoftVersion}), libstdc++6-4.7-dbg Description: GNU C++ compiler This is the GNU C++ compiler, a fairly portable optimizing compiler for C++. -Package: g++-4.6-multilib +Package: g++-4.7-multilib Architecture: amd64 i386 kfreebsd-amd64 mips mipsel powerpc ppc64 s390 s390x sparc Section: devel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), g++-4.6 (= ${gcc:Version}), gcc-4.6-multilib (= ${gcc:Version}), ${dep:libcxxbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), g++-4.7 (= ${gcc:Version}), gcc-4.7-multilib (= ${gcc:Version}), ${dep:libcxxbiarch}, ${shlibs:Depends}, ${misc:Depends} Suggests: ${dep:libcxxbiarchdbg} Description: GNU C++ compiler (multilib files) This is the GNU C++ compiler, a fairly portable optimizing compiler for C++. @@ -270,7 +278,7 @@ Multi-Arch: same Pre-Depends: multiarch-support Section: libs Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} Description: GCC mudflap shared support libraries The libmudflap libraries are used by GCC for instrumenting pointer and array dereferencing operations. @@ -280,7 +288,7 @@ Architecture: any Multi-Arch: same Section: debug Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), libmudflap0 (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), libmudflap0 (= ${gcc:Version}), ${misc:Depends} Description: GCC mudflap shared support libraries (debug symbols) The libmudflap libraries are used by GCC for instrumenting pointer and array dereferencing operations. @@ -289,7 +297,7 @@ Package: lib32mudflap0 Architecture: amd64 ppc64 kfreebsd-amd64 s390x Section: libs Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} Replaces: libmudflap0 (<< 4.1) Conflicts: ${confl:lib32} Description: GCC mudflap shared support libraries (32bit) @@ -300,7 +308,7 @@ Package: lib32mudflap0-dbg Architecture: amd64 ppc64 kfreebsd-amd64 s390x Section: debug Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), lib32mudflap0 (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), lib32mudflap0 (= ${gcc:Version}), ${misc:Depends} Description: GCC mudflap shared support libraries (32 bit debug symbols) The libmudflap libraries are used by GCC for instrumenting pointer and array dereferencing operations. @@ -309,7 +317,7 @@ Package: lib64mudflap0 Architecture: i386 powerpc sparc s390 mips mipsel Section: libs Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} Replaces: libmudflap0 (<< 4.1) Description: GCC mudflap shared support libraries (64bit) The libmudflap libraries are used by GCC for instrumenting pointer and array @@ -319,7 +327,7 @@ Package: lib64mudflap0-dbg Architecture: i386 powerpc sparc s390 mips mipsel Section: debug Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), lib64mudflap0 (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), lib64mudflap0 (= ${gcc:Version}), ${misc:Depends} Description: GCC mudflap shared support libraries (64 bit debug symbols) The libmudflap libraries are used by GCC for instrumenting pointer and array dereferencing operations. @@ -328,7 +336,7 @@ Package: libn32mudflap0 Architecture: mips mipsel Section: libs Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} Replaces: libmudflap0 (<< 4.1) Description: GCC mudflap shared support libraries (n32) The libmudflap libraries are used by GCC for instrumenting pointer and array @@ -338,16 +346,16 @@ Package: libn32mudflap0-dbg Architecture: mips mipsel Section: debug Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), libn32mudflap0 (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), libn32mudflap0 (= ${gcc:Version}), ${misc:Depends} Description: GCC mudflap shared support libraries (n32 debug symbols) The libmudflap libraries are used by GCC for instrumenting pointer and array dereferencing operations. -Package: libmudflap0-4.6-dev +Package: libmudflap0-4.7-dev Architecture: any Section: libdevel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), libmudflap0 (>= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), libmudflap0 (>= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} Suggests: ${sug:libmudflapdev} Conflicts: libmudflap0-dev Description: GCC mudflap support libraries (development files) @@ -362,7 +370,7 @@ Architecture: any Multi-Arch: same Pre-Depends: multiarch-support Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} Description: GCC OpenMP (GOMP) support library GOMP is an implementation of OpenMP for the C, C++, and Fortran 95 compilers in the GNU Compiler Collection. @@ -371,7 +379,7 @@ Package: libgomp1-dbg Architecture: any Section: debug Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), libgomp1 (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), libgomp1 (= ${gcc:Version}), ${misc:Depends} Multi-Arch: same Description: GCC OpenMP (GOMP) support library (debug symbols) GOMP is an implementation of OpenMP for the C, C++, and Fortran 95 compilers @@ -381,7 +389,7 @@ Package: lib32gomp1 Section: libs Architecture: amd64 ppc64 kfreebsd-amd64 s390x Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} Conflicts: ${confl:lib32} Description: GCC OpenMP (GOMP) support library (32bit) GOMP is an implementation of OpenMP for the C, C++, and Fortran 95 compilers @@ -391,7 +399,7 @@ Package: lib32gomp1-dbg Architecture: amd64 ppc64 kfreebsd-amd64 s390x Section: debug Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), lib32gomp1 (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), lib32gomp1 (= ${gcc:Version}), ${misc:Depends} Description: GCC OpenMP (GOMP) support library (32 bit debug symbols) GOMP is an implementation of OpenMP for the C, C++, and Fortran 95 compilers in the GNU Compiler Collection. @@ -400,7 +408,7 @@ Package: lib64gomp1 Section: libs Architecture: i386 powerpc sparc s390 mips mipsel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} Description: GCC OpenMP (GOMP) support library (64bit) GOMP is an implementation of OpenMP for the C, C++, and Fortran 95 compilers in the GNU Compiler Collection. @@ -409,7 +417,7 @@ Package: lib64gomp1-dbg Architecture: i386 powerpc sparc s390 mips mipsel Section: debug Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), lib64gomp1 (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), lib64gomp1 (= ${gcc:Version}), ${misc:Depends} Description: GCC OpenMP (GOMP) support library (64bit debug symbols) GOMP is an implementation of OpenMP for the C, C++, and Fortran 95 compilers in the GNU Compiler Collection. @@ -418,7 +426,7 @@ Package: libn32gomp1 Section: libs Architecture: mips mipsel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} Description: GCC OpenMP (GOMP) support library (n32) GOMP is an implementation of OpenMP for the C, C++, and Fortran 95 compilers in the GNU Compiler Collection. @@ -427,17 +435,101 @@ Package: libn32gomp1-dbg Architecture: mips mipsel Section: debug Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), libn32gomp1 (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), libn32gomp1 (= ${gcc:Version}), ${misc:Depends} Description: GCC OpenMP (GOMP) support library (n32 debug symbols) GOMP is an implementation of OpenMP for the C, C++, and Fortran 95 compilers +Package: libitm1 +Section: libs +Architecture: any +Multi-Arch: same +Pre-Depends: multiarch-support +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: GNU Transactional Memory Library + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + +Package: libitm1-dbg +Architecture: any +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libitm1 (= ${gcc:Version}), ${misc:Depends} +Multi-Arch: same +Description: GNU Transactional Memory Library (debug symbols) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + +Package: lib32itm1 +Section: libs +Architecture: amd64 ppc64 kfreebsd-amd64 s390x +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +Description: GNU Transactional Memory Library (32bit) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + +Package: lib32itm1-dbg +Architecture: amd64 ppc64 kfreebsd-amd64 s390x +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib32itm1 (= ${gcc:Version}), ${misc:Depends} +Description: GNU Transactional Memory Library (32 bit debug symbols) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + +Package: lib64itm1 +Section: libs +Architecture: i386 powerpc sparc s390 mips mipsel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Transactional Memory Library (64bit) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + +Package: lib64itm1-dbg +Architecture: i386 powerpc sparc s390 mips mipsel +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib64itm1 (= ${gcc:Version}), ${misc:Depends} +Description: GNU Transactional Memory Library (64bit debug symbols) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + +Package: libn32itm1 +Section: libs +Architecture: mips mipsel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Transactional Memory Library (n32) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + +Package: libn32itm1-dbg +Architecture: mips mipsel +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libn32itm1 (= ${gcc:Version}), ${misc:Depends} +Description: GNU Transactional Memory Library (n32 debug symbols) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + Package: libquadmath0 Section: libs Architecture: any Multi-Arch: same Pre-Depends: multiarch-support Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} Description: GCC Quad-Precision Math Library A library, which provides quad-precision mathematical functions on targets supporting the __float128 datatype. The library is used to provide on such @@ -447,7 +539,7 @@ Package: libquadmath0-dbg Architecture: any Section: debug Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), libquadmath0 (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), libquadmath0 (= ${gcc:Version}), ${misc:Depends} Multi-Arch: same Description: GCC Quad-Precision Math Library (debug symbols) A library, which provides quad-precision mathematical functions on targets @@ -457,7 +549,7 @@ Package: lib32quadmath0 Section: libs Architecture: amd64 ppc64 kfreebsd-amd64 s390x Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} Conflicts: ${confl:lib32} Description: GCC Quad-Precision Math Library (32bit) A library, which provides quad-precision mathematical functions on targets @@ -468,7 +560,7 @@ Package: lib32quadmath0-dbg Architecture: amd64 ppc64 kfreebsd-amd64 s390x Section: debug Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), lib32quadmath0 (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), lib32quadmath0 (= ${gcc:Version}), ${misc:Depends} Description: GCC Quad-Precision Math Library (32 bit debug symbols) A library, which provides quad-precision mathematical functions on targets supporting the __float128 datatype. @@ -477,7 +569,7 @@ Package: lib64quadmath0 Section: libs Architecture: i386 powerpc sparc s390 mips mipsel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} Description: GCC Quad-Precision Math Library (64bit) A library, which provides quad-precision mathematical functions on targets supporting the __float128 datatype. The library is used to provide on such @@ -487,7 +579,7 @@ Package: lib64quadmath0-dbg Architecture: i386 powerpc sparc s390 mips mipsel Section: debug Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), lib64quadmath0 (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), lib64quadmath0 (= ${gcc:Version}), ${misc:Depends} Description: GCC Quad-Precision Math Library (64bit debug symbols) A library, which provides quad-precision mathematical functions on targets supporting the __float128 datatype. @@ -496,7 +588,7 @@ Package: libn32quadmath0 Section: libs Architecture: mips mipsel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} Description: GCC Quad-Precision Math Library (n32) A library, which provides quad-precision mathematical functions on targets supporting the __float128 datatype. The library is used to provide on such @@ -506,27 +598,27 @@ Package: libn32quadmath0-dbg Architecture: mips mipsel Section: debug Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), libn32quadmath0 (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), libn32quadmath0 (= ${gcc:Version}), ${misc:Depends} Description: GCC Quad-Precision Math Library (n32 debug symbols) A library, which provides quad-precision mathematical functions on targets supporting the __float128 datatype. -Package: gobjc++-4.6 +Package: gobjc++-4.7 Architecture: any Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), gobjc-4.6 (= ${gcc:Version}), g++-4.6 (= ${gcc:Version}), ${shlibs:Depends}, libobjc3 (>= ${gcc:Version}), ${misc:Depends} -Suggests: ${gobjcxx:multilib}, gcc-4.6-doc (>= ${gcc:SoftVersion}) +Depends: gcc-4.7-base (= ${gcc:Version}), gobjc-4.7 (= ${gcc:Version}), g++-4.7 (= ${gcc:Version}), ${shlibs:Depends}, libobjc4 (>= ${gcc:Version}), ${misc:Depends} +Suggests: ${gobjcxx:multilib}, gcc-4.7-doc (>= ${gcc:SoftVersion}) Provides: objc++-compiler Description: GNU Objective-C++ compiler This is the GNU Objective-C++ compiler, which compiles Objective-C++ on platforms supported by the gcc compiler. It uses the gcc backend to generate optimized code. -Package: gobjc++-4.6-multilib +Package: gobjc++-4.7-multilib Architecture: amd64 i386 kfreebsd-amd64 mips mipsel powerpc ppc64 s390 s390x sparc Section: devel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), gobjc++-4.6 (= ${gcc:Version}), g++-4.6-multilib (= ${gcc:Version}), gobjc-4.6-multilib (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), gobjc++-4.7 (= ${gcc:Version}), g++-4.7-multilib (= ${gcc:Version}), gobjc-4.7-multilib (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} Description: GNU Objective-C++ compiler (multilib files) This is the GNU Objective-C++ compiler, which compiles Objective-C++ on platforms supported by the gcc compiler. @@ -534,22 +626,22 @@ Description: GNU Objective-C++ compiler (multilib files) On architectures with multilib support, the package contains files and dependencies for the non-default multilib architecture(s). -Package: gobjc-4.6 +Package: gobjc-4.7 Architecture: any Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), gcc-4.6 (= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, libobjc3 (>= ${gcc:Version}), ${misc:Depends} -Suggests: ${gobjc:multilib}, gcc-4.6-doc (>= ${gcc:SoftVersion}), libobjc3-dbg +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, libobjc4 (>= ${gcc:Version}), ${misc:Depends} +Suggests: ${gobjc:multilib}, gcc-4.7-doc (>= ${gcc:SoftVersion}), libobjc4-dbg Provides: objc-compiler Description: GNU Objective-C compiler This is the GNU Objective-C compiler, which compiles Objective-C on platforms supported by the gcc compiler. It uses the gcc backend to generate optimized code. -Package: gobjc-4.6-multilib +Package: gobjc-4.7-multilib Architecture: amd64 i386 kfreebsd-amd64 mips mipsel powerpc ppc64 s390 s390x sparc Section: devel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), gobjc-4.6 (= ${gcc:Version}), gcc-4.6-multilib (= ${gcc:Version}), ${dep:libobjcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), gobjc-4.7 (= ${gcc:Version}), gcc-4.7-multilib (= ${gcc:Version}), ${dep:libobjcbiarch}, ${shlibs:Depends}, ${misc:Depends} Description: GNU Objective-C compiler (multilib files) This is the GNU Objective-C compiler, which compiles Objective-C on platforms supported by the gcc compiler. @@ -557,91 +649,91 @@ Description: GNU Objective-C compiler (multilib files) On architectures with multilib support, the package contains files and dependencies for the non-default multilib architecture(s). -Package: libobjc3 +Package: libobjc4 Section: libs Architecture: any Multi-Arch: same Pre-Depends: multiarch-support Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} Description: Runtime library for GNU Objective-C applications Library needed for GNU ObjC applications linked against the shared library. -Package: libobjc3-dbg +Package: libobjc4-dbg Section: debug Architecture: any Multi-Arch: same Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), libobjc3 (= ${gcc:Version}), libgcc1-dbg, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), libobjc4 (= ${gcc:Version}), libgcc1-dbg, ${misc:Depends} Description: Runtime library for GNU Objective-C applications (debug symbols) Library needed for GNU ObjC applications linked against the shared library. -Package: lib64objc3 +Package: lib64objc4 Section: libs Architecture: i386 powerpc sparc s390 mips mipsel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} Description: Runtime library for GNU Objective-C applications (64bit) Library needed for GNU ObjC applications linked against the shared library. -Package: lib64objc3-dbg +Package: lib64objc4-dbg Section: debug Architecture: i386 powerpc sparc s390 mips mipsel Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), lib64objc3 (= ${gcc:Version}), lib64gcc1-dbg, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), lib64objc4 (= ${gcc:Version}), lib64gcc1-dbg, ${misc:Depends} Description: Runtime library for GNU Objective-C applications (64 bit debug symbols) Library needed for GNU ObjC applications linked against the shared library. -Package: lib32objc3 +Package: lib32objc4 Section: libs Architecture: amd64 ppc64 kfreebsd-amd64 s390x Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} Conflicts: ${confl:lib32} Description: Runtime library for GNU Objective-C applications (32bit) Library needed for GNU ObjC applications linked against the shared library. -Package: lib32objc3-dbg +Package: lib32objc4-dbg Section: debug Architecture: amd64 ppc64 kfreebsd-amd64 s390x Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), lib32objc3 (= ${gcc:Version}), lib32gcc1-dbg, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), lib32objc4 (= ${gcc:Version}), lib32gcc1-dbg, ${misc:Depends} Description: Runtime library for GNU Objective-C applications (32 bit debug symbols) Library needed for GNU ObjC applications linked against the shared library. -Package: libn32objc3 +Package: libn32objc4 Section: libs Architecture: mips mipsel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} Description: Runtime library for GNU Objective-C applications (n32) Library needed for GNU ObjC applications linked against the shared library. -Package: libn32objc3-dbg +Package: libn32objc4-dbg Section: debug Architecture: mips mipsel Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), libn32objc3 (= ${gcc:Version}), libn32gcc1-dbg, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), libn32objc4 (= ${gcc:Version}), libn32gcc1-dbg, ${misc:Depends} Description: Runtime library for GNU Objective-C applications (n32 debug symbols) Library needed for GNU ObjC applications linked against the shared library. -Package: gfortran-4.6 +Package: gfortran-4.7 Architecture: any Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), gcc-4.6 (= ${gcc:Version}), libgfortran3 (>= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), libgfortran3 (>= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} Provides: fortran95-compiler -Suggests: ${gfortran:multilib}, gfortran-4.6-doc, libgfortran3-dbg +Suggests: ${gfortran:multilib}, gfortran-4.7-doc, libgfortran3-dbg Replaces: libgfortran3-dev Description: GNU Fortran 95 compiler This is the GNU Fortran compiler, which compiles Fortran 95 on platforms supported by the gcc compiler. It uses the gcc backend to generate optimized code. -Package: gfortran-4.6-multilib +Package: gfortran-4.7-multilib Architecture: amd64 i386 kfreebsd-amd64 mips mipsel powerpc ppc64 s390 s390x sparc Section: devel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), gfortran-4.6 (= ${gcc:Version}), gcc-4.6-multilib (= ${gcc:Version}), ${dep:libgfortranbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), gfortran-4.7 (= ${gcc:Version}), gcc-4.7-multilib (= ${gcc:Version}), ${dep:libgfortranbiarch}, ${shlibs:Depends}, ${misc:Depends} Description: GNU Fortran 95 compiler (multilib files) This is the GNU Fortran compiler, which compiles Fortran 95 on platforms supported by the gcc compiler. @@ -649,13 +741,21 @@ Description: GNU Fortran 95 compiler (multilib files) On architectures with multilib support, the package contains files and dependencies for the non-default multilib architecture(s). +Package: gfortran-4.7-doc +Architecture: all +Section: doc +Priority: optional +Depends: gcc-4.7-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Description: Documentation for the GNU Fortran compiler (gfortran) + Documentation for the GNU Fortran 95 compiler in info format. + Package: libgfortran3 Section: libs Architecture: any Multi-Arch: same Pre-Depends: multiarch-support Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} Description: Runtime library for GNU Fortran applications Library needed for GNU Fortran applications linked against the shared library. @@ -665,7 +765,7 @@ Section: debug Architecture: any Multi-Arch: same Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), libgfortran3 (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), libgfortran3 (= ${gcc:Version}), ${misc:Depends} Description: Runtime library for GNU Fortran applications (debug symbols) Library needed for GNU Fortran applications linked against the shared library. @@ -674,7 +774,7 @@ Package: lib64gfortran3 Section: libs Architecture: i386 powerpc sparc s390 mips mipsel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} Description: Runtime library for GNU Fortran applications (64bit) Library needed for GNU Fortran applications linked against the shared library. @@ -683,7 +783,7 @@ Package: lib64gfortran3-dbg Section: debug Architecture: i386 powerpc sparc s390 mips mipsel Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), lib64gfortran3 (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), lib64gfortran3 (= ${gcc:Version}), ${misc:Depends} Description: Runtime library for GNU Fortran applications (64bit debug symbols) Library needed for GNU Fortran applications linked against the shared library. @@ -692,7 +792,7 @@ Package: lib32gfortran3 Section: libs Architecture: amd64 ppc64 kfreebsd-amd64 s390x Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} Conflicts: ${confl:lib32} Description: Runtime library for GNU Fortran applications (32bit) Library needed for GNU Fortran applications linked against the @@ -702,7 +802,7 @@ Package: lib32gfortran3-dbg Section: debug Architecture: amd64 ppc64 kfreebsd-amd64 s390x Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), lib32gfortran3 (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), lib32gfortran3 (= ${gcc:Version}), ${misc:Depends} Description: Runtime library for GNU Fortran applications (32 bit debug symbols) Library needed for GNU Fortran applications linked against the shared library. @@ -711,7 +811,7 @@ Package: libn32gfortran3 Section: libs Architecture: mips mipsel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} Description: Runtime library for GNU Fortran applications (n32) Library needed for GNU Fortran applications linked against the shared library. @@ -720,26 +820,26 @@ Package: libn32gfortran3-dbg Section: debug Architecture: mips mipsel Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), libn32gfortran3 (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), libn32gfortran3 (= ${gcc:Version}), ${misc:Depends} Description: Runtime library for GNU Fortran applications (n32 debug symbols) Library needed for GNU Fortran applications linked against the shared library. -Package: gccgo-4.6 +Package: gccgo-4.7 Architecture: any Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), gcc-4.6 (= ${gcc:Version}), libgo0 (>= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), libgo0 (>= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} Provides: go-compiler -Suggests: ${go:multilib}, gccgo-4.6-doc, libgo0-dbg +Suggests: ${go:multilib}, gccgo-4.7-doc, libgo0-dbg Description: GNU Go compiler This is the GNU Go compiler, which compiles Go on platforms supported by the gcc compiler. It uses the gcc backend to generate optimized code. -Package: gccgo-4.6-multilib +Package: gccgo-4.7-multilib Architecture: amd64 i386 kfreebsd-amd64 mips mipsel powerpc ppc64 s390 s390x sparc Section: devel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), gccgo-4.6 (= ${gcc:Version}), gcc-4.6-multilib (= ${gcc:Version}), ${dep:libgobiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), gccgo-4.7 (= ${gcc:Version}), gcc-4.7-multilib (= ${gcc:Version}), ${dep:libgobiarch}, ${shlibs:Depends}, ${misc:Depends} Suggests: ${dep:libgobiarchdbg} Description: GNU Go compiler (multilib files) This is the GNU Go compiler, which compiles Go on platforms supported @@ -748,13 +848,21 @@ Description: GNU Go compiler (multilib files) On architectures with multilib support, the package contains files and dependencies for the non-default multilib architecture(s). +Package: gccgo-4.7-doc +Architecture: all +Section: doc +Priority: optional +Depends: gcc-4.7-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Description: Documentation for the GNU Go compiler (gccgo) + Documentation for the GNU Go compiler in info format. + Package: libgo0 Section: libs Architecture: any Multi-Arch: same Pre-Depends: multiarch-support Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} Description: Runtime library for GNU Go applications Library needed for GNU Go applications linked against the shared library. @@ -764,7 +872,7 @@ Section: debug Architecture: any Multi-Arch: same Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), libgo0 (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), libgo0 (= ${gcc:Version}), ${misc:Depends} Description: Runtime library for GNU Go applications (debug symbols) Library needed for GNU Go applications linked against the shared library. @@ -773,7 +881,7 @@ Package: lib64go0 Section: libs Architecture: i386 powerpc sparc s390 mips mipsel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} Description: Runtime library for GNU Go applications (64bit) Library needed for GNU Go applications linked against the shared library. @@ -782,7 +890,7 @@ Package: lib64go0-dbg Section: debug Architecture: i386 powerpc sparc s390 mips mipsel Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), lib64go0 (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), lib64go0 (= ${gcc:Version}), ${misc:Depends} Description: Runtime library for GNU Go applications (64bit debug symbols) Library needed for GNU Go applications linked against the shared library. @@ -791,7 +899,7 @@ Package: lib32go0 Section: libs Architecture: amd64 ppc64 kfreebsd-amd64 s390x Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} Conflicts: ${confl:lib32} Description: Runtime library for GNU Go applications (32bit) Library needed for GNU Go applications linked against the @@ -801,7 +909,7 @@ Package: lib32go0-dbg Section: debug Architecture: amd64 ppc64 kfreebsd-amd64 s390x Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), lib32go0 (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), lib32go0 (= ${gcc:Version}), ${misc:Depends} Description: Runtime library for GNU Go applications (32 bit debug symbols) Library needed for GNU Go applications linked against the shared library. @@ -810,7 +918,7 @@ Package: libn32go0 Section: libs Architecture: mips mipsel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} Description: Runtime library for GNU Go applications (n32) Library needed for GNU Go applications linked against the shared library. @@ -819,7 +927,7 @@ Package: libn32go0-dbg Section: debug Architecture: mips mipsel Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), libn32go0 (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), libn32go0 (= ${gcc:Version}), ${misc:Depends} Description: Runtime library for GNU Go applications (n32 debug symbols) Library needed for GNU Go applications linked against the shared library. @@ -828,7 +936,7 @@ Package: libstdc++6 Architecture: any Section: libs Priority: required -Depends: gcc-4.6-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} Multi-Arch: same Pre-Depends: multiarch-support Conflicts: scim (<< 1.4.2-1) @@ -844,7 +952,7 @@ Package: lib32stdc++6 Architecture: amd64 ppc64 kfreebsd-amd64 s390x Section: libs Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), lib32gcc1, ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), lib32gcc1, ${shlibs:Depends}, ${misc:Depends} Conflicts: ${confl:lib32} Description: GNU Standard C++ Library v3 (32 bit Version) This package contains an additional runtime library for C++ programs @@ -854,7 +962,7 @@ Package: lib64stdc++6 Architecture: i386 powerpc sparc s390 mips mipsel Section: libs Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${shlibs:Depends}, lib64gcc1, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, lib64gcc1, ${misc:Depends} Description: GNU Standard C++ Library v3 (64bit) This package contains an additional runtime library for C++ programs built with the GNU compiler. @@ -867,7 +975,7 @@ Package: libn32stdc++6 Architecture: mips mipsel Section: libs Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), ${shlibs:Depends}, libn32gcc1, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, libn32gcc1, ${misc:Depends} Description: GNU Standard C++ Library v3 (n32) This package contains an additional runtime library for C++ programs built with the GNU compiler. @@ -876,13 +984,13 @@ Description: GNU Standard C++ Library v3 (n32) was included up to g++-2.95. The first version of libstdc++-v3 appeared in g++-3.0. -Package: libstdc++6-4.6-dev +Package: libstdc++6-4.7-dev Architecture: any Section: libdevel Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), g++-4.6 (= ${gcc:Version}), libstdc++6 (>= ${gcc:Version}), ${dep:libcdev}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), g++-4.7 (= ${gcc:Version}), libstdc++6 (>= ${gcc:Version}), ${dep:libcdev}, ${misc:Depends} Conflicts: libg++27-dev, libg++272-dev (<< 2.7.2.8-1), libstdc++2.8-dev, libg++2.8-dev, libstdc++2.9-dev, libstdc++2.9-glibc2.1-dev, libstdc++2.10-dev (<< 1:2.95.3-2), libstdc++3.0-dev -Suggests: libstdc++6-4.6-doc +Suggests: libstdc++6-4.7-doc Provides: libstdc++-dev Description: GNU Standard C++ Library v3 (development files) This package contains the headers and static library files necessary for @@ -892,64 +1000,64 @@ Description: GNU Standard C++ Library v3 (development files) was included up to g++-2.95. The first version of libstdc++-v3 appeared in g++-3.0. -Package: libstdc++6-4.6-pic +Package: libstdc++6-4.7-pic Architecture: any Section: libdevel Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), libstdc++6 (>= ${gcc:Version}), libstdc++6-4.6-dev (= ${gcc:Version}), ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), libstdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), ${misc:Depends} Description: GNU Standard C++ Library v3 (shared library subset kit) This is used to develop subsets of the libstdc++ shared libraries for use on custom installation floppies and in embedded systems. . Unless you are making one of those, you will not need this package. -Package: libstdc++6-4.6-dbg +Package: libstdc++6-4.7-dbg Architecture: any Section: debug Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), libstdc++6 (>= ${gcc:Version}), libgcc1-dbg, ${shlibs:Depends}, ${misc:Depends} -Recommends: libstdc++6-4.6-dev (= ${gcc:Version}) -Conflicts: libstdc++5-dbg, libstdc++5-3.3-dbg, libstdc++6-dbg, libstdc++6-4.0-dbg, libstdc++6-4.1-dbg, libstdc++6-4.2-dbg, libstdc++6-4.3-dbg, libstdc++6-4.4-dbg, libstdc++6-4.5-dbg +Depends: gcc-4.7-base (= ${gcc:Version}), libstdc++6 (>= ${gcc:Version}), libgcc1-dbg, ${shlibs:Depends}, ${misc:Depends} +Recommends: libstdc++6-4.7-dev (= ${gcc:Version}) +Conflicts: libstdc++5-dbg, libstdc++5-3.3-dbg, libstdc++6-dbg, libstdc++6-4.0-dbg, libstdc++6-4.1-dbg, libstdc++6-4.2-dbg, libstdc++6-4.3-dbg, libstdc++6-4.4-dbg, libstdc++6-4.5-dbg, libstdc++6-4.6-dbg Description: GNU Standard C++ Library v3 (debugging files) This package contains the shared library of libstdc++ compiled with debugging symbols. -Package: lib32stdc++6-4.6-dbg +Package: lib32stdc++6-4.7-dbg Architecture: amd64 ppc64 kfreebsd-amd64 s390x Section: debug Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), lib32stdc++6 (>= ${gcc:Version}), libstdc++6-4.6-dev (= ${gcc:Version}), lib32gcc1-dbg, ${shlibs:Depends}, ${misc:Depends} -Conflicts: lib32stdc++6-dbg, lib32stdc++6-4.0-dbg, lib32stdc++6-4.1-dbg, lib32stdc++6-4.2-dbg, lib32stdc++6-4.3-dbg, lib32stdc++6-4.4-dbg, lib32stdc++6-4.5-dbg +Depends: gcc-4.7-base (= ${gcc:Version}), lib32stdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), lib32gcc1-dbg, ${shlibs:Depends}, ${misc:Depends} +Conflicts: lib32stdc++6-dbg, lib32stdc++6-4.0-dbg, lib32stdc++6-4.1-dbg, lib32stdc++6-4.2-dbg, lib32stdc++6-4.3-dbg, lib32stdc++6-4.4-dbg, lib32stdc++6-4.5-dbg, lib32stdc++6-4.6-dbg Description: GNU Standard C++ Library v3 (debugging files) This package contains the shared library of libstdc++ compiled with debugging symbols. -Package: lib64stdc++6-4.6-dbg +Package: lib64stdc++6-4.7-dbg Architecture: i386 powerpc sparc s390 mips mipsel Section: debug Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), lib64stdc++6 (>= ${gcc:Version}), libstdc++6-4.6-dev (= ${gcc:Version}), lib64gcc1-dbg, ${shlibs:Depends}, ${misc:Depends} -Conflicts: lib64stdc++6-dbg, lib64stdc++6-4.0-dbg, lib64stdc++6-4.1-dbg, lib64stdc++6-4.2-dbg, lib64stdc++6-4.3-dbg, lib64stdc++6-4.4-dbg, lib64stdc++6-4.5-dbg +Depends: gcc-4.7-base (= ${gcc:Version}), lib64stdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), lib64gcc1-dbg, ${shlibs:Depends}, ${misc:Depends} +Conflicts: lib64stdc++6-dbg, lib64stdc++6-4.0-dbg, lib64stdc++6-4.1-dbg, lib64stdc++6-4.2-dbg, lib64stdc++6-4.3-dbg, lib64stdc++6-4.4-dbg, lib64stdc++6-4.5-dbg, lib64stdc++6-4.6-dbg Description: GNU Standard C++ Library v3 (debugging files) This package contains the shared library of libstdc++ compiled with debugging symbols. -Package: libn32stdc++6-4.6-dbg +Package: libn32stdc++6-4.7-dbg Architecture: mips mipsel Section: debug Priority: extra -Depends: gcc-4.6-base (= ${gcc:Version}), libn32stdc++6 (>= ${gcc:Version}), libstdc++6-4.6-dev (= ${gcc:Version}), libn32gcc1-dbg, ${shlibs:Depends}, ${misc:Depends} -Conflicts: libn32stdc++6-dbg, libn32stdc++6-4.0-dbg, libn32stdc++6-4.1-dbg, libn32stdc++6-4.2-dbg, libn32stdc++6-4.3-dbg, libn32stdc++6-4.4-dbg, libn32stdc++6-4.5-dbg +Depends: gcc-4.7-base (= ${gcc:Version}), libn32stdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), libn32gcc1-dbg, ${shlibs:Depends}, ${misc:Depends} +Conflicts: libn32stdc++6-dbg, libn32stdc++6-4.0-dbg, libn32stdc++6-4.1-dbg, libn32stdc++6-4.2-dbg, libn32stdc++6-4.3-dbg, libn32stdc++6-4.4-dbg, libn32stdc++6-4.5-dbg, libn32stdc++6-4.6-dbg Description: GNU Standard C++ Library v3 (debugging files) This package contains the shared library of libstdc++ compiled with debugging symbols. -Package: libstdc++6-4.6-doc +Package: libstdc++6-4.7-doc Architecture: all Section: doc Priority: optional -Depends: gcc-4.6-base (>= ${gcc:SoftVersion}), ${misc:Depends} -Conflicts: libstdc++5-doc, libstdc++5-3.3-doc, libstdc++6-doc, libstdc++6-4.0-doc, libstdc++6-4.1-doc, libstdc++6-4.2-doc, libstdc++6-4.3-doc, libstdc++6-4.4-doc, libstdc++6-4.5-doc +Depends: gcc-4.7-base (>= ${gcc:SoftVersion}), ${misc:Depends} +Conflicts: libstdc++5-doc, libstdc++5-3.3-doc, libstdc++6-doc, libstdc++6-4.0-doc, libstdc++6-4.1-doc, libstdc++6-4.2-doc, libstdc++6-4.3-doc, libstdc++6-4.4-doc, libstdc++6-4.5-doc, libstdc++6-4.6-doc Description: GNU Standard C++ Library v3 (documentation files) This package contains documentation files for the GNU stdc++ library. . @@ -958,11 +1066,11 @@ Description: GNU Standard C++ Library v3 (documentation files) alphabetical list, compound list, file list, namespace members, compound members and file members. -Package: gcc-4.6-soft-float +Package: gcc-4.7-soft-float Architecture: arm armel armhf Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), gcc-4.6 (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} -Conflicts: gcc-4.4-soft-float, gcc-4.5-soft-float +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Conflicts: gcc-4.4-soft-float, gcc-4.5-soft-float, gcc-4.6-soft-float Description: GCC soft-floating-point gcc libraries (ARM) These are versions of basic static libraries such as libgcc.a compiled with the -msoft-float option, for CPUs without a floating-point unit. @@ -970,7 +1078,7 @@ Description: GCC soft-floating-point gcc libraries (ARM) Package: fixincludes Architecture: any Priority: optional -Depends: gcc-4.6-base (= ${gcc:Version}), gcc-4.6 (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} Description: Fix non-ANSI header files FixIncludes was created to fix non-ANSI system header files. Many system manufacturers supply proprietary headers that are not ANSI compliant. @@ -981,7 +1089,17 @@ Description: Fix non-ANSI header files package is built, so we make fixincludes available at build time of other packages, such that checking tools like lintian can make use of it. -Package: gcc-4.6-source +Package: gcc-4.7-doc +Architecture: all +Section: doc +Priority: optional +Depends: gcc-4.7-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Conflicts: gcc-docs (<< 2.95.2) +Replaces: gcc (<=2.7.2.3-4.3), gcc-docs (<< 2.95.2) +Description: Documentation for the GNU compilers (gcc, gobjc, g++) + Documentation for the GNU compilers in info format. + +Package: gcc-4.7-source Architecture: all Priority: optional Depends: make (>= 3.81), autoconf2.64, automake, quilt, patchutils, gawk, ${misc:Depends} diff --git a/debian/control.m4 b/debian/control.m4 index f6900f8..3f03976 100644 --- a/debian/control.m4 +++ b/debian/control.m4 @@ -483,9 +483,9 @@ Package: gcc`'PV`'TS Architecture: any Section: devel Priority: ifdef(`TARGET',`extra',`PRI(optional)') -Depends: BASEDEP, cpp`'PV`'TS (= ${gcc:Version}), binutils`'TS (>= ${binutils:Version}), ${dep:libgcc}, ${dep:libssp}, ${dep:libgomp}, ${dep:libqmath}, ${dep:libunwinddev}, ${shlibs:Depends}, ${misc:Depends} +Depends: BASEDEP, cpp`'PV`'TS (= ${gcc:Version}), binutils`'TS (>= ${binutils:Version}), ${dep:libgcc}, ${dep:libssp}, ${dep:libgomp}, ${dep:libitm}, ${dep:libqmath}, ${dep:libunwinddev}, ${shlibs:Depends}, ${misc:Depends} Recommends: ${dep:libcdev} -Suggests: ${gcc:multilib}, libmudflap`'MF_SO`'PV-dev`'LS (>= ${gcc:Version}), gcc`'PV-doc (>= ${gcc:SoftVersion}), gcc`'PV-locales (>= ${gcc:SoftVersion}), libgcc`'GCC_SO-dbg`'LS, libgomp`'GOMP_SO-dbg`'LS, libquadmath`'QMATH_SO-dbg`'LS, libmudflap`'MF_SO-dbg`'LS, ${dep:libcloog}, ${dep:gold} +Suggests: ${gcc:multilib}, libmudflap`'MF_SO`'PV-dev`'LS (>= ${gcc:Version}), gcc`'PV-doc (>= ${gcc:SoftVersion}), gcc`'PV-locales (>= ${gcc:SoftVersion}), libgcc`'GCC_SO-dbg`'LS, libgomp`'GOMP_SO-dbg`'LS, libitm`'ITM_SO-dbg`'LS, libquadmath`'QMATH_SO-dbg`'LS, libmudflap`'MF_SO-dbg`'LS, ${dep:libcloog}, ${dep:gold} Provides: c-compiler`'TS Description: GNU C compiler`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') This is the GNU C compiler, a fairly portable optimizing compiler for C. @@ -499,7 +499,7 @@ Package: gcc`'PV-multilib`'TS Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) Section: devel Priority: ifdef(`TARGET',`extra',`PRI(optional)') -Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), ${dep:libcbiarchdev}, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), ${dep:libcbiarchdev}, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} Suggests: ${dep:libmudflapbiarch} Description: GNU C compiler (multilib files)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') This is the GNU C compiler, a fairly portable optimizing compiler for C. @@ -963,7 +963,7 @@ Architecture: ifdef(`TARGET',`all',`biarchsf_archs') Section: debug Priority: extra Depends: BASEDEP, libsfgomp`'GOMP_SO`'LS (= ${gcc:Version}), ${misc:Depends} -Description: GCC OpenMP (GOMP) support library (hard float ABI debug symbols) +Description: GCC OpenMP (GOMP) support library (soft float ABI debug symbols) GOMP is an implementation of OpenMP for the C, C++, and Fortran 95 compilers ')`'dnl libsfgomp @@ -982,6 +982,153 @@ Description: GCC OpenMP (GOMP) support library [neon optimized] ')`'dnl libneongomp ')`'dnl libgomp +ifenabled(`libitm',` +Package: libitm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`any') +ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +'))`'dnl +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Transactional Memory Library + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + +Package: libitm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`any') +Section: debug +Priority: extra +Depends: BASEDEP, libitm`'ITM_SO`'LS (= ${gcc:Version}), ${misc:Depends} +ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +'))`'dnl +Description: GNU Transactional Memory Library (debug symbols) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + +Package: lib32itm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +Description: GNU Transactional Memory Library (32bit) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + +Package: lib32itm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarch32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, lib32itm`'ITM_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GNU Transactional Memory Library (32 bit debug symbols) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + +Package: lib64itm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Transactional Memory Library (64bit) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + +Package: lib64itm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarch64_archs') +Section: debug +Priority: extra +Depends: BASEDEP, lib64itm`'ITM_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GNU Transactional Memory Library (64bit debug symbols) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + +Package: libn32itm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchn32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Transactional Memory Library (n32) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + +Package: libn32itm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchn32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libn32itm`'ITM_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GNU Transactional Memory Library (n32 debug symbols) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + +ifenabled(`libhfitm',` +Package: libhfitm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchhf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Transactional Memory Library (hard float ABI) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + +Package: libhfitm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchhf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libhfitm`'ITM_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GNU Transactional Memory Library (hard float ABI debug symbols) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. +')`'dnl libhfitm + +ifenabled(`libsfitm',` +Package: libsfitm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`all',`biarchsf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Transactional Memory Library (soft float ABI) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + +Package: libsfitm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`all',`biarchsf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libsfitm`'ITM_SO`'LS (= ${gcc:Version}), ${misc:Depends} +Description: GNU Transactional Memory Library (soft float ABI debug symbols) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. +')`'dnl libsfitm + +ifenabled(`libneonitm',` +Package: libitm`'ITM_SO-neon`'LS +Architecture: NEON_ARCHS +Section: libs +Priority: extra +Depends: BASEDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Transactional Memory Library [neon optimized] + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl libneonitm +')`'dnl libitm + ifenabled(`libqmath',` Package: libquadmath`'QMATH_SO`'LS Section: ifdef(`TARGET',`devel',`libs') @@ -2001,7 +2148,7 @@ Depends: BASEDEP, libstdc++CXX_SO`'LS (>= ${gcc:Version}), libgcc`'GCC_SO-dbg`'L ifdef(`TARGET',`Provides: libstdc++CXX_SO-dbg-TARGET-dcv1 ',`')`'dnl Recommends: libstdc++CXX_SO`'PV-dev`'LS (= ${gcc:Version}) -Conflicts: libstdc++5-dbg`'LS, libstdc++5-3.3-dbg`'LS, libstdc++6-dbg`'LS, libstdc++6-4.0-dbg`'LS, libstdc++6-4.1-dbg`'LS, libstdc++6-4.2-dbg`'LS, libstdc++6-4.3-dbg`'LS, libstdc++6-4.4-dbg`'LS, libstdc++6-4.5-dbg`'LS +Conflicts: libstdc++5-dbg`'LS, libstdc++5-3.3-dbg`'LS, libstdc++6-dbg`'LS, libstdc++6-4.0-dbg`'LS, libstdc++6-4.1-dbg`'LS, libstdc++6-4.2-dbg`'LS, libstdc++6-4.3-dbg`'LS, libstdc++6-4.4-dbg`'LS, libstdc++6-4.5-dbg`'LS, libstdc++6-4.6-dbg`'LS Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') This package contains the shared library of libstdc++ compiled with debugging symbols. @@ -2018,7 +2165,7 @@ Priority: extra Depends: BASEDEP, lib32stdc++CXX_SO`'LS (>= ${gcc:Version}), libstdc++CXX_SO`'PV-dev`'LS (= ${gcc:Version}), lib32gcc`'GCC_SO-dbg`'LS, ${shlibs:Depends}, ${misc:Depends} ifdef(`TARGET',`Provides: lib32stdc++CXX_SO-dbg-TARGET-dcv1 ',`')`'dnl -Conflicts: lib32stdc++6-dbg`'LS, lib32stdc++6-4.0-dbg`'LS, lib32stdc++6-4.1-dbg`'LS, lib32stdc++6-4.2-dbg`'LS, lib32stdc++6-4.3-dbg`'LS, lib32stdc++6-4.4-dbg`'LS, lib32stdc++6-4.5-dbg`'LS +Conflicts: lib32stdc++6-dbg`'LS, lib32stdc++6-4.0-dbg`'LS, lib32stdc++6-4.1-dbg`'LS, lib32stdc++6-4.2-dbg`'LS, lib32stdc++6-4.3-dbg`'LS, lib32stdc++6-4.4-dbg`'LS, lib32stdc++6-4.5-dbg`'LS, lib32stdc++6-4.6-dbg`'LS Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') This package contains the shared library of libstdc++ compiled with debugging symbols. @@ -2035,7 +2182,7 @@ Priority: extra Depends: BASEDEP, lib64stdc++CXX_SO`'LS (>= ${gcc:Version}), libstdc++CXX_SO`'PV-dev`'LS (= ${gcc:Version}), lib64gcc`'GCC_SO-dbg`'LS, ${shlibs:Depends}, ${misc:Depends} ifdef(`TARGET',`Provides: lib64stdc++CXX_SO-dbg-TARGET-dcv1 ',`')`'dnl -Conflicts: lib64stdc++6-dbg`'LS, lib64stdc++6-4.0-dbg`'LS, lib64stdc++6-4.1-dbg`'LS, lib64stdc++6-4.2-dbg`'LS, lib64stdc++6-4.3-dbg`'LS, lib64stdc++6-4.4-dbg`'LS, lib64stdc++6-4.5-dbg`'LS +Conflicts: lib64stdc++6-dbg`'LS, lib64stdc++6-4.0-dbg`'LS, lib64stdc++6-4.1-dbg`'LS, lib64stdc++6-4.2-dbg`'LS, lib64stdc++6-4.3-dbg`'LS, lib64stdc++6-4.4-dbg`'LS, lib64stdc++6-4.5-dbg`'LS, lib64stdc++6-4.6-dbg`'LS Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') This package contains the shared library of libstdc++ compiled with debugging symbols. @@ -2052,7 +2199,7 @@ Priority: extra Depends: BASEDEP, libn32stdc++CXX_SO`'LS (>= ${gcc:Version}), libstdc++CXX_SO`'PV-dev`'LS (= ${gcc:Version}), libn32gcc`'GCC_SO-dbg`'LS, ${shlibs:Depends}, ${misc:Depends} ifdef(`TARGET',`Provides: libn32stdc++CXX_SO-dbg-TARGET-dcv1 ',`')`'dnl -Conflicts: libn32stdc++6-dbg`'LS, libn32stdc++6-4.0-dbg`'LS, libn32stdc++6-4.1-dbg`'LS, libn32stdc++6-4.2-dbg`'LS, libn32stdc++6-4.3-dbg`'LS, libn32stdc++6-4.4-dbg`'LS, libn32stdc++6-4.5-dbg`'LS +Conflicts: libn32stdc++6-dbg`'LS, libn32stdc++6-4.0-dbg`'LS, libn32stdc++6-4.1-dbg`'LS, libn32stdc++6-4.2-dbg`'LS, libn32stdc++6-4.3-dbg`'LS, libn32stdc++6-4.4-dbg`'LS, libn32stdc++6-4.5-dbg`'LS, libn32stdc++6-4.6-dbg`'LS Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') This package contains the shared library of libstdc++ compiled with debugging symbols. @@ -2070,7 +2217,7 @@ Priority: extra Depends: BASEDEP, libhfstdc++CXX_SO`'LS (>= ${gcc:Version}), libstdc++CXX_SO`'PV-dev`'LS (= ${gcc:Version}), libhfgcc`'GCC_SO-dbg`'LS, ${shlibs:Depends}, ${misc:Depends} ifdef(`TARGET',`Provides: libhfstdc++CXX_SO-dbg-TARGET-dcv1 ',`')`'dnl -Conflicts: libhfstdc++6-dbg`'LS, libhfstdc++6-4.3-dbg`'LS, libhfstdc++6-4.4-dbg`'LS, libhfstdc++6-4.5-dbg`'LS +Conflicts: libhfstdc++6-dbg`'LS, libhfstdc++6-4.3-dbg`'LS, libhfstdc++6-4.4-dbg`'LS, libhfstdc++6-4.5-dbg`'LS, libhfstdc++6-4.6-dbg`'LS Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') This package contains the shared library of libstdc++ compiled with debugging symbols. @@ -2089,7 +2236,7 @@ Priority: extra Depends: BASEDEP, libsfstdc++CXX_SO`'LS (>= ${gcc:Version}), libstdc++CXX_SO`'PV-dev`'LS (= ${gcc:Version}), libsfgcc`'GCC_SO-dbg`'LS, ${shlibs:Depends}, ${misc:Depends} ifdef(`TARGET',`Provides: libsfstdc++CXX_SO-dbg-TARGET-dcv1 ',`')`'dnl -Conflicts: libsfstdc++6-dbg`'LS, libsfstdc++6-4.3-dbg`'LS, libsfstdc++6-4.4-dbg`'LS, libsfstdc++6-4.5-dbg`'LS +Conflicts: libsfstdc++6-dbg`'LS, libsfstdc++6-4.3-dbg`'LS, libsfstdc++6-4.4-dbg`'LS, libsfstdc++6-4.5-dbg`'LS, libsfstdc++6-4.6-dbg`'LS Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') This package contains the shared library of libstdc++ compiled with debugging symbols. @@ -2106,7 +2253,7 @@ Architecture: all Section: doc Priority: PRI(optional) Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), ${misc:Depends} -Conflicts: libstdc++5-doc, libstdc++5-3.3-doc, libstdc++6-doc, libstdc++6-4.0-doc, libstdc++6-4.1-doc, libstdc++6-4.2-doc, libstdc++6-4.3-doc, libstdc++6-4.4-doc, libstdc++6-4.5-doc +Conflicts: libstdc++5-doc, libstdc++5-3.3-doc, libstdc++6-doc, libstdc++6-4.0-doc, libstdc++6-4.1-doc, libstdc++6-4.2-doc, libstdc++6-4.3-doc, libstdc++6-4.4-doc, libstdc++6-4.5-doc, libstdc++6-4.6-doc Description: GNU Standard C++ Library v3 (documentation files) This package contains documentation files for the GNU stdc++ library. . @@ -2127,7 +2274,7 @@ ifdef(`MULTIARCH', `Pre-Depends: multiarch-support Depends: gnat`'PV-base (= ${gnat:Version}), gcc`'PV (>= ${gcc:SoftVersion}), ${dep:libgnat}, ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} Suggests: gnat`'PV-doc, ada-reference-manual-html, ada-reference-manual-info, ada-reference-manual-pdf, ada-reference-manual-text, gnat`'-GNAT_V-sjlj Provides: ada-compiler -Conflicts: gnat (<< 4.1), gnat-3.1, gnat-3.2, gnat-3.3, gnat-3.4, gnat-3.5, gnat-4.0, gnat-4.1, gnat-4.2, gnat-4.3, gnat-4.4 +Conflicts: gnat (<< 4.1), gnat-3.1, gnat-3.2, gnat-3.3, gnat-3.4, gnat-3.5, gnat-4.0, gnat-4.1, gnat-4.2, gnat-4.3, gnat-4.4, gnat-4.6 Description: GNU Ada compiler GNAT is a compiler for the Ada programming language. It produces optimized code on platforms supported by the GNU Compiler Collection (GCC). @@ -2190,7 +2337,7 @@ Architecture: any Priority: extra Depends: gnat`'PV-base (= ${gnat:Version}), gnat`'PV (= ${gnat:Version}), ada-compiler, libgnatvsn`'GNAT_V (= ${gnat:Version}), ${misc:Depends} -Conflicts: libgnatvsn-dev (<< `'GNAT_V), libgnatvsn4.1-dev, libgnatvsn4.3-dev, libgnatvsn4.4-dev, libgnatvsn4.5-dev +Conflicts: libgnatvsn-dev (<< `'GNAT_V), libgnatvsn4.1-dev, libgnatvsn4.3-dev, libgnatvsn4.4-dev, libgnatvsn4.5-dev, libgnatvsn4.6-dev Description: GNU Ada compiler selected components (development files) GNAT is a compiler for the Ada programming language. It produces optimized code on platforms supported by the GNU Compiler Collection (GCC). @@ -2244,7 +2391,7 @@ Architecture: any Priority: extra Depends: gnat`'PV-base (= ${gnat:Version}), gnat`'PV (= ${gnat:Version}), ada-compiler, libgnatprj`'GNAT_V (= ${gnat:Version}), libgnatvsn`'GNAT_V-dev (= ${gnat:Version}), ${misc:Depends} -Conflicts: libgnatprj-dev (<< `'GNAT_V), libgnatprj4.1-dev, libgnatprj4.3-dev, libgnatprj4.4-dev, libgnatprj4.5-dev +Conflicts: libgnatprj-dev (<< `'GNAT_V), libgnatprj4.1-dev, libgnatprj4.3-dev, libgnatprj4.4-dev, libgnatprj4.5-dev, libgnatprj4.6-dev Description: GNU Ada compiler Project Manager (development files) GNAT is a compiler for the Ada programming language. It produces optimized code on platforms supported by the GNU Compiler Collection (GCC). @@ -2325,7 +2472,7 @@ Section: doc Priority: PRI(optional) Depends: dpkg (>= 1.15.4) | install-info, ${misc:Depends} Suggests: gnat`'PV -Conflicts: gnat-4.1-doc, gnat-4.2-doc, gnat-4.3-doc, gnat-4.4-doc +Conflicts: gnat-4.1-doc, gnat-4.2-doc, gnat-4.3-doc, gnat-4.4-doc, gnat-4.6-doc Description: GNU Ada compiler (documentation) GNAT is a compiler for the Ada programming language. It produces optimized code on platforms supported by the GNU Compiler Collection (GCC). @@ -2381,7 +2528,7 @@ Package: gcc`'PV-soft-float Architecture: arm armel armhf Priority: PRI(optional) Depends: BASEDEP, ifenabled(`cdev',`gcc`'PV (= ${gcc:Version}),') ${shlibs:Depends}, ${misc:Depends} -Conflicts: gcc-4.4-soft-float, gcc-4.5-soft-float +Conflicts: gcc-4.4-soft-float, gcc-4.5-soft-float, gcc-4.6-soft-float Description: GCC soft-floating-point gcc libraries (ARM) These are versions of basic static libraries such as libgcc.a compiled with the -msoft-float option, for CPUs without a floating-point unit. diff --git a/debian/copyright b/debian/copyright index 4a7ab69..f3da9a8 100644 --- a/debian/copyright +++ b/debian/copyright @@ -10,7 +10,7 @@ Packaging is done by the Debian GCC Maintainers svn://gcc.gnu.org/svn/gcc/ (for prereleases) http://bitbucket.org/goshawk/gdc (for D) -The current gcc-4.6 source package is taken from the SVN gcc-4_6-branch. +The current gcc-4.7 source package is taken from the SVN trunk. Changes: See changelog.Debian.gz @@ -19,15 +19,15 @@ library, and documentation as follows: Language Compiler package Library package Documentation --------------------------------------------------------------------------- -Ada gnat-4.6 libgnat-4.6 gnat-4.6-doc -C gcc-4.6 gcc-4.6-doc -C++ g++-4.6 libstdc++6 libstdc++6-4.6-doc -D gdc-4.6 -Fortran 95 gfortran-4.6 libgfortran3 gfortran-4.6-doc -Go gccgo-4.6 libgo0 -Java gcj-4.6 libgcj10 libgcj-doc -Objective C gobjc-4.6 libobjc2 -Objective C++ gobjc++-4.6 +Ada gnat-4.7 libgnat-4.7 gnat-4.7-doc +C gcc-4.7 gcc-4.7-doc +C++ g++-4.7 libstdc++6 libstdc++6-4.7-doc +D gdc-4.7 +Fortran 95 gfortran-4.7 libgfortran3 gfortran-4.7-doc +Go gccgo-4.7 libgo0 +Java gcj-4.7 libgcj10 libgcj-doc +Objective C gobjc-4.7 libobjc2 +Objective C++ gobjc++-4.7 For some language run-time libraries, Debian provides source files, development files, debugging symbols and libraries containing position- @@ -35,24 +35,24 @@ independent code in separate packages: Language Sources Development Debugging Position-Independent ------------------------------------------------------------------------------ -C++ libstdc++6-4.6-dbg libstdc++6-4.6-pic -D libphobos-4.6-dev +C++ libstdc++6-4.7-dbg libstdc++6-4.7-pic +D libphobos-4.7-dev Java libgcj10-src libgcj10-dev libgcj10-dbg Additional packages include: All languages: libgcc1, libgcc2, libgcc4 GCC intrinsics (platform-dependent) -gcc-4.6-base Base files common to all compilers -gcc-4.6-soft-float Software floating point (ARM only) -gcc-4.6-source The sources with patches +gcc-4.7-base Base files common to all compilers +gcc-4.7-soft-float Software floating point (ARM only) +gcc-4.7-source The sources with patches Ada: -libgnatvsn-dev, libgnatvsn4.6 GNAT version library -libgnatprj-dev, libgnatprj4.6 GNAT Project Manager library +libgnatvsn-dev, libgnatvsn4.7 GNAT version library +libgnatprj-dev, libgnatprj4.7 GNAT Project Manager library C: -cpp-4.6, cpp-4.6-doc GNU C Preprocessor +cpp-4.7, cpp-4.7-doc GNU C Preprocessor libmudflap0-dev, libmudflap0 Library for instrumenting pointers libssp0-dev, libssp0 GCC stack smashing protection library libquadmath0 Math routines for the __float128 type @@ -67,6 +67,7 @@ libgcj10-jar Java ARchive for the Java run-time C, C++ and Fortran 95: libgomp1-dev, libgomp1 GCC OpenMP (GOMP) support library +libitm1-dev, libitm1 GNU Transactional Memory Library Biarch support: On some 64-bit platforms which can also run 32-bit code, Debian provides additional packages containing 32-bit versions of some @@ -114,12 +115,13 @@ Runtime Library Exception (included in this file): gcc/tsystem.h, gcc/typeclass.h). - libdecnumber - libgomp + - libitm - libssp - libstdc++-v3 - libobjc - libmudflap - libgfortran - - The libgnat-4.6 Ada support library and libgnatvsn library. + - The libgnat-4.7 Ada support library and libgnatvsn library. - Various config files in gcc/config/ used in runtime libraries. In contrast, libgnatprj is licensed under the terms of the pure GNU @@ -476,8 +478,8 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. D: -gdc-4.6 GNU D Compiler -libphobos-4.6-dev D standard runtime library +gdc-4.7 GNU D Compiler +libphobos-4.7-dev D standard runtime library The D source package is made up of the following components. diff --git a/debian/copyright.in b/debian/copyright.in index 2b1b5c1..9959095 100644 --- a/debian/copyright.in +++ b/debian/copyright.in @@ -67,6 +67,7 @@ libgcj10-jar Java ARchive for the Java run-time C, C++ and Fortran 95: libgomp1-dev, libgomp1 GCC OpenMP (GOMP) support library +libitm1-dev, libitm1 GNU Transactional Memory Library Biarch support: On some 64-bit platforms which can also run 32-bit code, Debian provides additional packages containing 32-bit versions of some @@ -114,6 +115,7 @@ Runtime Library Exception (included in this file): gcc/tsystem.h, gcc/typeclass.h). - libdecnumber - libgomp + - libitm - libssp - libstdc++-v3 - libobjc diff --git a/debian/g++-BV-spu.overrides b/debian/g++-BV-spu.overrides index efafa86..ae54d18 100644 --- a/debian/g++-BV-spu.overrides +++ b/debian/g++-BV-spu.overrides @@ -1,2 +1,2 @@ -g++-@BV@-spu: non-standard-dir-in-usr usr/spu/ -g++-@BV@-spu: file-in-unusual-dir +g++-@BV@-spu binary: non-standard-dir-in-usr usr/spu/ +g++-@BV@-spu binary: file-in-unusual-dir diff --git a/debian/gcc-BV-multilib.overrides b/debian/gcc-BV-multilib.overrides new file mode 100644 index 0000000..545ca0e --- /dev/null +++ b/debian/gcc-BV-multilib.overrides @@ -0,0 +1 @@ +gcc-@BV@-multilib binary: binary-from-other-architecture diff --git a/debian/gcc-BV-spu.overrides b/debian/gcc-BV-spu.overrides index 8d78a8f..7db6cac 100644 --- a/debian/gcc-BV-spu.overrides +++ b/debian/gcc-BV-spu.overrides @@ -1,2 +1,2 @@ -gcc-@BV@-spu: non-standard-dir-in-usr usr/spu/ -gcc-@BV@-spu: file-in-unusual-dir +gcc-@BV@-spu binary: non-standard-dir-in-usr usr/spu/ +gcc-@BV@-spu binary: file-in-unusual-dir diff --git a/debian/gfortran-BV-spu.overrides b/debian/gfortran-BV-spu.overrides index 1e7904d..0acb4c0 100644 --- a/debian/gfortran-BV-spu.overrides +++ b/debian/gfortran-BV-spu.overrides @@ -1,2 +1,2 @@ -gfortran-@BV@-spu: non-standard-dir-in-usr usr/spu/ -gfortran-@BV@-spu: file-in-unusual-dir +gfortran-@BV@-spu binary: non-standard-dir-in-usr usr/spu/ +gfortran-@BV@-spu binary: file-in-unusual-dir diff --git a/debian/gnat-BV.overrides b/debian/gnat-BV.overrides index 3fe023a..f07d2d6 100644 --- a/debian/gnat-BV.overrides +++ b/debian/gnat-BV.overrides @@ -1 +1 @@ -gnat-@BV@: quilt-build-dep-but-no-series-file +gnat-@BV@ binary: quilt-build-dep-but-no-series-file diff --git a/debian/gnat.1 b/debian/gnat.1 index c90bc13..a9c7f44 100644 --- a/debian/gnat.1 +++ b/debian/gnat.1 @@ -28,9 +28,9 @@ GNAT toolbox Those programs are part of GNU GNAT, a freely available Ada 95 compiler. .PP For accessing the full GNAT manuals, use -.B info gnat-ug-4.6 +.B info gnat-ug-4.7 and -.B info gnat-rm-4.6 +.B info gnat-rm-4.7 for the sections related to the reference manual. If those sections cannot be found, you will have to install the gnat-4.4-doc package as well (since these manuals contain invariant parts, diff --git a/debian/lib32gcc1.symbols.amd64 b/debian/lib32gcc1.symbols.amd64 index 30dd227..199754e 100644 --- a/debian/lib32gcc1.symbols.amd64 +++ b/debian/lib32gcc1.symbols.amd64 @@ -9,6 +9,7 @@ libgcc_s.so.1 lib32gcc1 #MINVER# GCC_4.3.0@GCC_4.3.0 1:4.3 GCC_4.4.0@GCC_4.4.0 1:4.4.0 GCC_4.5.0@GCC_4.5.0 1:4.5.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.0@GLIBC_2.0 1:4.1.1 _Unwind_Backtrace@GCC_3.3 1:4.1.1 _Unwind_DeleteException@GCC_3.0 1:4.1.1 @@ -38,6 +39,8 @@ libgcc_s.so.1 lib32gcc1 #MINVER# __bswapdi2@GCC_4.3.0 1:4.3 __bswapsi2@GCC_4.3.0 1:4.3 __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 __clzdi2@GCC_3.4 1:4.1.1 __clzsi2@GCC_3.4 1:4.1.1 __cmpdi2@GCC_3.0 1:4.1.1 diff --git a/debian/lib32gcc1.symbols.kfreebsd-amd64 b/debian/lib32gcc1.symbols.kfreebsd-amd64 index 30dd227..199754e 100644 --- a/debian/lib32gcc1.symbols.kfreebsd-amd64 +++ b/debian/lib32gcc1.symbols.kfreebsd-amd64 @@ -9,6 +9,7 @@ libgcc_s.so.1 lib32gcc1 #MINVER# GCC_4.3.0@GCC_4.3.0 1:4.3 GCC_4.4.0@GCC_4.4.0 1:4.4.0 GCC_4.5.0@GCC_4.5.0 1:4.5.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.0@GLIBC_2.0 1:4.1.1 _Unwind_Backtrace@GCC_3.3 1:4.1.1 _Unwind_DeleteException@GCC_3.0 1:4.1.1 @@ -38,6 +39,8 @@ libgcc_s.so.1 lib32gcc1 #MINVER# __bswapdi2@GCC_4.3.0 1:4.3 __bswapsi2@GCC_4.3.0 1:4.3 __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 __clzdi2@GCC_3.4 1:4.1.1 __clzsi2@GCC_3.4 1:4.1.1 __cmpdi2@GCC_3.0 1:4.1.1 diff --git a/debian/lib32gcc1.symbols.ppc64 b/debian/lib32gcc1.symbols.ppc64 index 782c9bb..39a93fa 100644 --- a/debian/lib32gcc1.symbols.ppc64 +++ b/debian/lib32gcc1.symbols.ppc64 @@ -9,6 +9,7 @@ libgcc_s.so.1 lib32gcc1 #MINVER# GCC_4.1.0@GCC_4.1.0 1:4.1.1 GCC_4.2.0@GCC_4.2.0 1:4.1.1 GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.0@GLIBC_2.0 1:4.1.1 _Unwind_Backtrace@GCC_3.3 1:4.1.1 _Unwind_DeleteException@GCC_3.0 1:4.1.1 @@ -39,6 +40,8 @@ libgcc_s.so.1 lib32gcc1 #MINVER# __bswapdi2@GCC_4.3.0 1:4.3 __bswapsi2@GCC_4.3.0 1:4.3 __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 __clzdi2@GCC_3.4 1:4.1.1 __clzsi2@GCC_3.4 1:4.1.1 __cmpdi2@GCC_3.0 1:4.1.1 diff --git a/debian/lib32gcc1.symbols.s390x b/debian/lib32gcc1.symbols.s390x index 7cc6184..07ce33f 100644 --- a/debian/lib32gcc1.symbols.s390x +++ b/debian/lib32gcc1.symbols.s390x @@ -8,6 +8,7 @@ libgcc_s.so.1 lib32gcc1 #MINVER# GCC_4.1.0@GCC_4.1.0 1:4.1.1 GCC_4.2.0@GCC_4.2.0 1:4.1.1 GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.0@GLIBC_2.0 1:4.1.1 _Unwind_Backtrace@GCC_3.3 1:4.1.1 _Unwind_DeleteException@GCC_3.0 1:4.1.1 @@ -36,6 +37,8 @@ libgcc_s.so.1 lib32gcc1 #MINVER# __bswapdi2@GCC_4.3.0 1:4.3 __bswapsi2@GCC_4.3.0 1:4.3 __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 __clzdi2@GCC_3.4 1:4.1.1 __clzsi2@GCC_3.4 1:4.1.1 __cmpdi2@GCC_3.0 1:4.1.1 diff --git a/debian/lib32itm1.symbols b/debian/lib32itm1.symbols new file mode 100644 index 0000000..676e963 --- /dev/null +++ b/debian/lib32itm1.symbols @@ -0,0 +1,3 @@ +libitm.so.1 lib32itm1 #MINVER# +#include "libitm1.symbols.common" +#include "libitm1.symbols.32bit" diff --git a/debian/lib32objc3.symbols b/debian/lib32objc3.symbols deleted file mode 100644 index 7bddf2c..0000000 --- a/debian/lib32objc3.symbols +++ /dev/null @@ -1,3 +0,0 @@ -libobjc.so.3 lib32objc3 #MINVER# -#include "libobjc3.symbols.common" - __gnu_objc_personality_v0@Base 4.2.1 diff --git a/debian/lib32objc4.symbols b/debian/lib32objc4.symbols new file mode 100644 index 0000000..8be3e02 --- /dev/null +++ b/debian/lib32objc4.symbols @@ -0,0 +1,3 @@ +libobjc.so.4 lib32objc4 #MINVER# +#include "libobjc4.symbols.common" + __gnu_objc_personality_v0@Base 4.2.1 diff --git a/debian/lib64gcc1.symbols.i386 b/debian/lib64gcc1.symbols.i386 index c62fcf9..df978c3 100644 --- a/debian/lib64gcc1.symbols.i386 +++ b/debian/lib64gcc1.symbols.i386 @@ -8,6 +8,7 @@ libgcc_s.so.1 lib64gcc1 #MINVER# GCC_4.0.0@GCC_4.0.0 1:4.1.1 GCC_4.2.0@GCC_4.2.0 1:4.1.1 GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 _Unwind_Backtrace@GCC_3.3 1:4.1.1 _Unwind_DeleteException@GCC_3.0 1:4.1.1 _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 @@ -38,6 +39,8 @@ libgcc_s.so.1 lib64gcc1 #MINVER# __bswapdi2@GCC_4.3.0 1:4.3 __bswapsi2@GCC_4.3.0 1:4.3 __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 __clzdi2@GCC_3.4 1:4.1.1 __clzti2@GCC_3.4 1:4.1.1 __cmpti2@GCC_3.0 1:4.1.1 diff --git a/debian/lib64gcc1.symbols.powerpc b/debian/lib64gcc1.symbols.powerpc index 989d2a1..46d1646 100644 --- a/debian/lib64gcc1.symbols.powerpc +++ b/debian/lib64gcc1.symbols.powerpc @@ -2,12 +2,14 @@ libgcc_s.so.1 lib64gcc1 #MINVER# GCC_3.0@GCC_3.0 1:4.1.1 GCC_3.3.1@GCC_3.3.1 1:4.1.1 GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 GCC_3.4.2@GCC_3.4.2 1:4.1.1 GCC_3.4.4@GCC_3.4.4 1:4.1.1 GCC_3.4@GCC_3.4 1:4.1.1 GCC_4.0.0@GCC_4.0.0 1:4.1.1 GCC_4.2.0@GCC_4.2.0 1:4.1.1 GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.0@GLIBC_2.0 1:4.1.1 _Unwind_Backtrace@GCC_3.3 1:4.1.1 _Unwind_DeleteException@GCC_3.0 1:4.1.1 @@ -30,6 +32,8 @@ libgcc_s.so.1 lib64gcc1 #MINVER# __absvdi2@GCC_3.0 1:4.1.1 __absvsi2@GCC_3.0 1:4.1.1 __absvti2@GCC_3.4.4 1:4.1.1 + __adddf3@GCC_3.0 1:4.1.1 + __addsf3@GCC_3.0 1:4.1.1 __addvdi3@GCC_3.0 1:4.1.1 __addvsi3@GCC_3.0 1:4.1.1 __addvti3@GCC_3.4.4 1:4.1.1 @@ -38,6 +42,8 @@ libgcc_s.so.1 lib64gcc1 #MINVER# __bswapdi2@GCC_4.3.0 1:4.3 __bswapsi2@GCC_4.3.0 1:4.3 __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 __clzdi2@GCC_3.4 1:4.1.1 __clzti2@GCC_3.4 1:4.1.1 __cmpti2@GCC_3.0 1:4.1.1 @@ -47,17 +53,24 @@ libgcc_s.so.1 lib64gcc1 #MINVER# __deregister_frame_info@GLIBC_2.0 1:4.1.1 __deregister_frame_info_bases@GCC_3.0 1:4.1.1 __divdc3@GCC_4.0.0 1:4.1.1 - __divsc3@GCC_4.0.0 1:4.1.1 + __divdf3@GCC_3.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divsf3@GCC_3.0 1:4.1.1 __divtc3@GCC_4.0.0 1:4.1.1 __divti3@GCC_3.0 1:4.1.1 __emutls_get_address@GCC_4.3.0 1:4.3 __emutls_register_common@GCC_4.3.0 1:4.3 __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqdf2@GCC_3.0 1:4.1.1 + __eqsf2@GCC_3.0 1:4.1.1 + __extendsfdf2@GCC_3.0 1:4.1.1 __ffsdi2@GCC_3.0 1:4.1.1 __ffsti2@GCC_3.0 1:4.1.1 __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfsi@GCC_3.0 1:4.1.1 __fixdfti@GCC_3.0 1:4.1.1 __fixsfdi@GCC_3.0 1:4.1.1 + __fixsfsi@GCC_3.0 1:4.1.1 __fixsfti@GCC_3.0 1:4.1.1 __fixtfdi@GCC_3.0 1:4.1.1 __fixtfti@GCC_3.0 1:4.1.1 @@ -72,12 +85,16 @@ libgcc_s.so.1 lib64gcc1 #MINVER# __floatdidf@GCC_3.0 1:4.1.1 __floatdisf@GCC_3.0 1:4.1.1 __floatditf@GCC_3.0 1:4.1.1 + __floatsidf@GCC_3.0 1:4.1.1 + __floatsisf@GCC_3.0 1:4.1.1 __floattidf@GCC_3.0 1:4.1.1 __floattisf@GCC_3.0 1:4.1.1 __floattitf@GCC_3.0 1:4.1.1 __floatundidf@GCC_4.2.0 1:4.2.1 __floatundisf@GCC_4.2.0 1:4.2.1 __floatunditf@GCC_4.2.0 1:4.2.1 + __floatunsidf@GCC_4.2.0 1:4.1.1 + __floatunsisf@GCC_4.2.0 1:4.1.1 __floatuntidf@GCC_4.2.0 1:4.2.1 __floatuntisf@GCC_4.2.0 1:4.2.1 __floatuntitf@GCC_4.2.0 1:4.2.1 @@ -87,19 +104,33 @@ libgcc_s.so.1 lib64gcc1 #MINVER# __gcc_qdiv@GCC_3.4.4 1:4.1.1 __gcc_qmul@GCC_3.4.4 1:4.1.1 __gcc_qsub@GCC_3.4.4 1:4.1.1 + __gedf2@GCC_3.0 1:4.1.1 + __gesf2@GCC_3.0 1:4.1.1 + __gtdf2@GCC_3.0 1:4.1.1 + __gtsf2@GCC_3.0 1:4.1.1 + __ledf2@GCC_3.0 1:4.1.1 + __lesf2@GCC_3.0 1:4.1.1 __lshrti3@GCC_3.0 1:4.1.1 + __ltdf2@GCC_3.0 1:4.1.1 + __ltsf2@GCC_3.0 1:4.1.1 __modti3@GCC_3.0 1:4.1.1 __muldc3@GCC_4.0.0 1:4.1.1 + __muldf3@GCC_3.0 1:4.1.1 __mulsc3@GCC_4.0.0 1:4.1.1 + __mulsf3@GCC_3.0 1:4.1.1 __multc3@GCC_4.0.0 1:4.1.1 __multi3@GCC_3.0 1:4.1.1 __mulvdi3@GCC_3.0 1:4.1.1 __mulvsi3@GCC_3.0 1:4.1.1 __mulvti3@GCC_3.4.4 1:4.1.1 + __nedf2@GCC_3.0 1:4.1.1 + __negdf2@GCC_3.0 1:4.1.1 + __negsf2@GCC_3.0 1:4.1.1 __negti2@GCC_3.0 1:4.1.1 __negvdi2@GCC_3.0 1:4.1.1 __negvsi2@GCC_3.0 1:4.1.1 __negvti2@GCC_3.4.4 1:4.1.1 + __nesf2@GCC_3.0 1:4.1.1 __paritydi2@GCC_3.4 1:4.1.1 __parityti2@GCC_3.4 1:4.1.1 __popcountdi2@GCC_3.4 1:4.1.1 @@ -113,13 +144,18 @@ libgcc_s.so.1 lib64gcc1 #MINVER# __register_frame_info_table@GLIBC_2.0 1:4.1.1 __register_frame_info_table_bases@GCC_3.0 1:4.1.1 __register_frame_table@GLIBC_2.0 1:4.1.1 + __subdf3@GCC_3.0 1:4.1.1 + __subsf3@GCC_3.0 1:4.1.1 __subvdi3@GCC_3.0 1:4.1.1 __subvsi3@GCC_3.0 1:4.1.1 __subvti3@GCC_3.4.4 1:4.1.1 + __truncdfsf2@GCC_3.0 1:4.1.1 __ucmpti2@GCC_3.0 1:4.1.1 __udivmodti4@GCC_3.0 1:4.1.1 __udivti3@GCC_3.0 1:4.1.1 __umodti3@GCC_3.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 _xlqadd@GCC_3.4 1:4.1.1 _xlqdiv@GCC_3.4 1:4.1.1 _xlqmul@GCC_3.4 1:4.1.1 diff --git a/debian/lib64itm1.symbols b/debian/lib64itm1.symbols new file mode 100644 index 0000000..797b74d --- /dev/null +++ b/debian/lib64itm1.symbols @@ -0,0 +1,3 @@ +libitm.so.1 lib64itm1 #MINVER# +#include "libitm1.symbols.common" +#include "libitm1.symbols.64bit" diff --git a/debian/lib64objc3.symbols b/debian/lib64objc3.symbols deleted file mode 100644 index 6684f94..0000000 --- a/debian/lib64objc3.symbols +++ /dev/null @@ -1,3 +0,0 @@ -libobjc.so.3 lib64objc3 #MINVER# -#include "libobjc3.symbols.common" - __gnu_objc_personality_v0@Base 4.2.1 diff --git a/debian/lib64objc4.symbols b/debian/lib64objc4.symbols new file mode 100644 index 0000000..263faf4 --- /dev/null +++ b/debian/lib64objc4.symbols @@ -0,0 +1,3 @@ +libobjc.so.4 lib64objc4 #MINVER# +#include "libobjc4.symbols.common" + __gnu_objc_personality_v0@Base 4.2.1 diff --git a/debian/lib64stdc++6.symbols.i386 b/debian/lib64stdc++6.symbols.i386 index 590aaa4..52e2225 100644 --- a/debian/lib64stdc++6.symbols.i386 +++ b/debian/lib64stdc++6.symbols.i386 @@ -1,5 +1,6 @@ libstdc++.so.6 lib64stdc++6 #MINVER# #include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" #include "libstdc++6.symbols.excprop" _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 diff --git a/debian/lib64stdc++6.symbols.powerpc b/debian/lib64stdc++6.symbols.powerpc index 2a2c33b..d8baffd 100644 --- a/debian/lib64stdc++6.symbols.powerpc +++ b/debian/lib64stdc++6.symbols.powerpc @@ -1,5 +1,6 @@ libstdc++.so.6 lib64stdc++6 #MINVER# #include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" #include "libstdc++6.symbols.excprop" _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 diff --git a/debian/libgcc1.symbols.alpha b/debian/libgcc1.symbols.alpha index 2797555..e6cf92e 100644 --- a/debian/libgcc1.symbols.alpha +++ b/debian/libgcc1.symbols.alpha @@ -8,6 +8,7 @@ libgcc_s.so.1 libgcc1 #MINVER# GCC_4.0.0@GCC_4.0.0 1:4.1.1 GCC_4.2.0@GCC_4.2.0 1:4.1.1 GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 GCC_LDBL_4.0.0@GCC_LDBL_4.0.0 1:4.2.1 GLIBC_2.0@GLIBC_2.0 1:4.1.1 _Unwind_Backtrace@GCC_3.3 1:4.1.1 diff --git a/debian/libgcc1.symbols.amd64 b/debian/libgcc1.symbols.amd64 index 28926d1..42193e8 100644 --- a/debian/libgcc1.symbols.amd64 +++ b/debian/libgcc1.symbols.amd64 @@ -8,6 +8,7 @@ libgcc_s.so.1 libgcc1 #MINVER# GCC_4.0.0@GCC_4.0.0 1:4.1.1 GCC_4.2.0@GCC_4.2.0 1:4.1.1 GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 _Unwind_Backtrace@GCC_3.3 1:4.1.1 _Unwind_DeleteException@GCC_3.0 1:4.1.1 _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 @@ -38,6 +39,8 @@ libgcc_s.so.1 libgcc1 #MINVER# __bswapdi2@GCC_4.3.0 1:4.3 __bswapsi2@GCC_4.3.0 1:4.3 __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 __clzdi2@GCC_3.4 1:4.1.1 __clzti2@GCC_3.4 1:4.1.1 __cmpti2@GCC_3.0 1:4.1.1 diff --git a/debian/libgcc1.symbols.armel b/debian/libgcc1.symbols.armel index 886604f..5906b23 100644 --- a/debian/libgcc1.symbols.armel +++ b/debian/libgcc1.symbols.armel @@ -10,6 +10,7 @@ libgcc_s.so.1 libgcc1 #MINVER# GCC_4.0.0@GCC_4.0.0 1:4.1.1 GCC_4.2.0@GCC_4.2.0 1:4.1.1 GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.0@GLIBC_2.0 1:4.1.1 _Unwind_Backtrace@GCC_4.3.0 1:4.3.0 _Unwind_Complete@GCC_3.5 1:4.3.0 diff --git a/debian/libgcc1.symbols.armhf b/debian/libgcc1.symbols.armhf index 886604f..5906b23 100644 --- a/debian/libgcc1.symbols.armhf +++ b/debian/libgcc1.symbols.armhf @@ -10,6 +10,7 @@ libgcc_s.so.1 libgcc1 #MINVER# GCC_4.0.0@GCC_4.0.0 1:4.1.1 GCC_4.2.0@GCC_4.2.0 1:4.1.1 GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.0@GLIBC_2.0 1:4.1.1 _Unwind_Backtrace@GCC_4.3.0 1:4.3.0 _Unwind_Complete@GCC_3.5 1:4.3.0 diff --git a/debian/libgcc1.symbols.hurd-i386 b/debian/libgcc1.symbols.hurd-i386 index 049adbe..3c73b73 100644 --- a/debian/libgcc1.symbols.hurd-i386 +++ b/debian/libgcc1.symbols.hurd-i386 @@ -7,6 +7,7 @@ libgcc_s.so.1 libgcc1 #MINVER# GCC_4.0.0@GCC_4.0.0 4.2.1 GCC_4.2.0@GCC_4.2.0 4.2.1 GCC_4.3.0@GCC_4.3.0 1:4.3.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.0@GLIBC_2.0 4.2.1 _Unwind_Backtrace@GCC_3.3 4.2.1 _Unwind_DeleteException@GCC_3.0 4.2.1 diff --git a/debian/libgcc1.symbols.i386 b/debian/libgcc1.symbols.i386 index fd9b1aa..9c02514 100644 --- a/debian/libgcc1.symbols.i386 +++ b/debian/libgcc1.symbols.i386 @@ -9,6 +9,7 @@ libgcc_s.so.1 libgcc1 #MINVER# GCC_4.3.0@GCC_4.3.0 1:4.3 GCC_4.4.0@GCC_4.4.0 1:4.4.0 GCC_4.5.0@GCC_4.5.0 1:4.5.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.0@GLIBC_2.0 1:4.1.1 _Unwind_Backtrace@GCC_3.3 1:4.1.1 _Unwind_DeleteException@GCC_3.0 1:4.1.1 @@ -38,6 +39,8 @@ libgcc_s.so.1 libgcc1 #MINVER# __bswapdi2@GCC_4.3.0 1:4.3 __bswapsi2@GCC_4.3.0 1:4.3 __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 __clzdi2@GCC_3.4 1:4.1.1 __clzsi2@GCC_3.4 1:4.1.1 __cmpdi2@GCC_3.0 1:4.1.1 diff --git a/debian/libgcc1.symbols.ia64 b/debian/libgcc1.symbols.ia64 index 3212dd8..6c4146d 100644 --- a/debian/libgcc1.symbols.ia64 +++ b/debian/libgcc1.symbols.ia64 @@ -10,6 +10,7 @@ libgcc_s.so.1 libgcc1 #MINVER# GCC_4.2.0@GCC_4.2.0 1:4.1.1 GCC_4.3.0@GCC_4.3.0 1:4.3 GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.0@GLIBC_2.0 1:4.1.1 _Unwind_Backtrace@GCC_3.3 1:4.1.1 _Unwind_DeleteException@GCC_3.0 1:4.1.1 diff --git a/debian/libgcc1.symbols.kfreebsd-amd64 b/debian/libgcc1.symbols.kfreebsd-amd64 index a3c0435..c808420 100644 --- a/debian/libgcc1.symbols.kfreebsd-amd64 +++ b/debian/libgcc1.symbols.kfreebsd-amd64 @@ -8,6 +8,7 @@ libgcc_s.so.1 libgcc1 #MINVER# GCC_4.0.0@GCC_4.0.0 1:4.1.1 GCC_4.2.0@GCC_4.2.0 1:4.1.1 GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 _Unwind_Backtrace@GCC_3.3 1:4.1.1 _Unwind_DeleteException@GCC_3.0 1:4.1.1 _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 diff --git a/debian/libgcc1.symbols.kfreebsd-i386 b/debian/libgcc1.symbols.kfreebsd-i386 index fd9b1aa..6be4058 100644 --- a/debian/libgcc1.symbols.kfreebsd-i386 +++ b/debian/libgcc1.symbols.kfreebsd-i386 @@ -9,6 +9,7 @@ libgcc_s.so.1 libgcc1 #MINVER# GCC_4.3.0@GCC_4.3.0 1:4.3 GCC_4.4.0@GCC_4.4.0 1:4.4.0 GCC_4.5.0@GCC_4.5.0 1:4.5.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.0@GLIBC_2.0 1:4.1.1 _Unwind_Backtrace@GCC_3.3 1:4.1.1 _Unwind_DeleteException@GCC_3.0 1:4.1.1 diff --git a/debian/libgcc1.symbols.lpia b/debian/libgcc1.symbols.lpia index 2a71fc9..e82f711 100644 --- a/debian/libgcc1.symbols.lpia +++ b/debian/libgcc1.symbols.lpia @@ -9,6 +9,7 @@ libgcc_s.so.1 libgcc1 #MINVER# GCC_4.3.0@GCC_4.3.0 1:4.3 GCC_4.4.0@GCC_4.4.0 1:4.4.0 GCC_4.5.0@GCC_4.5.0 1:4.5.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.0@GLIBC_2.0 1:4.1.1 _Unwind_Backtrace@GCC_3.3 1:4.1.1 _Unwind_DeleteException@GCC_3.0 1:4.1.1 diff --git a/debian/libgcc1.symbols.mips b/debian/libgcc1.symbols.mips index ca9f1df..37fd7b3 100644 --- a/debian/libgcc1.symbols.mips +++ b/debian/libgcc1.symbols.mips @@ -9,6 +9,7 @@ libgcc_s.so.1 libgcc1 #MINVER# GCC_4.2.0@GCC_4.2.0 1:4.1.1 GCC_4.3.0@GCC_4.3.0 1:4.3 GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.0@GLIBC_2.0 1:4.1.1 _Unwind_Backtrace@GCC_3.3 1:4.1.1 _Unwind_DeleteException@GCC_3.0 1:4.1.1 diff --git a/debian/libgcc1.symbols.mipsel b/debian/libgcc1.symbols.mipsel index ca9f1df..37fd7b3 100644 --- a/debian/libgcc1.symbols.mipsel +++ b/debian/libgcc1.symbols.mipsel @@ -9,6 +9,7 @@ libgcc_s.so.1 libgcc1 #MINVER# GCC_4.2.0@GCC_4.2.0 1:4.1.1 GCC_4.3.0@GCC_4.3.0 1:4.3 GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.0@GLIBC_2.0 1:4.1.1 _Unwind_Backtrace@GCC_3.3 1:4.1.1 _Unwind_DeleteException@GCC_3.0 1:4.1.1 diff --git a/debian/libgcc1.symbols.powerpc b/debian/libgcc1.symbols.powerpc index fd51361..4b1cc55 100644 --- a/debian/libgcc1.symbols.powerpc +++ b/debian/libgcc1.symbols.powerpc @@ -9,6 +9,7 @@ libgcc_s.so.1 libgcc1 #MINVER# GCC_4.1.0@GCC_4.1.0 1:4.1.1 GCC_4.2.0@GCC_4.2.0 1:4.1.1 GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.0@GLIBC_2.0 1:4.1.1 _Unwind_Backtrace@GCC_3.3 1:4.1.1 _Unwind_DeleteException@GCC_3.0 1:4.1.1 @@ -39,6 +40,8 @@ libgcc_s.so.1 libgcc1 #MINVER# __bswapdi2@GCC_4.3.0 1:4.3 __bswapsi2@GCC_4.3.0 1:4.3 __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 __clzdi2@GCC_3.4 1:4.1.1 __clzsi2@GCC_3.4 1:4.1.1 __cmpdi2@GCC_3.0 1:4.1.1 diff --git a/debian/libgcc1.symbols.ppc64 b/debian/libgcc1.symbols.ppc64 index 545b223..8c47075 100644 --- a/debian/libgcc1.symbols.ppc64 +++ b/debian/libgcc1.symbols.ppc64 @@ -2,12 +2,14 @@ libgcc_s.so.1 libgcc1 #MINVER# GCC_3.0@GCC_3.0 1:4.1.1 GCC_3.3.1@GCC_3.3.1 1:4.1.1 GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 GCC_3.4.2@GCC_3.4.2 1:4.1.1 GCC_3.4.4@GCC_3.4.4 1:4.1.1 GCC_3.4@GCC_3.4 1:4.1.1 GCC_4.0.0@GCC_4.0.0 1:4.1.1 GCC_4.2.0@GCC_4.2.0 1:4.1.1 GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.0@GLIBC_2.0 1:4.1.1 _Unwind_Backtrace@GCC_3.3 1:4.1.1 _Unwind_DeleteException@GCC_3.0 1:4.1.1 @@ -30,6 +32,8 @@ libgcc_s.so.1 libgcc1 #MINVER# __absvdi2@GCC_3.0 1:4.1.1 __absvsi2@GCC_3.0 1:4.1.1 __absvti2@GCC_3.4.4 1:4.1.1 + __adddf3@GCC_3.0 1:4.1.1 + __addsf3@GCC_3.0 1:4.1.1 __addvdi3@GCC_3.0 1:4.1.1 __addvsi3@GCC_3.0 1:4.1.1 __addvti3@GCC_3.4.4 1:4.1.1 @@ -38,6 +42,8 @@ libgcc_s.so.1 libgcc1 #MINVER# __bswapdi2@GCC_4.3.0 1:4.3 __bswapsi2@GCC_4.3.0 1:4.3 __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 __clzdi2@GCC_3.4 1:4.1.1 __clzti2@GCC_3.4 1:4.1.1 __cmpti2@GCC_3.0 1:4.1.1 @@ -47,17 +53,24 @@ libgcc_s.so.1 libgcc1 #MINVER# __deregister_frame_info@GLIBC_2.0 1:4.1.1 __deregister_frame_info_bases@GCC_3.0 1:4.1.1 __divdc3@GCC_4.0.0 1:4.1.1 - __divsc3@GCC_4.0.0 1:4.1.1 + __divdf3@GCC_3.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divsf3@GCC_3.0 1:4.1.1 __divtc3@GCC_4.0.0 1:4.1.1 __divti3@GCC_3.0 1:4.1.1 __emutls_get_address@GCC_4.3.0 1:4.3 __emutls_register_common@GCC_4.3.0 1:4.3 __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqdf2@GCC_3.0 1:4.1.1 + __eqsf2@GCC_3.0 1:4.1.1 + __extendsfdf2@GCC_3.0 1:4.1.1 __ffsdi2@GCC_3.0 1:4.1.1 __ffsti2@GCC_3.0 1:4.1.1 __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfsi@GCC_3.0 1:4.1.1 __fixdfti@GCC_3.0 1:4.1.1 __fixsfdi@GCC_3.0 1:4.1.1 + __fixsfsi@GCC_3.0 1:4.1.1 __fixsfti@GCC_3.0 1:4.1.1 __fixtfdi@GCC_3.0 1:4.1.1 __fixtfti@GCC_3.0 1:4.1.1 @@ -72,12 +85,16 @@ libgcc_s.so.1 libgcc1 #MINVER# __floatdidf@GCC_3.0 1:4.1.1 __floatdisf@GCC_3.0 1:4.1.1 __floatditf@GCC_3.0 1:4.1.1 + __floatsidf@GCC_3.0 1:4.1.1 + __floatsisf@GCC_3.0 1:4.1.1 __floattidf@GCC_3.0 1:4.1.1 __floattisf@GCC_3.0 1:4.1.1 __floattitf@GCC_3.0 1:4.1.1 __floatundidf@GCC_4.2.0 1:4.2.1 __floatundisf@GCC_4.2.0 1:4.2.1 __floatunditf@GCC_4.2.0 1:4.2.1 + __floatunsidf@GCC_4.2.0 1:4.1.1 + __floatunsisf@GCC_4.2.0 1:4.1.1 __floatuntidf@GCC_4.2.0 1:4.2.1 __floatuntisf@GCC_4.2.0 1:4.2.1 __floatuntitf@GCC_4.2.0 1:4.2.1 @@ -87,19 +104,33 @@ libgcc_s.so.1 libgcc1 #MINVER# __gcc_qdiv@GCC_3.4.4 1:4.1.1 __gcc_qmul@GCC_3.4.4 1:4.1.1 __gcc_qsub@GCC_3.4.4 1:4.1.1 + __gedf2@GCC_3.0 1:4.1.1 + __gesf2@GCC_3.0 1:4.1.1 + __gtdf2@GCC_3.0 1:4.1.1 + __gtsf2@GCC_3.0 1:4.1.1 + __ledf2@GCC_3.0 1:4.1.1 + __lesf2@GCC_3.0 1:4.1.1 __lshrti3@GCC_3.0 1:4.1.1 + __ltdf2@GCC_3.0 1:4.1.1 + __ltsf2@GCC_3.0 1:4.1.1 __modti3@GCC_3.0 1:4.1.1 __muldc3@GCC_4.0.0 1:4.1.1 + __muldf3@GCC_3.0 1:4.1.1 __mulsc3@GCC_4.0.0 1:4.1.1 + __mulsf3@GCC_3.0 1:4.1.1 __multc3@GCC_4.0.0 1:4.1.1 __multi3@GCC_3.0 1:4.1.1 __mulvdi3@GCC_3.0 1:4.1.1 __mulvsi3@GCC_3.0 1:4.1.1 __mulvti3@GCC_3.4.4 1:4.1.1 + __nedf2@GCC_3.0 1:4.1.1 + __negdf2@GCC_3.0 1:4.1.1 + __negsf2@GCC_3.0 1:4.1.1 __negti2@GCC_3.0 1:4.1.1 __negvdi2@GCC_3.0 1:4.1.1 __negvsi2@GCC_3.0 1:4.1.1 __negvti2@GCC_3.4.4 1:4.1.1 + __nesf2@GCC_3.0 1:4.1.1 __paritydi2@GCC_3.4 1:4.1.1 __parityti2@GCC_3.4 1:4.1.1 __popcountdi2@GCC_3.4 1:4.1.1 @@ -113,13 +144,18 @@ libgcc_s.so.1 libgcc1 #MINVER# __register_frame_info_table@GLIBC_2.0 1:4.1.1 __register_frame_info_table_bases@GCC_3.0 1:4.1.1 __register_frame_table@GLIBC_2.0 1:4.1.1 + __subdf3@GCC_3.0 1:4.1.1 + __subsf3@GCC_3.0 1:4.1.1 __subvdi3@GCC_3.0 1:4.1.1 __subvsi3@GCC_3.0 1:4.1.1 __subvti3@GCC_3.4.4 1:4.1.1 + __truncdfsf2@GCC_3.0 1:4.1.1 __ucmpti2@GCC_3.0 1:4.1.1 __udivmodti4@GCC_3.0 1:4.1.1 __udivti3@GCC_3.0 1:4.1.1 __umodti3@GCC_3.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 _xlqadd@GCC_3.4 1:4.1.1 _xlqdiv@GCC_3.4 1:4.1.1 _xlqmul@GCC_3.4 1:4.1.1 diff --git a/debian/libgcc1.symbols.s390 b/debian/libgcc1.symbols.s390 index eafd72b..75e908d 100644 --- a/debian/libgcc1.symbols.s390 +++ b/debian/libgcc1.symbols.s390 @@ -8,6 +8,7 @@ libgcc_s.so.1 libgcc1 #MINVER# GCC_4.1.0@GCC_4.1.0 1:4.1.1 GCC_4.2.0@GCC_4.2.0 1:4.1.1 GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.0@GLIBC_2.0 1:4.1.1 _Unwind_Backtrace@GCC_3.3 1:4.1.1 _Unwind_DeleteException@GCC_3.0 1:4.1.1 diff --git a/debian/libgcc1.symbols.s390x b/debian/libgcc1.symbols.s390x index fa98d74..d8bee20 100644 --- a/debian/libgcc1.symbols.s390x +++ b/debian/libgcc1.symbols.s390x @@ -9,6 +9,7 @@ libgcc_s.so.1 libgcc1 #MINVER# GCC_4.1.0@GCC_4.1.0 1:4.1.1 GCC_4.2.0@GCC_4.2.0 1:4.1.1 GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.2@GLIBC_2.2 1:4.1.1 _Unwind_Backtrace@GCC_3.3 1:4.1.1 _Unwind_DeleteException@GCC_3.0 1:4.1.1 diff --git a/debian/libgcc1.symbols.sh4 b/debian/libgcc1.symbols.sh4 index c60cb8f..1808aff 100644 --- a/debian/libgcc1.symbols.sh4 +++ b/debian/libgcc1.symbols.sh4 @@ -9,6 +9,7 @@ libgcc_s.so.1 libgcc1 #MINVER# GCC_4.2.0@GCC_4.2.0 1:4.1.1 GCC_4.3.0@GCC_4.3.0 1:4.3 GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.2@GLIBC_2.2 1:4.1.1 _Unwind_Backtrace@GCC_3.3 1:4.1.1 _Unwind_DeleteException@GCC_3.0 1:4.1.1 diff --git a/debian/libgcc1.symbols.sparc b/debian/libgcc1.symbols.sparc index b53759a..7ab23cc 100644 --- a/debian/libgcc1.symbols.sparc +++ b/debian/libgcc1.symbols.sparc @@ -7,6 +7,7 @@ libgcc_s.so.1 libgcc1 #MINVER# GCC_4.0.0@GCC_4.0.0 1:4.1.1 GCC_4.2.0@GCC_4.2.0 1:4.1.1 GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 GCC_LDBL_3.0@GCC_LDBL_3.0 1:4.2.1 GCC_LDBL_4.0.0@GCC_LDBL_4.0.0 1:4.2.1 GLIBC_2.0@GLIBC_2.0 1:4.1.1 diff --git a/debian/libgcc1.symbols.sparc64 b/debian/libgcc1.symbols.sparc64 index e8c86be..6e7e4fe 100644 --- a/debian/libgcc1.symbols.sparc64 +++ b/debian/libgcc1.symbols.sparc64 @@ -8,6 +8,7 @@ libgcc_s.so.1 libgcc1 #MINVER# GCC_4.0.0@GCC_4.0.0 1:4.1.1 GCC_4.2.0@GCC_4.2.0 1:4.1.1 GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.2@GLIBC_2.2 1:4.1.1 _Unwind_Backtrace@GCC_3.3 1:4.1.1 _Unwind_DeleteException@GCC_3.0 1:4.1.1 diff --git a/debian/libgcc2.symbols.m68k b/debian/libgcc2.symbols.m68k index 1250895..f215ddb 100644 --- a/debian/libgcc2.symbols.m68k +++ b/debian/libgcc2.symbols.m68k @@ -8,6 +8,7 @@ libgcc_s.so.2 libgcc2 #MINVER# GCC_4.0.0@GCC_4.0.0 4.2.1 GCC_4.2.0@GCC_4.2.0 4.2.1 GCC_4.3.0@GCC_4.3.0 4.3.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.0@GLIBC_2.0 4.2.1 _Unwind_Backtrace@GCC_3.3 4.2.1 _Unwind_DeleteException@GCC_3.0 4.2.1 diff --git a/debian/libgcc4.symbols.hppa b/debian/libgcc4.symbols.hppa index f5220f2..b6662f2 100644 --- a/debian/libgcc4.symbols.hppa +++ b/debian/libgcc4.symbols.hppa @@ -7,6 +7,7 @@ libgcc_s.so.4 libgcc4 #MINVER# GCC_4.0.0@GCC_4.0.0 4.1.1 GCC_4.2.0@GCC_4.2.0 4.1.1 GCC_4.3.0@GCC_4.3.0 4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.0@GLIBC_2.0 4.1.1 _Unwind_Backtrace@GCC_3.3 4.1.1 _Unwind_DeleteException@GCC_3.0 4.1.1 diff --git a/debian/libgcj-doc.doc-base b/debian/libgcj-doc.doc-base index c58c9b9..e03e959 100644 --- a/debian/libgcj-doc.doc-base +++ b/debian/libgcj-doc.doc-base @@ -2,9 +2,9 @@ Document: libgcj-doc Title: The GNU LibGCJ Classpath library Author: Various Abstract: Autogenerated documentation describing the libgcj - library (GCC 4.6), based on the classpath library. + library (GCC 4.7), based on the classpath library. Section: Programming/Java Format: html -Index: /usr/share/doc/gcj-4.6-base/api/index.html -Files: /usr/share/doc/gcj-4.6-base/api/*.html +Index: /usr/share/doc/gcj-4.7-base/api/index.html +Files: /usr/share/doc/gcj-4.7-base/api/*.html diff --git a/debian/libgfortran3.symbols.i386 b/debian/libgfortran3.symbols.i386 index a4e4187..4f900ec 100644 --- a/debian/libgfortran3.symbols.i386 +++ b/debian/libgfortran3.symbols.i386 @@ -1,3 +1,9 @@ libgfortran.so.3 libgfortran3 #MINVER# #include "libgfortran3.symbols.common" #include "libgfortran3.symbols.10" +#include "libgfortran3.symbols.16.powerpc" + _gfortran_norm2_r10@GFORTRAN_1.4 4.6 + _gfortran_transfer_complex128@GFORTRAN_1.4 4.6 + _gfortran_transfer_complex128_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_real128@GFORTRAN_1.4 4.6 + _gfortran_transfer_real128_write@GFORTRAN_1.4 4.6 diff --git a/debian/libgnat-BV.overrides b/debian/libgnat-BV.overrides index fe6aafe..8038bac 100644 --- a/debian/libgnat-BV.overrides +++ b/debian/libgnat-BV.overrides @@ -1 +1 @@ -libgnat-@BV@: package-name-doesnt-match-sonames +libgnat-@BV@ binary: package-name-doesnt-match-sonames diff --git a/debian/libgnatprjBV.overrides b/debian/libgnatprjBV.overrides index c525dbd..20b359e 100644 --- a/debian/libgnatprjBV.overrides +++ b/debian/libgnatprjBV.overrides @@ -1 +1 @@ -libgnatprj@BV@: missing-dependency-on-libc +libgnatprj@BV@ binary: missing-dependency-on-libc diff --git a/debian/libgnatvsnBV.overrides b/debian/libgnatvsnBV.overrides index 427ddea..d1bd4d3 100644 --- a/debian/libgnatvsnBV.overrides +++ b/debian/libgnatvsnBV.overrides @@ -1 +1 @@ -libgnatvsn@BV@: missing-dependency-on-libc +libgnatvsn@BV@ binary: missing-dependency-on-libc diff --git a/debian/libgomp1.symbols.common b/debian/libgomp1.symbols.common index 491d4d8..53941a3 100644 --- a/debian/libgomp1.symbols.common +++ b/debian/libgomp1.symbols.common @@ -1,5 +1,6 @@ GOMP_1.0@GOMP_1.0 4.2.1 GOMP_2.0@GOMP_2.0 4.4 + GOMP_3.0@GOMP_3.0 4.7 GOMP_atomic_end@GOMP_1.0 4.2.1 GOMP_atomic_start@GOMP_1.0 4.2.1 GOMP_barrier@GOMP_1.0 4.2.1 @@ -59,9 +60,11 @@ GOMP_single_start@GOMP_1.0 4.2.1 GOMP_task@GOMP_2.0 4.4 GOMP_taskwait@GOMP_2.0 4.4 + GOMP_taskyield@GOMP_3.0 4.7 OMP_1.0@OMP_1.0 4.2.1 OMP_2.0@OMP_2.0 4.2.1 OMP_3.0@OMP_3.0 4.4 + OMP_3.1@OMP_3.1 4.7 omp_destroy_lock@OMP_1.0 4.2.1 omp_destroy_lock@OMP_3.0 4.4 omp_destroy_lock_@OMP_1.0 4.2.1 @@ -103,6 +106,8 @@ omp_get_wtick_@OMP_2.0 4.2.1 omp_get_wtime@OMP_2.0 4.2.1 omp_get_wtime_@OMP_2.0 4.2.1 + omp_in_final@OMP_3.1 4.7 + omp_in_final_@OMP_3.1 4.7 omp_in_parallel@OMP_1.0 4.2.1 omp_in_parallel_@OMP_1.0 4.2.1 omp_init_lock@OMP_1.0 4.2.1 diff --git a/debian/libhfgcc1.symbols.armel b/debian/libhfgcc1.symbols.armel index 4f36260..69dd7f5 100644 --- a/debian/libhfgcc1.symbols.armel +++ b/debian/libhfgcc1.symbols.armel @@ -10,6 +10,7 @@ libgcc_s.so.1 libhfgcc1 #MINVER# GCC_4.0.0@GCC_4.0.0 1:4.1.1 GCC_4.2.0@GCC_4.2.0 1:4.1.1 GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 GLIBC_2.0@GLIBC_2.0 1:4.1.1 _Unwind_Backtrace@GCC_4.3.0 1:4.3.0 _Unwind_Complete@GCC_3.5 1:4.3.0 diff --git a/debian/libitm1.symbols b/debian/libitm1.symbols new file mode 100644 index 0000000..c53d1c6 --- /dev/null +++ b/debian/libitm1.symbols @@ -0,0 +1,4 @@ +libitm.so.1 libitm1 #MINVER# +#include "libitm1.symbols.common" +(arch=!alpha !amd64 !ia64 !ppc64 !s390x !sparc64 !kfreebsd-amd64)#include "libitm1.symbols.32bit" +(arch=alpha amd64 ia64 ppc64 s390x sparc64 kfreebsd-amd64)#include "libitm1.symbols.64bit" diff --git a/debian/libitm1.symbols.32bit b/debian/libitm1.symbols.32bit new file mode 100644 index 0000000..291d7fb --- /dev/null +++ b/debian/libitm1.symbols.32bit @@ -0,0 +1,4 @@ + _ZGTtnaj@LIBITM_1.0 4.7 + _ZGTtnajRKSt9nothrow_t@LIBITM_1.0 4.7 + _ZGTtnwj@LIBITM_1.0 4.7 + _ZGTtnwjRKSt9nothrow_t@LIBITM_1.0 4.7 diff --git a/debian/libitm1.symbols.64bit b/debian/libitm1.symbols.64bit new file mode 100644 index 0000000..0c3af40 --- /dev/null +++ b/debian/libitm1.symbols.64bit @@ -0,0 +1,4 @@ + _ZGTtnam@LIBITM_1.0 4.7 + _ZGTtnamRKSt9nothrow_t@LIBITM_1.0 4.7 + _ZGTtnwm@LIBITM_1.0 4.7 + _ZGTtnwmRKSt9nothrow_t@LIBITM_1.0 4.7 diff --git a/debian/libitm1.symbols.common b/debian/libitm1.symbols.common new file mode 100644 index 0000000..debb07b --- /dev/null +++ b/debian/libitm1.symbols.common @@ -0,0 +1,167 @@ + LIBITM_1.0@LIBITM_1.0 4.7 + _ITM_LB@LIBITM_1.0 4.7 + _ITM_LCD@LIBITM_1.0 4.7 + _ITM_LCE@LIBITM_1.0 4.7 + _ITM_LCF@LIBITM_1.0 4.7 + _ITM_LD@LIBITM_1.0 4.7 + _ITM_LE@LIBITM_1.0 4.7 + _ITM_LF@LIBITM_1.0 4.7 + _ITM_LM128@LIBITM_1.0 4.7 + _ITM_LM256@LIBITM_1.0 4.7 + _ITM_LM64@LIBITM_1.0 4.7 + _ITM_LU1@LIBITM_1.0 4.7 + _ITM_LU2@LIBITM_1.0 4.7 + _ITM_LU4@LIBITM_1.0 4.7 + _ITM_LU8@LIBITM_1.0 4.7 + _ITM_RCD@LIBITM_1.0 4.7 + _ITM_RCE@LIBITM_1.0 4.7 + _ITM_RCF@LIBITM_1.0 4.7 + _ITM_RD@LIBITM_1.0 4.7 + _ITM_RE@LIBITM_1.0 4.7 + _ITM_RF@LIBITM_1.0 4.7 + _ITM_RM128@LIBITM_1.0 4.7 + _ITM_RM256@LIBITM_1.0 4.7 + _ITM_RM64@LIBITM_1.0 4.7 + _ITM_RU1@LIBITM_1.0 4.7 + _ITM_RU2@LIBITM_1.0 4.7 + _ITM_RU4@LIBITM_1.0 4.7 + _ITM_RU8@LIBITM_1.0 4.7 + _ITM_RaRCD@LIBITM_1.0 4.7 + _ITM_RaRCE@LIBITM_1.0 4.7 + _ITM_RaRCF@LIBITM_1.0 4.7 + _ITM_RaRD@LIBITM_1.0 4.7 + _ITM_RaRE@LIBITM_1.0 4.7 + _ITM_RaRF@LIBITM_1.0 4.7 + _ITM_RaRM128@LIBITM_1.0 4.7 + _ITM_RaRM256@LIBITM_1.0 4.7 + _ITM_RaRM64@LIBITM_1.0 4.7 + _ITM_RaRU1@LIBITM_1.0 4.7 + _ITM_RaRU2@LIBITM_1.0 4.7 + _ITM_RaRU4@LIBITM_1.0 4.7 + _ITM_RaRU8@LIBITM_1.0 4.7 + _ITM_RaWCD@LIBITM_1.0 4.7 + _ITM_RaWCE@LIBITM_1.0 4.7 + _ITM_RaWCF@LIBITM_1.0 4.7 + _ITM_RaWD@LIBITM_1.0 4.7 + _ITM_RaWE@LIBITM_1.0 4.7 + _ITM_RaWF@LIBITM_1.0 4.7 + _ITM_RaWM128@LIBITM_1.0 4.7 + _ITM_RaWM256@LIBITM_1.0 4.7 + _ITM_RaWM64@LIBITM_1.0 4.7 + _ITM_RaWU1@LIBITM_1.0 4.7 + _ITM_RaWU2@LIBITM_1.0 4.7 + _ITM_RaWU4@LIBITM_1.0 4.7 + _ITM_RaWU8@LIBITM_1.0 4.7 + _ITM_RfWCD@LIBITM_1.0 4.7 + _ITM_RfWCE@LIBITM_1.0 4.7 + _ITM_RfWCF@LIBITM_1.0 4.7 + _ITM_RfWD@LIBITM_1.0 4.7 + _ITM_RfWE@LIBITM_1.0 4.7 + _ITM_RfWF@LIBITM_1.0 4.7 + _ITM_RfWM128@LIBITM_1.0 4.7 + _ITM_RfWM256@LIBITM_1.0 4.7 + _ITM_RfWM64@LIBITM_1.0 4.7 + _ITM_RfWU1@LIBITM_1.0 4.7 + _ITM_RfWU2@LIBITM_1.0 4.7 + _ITM_RfWU4@LIBITM_1.0 4.7 + _ITM_RfWU8@LIBITM_1.0 4.7 + _ITM_WCD@LIBITM_1.0 4.7 + _ITM_WCE@LIBITM_1.0 4.7 + _ITM_WCF@LIBITM_1.0 4.7 + _ITM_WD@LIBITM_1.0 4.7 + _ITM_WE@LIBITM_1.0 4.7 + _ITM_WF@LIBITM_1.0 4.7 + _ITM_WM128@LIBITM_1.0 4.7 + _ITM_WM256@LIBITM_1.0 4.7 + _ITM_WM64@LIBITM_1.0 4.7 + _ITM_WU1@LIBITM_1.0 4.7 + _ITM_WU2@LIBITM_1.0 4.7 + _ITM_WU4@LIBITM_1.0 4.7 + _ITM_WU8@LIBITM_1.0 4.7 + _ITM_WaRCD@LIBITM_1.0 4.7 + _ITM_WaRCE@LIBITM_1.0 4.7 + _ITM_WaRCF@LIBITM_1.0 4.7 + _ITM_WaRD@LIBITM_1.0 4.7 + _ITM_WaRE@LIBITM_1.0 4.7 + _ITM_WaRF@LIBITM_1.0 4.7 + _ITM_WaRM128@LIBITM_1.0 4.7 + _ITM_WaRM256@LIBITM_1.0 4.7 + _ITM_WaRM64@LIBITM_1.0 4.7 + _ITM_WaRU1@LIBITM_1.0 4.7 + _ITM_WaRU2@LIBITM_1.0 4.7 + _ITM_WaRU4@LIBITM_1.0 4.7 + _ITM_WaRU8@LIBITM_1.0 4.7 + _ITM_WaWCD@LIBITM_1.0 4.7 + _ITM_WaWCE@LIBITM_1.0 4.7 + _ITM_WaWCF@LIBITM_1.0 4.7 + _ITM_WaWD@LIBITM_1.0 4.7 + _ITM_WaWE@LIBITM_1.0 4.7 + _ITM_WaWF@LIBITM_1.0 4.7 + _ITM_WaWM128@LIBITM_1.0 4.7 + _ITM_WaWM256@LIBITM_1.0 4.7 + _ITM_WaWM64@LIBITM_1.0 4.7 + _ITM_WaWU1@LIBITM_1.0 4.7 + _ITM_WaWU2@LIBITM_1.0 4.7 + _ITM_WaWU4@LIBITM_1.0 4.7 + _ITM_WaWU8@LIBITM_1.0 4.7 + _ITM_abortTransaction@LIBITM_1.0 4.7 + _ITM_addUserCommitAction@LIBITM_1.0 4.7 + _ITM_addUserUndoAction@LIBITM_1.0 4.7 + _ITM_beginTransaction@LIBITM_1.0 4.7 + _ITM_calloc@LIBITM_1.0 4.7 + _ITM_changeTransactionMode@LIBITM_1.0 4.7 + _ITM_commitTransaction@LIBITM_1.0 4.7 + _ITM_commitTransactionEH@LIBITM_1.0 4.7 + _ITM_cxa_allocate_exception@LIBITM_1.0 4.7 + _ITM_cxa_begin_catch@LIBITM_1.0 4.7 + _ITM_cxa_end_catch@LIBITM_1.0 4.7 + _ITM_cxa_throw@LIBITM_1.0 4.7 + _ITM_deregisterTMCloneTable@LIBITM_1.0 4.7 + _ITM_dropReferences@LIBITM_1.0 4.7 + _ITM_error@LIBITM_1.0 4.7 + _ITM_free@LIBITM_1.0 4.7 + _ITM_getTMCloneOrIrrevocable@LIBITM_1.0 4.7 + _ITM_getTMCloneSafe@LIBITM_1.0 4.7 + _ITM_getTransactionId@LIBITM_1.0 4.7 + _ITM_inTransaction@LIBITM_1.0 4.7 + _ITM_libraryVersion@LIBITM_1.0 4.7 + _ITM_malloc@LIBITM_1.0 4.7 + _ITM_memcpyRnWt@LIBITM_1.0 4.7 + _ITM_memcpyRnWtaR@LIBITM_1.0 4.7 + _ITM_memcpyRnWtaW@LIBITM_1.0 4.7 + _ITM_memcpyRtWn@LIBITM_1.0 4.7 + _ITM_memcpyRtWt@LIBITM_1.0 4.7 + _ITM_memcpyRtWtaR@LIBITM_1.0 4.7 + _ITM_memcpyRtWtaW@LIBITM_1.0 4.7 + _ITM_memcpyRtaRWn@LIBITM_1.0 4.7 + _ITM_memcpyRtaRWt@LIBITM_1.0 4.7 + _ITM_memcpyRtaRWtaR@LIBITM_1.0 4.7 + _ITM_memcpyRtaRWtaW@LIBITM_1.0 4.7 + _ITM_memcpyRtaWWn@LIBITM_1.0 4.7 + _ITM_memcpyRtaWWt@LIBITM_1.0 4.7 + _ITM_memcpyRtaWWtaR@LIBITM_1.0 4.7 + _ITM_memcpyRtaWWtaW@LIBITM_1.0 4.7 + _ITM_memmoveRnWt@LIBITM_1.0 4.7 + _ITM_memmoveRnWtaR@LIBITM_1.0 4.7 + _ITM_memmoveRnWtaW@LIBITM_1.0 4.7 + _ITM_memmoveRtWn@LIBITM_1.0 4.7 + _ITM_memmoveRtWt@LIBITM_1.0 4.7 + _ITM_memmoveRtWtaR@LIBITM_1.0 4.7 + _ITM_memmoveRtWtaW@LIBITM_1.0 4.7 + _ITM_memmoveRtaRWn@LIBITM_1.0 4.7 + _ITM_memmoveRtaRWt@LIBITM_1.0 4.7 + _ITM_memmoveRtaRWtaR@LIBITM_1.0 4.7 + _ITM_memmoveRtaRWtaW@LIBITM_1.0 4.7 + _ITM_memmoveRtaWWn@LIBITM_1.0 4.7 + _ITM_memmoveRtaWWt@LIBITM_1.0 4.7 + _ITM_memmoveRtaWWtaR@LIBITM_1.0 4.7 + _ITM_memmoveRtaWWtaW@LIBITM_1.0 4.7 + _ITM_memsetW@LIBITM_1.0 4.7 + _ITM_memsetWaR@LIBITM_1.0 4.7 + _ITM_memsetWaW@LIBITM_1.0 4.7 + _ITM_registerTMCloneTable@LIBITM_1.0 4.7 + _ITM_versionCompatible@LIBITM_1.0 4.7 + _ZGTtdaPv@LIBITM_1.0 4.7 + _ZGTtdaPvRKSt9nothrow_t@LIBITM_1.0 4.7 + _ZGTtdlPv@LIBITM_1.0 4.7 + _ZGTtdlPvRKSt9nothrow_t@LIBITM_1.0 4.7 diff --git a/debian/libobjc2.symbols.arm b/debian/libobjc2.symbols.arm deleted file mode 100644 index b48ea0f..0000000 --- a/debian/libobjc2.symbols.arm +++ /dev/null @@ -1,4 +0,0 @@ -libobjc.so.3 libobjc3 #MINVER# -#include "libobjc3.symbols.common" - __gnu_objc_personality_sj0@Base 4.2.1 - __objc_exception_class@Base 4.4.0 diff --git a/debian/libobjc3.symbols b/debian/libobjc3.symbols deleted file mode 100644 index 227af17..0000000 --- a/debian/libobjc3.symbols +++ /dev/null @@ -1,3 +0,0 @@ -libobjc.so.3 libobjc3 #MINVER# -#include "libobjc3.symbols.common" - __gnu_objc_personality_v0@Base 4.2.1 diff --git a/debian/libobjc4.symbols b/debian/libobjc4.symbols new file mode 100644 index 0000000..dd5638f --- /dev/null +++ b/debian/libobjc4.symbols @@ -0,0 +1,3 @@ +libobjc.so.4 libobjc4 #MINVER# +#include "libobjc4.symbols.common" + __gnu_objc_personality_v0@Base 4.2.1 diff --git a/debian/libobjc3.symbols.armhf b/debian/libobjc4.symbols.armel index 7026ad3..15e0c99 100644 --- a/debian/libobjc3.symbols.armhf +++ b/debian/libobjc4.symbols.armel @@ -1,4 +1,4 @@ -libobjc.so.3 libobjc3 #MINVER# -#include "libobjc3.symbols.common" +libobjc.so.4 libobjc4 #MINVER# +#include "libobjc4.symbols.common" __gnu_objc_personality_v0@Base 4.2.1 __objc_exception_class@Base 4.3.0 diff --git a/debian/libobjc3.symbols.armel b/debian/libobjc4.symbols.armhf index 7026ad3..15e0c99 100644 --- a/debian/libobjc3.symbols.armel +++ b/debian/libobjc4.symbols.armhf @@ -1,4 +1,4 @@ -libobjc.so.3 libobjc3 #MINVER# -#include "libobjc3.symbols.common" +libobjc.so.4 libobjc4 #MINVER# +#include "libobjc4.symbols.common" __gnu_objc_personality_v0@Base 4.2.1 __objc_exception_class@Base 4.3.0 diff --git a/debian/libobjc3.symbols.common b/debian/libobjc4.symbols.common index bd8153a..6eb80b2 100644 --- a/debian/libobjc3.symbols.common +++ b/debian/libobjc4.symbols.common @@ -1,7 +1,5 @@ __objc_accessors_init@Base 4.6 __objc_add_class_to_hash@Base 4.2.1 - __objc_category_name_Object_Deprecated@Base 4.6 - __objc_category_name_Protocol_Deprecated@Base 4.6 __objc_class_links_resolved@Base 4.2.1 __objc_class_name_NXConstantString@Base 4.2.1 __objc_class_name_Object@Base 4.2.1 @@ -24,8 +22,6 @@ __objc_print_dtable_stats@Base 4.2.1 __objc_protocols_add_protocol@Base 4.6 __objc_protocols_init@Base 4.6 - __objc_read_nbyte_uint@Base 4.2.1 - __objc_read_nbyte_ulong@Base 4.2.1 __objc_register_instance_methods_to_class@Base 4.2.1 __objc_register_selectors_from_class@Base 4.2.1 __objc_register_selectors_from_description_list@Base 4.6 @@ -42,23 +38,10 @@ __objc_uninstalled_dtable@Base 4.2.1 __objc_update_classes_with_methods@Base 4.6 __objc_update_dispatch_table_for_class@Base 4.2.1 - __objc_write_class@Base 4.2.1 - __objc_write_object@Base 4.2.1 - __objc_write_selector@Base 4.2.1 _objc_abort@Base 4.6 - _objc_atomic_malloc@Base 4.2.1 _objc_became_multi_threaded@Base 4.2.1 - _objc_calloc@Base 4.2.1 - _objc_free@Base 4.2.1 _objc_load_callback@Base 4.2.1 _objc_lookup_class@Base 4.6 - _objc_malloc@Base 4.2.1 - _objc_object_alloc@Base 4.2.1 - _objc_object_copy@Base 4.2.1 - _objc_object_dispose@Base 4.2.1 - _objc_realloc@Base 4.2.1 - _objc_unexpected_exception@Base 4.4.0 - _objc_valloc@Base 4.2.1 class_addIvar@Base 4.6 class_addMethod@Base 4.6 class_addProtocol@Base 4.6 @@ -69,7 +52,6 @@ class_copyPropertyList@Base 4.6 class_copyProtocolList@Base 4.6 class_createInstance@Base 4.6 - class_create_instance@Base 4.2.1 class_getClassMethod@Base 4.6 class_getClassVariable@Base 4.6 class_getInstanceMethod@Base 4.6 @@ -82,11 +64,8 @@ class_getSuperclass@Base 4.6 class_getVersion@Base 4.6 class_getWeakIvarLayout@Base 4.6 - class_get_class_method@Base 4.2.1 - class_get_instance_method@Base 4.2.1 class_isMetaClass@Base 4.6 class_ivar_set_gcinvisible@Base 4.2.1 - class_pose_as@Base 4.2.1 class_replaceMethod@Base 4.6 class_respondsToSelector@Base 4.6 class_setIvarLayout@Base 4.6 @@ -107,12 +86,7 @@ method_getNumberOfArguments@Base 4.6 method_getReturnType@Base 4.6 method_getTypeEncoding@Base 4.6 - method_get_first_argument@Base 4.2.1 method_get_imp@Base 4.6 - method_get_next_argument@Base 4.2.1 - method_get_nth_argument@Base 4.2.1 - method_get_number_of_arguments@Base 4.2.1 - method_get_sizeof_arguments@Base 4.2.1 method_setImplementation@Base 4.6 narrays@Base 4.2.1 nbuckets@Base 4.2.1 @@ -123,7 +97,6 @@ objc_allocateClassPair@Base 4.6 objc_atomic_malloc@Base 4.2.1 objc_calloc@Base 4.2.1 - objc_close_typed_stream@Base 4.2.1 objc_condition_allocate@Base 4.2.1 objc_condition_broadcast@Base 4.2.1 objc_condition_deallocate@Base 4.2.1 @@ -132,11 +105,8 @@ objc_copyProtocolList@Base 4.6 objc_copyStruct@Base 4.6 objc_disposeClassPair@Base 4.6 - objc_end_of_typed_stream@Base 4.2.1 objc_enumerationMutation@Base 4.6 - objc_error@Base 4.2.1 objc_exception_throw@Base 4.2.1 - objc_flush_typed_stream@Base 4.2.1 objc_free@Base 4.2.1 objc_getClass@Base 4.6 objc_getClassList@Base 4.6 @@ -147,9 +117,7 @@ objc_getRequiredClass@Base 4.6 objc_get_class@Base 4.2.1 objc_get_meta_class@Base 4.2.1 - objc_get_stream_class_version@Base 4.2.1 objc_get_type_qualifiers@Base 4.2.1 - objc_get_uninstalled_dtable@Base 4.2.1 objc_hash_add@Base 4.2.1 objc_hash_delete@Base 4.2.1 objc_hash_is_key_in_hash@Base 4.2.1 @@ -166,30 +134,12 @@ objc_malloc@Base 4.2.1 objc_msg_lookup@Base 4.2.1 objc_msg_lookup_super@Base 4.2.1 - objc_msg_sendv@Base 4.2.1 objc_mutex_allocate@Base 4.2.1 objc_mutex_deallocate@Base 4.2.1 objc_mutex_lock@Base 4.2.1 objc_mutex_trylock@Base 4.2.1 objc_mutex_unlock@Base 4.2.1 - objc_next_class@Base 4.2.1 - objc_open_typed_stream@Base 4.2.1 - objc_open_typed_stream_for_file@Base 4.2.1 objc_promoted_size@Base 4.2.1 - objc_read_array@Base 4.2.1 - objc_read_char@Base 4.2.1 - objc_read_int@Base 4.2.1 - objc_read_long@Base 4.2.1 - objc_read_object@Base 4.2.1 - objc_read_selector@Base 4.2.1 - objc_read_short@Base 4.2.1 - objc_read_string@Base 4.2.1 - objc_read_type@Base 4.2.1 - objc_read_types@Base 4.2.1 - objc_read_unsigned_char@Base 4.2.1 - objc_read_unsigned_int@Base 4.2.1 - objc_read_unsigned_long@Base 4.2.1 - objc_read_unsigned_short@Base 4.2.1 objc_realloc@Base 4.2.1 objc_registerClassPair@Base 4.6 objc_setEnumerationMutationHandler@Base 4.6 @@ -198,7 +148,6 @@ objc_setProperty@Base 4.6 objc_setPropertyStruct@Base 4.6 objc_setUncaughtExceptionHandler@Base 4.6 - objc_set_error_handler@Base 4.2.1 objc_set_thread_callback@Base 4.2.1 objc_sizeof_type@Base 4.2.1 objc_skip_argspec@Base 4.2.1 @@ -217,25 +166,6 @@ objc_thread_set_data@Base 4.2.1 objc_thread_set_priority@Base 4.2.1 objc_thread_yield@Base 4.2.1 - objc_valloc@Base 4.2.1 - objc_verror@Base 4.2.1 - objc_write_array@Base 4.2.1 - objc_write_char@Base 4.2.1 - objc_write_int@Base 4.2.1 - objc_write_long@Base 4.2.1 - objc_write_object@Base 4.2.1 - objc_write_object_reference@Base 4.2.1 - objc_write_root_object@Base 4.2.1 - objc_write_selector@Base 4.2.1 - objc_write_short@Base 4.2.1 - objc_write_string@Base 4.2.1 - objc_write_string_atomic@Base 4.2.1 - objc_write_type@Base 4.2.1 - objc_write_types@Base 4.2.1 - objc_write_unsigned_char@Base 4.2.1 - objc_write_unsigned_int@Base 4.2.1 - objc_write_unsigned_long@Base 4.2.1 - objc_write_unsigned_short@Base 4.2.1 object_copy@Base 4.2.1 object_dispose@Base 4.2.1 object_getClassName@Base 4.6 @@ -268,16 +198,8 @@ sel_getTypeEncoding@Base 4.6 sel_getTypedSelector@Base 4.6 sel_getUid@Base 4.6 - sel_get_any_typed_uid@Base 4.2.1 sel_get_any_uid@Base 4.2.1 - sel_get_name@Base 4.2.1 - sel_get_type@Base 4.2.1 - sel_get_typed_uid@Base 4.2.1 - sel_get_uid@Base 4.2.1 sel_isEqual@Base 4.6 sel_is_mapped@Base 4.2.1 sel_registerName@Base 4.6 sel_registerTypedName@Base 4.6 - sel_register_name@Base 4.2.1 - sel_register_typed_name@Base 4.2.1 - sel_types_match@Base 4.2.1 diff --git a/debian/libstdc++6.symbols.128bit b/debian/libstdc++6.symbols.128bit new file mode 100644 index 0000000..5f9736d --- /dev/null +++ b/debian/libstdc++6.symbols.128bit @@ -0,0 +1,46 @@ + _ZNSt14numeric_limitsInE10has_denormE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE10is_boundedE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE10is_integerE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE11round_styleE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE12has_infinityE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE12max_digits10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE12max_exponentE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE12min_exponentE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE13has_quiet_NaNE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE14is_specializedE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE14max_exponent10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE14min_exponent10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE15has_denorm_lossE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE15tinyness_beforeE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE17has_signaling_NaNE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE5radixE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE5trapsE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE6digitsE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE8digits10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE8is_exactE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE9is_iec559E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE9is_moduloE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE9is_signedE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE10has_denormE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE10is_boundedE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE10is_integerE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE11round_styleE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE12has_infinityE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE12max_digits10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE12max_exponentE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE12min_exponentE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE13has_quiet_NaNE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE14is_specializedE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE14max_exponent10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE14min_exponent10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE15has_denorm_lossE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE15tinyness_beforeE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE17has_signaling_NaNE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE5radixE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE5trapsE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE6digitsE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE8digits10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE8is_exactE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE9is_iec559E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE9is_moduloE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE9is_signedE@GLIBCXX_3.4.17 4.7 diff --git a/debian/libstdc++6.symbols.amd64 b/debian/libstdc++6.symbols.amd64 index ba58be0..f4d33f2 100644 --- a/debian/libstdc++6.symbols.amd64 +++ b/debian/libstdc++6.symbols.amd64 @@ -1,5 +1,6 @@ libstdc++.so.6 libstdc++6 #MINVER# #include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" #include "libstdc++6.symbols.excprop" _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 diff --git a/debian/libstdc++6.symbols.common b/debian/libstdc++6.symbols.common index b8794f8..6a2b2ea 100644 --- a/debian/libstdc++6.symbols.common +++ b/debian/libstdc++6.symbols.common @@ -3,14 +3,17 @@ CXXABI_1.3.3@CXXABI_1.3.3 4.4.0 CXXABI_1.3.4@CXXABI_1.3.4 4.5 CXXABI_1.3.5@CXXABI_1.3.5 4.6 + CXXABI_1.3.6@CXXABI_1.3.6 4.7 CXXABI_1.3@CXXABI_1.3 4.1.1 + CXXABI_TM_1@CXXABI_TM_1 4.7 GLIBCXX_3.4.10@GLIBCXX_3.4.10 4.3 GLIBCXX_3.4.11@GLIBCXX_3.4.11 4.4.0 GLIBCXX_3.4.12@GLIBCXX_3.4.12 4.4.0 - GLIBCXX_3.4.13@GLIBCXX_3.4.13 4.4.1-4 + GLIBCXX_3.4.13@GLIBCXX_3.4.13 4.4.2 GLIBCXX_3.4.14@GLIBCXX_3.4.14 4.5 GLIBCXX_3.4.15@GLIBCXX_3.4.15 4.6 GLIBCXX_3.4.16@GLIBCXX_3.4.16 4.6.0 + GLIBCXX_3.4.17@GLIBCXX_3.4.17 4.7 GLIBCXX_3.4.1@GLIBCXX_3.4.1 4.1.1 GLIBCXX_3.4.2@GLIBCXX_3.4.2 4.1.1 GLIBCXX_3.4.3@GLIBCXX_3.4.3 4.1.1 @@ -90,6 +93,10 @@ _ZN11__gnu_debug19_Safe_sequence_base18_M_detach_singularEv@GLIBCXX_3.4 4.1.1 _ZN11__gnu_debug19_Safe_sequence_base22_M_revalidate_singularEv@GLIBCXX_3.4 4.1.1 _ZN11__gnu_debug19_Safe_sequence_base7_M_swapERS0_@GLIBCXX_3.4 4.1.1 + _ZN11__gnu_debug25_Safe_local_iterator_base9_M_attachEPNS_19_Safe_sequence_baseEb@GLIBCXX_3.4.17 4.7 + _ZN11__gnu_debug25_Safe_local_iterator_base9_M_detachEv@GLIBCXX_3.4.17 4.7 + _ZN11__gnu_debug30_Safe_unordered_container_base13_M_detach_allEv@GLIBCXX_3.4.17 4.7 + _ZN11__gnu_debug30_Safe_unordered_container_base7_M_swapERS0_@GLIBCXX_3.4.17 4.7 _ZN14__gnu_parallel9_Settings3getEv@GLIBCXX_3.4.10 4.3.0~rc2 _ZN14__gnu_parallel9_Settings3setERS0_@GLIBCXX_3.4.10 4.3.0~rc2 _ZN9__gnu_cxx17__pool_alloc_base12_M_get_mutexEv@GLIBCXX_3.4.2 4.1.1 @@ -719,6 +726,7 @@ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_S5_S5_@GLIBCXX_3.4 4.1.1 _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_S6_S6_@GLIBCXX_3.4 4.1.1 _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_St16initializer_listIwE@GLIBCXX_3.4.11 4.4.0 + _ZNSbIwSt11char_traitsIwESaIwEE8pop_backEv@GLIBCXX_3.4.17 4.7 _ZNSbIwSt11char_traitsIwESaIwEE9push_backEw@GLIBCXX_3.4 4.1.1 _ZNSbIwSt11char_traitsIwESaIwEEC1EOS2_@GLIBCXX_3.4.14 4.5 _ZNSbIwSt11char_traitsIwESaIwEEC1EPKwRKS1_@GLIBCXX_3.4 4.1.1 @@ -897,6 +905,7 @@ _ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_S1_S1_@GLIBCXX_3.4 4.1.1 _ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_S2_S2_@GLIBCXX_3.4 4.1.1 _ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_St16initializer_listIcE@GLIBCXX_3.4.11 4.4.0 + _ZNSs8pop_backEv@GLIBCXX_3.4.17 4.7 _ZNSs9push_backEc@GLIBCXX_3.4 4.1.1 _ZNSsC1EOSs@GLIBCXX_3.4.14 4.5 _ZNSsC1EPKcRKSaIcE@GLIBCXX_3.4 4.1.1 @@ -1112,7 +1121,7 @@ _ZNSt13basic_filebufIcSt11char_traitsIcEE26_M_destroy_internal_bufferEv@GLIBCXX_3.4 4.1.1 _ZNSt13basic_filebufIcSt11char_traitsIcEE27_M_allocate_internal_bufferEv@GLIBCXX_3.4 4.1.1 _ZNSt13basic_filebufIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1 - _ZNSt13basic_filebufIcSt11char_traitsIcEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.1-4 + _ZNSt13basic_filebufIcSt11char_traitsIcEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2 _ZNSt13basic_filebufIcSt11char_traitsIcEE4syncEv@GLIBCXX_3.4 4.1.1 _ZNSt13basic_filebufIcSt11char_traitsIcEE5closeEv@GLIBCXX_3.4 4.1.1 _ZNSt13basic_filebufIcSt11char_traitsIcEE5imbueERKSt6locale@GLIBCXX_3.4 4.1.1 @@ -1133,7 +1142,7 @@ _ZNSt13basic_filebufIwSt11char_traitsIwEE26_M_destroy_internal_bufferEv@GLIBCXX_3.4 4.1.1 _ZNSt13basic_filebufIwSt11char_traitsIwEE27_M_allocate_internal_bufferEv@GLIBCXX_3.4 4.1.1 _ZNSt13basic_filebufIwSt11char_traitsIwEE4openEPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1 - _ZNSt13basic_filebufIwSt11char_traitsIwEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.1-4 + _ZNSt13basic_filebufIwSt11char_traitsIwEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2 _ZNSt13basic_filebufIwSt11char_traitsIwEE4syncEv@GLIBCXX_3.4 4.1.1 _ZNSt13basic_filebufIwSt11char_traitsIwEE5closeEv@GLIBCXX_3.4 4.1.1 _ZNSt13basic_filebufIwSt11char_traitsIwEE5imbueERKSt6locale@GLIBCXX_3.4 4.1.1 @@ -1148,27 +1157,27 @@ _ZNSt13basic_filebufIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 _ZNSt13basic_filebufIwSt11char_traitsIwEED2Ev@GLIBCXX_3.4 4.1.1 _ZNSt13basic_fstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1 - _ZNSt13basic_fstreamIcSt11char_traitsIcEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.1-4 + _ZNSt13basic_fstreamIcSt11char_traitsIcEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2 _ZNSt13basic_fstreamIcSt11char_traitsIcEE5closeEv@GLIBCXX_3.4 4.1.1 _ZNSt13basic_fstreamIcSt11char_traitsIcEE7is_openEv@GLIBCXX_3.4 4.1.1 _ZNSt13basic_fstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1 - _ZNSt13basic_fstreamIcSt11char_traitsIcEEC1ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.1-4 + _ZNSt13basic_fstreamIcSt11char_traitsIcEEC1ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2 _ZNSt13basic_fstreamIcSt11char_traitsIcEEC1Ev@GLIBCXX_3.4 4.1.1 _ZNSt13basic_fstreamIcSt11char_traitsIcEEC2EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1 - _ZNSt13basic_fstreamIcSt11char_traitsIcEEC2ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.1-4 + _ZNSt13basic_fstreamIcSt11char_traitsIcEEC2ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2 _ZNSt13basic_fstreamIcSt11char_traitsIcEEC2Ev@GLIBCXX_3.4 4.1.1 _ZNSt13basic_fstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1 _ZNSt13basic_fstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1 _ZNSt13basic_fstreamIcSt11char_traitsIcEED2Ev@GLIBCXX_3.4 4.1.1 _ZNSt13basic_fstreamIwSt11char_traitsIwEE4openEPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1 - _ZNSt13basic_fstreamIwSt11char_traitsIwEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.1-4 + _ZNSt13basic_fstreamIwSt11char_traitsIwEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2 _ZNSt13basic_fstreamIwSt11char_traitsIwEE5closeEv@GLIBCXX_3.4 4.1.1 _ZNSt13basic_fstreamIwSt11char_traitsIwEE7is_openEv@GLIBCXX_3.4 4.1.1 _ZNSt13basic_fstreamIwSt11char_traitsIwEEC1EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1 - _ZNSt13basic_fstreamIwSt11char_traitsIwEEC1ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.1-4 + _ZNSt13basic_fstreamIwSt11char_traitsIwEEC1ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2 _ZNSt13basic_fstreamIwSt11char_traitsIwEEC1Ev@GLIBCXX_3.4 4.1.1 _ZNSt13basic_fstreamIwSt11char_traitsIwEEC2EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1 - _ZNSt13basic_fstreamIwSt11char_traitsIwEEC2ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.1-4 + _ZNSt13basic_fstreamIwSt11char_traitsIwEEC2ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2 _ZNSt13basic_fstreamIwSt11char_traitsIwEEC2Ev@GLIBCXX_3.4 4.1.1 _ZNSt13basic_fstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 _ZNSt13basic_fstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 @@ -1268,27 +1277,27 @@ _ZNSt13runtime_errorD1Ev@GLIBCXX_3.4 4.1.1 _ZNSt13runtime_errorD2Ev@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1 - _ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.1-4 + _ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2 _ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ifstreamIcSt11char_traitsIcEE7is_openEv@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1 - _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.1-4 + _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2 _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1Ev@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC2EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1 - _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC2ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.1-4 + _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC2ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2 _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC2Ev@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ifstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ifstreamIcSt11char_traitsIcEED2Ev@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ifstreamIwSt11char_traitsIwEE4openEPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1 - _ZNSt14basic_ifstreamIwSt11char_traitsIwEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.1-4 + _ZNSt14basic_ifstreamIwSt11char_traitsIwEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2 _ZNSt14basic_ifstreamIwSt11char_traitsIwEE5closeEv@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ifstreamIwSt11char_traitsIwEE7is_openEv@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ifstreamIwSt11char_traitsIwEEC1EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1 - _ZNSt14basic_ifstreamIwSt11char_traitsIwEEC1ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.1-4 + _ZNSt14basic_ifstreamIwSt11char_traitsIwEEC1ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2 _ZNSt14basic_ifstreamIwSt11char_traitsIwEEC1Ev@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ifstreamIwSt11char_traitsIwEEC2EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1 - _ZNSt14basic_ifstreamIwSt11char_traitsIwEEC2ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.1-4 + _ZNSt14basic_ifstreamIwSt11char_traitsIwEEC2ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2 _ZNSt14basic_ifstreamIwSt11char_traitsIwEEC2Ev@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ifstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ifstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 @@ -1301,27 +1310,27 @@ _ZNSt14basic_iostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 _ZNSt14basic_iostreamIwSt11char_traitsIwEED2Ev@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1 - _ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.1-4 + _ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2 _ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ofstreamIcSt11char_traitsIcEE7is_openEv@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1 - _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.1-4 + _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2 _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC2EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1 - _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC2ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.1-4 + _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC2ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2 _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC2Ev@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ofstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ofstreamIcSt11char_traitsIcEED2Ev@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ofstreamIwSt11char_traitsIwEE4openEPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1 - _ZNSt14basic_ofstreamIwSt11char_traitsIwEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.1-4 + _ZNSt14basic_ofstreamIwSt11char_traitsIwEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2 _ZNSt14basic_ofstreamIwSt11char_traitsIwEE5closeEv@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ofstreamIwSt11char_traitsIwEE7is_openEv@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ofstreamIwSt11char_traitsIwEEC1EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1 - _ZNSt14basic_ofstreamIwSt11char_traitsIwEEC1ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.1-4 + _ZNSt14basic_ofstreamIwSt11char_traitsIwEEC1ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2 _ZNSt14basic_ofstreamIwSt11char_traitsIwEEC1Ev@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ofstreamIwSt11char_traitsIwEEC2EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1 - _ZNSt14basic_ofstreamIwSt11char_traitsIwEEC2ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.1-4 + _ZNSt14basic_ofstreamIwSt11char_traitsIwEEC2ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2 _ZNSt14basic_ofstreamIwSt11char_traitsIwEEC2Ev@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ofstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 _ZNSt14basic_ofstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 @@ -2102,6 +2111,7 @@ _ZNSt6localeD2Ev@GLIBCXX_3.4 4.1.1 _ZNSt6localeaSERKS_@GLIBCXX_3.4 4.1.1 _ZNSt6thread15_M_start_threadESt10shared_ptrINS_10_Impl_baseEE@GLIBCXX_3.4.11 4.4.0 + _ZNSt6thread20hardware_concurrencyEv@GLIBCXX_3.4.17 4.7 _ZNSt6thread4joinEv@GLIBCXX_3.4.11 4.4.0 _ZNSt6thread6detachEv@GLIBCXX_3.4.11 4.4.0 _ZNSt7codecvtIcc11__mbstate_tE2idE@GLIBCXX_3.4 4.1.1 @@ -3018,14 +3028,17 @@ _ZdlPvRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 __atomic_flag_for_address@GLIBCXX_3.4.11 4.4.0 __atomic_flag_wait_explicit@GLIBCXX_3.4.11 4.4.0 + __cxa_allocate_dependent_exception@CXXABI_1.3.6 4.7 __cxa_allocate_exception@CXXABI_1.3 4.1.1 __cxa_bad_cast@CXXABI_1.3 4.1.1 __cxa_bad_typeid@CXXABI_1.3 4.1.1 __cxa_begin_catch@CXXABI_1.3 4.1.1 __cxa_call_unexpected@CXXABI_1.3 4.1.1 __cxa_current_exception_type@CXXABI_1.3 4.1.1 + __cxa_deleted_virtual@CXXABI_1.3.6 4.7 __cxa_demangle@CXXABI_1.3 4.1.1 __cxa_end_catch@CXXABI_1.3 4.1.1 + __cxa_free_dependent_exception@CXXABI_1.3.6 4.7 __cxa_free_exception@CXXABI_1.3 4.1.1 __cxa_get_exception_ptr@CXXABI_1.3.1 4.1.1 __cxa_get_globals@CXXABI_1.3 4.1.1 @@ -3036,6 +3049,7 @@ __cxa_pure_virtual@CXXABI_1.3 4.1.1 __cxa_rethrow@CXXABI_1.3 4.1.1 __cxa_throw@CXXABI_1.3 4.1.1 + __cxa_tm_cleanup@CXXABI_TM_1 4.7 __cxa_vec_cctor@CXXABI_1.3 4.1.1 __cxa_vec_cleanup@CXXABI_1.3 4.1.1 __cxa_vec_ctor@CXXABI_1.3 4.1.1 diff --git a/debian/libstdc++6.symbols.kfreebsd-amd64 b/debian/libstdc++6.symbols.kfreebsd-amd64 index ba58be0..f4d33f2 100644 --- a/debian/libstdc++6.symbols.kfreebsd-amd64 +++ b/debian/libstdc++6.symbols.kfreebsd-amd64 @@ -1,5 +1,6 @@ libstdc++.so.6 libstdc++6 #MINVER# #include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" #include "libstdc++6.symbols.excprop" _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 diff --git a/debian/libstdc++6.symbols.ppc64 b/debian/libstdc++6.symbols.ppc64 index 19ac683..b6b3210 100644 --- a/debian/libstdc++6.symbols.ppc64 +++ b/debian/libstdc++6.symbols.ppc64 @@ -1,5 +1,6 @@ libstdc++.so.6 libstdc++6 #MINVER# #include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" #include "libstdc++6.symbols.excprop" _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 diff --git a/debian/libstdc++CXX-BV-doc.overrides b/debian/libstdc++CXX-BV-doc.overrides index 585a805..48a44fd 100644 --- a/debian/libstdc++CXX-BV-doc.overrides +++ b/debian/libstdc++CXX-BV-doc.overrides @@ -1,2 +1,2 @@ -libstdc++@CXX@-@BV@-doc: hyphen-used-as-minus-sign -libstdc++@CXX@-@BV@-doc: manpage-has-bad-whatis-entry +libstdc++@CXX@-@BV@-doc binary: hyphen-used-as-minus-sign +libstdc++@CXX@-@BV@-doc binary: manpage-has-bad-whatis-entry diff --git a/debian/patches/ada-gcc-name.diff b/debian/patches/ada-gcc-name.diff index 0a98a78..7b8f1a4 100644 --- a/debian/patches/ada-gcc-name.diff +++ b/debian/patches/ada-gcc-name.diff @@ -1,4 +1,4 @@ -# DP: use gcc-4.6 instead of gcc as the command name. +# DP: use gcc-4.7 instead of gcc as the command name. Index: b/src/gcc/ada/comperr.adb =================================================================== @@ -9,7 +9,7 @@ Index: b/src/gcc/ada/comperr.adb Write_Str - ("| Include the exact gcc or gnatmake command " & -+ ("| Include the exact gcc-4.6 or gnatmake command " & ++ ("| Include the exact gcc-4.7 or gnatmake command " & "that you entered."); End_Line; @@ -22,7 +22,7 @@ Index: b/src/gcc/ada/gnatlink.adb -- generated file. - Gcc : String_Access := Program_Name ("gcc", "gnatlink"); -+ Gcc : String_Access := Program_Name ("gcc-4.6", "gnatlink"); ++ Gcc : String_Access := Program_Name ("gcc-4.7", "gnatlink"); Read_Mode : constant String := "r" & ASCII.NUL; @@ -32,7 +32,7 @@ Index: b/src/gcc/ada/gnatlink.adb Write_Line (" --GCC=comp Use comp as the compiler"); - Write_Line (" --LINK=nam Use 'nam' for the linking rather than 'gcc'"); + Write_Line (" --LINK=nam Use 'nam' for the linking rather " & -+ "than 'gcc-4.6'"); ++ "than 'gcc-4.7'"); Write_Eol; Write_Line (" [non-Ada-objects] list of non Ada object files"); Write_Line (" [linker-options] other options for the linker"); @@ -45,7 +45,7 @@ Index: b/src/gcc/ada/make.adb ---------------------------------------------------- - Gcc : String_Access := Program_Name ("gcc", "gnatmake"); -+ Gcc : String_Access := Program_Name ("gcc-4.6", "gnatmake"); ++ Gcc : String_Access := Program_Name ("gcc-4.7", "gnatmake"); Gnatbind : String_Access := Program_Name ("gnatbind", "gnatmake"); Gnatlink : String_Access := Program_Name ("gnatlink", "gnatmake"); -- Default compiler, binder, linker programs @@ -58,7 +58,7 @@ Index: b/src/gcc/ada/gnatchop.adb -- The name of the file holding the GNAT configuration pragmas - Gcc : String_Access := new String'("gcc"); -+ Gcc : String_Access := new String'("gcc-4.6"); ++ Gcc : String_Access := new String'("gcc-4.7"); -- May be modified by switch --GCC= Gcc_Set : Boolean := False; @@ -71,7 +71,7 @@ Index: b/src/gcc/ada/mdll-utl.adb Dlltool_Exec : OS_Lib.String_Access; - Gcc_Name : constant String := "gcc"; -+ Gcc_Name : constant String := "gcc-4.6"; ++ Gcc_Name : constant String := "gcc-4.7"; Gcc_Exec : OS_Lib.String_Access; Gnatbind_Name : constant String := "gnatbind"; @@ -80,7 +80,7 @@ Index: b/src/gcc/ada/mdll-utl.adb end if; - Print_Command ("gcc", Arguments (1 .. A)); -+ Print_Command ("gcc-4.6", Arguments (1 .. A)); ++ Print_Command ("gcc-4.7", Arguments (1 .. A)); OS_Lib.Spawn (Gcc_Exec.all, Arguments (1 .. A), Success); @@ -93,7 +93,7 @@ Index: b/src/gcc/ada/mlib-utl.adb if Gcc_Exec = null then if Gcc_Name = null then - Gcc_Name := Osint.Program_Name ("gcc", "gnatmake"); -+ Gcc_Name := Osint.Program_Name ("gcc-4.6", "gnatmake"); ++ Gcc_Name := Osint.Program_Name ("gcc-4.7", "gnatmake"); end if; Gcc_Exec := Locate_Exec_On_Path (Gcc_Name.all); @@ -106,7 +106,7 @@ Index: b/src/gcc/ada/prj-makr.adb procedure Dup2 (Old_Fd, New_Fd : File_Descriptor); - Gcc : constant String := "gcc"; -+ Gcc : constant String := "gcc-4.6"; ++ Gcc : constant String := "gcc-4.7"; Gcc_Path : String_Access := null; Non_Empty_Node : constant Project_Node_Id := 1; diff --git a/debian/patches/arm-dynamic-linker-trunk.diff b/debian/patches/arm-dynamic-linker-trunk.diff deleted file mode 100644 index 74568af..0000000 --- a/debian/patches/arm-dynamic-linker-trunk.diff +++ /dev/null @@ -1,26 +0,0 @@ -# DP: For ARM hard float, set the dynamic linker to -# DP: /lib/arm-linux-gnueabihf/ld-linux.so.3. - ---- a/src/gcc/config/arm/linux-elf.h -+++ b/src/gcc/config/arm/linux-elf.h -@@ -59,14 +59,18 @@ - - #define LIBGCC_SPEC "%{mfloat-abi=soft*:-lfloat} -lgcc" - --#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2" -+#define LINUX_DYNAMIC_LINKER_SF "/lib/ld-linux.so.3" -+#define LINUX_DYNAMIC_LINKER_HF "/lib/arm-linux-gnueabihf/ld-linux.so.3" - - #define LINUX_TARGET_LINK_SPEC "%{h*} \ - %{static:-Bstatic} \ - %{shared:-shared} \ - %{symbolic:-Bsymbolic} \ - %{rdynamic:-export-dynamic} \ -- -dynamic-linker " GNU_USER_DYNAMIC_LINKER " \ -+ %{msoft-float:-dynamic-linker " LINUX_DYNAMIC_LINKER_SF "} \ -+ %{mfloat-abi=soft*:-dynamic-linker " LINUX_DYNAMIC_LINKER_SF "} \ -+ %{mhard-float:-dynamic-linker " LINUX_DYNAMIC_LINKER_HF "} \ -+ %{mfloat-abi=hard:-dynamic-linker " LINUX_DYNAMIC_LINKER_HF "} \ - -X \ - %{mbig-endian:-EB} %{mlittle-endian:-EL}" \ - SUBTARGET_EXTRA_LINK_SPEC diff --git a/debian/patches/arm-dynamic-linker.diff b/debian/patches/arm-dynamic-linker.diff index 9d98ecd..74568af 100644 --- a/debian/patches/arm-dynamic-linker.diff +++ b/debian/patches/arm-dynamic-linker.diff @@ -3,9 +3,9 @@ --- a/src/gcc/config/arm/linux-elf.h +++ b/src/gcc/config/arm/linux-elf.h -@@ -62,14 +62,18 @@ +@@ -59,14 +59,18 @@ - #define LIBGCC_SPEC "%{msoft-float:-lfloat} %{mfloat-abi=soft*:-lfloat} -lgcc" + #define LIBGCC_SPEC "%{mfloat-abi=soft*:-lfloat} -lgcc" -#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2" +#define LINUX_DYNAMIC_LINKER_SF "/lib/ld-linux.so.3" @@ -16,11 +16,11 @@ %{shared:-shared} \ %{symbolic:-Bsymbolic} \ %{rdynamic:-export-dynamic} \ -- -dynamic-linker " LINUX_DYNAMIC_LINKER " \ +- -dynamic-linker " GNU_USER_DYNAMIC_LINKER " \ + %{msoft-float:-dynamic-linker " LINUX_DYNAMIC_LINKER_SF "} \ + %{mfloat-abi=soft*:-dynamic-linker " LINUX_DYNAMIC_LINKER_SF "} \ + %{mhard-float:-dynamic-linker " LINUX_DYNAMIC_LINKER_HF "} \ + %{mfloat-abi=hard:-dynamic-linker " LINUX_DYNAMIC_LINKER_HF "} \ -X \ - --hash-style=both \ %{mbig-endian:-EB} %{mlittle-endian:-EL}" \ + SUBTARGET_EXTRA_LINK_SPEC diff --git a/debian/patches/arm-multilib.diff b/debian/patches/arm-multilib.diff index 8dee020..8608ef8 100644 --- a/debian/patches/arm-multilib.diff +++ b/debian/patches/arm-multilib.diff @@ -1,9 +1,9 @@ # DP: ARM hard/soft float multilib -Index: gcc-4.6-4.6.1/src/gcc/config/arm/t-linux-eabi +Index: b/src/gcc/config/arm/t-linux-eabi =================================================================== ---- gcc-4.6-4.6.1.orig/src/gcc/config/arm/t-linux-eabi 2011-01-03 20:52:22.000000000 +0000 -+++ gcc-4.6-4.6.1/src/gcc/config/arm/t-linux-eabi 2011-08-21 21:08:47.583351817 +0000 +--- a/src/gcc/config/arm/t-linux-eabi 2011-01-03 20:52:22.000000000 +0000 ++++ b/src/gcc/config/arm/t-linux-eabi 2011-08-21 21:08:47.583351817 +0000 @@ -24,6 +24,20 @@ MULTILIB_OPTIONS = MULTILIB_DIRNAMES = diff --git a/debian/patches/armhf-triplet-trunk.diff b/debian/patches/armhf-triplet-trunk.diff deleted file mode 100644 index 40e5ffc..0000000 --- a/debian/patches/armhf-triplet-trunk.diff +++ /dev/null @@ -1,104 +0,0 @@ -# DP: add support for arm-linux-*eabi* triplets; useful for armhf - ---- a/src/libjava/configure.ac.orig -+++ b/src/libjava/configure.ac -@@ -924,7 +924,7 @@ - # on Darwin -single_module speeds up loading of the dynamic libraries. - extra_ldflags_libjava=-Wl,-single_module - ;; --arm*linux*eabi) -+arm*-*-linux-*eabi*) - # Some of the ARM unwinder code is actually in libstdc++. We - # could in principle replicate it in libgcj, but it's better to - # have a dependency on libstdc++. ---- a/src/gcc/config.gcc.orig -+++ b/src/gcc/config.gcc -@@ -822,7 +822,7 @@ - esac - tmake_file="${tmake_file} t-linux arm/t-arm" - case ${target} in -- arm*-*-linux-*eabi) -+ arm*-*-linux-*eabi*) - tm_file="$tm_file arm/bpabi.h arm/linux-eabi.h" - tm_file="$tm_file ../../libgcc/config/arm/bpabi-lib.h" - tmake_file="$tmake_file arm/t-arm-elf arm/t-bpabi arm/t-linux-eabi t-slibgcc-libgcc" -@@ -850,7 +850,7 @@ - tm_file="dbxelf.h elfos.h arm/unknown-elf.h arm/elf.h arm/linux-gas.h arm/uclinux-elf.h glibc-stdint.h" - tmake_file="arm/t-arm arm/t-arm-elf" - case ${target} in -- arm*-*-uclinux*eabi) -+ arm*-*-uclinux*eabi*) - tm_file="$tm_file arm/bpabi.h arm/uclinux-eabi.h" - tm_file="$tm_file ../../libgcc/config/arm/bpabi-lib.h" - tmake_file="$tmake_file arm/t-bpabi" ---- a/src/gcc/testsuite/lib/target-supports.exp.orig -+++ b/src/gcc/testsuite/lib/target-supports.exp -@@ -3235,7 +3235,7 @@ - || [istarget i?86-*-*] - || [istarget x86_64-*-*] - || [istarget alpha*-*-*] -- || [istarget arm*-*-linux-gnueabi] -+ || [istarget arm*-*-linux-*eabi*] - || [istarget bfin*-*linux*] - || [istarget hppa*-*linux*] - || [istarget s390*-*-*] -@@ -3266,7 +3266,7 @@ - || [istarget i?86-*-*] - || [istarget x86_64-*-*] - || [istarget alpha*-*-*] -- || [istarget arm*-*-linux-gnueabi] -+ || [istarget arm*-*-linux-*eabi*] - || [istarget hppa*-*linux*] - || [istarget s390*-*-*] - || [istarget powerpc*-*-*] ---- a/src/gcc/ada/gcc-interface/Makefile.in.orig -+++ b/src/gcc/ada/gcc-interface/Makefile.in -@@ -1846,7 +1846,7 @@ - LIBRARY_VERSION := $(LIB_VERSION) - endif - --ifeq ($(strip $(filter-out arm% linux-gnueabi,$(arch) $(osys)-$(word 4,$(targ)))),) -+ifeq ($(strip $(filter-out arm%-linux,$(arch)-$(osys)) $(if $(findstring eabi,$(word 4,$(targ))),,$(word 4,$(targ)))),) - LIBGNAT_TARGET_PAIRS = \ - a-intnam.ads<a-intnam-linux.ads \ - s-inmaop.adb<s-inmaop-posix.adb \ ---- a/src/libstdc++-v3/configure.host.orig -+++ b/src/libstdc++-v3/configure.host -@@ -322,7 +322,7 @@ - fi - esac - case "${host}" in -- arm*-*-linux-*eabi) -+ arm*-*-linux-*eabi*) - port_specific_symbol_files="\$(srcdir)/../config/os/gnu-linux/arm-eabi-extra.ver" - ;; - esac ---- a/src/libstdc++-v3/testsuite/20_util/make_unsigned/requirements/typedefs-2.cc.orig -+++ b/src/libstdc++-v3/testsuite/20_util/make_unsigned/requirements/typedefs-2.cc -@@ -1,5 +1,5 @@ - // { dg-options "-std=gnu++0x -funsigned-char -fshort-enums" } --// { dg-options "-std=gnu++0x -funsigned-char -fshort-enums -Wl,--no-enum-size-warning" { target arm*-*-linux*eabi } } -+// { dg-options "-std=gnu++0x -funsigned-char -fshort-enums -Wl,--no-enum-size-warning" { target arm*-*-linux-*eabi* } } - - // 2007-05-03 Benjamin Kosnik <bkoz@redhat.com> - // ---- a/src/libstdc++-v3/testsuite/20_util/make_signed/requirements/typedefs-2.cc.orig -+++ b/src/libstdc++-v3/testsuite/20_util/make_signed/requirements/typedefs-2.cc -@@ -1,5 +1,5 @@ - // { dg-options "-std=gnu++0x -funsigned-char -fshort-enums" } --// { dg-options "-std=gnu++0x -funsigned-char -fshort-enums -Wl,--no-enum-size-warning" { target arm*-*-linux*eabi } } -+// { dg-options "-std=gnu++0x -funsigned-char -fshort-enums -Wl,--no-enum-size-warning" { target arm*-*-linux-*eabi* } } - - // 2007-05-03 Benjamin Kosnik <bkoz@redhat.com> - // ---- a/src/libgcc/config.host -+++ b/src/libgcc/config.host -@@ -334,7 +334,7 @@ - arm*-*-linux*) # ARM GNU/Linux with ELF - tmake_file="${tmake_file} arm/t-arm t-fixedpoint-gnu-prefix" - case ${host} in -- arm*-*-linux-*eabi) -+ arm*-*-linux-*eabi*) - tmake_file="${tmake_file} arm/t-elf arm/t-bpabi arm/t-linux-eabi t-slibgcc-libgcc" - tm_file="$tm_file arm/bpabi-lib.h" - unwind_header=config/arm/unwind-arm.h diff --git a/debian/patches/armhf-triplet.diff b/debian/patches/armhf-triplet.diff index 98a5bf9..40e5ffc 100644 --- a/debian/patches/armhf-triplet.diff +++ b/debian/patches/armhf-triplet.diff @@ -62,17 +62,6 @@ LIBGNAT_TARGET_PAIRS = \ a-intnam.ads<a-intnam-linux.ads \ s-inmaop.adb<s-inmaop-posix.adb \ ---- a/src/configure.ac.orig -+++ b/src/configure.ac -@@ -682,7 +682,7 @@ - noconfigdirs="$noconfigdirs target-libffi target-qthreads" - libgloss_dir=arm - ;; -- arm*-*-linux-gnueabi) -+ arm*-*-linux-*eabi*) - noconfigdirs="$noconfigdirs target-qthreads" - case ${with_newlib} in - no) noconfigdirs="$noconfigdirs target-newlib target-libgloss" --- a/src/libstdc++-v3/configure.host.orig +++ b/src/libstdc++-v3/configure.host @@ -322,7 +322,7 @@ @@ -102,3 +91,14 @@ // 2007-05-03 Benjamin Kosnik <bkoz@redhat.com> // +--- a/src/libgcc/config.host ++++ b/src/libgcc/config.host +@@ -334,7 +334,7 @@ + arm*-*-linux*) # ARM GNU/Linux with ELF + tmake_file="${tmake_file} arm/t-arm t-fixedpoint-gnu-prefix" + case ${host} in +- arm*-*-linux-*eabi) ++ arm*-*-linux-*eabi*) + tmake_file="${tmake_file} arm/t-elf arm/t-bpabi arm/t-linux-eabi t-slibgcc-libgcc" + tm_file="$tm_file arm/bpabi-lib.h" + unwind_header=config/arm/unwind-arm.h diff --git a/debian/patches/cross-fixes-trunk.diff b/debian/patches/cross-fixes-trunk.diff deleted file mode 100644 index d9e1d02..0000000 --- a/debian/patches/cross-fixes-trunk.diff +++ /dev/null @@ -1,90 +0,0 @@ -# DP: Fix the linker error when creating an xcc for ia64 - ---- - gcc/config/alpha/linux-unwind.h | 3 +++ - gcc/config/ia64/fde-glibc.c | 3 +++ - gcc/config/ia64/unwind-ia64.c | 3 ++- - gcc/unwind-compat.c | 2 ++ - gcc/unwind-generic.h | 2 ++ - 6 files changed, 14 insertions(+), 1 deletions(-) - ---- a/src/libgcc/config/alpha/linux-unwind.h -+++ b/src/libgcc/config/alpha/linux-unwind.h -@@ -29,6 +29,7 @@ Boston, MA 02110-1301, USA. */ - /* Do code reading to identify a signal frame, and set the frame - state data appropriately. See unwind-dw2.c for the structs. */ - -+#ifndef inhibit_libc - #include <signal.h> - #include <sys/ucontext.h> - -@@ -80,3 +81,5 @@ alpha_fallback_frame_state (struct _Unwind_Context *context, - fs->retaddr_column = 64; - return _URC_NO_REASON; - } -+ -+#endif ---- a/src/libgcc/config/ia64/fde-glibc.c -+++ b/src/libgcc/config/ia64/fde-glibc.c -@@ -31,6 +31,7 @@ - #ifndef _GNU_SOURCE - #define _GNU_SOURCE 1 - #endif -+#ifndef inhibit_libc - #include "config.h" - #include <stddef.h> - #include <stdlib.h> -@@ -162,3 +163,5 @@ _Unwind_FindTableEntry (void *pc, unsigned long *segment_base, - - return data.ret; - } -+ -+#endif ---- a/src/libgcc/config/ia64/unwind-ia64.c -+++ b/src/libgcc/config/ia64/unwind-ia64.c -@@ -27,6 +27,7 @@ - This exception does not however invalidate any other reasons why - the executable file might be covered by the GNU General Public License. */ - -+#ifndef inhibit_libc - #include "tconfig.h" - #include "tsystem.h" - #include "coretypes.h" -@@ -2417,3 +2417,4 @@ alias (_Unwind_SetIP); - #endif - - #endif -+#endif ---- a/src/libgcc/unwind-compat.c -+++ b/src/libgcc/unwind-compat.c -@@ -29,6 +29,7 @@ - 02110-1301, USA. */ - - #if defined (USE_GAS_SYMVER) && defined (USE_LIBUNWIND_EXCEPTIONS) -+#ifndef inhibit_libc - #include "tconfig.h" - #include "tsystem.h" - #include "unwind.h" -@@ -213,3 +214,4 @@ _Unwind_SetIP (struct _Unwind_Context *context, _Unwind_Ptr val) - } - symver (_Unwind_SetIP, GCC_3.0); - #endif -+#endif ---- a/src/libgcc/unwind-generic.h -+++ b/src/libgcc/unwind-generic.h -@@ -214,6 +214,7 @@ _Unwind_SjLj_Resume_or_Rethrow (struct _Unwind_Exception *); - compatible with the standard ABI for IA-64, we inline these. */ - - #ifdef __ia64__ -+#ifndef inhibit_libc - #include <stdlib.h> - - static inline _Unwind_Ptr -@@ -232,6 +233,7 @@ _Unwind_GetTextRelBase (struct _Unwind_Context *_C __attribute__ ((__unused__))) - - /* @@@ Retrieve the Backing Store Pointer of the given context. */ - extern _Unwind_Word _Unwind_GetBSP (struct _Unwind_Context *); -+#endif - #else - extern _Unwind_Ptr _Unwind_GetDataRelBase (struct _Unwind_Context *); - extern _Unwind_Ptr _Unwind_GetTextRelBase (struct _Unwind_Context *); diff --git a/debian/patches/cross-fixes.diff b/debian/patches/cross-fixes.diff index f978871..d9e1d02 100644 --- a/debian/patches/cross-fixes.diff +++ b/debian/patches/cross-fixes.diff @@ -8,24 +8,24 @@ gcc/unwind-generic.h | 2 ++ 6 files changed, 14 insertions(+), 1 deletions(-) ---- a/src/gcc/config/alpha/linux-unwind.h -+++ b/src/gcc/config/alpha/linux-unwind.h +--- a/src/libgcc/config/alpha/linux-unwind.h ++++ b/src/libgcc/config/alpha/linux-unwind.h @@ -29,6 +29,7 @@ Boston, MA 02110-1301, USA. */ /* Do code reading to identify a signal frame, and set the frame state data appropriately. See unwind-dw2.c for the structs. */ - + +#ifndef inhibit_libc #include <signal.h> #include <sys/ucontext.h> - + @@ -80,3 +81,5 @@ alpha_fallback_frame_state (struct _Unwind_Context *context, fs->retaddr_column = 64; return _URC_NO_REASON; } + +#endif ---- a/src/gcc/config/ia64/fde-glibc.c -+++ b/src/gcc/config/ia64/fde-glibc.c +--- a/src/libgcc/config/ia64/fde-glibc.c ++++ b/src/libgcc/config/ia64/fde-glibc.c @@ -31,6 +31,7 @@ #ifndef _GNU_SOURCE #define _GNU_SOURCE 1 @@ -35,31 +35,31 @@ #include <stddef.h> #include <stdlib.h> @@ -162,3 +163,5 @@ _Unwind_FindTableEntry (void *pc, unsigned long *segment_base, - + return data.ret; } + +#endif ---- a/src/gcc/config/ia64/unwind-ia64.c -+++ b/src/gcc/config/ia64/unwind-ia64.c +--- a/src/libgcc/config/ia64/unwind-ia64.c ++++ b/src/libgcc/config/ia64/unwind-ia64.c @@ -27,6 +27,7 @@ This exception does not however invalidate any other reasons why the executable file might be covered by the GNU General Public License. */ - + +#ifndef inhibit_libc #include "tconfig.h" #include "tsystem.h" #include "coretypes.h" @@ -2417,3 +2417,4 @@ alias (_Unwind_SetIP); #endif - + #endif +#endif ---- a/src/gcc/unwind-compat.c -+++ b/src/gcc/unwind-compat.c +--- a/src/libgcc/unwind-compat.c ++++ b/src/libgcc/unwind-compat.c @@ -29,6 +29,7 @@ 02110-1301, USA. */ - + #if defined (USE_GAS_SYMVER) && defined (USE_LIBUNWIND_EXCEPTIONS) +#ifndef inhibit_libc #include "tconfig.h" @@ -70,18 +70,18 @@ symver (_Unwind_SetIP, GCC_3.0); #endif +#endif ---- a/src/gcc/unwind-generic.h -+++ b/src/gcc/unwind-generic.h +--- a/src/libgcc/unwind-generic.h ++++ b/src/libgcc/unwind-generic.h @@ -214,6 +214,7 @@ _Unwind_SjLj_Resume_or_Rethrow (struct _Unwind_Exception *); compatible with the standard ABI for IA-64, we inline these. */ - + #ifdef __ia64__ +#ifndef inhibit_libc #include <stdlib.h> - + static inline _Unwind_Ptr @@ -232,6 +233,7 @@ _Unwind_GetTextRelBase (struct _Unwind_Context *_C __attribute__ ((__unused__))) - + /* @@@ Retrieve the Backing Store Pointer of the given context. */ extern _Unwind_Word _Unwind_GetBSP (struct _Unwind_Context *); +#endif diff --git a/debian/patches/cross-include-trunk.diff b/debian/patches/cross-include-trunk.diff deleted file mode 100644 index 94e534f..0000000 --- a/debian/patches/cross-include-trunk.diff +++ /dev/null @@ -1,18 +0,0 @@ -# DP: Set cross include path to .../include, not .../sys-include -# DP: This should be a fix for famous limits.h issue - ---- - gcc/configure.ac | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - ---- a/src/gcc/configure.ac -+++ b/src/gcc/configure.ac -@@ -764,7 +764,7 @@ AC_ARG_WITH(sysroot, - ], [ - TARGET_SYSTEM_ROOT= - TARGET_SYSTEM_ROOT_DEFINE= -- CROSS_SYSTEM_HEADER_DIR='$(gcc_tooldir)/sys-include' -+ CROSS_SYSTEM_HEADER_DIR='/usr/$(target_noncanonical)/include' - ]) - AC_SUBST(TARGET_SYSTEM_ROOT) - AC_SUBST(TARGET_SYSTEM_ROOT_DEFINE) diff --git a/debian/patches/cross-include.diff b/debian/patches/cross-include.diff index 7b5a1e3..94e534f 100644 --- a/debian/patches/cross-include.diff +++ b/debian/patches/cross-include.diff @@ -12,7 +12,7 @@ TARGET_SYSTEM_ROOT= TARGET_SYSTEM_ROOT_DEFINE= - CROSS_SYSTEM_HEADER_DIR='$(gcc_tooldir)/sys-include' -+ CROSS_SYSTEM_HEADER_DIR='$(prefix)/$(target_noncanonical)/include' ++ CROSS_SYSTEM_HEADER_DIR='/usr/$(target_noncanonical)/include' ]) AC_SUBST(TARGET_SYSTEM_ROOT) AC_SUBST(TARGET_SYSTEM_ROOT_DEFINE) diff --git a/debian/patches/gcc-base-version.diff b/debian/patches/gcc-base-version.diff index 3d95048..e1df50a 100644 --- a/debian/patches/gcc-base-version.diff +++ b/debian/patches/gcc-base-version.diff @@ -1,17 +1,23 @@ -# DP: Set base version to 4.6, introduce full version 4.6.x. +# DP: Set base version to 4.7, introduce full version 4.7.x. +Index: b/src/gcc/BASE-VER +=================================================================== --- a/src/gcc/BASE-VER +++ b/src/gcc/BASE-VER @@ -1 +1 @@ --4.6.2 -+4.6 ---- a/src/gcc/FULL-VER +-4.7.0 ++4.7 +Index: b/src/gcc/FULL-VER +=================================================================== +--- /dev/null +++ b/src/gcc/FULL-VER @@ -0,0 +1 @@ -+4.6.2 ++4.7.0 +Index: b/src/gcc/Makefile.in +=================================================================== --- a/src/gcc/Makefile.in +++ b/src/gcc/Makefile.in -@@ -834,11 +834,13 @@ +@@ -792,11 +792,13 @@ TM_H = $(GTM_H) insn-flags.h $(OPTIONS_H) # Variables for version information. @@ -26,7 +32,7 @@ BASEVER_c := $(shell cat $(BASEVER)) DEVPHASE_c := $(shell cat $(DEVPHASE)) DATESTAMP_c := $(shell cat $(DATESTAMP)) -@@ -857,7 +859,7 @@ +@@ -815,7 +817,7 @@ # development phase collapsed to the empty string in release mode # (i.e. if DEVPHASE_c is empty). The space immediately after the # comma in the $(if ...) constructs is significant - do not remove it. @@ -35,32 +41,34 @@ DEVPHASE_s := "\"$(if $(DEVPHASE_c), ($(DEVPHASE_c)))\"" DATESTAMP_s := "\"$(if $(DEVPHASE_c), $(DATESTAMP_c))\"" PKGVERSION_s:= "\"@PKGVERSION@\"" -@@ -2187,9 +2189,9 @@ +@@ -2066,9 +2068,9 @@ + intl.h prefix.h coretypes.h $(TM_H) cppdefault.h $(TARGET_H) \ $(MACHMODE_H) - prefix.o: prefix.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) prefix.h \ -- Makefile $(BASEVER) -+ Makefile $(FULLVER) - $(COMPILER) $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) \ -- -DPREFIX=\"$(prefix)\" -DBASEVER=$(BASEVER_s) \ -+ -DPREFIX=\"$(prefix)\" -DBASEVER=$(FULLVER_s) \ - -c $(srcdir)/prefix.c $(OUTPUT_OPTION) +-CFLAGS-prefix.o += -DPREFIX=\"$(prefix)\" -DBASEVER=$(BASEVER_s) ++CFLAGS-prefix.o += -DPREFIX=\"$(prefix)\" -DBASEVER=$(FULLVER_s) + prefix.o: prefix.c $(CONFIG_H) $(SYSTEM_H) coretypes.h prefix.h \ +- $(COMMON_TARGET_H) Makefile $(BASEVER) ++ $(COMMON_TARGET_H) Makefile $(FULLVER) # Language-independent files. -@@ -2260,9 +2262,9 @@ + +@@ -2146,11 +2148,11 @@ dumpvers: dumpvers.c --version.o: version.c version.h $(REVISION) $(DATESTAMP) $(BASEVER) $(DEVPHASE) -+version.o: version.c version.h $(REVISION) $(DATESTAMP) $(FULLVER) $(DEVPHASE) - $(COMPILER) $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) \ -- -DBASEVER=$(BASEVER_s) -DDATESTAMP=$(DATESTAMP_s) \ -+ -DBASEVER=$(FULLVER_s) -DDATESTAMP=$(DATESTAMP_s) \ +-CFLAGS-version.o += -DBASEVER=$(BASEVER_s) -DDATESTAMP=$(DATESTAMP_s) \ ++CFLAGS-version.o += -DBASEVER=$(FULLVER_s) -DDATESTAMP=$(DATESTAMP_s) \ -DREVISION=$(REVISION_s) \ -DDEVPHASE=$(DEVPHASE_s) -DPKGVERSION=$(PKGVERSION_s) \ - -DBUGURL=$(BUGURL_s) -c $(srcdir)/version.c $(OUTPUT_OPTION) -@@ -2801,10 +2803,10 @@ - tree-ssa-alias.h $(TREE_FLOW_H) + -DBUGURL=$(BUGURL_s) +-version.o: version.c version.h $(REVISION) $(DATESTAMP) $(BASEVER) $(DEVPHASE) ++version.o: version.c version.h $(REVISION) $(DATESTAMP) $(FULLVER) $(DEVPHASE) + + gtype-desc.o: gtype-desc.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ + $(HASHTAB_H) $(SPLAY_TREE_H) $(OBSTACK_H) $(BITMAP_H) \ +@@ -2736,10 +2738,10 @@ + coretypes.h $(INPUT_H) $(TM_H) $(COMMON_TARGET_H) common/common-targhooks.h bversion.h: s-bversion; @true -s-bversion: BASE-VER @@ -74,7 +82,7 @@ echo "#define BUILDING_GCC_VERSION (BUILDING_GCC_MAJOR * 1000 + BUILDING_GCC_MINOR)" >> bversion.h $(STAMP) s-bversion -@@ -3805,9 +3807,9 @@ +@@ -3791,9 +3793,9 @@ ## build/version.o is compiled by the $(COMPILER_FOR_BUILD) but needs ## several C macro definitions, just like version.o build/version.o: version.c version.h \ @@ -87,15 +95,15 @@ -DDEVPHASE=$(DEVPHASE_s) -DPKGVERSION=$(PKGVERSION_s) \ -DBUGURL=$(BUGURL_s) -o $@ $< @@ -3968,7 +3970,7 @@ + -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc/\" \ + @TARGET_SYSTEM_ROOT_DEFINE@ + +-CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(BASEVER_s) ++CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(FULLVER_s) cppbuiltin.o: cppbuiltin.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ - cppbuiltin.h Makefile - $(COMPILER) $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) \ -- $(PREPROCESSOR_DEFINES) -DBASEVER=$(BASEVER_s) \ -+ $(PREPROCESSOR_DEFINES) -DBASEVER=$(FULLVER_s) \ - -c $(srcdir)/cppbuiltin.c $(OUTPUT_OPTION) - - cppdefault.o: cppdefault.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ -@@ -3989,8 +3991,8 @@ + $(TREE_H) cppbuiltin.h Makefile + +@@ -3988,8 +3990,8 @@ build/gcov-iov.o -o $@ gcov-iov.h: s-iov @@ -106,7 +114,7 @@ > tmp-gcov-iov.h $(SHELL) $(srcdir)/../move-if-change tmp-gcov-iov.h gcov-iov.h $(STAMP) s-iov -@@ -4214,8 +4216,8 @@ +@@ -4229,8 +4231,8 @@ TEXI_CPPINT_FILES = cppinternals.texi gcc-common.texi gcc-vers.texi # gcc-vers.texi is generated from the version files. @@ -117,7 +125,7 @@ if [ "$(DEVPHASE_c)" = "experimental" ]; \ then echo "@set DEVELOPMENT"; \ else echo "@clear DEVELOPMENT"; \ -@@ -4582,9 +4584,11 @@ +@@ -4624,9 +4626,11 @@ install-driver: installdirs xgcc$(exeext) -rm -f $(DESTDIR)$(bindir)/$(GCC_INSTALL_NAME)$(exeext) -$(INSTALL_PROGRAM) xgcc$(exeext) $(DESTDIR)$(bindir)/$(GCC_INSTALL_NAME)$(exeext) @@ -129,6 +137,8 @@ -if [ -f gcc-cross$(exeext) ] ; then \ if [ -d $(DESTDIR)$(gcc_tooldir)/bin/. ] ; then \ rm -f $(DESTDIR)$(gcc_tooldir)/bin/gcc$(exeext); \ +Index: b/src/libjava/Makefile.am +=================================================================== --- a/src/libjava/Makefile.am +++ b/src/libjava/Makefile.am @@ -775,7 +775,7 @@ @@ -140,9 +150,11 @@ file="libgcj-$${pc_version}.pc"; \ $(mkinstalldirs) $(DESTDIR)$(pkgconfigdir); \ echo " $(INSTALL_DATA) libgcj.pc $(DESTDIR)$(pkgconfigdir)/$$file"; \ +Index: b/src/libjava/Makefile.in +=================================================================== --- a/src/libjava/Makefile.in +++ b/src/libjava/Makefile.in -@@ -12412,7 +12412,7 @@ +@@ -12413,7 +12413,7 @@ @BUILD_ECJ1_TRUE@ mv $(DESTDIR)$(libexecsubdir)/`echo ecjx | sed 's,^.*/,,;$(transform);s/$$/$(EXEEXT)/'` $(DESTDIR)$(libexecsubdir)/ecj1$(host_exeext) install-data-local: $(PRE_INSTALL) @@ -151,9 +163,11 @@ file="libgcj-$${pc_version}.pc"; \ $(mkinstalldirs) $(DESTDIR)$(pkgconfigdir); \ echo " $(INSTALL_DATA) libgcj.pc $(DESTDIR)$(pkgconfigdir)/$$file"; \ +Index: b/src/libgcc/Makefile.in +=================================================================== --- a/src/libgcc/Makefile.in +++ b/src/libgcc/Makefile.in -@@ -201,7 +201,7 @@ +@@ -206,7 +206,7 @@ export toolexecdir export toolexeclibdir diff --git a/debian/patches/gcc-driver-extra-langs.diff b/debian/patches/gcc-driver-extra-langs.diff index 52de0e0..a941b91 100644 --- a/debian/patches/gcc-driver-extra-langs.diff +++ b/debian/patches/gcc-driver-extra-langs.diff @@ -5,16 +5,18 @@ gcc/Makefile.in | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) +Index: b/src/gcc/Makefile.in +=================================================================== --- a/src/gcc/Makefile.in +++ b/src/gcc/Makefile.in -@@ -503,8 +503,8 @@ - compile.exp dg.exp \ - dg-torture.exp,builtins.exp \ - struct-layout-1.exp,unsorted.exp,stackalign.exp,i386.exp +@@ -531,8 +531,8 @@ + dg-torture.exp,ieee.exp \ + vect.exp,guality.exp,unsorted.exp \ + struct-layout-1.exp,stackalign.exp,$(dg_target_exps) -lang_opt_files=@lang_opt_files@ $(srcdir)/c-family/c.opt $(srcdir)/common.opt -lang_specs_files=@lang_specs_files@ +lang_opt_files=$(sort @lang_opt_files@ $(srcdir)/c-family/c.opt $(srcdir)/common.opt $(foreach lang,$(subst ada,ada/gcc-interface,$(debian_extra_langs)),$(srcdir)/$(lang)/lang.opt)) +lang_specs_files=$(sort @lang_specs_files@ $(foreach lang,$(subst ada,ada/gcc-interface,$(debian_extra_langs)),$(srcdir)/$(lang)/lang-specs.h)) lang_tree_files=@lang_tree_files@ target_cpu_default=@target_cpu_default@ - GCC_THREAD_FILE=@thread_file@ + OBJC_BOEHM_GC=@objc_boehm_gc@ diff --git a/debian/patches/gcc-gfdl-build.diff b/debian/patches/gcc-gfdl-build.diff index 92619b2..751ba70 100644 --- a/debian/patches/gcc-gfdl-build.diff +++ b/debian/patches/gcc-gfdl-build.diff @@ -2,23 +2,25 @@ --- a/src/gcc/Makefile.in +++ b/src/gcc/Makefile.in -@@ -3681,27 +3681,9 @@ +@@ -3672,30 +3672,8 @@ # \r is not portable to Solaris tr, therefore we have a special # case for ASCII. We use \r for other encodings like EBCDIC. s-tm-texi: build/genhooks$(build_exeext) $(srcdir)/doc/tm.texi.in -- $(RUN_GEN) build/genhooks$(build_exeext) \ +- $(RUN_GEN) build/genhooks$(build_exeext) -d \ - $(srcdir)/doc/tm.texi.in > tmp-tm.texi - case `echo X|tr X '\101'` in \ - A) tr -d '\015' < tmp-tm.texi > tmp2-tm.texi ;; \ - *) tr -d '\r' < tmp-tm.texi > tmp2-tm.texi ;; \ - esac - mv tmp2-tm.texi tmp-tm.texi -+ cat $(srcdir)/doc/tm.texi.in > tmp-tm.texi - $(SHELL) $(srcdir)/../move-if-change tmp-tm.texi tm.texi +- $(SHELL) $(srcdir)/../move-if-change tmp-tm.texi tm.texi - @if cmp -s $(srcdir)/doc/tm.texi tm.texi; then \ - $(STAMP) $@; \ - elif test $(srcdir)/doc/tm.texi -nt $(srcdir)/doc/tm.texi.in \ -- && test $(srcdir)/doc/tm.texi -nt $(srcdir)/target.def; then \ +- && ( test $(srcdir)/doc/tm.texi -nt $(srcdir)/target.def \ +- || test $(srcdir)/doc/tm.texi -nt $(srcdir)/c-family/c-target.def \ +- || test $(srcdir)/doc/tm.texi -nt $(srcdir)/common/common-target.def \ +- ); then \ - echo >&2 ; \ - echo You should edit $(srcdir)/doc/tm.texi.in rather than $(srcdir)/doc/tm.texi . >&2 ; \ - false; \ @@ -28,6 +30,7 @@ - echo new text in tm.texi, then copy it to $(srcdir)/doc/tm.texi. >&2 ; \ - false; \ - fi ++ cat $(srcdir)/doc/tm.texi.in > tmp-tm.texi + $(STAMP) $@ GTFILES = $(CPP_ID_DATA_H) $(srcdir)/input.h $(srcdir)/coretypes.h \ diff --git a/debian/patches/gcc-hash-style-both.diff b/debian/patches/gcc-hash-style-both.diff index 9f3515e..fb8616c 100644 --- a/debian/patches/gcc-hash-style-both.diff +++ b/debian/patches/gcc-hash-style-both.diff @@ -29,42 +29,24 @@ gcc/config/sparc/linux.h | 2 +- 8 files changed, 9 insertions(+), 9 deletions(-) +Index: b/src/gcc/config/alpha/linux-elf.h +=================================================================== --- a/src/gcc/config/alpha/linux-elf.h +++ b/src/gcc/config/alpha/linux-elf.h -@@ -39,7 +39,7 @@ along with GCC; see the file COPYING3. If not see +@@ -38,7 +38,7 @@ - #define ELF_DYNAMIC_LINKER LINUX_DYNAMIC_LINKER + #define ELF_DYNAMIC_LINKER GNU_USER_DYNAMIC_LINKER -#define LINK_SPEC "-m elf64alpha %{G*} %{relax:-relax} \ +#define LINK_SPEC "-m elf64alpha --hash-style=both %{G*} %{relax:-relax} \ %{O*:-O3} %{!O*:-O1} \ %{shared:-shared} \ %{!shared: \ ---- a/src/gcc/config/i386/linux.h -+++ b/src/gcc/config/i386/linux.h -@@ -113,7 +113,7 @@ along with GCC; see the file COPYING3. If not see - { "dynamic_linker", LINUX_DYNAMIC_LINKER } - - #undef LINK_SPEC --#define LINK_SPEC "-m %(link_emulation) %{shared:-shared} \ -+#define LINK_SPEC "-m %(link_emulation) --hash-style=both %{shared:-shared} \ - %{!shared: \ - %{!ibcs: \ - %{!static: \ ---- a/src/gcc/config/i386/linux64.h -+++ b/src/gcc/config/i386/linux64.h -@@ -70,7 +70,7 @@ along with GCC; see the file COPYING3. If not see - #endif - - #undef LINK_SPEC --#define LINK_SPEC "%{" SPEC_64 ":-m elf_x86_64} %{" SPEC_32 ":-m elf_i386} \ -+#define LINK_SPEC "%{" SPEC_64 ":-m elf_x86_64} %{" SPEC_32 ":-m elf_i386} --hash-style=both \ - %{shared:-shared} \ - %{!shared: \ - %{!static: \ +Index: b/src/gcc/config/ia64/linux.h +=================================================================== --- a/src/gcc/config/ia64/linux.h +++ b/src/gcc/config/ia64/linux.h -@@ -40,7 +40,7 @@ do { \ +@@ -59,7 +59,7 @@ #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2" #undef LINK_SPEC @@ -73,36 +55,42 @@ %{shared:-shared} \ %{!shared: \ %{!static: \ +Index: b/src/gcc/config/rs6000/linux64.h +=================================================================== --- a/src/gcc/config/rs6000/linux64.h +++ b/src/gcc/config/rs6000/linux64.h -@@ -386,11 +386,11 @@ +@@ -384,11 +384,11 @@ CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER64, UCLIBC_DYNAMIC_LINKER64) -#define LINK_OS_LINUX_SPEC32 "-m elf32ppclinux %{!shared: %{!static: \ +#define LINK_OS_LINUX_SPEC32 "-m elf32ppclinux --hash-style=both %{!shared: %{!static: \ %{rdynamic:-export-dynamic} \ - -dynamic-linker " LINUX_DYNAMIC_LINKER32 "}}" + -dynamic-linker " GNU_USER_DYNAMIC_LINKER32 "}}" -#define LINK_OS_LINUX_SPEC64 "-m elf64ppc %{!shared: %{!static: \ +#define LINK_OS_LINUX_SPEC64 "-m elf64ppc --hash-style=both %{!shared: %{!static: \ %{rdynamic:-export-dynamic} \ - -dynamic-linker " LINUX_DYNAMIC_LINKER64 "}}" + -dynamic-linker " GNU_USER_DYNAMIC_LINKER64 "}}" +Index: b/src/gcc/config/rs6000/sysv4.h +=================================================================== --- a/src/gcc/config/rs6000/sysv4.h +++ b/src/gcc/config/rs6000/sysv4.h -@@ -906,7 +906,7 @@ SVR4_ASM_SPEC \ - #define LINUX_DYNAMIC_LINKER \ +@@ -815,7 +815,7 @@ + #define GNU_USER_DYNAMIC_LINKER \ CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER, UCLIBC_DYNAMIC_LINKER) -#define LINK_OS_LINUX_SPEC "-m elf32ppclinux %{!shared: %{!static: \ +#define LINK_OS_LINUX_SPEC "-m elf32ppclinux --hash-style=both %{!shared: %{!static: \ %{rdynamic:-export-dynamic} \ - %{!dynamic-linker:-dynamic-linker " LINUX_DYNAMIC_LINKER "}}}" + -dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" +Index: b/src/gcc/config/s390/linux.h +=================================================================== --- a/src/gcc/config/s390/linux.h +++ b/src/gcc/config/s390/linux.h -@@ -77,7 +77,7 @@ along with GCC; see the file COPYING3. If not see +@@ -66,7 +66,7 @@ #undef LINK_SPEC #define LINK_SPEC \ @@ -111,9 +99,11 @@ %{shared:-shared} \ %{!shared: \ %{static:-static} \ +Index: b/src/gcc/config/sparc/linux.h +=================================================================== --- a/src/gcc/config/sparc/linux.h +++ b/src/gcc/config/sparc/linux.h -@@ -86,7 +86,7 @@ along with GCC; see the file COPYING3. If not see +@@ -87,7 +87,7 @@ #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2" #undef LINK_SPEC @@ -121,14 +111,41 @@ +#define LINK_SPEC "-m elf32_sparc --hash-style=both -Y P,/usr/lib %{shared:-shared} \ %{!mno-relax:%{!r:-relax}} \ %{!shared: \ - %{!ibcs: \ ---- a/src/gcc/config/arm/linux-elf.h~ 2009-02-20 16:20:38.000000000 +0100 -+++ b/src/gcc/config/arm/linux-elf.h 2009-12-21 13:19:36.000000000 +0100 -@@ -72,6 +72,7 @@ + %{!static: \ +Index: b/src/gcc/config/arm/linux-elf.h +=================================================================== +--- a/src/gcc/config/arm/linux-elf.h ++++ b/src/gcc/config/arm/linux-elf.h +@@ -68,6 +68,7 @@ %{rdynamic:-export-dynamic} \ - %{!dynamic-linker:-dynamic-linker " LINUX_DYNAMIC_LINKER "} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER " \ -X \ + --hash-style=both \ %{mbig-endian:-EB} %{mlittle-endian:-EL}" \ SUBTARGET_EXTRA_LINK_SPEC +Index: gcc/config/i386/gnu-user.h +=================================================================== +--- a/src/gcc/config/i386/gnu-user.h ++++ b/src/gcc/config/i386/gnu-user.h +@@ -98,7 +98,7 @@ + { "dynamic_linker", GNU_USER_DYNAMIC_LINKER } + + #undef LINK_SPEC +-#define LINK_SPEC "-m %(link_emulation) %{shared:-shared} \ ++#define LINK_SPEC "-m %(link_emulation) --hash-style=both %{shared:-shared} \ + %{!shared: \ + %{!static: \ + %{rdynamic:-export-dynamic} \ +Index: gcc/config/i386/gnu-user64.h +=================================================================== +--- a/src/gcc/config/i386/gnu-user64.h ++++ b/src/gcc/config/i386/gnu-user64.h +@@ -76,6 +76,7 @@ + #define LINK_SPEC "%{" SPEC_64 ":-m " GNU_USER_LINK_EMULATION64 "} \ + %{" SPEC_32 ":-m " GNU_USER_LINK_EMULATION32 "} \ + %{" SPEC_X32 ":-m " GNU_USER_LINK_EMULATIONX32 "} \ ++ --hash-style=both \ + %{shared:-shared} \ + %{!shared: \ + %{!static: \ diff --git a/debian/patches/gcc-hash-style-gnu.diff b/debian/patches/gcc-hash-style-gnu.diff index 1220992..ee359f8 100644 --- a/debian/patches/gcc-hash-style-gnu.diff +++ b/debian/patches/gcc-hash-style-gnu.diff @@ -1,4 +1,4 @@ -# DP: Link using --hash-style=gnu (alpha, amd64, armel, ia64, i386, powerpc, ppc64, s390, sparc) +# DP: Link using --hash-style=gnu (alpha, amd64, armel, armhf, ia64, i386, powerpc, ppc64, s390, sparc) 2006-07-11 Jakub Jelinek <jakub@redhat.com> @@ -29,42 +29,24 @@ gcc/config/sparc/linux.h | 2 +- 8 files changed, 9 insertions(+), 9 deletions(-) +Index: b/src/gcc/config/alpha/linux-elf.h +=================================================================== --- a/src/gcc/config/alpha/linux-elf.h +++ b/src/gcc/config/alpha/linux-elf.h -@@ -41,7 +41,7 @@ +@@ -38,7 +38,7 @@ - #define ELF_DYNAMIC_LINKER LINUX_DYNAMIC_LINKER + #define ELF_DYNAMIC_LINKER GNU_USER_DYNAMIC_LINKER -#define LINK_SPEC "-m elf64alpha %{G*} %{relax:-relax} \ +#define LINK_SPEC "-m elf64alpha --hash-style=gnu %{G*} %{relax:-relax} \ %{O*:-O3} %{!O*:-O1} \ %{shared:-shared} \ %{!shared: \ ---- a/src/gcc/config/i386/linux.h -+++ b/src/gcc/config/i386/linux.h -@@ -104,7 +104,7 @@ - { "dynamic_linker", LINUX_DYNAMIC_LINKER } - - #undef LINK_SPEC --#define LINK_SPEC "-m %(link_emulation) %{shared:-shared} \ -+#define LINK_SPEC "-m %(link_emulation) --hash-style=gnu %{shared:-shared} \ - %{!shared: \ - %{!static: \ - %{rdynamic:-export-dynamic} \ ---- a/src/gcc/config/i386/linux64.h -+++ b/src/gcc/config/i386/linux64.h -@@ -75,7 +75,7 @@ - %{!mno-sse2avx:%{mavx:-msse2avx}} %{msse2avx:%{!mavx:-msse2avx}}" - - #undef LINK_SPEC --#define LINK_SPEC "%{" SPEC_64 ":-m elf_x86_64} %{" SPEC_32 ":-m elf_i386} \ -+#define LINK_SPEC "%{" SPEC_64 ":-m elf_x86_64} %{" SPEC_32 ":-m elf_i386} --hash-style=gnu \ - %{shared:-shared} \ - %{!shared: \ - %{!static: \ +Index: b/src/gcc/config/ia64/linux.h +=================================================================== --- a/src/gcc/config/ia64/linux.h +++ b/src/gcc/config/ia64/linux.h -@@ -64,7 +64,7 @@ +@@ -59,7 +59,7 @@ #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2" #undef LINK_SPEC @@ -73,36 +55,42 @@ %{shared:-shared} \ %{!shared: \ %{!static: \ +Index: b/src/gcc/config/rs6000/linux64.h +=================================================================== --- a/src/gcc/config/rs6000/linux64.h +++ b/src/gcc/config/rs6000/linux64.h -@@ -389,11 +389,11 @@ +@@ -384,11 +384,11 @@ CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER64, UCLIBC_DYNAMIC_LINKER64) -#define LINK_OS_LINUX_SPEC32 "-m elf32ppclinux %{!shared: %{!static: \ +#define LINK_OS_LINUX_SPEC32 "-m elf32ppclinux --hash-style=gnu %{!shared: %{!static: \ %{rdynamic:-export-dynamic} \ - -dynamic-linker " LINUX_DYNAMIC_LINKER32 "}}" + -dynamic-linker " GNU_USER_DYNAMIC_LINKER32 "}}" -#define LINK_OS_LINUX_SPEC64 "-m elf64ppc %{!shared: %{!static: \ +#define LINK_OS_LINUX_SPEC64 "-m elf64ppc --hash-style=gnu %{!shared: %{!static: \ %{rdynamic:-export-dynamic} \ - -dynamic-linker " LINUX_DYNAMIC_LINKER64 "}}" + -dynamic-linker " GNU_USER_DYNAMIC_LINKER64 "}}" +Index: b/src/gcc/config/rs6000/sysv4.h +=================================================================== --- a/src/gcc/config/rs6000/sysv4.h +++ b/src/gcc/config/rs6000/sysv4.h -@@ -830,7 +830,7 @@ - #define LINUX_DYNAMIC_LINKER \ +@@ -815,7 +815,7 @@ + #define GNU_USER_DYNAMIC_LINKER \ CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER, UCLIBC_DYNAMIC_LINKER) -#define LINK_OS_LINUX_SPEC "-m elf32ppclinux %{!shared: %{!static: \ +#define LINK_OS_LINUX_SPEC "-m elf32ppclinux --hash-style=gnu %{!shared: %{!static: \ %{rdynamic:-export-dynamic} \ - -dynamic-linker " LINUX_DYNAMIC_LINKER "}}" + -dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" +Index: b/src/gcc/config/s390/linux.h +=================================================================== --- a/src/gcc/config/s390/linux.h +++ b/src/gcc/config/s390/linux.h -@@ -77,7 +77,7 @@ +@@ -66,7 +66,7 @@ #undef LINK_SPEC #define LINK_SPEC \ @@ -111,9 +99,11 @@ %{shared:-shared} \ %{!shared: \ %{static:-static} \ +Index: b/src/gcc/config/sparc/linux.h +=================================================================== --- a/src/gcc/config/sparc/linux.h +++ b/src/gcc/config/sparc/linux.h -@@ -74,7 +74,7 @@ +@@ -87,7 +87,7 @@ #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2" #undef LINK_SPEC @@ -122,13 +112,40 @@ %{!mno-relax:%{!r:-relax}} \ %{!shared: \ %{!static: \ +Index: b/src/gcc/config/arm/linux-elf.h +=================================================================== --- a/src/gcc/config/arm/linux-elf.h +++ b/src/gcc/config/arm/linux-elf.h -@@ -71,6 +71,7 @@ +@@ -68,6 +68,7 @@ %{rdynamic:-export-dynamic} \ - -dynamic-linker " LINUX_DYNAMIC_LINKER " \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER " \ -X \ + --hash-style=gnu \ %{mbig-endian:-EB} %{mlittle-endian:-EL}" \ SUBTARGET_EXTRA_LINK_SPEC +Index: gcc/config/i386/gnu-user.h +=================================================================== +--- a/src/gcc/config/i386/gnu-user.h ++++ b/src/gcc/config/i386/gnu-user.h +@@ -98,7 +98,7 @@ + { "dynamic_linker", GNU_USER_DYNAMIC_LINKER } + + #undef LINK_SPEC +-#define LINK_SPEC "-m %(link_emulation) %{shared:-shared} \ ++#define LINK_SPEC "-m %(link_emulation) --hash-style=gnu %{shared:-shared} \ + %{!shared: \ + %{!static: \ + %{rdynamic:-export-dynamic} \ +Index: gcc/config/i386/gnu-user64.h +=================================================================== +--- a/src/gcc/config/i386/gnu-user64.h ++++ b/src/gcc/config/i386/gnu-user64.h +@@ -76,6 +76,7 @@ + #define LINK_SPEC "%{" SPEC_64 ":-m " GNU_USER_LINK_EMULATION64 "} \ + %{" SPEC_32 ":-m " GNU_USER_LINK_EMULATION32 "} \ + %{" SPEC_X32 ":-m " GNU_USER_LINK_EMULATIONX32 "} \ ++ --hash-style=gnu \ + %{shared:-shared} \ + %{!shared: \ + %{!static: \ diff --git a/debian/patches/gcc-linaro-doc.diff b/debian/patches/gcc-linaro-doc.diff index a92e331..d74c173 100644 --- a/debian/patches/gcc-linaro-doc.diff +++ b/debian/patches/gcc-linaro-doc.diff @@ -1,253 +1,2 @@ -# DP: Changes for the Linaro 4.6-2011.12 release (documentation). +# DP: Changes for the Linaro 4.7-2012.xx release (documentation). ---- a/src/gcc/doc/invoke.texi -+++ b/src/gcc/doc/invoke.texi -@@ -8732,6 +8732,10 @@ - The maximum number of best instructions in the ready list that are considered - for renaming in the selective scheduler. The default value is 2. - -+@item sms-min-sc -+The minimum value of stage count that swing modulo scheduler will -+generate. The default value is 2. -+ - @item max-last-value-rtl - The maximum size measured as number of RTLs that can be recorded in an expression - in combiner for a pseudo register as last known value of that register. The default -@@ -8911,6 +8915,11 @@ - The maximum number of namespaces to consult for suggestions when C++ - name lookup fails for an identifier. The default is 1000. - -+@item max-stores-to-sink -+The maximum number of conditional stores paires that can be sunk. Set to 0 -+if either vectorization (@option{-ftree-vectorize}) or if-conversion -+(@option{-ftree-loop-if-convert}) is disabled. The default is 2. -+ - @end table - @end table - -@@ -10201,11 +10210,22 @@ - @samp{arm1136j-s}, @samp{arm1136jf-s}, @samp{mpcore}, @samp{mpcorenovfp}, - @samp{arm1156t2-s}, @samp{arm1156t2f-s}, @samp{arm1176jz-s}, @samp{arm1176jzf-s}, - @samp{cortex-a5}, @samp{cortex-a8}, @samp{cortex-a9}, @samp{cortex-a15}, --@samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-m4}, @samp{cortex-m3}, -+@samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-r5}, -+@samp{cortex-m4}, @samp{cortex-m3}, - @samp{cortex-m1}, - @samp{cortex-m0}, - @samp{xscale}, @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}. - -+ -+@option{-mcpu=generic-@var{arch}} is also permissible, and is -+equivalent to @option{-march=@var{arch} -mtune=generic-@var{arch}}. -+See @option{-mtune} for more information. -+ -+@option{-mcpu=native} causes the compiler to auto-detect the CPU -+of the build computer. At present, this feature is only supported on -+Linux, and not all architectures are recognised. If the auto-detect is -+unsuccessful the option has no effect. -+ - @item -mtune=@var{name} - @opindex mtune - This option is very similar to the @option{-mcpu=} option, except that -@@ -10217,6 +10237,18 @@ - For some ARM implementations better performance can be obtained by using - this option. - -+@option{-mtune=generic-@var{arch}} specifies that GCC should tune the -+performance for a blend of processors within architecture @var{arch}. -+The aim is to generate code that run well on the current most popular -+processors, balancing between optimizations that benefit some CPUs in the -+range, and avoiding performance pitfalls of other CPUs. The effects of -+this option may change in future GCC versions as CPU models come and go. -+ -+@option{-mtune=native} causes the compiler to auto-detect the CPU -+of the build computer. At present, this feature is only supported on -+Linux, and not all architectures are recognised. If the auto-detect is -+unsuccessful the option has no effect. -+ - @item -march=@var{name} - @opindex march - This specifies the name of the target ARM architecture. GCC uses this -@@ -10230,6 +10262,11 @@ - @samp{armv7}, @samp{armv7-a}, @samp{armv7-r}, @samp{armv7-m}, - @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}. - -+@option{-march=native} causes the compiler to auto-detect the architecture -+of the build computer. At present, this feature is only supported on -+Linux, and not all architectures are recognised. If the auto-detect is -+unsuccessful the option has no effect. -+ - @item -mfpu=@var{name} - @itemx -mfpe=@var{number} - @itemx -mfp=@var{number} ---- a/src/gcc/doc/md.texi -+++ b/src/gcc/doc/md.texi -@@ -3935,6 +3935,48 @@ - consecutive memory locations, operand 1 is the first register, and - operand 2 is a constant: the number of consecutive registers. - -+@cindex @code{vec_load_lanes@var{m}@var{n}} instruction pattern -+@item @samp{vec_load_lanes@var{m}@var{n}} -+Perform an interleaved load of several vectors from memory operand 1 -+into register operand 0. Both operands have mode @var{m}. The register -+operand is viewed as holding consecutive vectors of mode @var{n}, -+while the memory operand is a flat array that contains the same number -+of elements. The operation is equivalent to: -+ -+@smallexample -+int c = GET_MODE_SIZE (@var{m}) / GET_MODE_SIZE (@var{n}); -+for (j = 0; j < GET_MODE_NUNITS (@var{n}); j++) -+ for (i = 0; i < c; i++) -+ operand0[i][j] = operand1[j * c + i]; -+@end smallexample -+ -+For example, @samp{vec_load_lanestiv4hi} loads 8 16-bit values -+from memory into a register of mode @samp{TI}@. The register -+contains two consecutive vectors of mode @samp{V4HI}@. -+ -+This pattern can only be used if: -+@smallexample -+TARGET_ARRAY_MODE_SUPPORTED_P (@var{n}, @var{c}) -+@end smallexample -+is true. GCC assumes that, if a target supports this kind of -+instruction for some mode @var{n}, it also supports unaligned -+loads for vectors of mode @var{n}. -+ -+@cindex @code{vec_store_lanes@var{m}@var{n}} instruction pattern -+@item @samp{vec_store_lanes@var{m}@var{n}} -+Equivalent to @samp{vec_load_lanes@var{m}@var{n}}, with the memory -+and register operands reversed. That is, the instruction is -+equivalent to: -+ -+@smallexample -+int c = GET_MODE_SIZE (@var{m}) / GET_MODE_SIZE (@var{n}); -+for (j = 0; j < GET_MODE_NUNITS (@var{n}); j++) -+ for (i = 0; i < c; i++) -+ operand0[j * c + i] = operand1[i][j]; -+@end smallexample -+ -+for a memory operand 0 and register operand 1. -+ - @cindex @code{vec_set@var{m}} instruction pattern - @item @samp{vec_set@var{m}} - Set given field in the vector value. Operand 0 is the vector to modify, -@@ -4188,6 +4230,17 @@ - elements of the two vectors, and put the N/2 products of size 2*S in the - output vector (operand 0). - -+@cindex @code{vec_widen_ushiftl_hi_@var{m}} instruction pattern -+@cindex @code{vec_widen_ushiftl_lo_@var{m}} instruction pattern -+@cindex @code{vec_widen_sshiftl_hi_@var{m}} instruction pattern -+@cindex @code{vec_widen_sshiftl_lo_@var{m}} instruction pattern -+@item @samp{vec_widen_ushiftl_hi_@var{m}}, @samp{vec_widen_ushiftl_lo_@var{m}} -+@itemx @samp{vec_widen_sshiftl_hi_@var{m}}, @samp{vec_widen_sshiftl_lo_@var{m}} -+Signed/Unsigned widening shift left. The first input (operand 1) is a vector -+with N signed/unsigned elements of size S@. Operand 2 is a constant. Shift -+the high/low elements of operand 1, and put the N/2 results of size 2*S in the -+output vector (operand 0). -+ - @cindex @code{mulhisi3} instruction pattern - @item @samp{mulhisi3} - Multiply operands 1 and 2, which have mode @code{HImode}, and store -@@ -5891,6 +5944,23 @@ - will be written using @code{zero_extract} rather than the equivalent - @code{and} or @code{sign_extract} operations. - -+@cindex @code{mult}, canonicalization of -+@item -+@code{(sign_extend:@var{m1} (mult:@var{m2} (sign_extend:@var{m2} @var{x}) -+(sign_extend:@var{m2} @var{y})))} is converted to @code{(mult:@var{m1} -+(sign_extend:@var{m1} @var{x}) (sign_extend:@var{m1} @var{y}))}, and likewise -+for @code{zero_extend}. -+ -+@item -+@code{(sign_extend:@var{m1} (mult:@var{m2} (ashiftrt:@var{m2} -+@var{x} @var{s}) (sign_extend:@var{m2} @var{y})))} is converted -+to @code{(mult:@var{m1} (sign_extend:@var{m1} (ashiftrt:@var{m2} -+@var{x} @var{s})) (sign_extend:@var{m1} @var{y}))}, and likewise for -+patterns using @code{zero_extend} and @code{lshiftrt}. If the second -+operand of @code{mult} is also a shift, then that is extended also. -+This transformation is only applied when it can be proven that the -+original operation had sufficient precision to prevent overflow. -+ - @end itemize - - Further canonicalization rules are defined in the function ---- a/src/gcc/doc/tm.texi -+++ b/src/gcc/doc/tm.texi -@@ -2533,7 +2533,7 @@ - register, so @code{TARGET_PREFERRED_RELOAD_CLASS} returns @code{NO_REGS} when - @var{x} is a floating-point constant. If the constant can't be loaded - into any kind of register, code generation will be better if --@code{LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead -+@code{TARGET_LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead - of using @code{TARGET_PREFERRED_RELOAD_CLASS}. - - If an insn has pseudos in it after register allocation, reload will go -@@ -2570,8 +2570,8 @@ - register, so @code{PREFERRED_RELOAD_CLASS} returns @code{NO_REGS} when - @var{x} is a floating-point constant. If the constant can't be loaded - into any kind of register, code generation will be better if --@code{LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead --of using @code{PREFERRED_RELOAD_CLASS}. -+@code{TARGET_LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead -+of using @code{TARGET_PREFERRED_RELOAD_CLASS}. - - If an insn has pseudos in it after register allocation, reload will go - through the alternatives and call repeatedly @code{PREFERRED_RELOAD_CLASS} -@@ -4319,6 +4319,34 @@ - must have move patterns for this mode. - @end deftypefn - -+@deftypefn {Target Hook} bool TARGET_ARRAY_MODE_SUPPORTED_P (enum machine_mode @var{mode}, unsigned HOST_WIDE_INT @var{nelems}) -+Return true if GCC should try to use a scalar mode to store an array -+of @var{nelems} elements, given that each element has mode @var{mode}. -+Returning true here overrides the usual @code{MAX_FIXED_MODE} limit -+and allows GCC to use any defined integer mode. -+ -+One use of this hook is to support vector load and store operations -+that operate on several homogeneous vectors. For example, ARM NEON -+has operations like: -+ -+@smallexample -+int8x8x3_t vld3_s8 (const int8_t *) -+@end smallexample -+ -+where the return type is defined as: -+ -+@smallexample -+typedef struct int8x8x3_t -+@{ -+ int8x8_t val[3]; -+@} int8x8x3_t; -+@end smallexample -+ -+If this hook allows @code{val} to have a scalar mode, then -+@code{int8x8x3_t} can have the same mode. GCC can then store -+@code{int8x8x3_t}s in registers rather than forcing them onto the stack. -+@end deftypefn -+ - @deftypefn {Target Hook} bool TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P (enum machine_mode @var{mode}) - Define this to return nonzero for machine modes for which the port has - small register classes. If this target hook returns nonzero for a given -@@ -5577,13 +5605,13 @@ - @code{TARGET_MODE_DEPENDENT_ADDRESS_P} target hook. - @end defmac - --@defmac LEGITIMATE_CONSTANT_P (@var{x}) --A C expression that is nonzero if @var{x} is a legitimate constant for --an immediate operand on the target machine. You can assume that --@var{x} satisfies @code{CONSTANT_P}, so you need not check this. In fact, --@samp{1} is a suitable definition for this macro on machines where --anything @code{CONSTANT_P} is valid. --@end defmac -+@deftypefn {Target Hook} bool TARGET_LEGITIMATE_CONSTANT_P (enum machine_mode @var{mode}, rtx @var{x}) -+This hook returns true if @var{x} is a legitimate constant for a -+@var{mode}-mode immediate operand on the target machine. You can assume that -+@var{x} satisfies @code{CONSTANT_P}, so you need not check this. -+ -+The default definition returns true. -+@end deftypefn - - @deftypefn {Target Hook} rtx TARGET_DELEGITIMIZE_ADDRESS (rtx @var{x}) - This hook is used to undo the possibly obfuscating effects of the diff --git a/debian/patches/gcc-linaro-updates.diff b/debian/patches/gcc-linaro-updates.diff index f460036..f2780f9 100644 --- a/debian/patches/gcc-linaro-updates.diff +++ b/debian/patches/gcc-linaro-updates.diff @@ -1,2 +1,2 @@ -# DP: Linaro updates from the 4.6-2011.xx-stable branch: +# DP: Linaro updates from the 4.7-2012.xx-stable branch: diff --git a/debian/patches/gcc-linaro.diff b/debian/patches/gcc-linaro.diff index bce47be..3ed6b91 100644 --- a/debian/patches/gcc-linaro.diff +++ b/debian/patches/gcc-linaro.diff @@ -1,44066 +1,2 @@ -# DP: Changes for the Linaro 4.6-2011.12 release. +# DP: Changes for the Linaro 4.7-2012.xx release. ---- a/src/ChangeLog -+++ b/src/ChangeLog -@@ -1,3 +1,13 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * libtool.m4: Additional FreeBSD 10 fixes. -+ -+2011-11-18 Iain Sandoe <iains@gcc.gnu.org> -+ -+ PR target/49992 -+ * configure.ac: Remove ranlib special-casing for Darwin. -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/ChangeLog.linaro -+++ b/src/ChangeLog.linaro -@@ -0,0 +1,3067 @@ -+2011-12-06 Andrew Stubbs <ams@codesourcery.com> -+ -+ GCC Linaro 4.6-2011.12 released. -+ -+ gcc/ -+ * LINARO-VERSION: Update. -+ -+2011-12-06 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ Revert earlier commit for fixed to floating point conversions. -+ 2011-12-05 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ gcc/ -+ * config/arm/arm.c (vfp3_const_double_for_fract_bits): Define. -+ * config/arm/arm-protos.h (vfp3_const_double_for_fract_bits): Declare. -+ * config/arm/constraints.md ("Dt"): New constraint. -+ * config/arm/predicates.md (const_double_vcvt_power_of_two_reciprocal): -+ New. -+ * config/arm/vfp.md (*arm_combine_vcvt_f32_s32): New. -+ (*arm_combine_vcvt_f32_u32): New. -+ -+2011-12-01 Andrew Stubbs <ams@codesourcery.com> -+ -+ Merge from FSF GCC 4.6.2 (svn branches/gcc-4_6-branch 181866). -+ -+2011-12-05 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ Backport from mainline -A15 tuning. -+ 2011-11-30 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> -+ -+ * config/arm/arm.c (arm_issue_rate): Cortex-A15 can triple issue. -+ * config/arm/arm.md (mul64): New attribute. -+ (generic_sched): Cortex-A15 is not scheduled generically. -+ (cortex-a15.md): Include. -+ * config/arm/cortex-a15.md: New machine description. -+ * config/arm/t-arm (MD_INCLUDES): Add cortex-a15.md. -+ -+ 2011-11-30 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> -+ * config/arm/t-arm (MD_INCLUDES): Ensure all md files are listed. -+ -+2011-12-05 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ gcc/ -+ * config/arm/arm.c (vfp3_const_double_for_fract_bits): Define. -+ * config/arm/arm-protos.h (vfp3_const_double_for_fract_bits): Declare. -+ * config/arm/constraints.md ("Dt"): New constraint. -+ * config/arm/predicates.md (const_double_vcvt_power_of_two_reciprocal): -+ New. -+ * config/arm/vfp.md (*arm_combine_vcvt_f32_s32): New. -+ (*arm_combine_vcvt_f32_u32): New. -+ -+2011-11-27 Ira Rosen <ira.rosen@linaro.org> -+ -+ Needs to be merged upstream: -+ -+ gcc/ -+ * tree-vect-patterns.c (widened_name_p): Rename to ... -+ (type_conversion_p): ... this. Add new argument to determine -+ if it's a promotion or demotion operation. Check for -+ CONVERT_EXPR_CODE_P instead of NOP_EXPR. -+ (vect_recog_dot_prod_pattern): Call type_conversion_p instead -+ widened_name_p. -+ (vect_recog_widen_mult_pattern, vect_recog_widen_sum_pattern, -+ vect_operation_fits_smaller_type, vect_recog_widen_shift_pattern): -+ Likewise. -+ (vect_recog_mixed_size_cond_pattern): Likewise and allow -+ non-constant then and else clauses. -+ -+ gcc/testsuite/ -+ * gcc.dg/vect/bb-slp-cond-3.c: New test. -+ * gcc.dg/vect/bb-slp-cond-4.c: New test. -+ -+2011-11-28 David Alan Gilbert <david.gilbert@linaro.org> -+ -+ Backport from mainline (svn r19983): -+ -+ 2011-10-14 David Alan Gilbert <david.gilbert@linaro.org> -+ -+ gcc/testsuite/ -+ * gcc.dg/di-longlong64-sync-1.c: New test. -+ * gcc.dg/di-sync-multithread.c: New test. -+ * gcc.target/arm/di-longlong64-sync-withhelpers.c: New test. -+ * gcc.target/arm/di-longlong64-sync-withldrexd.c: New test. -+ * lib/target-supports.exp: (arm_arch_*_ok): Series of effective-target -+ tests for v5, v6, v6k, and v7-a, and add-options helpers. -+ (check_effective_target_arm_arm_ok): New helper. -+ (check_effective_target_sync_longlong): New helper. -+ -+2011-11-28 David Alan Gilbert <david.gilbert@linaro.org> -+ -+ Backport from mainline (svn r19982): -+ -+ 2011-10-14 David Alan Gilbert <david.gilbert@linaro.org> -+ -+ gcc/ -+ * config/arm/linux-atomic-64bit.c: New (based on linux-atomic.c). -+ * config/arm/linux-atomic.c: Change comment to point to 64bit version. -+ (SYNC_LOCK_RELEASE): Instantiate 64bit version. -+ * config/arm/t-linux-eabi: Pull in linux-atomic-64bit.c. -+ -+2011-11-28 David Alan Gilbert <david.gilbert@linaro.org> -+ -+ Backport from mainline (svn r19981): -+ -+ 2011-10-14 David Alan Gilbert <david.gilbert@linaro.org> -+ -+ gcc/ -+ * config/arm/arm.c (arm_output_ldrex): Support ldrexd. -+ (arm_output_strex): Support strexd. -+ (arm_output_it): New helper to output it in Thumb2 mode only. -+ (arm_output_sync_loop): Support DI mode. Change comment to -+ not support const_int. -+ (arm_expand_sync): Support DI mode. -+ * config/arm/arm.h (TARGET_HAVE_LDREXBHD): Split into LDREXBH -+ and LDREXD. -+ * config/arm/iterators.md (NARROW): move from sync.md. -+ (QHSD): New iterator for all current ARM integer modes. -+ (SIDI): New iterator for SI and DI modes only. -+ * config/arm/sync.md (sync_predtab): New mode_attr. -+ (sync_compare_and_swapsi): Fold into sync_compare_and_swap<mode>. -+ (sync_lock_test_and_setsi): Fold into sync_lock_test_and_setsi<mode>. -+ (sync_<sync_optab>si): Fold into sync_<sync_optab><mode>. -+ (sync_nandsi): Fold into sync_nand<mode>. -+ (sync_new_<sync_optab>si): Fold into sync_new_<sync_optab><mode>. -+ (sync_new_nandsi): Fold into sync_new_nand<mode>. -+ (sync_old_<sync_optab>si): Fold into sync_old_<sync_optab><mode>. -+ (sync_old_nandsi): Fold into sync_old_nand<mode>. -+ (sync_compare_and_swap<mode>): Support SI & DI. -+ (sync_lock_test_and_set<mode>): Likewise. -+ (sync_<sync_optab><mode>): Likewise. -+ (sync_nand<mode>): Likewise. -+ (sync_new_<sync_optab><mode>): Likewise. -+ (sync_new_nand<mode>): Likewise. -+ (sync_old_<sync_optab><mode>): Likewise. -+ (sync_old_nand<mode>): Likewise. -+ (arm_sync_compare_and_swapsi): Turn into iterator on SI & DI. -+ (arm_sync_lock_test_and_setsi): Likewise. -+ (arm_sync_new_<sync_optab>si): Likewise. -+ (arm_sync_new_nandsi): Likewise. -+ (arm_sync_old_<sync_optab>si): Likewise. -+ (arm_sync_old_nandsi): Likewise. -+ (arm_sync_compare_and_swap<mode> NARROW): use sync_predtab, fix indent. -+ (arm_sync_lock_test_and_setsi<mode> NARROW): Likewise. -+ (arm_sync_new_<sync_optab><mode> NARROW): Likewise. -+ (arm_sync_new_nand<mode> NARROW): Likewise. -+ (arm_sync_old_<sync_optab><mode> NARROW): Likewise. -+ (arm_sync_old_nand<mode> NARROW): Likewise. -+ -+2011-11-28 David Alan Gilbert <david.gilbert@linaro.org> -+ -+ Backport from mainline (svn r19980): -+ -+ 2011-10-14 David Alan Gilbert <david.gilbert@linaro.org> -+ -+ PR target/48126 -+ -+ gcc/ -+ * config/arm/arm.c (arm_output_sync_loop): Move label before barrier. -+ -+2011-11-28 David Alan Gilbert <david.gilbert@linaro.org> -+ -+ Backport from mainline (svn r19979): -+ -+ 2011-10-14 David Alan Gilbert <david.gilbert@linaro.org> -+ -+ gcc/ -+ * config/arm/arm.h (TARGET_HAVE_DMB_MCR): MCR Not available in Thumb1. -+ -+ -+2011-11-27 Ira Rosen <ira.rosen@linaro.org> -+ -+ Needs to be merged upstream: -+ -+ gcc/ -+ * tree-vectorizer.h (vect_pattern_recog): Add new argument. -+ * tree-vect-loop.c (vect_analyze_loop_2): Update call to -+ vect_pattern_recog. -+ * tree-vect-patterns.c (widened_name_p): Pass basic block -+ info to vect_is_simple_use. -+ (vect_recog_dot_prod_pattern): Fail for basic blocks. -+ (vect_recog_widen_sum_pattern): Likewise. -+ (vect_handle_widen_op_by_const): Support basic blocks. -+ (vect_operation_fits_smaller_type, -+ vect_recog_over_widening_pattern): Likewise. -+ (vect_recog_mixed_size_cond_pattern): Support basic blocks. -+ Add printing. -+ (vect_mark_pattern_stmts): Update calls to new_stmt_vec_info. -+ (vect_pattern_recog_1): Check for reduction only in loops. -+ (vect_pattern_recog): Add new argument. Support basic blocks. -+ * tree-vect-stmts.c (vectorizable_conversion): Pass basic block -+ info to vect_is_simple_use_1. -+ * tree-vect-slp.c (vect_get_and_check_slp_defs): Support basic -+ blocks. -+ (vect_slp_analyze_bb_1): Call vect_pattern_recog. -+ -+ gcc/testsuite/ -+ * gcc.dg/vect/bb-slp-pattern-1.c: New test. -+ * gcc.dg/vect/bb-slp-pattern-2.c: New test. -+ -+2011-11-22 Ira Rosen <ira.rosen@linaro.org> -+ -+ Backport from mainline: -+ -+ 2011-11-06 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ * tree-vectorizer.h (vectorizable_condition): Add argument. -+ * tree-vect-loop.c (vectorizable_reduction): Fail for condition -+ in SLP. Update calls to vectorizable_condition. -+ * tree-vect-stmts.c (vect_is_simple_cond): Add basic block info to -+ the arguments. Pass it to vect_is_simple_use_1. -+ (vectorizable_condition): Add slp_node to the arguments. Support -+ vectorization of basic blocks. Fail for reduction in SLP. Update -+ calls to vect_is_simple_cond and vect_is_simple_use. Support SLP: -+ call vect_get_slp_defs to get vector operands. -+ (vect_analyze_stmt): Update calls to vectorizable_condition. -+ (vect_transform_stmt): Likewise. -+ * tree-vect-slp.c (vect_create_new_slp_node): Handle COND_EXPR. -+ (vect_get_and_check_slp_defs): Handle COND_EXPR. Allow pattern -+ def stmts. -+ (vect_build_slp_tree): Handle COND_EXPR. -+ (vect_analyze_slp_instance): Push pattern statements to root node. -+ (vect_get_constant_vectors): Fix comments. Handle COND_EXPR. -+ -+ gcc/testsuite/ -+ * gcc.dg/vect/bb-slp-cond-1.c: New test. -+ * gcc.dg/vect/slp-cond-1.c: New test. -+ -+2011-11-22 Ira Rosen <ira.rosen@linaro.org> -+ -+ Backport from mainline: -+ -+ 2011-10-06 Jakub Jelinek <jakub@redhat.com> -+ -+ gcc/ -+ PR tree-optimization/50596 -+ * tree-vectorizer.h (vect_is_simple_cond): New prototype. -+ (NUM_PATTERNS): Change to 6. -+ * tree-vect-patterns.c (vect_recog_mixed_size_cond_pattern): New -+ function. -+ (vect_vect_recog_func_ptrs): Add vect_recog_mixed_size_cond_pattern. -+ (vect_mark_pattern_stmts): Don't create stmt_vinfo for def_stmt -+ if it already has one, and don't set STMT_VINFO_VECTYPE in it -+ if it is already set. -+ * tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized): Handle -+ COND_EXPR in pattern stmts. -+ (vect_is_simple_cond): No longer static. -+ -+ gcc/testsuite: -+ PR tree-optimization/50596 -+ * gcc.dg/vect/vect-cond-8.c: New test. -+ -+ 2011-10-07 Jakub Jelinek <jakub@redhat.com> -+ -+ gcc/ -+ PR tree-optimization/50650 -+ * tree-vect-patterns.c (vect_recog_mixed_size_cond_pattern): Don't -+ call vect_is_simple_cond here, instead fail if cond_expr isn't -+ COMPARISON_CLASS_P or if get_vectype_for_scalar_type returns NULL -+ for cond_expr's first operand. -+ * tree-vect-stmts.c (vect_is_simple_cond): Static again. -+ * tree-vectorizer.h (vect_is_simple_cond): Remove prototype. -+ -+ -+ gcc/ -+ * tree-vect-patterns.c (vect_recog_mixed_size_cond_pattern): Reduce -+ it to integral types only. -+ -+ gcc/testsuite/ -+ * gcc.dg/vect/pr30858.c: Expect the error message twice for targets -+ with multiple vector sizes. -+ * gcc.dg/vect/vect-cond-8.c: Rename to... -+ * gcc.dg/vect/vect-cond-8a.c: ... this and change the type from float -+ to int. -+ * lib/target-supports.exp (check_effective_target_vect_condition): -+ Return true for NEON. -+ -+2011-11-21 Michael Hope <michael.hope@linaro.org> -+ -+ Backport from mainline r180131: -+ -+ 2011-10-18 Julian Brown <julian@codesourcery.com> -+ -+ gcc/ -+ * config/arm/arm.c (arm_block_move_unaligned_straight) -+ (arm_adjust_block_mem, arm_block_move_unaligned_loop) -+ (arm_movmemqi_unaligned): New. -+ (arm_gen_movmemqi): Support unaligned block copies. -+ -+ gcc/testsuite/ -+ * lib/target-supports.exp (check_effective_target_arm_unaligned): New. -+ * gcc.target/arm/unaligned-memcpy-1.c: New. -+ * gcc.target/arm/unaligned-memcpy-2.c: New. -+ * gcc.target/arm/unaligned-memcpy-3.c: New. -+ * gcc.target/arm/unaligned-memcpy-4.c: New. -+ -+ 2011-09-15 James Greenhalgh <james.greenhalgh@arm.com> -+ -+ gcc/ -+ * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): New builtin macro. -+ -+2011-11-17 Ira Rosen <ira.rosen@linaro.org> -+ -+ Backport from mainline: -+ -+ 2011-11-03 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ * tree-vectorizer.h (slp_void_p): New. -+ (struct _slp_tree): Replace left and right with children. Update -+ documentation. -+ (struct _slp_oprnd_info): New. -+ (vect_get_vec_defs): Declare. -+ (vect_get_slp_defs): Update arguments. -+ * tree-vect-loop.c (vect_create_epilog_for_reduction): Call -+ vect_get_vec_defs instead of vect_get_slp_defs. -+ (vectorizable_reduction): Likewise. -+ * tree-vect-stmts.c (vect_get_vec_defs): Remove static, add argument. -+ Update call to vect_get_slp_defs. -+ (vectorizable_conversion): Update call to vect_get_vec_defs. -+ (vectorizable_assignment, vectorizable_shift, -+ vectorizable_operation): Likewise. -+ (vectorizable_type_demotion): Call vect_get_vec_defs instead of -+ vect_get_slp_defs. -+ (vectorizable_type_promotion, vectorizable_store): Likewise. -+ (vect_analyze_stmt): Fix typo. -+ * tree-vect-slp.c (vect_free_slp_tree): Update SLP tree traversal. -+ (vect_print_slp_tree, vect_mark_slp_stmts, -+ vect_mark_slp_stmts_relevant, vect_slp_rearrange_stmts, -+ vect_detect_hybrid_slp_stmts, vect_slp_analyze_node_operations, -+ vect_schedule_slp_instance): Likewise. -+ (vect_create_new_slp_node): New. -+ (vect_create_oprnd_info, vect_free_oprnd_info): Likewise. -+ (vect_get_and_check_slp_defs): Pass information about defs using -+ oprnds_info, allow any number of operands. -+ (vect_build_slp_tree): Likewise. Update calls to -+ vect_get_and_check_slp_defs. Fix comments. -+ (vect_analyze_slp_instance): Move node creation to -+ vect_create_new_slp_node. -+ (vect_get_slp_defs): Allow any number of operands. -+ -+ 2011-11-11 Jakub Jelinek <jakub@redhat.com> -+ -+ gcc/ -+ * tree-vect-slp.c (vect_free_slp_tree): Also free SLP_TREE_CHILDREN -+ vector. -+ (vect_create_new_slp_node): Don't allocate node before checking stmt -+ type. -+ (vect_free_oprnd_info): Remove FREE_DEF_STMTS argument, always -+ free def_stmts vectors and additionally free oprnd_info. -+ (vect_build_slp_tree): Adjust callers. Call it even if -+ stop_recursion. If vect_create_new_slp_node or -+ vect_build_slp_tree fails, properly handle freeing memory. -+ If it succeeded, clear def_stmts in oprnd_info. -+ -+2011-11-02 Andrew Stubbs <ams@codesourcery.com> -+ -+ Backport from FSF mainline: -+ -+ 2011-11-01 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * config/arm/bpabi.h (BE8_LINK_SPEC): Recognize generic-armv7 tuning. -+ -+2011-11-08 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * LINARO-VERSION: Bump version. -+ -+2011-11-08 Andrew Stubbs <ams@codesourcery.com> -+ -+ GCC Linaro 4.6-2011.11 released. -+ -+ gcc/ -+ * LINARO-VERSION: Update. -+ -+2011-11-04 Revital Eres <revital.eres@linaro.org> -+ -+ Backport from mainline -r180673: -+ -+ gcc/ -+ * modulo-sched.c (generate_prolog_epilog): Mark prolog -+ and epilog as BB_DISABLE_SCHEDULE. -+ (mark_loop_unsched): New function. -+ (sms_schedule): Call it. -+ -+2011-10-26 Andrew Stubbs <ams@codesourcery.com> -+ -+ Merge FSF GCC 4.6.2 Release (svn branches/gcc-4_6-branch 180515). -+ -+2011-10-27 Ira Rosen <ira.rosen@linaro.org> -+ -+ Backport from mainline: -+ -+ 2011-10-18 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ * doc/md.texi (vec_widen_ushiftl_hi, vec_widen_ushiftl_lo, -+ vec_widen_sshiftl_hi, vec_widen_sshiftl_lo): Document. -+ * tree-pretty-print.c (dump_generic_node): Handle WIDEN_LSHIFT_EXPR, -+ VEC_WIDEN_LSHIFT_HI_EXPR and VEC_WIDEN_LSHIFT_LO_EXPR. -+ (op_code_prio): Likewise. -+ (op_symbol_code): Handle WIDEN_LSHIFT_EXPR. -+ * optabs.c (optab_for_tree_code): Handle -+ VEC_WIDEN_LSHIFT_HI_EXPR and VEC_WIDEN_LSHIFT_LO_EXPR. -+ (init-optabs): Initialize optab codes for vec_widen_u/sshiftl_hi/lo. -+ * optabs.h (enum optab_index): Add OTI_vec_widen_u/sshiftl_hi/lo. -+ * genopinit.c (optabs): Initialize the new optabs. -+ * expr.c (expand_expr_real_2): Handle -+ VEC_WIDEN_LSHIFT_HI_EXPR and VEC_WIDEN_LSHIFT_LO_EXPR. -+ * gimple-pretty-print.c (dump_binary_rhs): Likewise. -+ * tree-vectorizer.h (NUM_PATTERNS): Increase to 8. -+ * tree.def (WIDEN_LSHIFT_EXPR, VEC_WIDEN_LSHIFT_HI_EXPR, -+ VEC_WIDEN_LSHIFT_LO_EXPR): New. -+ * cfgexpand.c (expand_debug_expr): Handle new tree codes. -+ * tree-vect-patterns.c (vect_vect_recog_func_ptrs): Add -+ vect_recog_widen_shift_pattern. -+ (vect_handle_widen_mult_by_const): Rename... -+ (vect_handle_widen_op_by_const): ...to this. Handle shifts. -+ Add a new argument, update documentation. -+ (vect_recog_widen_mult_pattern): Assume that only second -+ operand can be constant. Update call to -+ vect_handle_widen_op_by_const. -+ (vect_recog_over_widening_pattern): Fix typo. -+ (vect_recog_widen_shift_pattern): New. -+ * tree-vect-stmts.c (vectorizable_type_promotion): Handle -+ widening shifts. -+ (supportable_widening_operation): Likewise. -+ * tree-inline.c (estimate_operator_cost): Handle new tree codes. -+ * tree-vect-generic.c (expand_vector_operations_1): Likewise. -+ * tree-cfg.c (verify_gimple_assign_binary): Likewise. -+ * config/arm/neon.md (neon_vec_<US>shiftl_<mode>): New. -+ (vec_widen_<US>shiftl_lo_<mode>, neon_vec_<US>shiftl_hi_<mode>, -+ vec_widen_<US>shiftl_hi_<mode>, neon_vec_<US>shift_left_<mode>): -+ Likewise. -+ * config/arm/predicates.md (const_neon_scalar_shift_amount_operand): -+ New. -+ * config/arm/iterators.md (V_innermode): New. -+ * tree-vect-slp.c (vect_build_slp_tree): Require same shift operand -+ for widening shift. -+ -+ gcc/testsuite -+ * testsuite/lib/target-supports.exp -+ (check_effective_target_vect_widen_shift): New. -+ * gcc.dg/vect/vect-widen-shift-s16.c: New. -+ * gcc.dg/vect/vect-widen-shift-s8.c: New. -+ * gcc.dg/vect/vect-widen-shift-u16.c: New. -+ * gcc.dg/vect/vect-widen-shift-u8.c: New. -+ -+ 2011-10-06 Jakub Jelinek <jakub@redhat.com> -+ -+ gcc/ -+ * tree-vect-patterns.c (vect_pattern_recog_1): Use -+ vect_recog_func_ptr typedef for the first argument. -+ (vect_pattern_recog): Rename vect_recog_func_ptr variable -+ to vect_recog_func, use vect_recog_func_ptr typedef for it. -+ -+ 2011-10-16 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ PR tree-optimization/50727 -+ * tree-vect-patterns.c (vect_operation_fits_smaller_type): Add -+ DEF_STMT to the list of statements to be replaced by the -+ pattern statements. -+ -+ 2011-10-09 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ PR tree-optimization/50635 -+ * tree-vect-patterns.c (vect_handle_widen_mult_by_const): Add -+ DEF_STMT to the list of statements to be replaced by the -+ pattern statements. -+ (vect_handle_widen_mult_by_const): Don't check TYPE_OUT. -+ -+2011-10-27 Ira Rosen <ira.rosen@linaro.org> -+ -+ Backport from mainline: -+ 2011-10-16 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ * tree-vect-stmts.c (vectorizable_load): For SLP without permutation -+ treat the first load of the node as the first element in its -+ interleaving chain. -+ * tree-vect-slp.c (vect_get_and_check_slp_defs): Swap the operands if -+ necessary and possible. -+ (vect_build_slp_tree): Add new argument. Allow load groups of any size -+ in basic blocks. Keep all the loads for further permutation check. -+ Use the new argument to determine if there is a permutation. Update -+ the recursive calls. -+ (vect_supported_load_permutation_p): Allow subchains of interleaving -+ chains in basic block vectorization. -+ (vect_analyze_slp_instance): Update the call to vect_build_slp_tree. -+ Check load permutation based on the new parameter. -+ (vect_schedule_slp_instance): Don't start from the first element in -+ interleaving chain unless the loads are permuted. -+ -+ gcc/testsuite/ -+ * gcc.dg/vect/bb-slp-29.c: New test. -+ -+2011-10-21 Andrew Stubbs <ams@codesourcery.com> -+ -+ Backport from FSF mainline: -+ -+ 2011-10-21 Andrew Stubbs <ams@codesourcery.com> -+ -+ PR target/50809 -+ -+ gcc/ -+ * config/arm/driver-arm.c (vendors): Make static. -+ -+2011-10-19 Andrew Stubbs <ams@codesourcery.com> -+ -+ Backport from FSF: -+ -+ 2011-10-18 Andrew Stubbs <ams@codesourcery.com> -+ -+ PR tree-optimization/50717 -+ -+ gcc/ -+ * tree-ssa-math-opts.c (is_widening_mult_p): Remove the 'type' -+ parameter. Calculate 'type' from stmt. -+ (convert_mult_to_widen): Update call the is_widening_mult_p. -+ (convert_plusminus_to_widen): Likewise. -+ -+ gcc/testsuite/ -+ * gcc.dg/pr50717-1.c: New file. -+ * gcc.target/arm/wmul-12.c: Correct types. -+ * gcc.target/arm/wmul-8.c: Correct types. -+ -+2011-10-19 Andrew Stubbs <ams@codesourcery.com> -+ -+ Backport from FSF: -+ -+ 2011-10-18 Andrew Stubbs <ams@codesourcery.com> -+ -+ * config/arm/driver-arm.c (host_detect_local_cpu): Close the file -+ before exiting. -+ -+ 2011-10-18 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * config.host (arm*-*-linux*): Add driver-arm.o and x-arm. -+ * config/arm/arm.opt: Add 'native' processor_type and -+ arm_arch enum values. -+ * config/arm/arm.h (host_detect_local_cpu): New prototype. -+ (EXTRA_SPEC_FUNCTIONS): New define. -+ (MCPU_MTUNE_NATIVE_SPECS): New define. -+ (DRIVER_SELF_SPECS): New define. -+ * config/arm/driver-arm.c: New file. -+ * config/arm/x-arm: New file. -+ * doc/invoke.texi (ARM Options): Document -mcpu=native, -+ -mtune=native and -march=native. -+ -+2011-10-19 Andrew Stubbs <ams@codesourcery.com> -+ -+ Backport from FSF: -+ -+ 2011-09-09 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * config/arm/arm-cores.def (generic-armv7-a): New architecture. -+ * config/arm/arm-tables.opt: Regenerate. -+ * config/arm/arm-tune.md: Regenerate. -+ * config/arm/arm.c (arm_file_start): Output .arch directive when -+ user passes -mcpu=generic-*. -+ (arm_issue_rate): Add genericv7a support. -+ * config/arm/arm.h (EXTRA_SPECS): Add asm_cpu_spec. -+ (ASM_CPU_SPEC): New define. -+ * config/arm/elf.h (ASM_SPEC): Use %(asm_cpu_spec). -+ * config/arm/semi.h (ASM_SPEC): Likewise. -+ * doc/invoke.texi (ARM Options): Document -mcpu=generic-* -+ and -mtune=generic-*. -+ -+2011-10-17 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-10-10 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * modulo-sched.c (ps_reg_move_info): Add num_consecutive_stages. -+ (SCHED_FIRST_REG_MOVE, SCHED_NREG_MOVES): Delete. -+ (node_sched_params): Remove first_reg_move and nreg_moves. -+ (ps_num_consecutive_stages, extend_node_sched_params): New functions. -+ (update_node_sched_params): Move up file. -+ (print_node_sched_params): Print the stage. Don't dump info related -+ to first_reg_move and nreg_moves. -+ (set_columns_for_row): New function. -+ (set_columns_for_ps): Move up file and use set_columns_for_row. -+ (schedule_reg_move): New function. -+ (schedule_reg_moves): Call extend_node_sched_params and -+ schedule_reg_move. Extend size of uses bitmap. Initialize -+ num_consecutive_stages. Return false if a move could not be -+ scheduled. -+ (apply_reg_moves): Don't emit moves here. -+ (permute_partial_schedule): Handle register moves. -+ (duplicate_insns_of_cycles): Remove for_prolog. Emit moves according -+ to the same stage-count test as ddg nodes. -+ (generate_prolog_epilog): Update calls accordingly. -+ (sms_schedule): Allow move-scheduling to add a new first stage. -+ -+2011-10-17 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-10-10 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * modulo-sched.c (ps_insn): Adjust comment. -+ (ps_reg_move_info): New structure. -+ (partial_schedule): Add reg_moves field. -+ (SCHED_PARAMS): Use node_sched_param_vec instead of node_sched_params. -+ (node_sched_params): Turn first_reg_move into an identifier. -+ (ps_reg_move): New function. -+ (ps_rtl_insn): Cope with register moves. -+ (ps_first_note): Adjust comment and assert that the instruction -+ isn't a register move. -+ (node_sched_params): Replace with... -+ (node_sched_param_vec): ...this vector. -+ (set_node_sched_params): Adjust accordingly. -+ (print_node_sched_params): Take a partial schedule instead of a ddg. -+ Use ps_rtl_insn and ps_reg_move. -+ (generate_reg_moves): Rename to... -+ (schedule_reg_moves): ...this. Remove rescan parameter. Record each -+ move in the partial schedule, but don't emit it here. Don't perform -+ register substitutions here either. -+ (apply_reg_moves): New function. -+ (duplicate_insns_of_cycles): Use register indices directly, -+ rather than finding instructions using PREV_INSN. Use ps_reg_move. -+ (sms_schedule): Call schedule_reg_moves before committing to -+ a partial schedule. Try the next ii if the schedule fails. -+ Use apply_reg_moves instead of generate_reg_moves. Adjust -+ call to print_node_sched_params. Free node_sched_param_vec -+ instead of node_sched_params. -+ (create_partial_schedule): Initialize reg_moves. -+ (free_partial_schedule): Free reg_moves. -+ -+2011-10-17 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-10-10 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * modulo-sched.c (ps_insn): Replace node field with an identifier. -+ (SCHED_ASAP): Replace with.. -+ (NODE_ASAP): ...this macro. -+ (SCHED_PARAMS): New macro. -+ (SCHED_TIME, SCHED_FIRST_REG_MOVE, SCHED_NREG_MOVES, SCHED_ROW) -+ (SCHED_STAGE, SCHED_COLUMN): Redefine using SCHED_PARAMS. -+ (node_sched_params): Remove asap. -+ (ps_rtl_insn, ps_first_note): New functions. -+ (set_node_sched_params): Use XCNEWVEC. Don't copy across the -+ asap values. -+ (print_node_sched_params): Use SCHED_PARAMS and NODE_ASAP. -+ (generate_reg_moves): Pass ids to the SCHED_* macros. -+ (update_node_sched_params): Take a ps insn identifier rather than -+ a node as parameter. Use ps_rtl_insn. -+ (set_columns_for_ps): Update for above field and SCHED_* macro changes. -+ (permute_partial_schedule): Use ps_rtl_insn and ps_first_note. -+ (optimize_sc): Update for above field and SCHED_* macro changes. -+ Update calls to try_scheduling_node_in_cycle and -+ update_node_sched_params. -+ (duplicate_insns_of_cycles): Adjust for above field and SCHED_* -+ macro changes. Use ps_rtl_insn and ps_first_note. -+ (sms_schedule): Pass ids to the SCHED_* macros. -+ (get_sched_window): Adjust for above field and SCHED_* macro changes. -+ Use NODE_ASAP instead of SCHED_ASAP. -+ (try_scheduling_node_in_cycle): Remove node parameter. Update -+ call to ps_add_node_check_conflicts. Pass ids to the SCHED_* -+ macros. -+ (sms_schedule_by_order): Update call to try_scheduling_node_in_cycle. -+ (ps_insert_empty_row): Adjust for above field changes. -+ (compute_split_row): Use ids rather than nodes. -+ (verify_partial_schedule): Adjust for above field changes. -+ (print_partial_schedule): Use ps_rtl_insn. -+ (create_ps_insn): Take an id rather than a node. -+ (ps_insn_find_column): Adjust for above field changes. -+ Use ps_rtl_insn. -+ (ps_insn_advance_column): Adjust for above field changes. -+ (add_node_to_ps): Remove node parameter. Update call to -+ create_ps_insn. -+ (ps_has_conflicts): Use ps_rtl_insn. -+ (ps_add_node_check_conflicts): Replace node parameter than an id. -+ -+2011-10-17 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-10-10 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * modulo-sched.c (undo_replace_buff_elem): Delete. -+ (generate_reg_moves): Don't build and return an undo list. -+ (free_undo_replace_buff): Delete. -+ (sms_schedule): Adjust call to generate_reg_moves. -+ Don't call free_undo_replace_buff. -+ -+2011-10-17 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-08-08 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * modulo-sched.c (get_sched_window): Use a table for the debug output. -+ Print the current ii. -+ (sms_schedule_by_order): Reduce whitespace in dump line. -+ -+2011-10-17 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-08-08 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * modulo-sched.c (get_sched_window): Use just one loop for predecessors -+ and one loop for successors. Fix upper bound of memory range. -+ -+2011-10-17 Michael Hope <michael.hope@linaro.org> -+ -+ Backport from mainline r178852: -+ -+ 2011-09-14 Julian Brown <julian@codesourcery.com> -+ -+ gcc/ -+ * config/arm/arm.c (arm_override_options): Add unaligned_access -+ support. -+ (arm_file_start): Emit attribute for unaligned access as appropriate. -+ * config/arm/arm.md (UNSPEC_UNALIGNED_LOAD) -+ (UNSPEC_UNALIGNED_STORE): Add constants for unspecs. -+ (insv, extzv): Add unaligned-access support. -+ (extv): Change to expander. Likewise. -+ (extzv_t1, extv_regsi): Add helpers. -+ (unaligned_loadsi, unaligned_loadhis, unaligned_loadhiu) -+ (unaligned_storesi, unaligned_storehi): New. -+ (*extv_reg): New (previous extv implementation). -+ * config/arm/arm.opt (munaligned_access): Add option. -+ * config/arm/constraints.md (Uw): New constraint. -+ * expmed.c (store_bit_field_1): Adjust bitfield numbering according -+ to size of access, not size of unit, when BITS_BIG_ENDIAN != -+ BYTES_BIG_ENDIAN. Don't use bitfield accesses for -+ volatile accesses when -fstrict-volatile-bitfields is in effect. -+ (extract_bit_field_1): Likewise. -+ -+ Backport from mainline r172697: -+ -+ 2011-04-19 Wei Guozhi <carrot@google.com> -+ -+ PR target/47855 -+ gcc/ -+ * config/arm/arm-protos.h (thumb1_legitimate_address_p): New prototype. -+ * config/arm/arm.c (thumb1_legitimate_address_p): Remove the static -+ linkage. -+ * config/arm/constraints.md (Uu): New constraint. -+ * config/arm/arm.md (*arm_movqi_insn): Compute attr "length". -+ -+2011-10-16 Ira Rosen <ira.rosen@linaro.org> -+ -+ Backport from mainline: -+ -+ 2011-09-27 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ * tree-vect-stmts.c (vectorizable_type_demotion): Handle basic block -+ vectorization. -+ (vectorizable_type_promotion): Likewise. -+ (vect_analyze_stmt): Call vectorizable_type_demotion and -+ vectorizable_type_promotion for basic blocks. -+ (supportable_widening_operation): Don't assume loop vectorization. -+ * tree-vect-slp.c (vect_build_slp_tree): Allow multiple types for -+ basic blocks. Update vectorization factor for basic block -+ vectorization. -+ (vect_analyze_slp_instance): Allow multiple types for basic block -+ vectorization. Recheck unrolling factor after construction of SLP -+ instance. -+ -+ gcc/testsuite/ -+ * gcc.dg/vect/bb-slp-11.c: Expect to get vectorized with 64-bit -+ vectors. -+ * gcc.dg/vect/bb-slp-27.c: New. -+ * gcc.dg/vect/bb-slp-28.c: New. -+ -+ -+ 2011-10-04 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/testsuite/ -+ * lib/target-supports.exp (check_effective_target_vect_multiple_sizes): -+ Make et_vect_multiple_sizes_saved global. -+ (check_effective_target_vect64): Make et_vect64_saved global. -+ -+2011-10-13 Andrew Stubbs <ams@codesourcery.com> -+ -+ Backport from mainline: -+ -+ 2011-10-07 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * config/arm/predicates.md (shift_amount_operand): Remove constant -+ range check. -+ (shift_operator): Check range of constants for all shift operators. -+ -+ gcc/testsuite/ -+ * gcc.dg/pr50193-1.c: New file. -+ * gcc.target/arm/shiftable.c: New file. -+ -+2011-10-11 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * LINARO-VERSION: Bump version. -+ -+2011-10-11 Andrew Stubbs <ams@codesourcery.com> -+ -+ GCC Linaro 4.6-2011.10 released. -+ -+ gcc/ -+ * LINARO-VERSION: Update. -+ -+2011-10-04 Andrew Stubbs <ams@codesourcery.com> -+ -+ Merge from FSF GCC 4.6.1 (svn branches/gcc-4_6-branch 179483). -+ -+2011-10-06 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/testsuite/ -+ * gcc.dg/vect/bb-slp-26.c: Simplify to make the basic block -+ vectorizable. -+ -+ Backport from mainline: -+ -+ 2011-09-25 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ * tree-vect-slp.c (vect_slp_analyze_bb_1): Split out core part -+ of vect_analyze_bb here. -+ (vect_analyze_bb): Loop over vector sizes calling vect_analyze_bb_1. -+ -+ gcc/testsuite/ -+ * lib/target-supports.exp (check_effective_target_vect64): New. -+ * gcc.dg/vect/bb-slp-11.c: Expect the error message twice in case -+ of multiple vector sizes. -+ * gcc.dg/vect/bb-slp-26.c: New. -+ -+2011-10-06 Ira Rosen <ira.rosen@linaro.org> -+ -+ Backport from mainline: -+ -+ 2011-09-25 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ * tree-data-ref.c (dr_analyze_innermost): Add new argument. -+ Allow not simple iv if analyzing basic block. -+ (create_data_ref): Update call to dr_analyze_innermost. -+ (stmt_with_adjacent_zero_store_dr_p, ref_base_address): Likewise. -+ * tree-loop-distribution.c (generate_memset_zero): Likewise. -+ * tree-predcom.c (find_looparound_phi): Likewise. -+ * tree-data-ref.h (dr_analyze_innermost): Add new argument. -+ -+ gcc/testsuite/ -+ * gcc.dg/vect/bb-slp-24.c: New. -+ -+ -+ 2011-09-15 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ * tree-vect-data-refs.c (vect_analyze_data_ref_dependence): Allow -+ read-after-read dependencies in basic block SLP. -+ -+ gcc/testsuite/ -+ * gcc.dg/vect/bb-slp-25.c: New. -+ -+ -+ 2011-04-21 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ * tree-vect-data-refs.c (vect_drs_dependent_in_basic_block): Use -+ operand_equal_p to compare DR_BASE_ADDRESSes. -+ (vect_check_interleaving): Likewise. -+ -+ gcc/testsuite/ -+ * gcc.dg/vect/vect-119.c: New test. -+ -+2011-10-03 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-09-22 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * config/arm/predicates.md (expandable_comparison_operator): New -+ predicate, extracted from... -+ (arm_comparison_operator): ...here. -+ * config/arm/arm.md (cbranchsi4, cbranchsf4, cbranchdf4, cbranchdi4) -+ (cstoresi4, cstoresf4, cstoredf4, cstoredi4, movsicc, movsfcc) -+ (movdfcc): Use expandable_comparison_operator. -+ -+ gcc/testsuite/ -+ Backport from mainline: -+ -+ 2011-09-22 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * gcc.target/arm/cmp-1.c: New test. -+ * gcc.target/arm/cmp-2.c: Likewise. -+ -+2011-10-03 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-09-07 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ PR target/49030 -+ * config/arm/arm-protos.h (maybe_get_arm_condition_code): Declare. -+ * config/arm/arm.c (maybe_get_arm_condition_code): New function, -+ reusing the old code from get_arm_condition_code. Return ARM_NV -+ for invalid comparison codes. -+ (get_arm_condition_code): Redefine in terms of -+ maybe_get_arm_condition_code. -+ * config/arm/predicates.md (arm_comparison_operator): Use -+ maybe_get_arm_condition_code. -+ -+ gcc/testsuite/ -+ Backport from mainline: -+ -+ 2011-09-07 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ PR target/49030 -+ * gcc.dg/torture/pr49030.c: New test. -+ -+2011-10-03 Michael Hope <michael.hope@linaro.org> -+ -+ Backport from mainline: -+ -+ 2011-09-13 Sevak Sargsyan <sevak.sargsyan@ispras.ru> -+ -+ gcc/ -+ * config/arm/neon.md (neon_vabd<mode>_2, neon_vabd<mode>_3): New -+ define_insn patterns for combine. -+ -+ gcc/testsuite/ -+ * gcc.target/arm/neon-combine-sub-abs-into-vabd.c: New test. -+ -+2011-10-01 Revital Eres <revital.eres@linaro.org> -+ -+ gcc/ -+ Backport from mainline -r179380 and -r179381 -+ -+ * ddg.c (autoinc_var_is_used_p): New function. -+ (create_ddg_dep_from_intra_loop_link, -+ add_cross_iteration_register_deps): Call it. -+ * ddg.h (autoinc_var_is_used_p): Declare. -+ * modulo-sched.c (sms_schedule): Handle instructions with REG_INC. -+ (generate_reg_moves): Call autoinc_var_is_used_p. Skip -+ instructions that do not set a register and verify no regmoves -+ are created for !single_set instructions. -+ -+ gcc/testsuite/ -+ -+ * gcc.dg/sms-10.c: New file -+ -+2011-09-28 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-09-28 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * config/arm/neon.md (neon_move_lo_quad_<mode>): Delete. -+ (neon_move_hi_quad_<mode>): Likewise. -+ (move_hi_quad_<mode>, move_lo_quad_<mode>): Use subreg moves. -+ -+2011-09-28 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-09-27 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * config/arm/neon.md (neon_vget_highv16qi, neon_vget_highv8hi) -+ (neon_vget_highv4si, neon_vget_highv4sf, neon_vget_highv2di) -+ (neon_vget_lowv16qi, neon_vget_lowv8hi, neon_vget_lowv4si) -+ (neon_vget_lowv4sf, neon_vget_lowv2di): Turn into define_expands -+ that produce subreg moves. Define using VQX iterators. -+ -+2011-09-28 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-09-14 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * simplify-rtx.c (simplify_subreg): Check that the inner mode is -+ a scalar integer before applying integer-only optimisations to -+ inner arithmetic. -+ -+2011-09-25 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/testsuite/ -+ * lib/target-supports.exp (check_effective_target_vect_multiple_sizes): -+ Replace check_effective_target_arm_neon with -+ check_effective_target_arm_neon_ok. -+ -+ Backport from mainline: -+ -+ 2011-09-06 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ * config/arm/arm.c (arm_preferred_simd_mode): Check -+ TARGET_NEON_VECTORIZE_DOUBLE instead of -+ TARGET_NEON_VECTORIZE_QUAD. -+ (arm_autovectorize_vector_sizes): Likewise. -+ * config/arm/arm.opt (mvectorize-with-neon-quad): Make inverse -+ mask of mvectorize-with-neon-double. Add RejectNegative. -+ (mvectorize-with-neon-double): New. -+ -+ gcc/testsuite/ -+ * lib/target-supports.exp (check_effective_target_vect_multiple_sizes): -+ New procedure. -+ (add_options_for_quad_vectors): Replace with ... -+ (add_options_for_double_vectors): ... this. -+ * gfortran.dg/vect/pr19049.f90: Expect more printings on targets that -+ support multiple vector sizes since the vectorizer attempts to -+ vectorize with both vector sizes. -+ * gcc.dg/vect/no-vfa-vect-79.c, -+ gcc.dg/vect/no-vfa-vect-102a.c, gcc.dg/vect/vect-outer-1a.c, -+ gcc.dg/vect/vect-outer-1b.c, gcc.dg/vect/vect-outer-2b.c, -+ gcc.dg/vect/vect-outer-3a.c, gcc.dg/vect/no-vfa-vect-37.c, -+ gcc.dg/vect/vect-outer-3b.c, gcc.dg/vect/no-vfa-vect-101.c, -+ gcc.dg/vect/no-vfa-vect-102.c, gcc.dg/vect/vect-reduc-dot-s8b.c, -+ gcc.dg/vect/vect-outer-1.c, gcc.dg/vect/vect-104.c: Likewise. -+ * gcc.dg/vect/vect-42.c: Run with 64 bit vectors if applicable. -+ * gcc.dg/vect/vect-multitypes-6.c, gcc.dg/vect/vect-52.c, -+ gcc.dg/vect/vect-54.c, gcc.dg/vect/vect-46.c, gcc.dg/vect/vect-48.c, -+ gcc.dg/vect/vect-96.c, gcc.dg/vect/vect-multitypes-3.c, -+ gcc.dg/vect/vect-40.c: Likewise. -+ * gcc.dg/vect/vect-outer-5.c: Remove quad-vectors option as -+ redundant. -+ * gcc.dg/vect/vect-109.c, gcc.dg/vect/vect-peel-1.c, -+ gcc.dg/vect/vect-peel-2.c, gcc.dg/vect/slp-25.c, -+ gcc.dg/vect/vect-multitypes-1.c, gcc.dg/vect/slp-3.c, -+ gcc.dg/vect/no-vfa-pr29145.c, gcc.dg/vect/vect-multitypes-4.c: -+ Likewise. -+ * gcc.dg/vect/vect-peel-4.c: Make ia global. -+ -+2011-09-22 Revital Eres <revital.eres@linaro.org> -+ -+ Backport from trunk -r178804: -+ * modulo-sched.c (remove_node_from_ps): Return void -+ instead of bool. -+ (optimize_sc): Adjust call to remove_node_from_ps. -+ (sms_schedule): Add print info. -+ -+2011-09-16 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ * LINARO-VERSION: Bump version. -+ -+2011-09-15 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ GCC Linaro 4.6-2011.09-1 released. -+ -+ gcc/ -+ * LINARO-VERSION: Update. -+ -+2011-09-15 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ Revert: -+ -+ gcc/ -+ PR target/49030 -+ * config/arm/arm-protos.h (maybe_get_arm_condition_code): Declare. -+ * config/arm/arm.c (maybe_get_arm_condition_code): New function, -+ reusing the old code from get_arm_condition_code. Return ARM_NV -+ for invalid comparison codes. -+ (get_arm_condition_code): Redefine in terms of -+ maybe_get_arm_condition_code. -+ * config/arm/predicates.md (arm_comparison_operator): Use -+ maybe_get_arm_condition_code. -+ -+ gcc/testsuite/ -+ PR target/49030 -+ * gcc.dg/torture/pr49030.c: New test. -+ -+2011-09-13 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * LINARO-VERSION: Bump version. -+ -+2011-09-13 Andrew Stubbs <ams@codesourcery.com> -+ -+ GCC Linaro 4.6-2011.09 released. -+ -+ gcc/ -+ * LINARO-VERSION: Update. -+ -+2011-09-12 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ Backport from FSF mainline: -+ 2011-04-06 Wei Guozhi <carrot@google.com> -+ -+ PR target/47855 -+ gcc/ -+ * config/arm/arm.md (arm_cmpsi_insn): Compute attr "length". -+ (arm_cond_branch): Likewise. -+ (arm_cond_branch_reversed): Likewise. -+ (arm_jump): Likewise. -+ (push_multi): Likewise. -+ * config/arm/constraints.md (Py): New constraint. -+ -+ 2011-04-08 Wei Guozhi <carrot@google.com> -+ -+ PR target/47855 -+ * config/arm/arm-protos.h (arm_attr_length_push_multi): New prototype. -+ * config/arm/arm.c (arm_attr_length_push_multi): New function. -+ * config/arm/arm.md (*push_multi): Change the length computation to -+ call a C function. -+ -+2011-09-12 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ Backport from FSF mainline: -+ -+ 2011-08-18 Jiangning Liu <jiangning.liu@arm.com> -+ -+ gcc/ -+ * config/arm/arm.md (*ior_scc_scc): Enable for Thumb2 as well. -+ (*ior_scc_scc_cmp): Likewise -+ (*and_scc_scc): Likewise. -+ (*and_scc_scc_cmp): Likewise. -+ (*and_scc_scc_nodom): Likewise. -+ (*cmp_ite0, *cmp_ite1, *cmp_and, *cmp_ior): Handle Thumb2. -+ -+ gcc/testsuite -+ * gcc.target/arm/thumb2-cond-cmp-1.c: New. Make sure conditional -+ compare can be generated. -+ * gcc.target/arm/thumb2-cond-cmp-2.c: Likewise. -+ * gcc.target/arm/thumb2-cond-cmp-3.c: Likewise. -+ * gcc.target/arm/thumb2-cond-cmp-4.c: Likewise. -+ -+2011-09-12 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ gcc/testsuite/ -+ * gcc.target/arm/pr50099.c: Fix testcase from previous commit. -+ -+2011-09-12 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ LP:838994 -+ gcc/ -+ Backport from mainline. -+ -+ 2011-09-06 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ PR target/50099 -+ * config/arm/iterators.md (qhs_zextenddi_cstr): New. -+ (qhs_zextenddi_op): New. -+ * config/arm/arm.md ("zero_extend<mode>di2"): Use them. -+ * config/arm/predicates.md ("arm_extendqisi_mem_op"): -+ Distinguish between ARM and Thumb2 states. -+ -+ gcc/testsuite/ -+ * gcc.target/arm/pr50099.c: New test. -+ -+2011-09-12 Andrew Stubbs <ams@codesourcery.com> -+ -+ Backport from FSF mainline: -+ -+ 2011-09-08 Andrew Stubbs <ams@codesourcery.com> -+ -+ PR tree-optimization/50318 -+ -+ gcc/ -+ * tree-ssa-math-opts.c (convert_plusminus_to_widen): Correct -+ typo in use of mult_rhs1 and mult_rhs2. -+ -+ gcc/testsuite/ -+ * gcc.target/arm/pr50318-1.c: New file. -+ -+2011-09-01 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * config/arm/predicates.md (shift_amount_operand): Ensure shift -+ amount is positive. -+ -+ gcc/testsuite/ -+ * gcc.dg/pr50193-1.c: New file. -+ -+2011-09-12 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ PR target/49030 -+ * config/arm/arm-protos.h (maybe_get_arm_condition_code): Declare. -+ * config/arm/arm.c (maybe_get_arm_condition_code): New function, -+ reusing the old code from get_arm_condition_code. Return ARM_NV -+ for invalid comparison codes. -+ (get_arm_condition_code): Redefine in terms of -+ maybe_get_arm_condition_code. -+ * config/arm/predicates.md (arm_comparison_operator): Use -+ maybe_get_arm_condition_code. -+ -+ gcc/testsuite/ -+ PR target/49030 -+ * gcc.dg/torture/pr49030.c: New test. -+ -+2011-09-12 Andrew Stubbs <ams@codesourcery.com> -+ -+ Backport from FSF mainline: -+ -+ 2011-08-30 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * config/arm/arm.c (optimal_immediate_sequence_1): Make b1, b2, -+ b3 and b4 unsigned. -+ -+ 2011-08-30 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * config/arm/arm.c (arm_gen_constant): Set can_negate correctly -+ when code is SET. -+ -+ 2011-08-26 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * config/arm/arm.c (struct four_ints): New type. -+ (count_insns_for_constant): Delete function. -+ (find_best_start): Delete function. -+ (optimal_immediate_sequence): New function. -+ (optimal_immediate_sequence_1): New function. -+ (arm_gen_constant): Move constant splitting code to -+ optimal_immediate_sequence. -+ Rewrite constant negation/invertion code. -+ -+ gcc/testsuite/ -+ * gcc.target/arm/thumb2-replicated-constant1.c: New file. -+ * gcc.target/arm/thumb2-replicated-constant2.c: New file. -+ * gcc.target/arm/thumb2-replicated-constant3.c: New file. -+ * gcc.target/arm/thumb2-replicated-constant4.c: New file. -+ -+ 2011-08-26 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * config/arm/arm-protos.h (const_ok_for_op): Add prototype. -+ * config/arm/arm.c (const_ok_for_op): Add support for addw/subw. -+ Remove prototype. Remove static function type. -+ * config/arm/arm.md (*arm_addsi3): Add addw/subw support. -+ Add arch attribute. -+ * config/arm/constraints.md (Pj, PJ): New constraints. -+ -+ 2011-04-20 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * config/arm/arm.c (arm_gen_constant): Move mowv support .... -+ (const_ok_for_op): ... to here. -+ -+ 2011-04-20 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * config/arm/arm.c (arm_gen_constant): Remove redundant can_invert. -+ -+ -+ -+2011-09-08 Andrew Stubbs <ams@codesourcery.com> -+ -+ Merge from FSF GCC 4.6.1 (svn branches/gcc-4_6-branch 178681). -+ -+2011-09-07 Ira Rosen <ira.rosen@linaro.org> -+ -+ Backport from mainline: -+ -+ 2011-08-04 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ * tree-vectorizer.h (struct _stmt_vec_info): Add new field for -+ pattern def statement, and its access macro. -+ (NUM_PATTERNS): Set to 5. -+ * tree-vect-loop.c (vect_determine_vectorization_factor): Handle -+ pattern def statement. -+ (vect_transform_loop): Likewise. -+ * tree-vect-patterns.c (vect_vect_recog_func_ptrs): Add new -+ function vect_recog_over_widening_pattern (). -+ (vect_operation_fits_smaller_type): New function. -+ (vect_recog_over_widening_pattern, vect_mark_pattern_stmts): -+ Likewise. -+ (vect_pattern_recog_1): Move the code that marks pattern -+ statements to vect_mark_pattern_stmts (), and call it. Update -+ documentation. -+ * tree-vect-stmts.c (vect_supportable_shift): New function. -+ (vect_analyze_stmt): Handle pattern def statement. -+ (new_stmt_vec_info): Initialize pattern def statement. -+ -+ gcc/testsuite/ -+ * gcc.dg/vect/vect-over-widen-1.c: New test. -+ * gcc.dg/vect/vect-over-widen-2.c: New test. -+ * gcc.dg/vect/vect-over-widen-3.c: New test. -+ * gcc.dg/vect/vect-over-widen-4.c: New test. -+ -+ -+ 2011-08-09 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ PR tree-optimization/50014 -+ * tree-vect-loop.c (vectorizable_reduction): Get def type before -+ calling vect_get_vec_def_for_stmt_copy (). -+ -+ gcc/testsuite/ -+ PR tree-optimization/50014 -+ * gcc.dg/vect/pr50014.c: New test. -+ -+ -+ 2011-08-11 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ PR tree-optimization/50039 -+ * tree-vect-patterns.c (vect_operation_fits_smaller_type): Check -+ that DEF_STMT has a stmt_vec_info. -+ -+ gcc/testsuite/ -+ PR tree-optimization/50039 -+ * gcc.dg/vect/vect.exp: Run no-tree-fre-* tests with -fno-tree-fre. -+ * gcc.dg/vect/no-tree-fre-pr50039.c: New test. -+ -+ -+ 2011-09-04 Jakub Jelinek <jakub@redhat.com> -+ Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ PR tree-optimization/50208 -+ * tree-vect-patterns.c (vect_handle_widen_mult_by_const): Add an -+ argument. Check that def_stmt is inside the loop. -+ (vect_recog_widen_mult_pattern): Update calls to -+ vect_handle_widen_mult_by_cons. -+ (vect_operation_fits_smaller_type): Check that def_stmt is -+ inside the loop. -+ -+ gcc/testsuite/ -+ PR tree-optimization/50208 -+ * gcc.dg/vect/no-fre-pre-pr50208.c: New test. -+ * gcc.dg/vect/vect.exp: Run no-fre-pre-*.c tests with -+ -fno-tree-fre -fno-tree-pre. -+ -+2011-09-05 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ Backport from mainline. -+ 2011-08-26 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> -+ -+ * config/arm/cortex-a9.md ("cortex_a9_mult_long"): New. -+ ("cortex_a9_multiply_long"): New and use above. Handle all -+ long multiply cases. -+ ("cortex_a9_multiply"): Handle smmul and smmulr. -+ ("cortex_a9_mac"): Handle smmla. -+ -+2011-09-05 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ gcc/ -+ 2011-08-12 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ PR target/48328 -+ * config/arm/arm.h (CASE_VECTOR_SHORTEN_MODE): Fix distance -+ for tbh instructions. -+ -+2011-08-26 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-08-26 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * df-problems.c (df_note_bb_compute): Pass uses rather than defs -+ to df_set_dead_notes_for_mw. -+ -+2011-08-25 Andrew Stubbs <ams@codesourcery.com> -+ -+ Backport from FSF mainline: -+ -+ 2011-08-19 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * tree-ssa-math-opts.c (is_widening_mult_rhs_p): Handle constants -+ beyond conversions. -+ (convert_mult_to_widen): Convert constant inputs to the right type. -+ (convert_plusminus_to_widen): Don't automatically reject inputs that -+ are not an SSA_NAME. -+ Convert constant inputs to the right type. -+ -+ gcc/testsuite/ -+ * gcc.target/arm/wmul-11.c: New file. -+ * gcc.target/arm/wmul-12.c: New file. -+ * gcc.target/arm/wmul-13.c: New file. -+ -+ 2011-08-19 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * tree-ssa-math-opts.c (convert_plusminus_to_widen): Convert add_rhs -+ to the correct type. -+ -+ gcc/testsuite/ -+ * gcc.target/arm/wmul-10.c: New file. -+ -+ 2011-08-19 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * tree-ssa-math-opts.c (convert_mult_to_widen): Better handle -+ unsigned inputs of different modes. -+ (convert_plusminus_to_widen): Likewise. -+ -+ gcc/testsuite/ -+ * gcc.target/arm/wmul-9.c: New file. -+ * gcc.target/arm/wmul-bitfield-2.c: New file. -+ -+ 2011-08-19 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * tree-ssa-math-opts.c (is_widening_mult_rhs_p): Add new argument -+ 'type'. -+ Use 'type' from caller, not inferred from 'rhs'. -+ Don't reject non-conversion statements. Do return lhs in this case. -+ (is_widening_mult_p): Add new argument 'type'. -+ Use 'type' from caller, not inferred from 'stmt'. -+ Pass type to is_widening_mult_rhs_p. -+ (convert_mult_to_widen): Pass type to is_widening_mult_p. -+ (convert_plusminus_to_widen): Likewise. -+ -+ gcc/testsuite/ -+ * gcc.target/arm/wmul-8.c: New file. -+ -+ 2011-08-19 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * tree-ssa-math-opts.c (is_widening_mult_p): Remove FIXME. -+ Ensure the the larger type is the first operand. -+ -+ gcc/testsuite/ -+ * gcc.target/arm/wmul-7.c: New file. -+ -+ 2011-08-19 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * tree-ssa-math-opts.c (convert_mult_to_widen): Convert -+ unsupported unsigned multiplies to signed. -+ (convert_plusminus_to_widen): Likewise. -+ -+ gcc/testsuite/ -+ * gcc.target/arm/wmul-6.c: New file. -+ -+ 2011-08-19 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * tree-ssa-math-opts.c (convert_plusminus_to_widen): Permit a single -+ conversion statement separating multiply-and-accumulate. -+ -+ gcc/testsuite/ -+ * gcc.target/arm/wmul-5.c: New file. -+ * gcc.target/arm/no-wmla-1.c: New file. -+ -+ 2011-08-19 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * config/arm/arm.md (maddhidi4): Remove '*' from name. -+ * expr.c (expand_expr_real_2): Use find_widening_optab_handler. -+ * optabs.c (find_widening_optab_handler_and_mode): New function. -+ (expand_widen_pattern_expr): Use find_widening_optab_handler. -+ (expand_binop_directly): Likewise. -+ (expand_binop): Likewise. -+ * optabs.h (find_widening_optab_handler): New macro define. -+ (find_widening_optab_handler_and_mode): New prototype. -+ * tree-cfg.c (verify_gimple_assign_binary): Adjust WIDEN_MULT_EXPR -+ type precision rules. -+ (verify_gimple_assign_ternary): Likewise for WIDEN_MULT_PLUS_EXPR. -+ * tree-ssa-math-opts.c (build_and_insert_cast): New function. -+ (is_widening_mult_rhs_p): Allow widening by more than one mode. -+ Explicitly disallow mis-matched input types. -+ (convert_mult_to_widen): Use find_widening_optab_handler, and cast -+ input types to fit the new handler. -+ (convert_plusminus_to_widen): Likewise. -+ -+ gcc/testsuite/ -+ * gcc.target/arm/wmul-bitfield-1.c: New file. -+ -+ 2011-08-19 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * expr.c (expand_expr_real_2): Use widening_optab_handler. -+ * genopinit.c (optabs): Use set_widening_optab_handler for $N. -+ (gen_insn): $N now means $a must be wider than $b, not consecutive. -+ * optabs.c (widened_mode): New function. -+ (expand_widen_pattern_expr): Use widening_optab_handler. -+ (expand_binop_directly): Likewise. -+ (expand_binop): Likewise. -+ * optabs.h (widening_optab_handlers): New struct. -+ (optab_d): New member, 'widening'. -+ (widening_optab_handler): New function. -+ (set_widening_optab_handler): New function. -+ * tree-ssa-math-opts.c (convert_mult_to_widen): Use -+ widening_optab_handler. -+ (convert_plusminus_to_widen): Likewise. -+ -+2011-08-24 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ LP:823548 -+ gcc/ -+ * config/arm/arm.c (arm_init_neon_builtins): Use -+ n_operands instead of n_generator_args. -+ -+2011-08-24 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ LP:823548 -+ Backport from mainline -+ 2011-04-18 Jie Zhang <jie@codesourcery.com> -+ Richard Earnshaw <rearnsha@arm.com> -+ -+ * arm.c (neon_builtin_type_bits): Remove. -+ (typedef enum neon_builtin_mode): New. -+ (T_MAX): Don't define. -+ (typedef enum neon_builtin_datum): Remove bits, codes[], -+ num_vars and base_fcode. Add mode, code and fcode. -+ (VAR1, VAR2, VAR3, VAR4, VAR5, VAR6, VAR7, VAR8, VAR9 -+ VAR10): Change accordingly. -+ (neon_builtin_data[]): Change accordingly -+ (arm_init_neon_builtins): Change accordingly. -+ (neon_builtin_compare): Remove. -+ (locate_neon_builtin_icode): Remove. -+ (arm_expand_neon_builtin): Change accordingly. -+ -+ * arm.h (enum arm_builtins): Move to ... -+ * arm.c (enum arm_builtins): ... here; and rearrange builtin code. -+ -+ * arm.c (arm_builtin_decl): Declare. -+ (TARGET_BUILTIN_DECL): Define. -+ (enum arm_builtins): Correct ARM_BUILTIN_MAX. -+ (arm_builtin_decls[]): New. -+ (arm_init_neon_builtins): Store builtin declarations in -+ arm_builtin_decls[]. -+ (arm_init_tls_builtins): Likewise. -+ (arm_init_iwmmxt_builtins): Likewise. Refactor initialization code. -+ (arm_builtin_decl): New. -+ -+2011-08-18 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-08-18 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * config/arm/arm.c (arm_rtx_costs_1): Don't modify the costs of SET. -+ (arm_size_rtx_costs): Likewise. -+ -+2011-08-18 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-08-12 Richard Sandiford <rdsandiford@googlemail.com> -+ -+ * config/arm/arm.c (get_label_padding): New function. -+ (create_fix_barrier, arm_reorg): Use it. -+ -+2011-08-16 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * LINARO-VERSION: Bump version. -+ -+2011-08-16 Andrew Stubbs <ams@codesourcery.com> -+ -+ GCC Linaro 4.6-2011.08 released. -+ -+ gcc/ -+ * LINARO-VERSION: Update. -+ -+2011-08-15 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ * config/rs6000/rs6000.c (paired_expand_vector_init): Don't create -+ CONST_VECTORs with symbolic elements. -+ (rs6000_expand_vector_init): Likewise. -+ -+2011-08-15 Michael Hope <michael.hope@linaro.org> -+ -+ Merge from FSF GCC 4.6.1 (svn branches/gcc-4_6-branch 177703). -+ -+2011-08-15 Michael Hope <michael.hope@linaro.org> -+ -+ Backport from mainline r177357 -+ -+ gcc/testsuite/ -+ 2011-08-04 Ian Bolton <ian.bolton@arm.com> -+ -+ * gcc.target/arm/vfp-1.c: no large negative offsets on Thumb2. -+ -+2011-08-10 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-07-28 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ * config/arm/vfp.md ("*movdf_vfp"): Handle the VFP constraints -+ before the core constraints. Adjust attributes. -+ (*thumb2_movdf_vfp"): Likewise. -+ -+2011-08-09 Revital Eres <revital.eres@linaro.org> -+ -+ gcc/ -+ Backport from trunk -r176972: -+ -+ * ddg.c (create_ddg_dep_from_intra_loop_link): Remove -+ the creation of anti-dep edge from a branch. -+ (add_cross_iteration_register_deps): -+ Create anti-dep edge from a branch. -+ -+2011-08-09 Revital Eres <revital.eres@linaro.org> -+ -+ gcc/ -+ Backport from trunk -r177235. -+ * modulo-sched.c (calculate_stage_count, -+ calculate_must_precede_follow, get_sched_window, -+ try_scheduling_node_in_cycle, remove_node_from_ps): -+ Add declaration. -+ (update_node_sched_params, set_must_precede_follow, optimize_sc): -+ New functions. -+ (reset_sched_times): Call update_node_sched_params. -+ (sms_schedule): Call optimize_sc. -+ (get_sched_window): Change function arguments. -+ (sms_schedule_by_order): Update call to get_sched_window. -+ Call set_must_precede_follow. -+ (calculate_stage_count): Add function argument. -+ -+2011-07-31 Revital Eres <revital.eres@linaro.org> -+ -+ gcc/ -+ Backport from trunk -r176970: -+ -+ * modulo-sched.c: Change comment. -+ (reset_sched_times): Fix print message. -+ (print_partial_schedule): Add print info. -+ -+ -+2011-07-21 Richard Sandiford <rdsandiford@googlemail.com> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-07-21 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * regcprop.c (maybe_mode_change): Check HARD_REGNO_MODE_OK. -+ -+2011-07-21 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ PR middle-end/49736 -+ * expr.c (all_zeros_p): Undo bogus part of last change. -+ -+2011-07-21 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ Backport from mainline: -+ gcc/cp/ -+ 2011-07-13 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * typeck2.c (split_nonconstant_init_1): Pass the initializer directly, -+ rather than a pointer to it. Return true if the whole of the value -+ was initialized by the generated statements. Use -+ complete_ctor_at_level_p instead of count_type_elements. -+ -+ gcc/ -+ 2011-07-13 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * tree.h (categorize_ctor_elements): Remove comment. Fix long line. -+ (count_type_elements): Delete. -+ (complete_ctor_at_level_p): Declare. -+ * expr.c (flexible_array_member_p): New function, split out from... -+ (count_type_elements): ...here. Make static. Replace allow_flexarr -+ parameter with for_ctor_p. When for_ctor_p is true, return the -+ number of elements that should appear in the top-level constructor, -+ otherwise return an estimate of the number of scalars. -+ (categorize_ctor_elements): Replace p_must_clear with p_complete. -+ (categorize_ctor_elements_1): Likewise. Use complete_ctor_at_level_p. -+ (complete_ctor_at_level_p): New function, borrowing union logic -+ from old categorize_ctor_elements_1. -+ (mostly_zeros_p): Return true if the constructor is not complete. -+ (all_zeros_p): Update call to categorize_ctor_elements. -+ * gimplify.c (gimplify_init_constructor): Update call to -+ categorize_ctor_elements. Don't call count_type_elements. -+ Unconditionally prevent clearing for variable-sized types, -+ otherwise rely on categorize_ctor_elements to detect -+ incomplete initializers. -+ -+ gcc/testsuite/ -+ 2011-07-13 Chung-Lin Tang <cltang@codesourcery.com> -+ -+ * gcc.target/arm/pr48183.c: New test. -+ -+2011-07-18 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * LINARO-VERSION: Bump version. -+ -+2011-07-18 Andrew Stubbs <ams@codesourcery.com> -+ -+ GCC Linaro 4.6-2011.07-0 released. -+ -+ gcc/ -+ * LINARO-VERSION: Update. -+ -+2011-07-15 Michael Hope <michael.hope@linaro.org> -+ -+ Backport from mainline r174540 -+ LP: #807573 -+ -+ gcc/ -+ 2011-06-01 Richard Sandiford <rdsandiford@googlemail.com> -+ -+ PR rtl-optimization/48830 -+ PR rtl-optimization/48808 -+ PR rtl-optimization/48792 -+ * reload.c (push_reload): Check contains_reg_of_mode. -+ * reload1.c (strip_paradoxical_subreg): New function. -+ (gen_reload_chain_without_interm_reg_p): Use it to handle -+ paradoxical subregs. -+ (emit_output_reload_insns, gen_reload): Likewise. -+ -+ gcc/testsuite/ -+ 2011-06-01 Eric Botcazou <ebotcazou@adacore.com> -+ Hans-Peter Nilsson <hp@axis.com> -+ -+ PR rtl-optimization/48830 -+ * gcc.target/sparc/ultrasp12.c: New test. -+ -+2011-07-15 Michael Hope <michael.hope@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-06-29 Nathan Sidwell <nathan@codesourcery.com> -+ -+ * config/arm/unwind-arm.c (enum __cxa_type_match_result): New. -+ (cxa_type_match): Correct declaration. -+ (__gnu_unwind_pr_common): Reconstruct -+ additional indirection when __cxa_type_match returns -+ succeeded_with_ptr_to_base. -+ -+ libstdc++-v3/ -+ Backport from mainline: -+ -+ 2011-06-29 Nathan Sidwell <nathan@codesourcery.com> -+ -+ * libsupc++/eh_arm.c (__cxa_type_match): Construct address of -+ thrown object here. Return succeded_with_ptr_to_base for all -+ pointer cases. -+ -+2011-07-15 Michael Hope <michael.hope@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-03-22 Eric Botcazou <ebotcazou@adacore.com> -+ -+ * combine.c (simplify_set): Try harder to find the best CC mode when -+ simplifying a nested COMPARE on the RHS. -+ -+2011-07-15 Michael Hope <michael.hope@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-04-05 Eric Botcazou <ebotcazou@adacore.com> -+ -+ * ifcvt.c (cond_exec_process_insns): Disallow converting a block -+ that contains the prologue. -+ -+ gcc/testsuite/ -+ Backport from mainline: -+ -+ 2011-04-01 Bernd Schmidt <bernds@codesourcery.com> -+ -+ * gcc.c-torture/compile/20110401-1.c: New test. -+ -+2011-07-13 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ Backport from mainline: -+ gcc/ -+ 2011-07-07 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * reload1.c (choose_reload_regs): Use mode sizes to check whether -+ an old reload register completely defines the required value. -+ -+ gcc/testsuite/ -+ 2011-07-07 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * gcc.target/arm/neon-modes-3.c: New test. -+ -+2011-07-11 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ gcc/ -+ 2011-06-22 Dmitry Plotnikov <dplotnikov@ispras.ru> -+ Dmitry Melnik <dm@ispras.ru> -+ -+ * config/arm/arm.c (neon_immediate_valid_for_shift): New function. -+ (neon_output_shift_immediate): Ditto. -+ * config/arm/arm-protos.h (neon_immediate_valid_for_shift): New -+ prototype. -+ (neon_output_shift_immediate): Ditto. -+ * config/arm/neon.md (vashl<mode>3): Modified constraint. -+ (vashr<mode>3_imm): New insn pattern. -+ (vlshr<mode>3_imm): Ditto. -+ (vashr<mode>3): Modified constraint. -+ (vlshr<mode>3): Ditto. -+ * config/arm/predicates.md (imm_for_neon_lshift_operand): New -+ predicate. -+ (imm_for_neon_rshift_operand): Ditto. -+ (imm_lshift_or_reg_neon): Ditto. -+ (imm_rshift_or_reg_neon): Ditto. -+ -+ * optabs.c (init_optabs): Init optab codes for vashl, vashr, vlshr. -+ -+ gcc/testsuite -+ 2011-06-22 Dmitry Plotnikov <dplotnikov@ispras.ru> -+ Dmitry Melnik <dm@ispras.ru> -+ -+ * gcc.target/arm/neon-vshr-imm-1.c: New testcase. -+ * gcc.target/arm/neon-vshl-imm-1.c: New testcase. -+ * gcc.target/arm/neon-vlshr-imm-1.c: New testcase. -+ -+2011-07-11 Revital Eres <revital.eres@linaro.org> -+ -+ Backport from mainline -r175091 -+ gcc/ -+ * modulo-sched.c (struct ps_insn): Remove row_rest_count -+ field. -+ (struct partial_schedule): Add rows_length field. -+ (verify_partial_schedule): Check rows_length. -+ (ps_insert_empty_row): Handle rows_length. -+ (create_partial_schedule): Likewise. -+ (free_partial_schedule): Likewise. -+ (reset_partial_schedule): Likewise. -+ (create_ps_insn): Remove rest_count argument. -+ (remove_node_from_ps): Update rows_length. -+ (add_node_to_ps): Update rows_length and call create_ps_insn without -+ passing row_rest_count. -+ (rotate_partial_schedule): Update rows_length. -+ -+2011-07-11 Revital Eres <revital.eres@linaro.org> -+ -+ Backport from mainline -r175090. -+ gcc/ -+ * ddg.c (add_intra_loop_mem_dep): New function. -+ (build_intra_loop_deps): Call it. -+ gcc/testsuite -+ * gcc.dg/sms-9.c: New file. -+ -+2011-07-11 Ira Rosen <ira.rosen@linaro.org> -+ -+ Backport from FSF: -+ 2011-06-16 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ * tree-vectorizer.h (vect_recog_func_ptr): Change the first -+ argument to be a VEC of statements. -+ * tree-vect-loop.c (vect_determine_vectorization_factor): Remove the -+ assert that pattern statements have to have their vector type set. -+ * tree-vect-patterns.c (vect_recog_widen_sum_pattern): -+ Change the first argument to be a VEC of statements. Update -+ documentation. -+ (vect_recog_dot_prod_pattern, vect_recog_pow_pattern): Likewise. -+ (vect_handle_widen_mult_by_const): New function. -+ (vect_recog_widen_mult_pattern): Change the first argument to be a -+ VEC of statements. Update documentation. Check that the constant is -+ INTEGER_CST. Support multiplication by a constant that fits an -+ intermediate type - call vect_handle_widen_mult_by_const. -+ (vect_pattern_recog_1): Update vect_recog_func_ptr and its -+ call. Handle additional pattern statements if necessary. -+ -+ gcc/testsuite/ -+ * gcc.dg/vect/vect-widen-mult-half-u8.c: New test. -+ -+ and -+ 2011-06-30 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ * tree-vect-loop.c (vect_determine_vectorization_factor): Handle -+ both pattern and original statements if necessary. -+ (vect_transform_loop): Likewise. -+ * tree-vect-patterns.c (vect_pattern_recog): Update documentation. -+ * tree-vect-stmts.c (vect_mark_relevant): Add new argument. -+ Mark the pattern statement only if the original statement doesn't -+ have its own uses. -+ (process_use): Call vect_mark_relevant with additional parameter. -+ (vect_mark_stmts_to_be_vectorized): Likewise. -+ (vect_get_vec_def_for_operand): Use vectorized pattern statement. -+ (vect_analyze_stmt): Handle both pattern and original statements -+ if necessary. -+ (vect_transform_stmt): Don't store vectorized pattern statement -+ in the original statement. -+ (vect_is_simple_use_1): Use related pattern statement only if the -+ original statement is irrelevant. -+ * tree-vect-slp.c (vect_get_and_check_slp_defs): Likewise. -+ -+ gcc/testsuite/ -+ * gcc.dg/vect/slp-widen-mult-half.c: New test. -+ * gcc.dg/vect/vect-widen-mult-half.c: New test. -+ -+2011-07-07 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ * builtins.c (get_object_alignment): Fix comment. -+ * fold-const.c (get_pointer_modulus_and_residue): Remove -+ allow_func_align. Use get_object_alignment. -+ (fold_binary_loc): Update caller. -+ -+2011-07-07 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-06-29 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ PR tree-optimization/49545 -+ * builtins.c (get_object_alignment_1): Update function comment. -+ Do not use DECL_ALIGN for functions, but test -+ TARGET_PTRMEMFUNC_VBIT_LOCATION instead. -+ * fold-const.c (get_pointer_modulus_and_residue): Don't check -+ for functions here. -+ * tree-ssa-ccp.c (get_value_from_alignment): Likewise. -+ -+ gcc/testsuite/ -+ Backport from mainline: -+ -+ 2011-06-29 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * gcc.dg/torture/pr49169.c: Restrict to ARM and MIPS targets. -+ -+2011-07-07 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-07-27 Richard Guenther <rguenther@suse.de> -+ -+ PR tree-optimization/49169 -+ * fold-const.c (get_pointer_modulus_and_residue): Don't rely on -+ the alignment of function decls. -+ -+ gcc/testsuite/ -+ Backport from mainline: -+ -+ 2011-07-27 Michael Hope <michael.hope@linaro.org> -+ Richard Sandiford <richard.sandiford@linaro.org> -+ -+ PR tree-optimization/49169 -+ * gcc.dg/torture/pr49169.c: New test. -+ -+2011-07-01 Andrew Stubbs <ams@codesourcery.com> -+ -+ Merge from FSF GCC 4.6.1 (svn branches/gcc-4_6-branch 175677). -+ -+2011-07-03 Ira Rosen <ira.rosen@linaro.org> -+ -+ Backport from FSF: -+ 2011-06-12 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ * tree-vect-data-refs.c (vect_peeling_hash_get_most_frequent): -+ Take number of iterations to peel into account for equally frequent -+ misalignment values. -+ -+2011-07-01 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ Backport from mainline. -+ LP 744754 -+ 2011-04-17 Chung-Lin Tang <cltang@codesourcery.com> -+ -+ * config/arm/arm.c (neon_struct_mem_operand): -+ Support POST_INC/PRE_DEC memory operands. -+ -+2011-06-28 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ Backport from mainline. -+ LP 791327 -+ gcc/ -+ 2011-06-09 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ PR target/49335 -+ * config/arm/predicates.md (add_operator): New. -+ * config/arm/arm.md ("*arith_shiftsi"): Fix for SP reg usage -+ in Thumb2. -+ -+2011-06-28 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ Backport from mainline. -+ gcc/ -+ 2011-06-24 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ PR target/49385 -+ * config/arm/thumb2.md (*thumb2_movhi_insn): Make sure atleast -+ one of the operands is a register. -+ -+2011-06-28 Ira Rosen <ira.rosen@linaro.org> -+ -+ Backport from FSF: -+ -+ 2011-06-07 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ * tree-vectorizer.h (vect_recog_func_ptr): Make last argument to be -+ a pointer. -+ * tree-vect-patterns.c (vect_recog_widen_sum_pattern, -+ vect_recog_widen_mult_pattern, vect_recog_dot_prod_pattern, -+ vect_recog_pow_pattern): Likewise. -+ (vect_pattern_recog_1): Remove declaration. -+ (widened_name_p): Remove declaration. Add new argument to specify -+ whether to check that both types are either signed or unsigned. -+ (vect_recog_widen_mult_pattern): Update documentation. Handle -+ unsigned patterns and multiplication by constants. -+ (vect_pattern_recog_1): Update vect_recog_func references. Use -+ statement information from the statement returned from pattern -+ detection functions. -+ (vect_pattern_recog): Update vect_recog_func reference. -+ * tree-vect-stmts.c (vectorizable_type_promotion): For widening -+ multiplication by a constant use the type of the other operand. -+ -+ gcc/testsuite -+ * lib/target-supports.exp -+ (check_effective_target_vect_widen_mult_qi_to_hi): -+ Add NEON as supporting target. -+ (check_effective_target_vect_widen_mult_hi_to_si): Likewise. -+ (check_effective_target_vect_widen_mult_qi_to_hi_pattern): New. -+ (check_effective_target_vect_widen_mult_hi_to_si_pattern): New. -+ * gcc.dg/vect/vect-widen-mult-u8.c: Expect to be vectorized -+ using widening multiplication on targets that support it. -+ * gcc.dg/vect/vect-widen-mult-u16.c: Likewise. -+ * gcc.dg/vect/vect-widen-mult-const-s16.c: New test. -+ * gcc.dg/vect/vect-widen-mult-const-u16.c: New test. -+ -+ and -+ -+ 2011-06-15 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ * tree-vect-loop-manip.c (remove_dead_stmts_from_loop): Remove. -+ (slpeel_tree_peel_loop_to_edge): Don't call -+ remove_dead_stmts_from_loop. -+ * tree-vect-loop.c (vect_determine_vectorization_factor): Don't -+ remove irrelevant pattern statements. For irrelevant statements -+ check if it is the last statement of a detected pattern, use -+ corresponding pattern statement instead. -+ (destroy_loop_vec_info): No need to remove pattern statements, -+ only free stmt_vec_info. -+ (vect_transform_loop): For irrelevant statements check if it is -+ the last statement of a detected pattern, use corresponding -+ pattern statement instead. -+ * tree-vect-patterns.c (vect_pattern_recog_1): Don't insert -+ pattern statements. Set basic block for the new statement. -+ (vect_pattern_recog): Update documentation. -+ * tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized): Scan -+ operands of pattern statements. -+ (vectorizable_call): Fix printing. In case of a pattern statement -+ use the lhs of the original statement when creating a dummy -+ statement to replace the original call. -+ (vect_analyze_stmt): For irrelevant statements check if it is -+ the last statement of a detected pattern, use corresponding -+ pattern statement instead. -+ * tree-vect-slp.c (vect_schedule_slp_instance): For pattern -+ statements use gsi of the original statement. -+ -+ and -+ 2011-06-21 Ira Rosen <ira.rosen@linaro.org> -+ -+ PR tree-optimization/49478 -+ gcc/ -+ -+ * tree-vect-loop.c (vectorizable_reduction): Handle DOT_PROD_EXPR -+ with constant operand. -+ -+2011-06-28 Michael Hope <michael.hope@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ Chung-Lin Tang <cltang@codesourcery.com> -+ Richard Earnshaw <rearnsha@arm.com> -+ -+ PR target/48250 -+ * config/arm/arm.c (arm_legitimize_reload_address): Update cases -+ to use sign-magnitude offsets. Reject unsupported unaligned -+ cases. Add detailed description in comments. -+ * config/arm/arm.md (reload_outdf): Disable for ARM mode; change -+ condition from TARGET_32BIT to TARGET_ARM. -+ -+ Chung-Lin Tang <cltang@codesourcery.com> -+ -+ * config/arm/arm.c (arm_legitimize_reload_address): For NEON -+ quad-word modes, reduce to 9-bit index range when above 1016 -+ limit. -+ -+2011-06-20 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ gcc/ -+ Backport from mainline. -+ 2011-06-03 Julian Brown <julian@codesourcery.com> -+ -+ * config/arm/arm-cores.def (strongarm, strongarm110, strongarm1100) -+ (strongarm1110): Use strongarm tuning. -+ * config/arm/arm-protos.h (tune_params): Add max_insns_skipped -+ field. -+ * config/arm/arm.c (arm_strongarm_tune): New. -+ (arm_slowmul_tune, arm_fastmul_tune, arm_xscale_tune, arm_9e_tune) -+ (arm_v6t2_tune, arm_cortex_tune, arm_cortex_a5_tune) -+ (arm_cortex_a9_tune, arm_fa726te_tune): Add max_insns_skipped field -+ setting, using previous defaults or 1 for Cortex-A5. -+ (arm_option_override): Set max_insns_skipped from current tuning. -+ -+2011-06-20 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ gcc/ -+ Backport from mainline. -+ 2011-06-02 Julian Brown <julian@codesourcery.com> -+ -+ * config/arm/arm-cores.def (cortex-a5): Use cortex_a5 tuning. -+ * config/arm/arm.c (arm_cortex_a5_branch_cost): New. -+ (arm_cortex_a5_tune): New. -+ -+ 2011-06-02 Julian Brown <julian@codesourcery.com> -+ -+ * config/arm/arm-protos.h (tune_params): Add branch_cost hook. -+ * config/arm/arm.c (arm_default_branch_cost): New. -+ (arm_slowmul_tune, arm_fastmul_tune, arm_xscale_tune, arm_9e_tune) -+ (arm_v6t2_tune, arm_cortex_tune, arm_cortex_a9_tune) -+ (arm_fa726_tune): Set branch_cost field using -+ arm_default_branch_cost. -+ * config/arm/arm.h (BRANCH_COST): Use branch_cost hook from -+ current_tune structure. -+ * dojump.c (tm_p.h): Include file. -+ -+ 2011-06-02 Julian Brown <julian@codesourcery.com> -+ -+ * config/arm/arm-cores.def (arm1156t2-s, arm1156t2f-s): Use v6t2 -+ tuning. -+ (cortex-a5, cortex-a8, cortex-a15, cortex-r4, cortex-r4f, cortex-m4) -+ (cortex-m3, cortex-m1, cortex-m0): Use cortex tuning. -+ * config/arm/arm-protos.h (tune_params): Add prefer_constant_pool -+ field. -+ * config/arm/arm.c (arm_slowmul_tune, arm_fastmul_tune) -+ (arm_xscale_tune, arm_9e_tune, arm_cortex_a9_tune) -+ (arm_fa726te_tune): Add prefer_constant_pool setting. -+ (arm_v6t2_tune, arm_cortex_tune): New. -+ * config/arm/arm.h (TARGET_USE_MOVT): Make dependent on -+ prefer_constant_pool setting. -+ -+2011-06-20 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ gcc/ -+ Backport from mainline -+ 2011-06-01 Paul Brook <paul@cpodesourcery.com> -+ * config/arm/arm-cores.def: Add cortex-r5. Add DIV flags to -+ Cortex-A15. -+ * config/arm/arm-tune.md: Regenerate. -+ * config/arm/arm.c (FL_DIV): Rename... -+ (FL_THUMB_DIV): ... to this. -+ (FL_ARM_DIV): Define. -+ (FL_FOR_ARCH7R, FL_FOR_ARCH7M): Use FL_THUMB_DIV. -+ (arm_arch_hwdiv): Remove. -+ (arm_arch_thumb_hwdiv, arm_arch_arm_hwdiv): New variables. -+ (arm_issue_rate): Add cortexr5. -+ * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Set -+ __ARM_ARCH_EXT_IDIV__. -+ (TARGET_IDIV): Define. -+ (arm_arch_hwdiv): Remove. -+ (arm_arch_arm_hwdiv, arm_arch_thumb_hwdiv): New prototypes. -+ * config/arm/arm.md (tune_cortexr4): Add cortexr5. -+ (divsi3, udivsi3): New patterns. -+ * config/arm/thumb2.md (divsi3, udivsi3): Remove. -+ * doc/invoke.texi: Document ARM -mcpu=cortex-r5 -+ -+2011-06-14 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * LINARO-VERSION: Bump version. -+ -+2011-06-14 Andrew Stubbs <ams@codesourcery.com> -+ -+ GCC Linaro 4.6-2011.06-0 released. -+ -+ gcc/ -+ * LINARO-VERSION: Update. -+ -+2011-06-13 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ Backport from mainline: -+ gcc/ -+ 2011-06-13 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ PR target/48454 -+ * config/arm/neon.md (vec_pack_trunc<mode>): Set the lengths -+ correctly for the case with Quad vectors. -+ -+2011-06-10 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ Backport from mainline: -+ gcc/ -+ 2011-06-02 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ * config/arm/neon.md (orndi3_neon): Actually split it. -+ -+ -+2011-06-10 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ Backport from mainline. -+ gcc/ -+ 2011-05-26 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ * config/arm/neon.md ("orn<mode>3_neon"): Canonicalize not. -+ ("orndi3_neon"): Likewise. -+ ("bic<mode>3_neon"): Likewise. -+ -+ gcc/testsuite -+ 2011-05-26 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ * gcc.target/arm/neon-vorn-vbic.c: New test. -+ -+2011-06-07 Andrew Stubbs <ams@codesourcery.com> -+ -+ Backport from FSF: -+ -+ 2011-06-07 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * config/arm/arm.md (*maddhidi4tb, *maddhidi4tt): New define_insns. -+ (*maddhisi4tb, *maddhisi4tt): New define_insns. -+ -+ gcc/testsuite/ -+ * gcc.target/arm/smlatb-1.c: New file. -+ * gcc.target/arm/smlatt-1.c: New file. -+ * gcc.target/arm/smlaltb-1.c: New file. -+ * gcc.target/arm/smlaltt-1.c: New file. -+ -+2011-06-07 Andrew Stubbs <ams@codesourcery.com> -+ -+ Backport from FSF: -+ -+ 2011-06-07 Bernd Schmidt <bernds@codesourcery.com> -+ Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * simplify-rtx.c (simplify_unary_operation_1): Canonicalize widening -+ multiplies. -+ * doc/md.texi (Canonicalization of Instructions): Document widening -+ multiply canonicalization. -+ -+ gcc/testsuite/ -+ * gcc.target/arm/mla-2.c: New test. -+ -+2001-06-02 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ * gimple.c (gimple_build_call_internal_1): Add missing call to -+ gimple_call_reset_alias_info. -+ -+2001-06-02 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/testsuite/ -+ Backport from mainline: -+ -+ 2011-05-03 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * gcc.dg/vect/vect-strided-u16-i3.c: New test. -+ -+2001-06-02 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/testsuite/ -+ Backport from mainline: -+ -+ 2011-05-03 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * lib/target-supports.exp (check_effective_target_vect_strided): -+ Replace with... -+ (check_effective_target_vect_strided2) -+ (check_effective_target_vect_strided3) -+ (check_effective_target_vect_strided4) -+ (check_effective_target_vect_strided8): ...these new functions. -+ -+ * gcc.dg/vect/O3-pr39675-2.c: Update accordingly. -+ * gcc.dg/vect/costmodel/ppc/costmodel-slp-12.c: Likewise. -+ * gcc.dg/vect/fast-math-slp-27.c: Likewise. -+ * gcc.dg/vect/if-cvt-stores-vect-ifcvt-18.c: Likewise. -+ * gcc.dg/vect/pr37539.c: Likewise. -+ * gcc.dg/vect/slp-11a.c: Likewise. -+ * gcc.dg/vect/slp-11b.c: Likewise. -+ * gcc.dg/vect/slp-11c.c: Likewise. -+ * gcc.dg/vect/slp-12a.c: Likewise. -+ * gcc.dg/vect/slp-12b.c: Likewise. -+ * gcc.dg/vect/slp-18.c: Likewise. -+ * gcc.dg/vect/slp-19a.c: Likewise. -+ * gcc.dg/vect/slp-19b.c: Likewise. -+ * gcc.dg/vect/slp-21.c: Likewise. -+ * gcc.dg/vect/slp-23.c: Likewise. -+ * gcc.dg/vect/vect-cselim-1.c: Likewise. -+ -+ * gcc.dg/vect/fast-math-vect-complex-3.c: Use vect_stridedN -+ instead of vect_interleave && vect_extract_even_odd. -+ * gcc.dg/vect/no-scevccp-outer-10a.c: Likewise. -+ * gcc.dg/vect/no-scevccp-outer-10b.c: Likewise. -+ * gcc.dg/vect/no-scevccp-outer-20.c: Likewise. -+ * gcc.dg/vect/vect-1.c: Likewise. -+ * gcc.dg/vect/vect-10.c: Likewise. -+ * gcc.dg/vect/vect-98.c: Likewise. -+ * gcc.dg/vect/vect-107.c: Likewise. -+ * gcc.dg/vect/vect-strided-a-mult.c: Likewise. -+ * gcc.dg/vect/vect-strided-a-u16-i2.c: Likewise. -+ * gcc.dg/vect/vect-strided-a-u16-i4.c: Likewise. -+ * gcc.dg/vect/vect-strided-a-u16-mult.c: Likewise. -+ * gcc.dg/vect/vect-strided-a-u32-mult.c: Likewise. -+ * gcc.dg/vect/vect-strided-a-u8-i2-gap.c: Likewise. -+ * gcc.dg/vect/vect-strided-a-u8-i8-gap2.c: Likewise. -+ * gcc.dg/vect/vect-strided-a-u8-i8-gap7.c: Likewise. -+ * gcc.dg/vect/vect-strided-float.c: Likewise. -+ * gcc.dg/vect/vect-strided-mult-char-ls.c: Likewise. -+ * gcc.dg/vect/vect-strided-mult.c: Likewise. -+ * gcc.dg/vect/vect-strided-same-dr.c: Likewise. -+ * gcc.dg/vect/vect-strided-u16-i2.c: Likewise. -+ * gcc.dg/vect/vect-strided-u16-i4.c: Likewise. -+ * gcc.dg/vect/vect-strided-u32-i4.c: Likewise. -+ * gcc.dg/vect/vect-strided-u32-i8.c: Likewise. -+ * gcc.dg/vect/vect-strided-u32-mult.c: Likewise. -+ * gcc.dg/vect/vect-strided-u8-i2-gap.c: Likewise. -+ * gcc.dg/vect/vect-strided-u8-i2.c: Likewise. -+ * gcc.dg/vect/vect-strided-u8-i8-gap2.c: Likewise. -+ * gcc.dg/vect/vect-strided-u8-i8-gap4.c: Likewise. -+ * gcc.dg/vect/vect-strided-u8-i8-gap7.c: Likewise. -+ * gcc.dg/vect/vect-strided-u8-i8.c: Likewise. -+ * gcc.dg/vect/vect-vfa-03.c: Likewise. -+ -+ * gcc.dg/vect/no-scevccp-outer-18.c: Add vect_stridedN to the -+ target condition. -+ * gcc.dg/vect/pr30843.c: Likewise. -+ * gcc.dg/vect/pr33866.c: Likewise. -+ * gcc.dg/vect/slp-reduc-6.c: Likewise. -+ * gcc.dg/vect/vect-strided-store-a-u8-i2.c: Likewise. -+ * gcc.dg/vect/vect-strided-store-u16-i4.c: Likewise. -+ * gcc.dg/vect/vect-strided-store-u32-i2.c: Likewise. -+ -+2001-06-02 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/testsuite/ -+ Backport from mainline: -+ -+ 2011-05-03 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * gcc.dg/vect/slp-11.c: Split into... -+ * gcc.dg/vect/slp-11a.c, gcc.dg/vect/slp-11b.c, -+ gcc.dg/vect/slp-11c.c: ...these tests. -+ * gcc.dg/vect/slp-12a.c: Split 4-stride loop into... -+ * gcc.dg/vect/slp-12c.c: ...this new test. -+ * gcc.dg/vect/slp-19.c: Split into... -+ * gcc.dg/vect/slp-19a.c, gcc.dg/vect/slp-19b.c, -+ gcc.dg/vect/slp-19c.c: ...these new tests. -+ -+2001-06-02 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/testsuite/ -+ Backport from mainline: -+ -+ 2011-05-03 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * lib/target-supports.exp -+ (check_effective_target_vect_extract_even_odd_wide): Delete. -+ (check_effective_target_vect_strided_wide): Likewise. -+ * gcc.dg/vect/O3-pr39675-2.c: Use the non-wide versions instead. -+ * gcc.dg/vect/fast-math-pr35982.c: Likewise. -+ * gcc.dg/vect/fast-math-vect-complex-3.c: Likewise. -+ * gcc.dg/vect/pr37539.c: Likewise. -+ * gcc.dg/vect/slp-11.c: Likewise. -+ * gcc.dg/vect/slp-12a.c: Likewise. -+ * gcc.dg/vect/slp-12b.c: Likewise. -+ * gcc.dg/vect/slp-19.c: Likewise. -+ * gcc.dg/vect/slp-23.c: Likewise. -+ * gcc.dg/vect/vect-1.c: Likewise. -+ * gcc.dg/vect/vect-98.c: Likewise. -+ * gcc.dg/vect/vect-107.c: Likewise. -+ * gcc.dg/vect/vect-strided-float.c: Likewise. -+ -+2001-06-02 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/testsuite/ -+ Backport from mainline: -+ -+ 2011-04-21 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * gcc.dg/vect/vect.exp: Run the main tests twice, one with -flto -+ and once without. -+ -+2001-06-02 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainlie: -+ -+ 2011-05-03 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * config/arm/neon.md (vec_load_lanes<mode><mode>): New expanders, -+ (vec_store_lanes<mode><mode>): Likewise. -+ -+2001-06-02 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-05-03 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * doc/md.texi (vec_load_lanes, vec_store_lanes): Document. -+ * optabs.h (COI_vec_load_lanes, COI_vec_store_lanes): New -+ convert_optab_index values. -+ (vec_load_lanes_optab, vec_store_lanes_optab): New convert optabs. -+ * genopinit.c (optabs): Initialize the new optabs. -+ * internal-fn.def (LOAD_LANES, STORE_LANES): New internal functions. -+ * internal-fn.c (get_multi_vector_move, expand_LOAD_LANES) -+ (expand_STORE_LANES): New functions. -+ * tree.h (build_array_type_nelts): Declare. -+ * tree.c (build_array_type_nelts): New function. -+ * tree-vectorizer.h (vect_model_store_cost): Add a bool argument. -+ (vect_model_load_cost): Likewise. -+ (vect_store_lanes_supported, vect_load_lanes_supported) -+ (vect_record_strided_load_vectors): Declare. -+ * tree-vect-data-refs.c (vect_lanes_optab_supported_p) -+ (vect_store_lanes_supported, vect_load_lanes_supported): New functions. -+ (vect_transform_strided_load): Split out statement recording into... -+ (vect_record_strided_load_vectors): ...this new function. -+ * tree-vect-stmts.c (create_vector_array, read_vector_array) -+ (write_vector_array, create_array_ref): New functions. -+ (vect_model_store_cost): Add store_lanes_p argument. -+ (vect_model_load_cost): Add load_lanes_p argument. -+ (vectorizable_store): Try to use store-lanes functions for -+ interleaved stores. -+ (vectorizable_load): Likewise load-lanes and loads. -+ * tree-vect-slp.c (vect_get_and_check_slp_defs): Update call -+ to vect_model_store_cost. -+ (vect_build_slp_tree): Likewise vect_model_load_cost. -+ -+2001-06-02 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-04-20 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * tree-vect-stmts.c (vectorizable_store): Only chain one related -+ statement per copy. -+ -+2001-06-02 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ * tree-inline.c (estimate_num_insns): Likewise. -+ -+ Backport from mainline: -+ -+ 2011-04-20 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * Makefile.in (INTERNAL_FN_DEF, INTERNAL_FN_H): Define. -+ (GIMPLE_H): Include $(INTERNAL_FN_H). -+ (OBJS-common): Add internal-fn.o. -+ (internal-fn.o): New rule. -+ * internal-fn.def: New file. -+ * internal-fn.h: Likewise. -+ * internal-fn.c: Likewise. -+ * gimple.h: Include internal-fn.h. -+ (GF_CALL_INTERNAL): New gf_mask. -+ (gimple_statement_call): Put fntype into a union with a new -+ internal_fn field. -+ (gimple_build_call_internal): Declare. -+ (gimple_build_call_internal_vec): Likewise. -+ (gimple_call_same_target_p): Likewise. -+ (gimple_call_internal_p): New function. -+ (gimple_call_internal_fn): Likewise. -+ (gimple_call_set_fn): Assert that the function is not internal. -+ (gimple_call_set_fndecl): Likewise. -+ (gimple_call_set_internal_fn): New function. -+ (gimple_call_addr_fndecl): Handle null functions. -+ (gimple_call_return_type): Likewise. -+ [---- Plus backport adjustments: -+ (GF_CALL_INTERNAL_FN_SHIFT): New macro. -+ (GF_CALL_INTERNAL_FN): New gf_mask. -+ ----] -+ * gimple.c (gimple_build_call_internal_1): New function. -+ (gimple_build_call_internal): Likewise. -+ (gimple_build_call_internal_vec): Likewise. -+ (gimple_call_same_target_p): Likewise. -+ (gimple_call_flags): Handle calls to internal functions. -+ (gimple_call_fnspec): New function. -+ (gimple_call_arg_flags, gimple_call_return_flags): Use it. -+ (gimple_has_side_effects): Handle null functions. -+ (gimple_rhs_has_side_effects): Likewise. -+ (gimple_call_copy_skip_args): Handle calls to internal functions. -+ * cfgexpand.c (expand_call_stmt): Likewise. -+ * expr.c (expand_expr_real_1): Assert that the call isn't internal. -+ * gimple-low.c (gimple_check_call_args): Handle calls to internal -+ functions. -+ * gimple-pretty-print.c (dump_gimple_call): Likewise. -+ * ipa-prop.c (ipa_analyze_call_uses): Handle null functions. -+ * tree-cfg.c (verify_gimple_call): Handle calls to internal functions. -+ (do_warn_unused_result): Likewise. -+ [---- Plus backport adjustments: -+ (verify_stmt): Likewise. -+ ----] -+ * tree-eh.c (same_handler_p): Use gimple_call_same_target_p. -+ * tree-ssa-ccp.c (ccp_fold_stmt): Handle calls to internal functions. -+ [---- Plus backport adjustments: -+ (fold_gimple_call): Likewise. -+ ----] -+ * tree-ssa-dom.c (hashable_expr): Use the gimple statement to record -+ the target of a call. -+ (initialize_hash_element): Update accordingly. -+ (hashable_expr_equal_p): Use gimple_call_same_target_p. -+ (iterative_hash_hashable_expr): Handle calls to internal functions. -+ (print_expr_hash_elt): Likewise. -+ * tree-ssa-pre.c (can_value_number_call): Likewise. -+ (eliminate): Handle null functions. -+ * tree-ssa-sccvn.c (visit_use): Handle calls to internal functions. -+ * tree-ssa-structalias.c (find_func_aliases): Likewise. -+ * value-prof.c (gimple_ic_transform): Likewise. -+ (gimple_indirect_call_to_profile): Likewise. -+ -+2001-06-02 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-04-14 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * tree-vectorizer.h (vect_strided_store_supported): Add a -+ HOST_WIDE_INT argument. -+ (vect_strided_load_supported): Likewise. -+ (vect_permute_store_chain): Return void. -+ (vect_transform_strided_load): Likewise. -+ (vect_permute_load_chain): Delete. -+ * tree-vect-data-refs.c (vect_strided_store_supported): Take a -+ count argument. Check that the count is a power of two. -+ (vect_strided_load_supported): Likewise. -+ (vect_permute_store_chain): Return void. Update after above changes. -+ Assert that the access is supported. -+ (vect_permute_load_chain): Likewise. -+ (vect_transform_strided_load): Return void. -+ * tree-vect-stmts.c (vectorizable_store): Update calls after -+ above interface changes. -+ (vectorizable_load): Likewise. -+ (vect_analyze_stmt): Don't check for strided powers of two here. -+ -+2001-06-02 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-04-14 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * tree-vectorizer.h (vect_create_data_ref_ptr): Add an extra -+ type parameter. -+ * tree-vect-data-refs.c (vect_create_data_ref_ptr): Add an aggr_type -+ parameter. Generalise code to handle arrays as well as vectors. -+ (vect_setup_realignment): Update accordingly. -+ * tree-vect-stmts.c (vectorizable_store): Likewise. -+ (vectorizable_load): Likewise. -+ -+2001-06-02 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-04-14 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * tree-vect-stmts.c (vectorizable_load): Allocate and free dr_chain -+ within the per-copy loop. -+ -+2001-06-02 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-04-14 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * tree-vect-stmts.c (vectorizable_load): Print the number of copies -+ in the dump file. -+ -+2001-06-02 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-03-25 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * config/arm/arm.h (CANNOT_CHANGE_MODE_CLASS): Restrict FPA_REGS -+ case to VFPv1. -+ -+2011-05-26 Andrew Stubbs <ams@codesourcery.com> -+ -+ Merge from FSF GCC 4.6 (svn branches/gcc-4_6-branch 174261). -+ -+2011-06-02 Chung-Lin Tang <cltang@codesourcery.com> -+ -+ Backport from mainline: -+ -+ 2011-03-21 Chung-Lin Tang <cltang@codesourcery.com> -+ -+ gcc/ -+ * simplify-rtx.c (simplify_binary_operation_1): Handle -+ (xor (and A B) C) case when B and C are both constants. -+ -+ gcc/testsuite/ -+ * gcc.target/arm/xor-and.c: New. -+ -+ 2011-03-18 Chung-Lin Tang <cltang@codesourcery.com> -+ -+ gcc/ -+ * combine.c (try_combine): Do simplification only call of -+ subst() on i2 even when i1 is present. Update comments. -+ -+ gcc/testsuite/ -+ * gcc.target/arm/unsigned-extend-1.c: New. -+ -+2011-05-16 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * LINARO-VERSION: Bump version. -+ -+2011-05-16 Andrew Stubbs <ams@codesourcery.com> -+ -+ GCC Linaro 4.6-2011.05-0 released. -+ -+ gcc/ -+ * LINARO-VERSION: Update. -+ -+2011-05-13 Revital Eres <revital.eres@linaro.org> -+ -+ gcc/ -+ * ddg.c (free_ddg_all_sccs): Free sccs field in struct ddg_all_sccs. -+ * modulo-sched.c (sms_schedule): Avoid unfreed memory when SMS fails. -+ -+2011-05-13 Revital Eres <revital.eres@linaro.org> -+ -+ gcc/ -+ * loop-doloop.c (doloop_condition_get): Support new form of -+ doloop pattern and use prev_nondebug_insn instead of PREV_INSN. -+ * config/arm/thumb2.md (*thumb2_addsi3_compare0): Remove "*". -+ (doloop_end): New. -+ * config/arm/arm.md (*addsi3_compare0): Remove "*". -+ * params.def (sms-min-sc): New param flag. -+ * doc/invoke.texi (sms-min-sc): Document it. -+ * ddg.c (create_ddg_dep_from_intra_loop_link): If a true dep edge -+ enters the branch create an anti edge in the opposite direction -+ to prevent the creation of reg-moves. -+ * modulo-sched.c: Adjust comment to reflect the fact we are -+ scheduling closing branch. -+ (PS_STAGE_COUNT): Rename to CALC_STAGE_COUNT and redefine. -+ (stage_count): New field in struct partial_schedule. -+ (calculate_stage_count): New function. -+ (normalize_sched_times): Rename to reset_sched_times and handle -+ incrementing the sched time of the nodes by a constant value -+ passed as parameter. -+ (duplicate_insns_of_cycles): Skip closing branch. -+ (sms_schedule_by_order): Schedule closing branch. -+ (ps_insn_find_column): Handle closing branch. -+ (sms_schedule): Call reset_sched_times and adjust the code to -+ support scheduling of the closing branch. Use sms-min-sc. -+ Support new form of doloop pattern. -+ (ps_insert_empty_row): Update calls to normalize_sched_times -+ and rotate_partial_schedule functions. -+ -+2011-05-12 Michael Hope <michael.hope@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-05-05 Michael Hope <michael.hope@linaro.org> -+ -+ PR pch/45979 -+ * config/host-linux.c (TRY_EMPTY_VM_SPACE): Define for -+ __ARM_EABI__ hosts. -+ -+2011-05-06 Andrew Stubbs <ams@codesourcery.com> -+ -+ Merge from FSF GCC 4.6 (svn branches/gcc-4_6-branch 173480). -+ -+2011-05-06 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ From Sergey Grechanik <mouseentity@ispras.ru>, approved for mainline -+ -+ * config/arm/arm.c (coproc_secondary_reload_class): Return NO_REGS -+ for constant vectors. -+ -+2011-04-26 Andrew Stubbs <ams@codesourcery.com> -+ -+ Backport from FSF: -+ -+ 2011-04-05 Tom de Vries <tom@codesourcery.com> -+ -+ PR target/43920 -+ gcc/ -+ * config/arm/arm.h (BRANCH_COST): Set to 1 for Thumb-2 when optimizing -+ for size. -+ -+2011-05-03 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/testsuite/ -+ From Richard Earnshaw <rearnsha@arm.com> -+ -+ PR target/46329 -+ * gcc.target/arm/pr46329.c: New test. -+ -+ gcc/ -+ PR target/46329 -+ * config/arm/arm.c (arm_legitimate_constant_p_1): Return false -+ for all Neon struct constants. -+ -+2011-05-03 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ * targhooks.h (default_legitimate_constant_p); Declare. -+ * targhooks.c (default_legitimate_constant_p): New function. -+ -+ Backport from mainline: -+ 2011-04-21 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * target.def (legitimate_constant_p): New hook. -+ * doc/tm.texi.in (LEGITIMATE_CONSTANT_P): Replace with... -+ (TARGET_LEGITIMATE_CONSTANT_P): ...this. -+ * doc/tm.texi: Regenerate. -+ * calls.c (precompute_register_parameters): Replace uses of -+ LEGITIMATE_CONSTANT_P with targetm.legitimate_constant_p. -+ (emit_library_call_value_1): Likewise. -+ * expr.c (move_block_to_reg, can_store_by_pieces, emit_move_insn) -+ (compress_float_constant, emit_push_insn, expand_expr_real_1): Likewise. -+ * recog.c (general_operand, immediate_operand): Likewise. -+ * reload.c (find_reloads_toplev, find_reloads_address_part): Likewise. -+ * reload1.c (init_eliminable_invariants): Likewise. -+ -+ * config/arm/arm-protos.h (arm_cannot_force_const_mem): Delete. -+ * config/arm/arm.h (ARM_LEGITIMATE_CONSTANT_P): Likewise. -+ (THUMB_LEGITIMATE_CONSTANT_P, LEGITIMATE_CONSTANT_P): Likewise. -+ * config/arm/arm.c (TARGET_LEGITIMATE_CONSTANT_P): Define. -+ (arm_legitimate_constant_p_1, thumb_legitimate_constant_p) -+ (arm_legitimate_constant_p): New functions. -+ (arm_cannot_force_const_mem): Make static. -+ -+2011-05-03 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-05-03 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * hooks.h (hook_bool_mode_uhwi_false): Declare. -+ * hooks.c (hook_bool_mode_uhwi_false): New function. -+ * target.def (array_mode_supported_p): New hook. -+ * doc/tm.texi.in (TARGET_ARRAY_MODE_SUPPORTED_P): Add @hook. -+ * doc/tm.texi: Regenerate. -+ * stor-layout.c (mode_for_array): New function. -+ (layout_type): Use it. -+ * config/arm/arm.c (arm_array_mode_supported_p): New function. -+ (TARGET_ARRAY_MODE_SUPPORTED_P): Define. -+ -+2011-05-03 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-04-12 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * config/arm/arm.c (arm_print_operand): Use MEM_SIZE to get the -+ size of a '%A' memory reference. -+ (T_DREG, T_QREG): New neon_builtin_type_bits. -+ (arm_init_neon_builtins): Assert that the load and store operands -+ are neon_struct_operands. -+ (locate_neon_builtin_icode): Provide the neon_builtin_type_bits. -+ (NEON_ARG_MEMORY): New builtin_arg. -+ (neon_dereference_pointer): New function. -+ (arm_expand_neon_args): Add a neon_builtin_type_bits argument. -+ Handle NEON_ARG_MEMORY. -+ (arm_expand_neon_builtin): Update after above interface changes. -+ Use NEON_ARG_MEMORY for loads and stores. -+ * config/arm/predicates.md (neon_struct_operand): New predicate. -+ * config/arm/iterators.md (V_two_elem): Tweak formatting. -+ (V_three_elem): Use BLKmode for accesses that have no associated mode. -+ (V_four_elem): Tweak formatting. -+ * config/arm/neon.md (neon_vld1<mode>, neon_vld1_dup<mode>) -+ (neon_vst1_lane<mode>, neon_vst1<mode>, neon_vld2<mode>) -+ (neon_vld2_lane<mode>, neon_vld2_dup<mode>, neon_vst2<mode>) -+ (neon_vst2_lane<mode>, neon_vld3<mode>, neon_vld3_lane<mode>) -+ (neon_vld3_dup<mode>, neon_vst3<mode>, neon_vst3_lane<mode>) -+ (neon_vld4<mode>, neon_vld4_lane<mode>, neon_vld4_dup<mode>) -+ (neon_vst4<mode>): Replace pointer operand with a memory operand. -+ Use %A in the output template. -+ (neon_vld3qa<mode>, neon_vld3qb<mode>, neon_vst3qa<mode>) -+ (neon_vst3qb<mode>, neon_vld4qa<mode>, neon_vld4qb<mode>) -+ (neon_vst4qa<mode>, neon_vst4qb<mode>): Likewise, but halve -+ the width of the memory access. Remove post-increment. -+ * config/arm/neon-testgen.ml: Allow addresses to have an alignment. -+ -+ gcc/testsuite/ -+ Backport from mainline: -+ -+ 2011-04-12 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ * gcc.target/arm/neon-vld3-1.c: New test. -+ * gcc.target/arm/neon-vst3-1.c: New test. -+ * gcc.target/arm/neon/v*.c: Regenerate. -+ -+2011-05-03 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ Backport from mainline: -+ -+ 2011-03-30 Richard Sandiford <richard.sandiford@linaro.org> -+ Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ PR target/43590 -+ * config/arm/neon.md (neon_vld3qa<mode>, neon_vld4qa<mode>): Remove -+ operand 1 and reshuffle the operands to match. -+ (neon_vld3<mode>, neon_vld4<mode>): Update accordingly. -+ -+2011-05-04 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ Backport from mainline: -+ -+ 2011-03-29 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ PR debug/48190 -+ * dwarf2out.c (dw_loc_list_node): Add resolved_addr and replaced. -+ (cached_dw_loc_list_def): New structure. -+ (cached_dw_loc_list): New typedef. -+ (cached_dw_loc_list_table): New variable. -+ (cached_dw_loc_list_table_hash): New function. -+ (cached_dw_loc_list_table_eq): Likewise. -+ (add_location_or_const_value_attribute): Take a bool cache_p. -+ Cache the list when the parameter is true. -+ (gen_formal_parameter_die): Update caller. -+ (gen_variable_die): Likewise. -+ (dwarf2out_finish): Likewise. -+ (dwarf2out_abstract_function): Nullify cached_dw_loc_list_table -+ while generating debug info for the decl. -+ (dwarf2out_function_decl): Clear cached_dw_loc_list_table. -+ (dwarf2out_init): Initialize cached_dw_loc_list_table. -+ (resolve_addr): Cache the result of resolving a chain of -+ location lists. -+ -+2011-04-26 Andrew Stubbs <ams@codesourcery.com> -+ -+ Backport from FSF: -+ -+ 2011-04-15 Maxim Kuvyrkov <maxim@codesourcery.com> -+ -+ gcc/ -+ * combine.c (subst, combine_simlify_rtx): Add new argument, use it -+ to track processing of conditionals. Update all callers. -+ (try_combine, simplify_if_then_else): Update. -+ -+ 2011-04-25 Maxim Kuvyrkov <maxim@codesourcery.com> -+ Eric Botcazou <ebotcazou@adacore.com> -+ -+ gcc/ -+ * combine.c (combine_simplify_rtx): Avoid mis-simplifying conditionals -+ for STORE_FLAG_VALUE==-1 case. -+ -+2011-05-02 Ira Rosen <ira.rosen@linaro.org> -+ -+ Backport from FSF: -+ -+ 2011-03-27 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ * config/arm/arm.c (arm_autovectorize_vector_sizes): New function. -+ (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES): Define. -+ -+ gcc/testsuite/ -+ * gcc.dg/vect/vect-outer-5.c: Reduce the distance between data -+ accesses to preserve the meaning of the test for doubleword vectors. -+ * gcc.dg/vect/no-vfa-pr29145.c: Likewise. -+ * gcc.dg/vect/slp-3.c: Reduce the loop bound for the same reason. -+ -+2011-04-27 Ira Rosen <ira.rosen@linaro.org> -+ -+ Backport from FSF: -+ -+ 2011-04-03 Richard Guenther <rguenther@suse.de> -+ Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ * tree-if-conv.c (memrefs_read_or_written_unconditionally): Strip all -+ non-variable offsets and compare the remaining bases of the two -+ accesses instead of looking for exact same data-ref. -+ -+ gcc/testsuite/ -+ * gcc.dg/vect/if-cvt-stores-vect-ifcvt-18.c: New test. -+ * gcc.dg/vect/vect.exp: Run if-cvt-stores-vect* tests with -+ -ftree-loop-if-convert-stores. -+ -+2011-04-21 Andrew Stubbs <ams@codesourcery.com> -+ -+ Backport from FSF: -+ -+ 2008-12-03 Daniel Jacobowitz <dan@codesourcery.com> -+ -+ gcc/testsuite/ -+ * gcc.dg/vect/vect-shift-3.c, gcc.dg/vect/vect-shift-4.c: New. -+ * lib/target-supports.exp (check_effective_target_vect_shift_char): New -+ function. -+ -+2011-04-19 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * LINARO-VERSION: Bump version. -+ -+2011-04-19 Andrew Stubbs <ams@codesourcery.com> -+ -+ GCC Linaro 4.6-2011.04-0 released. -+ -+ gcc/ -+ * LINARO-VERSION: Update. -+ -+2011-04-13 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ Backport from FSF: -+ -+ 2011-04-12 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> -+ -+ gcc/ -+ * config/arm/arm.md (*arm_negdi2): Fix early clobber constraints. -+ -+2011-03-27 Ira Rosen <ira.rosen@linaro.org> -+ -+ gcc/ -+ * doc/invoke.texi (max-stores-to-sink): Document. -+ * params.h (MAX_STORES_TO_SINK): Define. -+ * opts.c (finish_options): Set MAX_STORES_TO_SINK to 0 -+ if either vectorization or if-conversion is disabled. -+ * tree-data-ref.c (dr_equal_offsets_p1): Moved and renamed from -+ tree-vect-data-refs.c vect_equal_offsets. -+ (dr_equal_offsets_p): New function. -+ (find_data_references_in_bb): Remove static. -+ * tree-data-ref.h (find_data_references_in_bb): Declare. -+ (dr_equal_offsets_p): Likewise. -+ * tree-vect-data-refs.c (vect_equal_offsets): Move to tree-data-ref.c. -+ (vect_drs_dependent_in_basic_block): Update calls to -+ vect_equal_offsets. -+ (vect_check_interleaving): Likewise. -+ * tree-ssa-phiopt.c: Include cfgloop.h and tree-data-ref.h. -+ (cond_if_else_store_replacement): Rename to... -+ (cond_if_else_store_replacement_1): ... this. Change arguments and -+ documentation. -+ (cond_if_else_store_replacement): New function. -+ * Makefile.in (tree-ssa-phiopt.o): Adjust dependencies. -+ * params.def (PARAM_MAX_STORES_TO_SINK): Define. -+ -+ gcc/testsuite/ -+ * gcc.dg/vect/vect-cselim-1.c: New test. -+ * gcc.dg/vect/vect-cselim-2.c: New test. -+ -+2011-04-07 Andrew Stubbs <ams@codesourcery.com> -+ -+ Merge from FSF GCC 4.6 (svn branches/gcc-4_6-branch 171921). -+ -+2011-03-23 Andrew Stubbs <ams@codesourcery.com> -+ -+ Backport from FSF: -+ -+ 2011-03-23 Julian Brown <julian@codesourcery.com> -+ -+ gcc/ -+ * expr.c (expand_expr_real_1): Only use BLKmode for volatile -+ accesses which are not naturally aligned. -+ -+2011-03-26 Andrew Stubbs <ams@codesourcery.com> -+ -+ Merge from FSF GCC 4.6 (svn branches/gcc-4_6-branch 171336). -+ -+2011-03-22 Andrew Stubbs <ams@codesourcery.com> -+ -+ Backport from FSF: -+ -+ 2011-03-21 Daniel Jacobowitz <dan@codesourcery.com> -+ -+ gcc/ -+ * config/arm/unwind-arm.c (__gnu_unwind_pr_common): Correct test -+ for barrier handlers. -+ -+2011-03-13 Andrew Stubbs <ams@codesourcery.com> -+ -+ Merge from FSF GCC 4.6 (trunk svn 170846). -+ -+2011-03-10 Andrew Stubbs <ams@codesourcery.com> -+ -+ Merge from FSF GCC 4.6 (trunk svn 170669). -+ -+2011-03-03 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * LINARO-VERSION: Bump version. -+ -+2011-03-03 Andrew Stubbs <ams@codesourcery.com> -+ -+ GCC Linaro 4.6-2011.03-0 released. -+ -+ gcc/ -+ * LINARO-VERSION: Update. -+ -+2011-02-02 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ * config/arm/predicates.md (neon_lane_number): Accept 0..15. -+ -+ gcc/testsuite/ -+ * gcc.target/arm/neon-vld-1.c: New test. -+ -+2011-02-02 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ gcc/ -+ PR target/47551 -+ * config/arm/arm.c (coproc_secondary_reload_class): Handle -+ structure modes. Don't check neon_vector_mem_operand for -+ vector or structure modes. -+ -+ gcc/testsuite/ -+ PR target/47551 -+ * gcc.target/arm/neon-modes-2.c: New test. -+ -+2011-02-28 Andrew Stubbs <ams@codesourcery.com> -+ -+ Merge from FSF GCC 4.6 (trunk svn 170492). -+ -+2011-02-25 Andrew Stubbs <ams@codesourcery.com> -+ -+ Merge from FSF GCC 4.6 (trunk svn 170356). -+ -+2011-02-21 Andrew Stubbs <ams@codesourcery.com> -+ Julian Brown <julian@codesourcery.com> -+ Mark Shinwell <shinwell@codesourcery.com> -+ -+ Forward-ported from Linaro GCC 4.5 (bzr99324). -+ -+ gcc/ -+ * config/arm/arm.h (arm_class_likely_spilled_p): Check against -+ LO_REGS only for Thumb-1. -+ (MODE_BASE_REG_CLASS): Restrict base registers to those which can -+ be used in short instructions when optimising for size on Thumb-2. -+ -+2011-02-19 Andrew Stubbs <ams@codesourcery.com> -+ -+ Merged from Linaro GCC 4.5 (bzr99409). -+ -+ 2010-09-30 Jie Zhang <jie@codesourcery.com> -+ -+ gcc/testsuite/ -+ * gcc.target/arm/neon-thumb2-move.c: Add -+ dg-require-effective-target arm_thumb2_ok. -+ -+2011-02-19 Andrew Stubbs <ams@codesourcery.com> -+ -+ Merged from Linaro GCC 4.5 (bzr99325). -+ -+ 2006-04-21 Kazu Hirata <kazu@codesourcery.com> -+ -+ gcc/testsuite/ -+ * gcc.target/arm/vfp-ldmdbd.c, gcc.target/arm/vfp-ldmdbs.c, -+ gcc.target/arm/vfp-ldmiad.c, gcc.target/arm/vfp-ldmias.c, -+ gcc.target/arm/vfp-stmdbd.c, gcc.target/arm/vfp-stmdbs.c, -+ gcc.target/arm/vfp-stmiad.c, gcc.target/arm/vfp-stmias.c: New. -+ -+2011-02-19 Andrew Stubbs <ams@codesourcery.com> -+ -+ gcc/ -+ * configure: Regenerate. -+ * configure.ac (PKGVERSION): Set default to a custom -+ Linaro string. -+ * LINARO-VERSION: New file. -+ -+Imported GCC from FSF trunk SVN revision 170067. ---- a/src/boehm-gc/ChangeLog -+++ b/src/boehm-gc/ChangeLog -@@ -1,3 +1,7 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/boehm-gc/configure -+++ b/src/boehm-gc/configure -@@ -9604,7 +9604,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -10520,7 +10520,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -10538,7 +10538,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -@@ -12428,7 +12428,7 @@ - esac - ;; - -- freebsd[12]*) -+ freebsd2.*) - # C++ shared libraries reported to be fairly broken before - # switch to ELF - ld_shlibs_CXX=no -@@ -14203,7 +14203,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -14221,7 +14221,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) ---- a/src/configure -+++ b/src/configure -@@ -6944,10 +6944,6 @@ - extra_arflags_for_target=" -X32_64" - extra_nmflags_for_target=" -B -X32_64" - ;; -- *-*-darwin[3-9]*) -- # ranlib before Darwin10 requires the -c flag to look at common symbols. -- extra_ranlibflags_for_target=" -c" -- ;; - mips*-*-pe | sh*-*-pe | *arm-wince-pe) - target_makefile_frag="config/mt-wince" - ;; ---- a/src/configure.ac -+++ b/src/configure.ac -@@ -2428,10 +2428,6 @@ - extra_arflags_for_target=" -X32_64" - extra_nmflags_for_target=" -B -X32_64" - ;; -- *-*-darwin[[3-9]]*) -- # ranlib before Darwin10 requires the -c flag to look at common symbols. -- extra_ranlibflags_for_target=" -c" -- ;; - mips*-*-pe | sh*-*-pe | *arm-wince-pe) - target_makefile_frag="config/mt-wince" - ;; ---- a/src/gcc/ChangeLog -+++ b/src/gcc/ChangeLog -@@ -1,3 +1,161 @@ -+2011-11-25 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ Backport from mainline: -+ -+ 2011-03-29 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ PR debug/48190 -+ * dwarf2out.c (dw_loc_list_node): Add resolved_addr and replaced. -+ (cached_dw_loc_list_def): New structure. -+ (cached_dw_loc_list): New typedef. -+ (cached_dw_loc_list_table): New variable. -+ (cached_dw_loc_list_table_hash): New function. -+ (cached_dw_loc_list_table_eq): Likewise. -+ (add_location_or_const_value_attribute): Take a bool cache_p. -+ Cache the list when the parameter is true. -+ (gen_formal_parameter_die): Update caller. -+ (gen_variable_die): Likewise. -+ (dwarf2out_finish): Likewise. -+ (dwarf2out_abstract_function): Nullify cached_dw_loc_list_table -+ while generating debug info for the decl. -+ (dwarf2out_function_decl): Clear cached_dw_loc_list_table. -+ (dwarf2out_init): Initialize cached_dw_loc_list_table. -+ (resolve_addr): Cache the result of resolving a chain of -+ location lists. -+ -+2011-11-24 Enkovich Ilya <ilya.enkovich@intel.com> -+ -+ PR target/51287 -+ * i386.c (distance_non_agu_define): Fix insn attr check. -+ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ -+2011-11-19 Eric Botcazou <ebotcazou@adacore.com> -+ -+ PR rtl-optimization/51187 -+ * reorg.c (relax_delay_slots): Do not consider a jump useless if there -+ is a barrier between the jump and its target label. -+ -+2011-11-19 Richard Earnshaw <rearnsha@arm.com> -+ -+ PR target/50493 -+ * config/arm/arm.c (neon_disambiguate_copy): Correctly handle partial -+ overlap of src and dest operands. -+ -+2011-11-18 Iain Sandoe <iains@gcc.gnu.org> -+ -+ PR target/49992 -+ * configure.ac: Remove ranlib special-casing for Darwin. -+ * configure: Regenerate. -+ -+2011-11-16 Richard Earnshaw <rearnsha@arm.com> -+ Bernd Schmidt <bernds@coudesourcery.com> -+ Sebastian Huber <sebastian.huber@embedded-brains.de> -+ -+ PR target/49641 -+ * config/arm/arm.c (store_multiple_sequence): Avoid cases where -+ the base reg is stored iff compiling for Thumb1. -+ -+2011-11-13 Iain Sandoe <iains@gcc.gnu.org> -+ -+ PR target/48108 -+ Backport from mainline r180523 -+ * config/darwin.c (top level): Amend comments concerning LTO output. -+ (lto_section_num): New variable. (darwin_lto_section_e): New GTY. -+ (LTO_SECTS_SECTION, LTO_INDEX_SECTION): New. -+ (LTO_NAMES_SECTION): Rename. -+ (darwin_asm_named_section): Record LTO section counts and switches -+ in a vec of darwin_lto_section_e. -+ (darwin_file_start): Remove unused code. -+ (darwin_file_end): Put an LTO section termination label. Handle -+ output of the wrapped LTO sections, index and names table. -+ -+2011-11-12 Iain Sandoe <iains@gcc.gnu.org> -+ -+ PR target/45233 -+ * config/rs6000/rs6000.c (rs6000_legitimize_reload_address): -+ Only expand a symbol ref. into an access when the entity is defined -+ in the TU. -+ -+2011-11-10 Jakub Jelinek <jakub@redhat.com> -+ -+ PR middle-end/51077 -+ * tree-object-size.c (addr_object_size): Check TREE_CODE of -+ MEM_REF's operand rather than code of the MEM_REF itself. -+ -+2011-11-07 Alan Modra <amodra@gmail.com> -+ -+ PR target/30282 -+ * config/rs6000/rs6000.c (rs6000_emit_stack_reset): Always emit -+ blockage for ABI_V4. -+ -+2011-11-04 Eric Botcazou <ebotcazou@adacore.com> -+ -+ PR c++/50608 -+ * c-parser.c (c_parser_postfix_expression) <RID_OFFSETOF>: Adjust call -+ to fold_offsetof. -+ * c-typeck.c (build_unary_op) <ADDR_EXPR>: Call fold_offsetof_1. -+ -+2011-11-04 Eric Botcazou <ebotcazou@adacore.com> -+ -+ PR target/50979 -+ * config/sparc/sparc.h (ASM_CPU_SPEC): Pass -Av8 if -mcpu=v8. -+ -+2011-11-03 Uros Bizjak <ubizjak@gmail.com> -+ -+ * config/i386/i386.md (lround<X87MODEF:mode><SWI248x:mode>2, -+ rint<mode>2, floor<mode>2, lfloor<MODEF:mode><SWI48:mode>2, -+ btrunc<mode>2, lwp_lwpval<mode>3): Use operands[N] instead of operandN. -+ -+2011-11-02 Eric Botcazou <ebotcazou@adacore.com> -+ -+ PR target/50945 -+ * config/sparc/sparc.md (movsf_insn): Reindent constraints. -+ (movsf_insn_no_fpu): Likewise. -+ (movdf_insn_sp32): Likewise. -+ (movdf_insn_sp32_no_fpu): Likewise. -+ (movdf_insn_sp32_v9): Likewise. Remove redundant GY constraint. -+ (movdf_insn_sp32_v9_no_fpu): Likewise. -+ (movdf_insn_sp64): Likewise. -+ (movdf_insn_sp64_no_fpu): Likewise. -+ (movtf_insn_sp32): Likewise. -+ (movtf_insn_sp32_no_fpu): Likewise. -+ (movtf_insn_sp64): Likewise. -+ (movtf_insn_sp64_hq): Likewise. -+ (movtf_insn_sp64_no_fpu): Likewise. -+ -+2011-11-02 Bernd Schmidt <bernds@codesourcery.com> -+ -+ * cfgcleanup.c (try_head_merge_bb): If get_condition returns -+ NULL for a jump that is a cc0 insn, pick the previous insn for -+ move_before. -+ -+2011-11-01 Uros Bizjak <ubizjak@gmail.com> -+ -+ * config/i386/i386.md (splitters for int-float conversion): Use -+ SUBREG_REG on SUBREGs in splitter constraints. -+ -+2011-11-01 Julian Brown <julian@codesourcery.com> -+ -+ PR rtl-optimization/47918 -+ * reload1.c (set_initial_label_offsets): Use initial offsets -+ for labels on the nonlocal_goto_handler_labels chain. -+ -+2011-10-29 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> -+ -+ PR target/50691 -+ * config/pa/pa.c (emit_move_sequence): Legitimize TLS symbol references. -+ * config/pa/pa.h (LEGITIMATE_CONSTANT_P): Return false for -+ TLS_MODEL_GLOBAL_DYNAMIC and TLS_MODEL_LOCAL_DYNAMIC symbol references. -+ -+2011-10-27 Uros Bizjak <ubizjak@gmail.com> -+ -+ PR target/50875 -+ * config/i386/sse.md (*avx_unpcklpd256): Remove extra insn -+ constraints. Change alternative 1 to "x,m,1". -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -@@ -144,8 +307,8 @@ - - 2011-10-07 Bernd Schmidt <bernds@codesourcery.com> - -- PR target/49049 -- * config/arm/arm.md (arm_subsi3_insn): Lose the last alternative. -+ PR target/49049 -+ * config/arm/arm.md (arm_subsi3_insn): Lose the last alternative. - - 2011-10-06 Jakub Jelinek <jakub@redhat.com> - ---- a/src/gcc/DATESTAMP -+++ b/src/gcc/DATESTAMP -@@ -1 +1 @@ --20111026 -+20111201 ---- a/src/gcc/LINARO-VERSION -+++ b/src/gcc/LINARO-VERSION -@@ -0,0 +1 @@ -+4.6-2011.12 ---- a/src/gcc/Makefile.in -+++ b/src/gcc/Makefile.in -@@ -888,6 +888,8 @@ - READ_MD_H = $(OBSTACK_H) $(HASHTAB_H) read-md.h - PARAMS_H = params.h params.def - BUILTINS_DEF = builtins.def sync-builtins.def omp-builtins.def -+INTERNAL_FN_DEF = internal-fn.def -+INTERNAL_FN_H = internal-fn.h $(INTERNAL_FN_DEF) - TREE_H = tree.h all-tree.def tree.def c-family/c-common.def \ - $(lang_tree_files) $(MACHMODE_H) tree-check.h $(BUILTINS_DEF) \ - $(INPUT_H) statistics.h $(VEC_H) treestruct.def $(HASHTAB_H) \ -@@ -897,7 +899,7 @@ - BASIC_BLOCK_H = basic-block.h $(PREDICT_H) $(VEC_H) $(FUNCTION_H) cfghooks.h - GIMPLE_H = gimple.h gimple.def gsstruct.def pointer-set.h $(VEC_H) \ - $(GGC_H) $(BASIC_BLOCK_H) $(TARGET_H) tree-ssa-operands.h \ -- tree-ssa-alias.h vecir.h -+ tree-ssa-alias.h vecir.h $(INTERNAL_FN_H) - GCOV_IO_H = gcov-io.h gcov-iov.h auto-host.h - COVERAGE_H = coverage.h $(GCOV_IO_H) - DEMANGLE_H = $(srcdir)/../include/demangle.h -@@ -1269,6 +1271,7 @@ - init-regs.o \ - input.o \ - integrate.o \ -+ internal-fn.o \ - intl.o \ - ira.o \ - ira-build.o \ -@@ -2422,7 +2425,8 @@ - tree-ssa-phiopt.o : tree-ssa-phiopt.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ - $(TM_H) $(GGC_H) $(TREE_H) $(TM_P_H) $(BASIC_BLOCK_H) \ - $(TREE_FLOW_H) $(TREE_PASS_H) $(TREE_DUMP_H) langhooks.h $(FLAGS_H) \ -- $(DIAGNOSTIC_H) $(TIMEVAR_H) pointer-set.h domwalk.h -+ $(DIAGNOSTIC_H) $(TIMEVAR_H) pointer-set.h domwalk.h $(CFGLOOP_H) \ -+ $(TREE_DATA_REF_H) - tree-nrv.o : tree-nrv.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ - $(TM_H) $(TREE_H) $(FUNCTION_H) $(BASIC_BLOCK_H) $(FLAGS_H) \ - $(DIAGNOSTIC_H) $(TREE_FLOW_H) $(TIMEVAR_H) $(TREE_DUMP_H) $(TREE_PASS_H) \ -@@ -2750,6 +2754,8 @@ - $(TM_H) $(TREE_H) $(DIAGNOSTIC_CORE_H) $(DIAGNOSTIC_H) $(TREE_FLOW_H) \ - $(TREE_PASS_H) tree-ssa-propagate.h tree-pretty-print.h \ - gimple-pretty-print.h -+internal-fn.o : internal-fn.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ -+ $(GIMPLE_H) $(TREE_H) $(EXPR_H) $(OPTABS_H) $(RECOG_H) - gimple.o : gimple.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TREE_H) \ - $(GGC_H) $(GIMPLE_H) $(DIAGNOSTIC_CORE_H) $(DIAGNOSTIC_H) gt-gimple.h \ - $(TREE_FLOW_H) value-prof.h $(FLAGS_H) $(DEMANGLE_H) \ ---- a/src/gcc/ada/ChangeLog -+++ b/src/gcc/ada/ChangeLog -@@ -1,3 +1,33 @@ -+2011-11-13 Iain Sandoe <iains@gcc.gnu.org> -+ -+ Backport from mainline r181474 -+ PR target/50678 -+ * init.c (__gnat_error_handler) [Darwin]: Move work-around to the -+ bug filed as radar #10302855 from __gnat_error_handler ... -+ ... to (__gnat_adjust_context_for_raise) [Darwin]: New. -+ (HAVE_GNAT_ADJUST_CONTEXT_FOR_RAISE) [Darwin]: Define. -+ (__gnat_error_handler) [Darwin]: Use __gnat_adjust_context_for_raise. -+ -+2011-11-18 Tristan Gingold <gingold@adacore.com> -+ Iain Sandoe <iains@gcc.gnu.org> -+ -+ PR target/49992 -+ * mlib-tgt-specific-darwin.adb (Archive_Indexer_Options): Remove. -+ * gcc-interface/Makefile.in (darwin): Remove ranlib special-casing -+ for Darwin. -+ -+2011-11-13 Iain Sandoe <iains@gcc.gnu.org> -+ -+ Backport from mainline r181319 -+ * gcc-interface/Makefile.in (stamp-gnatlib-$(RTSDIR)): Don't link -+ s-oscons.ads. -+ (OSCONS_CPP, OSCONS_EXTRACT): New. -+ (./bldtools/oscons/xoscons): New Target. -+ ($(RTSDIR)/s-oscons.ads): New Target. -+ (gnatlib): Depend on $(RTSDIR)/s-oscons.ads. -+ * Make-generated.in: Remove machinery to generate xoscons and -+ ada/s-oscons.ads. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/gcc/ada/Make-generated.in -+++ b/src/gcc/ada/Make-generated.in -@@ -64,37 +64,6 @@ - $(CP) $^ $(ADA_GEN_SUBDIR)/bldtools/nmake_s - (cd $(ADA_GEN_SUBDIR)/bldtools/nmake_s; gnatmake -q xnmake ; ./xnmake -s ../../nmake.ads ) - --ifeq ($(strip $(filter-out alpha64 ia64 dec hp vms% openvms% alphavms%,$(subst -, ,$(host)))),) --OSCONS_CPP=../../../$(DECC) -E /comment=as_is -DNATIVE \ -- -DTARGET='""$(target)""' s-oscons-tmplt.c -- --OSCONS_EXTRACT=../../../$(DECC) -DNATIVE \ -- -DTARGET='""$(target)""' s-oscons-tmplt.c ; \ -- ld -o s-oscons-tmplt.exe s-oscons-tmplt.obj; \ -- ./s-oscons-tmplt.exe > s-oscons-tmplt.s -- --else --# GCC_FOR_TARGET has paths relative to the gcc directory, so we need to ajust --# for running it from $(ADA_GEN_SUBDIR)/bldtools/oscons --OSCONS_CC=`echo "$(GCC_FOR_TARGET)" \ -- | sed -e 's^\./xgcc^../../../xgcc^' -e 's^-B./^-B../../../^'` --OSCONS_CPP=$(OSCONS_CC) $(GNATLIBCFLAGS) -E -C \ -- -DTARGET=\"$(target)\" s-oscons-tmplt.c > s-oscons-tmplt.i --OSCONS_EXTRACT=$(OSCONS_CC) -S s-oscons-tmplt.i --endif -- --$(ADA_GEN_SUBDIR)/s-oscons.ads : $(ADA_GEN_SUBDIR)/s-oscons-tmplt.c $(ADA_GEN_SUBDIR)/gsocket.h $(ADA_GEN_SUBDIR)/xoscons.adb $(ADA_GEN_SUBDIR)/xutil.ads $(ADA_GEN_SUBDIR)/xutil.adb -- -$(MKDIR) $(ADA_GEN_SUBDIR)/bldtools/oscons -- $(RM) $(addprefix $(ADA_GEN_SUBDIR)/bldtools/oscons/,$(notdir $^)) -- $(CP) $^ $(ADA_GEN_SUBDIR)/bldtools/oscons -- (cd $(ADA_GEN_SUBDIR)/bldtools/oscons ; gnatmake -q xoscons ; \ -- $(RM) s-oscons-tmplt.i s-oscons-tmplt.s ; \ -- $(OSCONS_CPP) ; \ -- $(OSCONS_EXTRACT) ; \ -- ./xoscons ; \ -- $(RM) ../../s-oscons.ads ; \ -- $(CP) s-oscons.ads s-oscons.h ../../) -- - $(ADA_GEN_SUBDIR)/sdefault.adb: $(ADA_GEN_SUBDIR)/stamp-sdefault ; @true - $(ADA_GEN_SUBDIR)/stamp-sdefault : $(srcdir)/version.c Makefile - $(ECHO) "pragma Style_Checks (Off);" >tmp-sdefault.adb ---- a/src/gcc/ada/gcc-interface/Makefile.in -+++ b/src/gcc/ada/gcc-interface/Makefile.in -@@ -2189,7 +2189,6 @@ - - EH_MECHANISM=-gcc - GNATLIB_SHARED = gnatlib-shared-darwin -- RANLIB = ranlib -c - GMEM_LIB = gmemlib - LIBRARY_VERSION := $(LIB_VERSION) - soext = .dylib -@@ -2447,21 +2446,52 @@ - $(foreach PAIR,$(LIBGNAT_TARGET_PAIRS), \ - $(LN_S) $(fsrcpfx)ada/$(word 2,$(subst <, ,$(PAIR))) \ - $(RTSDIR)/$(word 1,$(subst <, ,$(PAIR)));) --# Copy generated target dependent sources -- $(RM) $(RTSDIR)/s-oscons.ads -- (cd $(RTSDIR); $(LN_S) ../s-oscons.ads s-oscons.ads) -+# Copy tsystem.h -+ $(CP) $(srcdir)/tsystem.h $(RTSDIR) - $(RM) ../stamp-gnatlib-$(RTSDIR) - touch ../stamp-gnatlib1-$(RTSDIR) - - # GNULLI End ############################################################# - -+ifeq ($(strip $(filter-out alpha64 ia64 dec hp vms% openvms% alphavms%,$(subst -, ,$(host)))),) -+OSCONS_CPP=../../$(DECC) -E /comment=as_is -DNATIVE \ -+ -DTARGET='""$(target)""' $(fsrcpfx)ada/s-oscons-tmplt.c -+ -+OSCONS_EXTRACT=../../$(DECC) -DNATIVE \ -+ -DTARGET='""$(target)""' $(fsrcpfx)ada/s-oscons-tmplt.c ; \ -+ ld -o s-oscons-tmplt.exe s-oscons-tmplt.obj; \ -+ ./s-oscons-tmplt.exe > s-oscons-tmplt.s -+ -+else -+# GCC_FOR_TARGET has paths relative to the gcc directory, so we need to adjust -+# for running it from $(RTSDIR) -+OSCONS_CC=`echo "$(GCC_FOR_TARGET)" \ -+ | sed -e 's^\./xgcc^../../xgcc^' -e 's^-B./^-B../../^'` -+OSCONS_CPP=$(OSCONS_CC) $(GNATLIBCFLAGS) -E -C \ -+ -DTARGET=\"$(target)\" $(fsrcpfx)ada/s-oscons-tmplt.c > s-oscons-tmplt.i -+OSCONS_EXTRACT=$(OSCONS_CC) -S s-oscons-tmplt.i -+endif -+ -+./bldtools/oscons/xoscons: xoscons.adb xutil.ads xutil.adb -+ -$(MKDIR) ./bldtools/oscons -+ $(RM) $(addprefix ./bldtools/oscons/,$(notdir $^)) -+ $(CP) $^ ./bldtools/oscons -+ (cd ./bldtools/oscons ; gnatmake -q xoscons) -+ -+$(RTSDIR)/s-oscons.ads: ../stamp-gnatlib1-$(RTSDIR) s-oscons-tmplt.c gsocket.h ./bldtools/oscons/xoscons -+ $(RM) $(RTSDIR)/s-oscons-tmplt.i $(RTSDIR)/s-oscons-tmplt.s -+ (cd $(RTSDIR) ; \ -+ $(OSCONS_CPP) ; \ -+ $(OSCONS_EXTRACT) ; \ -+ ../bldtools/oscons/xoscons) -+ - # Don't use semicolon separated shell commands that involve list expansions. - # The semicolon triggers a call to DCL on VMS and DCL can't handle command - # line lengths in excess of 256 characters. - # Example: cd $(RTSDIR); ar rc libfoo.a $(LONG_LIST_OF_OBJS) - # is guaranteed to overflow the buffer. - --gnatlib: ../stamp-gnatlib1-$(RTSDIR) ../stamp-gnatlib2-$(RTSDIR) -+gnatlib: ../stamp-gnatlib1-$(RTSDIR) ../stamp-gnatlib2-$(RTSDIR) $(RTSDIR)/s-oscons.ads - $(MAKE) -C $(RTSDIR) \ - CC="`echo \"$(GCC_FOR_TARGET)\" \ - | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'`" \ ---- a/src/gcc/ada/init.c -+++ b/src/gcc/ada/init.c -@@ -2216,12 +2216,33 @@ - return 0; - } - -+#define HAVE_GNAT_ADJUST_CONTEXT_FOR_RAISE -+ -+void -+__gnat_adjust_context_for_raise (int signo ATTRIBUTE_UNUSED, -+ void *ucontext ATTRIBUTE_UNUSED) -+{ -+#if defined (__x86_64__) -+ /* Work around radar #10302855/pr50678, where the unwinders (libunwind or -+ libgcc_s depending on the system revision) and the DWARF unwind data for -+ the sigtramp have different ideas about register numbering (causing rbx -+ and rdx to be transposed).. */ -+ ucontext_t *uc = (ucontext_t *)ucontext ; -+ unsigned long t = uc->uc_mcontext->__ss.__rbx; -+ -+ uc->uc_mcontext->__ss.__rbx = uc->uc_mcontext->__ss.__rdx; -+ uc->uc_mcontext->__ss.__rdx = t; -+#endif -+} -+ - static void --__gnat_error_handler (int sig, siginfo_t *si, void *ucontext ATTRIBUTE_UNUSED) -+__gnat_error_handler (int sig, siginfo_t *si, void *ucontext) - { - struct Exception_Data *exception; - const char *msg; - -+ __gnat_adjust_context_for_raise (sig, ucontext); -+ - switch (sig) - { - case SIGSEGV: ---- a/src/gcc/ada/mlib-tgt-specific-darwin.adb -+++ b/src/gcc/ada/mlib-tgt-specific-darwin.adb -@@ -36,8 +36,6 @@ - - -- Non default subprograms - -- function Archive_Indexer_Options return String_List_Access; -- - procedure Build_Dynamic_Library - (Ofiles : Argument_List; - Options : Argument_List; -@@ -67,15 +65,6 @@ - (1 => Flat_Namespace'Access, - 2 => Shared_Libgcc'Access); - -- ----------------------------- -- -- Archive_Indexer_Options -- -- ----------------------------- -- -- function Archive_Indexer_Options return String_List_Access is -- begin -- return new String_List'(1 => new String'("-c")); -- end Archive_Indexer_Options; -- - --------------------------- - -- Build_Dynamic_Library -- - --------------------------- -@@ -180,7 +169,6 @@ - end Is_Archive_Ext; - - begin -- Archive_Indexer_Options_Ptr := Archive_Indexer_Options'Access; - Build_Dynamic_Library_Ptr := Build_Dynamic_Library'Access; - DLL_Ext_Ptr := DLL_Ext'Access; - Dynamic_Option_Ptr := Dynamic_Option'Access; ---- a/src/gcc/builtins.c -+++ b/src/gcc/builtins.c -@@ -264,7 +264,14 @@ - } - - /* Return the alignment in bits of EXP, an object. -- Don't return more than MAX_ALIGN no matter what. */ -+ Don't return more than MAX_ALIGN no matter what. -+ -+ Note that the address (and thus the alignment) computed here is based -+ on the address to which a symbol resolves, whereas DECL_ALIGN is based -+ on the address at which an object is actually located. These two -+ addresses are not always the same. For example, on ARM targets, -+ the address &foo of a Thumb function foo() has the lowest bit set, -+ whereas foo() itself starts on an even address. */ - - unsigned int - get_object_alignment (tree exp, unsigned int max_align) -@@ -286,7 +293,21 @@ - exp = DECL_INITIAL (exp); - if (DECL_P (exp) - && TREE_CODE (exp) != LABEL_DECL) -- align = DECL_ALIGN (exp); -+ { -+ if (TREE_CODE (exp) == FUNCTION_DECL) -+ { -+ /* Function addresses can encode extra information besides their -+ alignment. However, if TARGET_PTRMEMFUNC_VBIT_LOCATION -+ allows the low bit to be used as a virtual bit, we know -+ that the address itself must be 2-byte aligned. */ -+ if (TARGET_PTRMEMFUNC_VBIT_LOCATION == ptrmemfunc_vbit_in_pfn) -+ align = 2 * BITS_PER_UNIT; -+ else -+ align = BITS_PER_UNIT; -+ } -+ else -+ align = DECL_ALIGN (exp); -+ } - else if (CONSTANT_CLASS_P (exp)) - { - align = TYPE_ALIGN (TREE_TYPE (exp)); ---- a/src/gcc/c-family/ChangeLog -+++ b/src/gcc/c-family/ChangeLog -@@ -1,3 +1,15 @@ -+2011-11-04 Eric Botcazou <ebotcazou@adacore.com> -+ -+ PR c++/50608 -+ * c-common.c (c_fully_fold_internal) <ADDR_EXPR>: Call fold_offsetof_1. -+ (fold_offsetof_1): Make global. Remove STOP_REF argument and adjust. -+ <INDIRECT_REF>: Return the argument. -+ <ARRAY_REF>: Remove special code for negative offset. -+ Call fold_build_pointer_plus instead of size_binop. -+ (fold_offsetof): Remove STOP_REF argument and adjust. -+ * c-common.h (fold_offsetof_1): Declare. -+ (fold_offsetof): Remove STOP_REF argument. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/gcc/c-family/c-common.c -+++ b/src/gcc/c-family/c-common.c -@@ -1236,13 +1236,7 @@ - && (op1 = get_base_address (op0)) != NULL_TREE - && TREE_CODE (op1) == INDIRECT_REF - && TREE_CONSTANT (TREE_OPERAND (op1, 0))) -- { -- tree offset = fold_offsetof (op0, op1); -- op1 -- = fold_convert_loc (loc, TREE_TYPE (expr), TREE_OPERAND (op1, 0)); -- ret = fold_build2_loc (loc, POINTER_PLUS_EXPR, TREE_TYPE (expr), op1, -- offset); -- } -+ ret = fold_convert_loc (loc, TREE_TYPE (expr), fold_offsetof_1 (op0)); - else if (op0 != orig_op0 || in_init) - ret = in_init - ? fold_build1_initializer_loc (loc, code, TREE_TYPE (expr), op0) -@@ -8459,20 +8453,15 @@ - return uc; - } - --/* Build the result of __builtin_offsetof. EXPR is a nested sequence of -- component references, with STOP_REF, or alternatively an INDIRECT_REF of -- NULL, at the bottom; much like the traditional rendering of offsetof as a -- macro. Returns the folded and properly cast result. */ -+/* Fold an offsetof-like expression. EXPR is a nested sequence of component -+ references with an INDIRECT_REF of a constant at the bottom; much like the -+ traditional rendering of offsetof as a macro. Return the folded result. */ - --static tree --fold_offsetof_1 (tree expr, tree stop_ref) -+tree -+fold_offsetof_1 (tree expr) - { -- enum tree_code code = PLUS_EXPR; - tree base, off, t; - -- if (expr == stop_ref && TREE_CODE (expr) != ERROR_MARK) -- return size_zero_node; -- - switch (TREE_CODE (expr)) - { - case ERROR_MARK: -@@ -8489,15 +8478,15 @@ - - case NOP_EXPR: - case INDIRECT_REF: -- if (!integer_zerop (TREE_OPERAND (expr, 0))) -+ if (!TREE_CONSTANT (TREE_OPERAND (expr, 0))) - { - error ("cannot apply %<offsetof%> to a non constant address"); - return error_mark_node; - } -- return size_zero_node; -+ return TREE_OPERAND (expr, 0); - - case COMPONENT_REF: -- base = fold_offsetof_1 (TREE_OPERAND (expr, 0), stop_ref); -+ base = fold_offsetof_1 (TREE_OPERAND (expr, 0)); - if (base == error_mark_node) - return base; - -@@ -8515,21 +8504,14 @@ - break; - - case ARRAY_REF: -- base = fold_offsetof_1 (TREE_OPERAND (expr, 0), stop_ref); -+ base = fold_offsetof_1 (TREE_OPERAND (expr, 0)); - if (base == error_mark_node) - return base; - - t = TREE_OPERAND (expr, 1); -- if (TREE_CODE (t) == INTEGER_CST && tree_int_cst_sgn (t) < 0) -- { -- code = MINUS_EXPR; -- t = fold_build1_loc (input_location, NEGATE_EXPR, TREE_TYPE (t), t); -- } -- t = convert (sizetype, t); -- off = size_binop (MULT_EXPR, TYPE_SIZE_UNIT (TREE_TYPE (expr)), t); - - /* Check if the offset goes beyond the upper bound of the array. */ -- if (code == PLUS_EXPR && TREE_CODE (t) == INTEGER_CST) -+ if (TREE_CODE (t) == INTEGER_CST && tree_int_cst_sgn (t) >= 0) - { - tree upbound = array_ref_up_bound (expr); - if (upbound != NULL_TREE -@@ -8569,26 +8551,30 @@ - } - } - } -+ -+ t = convert (sizetype, t); -+ off = size_binop (MULT_EXPR, TYPE_SIZE_UNIT (TREE_TYPE (expr)), t); - break; - - case COMPOUND_EXPR: - /* Handle static members of volatile structs. */ - t = TREE_OPERAND (expr, 1); - gcc_assert (TREE_CODE (t) == VAR_DECL); -- return fold_offsetof_1 (t, stop_ref); -+ return fold_offsetof_1 (t); - - default: - gcc_unreachable (); - } - -- return size_binop (code, base, off); -+ return fold_build2 (POINTER_PLUS_EXPR, TREE_TYPE (base), base, off); - } - -+/* Likewise, but convert it to the return type of offsetof. */ -+ - tree --fold_offsetof (tree expr, tree stop_ref) -+fold_offsetof (tree expr) - { -- /* Convert back from the internal sizetype to size_t. */ -- return convert (size_type_node, fold_offsetof_1 (expr, stop_ref)); -+ return convert (size_type_node, fold_offsetof_1 (expr)); - } - - /* Warn for A ?: C expressions (with B omitted) where A is a boolean ---- a/src/gcc/c-family/c-common.h -+++ b/src/gcc/c-family/c-common.h -@@ -916,7 +916,8 @@ - - extern void verify_sequence_points (tree); - --extern tree fold_offsetof (tree, tree); -+extern tree fold_offsetof_1 (tree); -+extern tree fold_offsetof (tree); - - /* Places where an lvalue, or modifiable lvalue, may be required. - Used to select diagnostic messages in lvalue_error and ---- a/src/gcc/c-parser.c -+++ b/src/gcc/c-parser.c -@@ -6294,7 +6294,7 @@ - c_parser_error (parser, "expected identifier"); - c_parser_skip_until_found (parser, CPP_CLOSE_PAREN, - "expected %<)%>"); -- expr.value = fold_offsetof (offsetof_ref, NULL_TREE); -+ expr.value = fold_offsetof (offsetof_ref); - } - break; - case RID_CHOOSE_EXPR: ---- a/src/gcc/c-typeck.c -+++ b/src/gcc/c-typeck.c -@@ -3802,11 +3802,7 @@ - if (val && TREE_CODE (val) == INDIRECT_REF - && TREE_CONSTANT (TREE_OPERAND (val, 0))) - { -- tree op0 = fold_convert_loc (location, sizetype, -- fold_offsetof (arg, val)), op1; -- -- op1 = fold_convert_loc (location, argtype, TREE_OPERAND (val, 0)); -- ret = fold_build2_loc (location, POINTER_PLUS_EXPR, argtype, op1, op0); -+ ret = fold_convert_loc (location, argtype, fold_offsetof_1 (arg)); - goto return_build_unary_op; - } - ---- a/src/gcc/calls.c -+++ b/src/gcc/calls.c -@@ -686,7 +686,7 @@ - /* If the value is a non-legitimate constant, force it into a - pseudo now. TLS symbols sometimes need a call to resolve. */ - if (CONSTANT_P (args[i].value) -- && !LEGITIMATE_CONSTANT_P (args[i].value)) -+ && !targetm.legitimate_constant_p (args[i].mode, args[i].value)) - args[i].value = force_reg (args[i].mode, args[i].value); - - /* If we are to promote the function arg to a wider mode, -@@ -3449,7 +3449,8 @@ - - /* Make sure it is a reasonable operand for a move or push insn. */ - if (!REG_P (addr) && !MEM_P (addr) -- && ! (CONSTANT_P (addr) && LEGITIMATE_CONSTANT_P (addr))) -+ && !(CONSTANT_P (addr) -+ && targetm.legitimate_constant_p (Pmode, addr))) - addr = force_operand (addr, NULL_RTX); - - argvec[count].value = addr; -@@ -3490,7 +3491,7 @@ - - /* Make sure it is a reasonable operand for a move or push insn. */ - if (!REG_P (val) && !MEM_P (val) -- && ! (CONSTANT_P (val) && LEGITIMATE_CONSTANT_P (val))) -+ && !(CONSTANT_P (val) && targetm.legitimate_constant_p (mode, val))) - val = force_operand (val, NULL_RTX); - - if (pass_by_reference (&args_so_far, mode, NULL_TREE, 1)) ---- a/src/gcc/cfgcleanup.c -+++ b/src/gcc/cfgcleanup.c -@@ -1969,7 +1969,14 @@ - - cond = get_condition (jump, &move_before, true, false); - if (cond == NULL_RTX) -- move_before = jump; -+ { -+#ifdef HAVE_cc0 -+ if (reg_mentioned_p (cc0_rtx, jump)) -+ move_before = prev_nonnote_nondebug_insn (jump); -+ else -+#endif -+ move_before = jump; -+ } - - for (ix = 0; ix < nedges; ix++) - if (EDGE_SUCC (bb, ix)->dest == EXIT_BLOCK_PTR) -@@ -2131,7 +2138,14 @@ - jump = BB_END (final_dest_bb); - cond = get_condition (jump, &move_before, true, false); - if (cond == NULL_RTX) -- move_before = jump; -+ { -+#ifdef HAVE_cc0 -+ if (reg_mentioned_p (cc0_rtx, jump)) -+ move_before = prev_nonnote_nondebug_insn (jump); -+ else -+#endif -+ move_before = jump; -+ } - } - - do ---- a/src/gcc/cfgexpand.c -+++ b/src/gcc/cfgexpand.c -@@ -1843,12 +1843,17 @@ - static void - expand_call_stmt (gimple stmt) - { -- tree exp; -- tree lhs = gimple_call_lhs (stmt); -+ tree exp, lhs; - size_t i; - bool builtin_p; - tree decl; - -+ if (gimple_call_internal_p (stmt)) -+ { -+ expand_internal_call (stmt); -+ return; -+ } -+ - exp = build_vl_exp (CALL_EXPR, gimple_call_num_args (stmt) + 3); - - CALL_EXPR_FN (exp) = gimple_call_fn (stmt); -@@ -1886,6 +1891,7 @@ - SET_EXPR_LOCATION (exp, gimple_location (stmt)); - TREE_BLOCK (exp) = gimple_block (stmt); - -+ lhs = gimple_call_lhs (stmt); - if (lhs) - expand_assignment (lhs, exp, false); - else -@@ -3209,6 +3215,8 @@ - case VEC_UNPACK_LO_EXPR: - case VEC_WIDEN_MULT_HI_EXPR: - case VEC_WIDEN_MULT_LO_EXPR: -+ case VEC_WIDEN_LSHIFT_HI_EXPR: -+ case VEC_WIDEN_LSHIFT_LO_EXPR: - return NULL; - - /* Misc codes. */ ---- a/src/gcc/combine.c -+++ b/src/gcc/combine.c -@@ -391,8 +391,8 @@ - static void undo_all (void); - static void undo_commit (void); - static rtx *find_split_point (rtx *, rtx, bool); --static rtx subst (rtx, rtx, rtx, int, int); --static rtx combine_simplify_rtx (rtx, enum machine_mode, int); -+static rtx subst (rtx, rtx, rtx, int, int, int); -+static rtx combine_simplify_rtx (rtx, enum machine_mode, int, int); - static rtx simplify_if_then_else (rtx); - static rtx simplify_set (rtx); - static rtx simplify_logical (rtx); -@@ -3089,7 +3089,7 @@ - /* It is possible that the source of I2 or I1 may be performing - an unneeded operation, such as a ZERO_EXTEND of something - that is known to have the high part zero. Handle that case -- by letting subst look at the innermost one of them. -+ by letting subst look at the inner insns. - - Another way to do this would be to have a function that tries - to simplify a single insn instead of merging two or more -@@ -3112,13 +3112,11 @@ - if (i1) - { - subst_low_luid = DF_INSN_LUID (i1); -- i1src = subst (i1src, pc_rtx, pc_rtx, 0, 0); -- } -- else -- { -- subst_low_luid = DF_INSN_LUID (i2); -- i2src = subst (i2src, pc_rtx, pc_rtx, 0, 0); -+ i1src = subst (i1src, pc_rtx, pc_rtx, 0, 0, 0); - } -+ -+ subst_low_luid = DF_INSN_LUID (i2); -+ i2src = subst (i2src, pc_rtx, pc_rtx, 0, 0, 0); - } - - n_occurrences = 0; /* `subst' counts here */ -@@ -3129,7 +3127,7 @@ - self-referential RTL when we will be substituting I1SRC for I1DEST - later. Likewise if I0 feeds into I2, either directly or indirectly - through I1, and I0DEST is in I0SRC. */ -- newpat = subst (PATTERN (i3), i2dest, i2src, 0, -+ newpat = subst (PATTERN (i3), i2dest, i2src, 0, 0, - (i1_feeds_i2_n && i1dest_in_i1src) - || ((i0_feeds_i2_n || (i0_feeds_i1_n && i1_feeds_i2_n)) - && i0dest_in_i0src)); -@@ -3168,7 +3166,7 @@ - copy of I1SRC each time we substitute it, in order to avoid creating - self-referential RTL when we will be substituting I0SRC for I0DEST - later. */ -- newpat = subst (newpat, i1dest, i1src, 0, -+ newpat = subst (newpat, i1dest, i1src, 0, 0, - i0_feeds_i1_n && i0dest_in_i0src); - substed_i1 = 1; - -@@ -3198,7 +3196,7 @@ - - n_occurrences = 0; - subst_low_luid = DF_INSN_LUID (i0); -- newpat = subst (newpat, i0dest, i0src, 0, 0); -+ newpat = subst (newpat, i0dest, i0src, 0, 0, 0); - substed_i0 = 1; - } - -@@ -3260,7 +3258,7 @@ - { - rtx t = i1pat; - if (i0_feeds_i1_n) -- t = subst (t, i0dest, i0src, 0, 0); -+ t = subst (t, i0dest, i0src, 0, 0, 0); - - XVECEXP (newpat, 0, --total_sets) = t; - } -@@ -3268,10 +3266,10 @@ - { - rtx t = i2pat; - if (i1_feeds_i2_n) -- t = subst (t, i1dest, i1src_copy ? i1src_copy : i1src, 0, -+ t = subst (t, i1dest, i1src_copy ? i1src_copy : i1src, 0, 0, - i0_feeds_i1_n && i0dest_in_i0src); - if ((i0_feeds_i1_n && i1_feeds_i2_n) || i0_feeds_i2_n) -- t = subst (t, i0dest, i0src, 0, 0); -+ t = subst (t, i0dest, i0src, 0, 0, 0); - - XVECEXP (newpat, 0, --total_sets) = t; - } -@@ -4943,11 +4941,13 @@ - - IN_DEST is nonzero if we are processing the SET_DEST of a SET. - -+ IN_COND is nonzero if we are on top level of the condition. -+ - UNIQUE_COPY is nonzero if each substitution must be unique. We do this - by copying if `n_occurrences' is nonzero. */ - - static rtx --subst (rtx x, rtx from, rtx to, int in_dest, int unique_copy) -+subst (rtx x, rtx from, rtx to, int in_dest, int in_cond, int unique_copy) - { - enum rtx_code code = GET_CODE (x); - enum machine_mode op0_mode = VOIDmode; -@@ -5008,7 +5008,7 @@ - && GET_CODE (XVECEXP (x, 0, 0)) == SET - && GET_CODE (SET_SRC (XVECEXP (x, 0, 0))) == ASM_OPERANDS) - { -- new_rtx = subst (XVECEXP (x, 0, 0), from, to, 0, unique_copy); -+ new_rtx = subst (XVECEXP (x, 0, 0), from, to, 0, 0, unique_copy); - - /* If this substitution failed, this whole thing fails. */ - if (GET_CODE (new_rtx) == CLOBBER -@@ -5025,7 +5025,7 @@ - && GET_CODE (dest) != CC0 - && GET_CODE (dest) != PC) - { -- new_rtx = subst (dest, from, to, 0, unique_copy); -+ new_rtx = subst (dest, from, to, 0, 0, unique_copy); - - /* If this substitution failed, this whole thing fails. */ - if (GET_CODE (new_rtx) == CLOBBER -@@ -5071,8 +5071,8 @@ - } - else - { -- new_rtx = subst (XVECEXP (x, i, j), from, to, 0, -- unique_copy); -+ new_rtx = subst (XVECEXP (x, i, j), from, to, 0, 0, -+ unique_copy); - - /* If this substitution failed, this whole thing - fails. */ -@@ -5149,7 +5149,9 @@ - && (code == SUBREG || code == STRICT_LOW_PART - || code == ZERO_EXTRACT)) - || code == SET) -- && i == 0), unique_copy); -+ && i == 0), -+ code == IF_THEN_ELSE && i == 0, -+ unique_copy); - - /* If we found that we will have to reject this combination, - indicate that by returning the CLOBBER ourselves, rather than -@@ -5206,7 +5208,7 @@ - /* If X is sufficiently simple, don't bother trying to do anything - with it. */ - if (code != CONST_INT && code != REG && code != CLOBBER) -- x = combine_simplify_rtx (x, op0_mode, in_dest); -+ x = combine_simplify_rtx (x, op0_mode, in_dest, in_cond); - - if (GET_CODE (x) == code) - break; -@@ -5226,10 +5228,12 @@ - expression. - - OP0_MODE is the original mode of XEXP (x, 0). IN_DEST is nonzero -- if we are inside a SET_DEST. */ -+ if we are inside a SET_DEST. IN_COND is nonzero if we are on the top level -+ of a condition. */ - - static rtx --combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int in_dest) -+combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int in_dest, -+ int in_cond) - { - enum rtx_code code = GET_CODE (x); - enum machine_mode mode = GET_MODE (x); -@@ -5284,8 +5288,8 @@ - false arms to store-flag values. Be careful to use copy_rtx - here since true_rtx or false_rtx might share RTL with x as a - result of the if_then_else_cond call above. */ -- true_rtx = subst (copy_rtx (true_rtx), pc_rtx, pc_rtx, 0, 0); -- false_rtx = subst (copy_rtx (false_rtx), pc_rtx, pc_rtx, 0, 0); -+ true_rtx = subst (copy_rtx (true_rtx), pc_rtx, pc_rtx, 0, 0, 0); -+ false_rtx = subst (copy_rtx (false_rtx), pc_rtx, pc_rtx, 0, 0, 0); - - /* If true_rtx and false_rtx are not general_operands, an if_then_else - is unlikely to be simpler. */ -@@ -5629,7 +5633,7 @@ - { - /* Try to simplify the expression further. */ - rtx tor = simplify_gen_binary (IOR, mode, XEXP (x, 0), XEXP (x, 1)); -- temp = combine_simplify_rtx (tor, VOIDmode, in_dest); -+ temp = combine_simplify_rtx (tor, VOIDmode, in_dest, 0); - - /* If we could, great. If not, do not go ahead with the IOR - replacement, since PLUS appears in many special purpose -@@ -5722,7 +5726,16 @@ - ZERO_EXTRACT is indeed appropriate, it will be placed back by - the call to make_compound_operation in the SET case. */ - -- if (STORE_FLAG_VALUE == 1 -+ if (in_cond) -+ /* Don't apply below optimizations if the caller would -+ prefer a comparison rather than a value. -+ E.g., for the condition in an IF_THEN_ELSE most targets need -+ an explicit comparison. */ -+ { -+ ; -+ } -+ -+ else if (STORE_FLAG_VALUE == 1 - && new_code == NE && GET_MODE_CLASS (mode) == MODE_INT - && op1 == const0_rtx - && mode == GET_MODE (op0) -@@ -5768,7 +5781,10 @@ - - /* If STORE_FLAG_VALUE is -1, we have cases similar to - those above. */ -- if (STORE_FLAG_VALUE == -1 -+ if (in_cond) -+ ; -+ -+ else if (STORE_FLAG_VALUE == -1 - && new_code == NE && GET_MODE_CLASS (mode) == MODE_INT - && op1 == const0_rtx - && (num_sign_bit_copies (op0, mode) -@@ -5966,11 +5982,11 @@ - if (reg_mentioned_p (from, true_rtx)) - true_rtx = subst (known_cond (copy_rtx (true_rtx), true_code, - from, true_val), -- pc_rtx, pc_rtx, 0, 0); -+ pc_rtx, pc_rtx, 0, 0, 0); - if (reg_mentioned_p (from, false_rtx)) - false_rtx = subst (known_cond (copy_rtx (false_rtx), false_code, - from, false_val), -- pc_rtx, pc_rtx, 0, 0); -+ pc_rtx, pc_rtx, 0, 0, 0); - - SUBST (XEXP (x, 1), swapped ? false_rtx : true_rtx); - SUBST (XEXP (x, 2), swapped ? true_rtx : false_rtx); -@@ -6187,11 +6203,11 @@ - { - temp = subst (simplify_gen_relational (true_code, m, VOIDmode, - cond_op0, cond_op1), -- pc_rtx, pc_rtx, 0, 0); -+ pc_rtx, pc_rtx, 0, 0, 0); - temp = simplify_gen_binary (MULT, m, temp, - simplify_gen_binary (MULT, m, c1, - const_true_rtx)); -- temp = subst (temp, pc_rtx, pc_rtx, 0, 0); -+ temp = subst (temp, pc_rtx, pc_rtx, 0, 0, 0); - temp = simplify_gen_binary (op, m, gen_lowpart (m, z), temp); - - if (extend_op != UNKNOWN) -@@ -6271,10 +6287,18 @@ - enum rtx_code new_code; - rtx op0, op1, tmp; - int other_changed = 0; -+ rtx inner_compare = NULL_RTX; - enum machine_mode compare_mode = GET_MODE (dest); - - if (GET_CODE (src) == COMPARE) -- op0 = XEXP (src, 0), op1 = XEXP (src, 1); -+ { -+ op0 = XEXP (src, 0), op1 = XEXP (src, 1); -+ if (GET_CODE (op0) == COMPARE && op1 == const0_rtx) -+ { -+ inner_compare = op0; -+ op0 = XEXP (inner_compare, 0), op1 = XEXP (inner_compare, 1); -+ } -+ } - else - op0 = src, op1 = CONST0_RTX (GET_MODE (src)); - -@@ -6316,6 +6340,12 @@ - need to use a different CC mode here. */ - if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC) - compare_mode = GET_MODE (op0); -+ else if (inner_compare -+ && GET_MODE_CLASS (GET_MODE (inner_compare)) == MODE_CC -+ && new_code == old_code -+ && op0 == XEXP (inner_compare, 0) -+ && op1 == XEXP (inner_compare, 1)) -+ compare_mode = GET_MODE (inner_compare); - else - compare_mode = SELECT_CC_MODE (new_code, op0, op1); - ---- a/src/gcc/config/arm/arm-cores.def -+++ b/src/gcc/config/arm/arm-cores.def -@@ -70,10 +70,10 @@ - /* V4 Architecture Processors */ - ARM_CORE("arm8", arm8, 4, FL_MODE26 | FL_LDSCHED, fastmul) - ARM_CORE("arm810", arm810, 4, FL_MODE26 | FL_LDSCHED, fastmul) --ARM_CORE("strongarm", strongarm, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) --ARM_CORE("strongarm110", strongarm110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) --ARM_CORE("strongarm1100", strongarm1100, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) --ARM_CORE("strongarm1110", strongarm1110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) -+ARM_CORE("strongarm", strongarm, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm) -+ARM_CORE("strongarm110", strongarm110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm) -+ARM_CORE("strongarm1100", strongarm1100, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm) -+ARM_CORE("strongarm1110", strongarm1110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm) - ARM_CORE("fa526", fa526, 4, FL_LDSCHED, fastmul) - ARM_CORE("fa626", fa626, 4, FL_LDSCHED, fastmul) - -@@ -122,15 +122,18 @@ - ARM_CORE("arm1176jzf-s", arm1176jzfs, 6ZK, FL_LDSCHED | FL_VFPV2, 9e) - ARM_CORE("mpcorenovfp", mpcorenovfp, 6K, FL_LDSCHED, 9e) - ARM_CORE("mpcore", mpcore, 6K, FL_LDSCHED | FL_VFPV2, 9e) --ARM_CORE("arm1156t2-s", arm1156t2s, 6T2, FL_LDSCHED, 9e) --ARM_CORE("arm1156t2f-s", arm1156t2fs, 6T2, FL_LDSCHED | FL_VFPV2, 9e) --ARM_CORE("cortex-a5", cortexa5, 7A, FL_LDSCHED, 9e) --ARM_CORE("cortex-a8", cortexa8, 7A, FL_LDSCHED, 9e) -+ARM_CORE("arm1156t2-s", arm1156t2s, 6T2, FL_LDSCHED, v6t2) -+ARM_CORE("arm1156t2f-s", arm1156t2fs, 6T2, FL_LDSCHED | FL_VFPV2, v6t2) -+ARM_CORE("generic-armv7-a", genericv7a, 7A, FL_LDSCHED, cortex) -+ARM_CORE("cortex-a5", cortexa5, 7A, FL_LDSCHED, cortex_a5) -+ARM_CORE("cortex-a8", cortexa8, 7A, FL_LDSCHED, cortex) - ARM_CORE("cortex-a9", cortexa9, 7A, FL_LDSCHED, cortex_a9) --ARM_CORE("cortex-a15", cortexa15, 7A, FL_LDSCHED, 9e) --ARM_CORE("cortex-r4", cortexr4, 7R, FL_LDSCHED, 9e) --ARM_CORE("cortex-r4f", cortexr4f, 7R, FL_LDSCHED, 9e) --ARM_CORE("cortex-m4", cortexm4, 7EM, FL_LDSCHED, 9e) --ARM_CORE("cortex-m3", cortexm3, 7M, FL_LDSCHED, 9e) --ARM_CORE("cortex-m1", cortexm1, 6M, FL_LDSCHED, 9e) --ARM_CORE("cortex-m0", cortexm0, 6M, FL_LDSCHED, 9e) -+ARM_CORE("cortex-a15", cortexa15, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex) -+ARM_CORE("cortex-r4", cortexr4, 7R, FL_LDSCHED, cortex) -+ARM_CORE("cortex-r4f", cortexr4f, 7R, FL_LDSCHED, cortex) -+ARM_CORE("cortex-r5", cortexr5, 7R, FL_LDSCHED | FL_ARM_DIV, cortex) -+ARM_CORE("cortex-m4", cortexm4, 7EM, FL_LDSCHED, cortex) -+ARM_CORE("cortex-m3", cortexm3, 7M, FL_LDSCHED, cortex) -+ARM_CORE("cortex-m1", cortexm1, 6M, FL_LDSCHED, cortex) -+ARM_CORE("cortex-m0", cortexm0, 6M, FL_LDSCHED, cortex) -+ ---- a/src/gcc/config/arm/arm-protos.h -+++ b/src/gcc/config/arm/arm-protos.h -@@ -46,6 +46,7 @@ - extern bool arm_small_register_classes_for_mode_p (enum machine_mode); - extern int arm_hard_regno_mode_ok (unsigned int, enum machine_mode); - extern int const_ok_for_arm (HOST_WIDE_INT); -+extern int const_ok_for_op (HOST_WIDE_INT, enum rtx_code); - extern int arm_split_constant (RTX_CODE, enum machine_mode, rtx, - HOST_WIDE_INT, rtx, rtx, int); - extern RTX_CODE arm_canonicalize_comparison (RTX_CODE, rtx *, rtx *); -@@ -58,14 +59,19 @@ - int); - extern rtx thumb_legitimize_reload_address (rtx *, enum machine_mode, int, int, - int); -+extern int thumb1_legitimate_address_p (enum machine_mode, rtx, int); - extern int arm_const_double_rtx (rtx); - extern int neg_const_double_rtx_ok_for_fpa (rtx); - extern int vfp3_const_double_rtx (rtx); - extern int neon_immediate_valid_for_move (rtx, enum machine_mode, rtx *, int *); - extern int neon_immediate_valid_for_logic (rtx, enum machine_mode, int, rtx *, - int *); -+extern int neon_immediate_valid_for_shift (rtx, enum machine_mode, rtx *, -+ int *, bool); - extern char *neon_output_logic_immediate (const char *, rtx *, - enum machine_mode, int, int); -+extern char *neon_output_shift_immediate (const char *, char, rtx *, -+ enum machine_mode, int, bool); - extern void neon_pairwise_reduce (rtx, rtx, enum machine_mode, - rtx (*) (rtx, rtx, rtx)); - extern rtx neon_make_constant (rtx); -@@ -81,7 +87,6 @@ - extern enum reg_class coproc_secondary_reload_class (enum machine_mode, rtx, - bool); - extern bool arm_tls_referenced_p (rtx); --extern bool arm_cannot_force_const_mem (rtx); - - extern int cirrus_memory_offset (rtx); - extern int arm_coproc_mem_operand (rtx, bool); -@@ -152,6 +157,7 @@ - extern const char *arm_output_memory_barrier (rtx *); - extern const char *arm_output_sync_insn (rtx, rtx *); - extern unsigned int arm_sync_loop_insns (rtx , rtx *); -+extern int arm_attr_length_push_multi(rtx, rtx); - - #if defined TREE_CODE - extern void arm_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree); -@@ -175,6 +181,7 @@ - #endif - extern int thumb_shiftable_const (unsigned HOST_WIDE_INT); - #ifdef RTX_CODE -+extern enum arm_cond_code maybe_get_arm_condition_code (rtx); - extern void thumb1_final_prescan_insn (rtx); - extern void thumb2_final_prescan_insn (rtx); - extern const char *thumb_load_double_from_address (rtx *); -@@ -220,9 +227,14 @@ - bool (*rtx_costs) (rtx, RTX_CODE, RTX_CODE, int *, bool); - bool (*sched_adjust_cost) (rtx, rtx, rtx, int *); - int constant_limit; -+ /* Maximum number of instructions to conditionalise in -+ arm_final_prescan_insn. */ -+ int max_insns_skipped; - int num_prefetch_slots; - int l1_cache_size; - int l1_cache_line_size; -+ bool prefer_constant_pool; -+ int (*branch_cost) (bool, bool); - }; - - extern const struct tune_params *current_tune; ---- a/src/gcc/config/arm/arm-tune.md -+++ b/src/gcc/config/arm/arm-tune.md -@@ -1,5 +1,5 @@ - ;; -*- buffer-read-only: t -*- - ;; Generated automatically by gentune.sh from arm-cores.def - (define_attr "tune" -- "arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,fa526,fa626,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,iwmmxt2,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1026ejs,arm1136js,arm1136jfs,arm1176jzs,arm1176jzfs,mpcorenovfp,mpcore,arm1156t2s,arm1156t2fs,cortexa5,cortexa8,cortexa9,cortexa15,cortexr4,cortexr4f,cortexm4,cortexm3,cortexm1,cortexm0" -+ "arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,fa526,fa626,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,iwmmxt2,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1026ejs,arm1136js,arm1136jfs,arm1176jzs,arm1176jzfs,mpcorenovfp,mpcore,arm1156t2s,arm1156t2fs,genericv7a,cortexa5,cortexa8,cortexa9,cortexa15,cortexr4,cortexr4f,cortexr5,cortexm4,cortexm3,cortexm1,cortexm0" - (const (symbol_ref "((enum attr_tune) arm_tune)"))) ---- a/src/gcc/config/arm/arm.c -+++ b/src/gcc/config/arm/arm.c -@@ -63,6 +63,11 @@ - - void (*arm_lang_output_object_attributes_hook)(void); - -+struct four_ints -+{ -+ int i[4]; -+}; -+ - /* Forward function declarations. */ - static bool arm_needs_doubleword_align (enum machine_mode, const_tree); - static int arm_compute_static_chain_stack_bytes (void); -@@ -81,7 +86,6 @@ - static bool arm_legitimate_address_p (enum machine_mode, rtx, bool); - static int thumb_far_jump_used_p (void); - static bool thumb_force_lr_save (void); --static int const_ok_for_op (HOST_WIDE_INT, enum rtx_code); - static rtx emit_sfm (int, int); - static unsigned arm_size_return_regs (void); - static bool arm_assemble_integer (rtx, unsigned int, int); -@@ -129,7 +133,13 @@ - static int arm_comp_type_attributes (const_tree, const_tree); - static void arm_set_default_type_attributes (tree); - static int arm_adjust_cost (rtx, rtx, rtx, int); --static int count_insns_for_constant (HOST_WIDE_INT, int); -+static int optimal_immediate_sequence (enum rtx_code code, -+ unsigned HOST_WIDE_INT val, -+ struct four_ints *return_sequence); -+static int optimal_immediate_sequence_1 (enum rtx_code code, -+ unsigned HOST_WIDE_INT val, -+ struct four_ints *return_sequence, -+ int i); - static int arm_get_strip_length (int); - static bool arm_function_ok_for_sibcall (tree, tree); - static enum machine_mode arm_promote_function_mode (const_tree, -@@ -143,6 +153,8 @@ - static void arm_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, - tree); - static bool arm_have_conditional_execution (void); -+static bool arm_cannot_force_const_mem (rtx); -+static bool arm_legitimate_constant_p (enum machine_mode, rtx); - static bool arm_rtx_costs_1 (rtx, enum rtx_code, int*, bool); - static bool arm_size_rtx_costs (rtx, enum rtx_code, enum rtx_code, int *); - static bool arm_slowmul_rtx_costs (rtx, enum rtx_code, enum rtx_code, int *, bool); -@@ -160,6 +172,7 @@ - static rtx arm_expand_binop_builtin (enum insn_code, tree, rtx); - static rtx arm_expand_unop_builtin (enum insn_code, tree, rtx, int); - static rtx arm_expand_builtin (tree, rtx, rtx, enum machine_mode, int); -+static tree arm_builtin_decl (unsigned, bool); - static void emit_constant_insn (rtx cond, rtx pattern); - static rtx emit_set_insn (rtx, rtx); - static int arm_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode, -@@ -241,6 +254,8 @@ - static bool cortex_a9_sched_adjust_cost (rtx, rtx, rtx, int *); - static bool xscale_sched_adjust_cost (rtx, rtx, rtx, int *); - static bool fa726te_sched_adjust_cost (rtx, rtx, rtx, int *); -+static bool arm_array_mode_supported_p (enum machine_mode, -+ unsigned HOST_WIDE_INT); - static enum machine_mode arm_preferred_simd_mode (enum machine_mode); - static bool arm_class_likely_spilled_p (reg_class_t); - static bool arm_vector_alignment_reachable (const_tree type, bool is_packed); -@@ -250,6 +265,9 @@ - bool is_packed); - static void arm_conditional_register_usage (void); - static reg_class_t arm_preferred_rename_class (reg_class_t rclass); -+static unsigned int arm_autovectorize_vector_sizes (void); -+static int arm_default_branch_cost (bool, bool); -+static int arm_cortex_a5_branch_cost (bool, bool); - - - /* Table of machine attributes. */ -@@ -393,8 +411,13 @@ - #define TARGET_SHIFT_TRUNCATION_MASK arm_shift_truncation_mask - #undef TARGET_VECTOR_MODE_SUPPORTED_P - #define TARGET_VECTOR_MODE_SUPPORTED_P arm_vector_mode_supported_p -+#undef TARGET_ARRAY_MODE_SUPPORTED_P -+#define TARGET_ARRAY_MODE_SUPPORTED_P arm_array_mode_supported_p - #undef TARGET_VECTORIZE_PREFERRED_SIMD_MODE - #define TARGET_VECTORIZE_PREFERRED_SIMD_MODE arm_preferred_simd_mode -+#undef TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES -+#define TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES \ -+ arm_autovectorize_vector_sizes - - #undef TARGET_MACHINE_DEPENDENT_REORG - #define TARGET_MACHINE_DEPENDENT_REORG arm_reorg -@@ -403,6 +426,8 @@ - #define TARGET_INIT_BUILTINS arm_init_builtins - #undef TARGET_EXPAND_BUILTIN - #define TARGET_EXPAND_BUILTIN arm_expand_builtin -+#undef TARGET_BUILTIN_DECL -+#define TARGET_BUILTIN_DECL arm_builtin_decl - - #undef TARGET_INIT_LIBFUNCS - #define TARGET_INIT_LIBFUNCS arm_init_libfuncs -@@ -519,6 +544,9 @@ - #undef TARGET_HAVE_CONDITIONAL_EXECUTION - #define TARGET_HAVE_CONDITIONAL_EXECUTION arm_have_conditional_execution - -+#undef TARGET_LEGITIMATE_CONSTANT_P -+#define TARGET_LEGITIMATE_CONSTANT_P arm_legitimate_constant_p -+ - #undef TARGET_CANNOT_FORCE_CONST_MEM - #define TARGET_CANNOT_FORCE_CONST_MEM arm_cannot_force_const_mem - -@@ -659,12 +687,13 @@ - #define FL_THUMB2 (1 << 16) /* Thumb-2. */ - #define FL_NOTM (1 << 17) /* Instructions not present in the 'M' - profile. */ --#define FL_DIV (1 << 18) /* Hardware divide. */ -+#define FL_THUMB_DIV (1 << 18) /* Hardware divide (Thumb mode). */ - #define FL_VFPV3 (1 << 19) /* Vector Floating Point V3. */ - #define FL_NEON (1 << 20) /* Neon instructions. */ - #define FL_ARCH7EM (1 << 21) /* Instructions present in the ARMv7E-M - architecture. */ - #define FL_ARCH7 (1 << 22) /* Architecture 7. */ -+#define FL_ARM_DIV (1 << 23) /* Hardware divide (ARM mode). */ - - #define FL_IWMMXT (1 << 29) /* XScale v2 or "Intel Wireless MMX technology". */ - -@@ -691,8 +720,8 @@ - #define FL_FOR_ARCH6M (FL_FOR_ARCH6 & ~FL_NOTM) - #define FL_FOR_ARCH7 ((FL_FOR_ARCH6T2 & ~FL_NOTM) | FL_ARCH7) - #define FL_FOR_ARCH7A (FL_FOR_ARCH7 | FL_NOTM | FL_ARCH6K) --#define FL_FOR_ARCH7R (FL_FOR_ARCH7A | FL_DIV) --#define FL_FOR_ARCH7M (FL_FOR_ARCH7 | FL_DIV) -+#define FL_FOR_ARCH7R (FL_FOR_ARCH7A | FL_THUMB_DIV) -+#define FL_FOR_ARCH7M (FL_FOR_ARCH7 | FL_THUMB_DIV) - #define FL_FOR_ARCH7EM (FL_FOR_ARCH7M | FL_ARCH7EM) - - /* The bits in this mask specify which -@@ -778,7 +807,8 @@ - int arm_arch_thumb2; - - /* Nonzero if chip supports integer division instruction. */ --int arm_arch_hwdiv; -+int arm_arch_arm_hwdiv; -+int arm_arch_thumb_hwdiv; - - /* In case of a PRE_INC, POST_INC, PRE_DEC, POST_DEC memory reference, - we must report the mode of the memory reference from -@@ -851,48 +881,117 @@ - { - arm_slowmul_rtx_costs, - NULL, -- 3, -- ARM_PREFETCH_NOT_BENEFICIAL -+ 3, /* Constant limit. */ -+ 5, /* Max cond insns. */ -+ ARM_PREFETCH_NOT_BENEFICIAL, -+ true, /* Prefer constant pool. */ -+ arm_default_branch_cost - }; - - const struct tune_params arm_fastmul_tune = - { - arm_fastmul_rtx_costs, - NULL, -- 1, -- ARM_PREFETCH_NOT_BENEFICIAL -+ 1, /* Constant limit. */ -+ 5, /* Max cond insns. */ -+ ARM_PREFETCH_NOT_BENEFICIAL, -+ true, /* Prefer constant pool. */ -+ arm_default_branch_cost -+}; -+ -+/* StrongARM has early execution of branches, so a sequence that is worth -+ skipping is shorter. Set max_insns_skipped to a lower value. */ -+ -+const struct tune_params arm_strongarm_tune = -+{ -+ arm_fastmul_rtx_costs, -+ NULL, -+ 1, /* Constant limit. */ -+ 3, /* Max cond insns. */ -+ ARM_PREFETCH_NOT_BENEFICIAL, -+ true, /* Prefer constant pool. */ -+ arm_default_branch_cost - }; - - const struct tune_params arm_xscale_tune = - { - arm_xscale_rtx_costs, - xscale_sched_adjust_cost, -- 2, -- ARM_PREFETCH_NOT_BENEFICIAL -+ 2, /* Constant limit. */ -+ 3, /* Max cond insns. */ -+ ARM_PREFETCH_NOT_BENEFICIAL, -+ true, /* Prefer constant pool. */ -+ arm_default_branch_cost - }; - - const struct tune_params arm_9e_tune = - { - arm_9e_rtx_costs, - NULL, -- 1, -- ARM_PREFETCH_NOT_BENEFICIAL -+ 1, /* Constant limit. */ -+ 5, /* Max cond insns. */ -+ ARM_PREFETCH_NOT_BENEFICIAL, -+ true, /* Prefer constant pool. */ -+ arm_default_branch_cost -+}; -+ -+const struct tune_params arm_v6t2_tune = -+{ -+ arm_9e_rtx_costs, -+ NULL, -+ 1, /* Constant limit. */ -+ 5, /* Max cond insns. */ -+ ARM_PREFETCH_NOT_BENEFICIAL, -+ false, /* Prefer constant pool. */ -+ arm_default_branch_cost -+}; -+ -+/* Generic Cortex tuning. Use more specific tunings if appropriate. */ -+const struct tune_params arm_cortex_tune = -+{ -+ arm_9e_rtx_costs, -+ NULL, -+ 1, /* Constant limit. */ -+ 5, /* Max cond insns. */ -+ ARM_PREFETCH_NOT_BENEFICIAL, -+ false, /* Prefer constant pool. */ -+ arm_default_branch_cost -+}; -+ -+/* Branches can be dual-issued on Cortex-A5, so conditional execution is -+ less appealing. Set max_insns_skipped to a low value. */ -+ -+const struct tune_params arm_cortex_a5_tune = -+{ -+ arm_9e_rtx_costs, -+ NULL, -+ 1, /* Constant limit. */ -+ 1, /* Max cond insns. */ -+ ARM_PREFETCH_NOT_BENEFICIAL, -+ false, /* Prefer constant pool. */ -+ arm_cortex_a5_branch_cost - }; - - const struct tune_params arm_cortex_a9_tune = - { - arm_9e_rtx_costs, - cortex_a9_sched_adjust_cost, -- 1, -- ARM_PREFETCH_BENEFICIAL(4,32,32) -+ 1, /* Constant limit. */ -+ 5, /* Max cond insns. */ -+ ARM_PREFETCH_BENEFICIAL(4,32,32), -+ false, /* Prefer constant pool. */ -+ arm_default_branch_cost - }; - - const struct tune_params arm_fa726te_tune = - { - arm_9e_rtx_costs, - fa726te_sched_adjust_cost, -- 1, -- ARM_PREFETCH_NOT_BENEFICIAL -+ 1, /* Constant limit. */ -+ 5, /* Max cond insns. */ -+ ARM_PREFETCH_NOT_BENEFICIAL, -+ true, /* Prefer constant pool. */ -+ arm_default_branch_cost - }; - - -@@ -1698,7 +1797,8 @@ - arm_tune_wbuf = (tune_flags & FL_WBUF) != 0; - arm_tune_xscale = (tune_flags & FL_XSCALE) != 0; - arm_arch_iwmmxt = (insn_flags & FL_IWMMXT) != 0; -- arm_arch_hwdiv = (insn_flags & FL_DIV) != 0; -+ arm_arch_thumb_hwdiv = (insn_flags & FL_THUMB_DIV) != 0; -+ arm_arch_arm_hwdiv = (insn_flags & FL_ARM_DIV) != 0; - arm_tune_cortex_a9 = (arm_tune == cortexa9) != 0; - - /* If we are not using the default (ARM mode) section anchor offset -@@ -1965,6 +2065,28 @@ - fix_cm3_ldrd = 0; - } - -+ /* Enable -munaligned-access by default for -+ - all ARMv6 architecture-based processors -+ - ARMv7-A, ARMv7-R, and ARMv7-M architecture-based processors. -+ -+ Disable -munaligned-access by default for -+ - all pre-ARMv6 architecture-based processors -+ - ARMv6-M architecture-based processors. */ -+ -+ if (unaligned_access == 2) -+ { -+ if (arm_arch6 && (arm_arch_notm || arm_arch7)) -+ unaligned_access = 1; -+ else -+ unaligned_access = 0; -+ } -+ else if (unaligned_access == 1 -+ && !(arm_arch6 && (arm_arch_notm || arm_arch7))) -+ { -+ warning (0, "target CPU does not support unaligned accesses"); -+ unaligned_access = 0; -+ } -+ - if (TARGET_THUMB1 && flag_schedule_insns) - { - /* Don't warn since it's on by default in -O2. */ -@@ -1978,12 +2100,7 @@ - max_insns_skipped = 6; - } - else -- { -- /* StrongARM has early execution of branches, so a sequence -- that is worth skipping is shorter. */ -- if (arm_tune_strongarm) -- max_insns_skipped = 3; -- } -+ max_insns_skipped = current_tune->max_insns_skipped; - - /* Hot/Cold partitioning is not currently supported, since we can't - handle literal pool placement in that case. */ -@@ -2440,7 +2557,7 @@ - } - - /* Return true if I is a valid constant for the operation CODE. */ --static int -+int - const_ok_for_op (HOST_WIDE_INT i, enum rtx_code code) - { - if (const_ok_for_arm (i)) -@@ -2448,7 +2565,21 @@ - - switch (code) - { -+ case SET: -+ /* See if we can use movw. */ -+ if (arm_arch_thumb2 && (i & 0xffff0000) == 0) -+ return 1; -+ else -+ return 0; -+ - case PLUS: -+ /* See if we can use addw or subw. */ -+ if (TARGET_THUMB2 -+ && ((i & 0xfffff000) == 0 -+ || ((-i) & 0xfffff000) == 0)) -+ return 1; -+ /* else fall through. */ -+ - case COMPARE: - case EQ: - case NE: -@@ -2564,68 +2695,41 @@ - 1); - } - --/* Return the number of instructions required to synthesize the given -- constant, if we start emitting them from bit-position I. */ --static int --count_insns_for_constant (HOST_WIDE_INT remainder, int i) --{ -- HOST_WIDE_INT temp1; -- int step_size = TARGET_ARM ? 2 : 1; -- int num_insns = 0; -- -- gcc_assert (TARGET_ARM || i == 0); -- -- do -- { -- int end; -- -- if (i <= 0) -- i += 32; -- if (remainder & (((1 << step_size) - 1) << (i - step_size))) -- { -- end = i - 8; -- if (end < 0) -- end += 32; -- temp1 = remainder & ((0x0ff << end) -- | ((i < end) ? (0xff >> (32 - end)) : 0)); -- remainder &= ~temp1; -- num_insns++; -- i -= 8 - step_size; -- } -- i -= step_size; -- } while (remainder); -- return num_insns; --} -- -+/* Return a sequence of integers, in RETURN_SEQUENCE that fit into -+ ARM/THUMB2 immediates, and add up to VAL. -+ Thr function return value gives the number of insns required. */ - static int --find_best_start (unsigned HOST_WIDE_INT remainder) -+optimal_immediate_sequence (enum rtx_code code, unsigned HOST_WIDE_INT val, -+ struct four_ints *return_sequence) - { - int best_consecutive_zeros = 0; - int i; - int best_start = 0; -+ int insns1, insns2; -+ struct four_ints tmp_sequence; - - /* If we aren't targetting ARM, the best place to start is always at -- the bottom. */ -- if (! TARGET_ARM) -- return 0; -- -- for (i = 0; i < 32; i += 2) -+ the bottom, otherwise look more closely. */ -+ if (TARGET_ARM) - { -- int consecutive_zeros = 0; -- -- if (!(remainder & (3 << i))) -+ for (i = 0; i < 32; i += 2) - { -- while ((i < 32) && !(remainder & (3 << i))) -- { -- consecutive_zeros += 2; -- i += 2; -- } -- if (consecutive_zeros > best_consecutive_zeros) -+ int consecutive_zeros = 0; -+ -+ if (!(val & (3 << i))) - { -- best_consecutive_zeros = consecutive_zeros; -- best_start = i - consecutive_zeros; -+ while ((i < 32) && !(val & (3 << i))) -+ { -+ consecutive_zeros += 2; -+ i += 2; -+ } -+ if (consecutive_zeros > best_consecutive_zeros) -+ { -+ best_consecutive_zeros = consecutive_zeros; -+ best_start = i - consecutive_zeros; -+ } -+ i -= 2; - } -- i -= 2; - } - } - -@@ -2652,13 +2756,161 @@ - the constant starting from `best_start', and also starting from - zero (i.e. with bit 31 first to be output). If `best_start' doesn't - yield a shorter sequence, we may as well use zero. */ -+ insns1 = optimal_immediate_sequence_1 (code, val, return_sequence, best_start); - if (best_start != 0 -- && ((((unsigned HOST_WIDE_INT) 1) << best_start) < remainder) -- && (count_insns_for_constant (remainder, 0) <= -- count_insns_for_constant (remainder, best_start))) -- best_start = 0; -+ && ((((unsigned HOST_WIDE_INT) 1) << best_start) < val)) -+ { -+ insns2 = optimal_immediate_sequence_1 (code, val, &tmp_sequence, 0); -+ if (insns2 <= insns1) -+ { -+ *return_sequence = tmp_sequence; -+ insns1 = insns2; -+ } -+ } -+ -+ return insns1; -+} -+ -+/* As for optimal_immediate_sequence, but starting at bit-position I. */ -+static int -+optimal_immediate_sequence_1 (enum rtx_code code, unsigned HOST_WIDE_INT val, -+ struct four_ints *return_sequence, int i) -+{ -+ int remainder = val & 0xffffffff; -+ int insns = 0; -+ -+ /* Try and find a way of doing the job in either two or three -+ instructions. -+ -+ In ARM mode we can use 8-bit constants, rotated to any 2-bit aligned -+ location. We start at position I. This may be the MSB, or -+ optimial_immediate_sequence may have positioned it at the largest block -+ of zeros that are aligned on a 2-bit boundary. We then fill up the temps, -+ wrapping around to the top of the word when we drop off the bottom. -+ In the worst case this code should produce no more than four insns. -+ -+ In Thumb2 mode, we can use 32/16-bit replicated constants, and 8-bit -+ constants, shifted to any arbitrary location. We should always start -+ at the MSB. */ -+ do -+ { -+ int end; -+ unsigned int b1, b2, b3, b4; -+ unsigned HOST_WIDE_INT result; -+ int loc; -+ -+ gcc_assert (insns < 4); -+ -+ if (i <= 0) -+ i += 32; -+ -+ /* First, find the next normal 12/8-bit shifted/rotated immediate. */ -+ if (remainder & ((TARGET_ARM ? (3 << (i - 2)) : (1 << (i - 1))))) -+ { -+ loc = i; -+ if (i <= 12 && TARGET_THUMB2 && code == PLUS) -+ /* We can use addw/subw for the last 12 bits. */ -+ result = remainder; -+ else -+ { -+ /* Use an 8-bit shifted/rotated immediate. */ -+ end = i - 8; -+ if (end < 0) -+ end += 32; -+ result = remainder & ((0x0ff << end) -+ | ((i < end) ? (0xff >> (32 - end)) -+ : 0)); -+ i -= 8; -+ } -+ } -+ else -+ { -+ /* Arm allows rotates by a multiple of two. Thumb-2 allows -+ arbitrary shifts. */ -+ i -= TARGET_ARM ? 2 : 1; -+ continue; -+ } -+ -+ /* Next, see if we can do a better job with a thumb2 replicated -+ constant. -+ -+ We do it this way around to catch the cases like 0x01F001E0 where -+ two 8-bit immediates would work, but a replicated constant would -+ make it worse. -+ -+ TODO: 16-bit constants that don't clear all the bits, but still win. -+ TODO: Arithmetic splitting for set/add/sub, rather than bitwise. */ -+ if (TARGET_THUMB2) -+ { -+ b1 = (remainder & 0xff000000) >> 24; -+ b2 = (remainder & 0x00ff0000) >> 16; -+ b3 = (remainder & 0x0000ff00) >> 8; -+ b4 = remainder & 0xff; -+ -+ if (loc > 24) -+ { -+ /* The 8-bit immediate already found clears b1 (and maybe b2), -+ but must leave b3 and b4 alone. */ -+ -+ /* First try to find a 32-bit replicated constant that clears -+ almost everything. We can assume that we can't do it in one, -+ or else we wouldn't be here. */ -+ unsigned int tmp = b1 & b2 & b3 & b4; -+ unsigned int tmp2 = tmp + (tmp << 8) + (tmp << 16) -+ + (tmp << 24); -+ unsigned int matching_bytes = (tmp == b1) + (tmp == b2) -+ + (tmp == b3) + (tmp == b4); -+ if (tmp -+ && (matching_bytes >= 3 -+ || (matching_bytes == 2 -+ && const_ok_for_op (remainder & ~tmp2, code)))) -+ { -+ /* At least 3 of the bytes match, and the fourth has at -+ least as many bits set, or two of the bytes match -+ and it will only require one more insn to finish. */ -+ result = tmp2; -+ i = tmp != b1 ? 32 -+ : tmp != b2 ? 24 -+ : tmp != b3 ? 16 -+ : 8; -+ } -+ -+ /* Second, try to find a 16-bit replicated constant that can -+ leave three of the bytes clear. If b2 or b4 is already -+ zero, then we can. If the 8-bit from above would not -+ clear b2 anyway, then we still win. */ -+ else if (b1 == b3 && (!b2 || !b4 -+ || (remainder & 0x00ff0000 & ~result))) -+ { -+ result = remainder & 0xff00ff00; -+ i = 24; -+ } -+ } -+ else if (loc > 16) -+ { -+ /* The 8-bit immediate already found clears b2 (and maybe b3) -+ and we don't get here unless b1 is alredy clear, but it will -+ leave b4 unchanged. */ -+ -+ /* If we can clear b2 and b4 at once, then we win, since the -+ 8-bits couldn't possibly reach that far. */ -+ if (b2 == b4) -+ { -+ result = remainder & 0x00ff00ff; -+ i = 16; -+ } -+ } -+ } - -- return best_start; -+ return_sequence->i[insns++] = result; -+ remainder &= ~result; -+ -+ if (code == SET || code == MINUS) -+ code = PLUS; -+ } -+ while (remainder); -+ -+ return insns; - } - - /* Emit an instruction with the indicated PATTERN. If COND is -@@ -2675,7 +2927,6 @@ - - /* As above, but extra parameter GENERATE which, if clear, suppresses - RTL generation. */ --/* ??? This needs more work for thumb2. */ - - static int - arm_gen_constant (enum rtx_code code, enum machine_mode mode, rtx cond, -@@ -2687,15 +2938,15 @@ - int final_invert = 0; - int can_negate_initial = 0; - int i; -- int num_bits_set = 0; - int set_sign_bit_copies = 0; - int clear_sign_bit_copies = 0; - int clear_zero_bit_copies = 0; - int set_zero_bit_copies = 0; -- int insns = 0; -+ int insns = 0, neg_insns, inv_insns; - unsigned HOST_WIDE_INT temp1, temp2; - unsigned HOST_WIDE_INT remainder = val & 0xffffffff; -- int step_size = TARGET_ARM ? 2 : 1; -+ struct four_ints *immediates; -+ struct four_ints pos_immediates, neg_immediates, inv_immediates; - - /* Find out which operations are safe for a given CODE. Also do a quick - check for degenerate cases; these can occur when DImode operations -@@ -2704,7 +2955,6 @@ - { - case SET: - can_invert = 1; -- can_negate = 1; - break; - - case PLUS: -@@ -2732,9 +2982,6 @@ - gen_rtx_SET (VOIDmode, target, source)); - return 1; - } -- -- if (TARGET_THUMB2) -- can_invert = 1; - break; - - case AND: -@@ -2776,6 +3023,7 @@ - gen_rtx_NOT (mode, source))); - return 1; - } -+ final_invert = 1; - break; - - case MINUS: -@@ -2798,7 +3046,6 @@ - source))); - return 1; - } -- can_negate = 1; - - break; - -@@ -2807,9 +3054,7 @@ - } - - /* If we can do it in one insn get out quickly. */ -- if (const_ok_for_arm (val) -- || (can_negate_initial && const_ok_for_arm (-val)) -- || (can_invert && const_ok_for_arm (~val))) -+ if (const_ok_for_op (val, code)) - { - if (generate) - emit_constant_insn (cond, -@@ -2862,15 +3107,6 @@ - switch (code) - { - case SET: -- /* See if we can use movw. */ -- if (arm_arch_thumb2 && (remainder & 0xffff0000) == 0) -- { -- if (generate) -- emit_constant_insn (cond, gen_rtx_SET (VOIDmode, target, -- GEN_INT (val))); -- return 1; -- } -- - /* See if we can do this by sign_extending a constant that is known - to be negative. This is a good, way of doing it, since the shift - may well merge into a subsequent insn. */ -@@ -3221,121 +3457,97 @@ - break; - } - -- for (i = 0; i < 32; i++) -- if (remainder & (1 << i)) -- num_bits_set++; -- -- if ((code == AND) -- || (code != IOR && can_invert && num_bits_set > 16)) -- remainder ^= 0xffffffff; -- else if (code == PLUS && num_bits_set > 16) -- remainder = (-remainder) & 0xffffffff; -- -- /* For XOR, if more than half the bits are set and there's a sequence -- of more than 8 consecutive ones in the pattern then we can XOR by the -- inverted constant and then invert the final result; this may save an -- instruction and might also lead to the final mvn being merged with -- some other operation. */ -- else if (code == XOR && num_bits_set > 16 -- && (count_insns_for_constant (remainder ^ 0xffffffff, -- find_best_start -- (remainder ^ 0xffffffff)) -- < count_insns_for_constant (remainder, -- find_best_start (remainder)))) -+ /* Calculate what the instruction sequences would be if we generated it -+ normally, negated, or inverted. */ -+ if (code == AND) -+ /* AND cannot be split into multiple insns, so invert and use BIC. */ -+ insns = 99; -+ else -+ insns = optimal_immediate_sequence (code, remainder, &pos_immediates); -+ -+ if (can_negate) -+ neg_insns = optimal_immediate_sequence (code, (-remainder) & 0xffffffff, -+ &neg_immediates); -+ else -+ neg_insns = 99; -+ -+ if (can_invert || final_invert) -+ inv_insns = optimal_immediate_sequence (code, remainder ^ 0xffffffff, -+ &inv_immediates); -+ else -+ inv_insns = 99; -+ -+ immediates = &pos_immediates; -+ -+ /* Is the negated immediate sequence more efficient? */ -+ if (neg_insns < insns && neg_insns <= inv_insns) - { -- remainder ^= 0xffffffff; -- final_invert = 1; -+ insns = neg_insns; -+ immediates = &neg_immediates; -+ } -+ else -+ can_negate = 0; -+ -+ /* Is the inverted immediate sequence more efficient? -+ We must allow for an extra NOT instruction for XOR operations, although -+ there is some chance that the final 'mvn' will get optimized later. */ -+ if ((inv_insns + 1) < insns || (!final_invert && inv_insns < insns)) -+ { -+ insns = inv_insns; -+ immediates = &inv_immediates; - } - else - { - can_invert = 0; -- can_negate = 0; -+ final_invert = 0; - } - -- /* Now try and find a way of doing the job in either two or three -- instructions. -- We start by looking for the largest block of zeros that are aligned on -- a 2-bit boundary, we then fill up the temps, wrapping around to the -- top of the word when we drop off the bottom. -- In the worst case this code should produce no more than four insns. -- Thumb-2 constants are shifted, not rotated, so the MSB is always the -- best place to start. */ -- -- /* ??? Use thumb2 replicated constants when the high and low halfwords are -- the same. */ -- { -- /* Now start emitting the insns. */ -- i = find_best_start (remainder); -- do -- { -- int end; -+ /* Now output the chosen sequence as instructions. */ -+ if (generate) -+ { -+ for (i = 0; i < insns; i++) -+ { -+ rtx new_src, temp1_rtx; - -- if (i <= 0) -- i += 32; -- if (remainder & (3 << (i - 2))) -- { -- end = i - 8; -- if (end < 0) -- end += 32; -- temp1 = remainder & ((0x0ff << end) -- | ((i < end) ? (0xff >> (32 - end)) : 0)); -- remainder &= ~temp1; -+ temp1 = immediates->i[i]; - -- if (generate) -- { -- rtx new_src, temp1_rtx; -+ if (code == SET || code == MINUS) -+ new_src = (subtargets ? gen_reg_rtx (mode) : target); -+ else if ((final_invert || i < (insns - 1)) && subtargets) -+ new_src = gen_reg_rtx (mode); -+ else -+ new_src = target; - -- if (code == SET || code == MINUS) -- { -- new_src = (subtargets ? gen_reg_rtx (mode) : target); -- if (can_invert && code != MINUS) -- temp1 = ~temp1; -- } -- else -- { -- if ((final_invert || remainder) && subtargets) -- new_src = gen_reg_rtx (mode); -- else -- new_src = target; -- if (can_invert) -- temp1 = ~temp1; -- else if (can_negate) -- temp1 = -temp1; -- } -+ if (can_invert) -+ temp1 = ~temp1; -+ else if (can_negate) -+ temp1 = -temp1; - -- temp1 = trunc_int_for_mode (temp1, mode); -- temp1_rtx = GEN_INT (temp1); -+ temp1 = trunc_int_for_mode (temp1, mode); -+ temp1_rtx = GEN_INT (temp1); - -- if (code == SET) -- ; -- else if (code == MINUS) -- temp1_rtx = gen_rtx_MINUS (mode, temp1_rtx, source); -- else -- temp1_rtx = gen_rtx_fmt_ee (code, mode, source, temp1_rtx); -+ if (code == SET) -+ ; -+ else if (code == MINUS) -+ temp1_rtx = gen_rtx_MINUS (mode, temp1_rtx, source); -+ else -+ temp1_rtx = gen_rtx_fmt_ee (code, mode, source, temp1_rtx); - -- emit_constant_insn (cond, -- gen_rtx_SET (VOIDmode, new_src, -- temp1_rtx)); -- source = new_src; -- } -+ emit_constant_insn (cond, -+ gen_rtx_SET (VOIDmode, new_src, -+ temp1_rtx)); -+ source = new_src; - -- if (code == SET) -- { -- can_invert = 0; -- code = PLUS; -- } -- else if (code == MINUS) -+ if (code == SET) -+ { -+ can_negate = can_invert; -+ can_invert = 0; - code = PLUS; -- -- insns++; -- i -= 8 - step_size; -- } -- /* Arm allows rotates by a multiple of two. Thumb-2 allows arbitrary -- shifts. */ -- i -= step_size; -- } -- while (remainder); -- } -+ } -+ else if (code == MINUS) -+ code = PLUS; -+ } -+ } - - if (final_invert) - { -@@ -5916,7 +6128,7 @@ - addresses based on the frame pointer or arg pointer until the - reload pass starts. This is so that eliminating such addresses - into stack based ones won't produce impossible code. */ --static int -+int - thumb1_legitimate_address_p (enum machine_mode mode, rtx x, int strict_p) - { - /* ??? Not clear if this is right. Experiment. */ -@@ -6406,23 +6618,134 @@ - HOST_WIDE_INT val = INTVAL (XEXP (*p, 1)); - HOST_WIDE_INT low, high; - -- if (mode == DImode || (mode == DFmode && TARGET_SOFT_FLOAT)) -- low = ((val & 0xf) ^ 0x8) - 0x8; -- else if (TARGET_MAVERICK && TARGET_HARD_FLOAT) -- /* Need to be careful, -256 is not a valid offset. */ -- low = val >= 0 ? (val & 0xff) : -((-val) & 0xff); -- else if (mode == SImode -- || (mode == SFmode && TARGET_SOFT_FLOAT) -- || ((mode == HImode || mode == QImode) && ! arm_arch4)) -- /* Need to be careful, -4096 is not a valid offset. */ -- low = val >= 0 ? (val & 0xfff) : -((-val) & 0xfff); -- else if ((mode == HImode || mode == QImode) && arm_arch4) -- /* Need to be careful, -256 is not a valid offset. */ -- low = val >= 0 ? (val & 0xff) : -((-val) & 0xff); -- else if (GET_MODE_CLASS (mode) == MODE_FLOAT -- && TARGET_HARD_FLOAT && TARGET_FPA) -- /* Need to be careful, -1024 is not a valid offset. */ -- low = val >= 0 ? (val & 0x3ff) : -((-val) & 0x3ff); -+ /* Detect coprocessor load/stores. */ -+ bool coproc_p = ((TARGET_HARD_FLOAT -+ && (TARGET_VFP || TARGET_FPA || TARGET_MAVERICK) -+ && (mode == SFmode || mode == DFmode -+ || (mode == DImode && TARGET_MAVERICK))) -+ || (TARGET_REALLY_IWMMXT -+ && VALID_IWMMXT_REG_MODE (mode)) -+ || (TARGET_NEON -+ && (VALID_NEON_DREG_MODE (mode) -+ || VALID_NEON_QREG_MODE (mode)))); -+ -+ /* For some conditions, bail out when lower two bits are unaligned. */ -+ if ((val & 0x3) != 0 -+ /* Coprocessor load/store indexes are 8-bits + '00' appended. */ -+ && (coproc_p -+ /* For DI, and DF under soft-float: */ -+ || ((mode == DImode || mode == DFmode) -+ /* Without ldrd, we use stm/ldm, which does not -+ fair well with unaligned bits. */ -+ && (! TARGET_LDRD -+ /* Thumb-2 ldrd/strd is [-1020,+1020] in steps of 4. */ -+ || TARGET_THUMB2)))) -+ return false; -+ -+ /* When breaking down a [reg+index] reload address into [(reg+high)+low], -+ of which the (reg+high) gets turned into a reload add insn, -+ we try to decompose the index into high/low values that can often -+ also lead to better reload CSE. -+ For example: -+ ldr r0, [r2, #4100] // Offset too large -+ ldr r1, [r2, #4104] // Offset too large -+ -+ is best reloaded as: -+ add t1, r2, #4096 -+ ldr r0, [t1, #4] -+ add t2, r2, #4096 -+ ldr r1, [t2, #8] -+ -+ which post-reload CSE can simplify in most cases to eliminate the -+ second add instruction: -+ add t1, r2, #4096 -+ ldr r0, [t1, #4] -+ ldr r1, [t1, #8] -+ -+ The idea here is that we want to split out the bits of the constant -+ as a mask, rather than as subtracting the maximum offset that the -+ respective type of load/store used can handle. -+ -+ When encountering negative offsets, we can still utilize it even if -+ the overall offset is positive; sometimes this may lead to an immediate -+ that can be constructed with fewer instructions. -+ For example: -+ ldr r0, [r2, #0x3FFFFC] -+ -+ This is best reloaded as: -+ add t1, r2, #0x400000 -+ ldr r0, [t1, #-4] -+ -+ The trick for spotting this for a load insn with N bits of offset -+ (i.e. bits N-1:0) is to look at bit N; if it is set, then chose a -+ negative offset that is going to make bit N and all the bits below -+ it become zero in the remainder part. -+ -+ The SIGN_MAG_LOW_ADDR_BITS macro below implements this, with respect -+ to sign-magnitude addressing (i.e. separate +- bit, or 1's complement), -+ used in most cases of ARM load/store instructions. */ -+ -+#define SIGN_MAG_LOW_ADDR_BITS(VAL, N) \ -+ (((VAL) & ((1 << (N)) - 1)) \ -+ ? (((VAL) & ((1 << ((N) + 1)) - 1)) ^ (1 << (N))) - (1 << (N)) \ -+ : 0) -+ -+ if (coproc_p) -+ { -+ low = SIGN_MAG_LOW_ADDR_BITS (val, 10); -+ -+ /* NEON quad-word load/stores are made of two double-word accesses, -+ so the valid index range is reduced by 8. Treat as 9-bit range if -+ we go over it. */ -+ if (TARGET_NEON && VALID_NEON_QREG_MODE (mode) && low >= 1016) -+ low = SIGN_MAG_LOW_ADDR_BITS (val, 9); -+ } -+ else if (GET_MODE_SIZE (mode) == 8) -+ { -+ if (TARGET_LDRD) -+ low = (TARGET_THUMB2 -+ ? SIGN_MAG_LOW_ADDR_BITS (val, 10) -+ : SIGN_MAG_LOW_ADDR_BITS (val, 8)); -+ else -+ /* For pre-ARMv5TE (without ldrd), we use ldm/stm(db/da/ib) -+ to access doublewords. The supported load/store offsets are -+ -8, -4, and 4, which we try to produce here. */ -+ low = ((val & 0xf) ^ 0x8) - 0x8; -+ } -+ else if (GET_MODE_SIZE (mode) < 8) -+ { -+ /* NEON element load/stores do not have an offset. */ -+ if (TARGET_NEON_FP16 && mode == HFmode) -+ return false; -+ -+ if (TARGET_THUMB2) -+ { -+ /* Thumb-2 has an asymmetrical index range of (-256,4096). -+ Try the wider 12-bit range first, and re-try if the result -+ is out of range. */ -+ low = SIGN_MAG_LOW_ADDR_BITS (val, 12); -+ if (low < -255) -+ low = SIGN_MAG_LOW_ADDR_BITS (val, 8); -+ } -+ else -+ { -+ if (mode == HImode || mode == HFmode) -+ { -+ if (arm_arch4) -+ low = SIGN_MAG_LOW_ADDR_BITS (val, 8); -+ else -+ { -+ /* The storehi/movhi_bytes fallbacks can use only -+ [-4094,+4094] of the full ldrb/strb index range. */ -+ low = SIGN_MAG_LOW_ADDR_BITS (val, 12); -+ if (low == 4095 || low == -4095) -+ return false; -+ } -+ } -+ else -+ low = SIGN_MAG_LOW_ADDR_BITS (val, 12); -+ } -+ } - else - return false; - -@@ -6535,9 +6858,47 @@ - return for_each_rtx (&x, arm_tls_operand_p_1, NULL); - } - -+/* Implement TARGET_LEGITIMATE_CONSTANT_P. -+ -+ On the ARM, allow any integer (invalid ones are removed later by insn -+ patterns), nice doubles and symbol_refs which refer to the function's -+ constant pool XXX. -+ -+ When generating pic allow anything. */ -+ -+static bool -+arm_legitimate_constant_p_1 (enum machine_mode mode, rtx x) -+{ -+ /* At present, we have no support for Neon structure constants, so forbid -+ them here. It might be possible to handle simple cases like 0 and -1 -+ in future. */ -+ if (TARGET_NEON && VALID_NEON_STRUCT_MODE (mode)) -+ return false; -+ -+ return flag_pic || !label_mentioned_p (x); -+} -+ -+static bool -+thumb_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) -+{ -+ return (GET_CODE (x) == CONST_INT -+ || GET_CODE (x) == CONST_DOUBLE -+ || CONSTANT_ADDRESS_P (x) -+ || flag_pic); -+} -+ -+static bool -+arm_legitimate_constant_p (enum machine_mode mode, rtx x) -+{ -+ return (!arm_cannot_force_const_mem (x) -+ && (TARGET_32BIT -+ ? arm_legitimate_constant_p_1 (mode, x) -+ : thumb_legitimate_constant_p (mode, x))); -+} -+ - /* Implement TARGET_CANNOT_FORCE_CONST_MEM. */ - --bool -+static bool - arm_cannot_force_const_mem (rtx x) - { - rtx base, offset; -@@ -7233,6 +7594,9 @@ - *total = COSTS_N_INSNS (4); - return true; - -+ case SET: -+ return false; -+ - default: - *total = COSTS_N_INSNS (4); - return false; -@@ -7580,6 +7944,9 @@ - *total = COSTS_N_INSNS (1) + 1; - return true; - -+ case SET: -+ return false; -+ - default: - if (mode != VOIDmode) - *total = COSTS_N_INSNS (ARM_NUM_REGS (mode)); -@@ -8160,6 +8527,21 @@ - return cost; - } - -+static int -+arm_default_branch_cost (bool speed_p, bool predictable_p ATTRIBUTE_UNUSED) -+{ -+ if (TARGET_32BIT) -+ return (TARGET_THUMB2 && !speed_p) ? 1 : 4; -+ else -+ return (optimize > 0) ? 2 : 0; -+} -+ -+static int -+arm_cortex_a5_branch_cost (bool speed_p, bool predictable_p) -+{ -+ return speed_p ? 0 : arm_default_branch_cost (speed_p, predictable_p); -+} -+ - static int fp_consts_inited = 0; - - /* Only zero is valid for VFP. Other values are also valid for FPA. */ -@@ -8617,24 +8999,106 @@ - return 1; - } - --/* Return a string suitable for output of Neon immediate logic operation -- MNEM. */ -+/* Return TRUE if rtx OP is legal for use in a VSHR or VSHL instruction. If -+ the immediate is valid, write a constant suitable for using as an operand -+ to VSHR/VSHL to *MODCONST and the corresponding element width to -+ *ELEMENTWIDTH. ISLEFTSHIFT is for determine left or right shift, -+ because they have different limitations. */ - --char * --neon_output_logic_immediate (const char *mnem, rtx *op2, enum machine_mode mode, -- int inverse, int quad) -+int -+neon_immediate_valid_for_shift (rtx op, enum machine_mode mode, -+ rtx *modconst, int *elementwidth, -+ bool isleftshift) - { -- int width, is_valid; -- static char templ[40]; -+ unsigned int innersize = GET_MODE_SIZE (GET_MODE_INNER (mode)); -+ unsigned int n_elts = CONST_VECTOR_NUNITS (op), i; -+ unsigned HOST_WIDE_INT last_elt = 0; -+ unsigned HOST_WIDE_INT maxshift; - -- is_valid = neon_immediate_valid_for_logic (*op2, mode, inverse, op2, &width); -+ /* Split vector constant out into a byte vector. */ -+ for (i = 0; i < n_elts; i++) -+ { -+ rtx el = CONST_VECTOR_ELT (op, i); -+ unsigned HOST_WIDE_INT elpart; - -- gcc_assert (is_valid != 0); -+ if (GET_CODE (el) == CONST_INT) -+ elpart = INTVAL (el); -+ else if (GET_CODE (el) == CONST_DOUBLE) -+ return 0; -+ else -+ gcc_unreachable (); - -- if (quad) -- sprintf (templ, "%s.i%d\t%%q0, %%2", mnem, width); -- else -- sprintf (templ, "%s.i%d\t%%P0, %%2", mnem, width); -+ if (i != 0 && elpart != last_elt) -+ return 0; -+ -+ last_elt = elpart; -+ } -+ -+ /* Shift less than element size. */ -+ maxshift = innersize * 8; -+ -+ if (isleftshift) -+ { -+ /* Left shift immediate value can be from 0 to <size>-1. */ -+ if (last_elt >= maxshift) -+ return 0; -+ } -+ else -+ { -+ /* Right shift immediate value can be from 1 to <size>. */ -+ if (last_elt == 0 || last_elt > maxshift) -+ return 0; -+ } -+ -+ if (elementwidth) -+ *elementwidth = innersize * 8; -+ -+ if (modconst) -+ *modconst = CONST_VECTOR_ELT (op, 0); -+ -+ return 1; -+} -+ -+/* Return a string suitable for output of Neon immediate logic operation -+ MNEM. */ -+ -+char * -+neon_output_logic_immediate (const char *mnem, rtx *op2, enum machine_mode mode, -+ int inverse, int quad) -+{ -+ int width, is_valid; -+ static char templ[40]; -+ -+ is_valid = neon_immediate_valid_for_logic (*op2, mode, inverse, op2, &width); -+ -+ gcc_assert (is_valid != 0); -+ -+ if (quad) -+ sprintf (templ, "%s.i%d\t%%q0, %%2", mnem, width); -+ else -+ sprintf (templ, "%s.i%d\t%%P0, %%2", mnem, width); -+ -+ return templ; -+} -+ -+/* Return a string suitable for output of Neon immediate shift operation -+ (VSHR or VSHL) MNEM. */ -+ -+char * -+neon_output_shift_immediate (const char *mnem, char sign, rtx *op2, -+ enum machine_mode mode, int quad, -+ bool isleftshift) -+{ -+ int width, is_valid; -+ static char templ[40]; -+ -+ is_valid = neon_immediate_valid_for_shift (*op2, mode, op2, &width, isleftshift); -+ gcc_assert (is_valid != 0); -+ -+ if (quad) -+ sprintf (templ, "%s.%c%d\t%%q0, %%q1, %%2", mnem, sign, width); -+ else -+ sprintf (templ, "%s.%c%d\t%%P0, %%P1, %%2", mnem, sign, width); - - return templ; - } -@@ -9111,6 +9575,11 @@ - if (GET_CODE (ind) == REG) - return arm_address_register_rtx_p (ind, 0); - -+ /* vldm/vstm allows POST_INC (ia) and PRE_DEC (db). */ -+ if (GET_CODE (ind) == POST_INC -+ || GET_CODE (ind) == PRE_DEC) -+ return arm_address_register_rtx_p (XEXP (ind, 0), 0); -+ - return FALSE; - } - -@@ -9139,11 +9608,14 @@ - return GENERAL_REGS; - } - -+ /* The neon move patterns handle all legitimate vector and struct -+ addresses. */ - if (TARGET_NEON -+ && (MEM_P (x) || GET_CODE (x) == CONST_VECTOR) - && (GET_MODE_CLASS (mode) == MODE_VECTOR_INT -- || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT) -- && neon_vector_mem_operand (x, 0)) -- return NO_REGS; -+ || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT -+ || VALID_NEON_STRUCT_MODE (mode))) -+ return NO_REGS; - - if (arm_coproc_mem_operand (x, wb) || s_register_operand (x, mode)) - return NO_REGS; -@@ -9812,6 +10284,9 @@ - rtx base_reg_rtx = NULL; - int i, stm_case; - -+ /* Write back of base register is currently only supported for Thumb 1. */ -+ int base_writeback = TARGET_THUMB1; -+ - /* Can only handle up to MAX_LDM_STM_OPS insns at present, though could be - easily extended if required. */ - gcc_assert (nops >= 2 && nops <= MAX_LDM_STM_OPS); -@@ -9869,7 +10344,9 @@ - /* If it isn't an integer register, then we can't do this. */ - if (unsorted_regs[i] < 0 - || (TARGET_THUMB1 && unsorted_regs[i] > LAST_LO_REGNUM) -- || (TARGET_THUMB2 && unsorted_regs[i] == base_reg) -+ /* The effects are unpredictable if the base register is -+ both updated and stored. */ -+ || (base_writeback && unsorted_regs[i] == base_reg) - || (TARGET_THUMB2 && unsorted_regs[i] == SP_REGNUM) - || unsorted_regs[i] > 14) - return 0; -@@ -10331,6 +10808,335 @@ - return true; - } - -+/* Copy a block of memory using plain ldr/str/ldrh/strh instructions, to permit -+ unaligned copies on processors which support unaligned semantics for those -+ instructions. INTERLEAVE_FACTOR can be used to attempt to hide load latency -+ (using more registers) by doing e.g. load/load/store/store for a factor of 2. -+ An interleave factor of 1 (the minimum) will perform no interleaving. -+ Load/store multiple are used for aligned addresses where possible. */ -+ -+static void -+arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase, -+ HOST_WIDE_INT length, -+ unsigned int interleave_factor) -+{ -+ rtx *regs = XALLOCAVEC (rtx, interleave_factor); -+ int *regnos = XALLOCAVEC (int, interleave_factor); -+ HOST_WIDE_INT block_size_bytes = interleave_factor * UNITS_PER_WORD; -+ HOST_WIDE_INT i, j; -+ HOST_WIDE_INT remaining = length, words; -+ rtx halfword_tmp = NULL, byte_tmp = NULL; -+ rtx dst, src; -+ bool src_aligned = MEM_ALIGN (srcbase) >= BITS_PER_WORD; -+ bool dst_aligned = MEM_ALIGN (dstbase) >= BITS_PER_WORD; -+ HOST_WIDE_INT srcoffset, dstoffset; -+ HOST_WIDE_INT src_autoinc, dst_autoinc; -+ rtx mem, addr; -+ -+ gcc_assert (1 <= interleave_factor && interleave_factor <= 4); -+ -+ /* Use hard registers if we have aligned source or destination so we can use -+ load/store multiple with contiguous registers. */ -+ if (dst_aligned || src_aligned) -+ for (i = 0; i < interleave_factor; i++) -+ regs[i] = gen_rtx_REG (SImode, i); -+ else -+ for (i = 0; i < interleave_factor; i++) -+ regs[i] = gen_reg_rtx (SImode); -+ -+ dst = copy_addr_to_reg (XEXP (dstbase, 0)); -+ src = copy_addr_to_reg (XEXP (srcbase, 0)); -+ -+ srcoffset = dstoffset = 0; -+ -+ /* Calls to arm_gen_load_multiple and arm_gen_store_multiple update SRC/DST. -+ For copying the last bytes we want to subtract this offset again. */ -+ src_autoinc = dst_autoinc = 0; -+ -+ for (i = 0; i < interleave_factor; i++) -+ regnos[i] = i; -+ -+ /* Copy BLOCK_SIZE_BYTES chunks. */ -+ -+ for (i = 0; i + block_size_bytes <= length; i += block_size_bytes) -+ { -+ /* Load words. */ -+ if (src_aligned && interleave_factor > 1) -+ { -+ emit_insn (arm_gen_load_multiple (regnos, interleave_factor, src, -+ TRUE, srcbase, &srcoffset)); -+ src_autoinc += UNITS_PER_WORD * interleave_factor; -+ } -+ else -+ { -+ for (j = 0; j < interleave_factor; j++) -+ { -+ addr = plus_constant (src, srcoffset + j * UNITS_PER_WORD -+ - src_autoinc); -+ mem = adjust_automodify_address (srcbase, SImode, addr, -+ srcoffset + j * UNITS_PER_WORD); -+ emit_insn (gen_unaligned_loadsi (regs[j], mem)); -+ } -+ srcoffset += block_size_bytes; -+ } -+ -+ /* Store words. */ -+ if (dst_aligned && interleave_factor > 1) -+ { -+ emit_insn (arm_gen_store_multiple (regnos, interleave_factor, dst, -+ TRUE, dstbase, &dstoffset)); -+ dst_autoinc += UNITS_PER_WORD * interleave_factor; -+ } -+ else -+ { -+ for (j = 0; j < interleave_factor; j++) -+ { -+ addr = plus_constant (dst, dstoffset + j * UNITS_PER_WORD -+ - dst_autoinc); -+ mem = adjust_automodify_address (dstbase, SImode, addr, -+ dstoffset + j * UNITS_PER_WORD); -+ emit_insn (gen_unaligned_storesi (mem, regs[j])); -+ } -+ dstoffset += block_size_bytes; -+ } -+ -+ remaining -= block_size_bytes; -+ } -+ -+ /* Copy any whole words left (note these aren't interleaved with any -+ subsequent halfword/byte load/stores in the interests of simplicity). */ -+ -+ words = remaining / UNITS_PER_WORD; -+ -+ gcc_assert (words < interleave_factor); -+ -+ if (src_aligned && words > 1) -+ { -+ emit_insn (arm_gen_load_multiple (regnos, words, src, TRUE, srcbase, -+ &srcoffset)); -+ src_autoinc += UNITS_PER_WORD * words; -+ } -+ else -+ { -+ for (j = 0; j < words; j++) -+ { -+ addr = plus_constant (src, -+ srcoffset + j * UNITS_PER_WORD - src_autoinc); -+ mem = adjust_automodify_address (srcbase, SImode, addr, -+ srcoffset + j * UNITS_PER_WORD); -+ emit_insn (gen_unaligned_loadsi (regs[j], mem)); -+ } -+ srcoffset += words * UNITS_PER_WORD; -+ } -+ -+ if (dst_aligned && words > 1) -+ { -+ emit_insn (arm_gen_store_multiple (regnos, words, dst, TRUE, dstbase, -+ &dstoffset)); -+ dst_autoinc += words * UNITS_PER_WORD; -+ } -+ else -+ { -+ for (j = 0; j < words; j++) -+ { -+ addr = plus_constant (dst, -+ dstoffset + j * UNITS_PER_WORD - dst_autoinc); -+ mem = adjust_automodify_address (dstbase, SImode, addr, -+ dstoffset + j * UNITS_PER_WORD); -+ emit_insn (gen_unaligned_storesi (mem, regs[j])); -+ } -+ dstoffset += words * UNITS_PER_WORD; -+ } -+ -+ remaining -= words * UNITS_PER_WORD; -+ -+ gcc_assert (remaining < 4); -+ -+ /* Copy a halfword if necessary. */ -+ -+ if (remaining >= 2) -+ { -+ halfword_tmp = gen_reg_rtx (SImode); -+ -+ addr = plus_constant (src, srcoffset - src_autoinc); -+ mem = adjust_automodify_address (srcbase, HImode, addr, srcoffset); -+ emit_insn (gen_unaligned_loadhiu (halfword_tmp, mem)); -+ -+ /* Either write out immediately, or delay until we've loaded the last -+ byte, depending on interleave factor. */ -+ if (interleave_factor == 1) -+ { -+ addr = plus_constant (dst, dstoffset - dst_autoinc); -+ mem = adjust_automodify_address (dstbase, HImode, addr, dstoffset); -+ emit_insn (gen_unaligned_storehi (mem, -+ gen_lowpart (HImode, halfword_tmp))); -+ halfword_tmp = NULL; -+ dstoffset += 2; -+ } -+ -+ remaining -= 2; -+ srcoffset += 2; -+ } -+ -+ gcc_assert (remaining < 2); -+ -+ /* Copy last byte. */ -+ -+ if ((remaining & 1) != 0) -+ { -+ byte_tmp = gen_reg_rtx (SImode); -+ -+ addr = plus_constant (src, srcoffset - src_autoinc); -+ mem = adjust_automodify_address (srcbase, QImode, addr, srcoffset); -+ emit_move_insn (gen_lowpart (QImode, byte_tmp), mem); -+ -+ if (interleave_factor == 1) -+ { -+ addr = plus_constant (dst, dstoffset - dst_autoinc); -+ mem = adjust_automodify_address (dstbase, QImode, addr, dstoffset); -+ emit_move_insn (mem, gen_lowpart (QImode, byte_tmp)); -+ byte_tmp = NULL; -+ dstoffset++; -+ } -+ -+ remaining--; -+ srcoffset++; -+ } -+ -+ /* Store last halfword if we haven't done so already. */ -+ -+ if (halfword_tmp) -+ { -+ addr = plus_constant (dst, dstoffset - dst_autoinc); -+ mem = adjust_automodify_address (dstbase, HImode, addr, dstoffset); -+ emit_insn (gen_unaligned_storehi (mem, -+ gen_lowpart (HImode, halfword_tmp))); -+ dstoffset += 2; -+ } -+ -+ /* Likewise for last byte. */ -+ -+ if (byte_tmp) -+ { -+ addr = plus_constant (dst, dstoffset - dst_autoinc); -+ mem = adjust_automodify_address (dstbase, QImode, addr, dstoffset); -+ emit_move_insn (mem, gen_lowpart (QImode, byte_tmp)); -+ dstoffset++; -+ } -+ -+ gcc_assert (remaining == 0 && srcoffset == dstoffset); -+} -+ -+/* From mips_adjust_block_mem: -+ -+ Helper function for doing a loop-based block operation on memory -+ reference MEM. Each iteration of the loop will operate on LENGTH -+ bytes of MEM. -+ -+ Create a new base register for use within the loop and point it to -+ the start of MEM. Create a new memory reference that uses this -+ register. Store them in *LOOP_REG and *LOOP_MEM respectively. */ -+ -+static void -+arm_adjust_block_mem (rtx mem, HOST_WIDE_INT length, rtx *loop_reg, -+ rtx *loop_mem) -+{ -+ *loop_reg = copy_addr_to_reg (XEXP (mem, 0)); -+ -+ /* Although the new mem does not refer to a known location, -+ it does keep up to LENGTH bytes of alignment. */ -+ *loop_mem = change_address (mem, BLKmode, *loop_reg); -+ set_mem_align (*loop_mem, MIN (MEM_ALIGN (mem), length * BITS_PER_UNIT)); -+} -+ -+/* From mips_block_move_loop: -+ -+ Move LENGTH bytes from SRC to DEST using a loop that moves BYTES_PER_ITER -+ bytes at a time. LENGTH must be at least BYTES_PER_ITER. Assume that -+ the memory regions do not overlap. */ -+ -+static void -+arm_block_move_unaligned_loop (rtx dest, rtx src, HOST_WIDE_INT length, -+ unsigned int interleave_factor, -+ HOST_WIDE_INT bytes_per_iter) -+{ -+ rtx label, src_reg, dest_reg, final_src, test; -+ HOST_WIDE_INT leftover; -+ -+ leftover = length % bytes_per_iter; -+ length -= leftover; -+ -+ /* Create registers and memory references for use within the loop. */ -+ arm_adjust_block_mem (src, bytes_per_iter, &src_reg, &src); -+ arm_adjust_block_mem (dest, bytes_per_iter, &dest_reg, &dest); -+ -+ /* Calculate the value that SRC_REG should have after the last iteration of -+ the loop. */ -+ final_src = expand_simple_binop (Pmode, PLUS, src_reg, GEN_INT (length), -+ 0, 0, OPTAB_WIDEN); -+ -+ /* Emit the start of the loop. */ -+ label = gen_label_rtx (); -+ emit_label (label); -+ -+ /* Emit the loop body. */ -+ arm_block_move_unaligned_straight (dest, src, bytes_per_iter, -+ interleave_factor); -+ -+ /* Move on to the next block. */ -+ emit_move_insn (src_reg, plus_constant (src_reg, bytes_per_iter)); -+ emit_move_insn (dest_reg, plus_constant (dest_reg, bytes_per_iter)); -+ -+ /* Emit the loop condition. */ -+ test = gen_rtx_NE (VOIDmode, src_reg, final_src); -+ emit_jump_insn (gen_cbranchsi4 (test, src_reg, final_src, label)); -+ -+ /* Mop up any left-over bytes. */ -+ if (leftover) -+ arm_block_move_unaligned_straight (dest, src, leftover, interleave_factor); -+} -+ -+/* Emit a block move when either the source or destination is unaligned (not -+ aligned to a four-byte boundary). This may need further tuning depending on -+ core type, optimize_size setting, etc. */ -+ -+static int -+arm_movmemqi_unaligned (rtx *operands) -+{ -+ HOST_WIDE_INT length = INTVAL (operands[2]); -+ -+ if (optimize_size) -+ { -+ bool src_aligned = MEM_ALIGN (operands[1]) >= BITS_PER_WORD; -+ bool dst_aligned = MEM_ALIGN (operands[0]) >= BITS_PER_WORD; -+ /* Inlined memcpy using ldr/str/ldrh/strh can be quite big: try to limit -+ size of code if optimizing for size. We'll use ldm/stm if src_aligned -+ or dst_aligned though: allow more interleaving in those cases since the -+ resulting code can be smaller. */ -+ unsigned int interleave_factor = (src_aligned || dst_aligned) ? 2 : 1; -+ HOST_WIDE_INT bytes_per_iter = (src_aligned || dst_aligned) ? 8 : 4; -+ -+ if (length > 12) -+ arm_block_move_unaligned_loop (operands[0], operands[1], length, -+ interleave_factor, bytes_per_iter); -+ else -+ arm_block_move_unaligned_straight (operands[0], operands[1], length, -+ interleave_factor); -+ } -+ else -+ { -+ /* Note that the loop created by arm_block_move_unaligned_loop may be -+ subject to loop unrolling, which makes tuning this condition a little -+ redundant. */ -+ if (length > 32) -+ arm_block_move_unaligned_loop (operands[0], operands[1], length, 4, 16); -+ else -+ arm_block_move_unaligned_straight (operands[0], operands[1], length, 4); -+ } -+ -+ return 1; -+} -+ - int - arm_gen_movmemqi (rtx *operands) - { -@@ -10343,8 +11149,13 @@ - - if (GET_CODE (operands[2]) != CONST_INT - || GET_CODE (operands[3]) != CONST_INT -- || INTVAL (operands[2]) > 64 -- || INTVAL (operands[3]) & 3) -+ || INTVAL (operands[2]) > 64) -+ return 0; -+ -+ if (unaligned_access && (INTVAL (operands[3]) & 3) != 0) -+ return arm_movmemqi_unaligned (operands); -+ -+ if (INTVAL (operands[3]) & 3) - return 0; - - dstbase = operands[0]; -@@ -11433,6 +12244,19 @@ - return 0; - } - -+/* Return the maximum amount of padding that will be inserted before -+ label LABEL. */ -+ -+static HOST_WIDE_INT -+get_label_padding (rtx label) -+{ -+ HOST_WIDE_INT align, min_insn_size; -+ -+ align = 1 << label_to_alignment (label); -+ min_insn_size = TARGET_THUMB ? 2 : 4; -+ return align > min_insn_size ? align - min_insn_size : 0; -+} -+ - /* Move a minipool fix MP from its current location to before MAX_MP. - If MAX_MP is NULL, then MP doesn't need moving, but the addressing - constraints may need updating. */ -@@ -11979,8 +12803,12 @@ - within range. */ - gcc_assert (GET_CODE (from) != BARRIER); - -- /* Count the length of this insn. */ -- count += get_attr_length (from); -+ /* Count the length of this insn. This must stay in sync with the -+ code that pushes minipool fixes. */ -+ if (LABEL_P (from)) -+ count += get_label_padding (from); -+ else -+ count += get_attr_length (from); - - /* If there is a jump table, add its length. */ - tmp = is_jump_table (from); -@@ -12400,6 +13228,11 @@ - insn = table; - } - } -+ else if (LABEL_P (insn)) -+ /* Add the worst-case padding due to alignment. We don't add -+ the _current_ padding because the minipool insertions -+ themselves might change it. */ -+ address += get_label_padding (insn); - } - - fix = minipool_fix_head; -@@ -16591,7 +17424,7 @@ - { - rtx addr; - bool postinc = FALSE; -- unsigned align, modesize, align_bits; -+ unsigned align, memsize, align_bits; - - gcc_assert (GET_CODE (x) == MEM); - addr = XEXP (x, 0); -@@ -16606,12 +17439,12 @@ - instruction (for some alignments) as an aid to the memory subsystem - of the target. */ - align = MEM_ALIGN (x) >> 3; -- modesize = GET_MODE_SIZE (GET_MODE (x)); -+ memsize = INTVAL (MEM_SIZE (x)); - - /* Only certain alignment specifiers are supported by the hardware. */ -- if (modesize == 16 && (align % 32) == 0) -+ if (memsize == 16 && (align % 32) == 0) - align_bits = 256; -- else if ((modesize == 8 || modesize == 16) && (align % 16) == 0) -+ else if ((memsize == 8 || memsize == 16) && (align % 16) == 0) - align_bits = 128; - else if ((align % 8) == 0) - align_bits = 64; -@@ -16663,6 +17496,11 @@ - } - return; - -+ case 'v': -+ gcc_assert (GET_CODE (x) == CONST_DOUBLE); -+ fprintf (stream, "#%d", vfp3_const_double_for_fract_bits (x)); -+ return; -+ - /* Register specifier for vld1.16/vst1.16. Translate the S register - number into a D register number and element index. */ - case 'z': -@@ -17022,10 +17860,10 @@ - decremented/zeroed by arm_asm_output_opcode as the insns are output. */ - - /* Returns the index of the ARM condition code string in -- `arm_condition_codes'. COMPARISON should be an rtx like -- `(eq (...) (...))'. */ --static enum arm_cond_code --get_arm_condition_code (rtx comparison) -+ `arm_condition_codes', or ARM_NV if the comparison is invalid. -+ COMPARISON should be an rtx like `(eq (...) (...))'. */ -+enum arm_cond_code -+maybe_get_arm_condition_code (rtx comparison) - { - enum machine_mode mode = GET_MODE (XEXP (comparison, 0)); - enum arm_cond_code code; -@@ -17049,11 +17887,11 @@ - case CC_DLTUmode: code = ARM_CC; - - dominance: -- gcc_assert (comp_code == EQ || comp_code == NE); -- - if (comp_code == EQ) - return ARM_INVERSE_CONDITION_CODE (code); -- return code; -+ if (comp_code == NE) -+ return code; -+ return ARM_NV; - - case CC_NOOVmode: - switch (comp_code) -@@ -17062,7 +17900,7 @@ - case EQ: return ARM_EQ; - case GE: return ARM_PL; - case LT: return ARM_MI; -- default: gcc_unreachable (); -+ default: return ARM_NV; - } - - case CC_Zmode: -@@ -17070,7 +17908,7 @@ - { - case NE: return ARM_NE; - case EQ: return ARM_EQ; -- default: gcc_unreachable (); -+ default: return ARM_NV; - } - - case CC_Nmode: -@@ -17078,7 +17916,7 @@ - { - case NE: return ARM_MI; - case EQ: return ARM_PL; -- default: gcc_unreachable (); -+ default: return ARM_NV; - } - - case CCFPEmode: -@@ -17103,7 +17941,7 @@ - /* UNEQ and LTGT do not have a representation. */ - case UNEQ: /* Fall through. */ - case LTGT: /* Fall through. */ -- default: gcc_unreachable (); -+ default: return ARM_NV; - } - - case CC_SWPmode: -@@ -17119,7 +17957,7 @@ - case GTU: return ARM_CC; - case LEU: return ARM_CS; - case LTU: return ARM_HI; -- default: gcc_unreachable (); -+ default: return ARM_NV; - } - - case CC_Cmode: -@@ -17127,7 +17965,7 @@ - { - case LTU: return ARM_CS; - case GEU: return ARM_CC; -- default: gcc_unreachable (); -+ default: return ARM_NV; - } - - case CC_CZmode: -@@ -17139,7 +17977,7 @@ - case GTU: return ARM_HI; - case LEU: return ARM_LS; - case LTU: return ARM_CC; -- default: gcc_unreachable (); -+ default: return ARM_NV; - } - - case CC_NCVmode: -@@ -17149,7 +17987,7 @@ - case LT: return ARM_LT; - case GEU: return ARM_CS; - case LTU: return ARM_CC; -- default: gcc_unreachable (); -+ default: return ARM_NV; - } - - case CCmode: -@@ -17165,13 +18003,22 @@ - case GTU: return ARM_HI; - case LEU: return ARM_LS; - case LTU: return ARM_CC; -- default: gcc_unreachable (); -+ default: return ARM_NV; - } - - default: gcc_unreachable (); - } - } - -+/* Like maybe_get_arm_condition_code, but never return ARM_NV. */ -+static enum arm_cond_code -+get_arm_condition_code (rtx comparison) -+{ -+ enum arm_cond_code code = maybe_get_arm_condition_code (comparison); -+ gcc_assert (code != ARM_NV); -+ return code; -+} -+ - /* Tell arm_asm_output_opcode to output IT blocks for conditionally executed - instructions. */ - void -@@ -17783,926 +18630,618 @@ - return value; - } - --#define def_mbuiltin(MASK, NAME, TYPE, CODE) \ -- do \ -- { \ -- if ((MASK) & insn_flags) \ -- add_builtin_function ((NAME), (TYPE), (CODE), \ -- BUILT_IN_MD, NULL, NULL_TREE); \ -- } \ -- while (0) -+typedef enum { -+ T_V8QI, -+ T_V4HI, -+ T_V2SI, -+ T_V2SF, -+ T_DI, -+ T_V16QI, -+ T_V8HI, -+ T_V4SI, -+ T_V4SF, -+ T_V2DI, -+ T_TI, -+ T_EI, -+ T_OI, -+ T_MAX /* Size of enum. Keep last. */ -+} neon_builtin_type_mode; -+ -+#define TYPE_MODE_BIT(X) (1 << (X)) -+ -+#define TB_DREG (TYPE_MODE_BIT (T_V8QI) | TYPE_MODE_BIT (T_V4HI) \ -+ | TYPE_MODE_BIT (T_V2SI) | TYPE_MODE_BIT (T_V2SF) \ -+ | TYPE_MODE_BIT (T_DI)) -+#define TB_QREG (TYPE_MODE_BIT (T_V16QI) | TYPE_MODE_BIT (T_V8HI) \ -+ | TYPE_MODE_BIT (T_V4SI) | TYPE_MODE_BIT (T_V4SF) \ -+ | TYPE_MODE_BIT (T_V2DI) | TYPE_MODE_BIT (T_TI)) - --struct builtin_description --{ -- const unsigned int mask; -- const enum insn_code icode; -- const char * const name; -- const enum arm_builtins code; -- const enum rtx_code comparison; -- const unsigned int flag; --}; -+#define v8qi_UP T_V8QI -+#define v4hi_UP T_V4HI -+#define v2si_UP T_V2SI -+#define v2sf_UP T_V2SF -+#define di_UP T_DI -+#define v16qi_UP T_V16QI -+#define v8hi_UP T_V8HI -+#define v4si_UP T_V4SI -+#define v4sf_UP T_V4SF -+#define v2di_UP T_V2DI -+#define ti_UP T_TI -+#define ei_UP T_EI -+#define oi_UP T_OI - --static const struct builtin_description bdesc_2arg[] = --{ --#define IWMMXT_BUILTIN(code, string, builtin) \ -- { FL_IWMMXT, CODE_FOR_##code, "__builtin_arm_" string, \ -- ARM_BUILTIN_##builtin, UNKNOWN, 0 }, -+#define UP(X) X##_UP - -- IWMMXT_BUILTIN (addv8qi3, "waddb", WADDB) -- IWMMXT_BUILTIN (addv4hi3, "waddh", WADDH) -- IWMMXT_BUILTIN (addv2si3, "waddw", WADDW) -- IWMMXT_BUILTIN (subv8qi3, "wsubb", WSUBB) -- IWMMXT_BUILTIN (subv4hi3, "wsubh", WSUBH) -- IWMMXT_BUILTIN (subv2si3, "wsubw", WSUBW) -- IWMMXT_BUILTIN (ssaddv8qi3, "waddbss", WADDSSB) -- IWMMXT_BUILTIN (ssaddv4hi3, "waddhss", WADDSSH) -- IWMMXT_BUILTIN (ssaddv2si3, "waddwss", WADDSSW) -- IWMMXT_BUILTIN (sssubv8qi3, "wsubbss", WSUBSSB) -- IWMMXT_BUILTIN (sssubv4hi3, "wsubhss", WSUBSSH) -- IWMMXT_BUILTIN (sssubv2si3, "wsubwss", WSUBSSW) -- IWMMXT_BUILTIN (usaddv8qi3, "waddbus", WADDUSB) -- IWMMXT_BUILTIN (usaddv4hi3, "waddhus", WADDUSH) -- IWMMXT_BUILTIN (usaddv2si3, "waddwus", WADDUSW) -- IWMMXT_BUILTIN (ussubv8qi3, "wsubbus", WSUBUSB) -- IWMMXT_BUILTIN (ussubv4hi3, "wsubhus", WSUBUSH) -- IWMMXT_BUILTIN (ussubv2si3, "wsubwus", WSUBUSW) -- IWMMXT_BUILTIN (mulv4hi3, "wmulul", WMULUL) -- IWMMXT_BUILTIN (smulv4hi3_highpart, "wmulsm", WMULSM) -- IWMMXT_BUILTIN (umulv4hi3_highpart, "wmulum", WMULUM) -- IWMMXT_BUILTIN (eqv8qi3, "wcmpeqb", WCMPEQB) -- IWMMXT_BUILTIN (eqv4hi3, "wcmpeqh", WCMPEQH) -- IWMMXT_BUILTIN (eqv2si3, "wcmpeqw", WCMPEQW) -- IWMMXT_BUILTIN (gtuv8qi3, "wcmpgtub", WCMPGTUB) -- IWMMXT_BUILTIN (gtuv4hi3, "wcmpgtuh", WCMPGTUH) -- IWMMXT_BUILTIN (gtuv2si3, "wcmpgtuw", WCMPGTUW) -- IWMMXT_BUILTIN (gtv8qi3, "wcmpgtsb", WCMPGTSB) -- IWMMXT_BUILTIN (gtv4hi3, "wcmpgtsh", WCMPGTSH) -- IWMMXT_BUILTIN (gtv2si3, "wcmpgtsw", WCMPGTSW) -- IWMMXT_BUILTIN (umaxv8qi3, "wmaxub", WMAXUB) -- IWMMXT_BUILTIN (smaxv8qi3, "wmaxsb", WMAXSB) -- IWMMXT_BUILTIN (umaxv4hi3, "wmaxuh", WMAXUH) -- IWMMXT_BUILTIN (smaxv4hi3, "wmaxsh", WMAXSH) -- IWMMXT_BUILTIN (umaxv2si3, "wmaxuw", WMAXUW) -- IWMMXT_BUILTIN (smaxv2si3, "wmaxsw", WMAXSW) -- IWMMXT_BUILTIN (uminv8qi3, "wminub", WMINUB) -- IWMMXT_BUILTIN (sminv8qi3, "wminsb", WMINSB) -- IWMMXT_BUILTIN (uminv4hi3, "wminuh", WMINUH) -- IWMMXT_BUILTIN (sminv4hi3, "wminsh", WMINSH) -- IWMMXT_BUILTIN (uminv2si3, "wminuw", WMINUW) -- IWMMXT_BUILTIN (sminv2si3, "wminsw", WMINSW) -- IWMMXT_BUILTIN (iwmmxt_anddi3, "wand", WAND) -- IWMMXT_BUILTIN (iwmmxt_nanddi3, "wandn", WANDN) -- IWMMXT_BUILTIN (iwmmxt_iordi3, "wor", WOR) -- IWMMXT_BUILTIN (iwmmxt_xordi3, "wxor", WXOR) -- IWMMXT_BUILTIN (iwmmxt_uavgv8qi3, "wavg2b", WAVG2B) -- IWMMXT_BUILTIN (iwmmxt_uavgv4hi3, "wavg2h", WAVG2H) -- IWMMXT_BUILTIN (iwmmxt_uavgrndv8qi3, "wavg2br", WAVG2BR) -- IWMMXT_BUILTIN (iwmmxt_uavgrndv4hi3, "wavg2hr", WAVG2HR) -- IWMMXT_BUILTIN (iwmmxt_wunpckilb, "wunpckilb", WUNPCKILB) -- IWMMXT_BUILTIN (iwmmxt_wunpckilh, "wunpckilh", WUNPCKILH) -- IWMMXT_BUILTIN (iwmmxt_wunpckilw, "wunpckilw", WUNPCKILW) -- IWMMXT_BUILTIN (iwmmxt_wunpckihb, "wunpckihb", WUNPCKIHB) -- IWMMXT_BUILTIN (iwmmxt_wunpckihh, "wunpckihh", WUNPCKIHH) -- IWMMXT_BUILTIN (iwmmxt_wunpckihw, "wunpckihw", WUNPCKIHW) -- IWMMXT_BUILTIN (iwmmxt_wmadds, "wmadds", WMADDS) -- IWMMXT_BUILTIN (iwmmxt_wmaddu, "wmaddu", WMADDU) -+typedef enum { -+ NEON_BINOP, -+ NEON_TERNOP, -+ NEON_UNOP, -+ NEON_GETLANE, -+ NEON_SETLANE, -+ NEON_CREATE, -+ NEON_DUP, -+ NEON_DUPLANE, -+ NEON_COMBINE, -+ NEON_SPLIT, -+ NEON_LANEMUL, -+ NEON_LANEMULL, -+ NEON_LANEMULH, -+ NEON_LANEMAC, -+ NEON_SCALARMUL, -+ NEON_SCALARMULL, -+ NEON_SCALARMULH, -+ NEON_SCALARMAC, -+ NEON_CONVERT, -+ NEON_FIXCONV, -+ NEON_SELECT, -+ NEON_RESULTPAIR, -+ NEON_REINTERP, -+ NEON_VTBL, -+ NEON_VTBX, -+ NEON_LOAD1, -+ NEON_LOAD1LANE, -+ NEON_STORE1, -+ NEON_STORE1LANE, -+ NEON_LOADSTRUCT, -+ NEON_LOADSTRUCTLANE, -+ NEON_STORESTRUCT, -+ NEON_STORESTRUCTLANE, -+ NEON_LOGICBINOP, -+ NEON_SHIFTINSERT, -+ NEON_SHIFTIMM, -+ NEON_SHIFTACC -+} neon_itype; - --#define IWMMXT_BUILTIN2(code, builtin) \ -- { FL_IWMMXT, CODE_FOR_##code, NULL, ARM_BUILTIN_##builtin, UNKNOWN, 0 }, -+typedef struct { -+ const char *name; -+ const neon_itype itype; -+ const neon_builtin_type_mode mode; -+ const enum insn_code code; -+ unsigned int fcode; -+} neon_builtin_datum; - -- IWMMXT_BUILTIN2 (iwmmxt_wpackhss, WPACKHSS) -- IWMMXT_BUILTIN2 (iwmmxt_wpackwss, WPACKWSS) -- IWMMXT_BUILTIN2 (iwmmxt_wpackdss, WPACKDSS) -- IWMMXT_BUILTIN2 (iwmmxt_wpackhus, WPACKHUS) -- IWMMXT_BUILTIN2 (iwmmxt_wpackwus, WPACKWUS) -- IWMMXT_BUILTIN2 (iwmmxt_wpackdus, WPACKDUS) -- IWMMXT_BUILTIN2 (ashlv4hi3_di, WSLLH) -- IWMMXT_BUILTIN2 (ashlv4hi3_iwmmxt, WSLLHI) -- IWMMXT_BUILTIN2 (ashlv2si3_di, WSLLW) -- IWMMXT_BUILTIN2 (ashlv2si3_iwmmxt, WSLLWI) -- IWMMXT_BUILTIN2 (ashldi3_di, WSLLD) -- IWMMXT_BUILTIN2 (ashldi3_iwmmxt, WSLLDI) -- IWMMXT_BUILTIN2 (lshrv4hi3_di, WSRLH) -- IWMMXT_BUILTIN2 (lshrv4hi3_iwmmxt, WSRLHI) -- IWMMXT_BUILTIN2 (lshrv2si3_di, WSRLW) -- IWMMXT_BUILTIN2 (lshrv2si3_iwmmxt, WSRLWI) -- IWMMXT_BUILTIN2 (lshrdi3_di, WSRLD) -- IWMMXT_BUILTIN2 (lshrdi3_iwmmxt, WSRLDI) -- IWMMXT_BUILTIN2 (ashrv4hi3_di, WSRAH) -- IWMMXT_BUILTIN2 (ashrv4hi3_iwmmxt, WSRAHI) -- IWMMXT_BUILTIN2 (ashrv2si3_di, WSRAW) -- IWMMXT_BUILTIN2 (ashrv2si3_iwmmxt, WSRAWI) -- IWMMXT_BUILTIN2 (ashrdi3_di, WSRAD) -- IWMMXT_BUILTIN2 (ashrdi3_iwmmxt, WSRADI) -- IWMMXT_BUILTIN2 (rorv4hi3_di, WRORH) -- IWMMXT_BUILTIN2 (rorv4hi3, WRORHI) -- IWMMXT_BUILTIN2 (rorv2si3_di, WRORW) -- IWMMXT_BUILTIN2 (rorv2si3, WRORWI) -- IWMMXT_BUILTIN2 (rordi3_di, WRORD) -- IWMMXT_BUILTIN2 (rordi3, WRORDI) -- IWMMXT_BUILTIN2 (iwmmxt_wmacuz, WMACUZ) -- IWMMXT_BUILTIN2 (iwmmxt_wmacsz, WMACSZ) --}; -+#define CF(N,X) CODE_FOR_neon_##N##X - --static const struct builtin_description bdesc_1arg[] = -+#define VAR1(T, N, A) \ -+ {#N, NEON_##T, UP (A), CF (N, A), 0} -+#define VAR2(T, N, A, B) \ -+ VAR1 (T, N, A), \ -+ {#N, NEON_##T, UP (B), CF (N, B), 0} -+#define VAR3(T, N, A, B, C) \ -+ VAR2 (T, N, A, B), \ -+ {#N, NEON_##T, UP (C), CF (N, C), 0} -+#define VAR4(T, N, A, B, C, D) \ -+ VAR3 (T, N, A, B, C), \ -+ {#N, NEON_##T, UP (D), CF (N, D), 0} -+#define VAR5(T, N, A, B, C, D, E) \ -+ VAR4 (T, N, A, B, C, D), \ -+ {#N, NEON_##T, UP (E), CF (N, E), 0} -+#define VAR6(T, N, A, B, C, D, E, F) \ -+ VAR5 (T, N, A, B, C, D, E), \ -+ {#N, NEON_##T, UP (F), CF (N, F), 0} -+#define VAR7(T, N, A, B, C, D, E, F, G) \ -+ VAR6 (T, N, A, B, C, D, E, F), \ -+ {#N, NEON_##T, UP (G), CF (N, G), 0} -+#define VAR8(T, N, A, B, C, D, E, F, G, H) \ -+ VAR7 (T, N, A, B, C, D, E, F, G), \ -+ {#N, NEON_##T, UP (H), CF (N, H), 0} -+#define VAR9(T, N, A, B, C, D, E, F, G, H, I) \ -+ VAR8 (T, N, A, B, C, D, E, F, G, H), \ -+ {#N, NEON_##T, UP (I), CF (N, I), 0} -+#define VAR10(T, N, A, B, C, D, E, F, G, H, I, J) \ -+ VAR9 (T, N, A, B, C, D, E, F, G, H, I), \ -+ {#N, NEON_##T, UP (J), CF (N, J), 0} -+ -+/* The mode entries in the following table correspond to the "key" type of the -+ instruction variant, i.e. equivalent to that which would be specified after -+ the assembler mnemonic, which usually refers to the last vector operand. -+ (Signed/unsigned/polynomial types are not differentiated between though, and -+ are all mapped onto the same mode for a given element size.) The modes -+ listed per instruction should be the same as those defined for that -+ instruction's pattern in neon.md. */ -+ -+static neon_builtin_datum neon_builtin_data[] = - { -- IWMMXT_BUILTIN (iwmmxt_tmovmskb, "tmovmskb", TMOVMSKB) -- IWMMXT_BUILTIN (iwmmxt_tmovmskh, "tmovmskh", TMOVMSKH) -- IWMMXT_BUILTIN (iwmmxt_tmovmskw, "tmovmskw", TMOVMSKW) -- IWMMXT_BUILTIN (iwmmxt_waccb, "waccb", WACCB) -- IWMMXT_BUILTIN (iwmmxt_wacch, "wacch", WACCH) -- IWMMXT_BUILTIN (iwmmxt_waccw, "waccw", WACCW) -- IWMMXT_BUILTIN (iwmmxt_wunpckehub, "wunpckehub", WUNPCKEHUB) -- IWMMXT_BUILTIN (iwmmxt_wunpckehuh, "wunpckehuh", WUNPCKEHUH) -- IWMMXT_BUILTIN (iwmmxt_wunpckehuw, "wunpckehuw", WUNPCKEHUW) -- IWMMXT_BUILTIN (iwmmxt_wunpckehsb, "wunpckehsb", WUNPCKEHSB) -- IWMMXT_BUILTIN (iwmmxt_wunpckehsh, "wunpckehsh", WUNPCKEHSH) -- IWMMXT_BUILTIN (iwmmxt_wunpckehsw, "wunpckehsw", WUNPCKEHSW) -- IWMMXT_BUILTIN (iwmmxt_wunpckelub, "wunpckelub", WUNPCKELUB) -- IWMMXT_BUILTIN (iwmmxt_wunpckeluh, "wunpckeluh", WUNPCKELUH) -- IWMMXT_BUILTIN (iwmmxt_wunpckeluw, "wunpckeluw", WUNPCKELUW) -- IWMMXT_BUILTIN (iwmmxt_wunpckelsb, "wunpckelsb", WUNPCKELSB) -- IWMMXT_BUILTIN (iwmmxt_wunpckelsh, "wunpckelsh", WUNPCKELSH) -- IWMMXT_BUILTIN (iwmmxt_wunpckelsw, "wunpckelsw", WUNPCKELSW) -+ VAR10 (BINOP, vadd, -+ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR3 (BINOP, vaddl, v8qi, v4hi, v2si), -+ VAR3 (BINOP, vaddw, v8qi, v4hi, v2si), -+ VAR6 (BINOP, vhadd, v8qi, v4hi, v2si, v16qi, v8hi, v4si), -+ VAR8 (BINOP, vqadd, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), -+ VAR3 (BINOP, vaddhn, v8hi, v4si, v2di), -+ VAR8 (BINOP, vmul, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), -+ VAR8 (TERNOP, vmla, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), -+ VAR3 (TERNOP, vmlal, v8qi, v4hi, v2si), -+ VAR8 (TERNOP, vmls, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), -+ VAR3 (TERNOP, vmlsl, v8qi, v4hi, v2si), -+ VAR4 (BINOP, vqdmulh, v4hi, v2si, v8hi, v4si), -+ VAR2 (TERNOP, vqdmlal, v4hi, v2si), -+ VAR2 (TERNOP, vqdmlsl, v4hi, v2si), -+ VAR3 (BINOP, vmull, v8qi, v4hi, v2si), -+ VAR2 (SCALARMULL, vmull_n, v4hi, v2si), -+ VAR2 (LANEMULL, vmull_lane, v4hi, v2si), -+ VAR2 (SCALARMULL, vqdmull_n, v4hi, v2si), -+ VAR2 (LANEMULL, vqdmull_lane, v4hi, v2si), -+ VAR4 (SCALARMULH, vqdmulh_n, v4hi, v2si, v8hi, v4si), -+ VAR4 (LANEMULH, vqdmulh_lane, v4hi, v2si, v8hi, v4si), -+ VAR2 (BINOP, vqdmull, v4hi, v2si), -+ VAR8 (BINOP, vshl, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), -+ VAR8 (BINOP, vqshl, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), -+ VAR8 (SHIFTIMM, vshr_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), -+ VAR3 (SHIFTIMM, vshrn_n, v8hi, v4si, v2di), -+ VAR3 (SHIFTIMM, vqshrn_n, v8hi, v4si, v2di), -+ VAR3 (SHIFTIMM, vqshrun_n, v8hi, v4si, v2di), -+ VAR8 (SHIFTIMM, vshl_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), -+ VAR8 (SHIFTIMM, vqshl_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), -+ VAR8 (SHIFTIMM, vqshlu_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), -+ VAR3 (SHIFTIMM, vshll_n, v8qi, v4hi, v2si), -+ VAR8 (SHIFTACC, vsra_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), -+ VAR10 (BINOP, vsub, -+ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR3 (BINOP, vsubl, v8qi, v4hi, v2si), -+ VAR3 (BINOP, vsubw, v8qi, v4hi, v2si), -+ VAR8 (BINOP, vqsub, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), -+ VAR6 (BINOP, vhsub, v8qi, v4hi, v2si, v16qi, v8hi, v4si), -+ VAR3 (BINOP, vsubhn, v8hi, v4si, v2di), -+ VAR8 (BINOP, vceq, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), -+ VAR8 (BINOP, vcge, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), -+ VAR8 (BINOP, vcgt, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), -+ VAR2 (BINOP, vcage, v2sf, v4sf), -+ VAR2 (BINOP, vcagt, v2sf, v4sf), -+ VAR6 (BINOP, vtst, v8qi, v4hi, v2si, v16qi, v8hi, v4si), -+ VAR8 (BINOP, vabd, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), -+ VAR3 (BINOP, vabdl, v8qi, v4hi, v2si), -+ VAR6 (TERNOP, vaba, v8qi, v4hi, v2si, v16qi, v8hi, v4si), -+ VAR3 (TERNOP, vabal, v8qi, v4hi, v2si), -+ VAR8 (BINOP, vmax, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), -+ VAR8 (BINOP, vmin, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), -+ VAR4 (BINOP, vpadd, v8qi, v4hi, v2si, v2sf), -+ VAR6 (UNOP, vpaddl, v8qi, v4hi, v2si, v16qi, v8hi, v4si), -+ VAR6 (BINOP, vpadal, v8qi, v4hi, v2si, v16qi, v8hi, v4si), -+ VAR4 (BINOP, vpmax, v8qi, v4hi, v2si, v2sf), -+ VAR4 (BINOP, vpmin, v8qi, v4hi, v2si, v2sf), -+ VAR2 (BINOP, vrecps, v2sf, v4sf), -+ VAR2 (BINOP, vrsqrts, v2sf, v4sf), -+ VAR8 (SHIFTINSERT, vsri_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), -+ VAR8 (SHIFTINSERT, vsli_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di), -+ VAR8 (UNOP, vabs, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), -+ VAR6 (UNOP, vqabs, v8qi, v4hi, v2si, v16qi, v8hi, v4si), -+ VAR8 (UNOP, vneg, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), -+ VAR6 (UNOP, vqneg, v8qi, v4hi, v2si, v16qi, v8hi, v4si), -+ VAR6 (UNOP, vcls, v8qi, v4hi, v2si, v16qi, v8hi, v4si), -+ VAR6 (UNOP, vclz, v8qi, v4hi, v2si, v16qi, v8hi, v4si), -+ VAR2 (UNOP, vcnt, v8qi, v16qi), -+ VAR4 (UNOP, vrecpe, v2si, v2sf, v4si, v4sf), -+ VAR4 (UNOP, vrsqrte, v2si, v2sf, v4si, v4sf), -+ VAR6 (UNOP, vmvn, v8qi, v4hi, v2si, v16qi, v8hi, v4si), -+ /* FIXME: vget_lane supports more variants than this! */ -+ VAR10 (GETLANE, vget_lane, -+ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR10 (SETLANE, vset_lane, -+ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR5 (CREATE, vcreate, v8qi, v4hi, v2si, v2sf, di), -+ VAR10 (DUP, vdup_n, -+ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR10 (DUPLANE, vdup_lane, -+ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR5 (COMBINE, vcombine, v8qi, v4hi, v2si, v2sf, di), -+ VAR5 (SPLIT, vget_high, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR5 (SPLIT, vget_low, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR3 (UNOP, vmovn, v8hi, v4si, v2di), -+ VAR3 (UNOP, vqmovn, v8hi, v4si, v2di), -+ VAR3 (UNOP, vqmovun, v8hi, v4si, v2di), -+ VAR3 (UNOP, vmovl, v8qi, v4hi, v2si), -+ VAR6 (LANEMUL, vmul_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf), -+ VAR6 (LANEMAC, vmla_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf), -+ VAR2 (LANEMAC, vmlal_lane, v4hi, v2si), -+ VAR2 (LANEMAC, vqdmlal_lane, v4hi, v2si), -+ VAR6 (LANEMAC, vmls_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf), -+ VAR2 (LANEMAC, vmlsl_lane, v4hi, v2si), -+ VAR2 (LANEMAC, vqdmlsl_lane, v4hi, v2si), -+ VAR6 (SCALARMUL, vmul_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf), -+ VAR6 (SCALARMAC, vmla_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf), -+ VAR2 (SCALARMAC, vmlal_n, v4hi, v2si), -+ VAR2 (SCALARMAC, vqdmlal_n, v4hi, v2si), -+ VAR6 (SCALARMAC, vmls_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf), -+ VAR2 (SCALARMAC, vmlsl_n, v4hi, v2si), -+ VAR2 (SCALARMAC, vqdmlsl_n, v4hi, v2si), -+ VAR10 (BINOP, vext, -+ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR8 (UNOP, vrev64, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), -+ VAR4 (UNOP, vrev32, v8qi, v4hi, v16qi, v8hi), -+ VAR2 (UNOP, vrev16, v8qi, v16qi), -+ VAR4 (CONVERT, vcvt, v2si, v2sf, v4si, v4sf), -+ VAR4 (FIXCONV, vcvt_n, v2si, v2sf, v4si, v4sf), -+ VAR10 (SELECT, vbsl, -+ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR1 (VTBL, vtbl1, v8qi), -+ VAR1 (VTBL, vtbl2, v8qi), -+ VAR1 (VTBL, vtbl3, v8qi), -+ VAR1 (VTBL, vtbl4, v8qi), -+ VAR1 (VTBX, vtbx1, v8qi), -+ VAR1 (VTBX, vtbx2, v8qi), -+ VAR1 (VTBX, vtbx3, v8qi), -+ VAR1 (VTBX, vtbx4, v8qi), -+ VAR8 (RESULTPAIR, vtrn, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), -+ VAR8 (RESULTPAIR, vzip, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), -+ VAR8 (RESULTPAIR, vuzp, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), -+ VAR5 (REINTERP, vreinterpretv8qi, v8qi, v4hi, v2si, v2sf, di), -+ VAR5 (REINTERP, vreinterpretv4hi, v8qi, v4hi, v2si, v2sf, di), -+ VAR5 (REINTERP, vreinterpretv2si, v8qi, v4hi, v2si, v2sf, di), -+ VAR5 (REINTERP, vreinterpretv2sf, v8qi, v4hi, v2si, v2sf, di), -+ VAR5 (REINTERP, vreinterpretdi, v8qi, v4hi, v2si, v2sf, di), -+ VAR5 (REINTERP, vreinterpretv16qi, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR5 (REINTERP, vreinterpretv8hi, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR5 (REINTERP, vreinterpretv4si, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR5 (REINTERP, vreinterpretv4sf, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR5 (REINTERP, vreinterpretv2di, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR10 (LOAD1, vld1, -+ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR10 (LOAD1LANE, vld1_lane, -+ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR10 (LOAD1, vld1_dup, -+ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR10 (STORE1, vst1, -+ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR10 (STORE1LANE, vst1_lane, -+ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR9 (LOADSTRUCT, -+ vld2, v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf), -+ VAR7 (LOADSTRUCTLANE, vld2_lane, -+ v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf), -+ VAR5 (LOADSTRUCT, vld2_dup, v8qi, v4hi, v2si, v2sf, di), -+ VAR9 (STORESTRUCT, vst2, -+ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf), -+ VAR7 (STORESTRUCTLANE, vst2_lane, -+ v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf), -+ VAR9 (LOADSTRUCT, -+ vld3, v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf), -+ VAR7 (LOADSTRUCTLANE, vld3_lane, -+ v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf), -+ VAR5 (LOADSTRUCT, vld3_dup, v8qi, v4hi, v2si, v2sf, di), -+ VAR9 (STORESTRUCT, vst3, -+ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf), -+ VAR7 (STORESTRUCTLANE, vst3_lane, -+ v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf), -+ VAR9 (LOADSTRUCT, vld4, -+ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf), -+ VAR7 (LOADSTRUCTLANE, vld4_lane, -+ v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf), -+ VAR5 (LOADSTRUCT, vld4_dup, v8qi, v4hi, v2si, v2sf, di), -+ VAR9 (STORESTRUCT, vst4, -+ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf), -+ VAR7 (STORESTRUCTLANE, vst4_lane, -+ v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf), -+ VAR10 (LOGICBINOP, vand, -+ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR10 (LOGICBINOP, vorr, -+ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR10 (BINOP, veor, -+ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR10 (LOGICBINOP, vbic, -+ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), -+ VAR10 (LOGICBINOP, vorn, -+ v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) -+}; -+ -+#undef CF -+#undef VAR1 -+#undef VAR2 -+#undef VAR3 -+#undef VAR4 -+#undef VAR5 -+#undef VAR6 -+#undef VAR7 -+#undef VAR8 -+#undef VAR9 -+#undef VAR10 -+ -+/* Neon defines builtins from ARM_BUILTIN_MAX upwards, though they don't have -+ symbolic names defined here (which would require too much duplication). -+ FIXME? */ -+enum arm_builtins -+{ -+ ARM_BUILTIN_GETWCX, -+ ARM_BUILTIN_SETWCX, -+ -+ ARM_BUILTIN_WZERO, -+ -+ ARM_BUILTIN_WAVG2BR, -+ ARM_BUILTIN_WAVG2HR, -+ ARM_BUILTIN_WAVG2B, -+ ARM_BUILTIN_WAVG2H, -+ -+ ARM_BUILTIN_WACCB, -+ ARM_BUILTIN_WACCH, -+ ARM_BUILTIN_WACCW, -+ -+ ARM_BUILTIN_WMACS, -+ ARM_BUILTIN_WMACSZ, -+ ARM_BUILTIN_WMACU, -+ ARM_BUILTIN_WMACUZ, -+ -+ ARM_BUILTIN_WSADB, -+ ARM_BUILTIN_WSADBZ, -+ ARM_BUILTIN_WSADH, -+ ARM_BUILTIN_WSADHZ, -+ -+ ARM_BUILTIN_WALIGN, -+ -+ ARM_BUILTIN_TMIA, -+ ARM_BUILTIN_TMIAPH, -+ ARM_BUILTIN_TMIABB, -+ ARM_BUILTIN_TMIABT, -+ ARM_BUILTIN_TMIATB, -+ ARM_BUILTIN_TMIATT, -+ -+ ARM_BUILTIN_TMOVMSKB, -+ ARM_BUILTIN_TMOVMSKH, -+ ARM_BUILTIN_TMOVMSKW, -+ -+ ARM_BUILTIN_TBCSTB, -+ ARM_BUILTIN_TBCSTH, -+ ARM_BUILTIN_TBCSTW, -+ -+ ARM_BUILTIN_WMADDS, -+ ARM_BUILTIN_WMADDU, -+ -+ ARM_BUILTIN_WPACKHSS, -+ ARM_BUILTIN_WPACKWSS, -+ ARM_BUILTIN_WPACKDSS, -+ ARM_BUILTIN_WPACKHUS, -+ ARM_BUILTIN_WPACKWUS, -+ ARM_BUILTIN_WPACKDUS, -+ -+ ARM_BUILTIN_WADDB, -+ ARM_BUILTIN_WADDH, -+ ARM_BUILTIN_WADDW, -+ ARM_BUILTIN_WADDSSB, -+ ARM_BUILTIN_WADDSSH, -+ ARM_BUILTIN_WADDSSW, -+ ARM_BUILTIN_WADDUSB, -+ ARM_BUILTIN_WADDUSH, -+ ARM_BUILTIN_WADDUSW, -+ ARM_BUILTIN_WSUBB, -+ ARM_BUILTIN_WSUBH, -+ ARM_BUILTIN_WSUBW, -+ ARM_BUILTIN_WSUBSSB, -+ ARM_BUILTIN_WSUBSSH, -+ ARM_BUILTIN_WSUBSSW, -+ ARM_BUILTIN_WSUBUSB, -+ ARM_BUILTIN_WSUBUSH, -+ ARM_BUILTIN_WSUBUSW, -+ -+ ARM_BUILTIN_WAND, -+ ARM_BUILTIN_WANDN, -+ ARM_BUILTIN_WOR, -+ ARM_BUILTIN_WXOR, -+ -+ ARM_BUILTIN_WCMPEQB, -+ ARM_BUILTIN_WCMPEQH, -+ ARM_BUILTIN_WCMPEQW, -+ ARM_BUILTIN_WCMPGTUB, -+ ARM_BUILTIN_WCMPGTUH, -+ ARM_BUILTIN_WCMPGTUW, -+ ARM_BUILTIN_WCMPGTSB, -+ ARM_BUILTIN_WCMPGTSH, -+ ARM_BUILTIN_WCMPGTSW, -+ -+ ARM_BUILTIN_TEXTRMSB, -+ ARM_BUILTIN_TEXTRMSH, -+ ARM_BUILTIN_TEXTRMSW, -+ ARM_BUILTIN_TEXTRMUB, -+ ARM_BUILTIN_TEXTRMUH, -+ ARM_BUILTIN_TEXTRMUW, -+ ARM_BUILTIN_TINSRB, -+ ARM_BUILTIN_TINSRH, -+ ARM_BUILTIN_TINSRW, -+ -+ ARM_BUILTIN_WMAXSW, -+ ARM_BUILTIN_WMAXSH, -+ ARM_BUILTIN_WMAXSB, -+ ARM_BUILTIN_WMAXUW, -+ ARM_BUILTIN_WMAXUH, -+ ARM_BUILTIN_WMAXUB, -+ ARM_BUILTIN_WMINSW, -+ ARM_BUILTIN_WMINSH, -+ ARM_BUILTIN_WMINSB, -+ ARM_BUILTIN_WMINUW, -+ ARM_BUILTIN_WMINUH, -+ ARM_BUILTIN_WMINUB, -+ -+ ARM_BUILTIN_WMULUM, -+ ARM_BUILTIN_WMULSM, -+ ARM_BUILTIN_WMULUL, -+ -+ ARM_BUILTIN_PSADBH, -+ ARM_BUILTIN_WSHUFH, -+ -+ ARM_BUILTIN_WSLLH, -+ ARM_BUILTIN_WSLLW, -+ ARM_BUILTIN_WSLLD, -+ ARM_BUILTIN_WSRAH, -+ ARM_BUILTIN_WSRAW, -+ ARM_BUILTIN_WSRAD, -+ ARM_BUILTIN_WSRLH, -+ ARM_BUILTIN_WSRLW, -+ ARM_BUILTIN_WSRLD, -+ ARM_BUILTIN_WRORH, -+ ARM_BUILTIN_WRORW, -+ ARM_BUILTIN_WRORD, -+ ARM_BUILTIN_WSLLHI, -+ ARM_BUILTIN_WSLLWI, -+ ARM_BUILTIN_WSLLDI, -+ ARM_BUILTIN_WSRAHI, -+ ARM_BUILTIN_WSRAWI, -+ ARM_BUILTIN_WSRADI, -+ ARM_BUILTIN_WSRLHI, -+ ARM_BUILTIN_WSRLWI, -+ ARM_BUILTIN_WSRLDI, -+ ARM_BUILTIN_WRORHI, -+ ARM_BUILTIN_WRORWI, -+ ARM_BUILTIN_WRORDI, -+ -+ ARM_BUILTIN_WUNPCKIHB, -+ ARM_BUILTIN_WUNPCKIHH, -+ ARM_BUILTIN_WUNPCKIHW, -+ ARM_BUILTIN_WUNPCKILB, -+ ARM_BUILTIN_WUNPCKILH, -+ ARM_BUILTIN_WUNPCKILW, -+ -+ ARM_BUILTIN_WUNPCKEHSB, -+ ARM_BUILTIN_WUNPCKEHSH, -+ ARM_BUILTIN_WUNPCKEHSW, -+ ARM_BUILTIN_WUNPCKEHUB, -+ ARM_BUILTIN_WUNPCKEHUH, -+ ARM_BUILTIN_WUNPCKEHUW, -+ ARM_BUILTIN_WUNPCKELSB, -+ ARM_BUILTIN_WUNPCKELSH, -+ ARM_BUILTIN_WUNPCKELSW, -+ ARM_BUILTIN_WUNPCKELUB, -+ ARM_BUILTIN_WUNPCKELUH, -+ ARM_BUILTIN_WUNPCKELUW, -+ -+ ARM_BUILTIN_THREAD_POINTER, -+ -+ ARM_BUILTIN_NEON_BASE, -+ -+ ARM_BUILTIN_MAX = ARM_BUILTIN_NEON_BASE + ARRAY_SIZE (neon_builtin_data) - }; - --/* Set up all the iWMMXt builtins. This is -- not called if TARGET_IWMMXT is zero. */ -+static GTY(()) tree arm_builtin_decls[ARM_BUILTIN_MAX]; - - static void --arm_init_iwmmxt_builtins (void) -+arm_init_neon_builtins (void) - { -- const struct builtin_description * d; -- size_t i; -- tree endlink = void_list_node; -+ unsigned int i, fcode; -+ tree decl; - -- tree V2SI_type_node = build_vector_type_for_mode (intSI_type_node, V2SImode); -- tree V4HI_type_node = build_vector_type_for_mode (intHI_type_node, V4HImode); -- tree V8QI_type_node = build_vector_type_for_mode (intQI_type_node, V8QImode); -+ tree neon_intQI_type_node; -+ tree neon_intHI_type_node; -+ tree neon_polyQI_type_node; -+ tree neon_polyHI_type_node; -+ tree neon_intSI_type_node; -+ tree neon_intDI_type_node; -+ tree neon_float_type_node; - -- tree int_ftype_int -- = build_function_type (integer_type_node, -- tree_cons (NULL_TREE, integer_type_node, endlink)); -- tree v8qi_ftype_v8qi_v8qi_int -- = build_function_type (V8QI_type_node, -- tree_cons (NULL_TREE, V8QI_type_node, -- tree_cons (NULL_TREE, V8QI_type_node, -- tree_cons (NULL_TREE, -- integer_type_node, -- endlink)))); -- tree v4hi_ftype_v4hi_int -- = build_function_type (V4HI_type_node, -- tree_cons (NULL_TREE, V4HI_type_node, -- tree_cons (NULL_TREE, integer_type_node, -- endlink))); -- tree v2si_ftype_v2si_int -- = build_function_type (V2SI_type_node, -- tree_cons (NULL_TREE, V2SI_type_node, -- tree_cons (NULL_TREE, integer_type_node, -- endlink))); -- tree v2si_ftype_di_di -- = build_function_type (V2SI_type_node, -- tree_cons (NULL_TREE, long_long_integer_type_node, -- tree_cons (NULL_TREE, long_long_integer_type_node, -- endlink))); -- tree di_ftype_di_int -- = build_function_type (long_long_integer_type_node, -- tree_cons (NULL_TREE, long_long_integer_type_node, -- tree_cons (NULL_TREE, integer_type_node, -- endlink))); -- tree di_ftype_di_int_int -- = build_function_type (long_long_integer_type_node, -- tree_cons (NULL_TREE, long_long_integer_type_node, -- tree_cons (NULL_TREE, integer_type_node, -- tree_cons (NULL_TREE, -- integer_type_node, -- endlink)))); -- tree int_ftype_v8qi -- = build_function_type (integer_type_node, -- tree_cons (NULL_TREE, V8QI_type_node, -- endlink)); -- tree int_ftype_v4hi -- = build_function_type (integer_type_node, -- tree_cons (NULL_TREE, V4HI_type_node, -- endlink)); -- tree int_ftype_v2si -- = build_function_type (integer_type_node, -- tree_cons (NULL_TREE, V2SI_type_node, -- endlink)); -- tree int_ftype_v8qi_int -- = build_function_type (integer_type_node, -- tree_cons (NULL_TREE, V8QI_type_node, -- tree_cons (NULL_TREE, integer_type_node, -- endlink))); -- tree int_ftype_v4hi_int -- = build_function_type (integer_type_node, -- tree_cons (NULL_TREE, V4HI_type_node, -- tree_cons (NULL_TREE, integer_type_node, -- endlink))); -- tree int_ftype_v2si_int -- = build_function_type (integer_type_node, -- tree_cons (NULL_TREE, V2SI_type_node, -- tree_cons (NULL_TREE, integer_type_node, -- endlink))); -- tree v8qi_ftype_v8qi_int_int -- = build_function_type (V8QI_type_node, -- tree_cons (NULL_TREE, V8QI_type_node, -- tree_cons (NULL_TREE, integer_type_node, -- tree_cons (NULL_TREE, -- integer_type_node, -- endlink)))); -- tree v4hi_ftype_v4hi_int_int -- = build_function_type (V4HI_type_node, -- tree_cons (NULL_TREE, V4HI_type_node, -- tree_cons (NULL_TREE, integer_type_node, -- tree_cons (NULL_TREE, -- integer_type_node, -- endlink)))); -- tree v2si_ftype_v2si_int_int -- = build_function_type (V2SI_type_node, -- tree_cons (NULL_TREE, V2SI_type_node, -- tree_cons (NULL_TREE, integer_type_node, -- tree_cons (NULL_TREE, -- integer_type_node, -- endlink)))); -- /* Miscellaneous. */ -- tree v8qi_ftype_v4hi_v4hi -- = build_function_type (V8QI_type_node, -- tree_cons (NULL_TREE, V4HI_type_node, -- tree_cons (NULL_TREE, V4HI_type_node, -- endlink))); -- tree v4hi_ftype_v2si_v2si -- = build_function_type (V4HI_type_node, -- tree_cons (NULL_TREE, V2SI_type_node, -- tree_cons (NULL_TREE, V2SI_type_node, -- endlink))); -- tree v2si_ftype_v4hi_v4hi -- = build_function_type (V2SI_type_node, -- tree_cons (NULL_TREE, V4HI_type_node, -- tree_cons (NULL_TREE, V4HI_type_node, -- endlink))); -- tree v2si_ftype_v8qi_v8qi -- = build_function_type (V2SI_type_node, -- tree_cons (NULL_TREE, V8QI_type_node, -- tree_cons (NULL_TREE, V8QI_type_node, -- endlink))); -- tree v4hi_ftype_v4hi_di -- = build_function_type (V4HI_type_node, -- tree_cons (NULL_TREE, V4HI_type_node, -- tree_cons (NULL_TREE, -- long_long_integer_type_node, -- endlink))); -- tree v2si_ftype_v2si_di -- = build_function_type (V2SI_type_node, -- tree_cons (NULL_TREE, V2SI_type_node, -- tree_cons (NULL_TREE, -- long_long_integer_type_node, -- endlink))); -- tree void_ftype_int_int -- = build_function_type (void_type_node, -- tree_cons (NULL_TREE, integer_type_node, -- tree_cons (NULL_TREE, integer_type_node, -- endlink))); -- tree di_ftype_void -- = build_function_type (long_long_unsigned_type_node, endlink); -- tree di_ftype_v8qi -- = build_function_type (long_long_integer_type_node, -- tree_cons (NULL_TREE, V8QI_type_node, -- endlink)); -- tree di_ftype_v4hi -- = build_function_type (long_long_integer_type_node, -- tree_cons (NULL_TREE, V4HI_type_node, -- endlink)); -- tree di_ftype_v2si -- = build_function_type (long_long_integer_type_node, -- tree_cons (NULL_TREE, V2SI_type_node, -- endlink)); -- tree v2si_ftype_v4hi -- = build_function_type (V2SI_type_node, -- tree_cons (NULL_TREE, V4HI_type_node, -- endlink)); -- tree v4hi_ftype_v8qi -- = build_function_type (V4HI_type_node, -- tree_cons (NULL_TREE, V8QI_type_node, -- endlink)); -- -- tree di_ftype_di_v4hi_v4hi -- = build_function_type (long_long_unsigned_type_node, -- tree_cons (NULL_TREE, -- long_long_unsigned_type_node, -- tree_cons (NULL_TREE, V4HI_type_node, -- tree_cons (NULL_TREE, -- V4HI_type_node, -- endlink)))); -- -- tree di_ftype_v4hi_v4hi -- = build_function_type (long_long_unsigned_type_node, -- tree_cons (NULL_TREE, V4HI_type_node, -- tree_cons (NULL_TREE, V4HI_type_node, -- endlink))); -+ tree intQI_pointer_node; -+ tree intHI_pointer_node; -+ tree intSI_pointer_node; -+ tree intDI_pointer_node; -+ tree float_pointer_node; - -- /* Normal vector binops. */ -- tree v8qi_ftype_v8qi_v8qi -- = build_function_type (V8QI_type_node, -- tree_cons (NULL_TREE, V8QI_type_node, -- tree_cons (NULL_TREE, V8QI_type_node, -- endlink))); -- tree v4hi_ftype_v4hi_v4hi -- = build_function_type (V4HI_type_node, -- tree_cons (NULL_TREE, V4HI_type_node, -- tree_cons (NULL_TREE, V4HI_type_node, -- endlink))); -- tree v2si_ftype_v2si_v2si -- = build_function_type (V2SI_type_node, -- tree_cons (NULL_TREE, V2SI_type_node, -- tree_cons (NULL_TREE, V2SI_type_node, -- endlink))); -- tree di_ftype_di_di -- = build_function_type (long_long_unsigned_type_node, -- tree_cons (NULL_TREE, long_long_unsigned_type_node, -- tree_cons (NULL_TREE, -- long_long_unsigned_type_node, -- endlink))); -+ tree const_intQI_node; -+ tree const_intHI_node; -+ tree const_intSI_node; -+ tree const_intDI_node; -+ tree const_float_node; - -- /* Add all builtins that are more or less simple operations on two -- operands. */ -- for (i = 0, d = bdesc_2arg; i < ARRAY_SIZE (bdesc_2arg); i++, d++) -- { -- /* Use one of the operands; the target can have a different mode for -- mask-generating compares. */ -- enum machine_mode mode; -- tree type; -+ tree const_intQI_pointer_node; -+ tree const_intHI_pointer_node; -+ tree const_intSI_pointer_node; -+ tree const_intDI_pointer_node; -+ tree const_float_pointer_node; - -- if (d->name == 0) -- continue; -+ tree V8QI_type_node; -+ tree V4HI_type_node; -+ tree V2SI_type_node; -+ tree V2SF_type_node; -+ tree V16QI_type_node; -+ tree V8HI_type_node; -+ tree V4SI_type_node; -+ tree V4SF_type_node; -+ tree V2DI_type_node; - -- mode = insn_data[d->icode].operand[1].mode; -+ tree intUQI_type_node; -+ tree intUHI_type_node; -+ tree intUSI_type_node; -+ tree intUDI_type_node; - -- switch (mode) -- { -- case V8QImode: -- type = v8qi_ftype_v8qi_v8qi; -- break; -- case V4HImode: -- type = v4hi_ftype_v4hi_v4hi; -- break; -- case V2SImode: -- type = v2si_ftype_v2si_v2si; -- break; -- case DImode: -- type = di_ftype_di_di; -- break; -+ tree intEI_type_node; -+ tree intOI_type_node; -+ tree intCI_type_node; -+ tree intXI_type_node; - -- default: -- gcc_unreachable (); -- } -+ tree V8QI_pointer_node; -+ tree V4HI_pointer_node; -+ tree V2SI_pointer_node; -+ tree V2SF_pointer_node; -+ tree V16QI_pointer_node; -+ tree V8HI_pointer_node; -+ tree V4SI_pointer_node; -+ tree V4SF_pointer_node; -+ tree V2DI_pointer_node; - -- def_mbuiltin (d->mask, d->name, type, d->code); -- } -+ tree void_ftype_pv8qi_v8qi_v8qi; -+ tree void_ftype_pv4hi_v4hi_v4hi; -+ tree void_ftype_pv2si_v2si_v2si; -+ tree void_ftype_pv2sf_v2sf_v2sf; -+ tree void_ftype_pdi_di_di; -+ tree void_ftype_pv16qi_v16qi_v16qi; -+ tree void_ftype_pv8hi_v8hi_v8hi; -+ tree void_ftype_pv4si_v4si_v4si; -+ tree void_ftype_pv4sf_v4sf_v4sf; -+ tree void_ftype_pv2di_v2di_v2di; - -- /* Add the remaining MMX insns with somewhat more complicated types. */ -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wzero", di_ftype_void, ARM_BUILTIN_WZERO); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_setwcx", void_ftype_int_int, ARM_BUILTIN_SETWCX); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_getwcx", int_ftype_int, ARM_BUILTIN_GETWCX); -- -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wsllh", v4hi_ftype_v4hi_di, ARM_BUILTIN_WSLLH); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wsllw", v2si_ftype_v2si_di, ARM_BUILTIN_WSLLW); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wslld", di_ftype_di_di, ARM_BUILTIN_WSLLD); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wsllhi", v4hi_ftype_v4hi_int, ARM_BUILTIN_WSLLHI); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wsllwi", v2si_ftype_v2si_int, ARM_BUILTIN_WSLLWI); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wslldi", di_ftype_di_int, ARM_BUILTIN_WSLLDI); -- -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wsrlh", v4hi_ftype_v4hi_di, ARM_BUILTIN_WSRLH); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wsrlw", v2si_ftype_v2si_di, ARM_BUILTIN_WSRLW); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wsrld", di_ftype_di_di, ARM_BUILTIN_WSRLD); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wsrlhi", v4hi_ftype_v4hi_int, ARM_BUILTIN_WSRLHI); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wsrlwi", v2si_ftype_v2si_int, ARM_BUILTIN_WSRLWI); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wsrldi", di_ftype_di_int, ARM_BUILTIN_WSRLDI); -- -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wsrah", v4hi_ftype_v4hi_di, ARM_BUILTIN_WSRAH); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wsraw", v2si_ftype_v2si_di, ARM_BUILTIN_WSRAW); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wsrad", di_ftype_di_di, ARM_BUILTIN_WSRAD); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wsrahi", v4hi_ftype_v4hi_int, ARM_BUILTIN_WSRAHI); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wsrawi", v2si_ftype_v2si_int, ARM_BUILTIN_WSRAWI); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wsradi", di_ftype_di_int, ARM_BUILTIN_WSRADI); -- -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wrorh", v4hi_ftype_v4hi_di, ARM_BUILTIN_WRORH); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wrorw", v2si_ftype_v2si_di, ARM_BUILTIN_WRORW); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wrord", di_ftype_di_di, ARM_BUILTIN_WRORD); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wrorhi", v4hi_ftype_v4hi_int, ARM_BUILTIN_WRORHI); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wrorwi", v2si_ftype_v2si_int, ARM_BUILTIN_WRORWI); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wrordi", di_ftype_di_int, ARM_BUILTIN_WRORDI); -- -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wshufh", v4hi_ftype_v4hi_int, ARM_BUILTIN_WSHUFH); -- -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wsadb", v2si_ftype_v8qi_v8qi, ARM_BUILTIN_WSADB); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wsadh", v2si_ftype_v4hi_v4hi, ARM_BUILTIN_WSADH); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wsadbz", v2si_ftype_v8qi_v8qi, ARM_BUILTIN_WSADBZ); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wsadhz", v2si_ftype_v4hi_v4hi, ARM_BUILTIN_WSADHZ); -- -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_textrmsb", int_ftype_v8qi_int, ARM_BUILTIN_TEXTRMSB); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_textrmsh", int_ftype_v4hi_int, ARM_BUILTIN_TEXTRMSH); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_textrmsw", int_ftype_v2si_int, ARM_BUILTIN_TEXTRMSW); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_textrmub", int_ftype_v8qi_int, ARM_BUILTIN_TEXTRMUB); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_textrmuh", int_ftype_v4hi_int, ARM_BUILTIN_TEXTRMUH); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_textrmuw", int_ftype_v2si_int, ARM_BUILTIN_TEXTRMUW); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_tinsrb", v8qi_ftype_v8qi_int_int, ARM_BUILTIN_TINSRB); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_tinsrh", v4hi_ftype_v4hi_int_int, ARM_BUILTIN_TINSRH); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_tinsrw", v2si_ftype_v2si_int_int, ARM_BUILTIN_TINSRW); -- -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_waccb", di_ftype_v8qi, ARM_BUILTIN_WACCB); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wacch", di_ftype_v4hi, ARM_BUILTIN_WACCH); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_waccw", di_ftype_v2si, ARM_BUILTIN_WACCW); -- -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_tmovmskb", int_ftype_v8qi, ARM_BUILTIN_TMOVMSKB); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_tmovmskh", int_ftype_v4hi, ARM_BUILTIN_TMOVMSKH); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_tmovmskw", int_ftype_v2si, ARM_BUILTIN_TMOVMSKW); -- -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wpackhss", v8qi_ftype_v4hi_v4hi, ARM_BUILTIN_WPACKHSS); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wpackhus", v8qi_ftype_v4hi_v4hi, ARM_BUILTIN_WPACKHUS); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wpackwus", v4hi_ftype_v2si_v2si, ARM_BUILTIN_WPACKWUS); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wpackwss", v4hi_ftype_v2si_v2si, ARM_BUILTIN_WPACKWSS); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wpackdus", v2si_ftype_di_di, ARM_BUILTIN_WPACKDUS); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wpackdss", v2si_ftype_di_di, ARM_BUILTIN_WPACKDSS); -- -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wunpckehub", v4hi_ftype_v8qi, ARM_BUILTIN_WUNPCKEHUB); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wunpckehuh", v2si_ftype_v4hi, ARM_BUILTIN_WUNPCKEHUH); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wunpckehuw", di_ftype_v2si, ARM_BUILTIN_WUNPCKEHUW); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wunpckehsb", v4hi_ftype_v8qi, ARM_BUILTIN_WUNPCKEHSB); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wunpckehsh", v2si_ftype_v4hi, ARM_BUILTIN_WUNPCKEHSH); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wunpckehsw", di_ftype_v2si, ARM_BUILTIN_WUNPCKEHSW); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wunpckelub", v4hi_ftype_v8qi, ARM_BUILTIN_WUNPCKELUB); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wunpckeluh", v2si_ftype_v4hi, ARM_BUILTIN_WUNPCKELUH); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wunpckeluw", di_ftype_v2si, ARM_BUILTIN_WUNPCKELUW); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wunpckelsb", v4hi_ftype_v8qi, ARM_BUILTIN_WUNPCKELSB); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wunpckelsh", v2si_ftype_v4hi, ARM_BUILTIN_WUNPCKELSH); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wunpckelsw", di_ftype_v2si, ARM_BUILTIN_WUNPCKELSW); -- -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wmacs", di_ftype_di_v4hi_v4hi, ARM_BUILTIN_WMACS); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wmacsz", di_ftype_v4hi_v4hi, ARM_BUILTIN_WMACSZ); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wmacu", di_ftype_di_v4hi_v4hi, ARM_BUILTIN_WMACU); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_wmacuz", di_ftype_v4hi_v4hi, ARM_BUILTIN_WMACUZ); -- -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_walign", v8qi_ftype_v8qi_v8qi_int, ARM_BUILTIN_WALIGN); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_tmia", di_ftype_di_int_int, ARM_BUILTIN_TMIA); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_tmiaph", di_ftype_di_int_int, ARM_BUILTIN_TMIAPH); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_tmiabb", di_ftype_di_int_int, ARM_BUILTIN_TMIABB); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_tmiabt", di_ftype_di_int_int, ARM_BUILTIN_TMIABT); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_tmiatb", di_ftype_di_int_int, ARM_BUILTIN_TMIATB); -- def_mbuiltin (FL_IWMMXT, "__builtin_arm_tmiatt", di_ftype_di_int_int, ARM_BUILTIN_TMIATT); --} -+ tree reinterp_ftype_dreg[5][5]; -+ tree reinterp_ftype_qreg[5][5]; -+ tree dreg_types[5], qreg_types[5]; - --static void --arm_init_tls_builtins (void) --{ -- tree ftype, decl; -+ /* Create distinguished type nodes for NEON vector element types, -+ and pointers to values of such types, so we can detect them later. */ -+ neon_intQI_type_node = make_signed_type (GET_MODE_PRECISION (QImode)); -+ neon_intHI_type_node = make_signed_type (GET_MODE_PRECISION (HImode)); -+ neon_polyQI_type_node = make_signed_type (GET_MODE_PRECISION (QImode)); -+ neon_polyHI_type_node = make_signed_type (GET_MODE_PRECISION (HImode)); -+ neon_intSI_type_node = make_signed_type (GET_MODE_PRECISION (SImode)); -+ neon_intDI_type_node = make_signed_type (GET_MODE_PRECISION (DImode)); -+ neon_float_type_node = make_node (REAL_TYPE); -+ TYPE_PRECISION (neon_float_type_node) = FLOAT_TYPE_SIZE; -+ layout_type (neon_float_type_node); - -- ftype = build_function_type (ptr_type_node, void_list_node); -- decl = add_builtin_function ("__builtin_thread_pointer", ftype, -- ARM_BUILTIN_THREAD_POINTER, BUILT_IN_MD, -- NULL, NULL_TREE); -- TREE_NOTHROW (decl) = 1; -- TREE_READONLY (decl) = 1; --} -+ /* Define typedefs which exactly correspond to the modes we are basing vector -+ types on. If you change these names you'll need to change -+ the table used by arm_mangle_type too. */ -+ (*lang_hooks.types.register_builtin_type) (neon_intQI_type_node, -+ "__builtin_neon_qi"); -+ (*lang_hooks.types.register_builtin_type) (neon_intHI_type_node, -+ "__builtin_neon_hi"); -+ (*lang_hooks.types.register_builtin_type) (neon_intSI_type_node, -+ "__builtin_neon_si"); -+ (*lang_hooks.types.register_builtin_type) (neon_float_type_node, -+ "__builtin_neon_sf"); -+ (*lang_hooks.types.register_builtin_type) (neon_intDI_type_node, -+ "__builtin_neon_di"); -+ (*lang_hooks.types.register_builtin_type) (neon_polyQI_type_node, -+ "__builtin_neon_poly8"); -+ (*lang_hooks.types.register_builtin_type) (neon_polyHI_type_node, -+ "__builtin_neon_poly16"); - --enum neon_builtin_type_bits { -- T_V8QI = 0x0001, -- T_V4HI = 0x0002, -- T_V2SI = 0x0004, -- T_V2SF = 0x0008, -- T_DI = 0x0010, -- T_V16QI = 0x0020, -- T_V8HI = 0x0040, -- T_V4SI = 0x0080, -- T_V4SF = 0x0100, -- T_V2DI = 0x0200, -- T_TI = 0x0400, -- T_EI = 0x0800, -- T_OI = 0x1000 --}; -- --#define v8qi_UP T_V8QI --#define v4hi_UP T_V4HI --#define v2si_UP T_V2SI --#define v2sf_UP T_V2SF --#define di_UP T_DI --#define v16qi_UP T_V16QI --#define v8hi_UP T_V8HI --#define v4si_UP T_V4SI --#define v4sf_UP T_V4SF --#define v2di_UP T_V2DI --#define ti_UP T_TI --#define ei_UP T_EI --#define oi_UP T_OI -- --#define UP(X) X##_UP -- --#define T_MAX 13 -- --typedef enum { -- NEON_BINOP, -- NEON_TERNOP, -- NEON_UNOP, -- NEON_GETLANE, -- NEON_SETLANE, -- NEON_CREATE, -- NEON_DUP, -- NEON_DUPLANE, -- NEON_COMBINE, -- NEON_SPLIT, -- NEON_LANEMUL, -- NEON_LANEMULL, -- NEON_LANEMULH, -- NEON_LANEMAC, -- NEON_SCALARMUL, -- NEON_SCALARMULL, -- NEON_SCALARMULH, -- NEON_SCALARMAC, -- NEON_CONVERT, -- NEON_FIXCONV, -- NEON_SELECT, -- NEON_RESULTPAIR, -- NEON_REINTERP, -- NEON_VTBL, -- NEON_VTBX, -- NEON_LOAD1, -- NEON_LOAD1LANE, -- NEON_STORE1, -- NEON_STORE1LANE, -- NEON_LOADSTRUCT, -- NEON_LOADSTRUCTLANE, -- NEON_STORESTRUCT, -- NEON_STORESTRUCTLANE, -- NEON_LOGICBINOP, -- NEON_SHIFTINSERT, -- NEON_SHIFTIMM, -- NEON_SHIFTACC --} neon_itype; -- --typedef struct { -- const char *name; -- const neon_itype itype; -- const int bits; -- const enum insn_code codes[T_MAX]; -- const unsigned int num_vars; -- unsigned int base_fcode; --} neon_builtin_datum; -- --#define CF(N,X) CODE_FOR_neon_##N##X -- --#define VAR1(T, N, A) \ -- #N, NEON_##T, UP (A), { CF (N, A) }, 1, 0 --#define VAR2(T, N, A, B) \ -- #N, NEON_##T, UP (A) | UP (B), { CF (N, A), CF (N, B) }, 2, 0 --#define VAR3(T, N, A, B, C) \ -- #N, NEON_##T, UP (A) | UP (B) | UP (C), \ -- { CF (N, A), CF (N, B), CF (N, C) }, 3, 0 --#define VAR4(T, N, A, B, C, D) \ -- #N, NEON_##T, UP (A) | UP (B) | UP (C) | UP (D), \ -- { CF (N, A), CF (N, B), CF (N, C), CF (N, D) }, 4, 0 --#define VAR5(T, N, A, B, C, D, E) \ -- #N, NEON_##T, UP (A) | UP (B) | UP (C) | UP (D) | UP (E), \ -- { CF (N, A), CF (N, B), CF (N, C), CF (N, D), CF (N, E) }, 5, 0 --#define VAR6(T, N, A, B, C, D, E, F) \ -- #N, NEON_##T, UP (A) | UP (B) | UP (C) | UP (D) | UP (E) | UP (F), \ -- { CF (N, A), CF (N, B), CF (N, C), CF (N, D), CF (N, E), CF (N, F) }, 6, 0 --#define VAR7(T, N, A, B, C, D, E, F, G) \ -- #N, NEON_##T, UP (A) | UP (B) | UP (C) | UP (D) | UP (E) | UP (F) | UP (G), \ -- { CF (N, A), CF (N, B), CF (N, C), CF (N, D), CF (N, E), CF (N, F), \ -- CF (N, G) }, 7, 0 --#define VAR8(T, N, A, B, C, D, E, F, G, H) \ -- #N, NEON_##T, UP (A) | UP (B) | UP (C) | UP (D) | UP (E) | UP (F) | UP (G) \ -- | UP (H), \ -- { CF (N, A), CF (N, B), CF (N, C), CF (N, D), CF (N, E), CF (N, F), \ -- CF (N, G), CF (N, H) }, 8, 0 --#define VAR9(T, N, A, B, C, D, E, F, G, H, I) \ -- #N, NEON_##T, UP (A) | UP (B) | UP (C) | UP (D) | UP (E) | UP (F) | UP (G) \ -- | UP (H) | UP (I), \ -- { CF (N, A), CF (N, B), CF (N, C), CF (N, D), CF (N, E), CF (N, F), \ -- CF (N, G), CF (N, H), CF (N, I) }, 9, 0 --#define VAR10(T, N, A, B, C, D, E, F, G, H, I, J) \ -- #N, NEON_##T, UP (A) | UP (B) | UP (C) | UP (D) | UP (E) | UP (F) | UP (G) \ -- | UP (H) | UP (I) | UP (J), \ -- { CF (N, A), CF (N, B), CF (N, C), CF (N, D), CF (N, E), CF (N, F), \ -- CF (N, G), CF (N, H), CF (N, I), CF (N, J) }, 10, 0 -- --/* The mode entries in the following table correspond to the "key" type of the -- instruction variant, i.e. equivalent to that which would be specified after -- the assembler mnemonic, which usually refers to the last vector operand. -- (Signed/unsigned/polynomial types are not differentiated between though, and -- are all mapped onto the same mode for a given element size.) The modes -- listed per instruction should be the same as those defined for that -- instruction's pattern in neon.md. -- WARNING: Variants should be listed in the same increasing order as -- neon_builtin_type_bits. */ -- --static neon_builtin_datum neon_builtin_data[] = --{ -- { VAR10 (BINOP, vadd, -- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR3 (BINOP, vaddl, v8qi, v4hi, v2si) }, -- { VAR3 (BINOP, vaddw, v8qi, v4hi, v2si) }, -- { VAR6 (BINOP, vhadd, v8qi, v4hi, v2si, v16qi, v8hi, v4si) }, -- { VAR8 (BINOP, vqadd, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, -- { VAR3 (BINOP, vaddhn, v8hi, v4si, v2di) }, -- { VAR8 (BINOP, vmul, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf) }, -- { VAR8 (TERNOP, vmla, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf) }, -- { VAR3 (TERNOP, vmlal, v8qi, v4hi, v2si) }, -- { VAR8 (TERNOP, vmls, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf) }, -- { VAR3 (TERNOP, vmlsl, v8qi, v4hi, v2si) }, -- { VAR4 (BINOP, vqdmulh, v4hi, v2si, v8hi, v4si) }, -- { VAR2 (TERNOP, vqdmlal, v4hi, v2si) }, -- { VAR2 (TERNOP, vqdmlsl, v4hi, v2si) }, -- { VAR3 (BINOP, vmull, v8qi, v4hi, v2si) }, -- { VAR2 (SCALARMULL, vmull_n, v4hi, v2si) }, -- { VAR2 (LANEMULL, vmull_lane, v4hi, v2si) }, -- { VAR2 (SCALARMULL, vqdmull_n, v4hi, v2si) }, -- { VAR2 (LANEMULL, vqdmull_lane, v4hi, v2si) }, -- { VAR4 (SCALARMULH, vqdmulh_n, v4hi, v2si, v8hi, v4si) }, -- { VAR4 (LANEMULH, vqdmulh_lane, v4hi, v2si, v8hi, v4si) }, -- { VAR2 (BINOP, vqdmull, v4hi, v2si) }, -- { VAR8 (BINOP, vshl, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, -- { VAR8 (BINOP, vqshl, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, -- { VAR8 (SHIFTIMM, vshr_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, -- { VAR3 (SHIFTIMM, vshrn_n, v8hi, v4si, v2di) }, -- { VAR3 (SHIFTIMM, vqshrn_n, v8hi, v4si, v2di) }, -- { VAR3 (SHIFTIMM, vqshrun_n, v8hi, v4si, v2di) }, -- { VAR8 (SHIFTIMM, vshl_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, -- { VAR8 (SHIFTIMM, vqshl_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, -- { VAR8 (SHIFTIMM, vqshlu_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, -- { VAR3 (SHIFTIMM, vshll_n, v8qi, v4hi, v2si) }, -- { VAR8 (SHIFTACC, vsra_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, -- { VAR10 (BINOP, vsub, -- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR3 (BINOP, vsubl, v8qi, v4hi, v2si) }, -- { VAR3 (BINOP, vsubw, v8qi, v4hi, v2si) }, -- { VAR8 (BINOP, vqsub, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, -- { VAR6 (BINOP, vhsub, v8qi, v4hi, v2si, v16qi, v8hi, v4si) }, -- { VAR3 (BINOP, vsubhn, v8hi, v4si, v2di) }, -- { VAR8 (BINOP, vceq, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf) }, -- { VAR8 (BINOP, vcge, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf) }, -- { VAR8 (BINOP, vcgt, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf) }, -- { VAR2 (BINOP, vcage, v2sf, v4sf) }, -- { VAR2 (BINOP, vcagt, v2sf, v4sf) }, -- { VAR6 (BINOP, vtst, v8qi, v4hi, v2si, v16qi, v8hi, v4si) }, -- { VAR8 (BINOP, vabd, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf) }, -- { VAR3 (BINOP, vabdl, v8qi, v4hi, v2si) }, -- { VAR6 (TERNOP, vaba, v8qi, v4hi, v2si, v16qi, v8hi, v4si) }, -- { VAR3 (TERNOP, vabal, v8qi, v4hi, v2si) }, -- { VAR8 (BINOP, vmax, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf) }, -- { VAR8 (BINOP, vmin, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf) }, -- { VAR4 (BINOP, vpadd, v8qi, v4hi, v2si, v2sf) }, -- { VAR6 (UNOP, vpaddl, v8qi, v4hi, v2si, v16qi, v8hi, v4si) }, -- { VAR6 (BINOP, vpadal, v8qi, v4hi, v2si, v16qi, v8hi, v4si) }, -- { VAR4 (BINOP, vpmax, v8qi, v4hi, v2si, v2sf) }, -- { VAR4 (BINOP, vpmin, v8qi, v4hi, v2si, v2sf) }, -- { VAR2 (BINOP, vrecps, v2sf, v4sf) }, -- { VAR2 (BINOP, vrsqrts, v2sf, v4sf) }, -- { VAR8 (SHIFTINSERT, vsri_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, -- { VAR8 (SHIFTINSERT, vsli_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di) }, -- { VAR8 (UNOP, vabs, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf) }, -- { VAR6 (UNOP, vqabs, v8qi, v4hi, v2si, v16qi, v8hi, v4si) }, -- { VAR8 (UNOP, vneg, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf) }, -- { VAR6 (UNOP, vqneg, v8qi, v4hi, v2si, v16qi, v8hi, v4si) }, -- { VAR6 (UNOP, vcls, v8qi, v4hi, v2si, v16qi, v8hi, v4si) }, -- { VAR6 (UNOP, vclz, v8qi, v4hi, v2si, v16qi, v8hi, v4si) }, -- { VAR2 (UNOP, vcnt, v8qi, v16qi) }, -- { VAR4 (UNOP, vrecpe, v2si, v2sf, v4si, v4sf) }, -- { VAR4 (UNOP, vrsqrte, v2si, v2sf, v4si, v4sf) }, -- { VAR6 (UNOP, vmvn, v8qi, v4hi, v2si, v16qi, v8hi, v4si) }, -- /* FIXME: vget_lane supports more variants than this! */ -- { VAR10 (GETLANE, vget_lane, -- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR10 (SETLANE, vset_lane, -- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR5 (CREATE, vcreate, v8qi, v4hi, v2si, v2sf, di) }, -- { VAR10 (DUP, vdup_n, -- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR10 (DUPLANE, vdup_lane, -- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR5 (COMBINE, vcombine, v8qi, v4hi, v2si, v2sf, di) }, -- { VAR5 (SPLIT, vget_high, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR5 (SPLIT, vget_low, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR3 (UNOP, vmovn, v8hi, v4si, v2di) }, -- { VAR3 (UNOP, vqmovn, v8hi, v4si, v2di) }, -- { VAR3 (UNOP, vqmovun, v8hi, v4si, v2di) }, -- { VAR3 (UNOP, vmovl, v8qi, v4hi, v2si) }, -- { VAR6 (LANEMUL, vmul_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf) }, -- { VAR6 (LANEMAC, vmla_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf) }, -- { VAR2 (LANEMAC, vmlal_lane, v4hi, v2si) }, -- { VAR2 (LANEMAC, vqdmlal_lane, v4hi, v2si) }, -- { VAR6 (LANEMAC, vmls_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf) }, -- { VAR2 (LANEMAC, vmlsl_lane, v4hi, v2si) }, -- { VAR2 (LANEMAC, vqdmlsl_lane, v4hi, v2si) }, -- { VAR6 (SCALARMUL, vmul_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf) }, -- { VAR6 (SCALARMAC, vmla_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf) }, -- { VAR2 (SCALARMAC, vmlal_n, v4hi, v2si) }, -- { VAR2 (SCALARMAC, vqdmlal_n, v4hi, v2si) }, -- { VAR6 (SCALARMAC, vmls_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf) }, -- { VAR2 (SCALARMAC, vmlsl_n, v4hi, v2si) }, -- { VAR2 (SCALARMAC, vqdmlsl_n, v4hi, v2si) }, -- { VAR10 (BINOP, vext, -- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR8 (UNOP, vrev64, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf) }, -- { VAR4 (UNOP, vrev32, v8qi, v4hi, v16qi, v8hi) }, -- { VAR2 (UNOP, vrev16, v8qi, v16qi) }, -- { VAR4 (CONVERT, vcvt, v2si, v2sf, v4si, v4sf) }, -- { VAR4 (FIXCONV, vcvt_n, v2si, v2sf, v4si, v4sf) }, -- { VAR10 (SELECT, vbsl, -- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR1 (VTBL, vtbl1, v8qi) }, -- { VAR1 (VTBL, vtbl2, v8qi) }, -- { VAR1 (VTBL, vtbl3, v8qi) }, -- { VAR1 (VTBL, vtbl4, v8qi) }, -- { VAR1 (VTBX, vtbx1, v8qi) }, -- { VAR1 (VTBX, vtbx2, v8qi) }, -- { VAR1 (VTBX, vtbx3, v8qi) }, -- { VAR1 (VTBX, vtbx4, v8qi) }, -- { VAR8 (RESULTPAIR, vtrn, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf) }, -- { VAR8 (RESULTPAIR, vzip, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf) }, -- { VAR8 (RESULTPAIR, vuzp, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf) }, -- { VAR5 (REINTERP, vreinterpretv8qi, v8qi, v4hi, v2si, v2sf, di) }, -- { VAR5 (REINTERP, vreinterpretv4hi, v8qi, v4hi, v2si, v2sf, di) }, -- { VAR5 (REINTERP, vreinterpretv2si, v8qi, v4hi, v2si, v2sf, di) }, -- { VAR5 (REINTERP, vreinterpretv2sf, v8qi, v4hi, v2si, v2sf, di) }, -- { VAR5 (REINTERP, vreinterpretdi, v8qi, v4hi, v2si, v2sf, di) }, -- { VAR5 (REINTERP, vreinterpretv16qi, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR5 (REINTERP, vreinterpretv8hi, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR5 (REINTERP, vreinterpretv4si, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR5 (REINTERP, vreinterpretv4sf, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR5 (REINTERP, vreinterpretv2di, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR10 (LOAD1, vld1, -- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR10 (LOAD1LANE, vld1_lane, -- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR10 (LOAD1, vld1_dup, -- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR10 (STORE1, vst1, -- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR10 (STORE1LANE, vst1_lane, -- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR9 (LOADSTRUCT, -- vld2, v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf) }, -- { VAR7 (LOADSTRUCTLANE, vld2_lane, -- v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf) }, -- { VAR5 (LOADSTRUCT, vld2_dup, v8qi, v4hi, v2si, v2sf, di) }, -- { VAR9 (STORESTRUCT, vst2, -- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf) }, -- { VAR7 (STORESTRUCTLANE, vst2_lane, -- v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf) }, -- { VAR9 (LOADSTRUCT, -- vld3, v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf) }, -- { VAR7 (LOADSTRUCTLANE, vld3_lane, -- v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf) }, -- { VAR5 (LOADSTRUCT, vld3_dup, v8qi, v4hi, v2si, v2sf, di) }, -- { VAR9 (STORESTRUCT, vst3, -- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf) }, -- { VAR7 (STORESTRUCTLANE, vst3_lane, -- v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf) }, -- { VAR9 (LOADSTRUCT, vld4, -- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf) }, -- { VAR7 (LOADSTRUCTLANE, vld4_lane, -- v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf) }, -- { VAR5 (LOADSTRUCT, vld4_dup, v8qi, v4hi, v2si, v2sf, di) }, -- { VAR9 (STORESTRUCT, vst4, -- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf) }, -- { VAR7 (STORESTRUCTLANE, vst4_lane, -- v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf) }, -- { VAR10 (LOGICBINOP, vand, -- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR10 (LOGICBINOP, vorr, -- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR10 (BINOP, veor, -- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR10 (LOGICBINOP, vbic, -- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) }, -- { VAR10 (LOGICBINOP, vorn, -- v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di) } --}; -- --#undef CF --#undef VAR1 --#undef VAR2 --#undef VAR3 --#undef VAR4 --#undef VAR5 --#undef VAR6 --#undef VAR7 --#undef VAR8 --#undef VAR9 --#undef VAR10 -- --static void --arm_init_neon_builtins (void) --{ -- unsigned int i, fcode = ARM_BUILTIN_NEON_BASE; -- -- tree neon_intQI_type_node; -- tree neon_intHI_type_node; -- tree neon_polyQI_type_node; -- tree neon_polyHI_type_node; -- tree neon_intSI_type_node; -- tree neon_intDI_type_node; -- tree neon_float_type_node; -- -- tree intQI_pointer_node; -- tree intHI_pointer_node; -- tree intSI_pointer_node; -- tree intDI_pointer_node; -- tree float_pointer_node; -- -- tree const_intQI_node; -- tree const_intHI_node; -- tree const_intSI_node; -- tree const_intDI_node; -- tree const_float_node; -- -- tree const_intQI_pointer_node; -- tree const_intHI_pointer_node; -- tree const_intSI_pointer_node; -- tree const_intDI_pointer_node; -- tree const_float_pointer_node; -- -- tree V8QI_type_node; -- tree V4HI_type_node; -- tree V2SI_type_node; -- tree V2SF_type_node; -- tree V16QI_type_node; -- tree V8HI_type_node; -- tree V4SI_type_node; -- tree V4SF_type_node; -- tree V2DI_type_node; -- -- tree intUQI_type_node; -- tree intUHI_type_node; -- tree intUSI_type_node; -- tree intUDI_type_node; -- -- tree intEI_type_node; -- tree intOI_type_node; -- tree intCI_type_node; -- tree intXI_type_node; -- -- tree V8QI_pointer_node; -- tree V4HI_pointer_node; -- tree V2SI_pointer_node; -- tree V2SF_pointer_node; -- tree V16QI_pointer_node; -- tree V8HI_pointer_node; -- tree V4SI_pointer_node; -- tree V4SF_pointer_node; -- tree V2DI_pointer_node; -- -- tree void_ftype_pv8qi_v8qi_v8qi; -- tree void_ftype_pv4hi_v4hi_v4hi; -- tree void_ftype_pv2si_v2si_v2si; -- tree void_ftype_pv2sf_v2sf_v2sf; -- tree void_ftype_pdi_di_di; -- tree void_ftype_pv16qi_v16qi_v16qi; -- tree void_ftype_pv8hi_v8hi_v8hi; -- tree void_ftype_pv4si_v4si_v4si; -- tree void_ftype_pv4sf_v4sf_v4sf; -- tree void_ftype_pv2di_v2di_v2di; -- -- tree reinterp_ftype_dreg[5][5]; -- tree reinterp_ftype_qreg[5][5]; -- tree dreg_types[5], qreg_types[5]; -- -- /* Create distinguished type nodes for NEON vector element types, -- and pointers to values of such types, so we can detect them later. */ -- neon_intQI_type_node = make_signed_type (GET_MODE_PRECISION (QImode)); -- neon_intHI_type_node = make_signed_type (GET_MODE_PRECISION (HImode)); -- neon_polyQI_type_node = make_signed_type (GET_MODE_PRECISION (QImode)); -- neon_polyHI_type_node = make_signed_type (GET_MODE_PRECISION (HImode)); -- neon_intSI_type_node = make_signed_type (GET_MODE_PRECISION (SImode)); -- neon_intDI_type_node = make_signed_type (GET_MODE_PRECISION (DImode)); -- neon_float_type_node = make_node (REAL_TYPE); -- TYPE_PRECISION (neon_float_type_node) = FLOAT_TYPE_SIZE; -- layout_type (neon_float_type_node); -- -- /* Define typedefs which exactly correspond to the modes we are basing vector -- types on. If you change these names you'll need to change -- the table used by arm_mangle_type too. */ -- (*lang_hooks.types.register_builtin_type) (neon_intQI_type_node, -- "__builtin_neon_qi"); -- (*lang_hooks.types.register_builtin_type) (neon_intHI_type_node, -- "__builtin_neon_hi"); -- (*lang_hooks.types.register_builtin_type) (neon_intSI_type_node, -- "__builtin_neon_si"); -- (*lang_hooks.types.register_builtin_type) (neon_float_type_node, -- "__builtin_neon_sf"); -- (*lang_hooks.types.register_builtin_type) (neon_intDI_type_node, -- "__builtin_neon_di"); -- (*lang_hooks.types.register_builtin_type) (neon_polyQI_type_node, -- "__builtin_neon_poly8"); -- (*lang_hooks.types.register_builtin_type) (neon_polyHI_type_node, -- "__builtin_neon_poly16"); -- -- intQI_pointer_node = build_pointer_type (neon_intQI_type_node); -- intHI_pointer_node = build_pointer_type (neon_intHI_type_node); -- intSI_pointer_node = build_pointer_type (neon_intSI_type_node); -- intDI_pointer_node = build_pointer_type (neon_intDI_type_node); -- float_pointer_node = build_pointer_type (neon_float_type_node); -+ intQI_pointer_node = build_pointer_type (neon_intQI_type_node); -+ intHI_pointer_node = build_pointer_type (neon_intHI_type_node); -+ intSI_pointer_node = build_pointer_type (neon_intSI_type_node); -+ intDI_pointer_node = build_pointer_type (neon_intDI_type_node); -+ float_pointer_node = build_pointer_type (neon_float_type_node); - - /* Next create constant-qualified versions of the above types. */ - const_intQI_node = build_qualified_type (neon_intQI_type_node, -@@ -18843,252 +19382,740 @@ - } - } - -- for (i = 0; i < ARRAY_SIZE (neon_builtin_data); i++) -+ for (i = 0, fcode = ARM_BUILTIN_NEON_BASE; -+ i < ARRAY_SIZE (neon_builtin_data); -+ i++, fcode++) - { - neon_builtin_datum *d = &neon_builtin_data[i]; -- unsigned int j, codeidx = 0; - -- d->base_fcode = fcode; -- -- for (j = 0; j < T_MAX; j++) -- { -- const char* const modenames[] = { -- "v8qi", "v4hi", "v2si", "v2sf", "di", -- "v16qi", "v8hi", "v4si", "v4sf", "v2di" -- }; -- char namebuf[60]; -- tree ftype = NULL; -- enum insn_code icode; -- int is_load = 0, is_store = 0; -+ const char* const modenames[] = { -+ "v8qi", "v4hi", "v2si", "v2sf", "di", -+ "v16qi", "v8hi", "v4si", "v4sf", "v2di", -+ "ti", "ei", "oi" -+ }; -+ char namebuf[60]; -+ tree ftype = NULL; -+ int is_load = 0, is_store = 0; -+ -+ gcc_assert (ARRAY_SIZE (modenames) == T_MAX); -+ -+ d->fcode = fcode; -+ -+ switch (d->itype) -+ { -+ case NEON_LOAD1: -+ case NEON_LOAD1LANE: -+ case NEON_LOADSTRUCT: -+ case NEON_LOADSTRUCTLANE: -+ is_load = 1; -+ /* Fall through. */ -+ case NEON_STORE1: -+ case NEON_STORE1LANE: -+ case NEON_STORESTRUCT: -+ case NEON_STORESTRUCTLANE: -+ if (!is_load) -+ is_store = 1; -+ /* Fall through. */ -+ case NEON_UNOP: -+ case NEON_BINOP: -+ case NEON_LOGICBINOP: -+ case NEON_SHIFTINSERT: -+ case NEON_TERNOP: -+ case NEON_GETLANE: -+ case NEON_SETLANE: -+ case NEON_CREATE: -+ case NEON_DUP: -+ case NEON_DUPLANE: -+ case NEON_SHIFTIMM: -+ case NEON_SHIFTACC: -+ case NEON_COMBINE: -+ case NEON_SPLIT: -+ case NEON_CONVERT: -+ case NEON_FIXCONV: -+ case NEON_LANEMUL: -+ case NEON_LANEMULL: -+ case NEON_LANEMULH: -+ case NEON_LANEMAC: -+ case NEON_SCALARMUL: -+ case NEON_SCALARMULL: -+ case NEON_SCALARMULH: -+ case NEON_SCALARMAC: -+ case NEON_SELECT: -+ case NEON_VTBL: -+ case NEON_VTBX: -+ { -+ int k; -+ tree return_type = void_type_node, args = void_list_node; - -- if ((d->bits & (1 << j)) == 0) -- continue; -+ /* Build a function type directly from the insn_data for -+ this builtin. The build_function_type() function takes -+ care of removing duplicates for us. */ -+ for (k = insn_data[d->code].n_operands - 1; k >= 0; k--) -+ { -+ tree eltype; - -- icode = d->codes[codeidx++]; -+ if (is_load && k == 1) -+ { -+ /* Neon load patterns always have the memory -+ operand in the operand 1 position. */ -+ gcc_assert (insn_data[d->code].operand[k].predicate -+ == neon_struct_operand); - -- switch (d->itype) -- { -- case NEON_LOAD1: -- case NEON_LOAD1LANE: -- case NEON_LOADSTRUCT: -- case NEON_LOADSTRUCTLANE: -- is_load = 1; -- /* Fall through. */ -- case NEON_STORE1: -- case NEON_STORE1LANE: -- case NEON_STORESTRUCT: -- case NEON_STORESTRUCTLANE: -- if (!is_load) -- is_store = 1; -- /* Fall through. */ -- case NEON_UNOP: -- case NEON_BINOP: -- case NEON_LOGICBINOP: -- case NEON_SHIFTINSERT: -- case NEON_TERNOP: -- case NEON_GETLANE: -- case NEON_SETLANE: -- case NEON_CREATE: -- case NEON_DUP: -- case NEON_DUPLANE: -- case NEON_SHIFTIMM: -- case NEON_SHIFTACC: -- case NEON_COMBINE: -- case NEON_SPLIT: -- case NEON_CONVERT: -- case NEON_FIXCONV: -- case NEON_LANEMUL: -- case NEON_LANEMULL: -- case NEON_LANEMULH: -- case NEON_LANEMAC: -- case NEON_SCALARMUL: -- case NEON_SCALARMULL: -- case NEON_SCALARMULH: -- case NEON_SCALARMAC: -- case NEON_SELECT: -- case NEON_VTBL: -- case NEON_VTBX: -- { -- int k; -- tree return_type = void_type_node, args = void_list_node; -+ switch (d->mode) -+ { -+ case T_V8QI: -+ case T_V16QI: -+ eltype = const_intQI_pointer_node; -+ break; -+ -+ case T_V4HI: -+ case T_V8HI: -+ eltype = const_intHI_pointer_node; -+ break; -+ -+ case T_V2SI: -+ case T_V4SI: -+ eltype = const_intSI_pointer_node; -+ break; -+ -+ case T_V2SF: -+ case T_V4SF: -+ eltype = const_float_pointer_node; -+ break; -+ -+ case T_DI: -+ case T_V2DI: -+ eltype = const_intDI_pointer_node; -+ break; - -- /* Build a function type directly from the insn_data for this -- builtin. The build_function_type() function takes care of -- removing duplicates for us. */ -- for (k = insn_data[icode].n_operands - 1; k >= 0; k--) -+ default: gcc_unreachable (); -+ } -+ } -+ else if (is_store && k == 0) - { -- tree eltype; -+ /* Similarly, Neon store patterns use operand 0 as -+ the memory location to store to. */ -+ gcc_assert (insn_data[d->code].operand[k].predicate -+ == neon_struct_operand); - -- if (is_load && k == 1) -+ switch (d->mode) - { -- /* Neon load patterns always have the memory operand -- (a SImode pointer) in the operand 1 position. We -- want a const pointer to the element type in that -- position. */ -- gcc_assert (insn_data[icode].operand[k].mode == SImode); -+ case T_V8QI: -+ case T_V16QI: -+ eltype = intQI_pointer_node; -+ break; -+ -+ case T_V4HI: -+ case T_V8HI: -+ eltype = intHI_pointer_node; -+ break; -+ -+ case T_V2SI: -+ case T_V4SI: -+ eltype = intSI_pointer_node; -+ break; -+ -+ case T_V2SF: -+ case T_V4SF: -+ eltype = float_pointer_node; -+ break; -+ -+ case T_DI: -+ case T_V2DI: -+ eltype = intDI_pointer_node; -+ break; - -- switch (1 << j) -- { -- case T_V8QI: -- case T_V16QI: -- eltype = const_intQI_pointer_node; -- break; -+ default: gcc_unreachable (); -+ } -+ } -+ else -+ { -+ switch (insn_data[d->code].operand[k].mode) -+ { -+ case VOIDmode: eltype = void_type_node; break; -+ /* Scalars. */ -+ case QImode: eltype = neon_intQI_type_node; break; -+ case HImode: eltype = neon_intHI_type_node; break; -+ case SImode: eltype = neon_intSI_type_node; break; -+ case SFmode: eltype = neon_float_type_node; break; -+ case DImode: eltype = neon_intDI_type_node; break; -+ case TImode: eltype = intTI_type_node; break; -+ case EImode: eltype = intEI_type_node; break; -+ case OImode: eltype = intOI_type_node; break; -+ case CImode: eltype = intCI_type_node; break; -+ case XImode: eltype = intXI_type_node; break; -+ /* 64-bit vectors. */ -+ case V8QImode: eltype = V8QI_type_node; break; -+ case V4HImode: eltype = V4HI_type_node; break; -+ case V2SImode: eltype = V2SI_type_node; break; -+ case V2SFmode: eltype = V2SF_type_node; break; -+ /* 128-bit vectors. */ -+ case V16QImode: eltype = V16QI_type_node; break; -+ case V8HImode: eltype = V8HI_type_node; break; -+ case V4SImode: eltype = V4SI_type_node; break; -+ case V4SFmode: eltype = V4SF_type_node; break; -+ case V2DImode: eltype = V2DI_type_node; break; -+ default: gcc_unreachable (); -+ } -+ } - -- case T_V4HI: -- case T_V8HI: -- eltype = const_intHI_pointer_node; -- break; -+ if (k == 0 && !is_store) -+ return_type = eltype; -+ else -+ args = tree_cons (NULL_TREE, eltype, args); -+ } - -- case T_V2SI: -- case T_V4SI: -- eltype = const_intSI_pointer_node; -- break; -+ ftype = build_function_type (return_type, args); -+ } -+ break; - -- case T_V2SF: -- case T_V4SF: -- eltype = const_float_pointer_node; -- break; -+ case NEON_RESULTPAIR: -+ { -+ switch (insn_data[d->code].operand[1].mode) -+ { -+ case V8QImode: ftype = void_ftype_pv8qi_v8qi_v8qi; break; -+ case V4HImode: ftype = void_ftype_pv4hi_v4hi_v4hi; break; -+ case V2SImode: ftype = void_ftype_pv2si_v2si_v2si; break; -+ case V2SFmode: ftype = void_ftype_pv2sf_v2sf_v2sf; break; -+ case DImode: ftype = void_ftype_pdi_di_di; break; -+ case V16QImode: ftype = void_ftype_pv16qi_v16qi_v16qi; break; -+ case V8HImode: ftype = void_ftype_pv8hi_v8hi_v8hi; break; -+ case V4SImode: ftype = void_ftype_pv4si_v4si_v4si; break; -+ case V4SFmode: ftype = void_ftype_pv4sf_v4sf_v4sf; break; -+ case V2DImode: ftype = void_ftype_pv2di_v2di_v2di; break; -+ default: gcc_unreachable (); -+ } -+ } -+ break; - -- case T_DI: -- case T_V2DI: -- eltype = const_intDI_pointer_node; -- break; -+ case NEON_REINTERP: -+ { -+ /* We iterate over 5 doubleword types, then 5 quadword -+ types. */ -+ int rhs = d->mode % 5; -+ switch (insn_data[d->code].operand[0].mode) -+ { -+ case V8QImode: ftype = reinterp_ftype_dreg[0][rhs]; break; -+ case V4HImode: ftype = reinterp_ftype_dreg[1][rhs]; break; -+ case V2SImode: ftype = reinterp_ftype_dreg[2][rhs]; break; -+ case V2SFmode: ftype = reinterp_ftype_dreg[3][rhs]; break; -+ case DImode: ftype = reinterp_ftype_dreg[4][rhs]; break; -+ case V16QImode: ftype = reinterp_ftype_qreg[0][rhs]; break; -+ case V8HImode: ftype = reinterp_ftype_qreg[1][rhs]; break; -+ case V4SImode: ftype = reinterp_ftype_qreg[2][rhs]; break; -+ case V4SFmode: ftype = reinterp_ftype_qreg[3][rhs]; break; -+ case V2DImode: ftype = reinterp_ftype_qreg[4][rhs]; break; -+ default: gcc_unreachable (); -+ } -+ } -+ break; - -- default: gcc_unreachable (); -- } -- } -- else if (is_store && k == 0) -- { -- /* Similarly, Neon store patterns use operand 0 as -- the memory location to store to (a SImode pointer). -- Use a pointer to the element type of the store in -- that position. */ -- gcc_assert (insn_data[icode].operand[k].mode == SImode); -+ default: -+ gcc_unreachable (); -+ } - -- switch (1 << j) -- { -- case T_V8QI: -- case T_V16QI: -- eltype = intQI_pointer_node; -- break; -+ gcc_assert (ftype != NULL); - -- case T_V4HI: -- case T_V8HI: -- eltype = intHI_pointer_node; -- break; -+ sprintf (namebuf, "__builtin_neon_%s%s", d->name, modenames[d->mode]); - -- case T_V2SI: -- case T_V4SI: -- eltype = intSI_pointer_node; -- break; -+ decl = add_builtin_function (namebuf, ftype, fcode, BUILT_IN_MD, NULL, -+ NULL_TREE); -+ arm_builtin_decls[fcode] = decl; -+ } -+} -+ -+#define def_mbuiltin(MASK, NAME, TYPE, CODE) \ -+ do \ -+ { \ -+ if ((MASK) & insn_flags) \ -+ { \ -+ tree bdecl; \ -+ bdecl = add_builtin_function ((NAME), (TYPE), (CODE), \ -+ BUILT_IN_MD, NULL, NULL_TREE); \ -+ arm_builtin_decls[CODE] = bdecl; \ -+ } \ -+ } \ -+ while (0) -+ -+struct builtin_description -+{ -+ const unsigned int mask; -+ const enum insn_code icode; -+ const char * const name; -+ const enum arm_builtins code; -+ const enum rtx_code comparison; -+ const unsigned int flag; -+}; -+ -+static const struct builtin_description bdesc_2arg[] = -+{ -+#define IWMMXT_BUILTIN(code, string, builtin) \ -+ { FL_IWMMXT, CODE_FOR_##code, "__builtin_arm_" string, \ -+ ARM_BUILTIN_##builtin, UNKNOWN, 0 }, -+ -+ IWMMXT_BUILTIN (addv8qi3, "waddb", WADDB) -+ IWMMXT_BUILTIN (addv4hi3, "waddh", WADDH) -+ IWMMXT_BUILTIN (addv2si3, "waddw", WADDW) -+ IWMMXT_BUILTIN (subv8qi3, "wsubb", WSUBB) -+ IWMMXT_BUILTIN (subv4hi3, "wsubh", WSUBH) -+ IWMMXT_BUILTIN (subv2si3, "wsubw", WSUBW) -+ IWMMXT_BUILTIN (ssaddv8qi3, "waddbss", WADDSSB) -+ IWMMXT_BUILTIN (ssaddv4hi3, "waddhss", WADDSSH) -+ IWMMXT_BUILTIN (ssaddv2si3, "waddwss", WADDSSW) -+ IWMMXT_BUILTIN (sssubv8qi3, "wsubbss", WSUBSSB) -+ IWMMXT_BUILTIN (sssubv4hi3, "wsubhss", WSUBSSH) -+ IWMMXT_BUILTIN (sssubv2si3, "wsubwss", WSUBSSW) -+ IWMMXT_BUILTIN (usaddv8qi3, "waddbus", WADDUSB) -+ IWMMXT_BUILTIN (usaddv4hi3, "waddhus", WADDUSH) -+ IWMMXT_BUILTIN (usaddv2si3, "waddwus", WADDUSW) -+ IWMMXT_BUILTIN (ussubv8qi3, "wsubbus", WSUBUSB) -+ IWMMXT_BUILTIN (ussubv4hi3, "wsubhus", WSUBUSH) -+ IWMMXT_BUILTIN (ussubv2si3, "wsubwus", WSUBUSW) -+ IWMMXT_BUILTIN (mulv4hi3, "wmulul", WMULUL) -+ IWMMXT_BUILTIN (smulv4hi3_highpart, "wmulsm", WMULSM) -+ IWMMXT_BUILTIN (umulv4hi3_highpart, "wmulum", WMULUM) -+ IWMMXT_BUILTIN (eqv8qi3, "wcmpeqb", WCMPEQB) -+ IWMMXT_BUILTIN (eqv4hi3, "wcmpeqh", WCMPEQH) -+ IWMMXT_BUILTIN (eqv2si3, "wcmpeqw", WCMPEQW) -+ IWMMXT_BUILTIN (gtuv8qi3, "wcmpgtub", WCMPGTUB) -+ IWMMXT_BUILTIN (gtuv4hi3, "wcmpgtuh", WCMPGTUH) -+ IWMMXT_BUILTIN (gtuv2si3, "wcmpgtuw", WCMPGTUW) -+ IWMMXT_BUILTIN (gtv8qi3, "wcmpgtsb", WCMPGTSB) -+ IWMMXT_BUILTIN (gtv4hi3, "wcmpgtsh", WCMPGTSH) -+ IWMMXT_BUILTIN (gtv2si3, "wcmpgtsw", WCMPGTSW) -+ IWMMXT_BUILTIN (umaxv8qi3, "wmaxub", WMAXUB) -+ IWMMXT_BUILTIN (smaxv8qi3, "wmaxsb", WMAXSB) -+ IWMMXT_BUILTIN (umaxv4hi3, "wmaxuh", WMAXUH) -+ IWMMXT_BUILTIN (smaxv4hi3, "wmaxsh", WMAXSH) -+ IWMMXT_BUILTIN (umaxv2si3, "wmaxuw", WMAXUW) -+ IWMMXT_BUILTIN (smaxv2si3, "wmaxsw", WMAXSW) -+ IWMMXT_BUILTIN (uminv8qi3, "wminub", WMINUB) -+ IWMMXT_BUILTIN (sminv8qi3, "wminsb", WMINSB) -+ IWMMXT_BUILTIN (uminv4hi3, "wminuh", WMINUH) -+ IWMMXT_BUILTIN (sminv4hi3, "wminsh", WMINSH) -+ IWMMXT_BUILTIN (uminv2si3, "wminuw", WMINUW) -+ IWMMXT_BUILTIN (sminv2si3, "wminsw", WMINSW) -+ IWMMXT_BUILTIN (iwmmxt_anddi3, "wand", WAND) -+ IWMMXT_BUILTIN (iwmmxt_nanddi3, "wandn", WANDN) -+ IWMMXT_BUILTIN (iwmmxt_iordi3, "wor", WOR) -+ IWMMXT_BUILTIN (iwmmxt_xordi3, "wxor", WXOR) -+ IWMMXT_BUILTIN (iwmmxt_uavgv8qi3, "wavg2b", WAVG2B) -+ IWMMXT_BUILTIN (iwmmxt_uavgv4hi3, "wavg2h", WAVG2H) -+ IWMMXT_BUILTIN (iwmmxt_uavgrndv8qi3, "wavg2br", WAVG2BR) -+ IWMMXT_BUILTIN (iwmmxt_uavgrndv4hi3, "wavg2hr", WAVG2HR) -+ IWMMXT_BUILTIN (iwmmxt_wunpckilb, "wunpckilb", WUNPCKILB) -+ IWMMXT_BUILTIN (iwmmxt_wunpckilh, "wunpckilh", WUNPCKILH) -+ IWMMXT_BUILTIN (iwmmxt_wunpckilw, "wunpckilw", WUNPCKILW) -+ IWMMXT_BUILTIN (iwmmxt_wunpckihb, "wunpckihb", WUNPCKIHB) -+ IWMMXT_BUILTIN (iwmmxt_wunpckihh, "wunpckihh", WUNPCKIHH) -+ IWMMXT_BUILTIN (iwmmxt_wunpckihw, "wunpckihw", WUNPCKIHW) -+ IWMMXT_BUILTIN (iwmmxt_wmadds, "wmadds", WMADDS) -+ IWMMXT_BUILTIN (iwmmxt_wmaddu, "wmaddu", WMADDU) -+ -+#define IWMMXT_BUILTIN2(code, builtin) \ -+ { FL_IWMMXT, CODE_FOR_##code, NULL, ARM_BUILTIN_##builtin, UNKNOWN, 0 }, -+ -+ IWMMXT_BUILTIN2 (iwmmxt_wpackhss, WPACKHSS) -+ IWMMXT_BUILTIN2 (iwmmxt_wpackwss, WPACKWSS) -+ IWMMXT_BUILTIN2 (iwmmxt_wpackdss, WPACKDSS) -+ IWMMXT_BUILTIN2 (iwmmxt_wpackhus, WPACKHUS) -+ IWMMXT_BUILTIN2 (iwmmxt_wpackwus, WPACKWUS) -+ IWMMXT_BUILTIN2 (iwmmxt_wpackdus, WPACKDUS) -+ IWMMXT_BUILTIN2 (ashlv4hi3_di, WSLLH) -+ IWMMXT_BUILTIN2 (ashlv4hi3_iwmmxt, WSLLHI) -+ IWMMXT_BUILTIN2 (ashlv2si3_di, WSLLW) -+ IWMMXT_BUILTIN2 (ashlv2si3_iwmmxt, WSLLWI) -+ IWMMXT_BUILTIN2 (ashldi3_di, WSLLD) -+ IWMMXT_BUILTIN2 (ashldi3_iwmmxt, WSLLDI) -+ IWMMXT_BUILTIN2 (lshrv4hi3_di, WSRLH) -+ IWMMXT_BUILTIN2 (lshrv4hi3_iwmmxt, WSRLHI) -+ IWMMXT_BUILTIN2 (lshrv2si3_di, WSRLW) -+ IWMMXT_BUILTIN2 (lshrv2si3_iwmmxt, WSRLWI) -+ IWMMXT_BUILTIN2 (lshrdi3_di, WSRLD) -+ IWMMXT_BUILTIN2 (lshrdi3_iwmmxt, WSRLDI) -+ IWMMXT_BUILTIN2 (ashrv4hi3_di, WSRAH) -+ IWMMXT_BUILTIN2 (ashrv4hi3_iwmmxt, WSRAHI) -+ IWMMXT_BUILTIN2 (ashrv2si3_di, WSRAW) -+ IWMMXT_BUILTIN2 (ashrv2si3_iwmmxt, WSRAWI) -+ IWMMXT_BUILTIN2 (ashrdi3_di, WSRAD) -+ IWMMXT_BUILTIN2 (ashrdi3_iwmmxt, WSRADI) -+ IWMMXT_BUILTIN2 (rorv4hi3_di, WRORH) -+ IWMMXT_BUILTIN2 (rorv4hi3, WRORHI) -+ IWMMXT_BUILTIN2 (rorv2si3_di, WRORW) -+ IWMMXT_BUILTIN2 (rorv2si3, WRORWI) -+ IWMMXT_BUILTIN2 (rordi3_di, WRORD) -+ IWMMXT_BUILTIN2 (rordi3, WRORDI) -+ IWMMXT_BUILTIN2 (iwmmxt_wmacuz, WMACUZ) -+ IWMMXT_BUILTIN2 (iwmmxt_wmacsz, WMACSZ) -+}; -+ -+static const struct builtin_description bdesc_1arg[] = -+{ -+ IWMMXT_BUILTIN (iwmmxt_tmovmskb, "tmovmskb", TMOVMSKB) -+ IWMMXT_BUILTIN (iwmmxt_tmovmskh, "tmovmskh", TMOVMSKH) -+ IWMMXT_BUILTIN (iwmmxt_tmovmskw, "tmovmskw", TMOVMSKW) -+ IWMMXT_BUILTIN (iwmmxt_waccb, "waccb", WACCB) -+ IWMMXT_BUILTIN (iwmmxt_wacch, "wacch", WACCH) -+ IWMMXT_BUILTIN (iwmmxt_waccw, "waccw", WACCW) -+ IWMMXT_BUILTIN (iwmmxt_wunpckehub, "wunpckehub", WUNPCKEHUB) -+ IWMMXT_BUILTIN (iwmmxt_wunpckehuh, "wunpckehuh", WUNPCKEHUH) -+ IWMMXT_BUILTIN (iwmmxt_wunpckehuw, "wunpckehuw", WUNPCKEHUW) -+ IWMMXT_BUILTIN (iwmmxt_wunpckehsb, "wunpckehsb", WUNPCKEHSB) -+ IWMMXT_BUILTIN (iwmmxt_wunpckehsh, "wunpckehsh", WUNPCKEHSH) -+ IWMMXT_BUILTIN (iwmmxt_wunpckehsw, "wunpckehsw", WUNPCKEHSW) -+ IWMMXT_BUILTIN (iwmmxt_wunpckelub, "wunpckelub", WUNPCKELUB) -+ IWMMXT_BUILTIN (iwmmxt_wunpckeluh, "wunpckeluh", WUNPCKELUH) -+ IWMMXT_BUILTIN (iwmmxt_wunpckeluw, "wunpckeluw", WUNPCKELUW) -+ IWMMXT_BUILTIN (iwmmxt_wunpckelsb, "wunpckelsb", WUNPCKELSB) -+ IWMMXT_BUILTIN (iwmmxt_wunpckelsh, "wunpckelsh", WUNPCKELSH) -+ IWMMXT_BUILTIN (iwmmxt_wunpckelsw, "wunpckelsw", WUNPCKELSW) -+}; -+ -+/* Set up all the iWMMXt builtins. This is not called if -+ TARGET_IWMMXT is zero. */ -+ -+static void -+arm_init_iwmmxt_builtins (void) -+{ -+ const struct builtin_description * d; -+ size_t i; -+ tree endlink = void_list_node; -+ -+ tree V2SI_type_node = build_vector_type_for_mode (intSI_type_node, V2SImode); -+ tree V4HI_type_node = build_vector_type_for_mode (intHI_type_node, V4HImode); -+ tree V8QI_type_node = build_vector_type_for_mode (intQI_type_node, V8QImode); -+ -+ tree int_ftype_int -+ = build_function_type (integer_type_node, -+ tree_cons (NULL_TREE, integer_type_node, endlink)); -+ tree v8qi_ftype_v8qi_v8qi_int -+ = build_function_type (V8QI_type_node, -+ tree_cons (NULL_TREE, V8QI_type_node, -+ tree_cons (NULL_TREE, V8QI_type_node, -+ tree_cons (NULL_TREE, -+ integer_type_node, -+ endlink)))); -+ tree v4hi_ftype_v4hi_int -+ = build_function_type (V4HI_type_node, -+ tree_cons (NULL_TREE, V4HI_type_node, -+ tree_cons (NULL_TREE, integer_type_node, -+ endlink))); -+ tree v2si_ftype_v2si_int -+ = build_function_type (V2SI_type_node, -+ tree_cons (NULL_TREE, V2SI_type_node, -+ tree_cons (NULL_TREE, integer_type_node, -+ endlink))); -+ tree v2si_ftype_di_di -+ = build_function_type (V2SI_type_node, -+ tree_cons (NULL_TREE, long_long_integer_type_node, -+ tree_cons (NULL_TREE, -+ long_long_integer_type_node, -+ endlink))); -+ tree di_ftype_di_int -+ = build_function_type (long_long_integer_type_node, -+ tree_cons (NULL_TREE, long_long_integer_type_node, -+ tree_cons (NULL_TREE, integer_type_node, -+ endlink))); -+ tree di_ftype_di_int_int -+ = build_function_type (long_long_integer_type_node, -+ tree_cons (NULL_TREE, long_long_integer_type_node, -+ tree_cons (NULL_TREE, integer_type_node, -+ tree_cons (NULL_TREE, -+ integer_type_node, -+ endlink)))); -+ tree int_ftype_v8qi -+ = build_function_type (integer_type_node, -+ tree_cons (NULL_TREE, V8QI_type_node, -+ endlink)); -+ tree int_ftype_v4hi -+ = build_function_type (integer_type_node, -+ tree_cons (NULL_TREE, V4HI_type_node, -+ endlink)); -+ tree int_ftype_v2si -+ = build_function_type (integer_type_node, -+ tree_cons (NULL_TREE, V2SI_type_node, -+ endlink)); -+ tree int_ftype_v8qi_int -+ = build_function_type (integer_type_node, -+ tree_cons (NULL_TREE, V8QI_type_node, -+ tree_cons (NULL_TREE, integer_type_node, -+ endlink))); -+ tree int_ftype_v4hi_int -+ = build_function_type (integer_type_node, -+ tree_cons (NULL_TREE, V4HI_type_node, -+ tree_cons (NULL_TREE, integer_type_node, -+ endlink))); -+ tree int_ftype_v2si_int -+ = build_function_type (integer_type_node, -+ tree_cons (NULL_TREE, V2SI_type_node, -+ tree_cons (NULL_TREE, integer_type_node, -+ endlink))); -+ tree v8qi_ftype_v8qi_int_int -+ = build_function_type (V8QI_type_node, -+ tree_cons (NULL_TREE, V8QI_type_node, -+ tree_cons (NULL_TREE, integer_type_node, -+ tree_cons (NULL_TREE, -+ integer_type_node, -+ endlink)))); -+ tree v4hi_ftype_v4hi_int_int -+ = build_function_type (V4HI_type_node, -+ tree_cons (NULL_TREE, V4HI_type_node, -+ tree_cons (NULL_TREE, integer_type_node, -+ tree_cons (NULL_TREE, -+ integer_type_node, -+ endlink)))); -+ tree v2si_ftype_v2si_int_int -+ = build_function_type (V2SI_type_node, -+ tree_cons (NULL_TREE, V2SI_type_node, -+ tree_cons (NULL_TREE, integer_type_node, -+ tree_cons (NULL_TREE, -+ integer_type_node, -+ endlink)))); -+ /* Miscellaneous. */ -+ tree v8qi_ftype_v4hi_v4hi -+ = build_function_type (V8QI_type_node, -+ tree_cons (NULL_TREE, V4HI_type_node, -+ tree_cons (NULL_TREE, V4HI_type_node, -+ endlink))); -+ tree v4hi_ftype_v2si_v2si -+ = build_function_type (V4HI_type_node, -+ tree_cons (NULL_TREE, V2SI_type_node, -+ tree_cons (NULL_TREE, V2SI_type_node, -+ endlink))); -+ tree v2si_ftype_v4hi_v4hi -+ = build_function_type (V2SI_type_node, -+ tree_cons (NULL_TREE, V4HI_type_node, -+ tree_cons (NULL_TREE, V4HI_type_node, -+ endlink))); -+ tree v2si_ftype_v8qi_v8qi -+ = build_function_type (V2SI_type_node, -+ tree_cons (NULL_TREE, V8QI_type_node, -+ tree_cons (NULL_TREE, V8QI_type_node, -+ endlink))); -+ tree v4hi_ftype_v4hi_di -+ = build_function_type (V4HI_type_node, -+ tree_cons (NULL_TREE, V4HI_type_node, -+ tree_cons (NULL_TREE, -+ long_long_integer_type_node, -+ endlink))); -+ tree v2si_ftype_v2si_di -+ = build_function_type (V2SI_type_node, -+ tree_cons (NULL_TREE, V2SI_type_node, -+ tree_cons (NULL_TREE, -+ long_long_integer_type_node, -+ endlink))); -+ tree void_ftype_int_int -+ = build_function_type (void_type_node, -+ tree_cons (NULL_TREE, integer_type_node, -+ tree_cons (NULL_TREE, integer_type_node, -+ endlink))); -+ tree di_ftype_void -+ = build_function_type (long_long_unsigned_type_node, endlink); -+ tree di_ftype_v8qi -+ = build_function_type (long_long_integer_type_node, -+ tree_cons (NULL_TREE, V8QI_type_node, -+ endlink)); -+ tree di_ftype_v4hi -+ = build_function_type (long_long_integer_type_node, -+ tree_cons (NULL_TREE, V4HI_type_node, -+ endlink)); -+ tree di_ftype_v2si -+ = build_function_type (long_long_integer_type_node, -+ tree_cons (NULL_TREE, V2SI_type_node, -+ endlink)); -+ tree v2si_ftype_v4hi -+ = build_function_type (V2SI_type_node, -+ tree_cons (NULL_TREE, V4HI_type_node, -+ endlink)); -+ tree v4hi_ftype_v8qi -+ = build_function_type (V4HI_type_node, -+ tree_cons (NULL_TREE, V8QI_type_node, -+ endlink)); - -- case T_V2SF: -- case T_V4SF: -- eltype = float_pointer_node; -- break; -+ tree di_ftype_di_v4hi_v4hi -+ = build_function_type (long_long_unsigned_type_node, -+ tree_cons (NULL_TREE, -+ long_long_unsigned_type_node, -+ tree_cons (NULL_TREE, V4HI_type_node, -+ tree_cons (NULL_TREE, -+ V4HI_type_node, -+ endlink)))); - -- case T_DI: -- case T_V2DI: -- eltype = intDI_pointer_node; -- break; -+ tree di_ftype_v4hi_v4hi -+ = build_function_type (long_long_unsigned_type_node, -+ tree_cons (NULL_TREE, V4HI_type_node, -+ tree_cons (NULL_TREE, V4HI_type_node, -+ endlink))); -+ -+ /* Normal vector binops. */ -+ tree v8qi_ftype_v8qi_v8qi -+ = build_function_type (V8QI_type_node, -+ tree_cons (NULL_TREE, V8QI_type_node, -+ tree_cons (NULL_TREE, V8QI_type_node, -+ endlink))); -+ tree v4hi_ftype_v4hi_v4hi -+ = build_function_type (V4HI_type_node, -+ tree_cons (NULL_TREE, V4HI_type_node, -+ tree_cons (NULL_TREE, V4HI_type_node, -+ endlink))); -+ tree v2si_ftype_v2si_v2si -+ = build_function_type (V2SI_type_node, -+ tree_cons (NULL_TREE, V2SI_type_node, -+ tree_cons (NULL_TREE, V2SI_type_node, -+ endlink))); -+ tree di_ftype_di_di -+ = build_function_type (long_long_unsigned_type_node, -+ tree_cons (NULL_TREE, long_long_unsigned_type_node, -+ tree_cons (NULL_TREE, -+ long_long_unsigned_type_node, -+ endlink))); -+ -+ /* Add all builtins that are more or less simple operations on two -+ operands. */ -+ for (i = 0, d = bdesc_2arg; i < ARRAY_SIZE (bdesc_2arg); i++, d++) -+ { -+ /* Use one of the operands; the target can have a different mode for -+ mask-generating compares. */ -+ enum machine_mode mode; -+ tree type; - -- default: gcc_unreachable (); -- } -- } -- else -- { -- switch (insn_data[icode].operand[k].mode) -- { -- case VOIDmode: eltype = void_type_node; break; -- /* Scalars. */ -- case QImode: eltype = neon_intQI_type_node; break; -- case HImode: eltype = neon_intHI_type_node; break; -- case SImode: eltype = neon_intSI_type_node; break; -- case SFmode: eltype = neon_float_type_node; break; -- case DImode: eltype = neon_intDI_type_node; break; -- case TImode: eltype = intTI_type_node; break; -- case EImode: eltype = intEI_type_node; break; -- case OImode: eltype = intOI_type_node; break; -- case CImode: eltype = intCI_type_node; break; -- case XImode: eltype = intXI_type_node; break; -- /* 64-bit vectors. */ -- case V8QImode: eltype = V8QI_type_node; break; -- case V4HImode: eltype = V4HI_type_node; break; -- case V2SImode: eltype = V2SI_type_node; break; -- case V2SFmode: eltype = V2SF_type_node; break; -- /* 128-bit vectors. */ -- case V16QImode: eltype = V16QI_type_node; break; -- case V8HImode: eltype = V8HI_type_node; break; -- case V4SImode: eltype = V4SI_type_node; break; -- case V4SFmode: eltype = V4SF_type_node; break; -- case V2DImode: eltype = V2DI_type_node; break; -- default: gcc_unreachable (); -- } -- } -+ if (d->name == 0) -+ continue; - -- if (k == 0 && !is_store) -- return_type = eltype; -- else -- args = tree_cons (NULL_TREE, eltype, args); -- } -+ mode = insn_data[d->icode].operand[1].mode; - -- ftype = build_function_type (return_type, args); -- } -- break; -+ switch (mode) -+ { -+ case V8QImode: -+ type = v8qi_ftype_v8qi_v8qi; -+ break; -+ case V4HImode: -+ type = v4hi_ftype_v4hi_v4hi; -+ break; -+ case V2SImode: -+ type = v2si_ftype_v2si_v2si; -+ break; -+ case DImode: -+ type = di_ftype_di_di; -+ break; - -- case NEON_RESULTPAIR: -- { -- switch (insn_data[icode].operand[1].mode) -- { -- case V8QImode: ftype = void_ftype_pv8qi_v8qi_v8qi; break; -- case V4HImode: ftype = void_ftype_pv4hi_v4hi_v4hi; break; -- case V2SImode: ftype = void_ftype_pv2si_v2si_v2si; break; -- case V2SFmode: ftype = void_ftype_pv2sf_v2sf_v2sf; break; -- case DImode: ftype = void_ftype_pdi_di_di; break; -- case V16QImode: ftype = void_ftype_pv16qi_v16qi_v16qi; break; -- case V8HImode: ftype = void_ftype_pv8hi_v8hi_v8hi; break; -- case V4SImode: ftype = void_ftype_pv4si_v4si_v4si; break; -- case V4SFmode: ftype = void_ftype_pv4sf_v4sf_v4sf; break; -- case V2DImode: ftype = void_ftype_pv2di_v2di_v2di; break; -- default: gcc_unreachable (); -- } -- } -- break; -+ default: -+ gcc_unreachable (); -+ } - -- case NEON_REINTERP: -- { -- /* We iterate over 5 doubleword types, then 5 quadword -- types. */ -- int rhs = j % 5; -- switch (insn_data[icode].operand[0].mode) -- { -- case V8QImode: ftype = reinterp_ftype_dreg[0][rhs]; break; -- case V4HImode: ftype = reinterp_ftype_dreg[1][rhs]; break; -- case V2SImode: ftype = reinterp_ftype_dreg[2][rhs]; break; -- case V2SFmode: ftype = reinterp_ftype_dreg[3][rhs]; break; -- case DImode: ftype = reinterp_ftype_dreg[4][rhs]; break; -- case V16QImode: ftype = reinterp_ftype_qreg[0][rhs]; break; -- case V8HImode: ftype = reinterp_ftype_qreg[1][rhs]; break; -- case V4SImode: ftype = reinterp_ftype_qreg[2][rhs]; break; -- case V4SFmode: ftype = reinterp_ftype_qreg[3][rhs]; break; -- case V2DImode: ftype = reinterp_ftype_qreg[4][rhs]; break; -- default: gcc_unreachable (); -- } -- } -- break; -+ def_mbuiltin (d->mask, d->name, type, d->code); -+ } - -- default: -- gcc_unreachable (); -- } -+ /* Add the remaining MMX insns with somewhat more complicated types. */ -+#define iwmmx_mbuiltin(NAME, TYPE, CODE) \ -+ def_mbuiltin (FL_IWMMXT, "__builtin_arm_" NAME, (TYPE), \ -+ ARM_BUILTIN_ ## CODE) -+ -+ iwmmx_mbuiltin ("wzero", di_ftype_void, WZERO); -+ iwmmx_mbuiltin ("setwcx", void_ftype_int_int, SETWCX); -+ iwmmx_mbuiltin ("getwcx", int_ftype_int, GETWCX); -+ -+ iwmmx_mbuiltin ("wsllh", v4hi_ftype_v4hi_di, WSLLH); -+ iwmmx_mbuiltin ("wsllw", v2si_ftype_v2si_di, WSLLW); -+ iwmmx_mbuiltin ("wslld", di_ftype_di_di, WSLLD); -+ iwmmx_mbuiltin ("wsllhi", v4hi_ftype_v4hi_int, WSLLHI); -+ iwmmx_mbuiltin ("wsllwi", v2si_ftype_v2si_int, WSLLWI); -+ iwmmx_mbuiltin ("wslldi", di_ftype_di_int, WSLLDI); -+ -+ iwmmx_mbuiltin ("wsrlh", v4hi_ftype_v4hi_di, WSRLH); -+ iwmmx_mbuiltin ("wsrlw", v2si_ftype_v2si_di, WSRLW); -+ iwmmx_mbuiltin ("wsrld", di_ftype_di_di, WSRLD); -+ iwmmx_mbuiltin ("wsrlhi", v4hi_ftype_v4hi_int, WSRLHI); -+ iwmmx_mbuiltin ("wsrlwi", v2si_ftype_v2si_int, WSRLWI); -+ iwmmx_mbuiltin ("wsrldi", di_ftype_di_int, WSRLDI); -+ -+ iwmmx_mbuiltin ("wsrah", v4hi_ftype_v4hi_di, WSRAH); -+ iwmmx_mbuiltin ("wsraw", v2si_ftype_v2si_di, WSRAW); -+ iwmmx_mbuiltin ("wsrad", di_ftype_di_di, WSRAD); -+ iwmmx_mbuiltin ("wsrahi", v4hi_ftype_v4hi_int, WSRAHI); -+ iwmmx_mbuiltin ("wsrawi", v2si_ftype_v2si_int, WSRAWI); -+ iwmmx_mbuiltin ("wsradi", di_ftype_di_int, WSRADI); -+ -+ iwmmx_mbuiltin ("wrorh", v4hi_ftype_v4hi_di, WRORH); -+ iwmmx_mbuiltin ("wrorw", v2si_ftype_v2si_di, WRORW); -+ iwmmx_mbuiltin ("wrord", di_ftype_di_di, WRORD); -+ iwmmx_mbuiltin ("wrorhi", v4hi_ftype_v4hi_int, WRORHI); -+ iwmmx_mbuiltin ("wrorwi", v2si_ftype_v2si_int, WRORWI); -+ iwmmx_mbuiltin ("wrordi", di_ftype_di_int, WRORDI); -+ -+ iwmmx_mbuiltin ("wshufh", v4hi_ftype_v4hi_int, WSHUFH); -+ -+ iwmmx_mbuiltin ("wsadb", v2si_ftype_v8qi_v8qi, WSADB); -+ iwmmx_mbuiltin ("wsadh", v2si_ftype_v4hi_v4hi, WSADH); -+ iwmmx_mbuiltin ("wsadbz", v2si_ftype_v8qi_v8qi, WSADBZ); -+ iwmmx_mbuiltin ("wsadhz", v2si_ftype_v4hi_v4hi, WSADHZ); -+ -+ iwmmx_mbuiltin ("textrmsb", int_ftype_v8qi_int, TEXTRMSB); -+ iwmmx_mbuiltin ("textrmsh", int_ftype_v4hi_int, TEXTRMSH); -+ iwmmx_mbuiltin ("textrmsw", int_ftype_v2si_int, TEXTRMSW); -+ iwmmx_mbuiltin ("textrmub", int_ftype_v8qi_int, TEXTRMUB); -+ iwmmx_mbuiltin ("textrmuh", int_ftype_v4hi_int, TEXTRMUH); -+ iwmmx_mbuiltin ("textrmuw", int_ftype_v2si_int, TEXTRMUW); -+ iwmmx_mbuiltin ("tinsrb", v8qi_ftype_v8qi_int_int, TINSRB); -+ iwmmx_mbuiltin ("tinsrh", v4hi_ftype_v4hi_int_int, TINSRH); -+ iwmmx_mbuiltin ("tinsrw", v2si_ftype_v2si_int_int, TINSRW); -+ -+ iwmmx_mbuiltin ("waccb", di_ftype_v8qi, WACCB); -+ iwmmx_mbuiltin ("wacch", di_ftype_v4hi, WACCH); -+ iwmmx_mbuiltin ("waccw", di_ftype_v2si, WACCW); -+ -+ iwmmx_mbuiltin ("tmovmskb", int_ftype_v8qi, TMOVMSKB); -+ iwmmx_mbuiltin ("tmovmskh", int_ftype_v4hi, TMOVMSKH); -+ iwmmx_mbuiltin ("tmovmskw", int_ftype_v2si, TMOVMSKW); -+ -+ iwmmx_mbuiltin ("wpackhss", v8qi_ftype_v4hi_v4hi, WPACKHSS); -+ iwmmx_mbuiltin ("wpackhus", v8qi_ftype_v4hi_v4hi, WPACKHUS); -+ iwmmx_mbuiltin ("wpackwus", v4hi_ftype_v2si_v2si, WPACKWUS); -+ iwmmx_mbuiltin ("wpackwss", v4hi_ftype_v2si_v2si, WPACKWSS); -+ iwmmx_mbuiltin ("wpackdus", v2si_ftype_di_di, WPACKDUS); -+ iwmmx_mbuiltin ("wpackdss", v2si_ftype_di_di, WPACKDSS); -+ -+ iwmmx_mbuiltin ("wunpckehub", v4hi_ftype_v8qi, WUNPCKEHUB); -+ iwmmx_mbuiltin ("wunpckehuh", v2si_ftype_v4hi, WUNPCKEHUH); -+ iwmmx_mbuiltin ("wunpckehuw", di_ftype_v2si, WUNPCKEHUW); -+ iwmmx_mbuiltin ("wunpckehsb", v4hi_ftype_v8qi, WUNPCKEHSB); -+ iwmmx_mbuiltin ("wunpckehsh", v2si_ftype_v4hi, WUNPCKEHSH); -+ iwmmx_mbuiltin ("wunpckehsw", di_ftype_v2si, WUNPCKEHSW); -+ iwmmx_mbuiltin ("wunpckelub", v4hi_ftype_v8qi, WUNPCKELUB); -+ iwmmx_mbuiltin ("wunpckeluh", v2si_ftype_v4hi, WUNPCKELUH); -+ iwmmx_mbuiltin ("wunpckeluw", di_ftype_v2si, WUNPCKELUW); -+ iwmmx_mbuiltin ("wunpckelsb", v4hi_ftype_v8qi, WUNPCKELSB); -+ iwmmx_mbuiltin ("wunpckelsh", v2si_ftype_v4hi, WUNPCKELSH); -+ iwmmx_mbuiltin ("wunpckelsw", di_ftype_v2si, WUNPCKELSW); -+ -+ iwmmx_mbuiltin ("wmacs", di_ftype_di_v4hi_v4hi, WMACS); -+ iwmmx_mbuiltin ("wmacsz", di_ftype_v4hi_v4hi, WMACSZ); -+ iwmmx_mbuiltin ("wmacu", di_ftype_di_v4hi_v4hi, WMACU); -+ iwmmx_mbuiltin ("wmacuz", di_ftype_v4hi_v4hi, WMACUZ); -+ -+ iwmmx_mbuiltin ("walign", v8qi_ftype_v8qi_v8qi_int, WALIGN); -+ iwmmx_mbuiltin ("tmia", di_ftype_di_int_int, TMIA); -+ iwmmx_mbuiltin ("tmiaph", di_ftype_di_int_int, TMIAPH); -+ iwmmx_mbuiltin ("tmiabb", di_ftype_di_int_int, TMIABB); -+ iwmmx_mbuiltin ("tmiabt", di_ftype_di_int_int, TMIABT); -+ iwmmx_mbuiltin ("tmiatb", di_ftype_di_int_int, TMIATB); -+ iwmmx_mbuiltin ("tmiatt", di_ftype_di_int_int, TMIATT); - -- gcc_assert (ftype != NULL); -+#undef iwmmx_mbuiltin -+} - -- sprintf (namebuf, "__builtin_neon_%s%s", d->name, modenames[j]); -+static void -+arm_init_tls_builtins (void) -+{ -+ tree ftype, decl; - -- add_builtin_function (namebuf, ftype, fcode++, BUILT_IN_MD, NULL, -- NULL_TREE); -- } -- } -+ ftype = build_function_type (ptr_type_node, void_list_node); -+ decl = add_builtin_function ("__builtin_thread_pointer", ftype, -+ ARM_BUILTIN_THREAD_POINTER, BUILT_IN_MD, -+ NULL, NULL_TREE); -+ TREE_NOTHROW (decl) = 1; -+ TREE_READONLY (decl) = 1; -+ arm_builtin_decls[ARM_BUILTIN_THREAD_POINTER] = decl; - } - - static void -@@ -19115,6 +20142,17 @@ - arm_init_fp16_builtins (); - } - -+/* Return the ARM builtin for CODE. */ -+ -+static tree -+arm_builtin_decl (unsigned code, bool initialize_p ATTRIBUTE_UNUSED) -+{ -+ if (code >= ARM_BUILTIN_MAX) -+ return error_mark_node; -+ -+ return arm_builtin_decls[code]; -+} -+ - /* Implement TARGET_INVALID_PARAMETER_TYPE. */ - - static const char * -@@ -19266,55 +20304,68 @@ - return target; - } - --static int --neon_builtin_compare (const void *a, const void *b) --{ -- const neon_builtin_datum *const key = (const neon_builtin_datum *) a; -- const neon_builtin_datum *const memb = (const neon_builtin_datum *) b; -- unsigned int soughtcode = key->base_fcode; -- -- if (soughtcode >= memb->base_fcode -- && soughtcode < memb->base_fcode + memb->num_vars) -- return 0; -- else if (soughtcode < memb->base_fcode) -- return -1; -- else -- return 1; --} -- --static enum insn_code --locate_neon_builtin_icode (int fcode, neon_itype *itype) --{ -- neon_builtin_datum key -- = { NULL, (neon_itype) 0, 0, { CODE_FOR_nothing }, 0, 0 }; -- neon_builtin_datum *found; -- int idx; -- -- key.base_fcode = fcode; -- found = (neon_builtin_datum *) -- bsearch (&key, &neon_builtin_data[0], ARRAY_SIZE (neon_builtin_data), -- sizeof (neon_builtin_data[0]), neon_builtin_compare); -- gcc_assert (found); -- idx = fcode - (int) found->base_fcode; -- gcc_assert (idx >= 0 && idx < T_MAX && idx < (int)found->num_vars); -- -- if (itype) -- *itype = found->itype; -- -- return found->codes[idx]; --} -- - typedef enum { - NEON_ARG_COPY_TO_REG, - NEON_ARG_CONSTANT, -+ NEON_ARG_MEMORY, - NEON_ARG_STOP - } builtin_arg; - - #define NEON_MAX_BUILTIN_ARGS 5 - -+/* EXP is a pointer argument to a Neon load or store intrinsic. Derive -+ and return an expression for the accessed memory. -+ -+ The intrinsic function operates on a block of registers that has -+ mode REG_MODE. This block contains vectors of type TYPE_MODE. -+ The function references the memory at EXP in mode MEM_MODE; -+ this mode may be BLKmode if no more suitable mode is available. */ -+ -+static tree -+neon_dereference_pointer (tree exp, enum machine_mode mem_mode, -+ enum machine_mode reg_mode, -+ neon_builtin_type_mode type_mode) -+{ -+ HOST_WIDE_INT reg_size, vector_size, nvectors, nelems; -+ tree elem_type, upper_bound, array_type; -+ -+ /* Work out the size of the register block in bytes. */ -+ reg_size = GET_MODE_SIZE (reg_mode); -+ -+ /* Work out the size of each vector in bytes. */ -+ gcc_assert (TYPE_MODE_BIT (type_mode) & (TB_DREG | TB_QREG)); -+ vector_size = (TYPE_MODE_BIT (type_mode) & TB_QREG ? 16 : 8); -+ -+ /* Work out how many vectors there are. */ -+ gcc_assert (reg_size % vector_size == 0); -+ nvectors = reg_size / vector_size; -+ -+ /* Work out how many elements are being loaded or stored. -+ MEM_MODE == REG_MODE implies a one-to-one mapping between register -+ and memory elements; anything else implies a lane load or store. */ -+ if (mem_mode == reg_mode) -+ nelems = vector_size * nvectors; -+ else -+ nelems = nvectors; -+ -+ /* Work out the type of each element. */ -+ gcc_assert (POINTER_TYPE_P (TREE_TYPE (exp))); -+ elem_type = TREE_TYPE (TREE_TYPE (exp)); -+ -+ /* Create a type that describes the full access. */ -+ upper_bound = build_int_cst (size_type_node, nelems - 1); -+ array_type = build_array_type (elem_type, build_index_type (upper_bound)); -+ -+ /* Dereference EXP using that type. */ -+ exp = convert (build_pointer_type (array_type), exp); -+ return fold_build2 (MEM_REF, array_type, exp, -+ build_int_cst (TREE_TYPE (exp), 0)); -+} -+ - /* Expand a Neon builtin. */ - static rtx - arm_expand_neon_args (rtx target, int icode, int have_retval, -+ neon_builtin_type_mode type_mode, - tree exp, ...) - { - va_list ap; -@@ -19323,7 +20374,9 @@ - rtx op[NEON_MAX_BUILTIN_ARGS]; - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode[NEON_MAX_BUILTIN_ARGS]; -+ enum machine_mode other_mode; - int argc = 0; -+ int opno; - - if (have_retval - && (!target -@@ -19341,26 +20394,46 @@ - break; - else - { -+ opno = argc + have_retval; -+ mode[argc] = insn_data[icode].operand[opno].mode; - arg[argc] = CALL_EXPR_ARG (exp, argc); -+ if (thisarg == NEON_ARG_MEMORY) -+ { -+ other_mode = insn_data[icode].operand[1 - opno].mode; -+ arg[argc] = neon_dereference_pointer (arg[argc], mode[argc], -+ other_mode, type_mode); -+ } - op[argc] = expand_normal (arg[argc]); -- mode[argc] = insn_data[icode].operand[argc + have_retval].mode; - - switch (thisarg) - { - case NEON_ARG_COPY_TO_REG: - /*gcc_assert (GET_MODE (op[argc]) == mode[argc]);*/ -- if (!(*insn_data[icode].operand[argc + have_retval].predicate) -+ if (!(*insn_data[icode].operand[opno].predicate) - (op[argc], mode[argc])) - op[argc] = copy_to_mode_reg (mode[argc], op[argc]); - break; - - case NEON_ARG_CONSTANT: - /* FIXME: This error message is somewhat unhelpful. */ -- if (!(*insn_data[icode].operand[argc + have_retval].predicate) -+ if (!(*insn_data[icode].operand[opno].predicate) - (op[argc], mode[argc])) - error ("argument must be a constant"); - break; - -+ case NEON_ARG_MEMORY: -+ gcc_assert (MEM_P (op[argc])); -+ PUT_MODE (op[argc], mode[argc]); -+ /* ??? arm_neon.h uses the same built-in functions for signed -+ and unsigned accesses, casting where necessary. This isn't -+ alias safe. */ -+ set_mem_alias_set (op[argc], 0); -+ if (!(*insn_data[icode].operand[opno].predicate) -+ (op[argc], mode[argc])) -+ op[argc] = (replace_equiv_address -+ (op[argc], force_reg (Pmode, XEXP (op[argc], 0)))); -+ break; -+ - case NEON_ARG_STOP: - gcc_unreachable (); - } -@@ -19438,15 +20511,17 @@ - static rtx - arm_expand_neon_builtin (int fcode, tree exp, rtx target) - { -- neon_itype itype; -- enum insn_code icode = locate_neon_builtin_icode (fcode, &itype); -+ neon_builtin_datum *d = &neon_builtin_data[fcode - ARM_BUILTIN_NEON_BASE]; -+ neon_itype itype = d->itype; -+ enum insn_code icode = d->code; -+ neon_builtin_type_mode type_mode = d->mode; - - switch (itype) - { - case NEON_UNOP: - case NEON_CONVERT: - case NEON_DUPLANE: -- return arm_expand_neon_args (target, icode, 1, exp, -+ return arm_expand_neon_args (target, icode, 1, type_mode, exp, - NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, NEON_ARG_STOP); - - case NEON_BINOP: -@@ -19456,90 +20531,90 @@ - case NEON_SCALARMULH: - case NEON_SHIFTINSERT: - case NEON_LOGICBINOP: -- return arm_expand_neon_args (target, icode, 1, exp, -+ return arm_expand_neon_args (target, icode, 1, type_mode, exp, - NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, - NEON_ARG_STOP); - - case NEON_TERNOP: -- return arm_expand_neon_args (target, icode, 1, exp, -+ return arm_expand_neon_args (target, icode, 1, type_mode, exp, - NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, - NEON_ARG_CONSTANT, NEON_ARG_STOP); - - case NEON_GETLANE: - case NEON_FIXCONV: - case NEON_SHIFTIMM: -- return arm_expand_neon_args (target, icode, 1, exp, -+ return arm_expand_neon_args (target, icode, 1, type_mode, exp, - NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, NEON_ARG_CONSTANT, - NEON_ARG_STOP); - - case NEON_CREATE: -- return arm_expand_neon_args (target, icode, 1, exp, -+ return arm_expand_neon_args (target, icode, 1, type_mode, exp, - NEON_ARG_COPY_TO_REG, NEON_ARG_STOP); - - case NEON_DUP: - case NEON_SPLIT: - case NEON_REINTERP: -- return arm_expand_neon_args (target, icode, 1, exp, -+ return arm_expand_neon_args (target, icode, 1, type_mode, exp, - NEON_ARG_COPY_TO_REG, NEON_ARG_STOP); - - case NEON_COMBINE: - case NEON_VTBL: -- return arm_expand_neon_args (target, icode, 1, exp, -+ return arm_expand_neon_args (target, icode, 1, type_mode, exp, - NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_STOP); - - case NEON_RESULTPAIR: -- return arm_expand_neon_args (target, icode, 0, exp, -+ return arm_expand_neon_args (target, icode, 0, type_mode, exp, - NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, - NEON_ARG_STOP); - - case NEON_LANEMUL: - case NEON_LANEMULL: - case NEON_LANEMULH: -- return arm_expand_neon_args (target, icode, 1, exp, -+ return arm_expand_neon_args (target, icode, 1, type_mode, exp, - NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, - NEON_ARG_CONSTANT, NEON_ARG_STOP); - - case NEON_LANEMAC: -- return arm_expand_neon_args (target, icode, 1, exp, -+ return arm_expand_neon_args (target, icode, 1, type_mode, exp, - NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, - NEON_ARG_CONSTANT, NEON_ARG_CONSTANT, NEON_ARG_STOP); - - case NEON_SHIFTACC: -- return arm_expand_neon_args (target, icode, 1, exp, -+ return arm_expand_neon_args (target, icode, 1, type_mode, exp, - NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, - NEON_ARG_CONSTANT, NEON_ARG_STOP); - - case NEON_SCALARMAC: -- return arm_expand_neon_args (target, icode, 1, exp, -+ return arm_expand_neon_args (target, icode, 1, type_mode, exp, - NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, - NEON_ARG_CONSTANT, NEON_ARG_STOP); - - case NEON_SELECT: - case NEON_VTBX: -- return arm_expand_neon_args (target, icode, 1, exp, -+ return arm_expand_neon_args (target, icode, 1, type_mode, exp, - NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, - NEON_ARG_STOP); - - case NEON_LOAD1: - case NEON_LOADSTRUCT: -- return arm_expand_neon_args (target, icode, 1, exp, -- NEON_ARG_COPY_TO_REG, NEON_ARG_STOP); -+ return arm_expand_neon_args (target, icode, 1, type_mode, exp, -+ NEON_ARG_MEMORY, NEON_ARG_STOP); - - case NEON_LOAD1LANE: - case NEON_LOADSTRUCTLANE: -- return arm_expand_neon_args (target, icode, 1, exp, -- NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, -+ return arm_expand_neon_args (target, icode, 1, type_mode, exp, -+ NEON_ARG_MEMORY, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, - NEON_ARG_STOP); - - case NEON_STORE1: - case NEON_STORESTRUCT: -- return arm_expand_neon_args (target, icode, 0, exp, -- NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_STOP); -+ return arm_expand_neon_args (target, icode, 0, type_mode, exp, -+ NEON_ARG_MEMORY, NEON_ARG_COPY_TO_REG, NEON_ARG_STOP); - - case NEON_STORE1LANE: - case NEON_STORESTRUCTLANE: -- return arm_expand_neon_args (target, icode, 0, exp, -- NEON_ARG_COPY_TO_REG, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, -+ return arm_expand_neon_args (target, icode, 0, type_mode, exp, -+ NEON_ARG_MEMORY, NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, - NEON_ARG_STOP); - } - -@@ -19571,39 +20646,34 @@ - emit_move_insn (mem, tmp2); - } - --/* Set up operands for a register copy from src to dest, taking care not to -- clobber registers in the process. -- FIXME: This has rather high polynomial complexity (O(n^3)?) but shouldn't -- be called with a large N, so that should be OK. */ -+/* Set up OPERANDS for a register copy from SRC to DEST, taking care -+ not to early-clobber SRC registers in the process. - -+ We assume that the operands described by SRC and DEST represent a -+ decomposed copy of OPERANDS[1] into OPERANDS[0]. COUNT is the -+ number of components into which the copy has been decomposed. */ - void - neon_disambiguate_copy (rtx *operands, rtx *dest, rtx *src, unsigned int count) - { -- unsigned int copied = 0, opctr = 0; -- unsigned int done = (1 << count) - 1; -- unsigned int i, j; -+ unsigned int i; - -- while (copied != done) -+ if (!reg_overlap_mentioned_p (operands[0], operands[1]) -+ || REGNO (operands[0]) < REGNO (operands[1])) - { - for (i = 0; i < count; i++) -- { -- int good = 1; -- -- for (j = 0; good && j < count; j++) -- if (i != j && (copied & (1 << j)) == 0 -- && reg_overlap_mentioned_p (src[j], dest[i])) -- good = 0; -- -- if (good) -- { -- operands[opctr++] = dest[i]; -- operands[opctr++] = src[i]; -- copied |= 1 << i; -- } -- } -+ { -+ operands[2 * i] = dest[i]; -+ operands[2 * i + 1] = src[i]; -+ } -+ } -+ else -+ { -+ for (i = 0; i < count; i++) -+ { -+ operands[2 * i] = dest[count - i - 1]; -+ operands[2 * i + 1] = src[count - i - 1]; -+ } - } -- -- gcc_assert (opctr == count * 2); - } - - /* Expand an expression EXP that calls a built-in function, -@@ -21455,6 +22525,8 @@ - const char *fpu_name; - if (arm_selected_arch) - asm_fprintf (asm_out_file, "\t.arch %s\n", arm_selected_arch->name); -+ else if (strncmp (arm_selected_cpu->name, "generic", 7) == 0) -+ asm_fprintf (asm_out_file, "\t.arch %s\n", arm_selected_cpu->name + 8); - else - asm_fprintf (asm_out_file, "\t.cpu %s\n", arm_selected_cpu->name); - -@@ -21518,6 +22590,10 @@ - val = 6; - asm_fprintf (asm_out_file, "\t.eabi_attribute 30, %d\n", val); - -+ /* Tag_CPU_unaligned_access. */ -+ asm_fprintf (asm_out_file, "\t.eabi_attribute 34, %d\n", -+ unaligned_access); -+ - /* Tag_ABI_FP_16bit_format. */ - if (arm_fp16_format) - asm_fprintf (asm_out_file, "\t.eabi_attribute 38, %d\n", -@@ -22261,7 +23337,21 @@ - return false; - } - --/* Use the option -mvectorize-with-neon-quad to override the use of doubleword -+/* Implements target hook array_mode_supported_p. */ -+ -+static bool -+arm_array_mode_supported_p (enum machine_mode mode, -+ unsigned HOST_WIDE_INT nelems) -+{ -+ if (TARGET_NEON -+ && (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode)) -+ && (nelems >= 2 && nelems <= 4)) -+ return true; -+ -+ return false; -+} -+ -+/* Use the option -mvectorize-with-neon-double to override the use of quardword - registers when autovectorizing for Neon, at least until multiple vector - widths are supported properly by the middle-end. */ - -@@ -22272,15 +23362,15 @@ - switch (mode) - { - case SFmode: -- return TARGET_NEON_VECTORIZE_QUAD ? V4SFmode : V2SFmode; -+ return TARGET_NEON_VECTORIZE_DOUBLE ? V2SFmode : V4SFmode; - case SImode: -- return TARGET_NEON_VECTORIZE_QUAD ? V4SImode : V2SImode; -+ return TARGET_NEON_VECTORIZE_DOUBLE ? V2SImode : V4SImode; - case HImode: -- return TARGET_NEON_VECTORIZE_QUAD ? V8HImode : V4HImode; -+ return TARGET_NEON_VECTORIZE_DOUBLE ? V4HImode : V8HImode; - case QImode: -- return TARGET_NEON_VECTORIZE_QUAD ? V16QImode : V8QImode; -+ return TARGET_NEON_VECTORIZE_DOUBLE ? V8QImode : V16QImode; - case DImode: -- if (TARGET_NEON_VECTORIZE_QUAD) -+ if (!TARGET_NEON_VECTORIZE_DOUBLE) - return V2DImode; - break; - -@@ -22305,14 +23395,16 @@ - - /* Implement TARGET_CLASS_LIKELY_SPILLED_P. - -- We need to define this for LO_REGS on thumb. Otherwise we can end up -- using r0-r4 for function arguments, r7 for the stack frame and don't -- have enough left over to do doubleword arithmetic. */ -- -+ We need to define this for LO_REGS on Thumb-1. Otherwise we can end up -+ using r0-r4 for function arguments, r7 for the stack frame and don't have -+ enough left over to do doubleword arithmetic. For Thumb-2 all the -+ potentially problematic instructions accept high registers so this is not -+ necessary. Care needs to be taken to avoid adding new Thumb-2 patterns -+ that require many low registers. */ - static bool - arm_class_likely_spilled_p (reg_class_t rclass) - { -- if ((TARGET_THUMB && rclass == LO_REGS) -+ if ((TARGET_THUMB1 && rclass == LO_REGS) - || rclass == CC_REG) - return true; - -@@ -22964,8 +24056,13 @@ - { - switch (arm_tune) - { -+ case cortexa15: -+ return 3; -+ - case cortexr4: - case cortexr4f: -+ case cortexr5: -+ case genericv7a: - case cortexa5: - case cortexa8: - case cortexa9: -@@ -23218,12 +24315,26 @@ - rtx target, - rtx memory) - { -- const char *suffix = arm_ldrex_suffix (mode); -- rtx operands[2]; -+ rtx operands[3]; - - operands[0] = target; -- operands[1] = memory; -- arm_output_asm_insn (emit, 0, operands, "ldrex%s\t%%0, %%C1", suffix); -+ if (mode != DImode) -+ { -+ const char *suffix = arm_ldrex_suffix (mode); -+ operands[1] = memory; -+ arm_output_asm_insn (emit, 0, operands, "ldrex%s\t%%0, %%C1", suffix); -+ } -+ else -+ { -+ /* The restrictions on target registers in ARM mode are that the two -+ registers are consecutive and the first one is even; Thumb is -+ actually more flexible, but DI should give us this anyway. -+ Note that the 1st register always gets the lowest word in memory. */ -+ gcc_assert ((REGNO (target) & 1) == 0); -+ operands[1] = gen_rtx_REG (SImode, REGNO (target) + 1); -+ operands[2] = memory; -+ arm_output_asm_insn (emit, 0, operands, "ldrexd\t%%0, %%1, %%C2"); -+ } - } - - /* Emit a strex{b,h,d, } instruction appropriate for the specified -@@ -23236,14 +24347,41 @@ - rtx value, - rtx memory) - { -- const char *suffix = arm_ldrex_suffix (mode); -- rtx operands[3]; -+ rtx operands[4]; - - operands[0] = result; - operands[1] = value; -- operands[2] = memory; -- arm_output_asm_insn (emit, 0, operands, "strex%s%s\t%%0, %%1, %%C2", suffix, -- cc); -+ if (mode != DImode) -+ { -+ const char *suffix = arm_ldrex_suffix (mode); -+ operands[2] = memory; -+ arm_output_asm_insn (emit, 0, operands, "strex%s%s\t%%0, %%1, %%C2", -+ suffix, cc); -+ } -+ else -+ { -+ /* The restrictions on target registers in ARM mode are that the two -+ registers are consecutive and the first one is even; Thumb is -+ actually more flexible, but DI should give us this anyway. -+ Note that the 1st register always gets the lowest word in memory. */ -+ gcc_assert ((REGNO (value) & 1) == 0 || TARGET_THUMB2); -+ operands[2] = gen_rtx_REG (SImode, REGNO (value) + 1); -+ operands[3] = memory; -+ arm_output_asm_insn (emit, 0, operands, "strexd%s\t%%0, %%1, %%2, %%C3", -+ cc); -+ } -+} -+ -+/* Helper to emit an it instruction in Thumb2 mode only; although the assembler -+ will ignore it in ARM mode, emitting it will mess up instruction counts we -+ sometimes keep 'flags' are the extra t's and e's if it's more than one -+ instruction that is conditional. */ -+static void -+arm_output_it (emit_f emit, const char *flags, const char *cond) -+{ -+ rtx operands[1]; /* Don't actually use the operand. */ -+ if (TARGET_THUMB2) -+ arm_output_asm_insn (emit, 0, operands, "it%s\t%s", flags, cond); - } - - /* Helper to emit a two operand instruction. */ -@@ -23285,7 +24423,7 @@ - - required_value: - -- RTX register or const_int representing the required old_value for -+ RTX register representing the required old_value for - the modify to continue, if NULL no comparsion is performed. */ - static void - arm_output_sync_loop (emit_f emit, -@@ -23299,7 +24437,13 @@ - enum attr_sync_op sync_op, - int early_barrier_required) - { -- rtx operands[1]; -+ rtx operands[2]; -+ /* We'll use the lo for the normal rtx in the none-DI case -+ as well as the least-sig word in the DI case. */ -+ rtx old_value_lo, required_value_lo, new_value_lo, t1_lo; -+ rtx old_value_hi, required_value_hi, new_value_hi, t1_hi; -+ -+ bool is_di = mode == DImode; - - gcc_assert (t1 != t2); - -@@ -23310,82 +24454,142 @@ - - arm_output_ldrex (emit, mode, old_value, memory); - -+ if (is_di) -+ { -+ old_value_lo = gen_lowpart (SImode, old_value); -+ old_value_hi = gen_highpart (SImode, old_value); -+ if (required_value) -+ { -+ required_value_lo = gen_lowpart (SImode, required_value); -+ required_value_hi = gen_highpart (SImode, required_value); -+ } -+ else -+ { -+ /* Silence false potentially unused warning. */ -+ required_value_lo = NULL_RTX; -+ required_value_hi = NULL_RTX; -+ } -+ new_value_lo = gen_lowpart (SImode, new_value); -+ new_value_hi = gen_highpart (SImode, new_value); -+ t1_lo = gen_lowpart (SImode, t1); -+ t1_hi = gen_highpart (SImode, t1); -+ } -+ else -+ { -+ old_value_lo = old_value; -+ new_value_lo = new_value; -+ required_value_lo = required_value; -+ t1_lo = t1; -+ -+ /* Silence false potentially unused warning. */ -+ t1_hi = NULL_RTX; -+ new_value_hi = NULL_RTX; -+ required_value_hi = NULL_RTX; -+ old_value_hi = NULL_RTX; -+ } -+ - if (required_value) - { -- rtx operands[2]; -+ operands[0] = old_value_lo; -+ operands[1] = required_value_lo; - -- operands[0] = old_value; -- operands[1] = required_value; - arm_output_asm_insn (emit, 0, operands, "cmp\t%%0, %%1"); -+ if (is_di) -+ { -+ arm_output_it (emit, "", "eq"); -+ arm_output_op2 (emit, "cmpeq", old_value_hi, required_value_hi); -+ } - arm_output_asm_insn (emit, 0, operands, "bne\t%sLSYB%%=", LOCAL_LABEL_PREFIX); - } - - switch (sync_op) - { - case SYNC_OP_ADD: -- arm_output_op3 (emit, "add", t1, old_value, new_value); -+ arm_output_op3 (emit, is_di ? "adds" : "add", -+ t1_lo, old_value_lo, new_value_lo); -+ if (is_di) -+ arm_output_op3 (emit, "adc", t1_hi, old_value_hi, new_value_hi); - break; - - case SYNC_OP_SUB: -- arm_output_op3 (emit, "sub", t1, old_value, new_value); -+ arm_output_op3 (emit, is_di ? "subs" : "sub", -+ t1_lo, old_value_lo, new_value_lo); -+ if (is_di) -+ arm_output_op3 (emit, "sbc", t1_hi, old_value_hi, new_value_hi); - break; - - case SYNC_OP_IOR: -- arm_output_op3 (emit, "orr", t1, old_value, new_value); -+ arm_output_op3 (emit, "orr", t1_lo, old_value_lo, new_value_lo); -+ if (is_di) -+ arm_output_op3 (emit, "orr", t1_hi, old_value_hi, new_value_hi); - break; - - case SYNC_OP_XOR: -- arm_output_op3 (emit, "eor", t1, old_value, new_value); -+ arm_output_op3 (emit, "eor", t1_lo, old_value_lo, new_value_lo); -+ if (is_di) -+ arm_output_op3 (emit, "eor", t1_hi, old_value_hi, new_value_hi); - break; - - case SYNC_OP_AND: -- arm_output_op3 (emit,"and", t1, old_value, new_value); -+ arm_output_op3 (emit,"and", t1_lo, old_value_lo, new_value_lo); -+ if (is_di) -+ arm_output_op3 (emit, "and", t1_hi, old_value_hi, new_value_hi); - break; - - case SYNC_OP_NAND: -- arm_output_op3 (emit, "and", t1, old_value, new_value); -- arm_output_op2 (emit, "mvn", t1, t1); -+ arm_output_op3 (emit, "and", t1_lo, old_value_lo, new_value_lo); -+ if (is_di) -+ arm_output_op3 (emit, "and", t1_hi, old_value_hi, new_value_hi); -+ arm_output_op2 (emit, "mvn", t1_lo, t1_lo); -+ if (is_di) -+ arm_output_op2 (emit, "mvn", t1_hi, t1_hi); - break; - - case SYNC_OP_NONE: - t1 = new_value; -+ t1_lo = new_value_lo; -+ if (is_di) -+ t1_hi = new_value_hi; - break; - } - -+ /* Note that the result of strex is a 0/1 flag that's always 1 register. */ - if (t2) - { -- arm_output_strex (emit, mode, "", t2, t1, memory); -- operands[0] = t2; -- arm_output_asm_insn (emit, 0, operands, "teq\t%%0, #0"); -- arm_output_asm_insn (emit, 0, operands, "bne\t%sLSYT%%=", -- LOCAL_LABEL_PREFIX); -+ arm_output_strex (emit, mode, "", t2, t1, memory); -+ operands[0] = t2; -+ arm_output_asm_insn (emit, 0, operands, "teq\t%%0, #0"); -+ arm_output_asm_insn (emit, 0, operands, "bne\t%sLSYT%%=", -+ LOCAL_LABEL_PREFIX); - } - else - { - /* Use old_value for the return value because for some operations - the old_value can easily be restored. This saves one register. */ -- arm_output_strex (emit, mode, "", old_value, t1, memory); -- operands[0] = old_value; -+ arm_output_strex (emit, mode, "", old_value_lo, t1, memory); -+ operands[0] = old_value_lo; - arm_output_asm_insn (emit, 0, operands, "teq\t%%0, #0"); - arm_output_asm_insn (emit, 0, operands, "bne\t%sLSYT%%=", - LOCAL_LABEL_PREFIX); - -+ /* Note that we only used the _lo half of old_value as a temporary -+ so in DI we don't have to restore the _hi part. */ - switch (sync_op) - { - case SYNC_OP_ADD: -- arm_output_op3 (emit, "sub", old_value, t1, new_value); -+ arm_output_op3 (emit, "sub", old_value_lo, t1_lo, new_value_lo); - break; - - case SYNC_OP_SUB: -- arm_output_op3 (emit, "add", old_value, t1, new_value); -+ arm_output_op3 (emit, "add", old_value_lo, t1_lo, new_value_lo); - break; - - case SYNC_OP_XOR: -- arm_output_op3 (emit, "eor", old_value, t1, new_value); -+ arm_output_op3 (emit, "eor", old_value_lo, t1_lo, new_value_lo); - break; - - case SYNC_OP_NONE: -- arm_output_op2 (emit, "mov", old_value, required_value); -+ arm_output_op2 (emit, "mov", old_value_lo, required_value_lo); - break; - - default: -@@ -23393,8 +24597,11 @@ - } - } - -- arm_process_output_memory_barrier (emit, NULL); -+ /* Note: label is before barrier so that in cmp failure case we still get -+ a barrier to stop subsequent loads floating upwards past the ldrex -+ PR target/48126. */ - arm_output_asm_insn (emit, 1, operands, "%sLSYB%%=:", LOCAL_LABEL_PREFIX); -+ arm_process_output_memory_barrier (emit, NULL); - } - - static rtx -@@ -23488,7 +24695,7 @@ - target = gen_reg_rtx (mode); - - memory = arm_legitimize_sync_memory (memory); -- if (mode != SImode) -+ if (mode != SImode && mode != DImode) - { - rtx load_temp = gen_reg_rtx (SImode); - -@@ -23507,6 +24714,12 @@ - } - } - -+static unsigned int -+arm_autovectorize_vector_sizes (void) -+{ -+ return TARGET_NEON_VECTORIZE_DOUBLE ? 0 : (16 | 8); -+} -+ - static bool - arm_vector_alignment_reachable (const_tree type, bool is_packed) - { -@@ -23660,4 +24873,53 @@ - return NO_REGS; - } - -+/* Compute the atrribute "length" of insn "*push_multi". -+ So this function MUST be kept in sync with that insn pattern. */ -+int -+arm_attr_length_push_multi(rtx parallel_op, rtx first_op) -+{ -+ int i, regno, hi_reg; -+ int num_saves = XVECLEN (parallel_op, 0); -+ -+ /* ARM mode. */ -+ if (TARGET_ARM) -+ return 4; -+ -+ /* Thumb2 mode. */ -+ regno = REGNO (first_op); -+ hi_reg = (REGNO_REG_CLASS (regno) == HI_REGS) && (regno != LR_REGNUM); -+ for (i = 1; i < num_saves && !hi_reg; i++) -+ { -+ regno = REGNO (XEXP (XVECEXP (parallel_op, 0, i), 0)); -+ hi_reg |= (REGNO_REG_CLASS (regno) == HI_REGS) && (regno != LR_REGNUM); -+ } -+ -+ if (!hi_reg) -+ return 2; -+ return 4; -+} -+ -+int -+vfp3_const_double_for_fract_bits (rtx operand) -+{ -+ REAL_VALUE_TYPE r0; -+ -+ if (GET_CODE (operand) != CONST_DOUBLE) -+ return 0; -+ -+ REAL_VALUE_FROM_CONST_DOUBLE (r0, operand); -+ if (exact_real_inverse (DFmode, &r0)) -+ { -+ if (exact_real_truncate (DFmode, &r0)) -+ { -+ HOST_WIDE_INT value = real_to_integer (&r0); -+ value = value & 0xffffffff; -+ if ((value != 0) && ( (value & (value - 1)) == 0)) -+ return int_log2 (value); -+ } -+ } -+ return 0; -+} -+ - #include "gt-arm.h" -+ ---- a/src/gcc/config/arm/arm.h -+++ b/src/gcc/config/arm/arm.h -@@ -47,6 +47,8 @@ - { \ - if (TARGET_DSP_MULTIPLY) \ - builtin_define ("__ARM_FEATURE_DSP"); \ -+ if (unaligned_access) \ -+ builtin_define ("__ARM_FEATURE_UNALIGNED"); \ - /* Define __arm__ even when in thumb mode, for \ - consistency with armcc. */ \ - builtin_define ("__arm__"); \ -@@ -103,6 +105,8 @@ - builtin_define ("__ARM_PCS"); \ - builtin_define ("__ARM_EABI__"); \ - } \ -+ if (TARGET_IDIV) \ -+ builtin_define ("__ARM_ARCH_EXT_IDIV__"); \ - } while (0) - - /* The various ARM cores. */ -@@ -196,6 +200,7 @@ - Do not define this macro if it does not need to do anything. */ - #define EXTRA_SPECS \ - { "subtarget_cpp_spec", SUBTARGET_CPP_SPEC }, \ -+ { "asm_cpu_spec", ASM_CPU_SPEC }, \ - SUBTARGET_EXTRA_SPECS - - #ifndef SUBTARGET_EXTRA_SPECS -@@ -284,7 +289,8 @@ - (TARGET_32BIT && arm_arch6 && (arm_arch_notm || arm_arch7em)) - - /* Should MOVW/MOVT be used in preference to a constant pool. */ --#define TARGET_USE_MOVT (arm_arch_thumb2 && !optimize_size) -+#define TARGET_USE_MOVT \ -+ (arm_arch_thumb2 && !optimize_size && !current_tune->prefer_constant_pool) - - /* We could use unified syntax for arm mode, but for now we just use it - for Thumb-2. */ -@@ -294,7 +300,8 @@ - #define TARGET_HAVE_DMB (arm_arch7) - - /* Nonzero if this chip implements a memory barrier via CP15. */ --#define TARGET_HAVE_DMB_MCR (arm_arch6k && ! TARGET_HAVE_DMB) -+#define TARGET_HAVE_DMB_MCR (arm_arch6 && ! TARGET_HAVE_DMB \ -+ && ! TARGET_THUMB1) - - /* Nonzero if this chip implements a memory barrier instruction. */ - #define TARGET_HAVE_MEMORY_BARRIER (TARGET_HAVE_DMB || TARGET_HAVE_DMB_MCR) -@@ -302,8 +309,16 @@ - /* Nonzero if this chip supports ldrex and strex */ - #define TARGET_HAVE_LDREX ((arm_arch6 && TARGET_ARM) || arm_arch7) - --/* Nonzero if this chip supports ldrex{bhd} and strex{bhd}. */ --#define TARGET_HAVE_LDREXBHD ((arm_arch6k && TARGET_ARM) || arm_arch7) -+/* Nonzero if this chip supports ldrex{bh} and strex{bh}. */ -+#define TARGET_HAVE_LDREXBH ((arm_arch6k && TARGET_ARM) || arm_arch7) -+ -+/* Nonzero if this chip supports ldrexd and strexd. */ -+#define TARGET_HAVE_LDREXD (((arm_arch6k && TARGET_ARM) || arm_arch7) \ -+ && arm_arch_notm) -+ -+/* Nonzero if integer division instructions supported. */ -+#define TARGET_IDIV ((TARGET_ARM && arm_arch_arm_hwdiv) \ -+ || (TARGET_THUMB2 && arm_arch_thumb_hwdiv)) - - /* True iff the full BPABI is being used. If TARGET_BPABI is true, - then TARGET_AAPCS_BASED must be true -- but the converse does not -@@ -489,8 +504,11 @@ - /* Nonzero if chip supports Thumb 2. */ - extern int arm_arch_thumb2; - --/* Nonzero if chip supports integer division instruction. */ --extern int arm_arch_hwdiv; -+/* Nonzero if chip supports integer division instruction in ARM mode. */ -+extern int arm_arch_arm_hwdiv; -+ -+/* Nonzero if chip supports integer division instruction in Thumb mode. */ -+extern int arm_arch_thumb_hwdiv; - - #ifndef TARGET_DEFAULT - #define TARGET_DEFAULT (MASK_APCS_FRAME) -@@ -1171,12 +1189,12 @@ - } - - /* FPA registers can't do subreg as all values are reformatted to internal -- precision. VFP registers may only be accessed in the mode they -- were set. */ --#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ -- (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \ -- ? reg_classes_intersect_p (FPA_REGS, (CLASS)) \ -- || reg_classes_intersect_p (VFP_REGS, (CLASS)) \ -+ precision. In VFPv1, VFP registers could only be accessed in the mode -+ they were set, so subregs would be invalid there too. However, we don't -+ support VFPv1 at the moment, and the restriction was lifted in VFPv2. */ -+#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ -+ (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \ -+ ? reg_classes_intersect_p (FPA_REGS, (CLASS)) \ - : 0) - - /* The class value for index registers, and the one for base regs. */ -@@ -1187,7 +1205,7 @@ - when addressing quantities in QI or HI mode; if we don't know the - mode, then we must be conservative. */ - #define MODE_BASE_REG_CLASS(MODE) \ -- (TARGET_32BIT ? CORE_REGS : \ -+ (TARGET_ARM || (TARGET_THUMB2 && !optimize_size) ? CORE_REGS : \ - (((MODE) == SImode) ? BASE_REGS : LO_REGS)) - - /* For Thumb we can not support SP+reg addressing, so we return LO_REGS -@@ -1777,27 +1795,6 @@ - #define TARGET_DEFAULT_WORD_RELOCATIONS 0 - #endif - --/* Nonzero if the constant value X is a legitimate general operand. -- It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. -- -- On the ARM, allow any integer (invalid ones are removed later by insn -- patterns), nice doubles and symbol_refs which refer to the function's -- constant pool XXX. -- -- When generating pic allow anything. */ --#define ARM_LEGITIMATE_CONSTANT_P(X) (flag_pic || ! label_mentioned_p (X)) -- --#define THUMB_LEGITIMATE_CONSTANT_P(X) \ -- ( GET_CODE (X) == CONST_INT \ -- || GET_CODE (X) == CONST_DOUBLE \ -- || CONSTANT_ADDRESS_P (X) \ -- || flag_pic) -- --#define LEGITIMATE_CONSTANT_P(X) \ -- (!arm_cannot_force_const_mem (X) \ -- && (TARGET_32BIT ? ARM_LEGITIMATE_CONSTANT_P (X) \ -- : THUMB_LEGITIMATE_CONSTANT_P (X))) -- - #ifndef SUBTARGET_NAME_ENCODING_LENGTHS - #define SUBTARGET_NAME_ENCODING_LENGTHS - #endif -@@ -1972,7 +1969,7 @@ - : min >= -4096 && max < 4096 \ - ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 0, HImode) \ - : SImode) \ -- : ((min < 0 || max >= 0x2000 || !TARGET_THUMB2) ? SImode \ -+ : ((min < 0 || max >= 0x20000 || !TARGET_THUMB2) ? SImode \ - : (max >= 0x200) ? HImode \ - : QImode)) - -@@ -2041,7 +2038,8 @@ - /* Try to generate sequences that don't involve branches, we can then use - conditional instructions */ - #define BRANCH_COST(speed_p, predictable_p) \ -- (TARGET_32BIT ? 4 : (optimize > 0 ? 2 : 0)) -+ (current_tune->branch_cost (speed_p, predictable_p)) -+ - - /* Position Independent Code. */ - /* We decide which register to use based on the compilation options and -@@ -2279,178 +2277,6 @@ - : arm_gen_return_addr_mask ()) - - --/* Neon defines builtins from ARM_BUILTIN_MAX upwards, though they don't have -- symbolic names defined here (which would require too much duplication). -- FIXME? */ --enum arm_builtins --{ -- ARM_BUILTIN_GETWCX, -- ARM_BUILTIN_SETWCX, -- -- ARM_BUILTIN_WZERO, -- -- ARM_BUILTIN_WAVG2BR, -- ARM_BUILTIN_WAVG2HR, -- ARM_BUILTIN_WAVG2B, -- ARM_BUILTIN_WAVG2H, -- -- ARM_BUILTIN_WACCB, -- ARM_BUILTIN_WACCH, -- ARM_BUILTIN_WACCW, -- -- ARM_BUILTIN_WMACS, -- ARM_BUILTIN_WMACSZ, -- ARM_BUILTIN_WMACU, -- ARM_BUILTIN_WMACUZ, -- -- ARM_BUILTIN_WSADB, -- ARM_BUILTIN_WSADBZ, -- ARM_BUILTIN_WSADH, -- ARM_BUILTIN_WSADHZ, -- -- ARM_BUILTIN_WALIGN, -- -- ARM_BUILTIN_TMIA, -- ARM_BUILTIN_TMIAPH, -- ARM_BUILTIN_TMIABB, -- ARM_BUILTIN_TMIABT, -- ARM_BUILTIN_TMIATB, -- ARM_BUILTIN_TMIATT, -- -- ARM_BUILTIN_TMOVMSKB, -- ARM_BUILTIN_TMOVMSKH, -- ARM_BUILTIN_TMOVMSKW, -- -- ARM_BUILTIN_TBCSTB, -- ARM_BUILTIN_TBCSTH, -- ARM_BUILTIN_TBCSTW, -- -- ARM_BUILTIN_WMADDS, -- ARM_BUILTIN_WMADDU, -- -- ARM_BUILTIN_WPACKHSS, -- ARM_BUILTIN_WPACKWSS, -- ARM_BUILTIN_WPACKDSS, -- ARM_BUILTIN_WPACKHUS, -- ARM_BUILTIN_WPACKWUS, -- ARM_BUILTIN_WPACKDUS, -- -- ARM_BUILTIN_WADDB, -- ARM_BUILTIN_WADDH, -- ARM_BUILTIN_WADDW, -- ARM_BUILTIN_WADDSSB, -- ARM_BUILTIN_WADDSSH, -- ARM_BUILTIN_WADDSSW, -- ARM_BUILTIN_WADDUSB, -- ARM_BUILTIN_WADDUSH, -- ARM_BUILTIN_WADDUSW, -- ARM_BUILTIN_WSUBB, -- ARM_BUILTIN_WSUBH, -- ARM_BUILTIN_WSUBW, -- ARM_BUILTIN_WSUBSSB, -- ARM_BUILTIN_WSUBSSH, -- ARM_BUILTIN_WSUBSSW, -- ARM_BUILTIN_WSUBUSB, -- ARM_BUILTIN_WSUBUSH, -- ARM_BUILTIN_WSUBUSW, -- -- ARM_BUILTIN_WAND, -- ARM_BUILTIN_WANDN, -- ARM_BUILTIN_WOR, -- ARM_BUILTIN_WXOR, -- -- ARM_BUILTIN_WCMPEQB, -- ARM_BUILTIN_WCMPEQH, -- ARM_BUILTIN_WCMPEQW, -- ARM_BUILTIN_WCMPGTUB, -- ARM_BUILTIN_WCMPGTUH, -- ARM_BUILTIN_WCMPGTUW, -- ARM_BUILTIN_WCMPGTSB, -- ARM_BUILTIN_WCMPGTSH, -- ARM_BUILTIN_WCMPGTSW, -- -- ARM_BUILTIN_TEXTRMSB, -- ARM_BUILTIN_TEXTRMSH, -- ARM_BUILTIN_TEXTRMSW, -- ARM_BUILTIN_TEXTRMUB, -- ARM_BUILTIN_TEXTRMUH, -- ARM_BUILTIN_TEXTRMUW, -- ARM_BUILTIN_TINSRB, -- ARM_BUILTIN_TINSRH, -- ARM_BUILTIN_TINSRW, -- -- ARM_BUILTIN_WMAXSW, -- ARM_BUILTIN_WMAXSH, -- ARM_BUILTIN_WMAXSB, -- ARM_BUILTIN_WMAXUW, -- ARM_BUILTIN_WMAXUH, -- ARM_BUILTIN_WMAXUB, -- ARM_BUILTIN_WMINSW, -- ARM_BUILTIN_WMINSH, -- ARM_BUILTIN_WMINSB, -- ARM_BUILTIN_WMINUW, -- ARM_BUILTIN_WMINUH, -- ARM_BUILTIN_WMINUB, -- -- ARM_BUILTIN_WMULUM, -- ARM_BUILTIN_WMULSM, -- ARM_BUILTIN_WMULUL, -- -- ARM_BUILTIN_PSADBH, -- ARM_BUILTIN_WSHUFH, -- -- ARM_BUILTIN_WSLLH, -- ARM_BUILTIN_WSLLW, -- ARM_BUILTIN_WSLLD, -- ARM_BUILTIN_WSRAH, -- ARM_BUILTIN_WSRAW, -- ARM_BUILTIN_WSRAD, -- ARM_BUILTIN_WSRLH, -- ARM_BUILTIN_WSRLW, -- ARM_BUILTIN_WSRLD, -- ARM_BUILTIN_WRORH, -- ARM_BUILTIN_WRORW, -- ARM_BUILTIN_WRORD, -- ARM_BUILTIN_WSLLHI, -- ARM_BUILTIN_WSLLWI, -- ARM_BUILTIN_WSLLDI, -- ARM_BUILTIN_WSRAHI, -- ARM_BUILTIN_WSRAWI, -- ARM_BUILTIN_WSRADI, -- ARM_BUILTIN_WSRLHI, -- ARM_BUILTIN_WSRLWI, -- ARM_BUILTIN_WSRLDI, -- ARM_BUILTIN_WRORHI, -- ARM_BUILTIN_WRORWI, -- ARM_BUILTIN_WRORDI, -- -- ARM_BUILTIN_WUNPCKIHB, -- ARM_BUILTIN_WUNPCKIHH, -- ARM_BUILTIN_WUNPCKIHW, -- ARM_BUILTIN_WUNPCKILB, -- ARM_BUILTIN_WUNPCKILH, -- ARM_BUILTIN_WUNPCKILW, -- -- ARM_BUILTIN_WUNPCKEHSB, -- ARM_BUILTIN_WUNPCKEHSH, -- ARM_BUILTIN_WUNPCKEHSW, -- ARM_BUILTIN_WUNPCKEHUB, -- ARM_BUILTIN_WUNPCKEHUH, -- ARM_BUILTIN_WUNPCKEHUW, -- ARM_BUILTIN_WUNPCKELSB, -- ARM_BUILTIN_WUNPCKELSH, -- ARM_BUILTIN_WUNPCKELSW, -- ARM_BUILTIN_WUNPCKELUB, -- ARM_BUILTIN_WUNPCKELUH, -- ARM_BUILTIN_WUNPCKELUW, -- -- ARM_BUILTIN_THREAD_POINTER, -- -- ARM_BUILTIN_NEON_BASE, -- -- ARM_BUILTIN_MAX = ARM_BUILTIN_NEON_BASE /* FIXME: Wrong! */ --}; -- - /* Do not emit .note.GNU-stack by default. */ - #ifndef NEED_INDICATE_EXEC_STACK - #define NEED_INDICATE_EXEC_STACK 0 -@@ -2460,4 +2286,25 @@ - instruction. */ - #define MAX_LDM_STM_OPS 4 - -+#define ASM_CPU_SPEC \ -+ " %{mcpu=generic-*:-march=%*;" \ -+ " :%{mcpu=*:-mcpu=%*} %{march=*:-march=%*}}" -+ -+/* -mcpu=native handling only makes sense with compiler running on -+ an ARM chip. */ -+#if defined(__arm__) -+extern const char *host_detect_local_cpu (int argc, const char **argv); -+# define EXTRA_SPEC_FUNCTIONS \ -+ { "local_cpu_detect", host_detect_local_cpu }, -+ -+# define MCPU_MTUNE_NATIVE_SPECS \ -+ " %{march=native:%<march=native %:local_cpu_detect(arch)}" \ -+ " %{mcpu=native:%<mcpu=native %:local_cpu_detect(cpu)}" \ -+ " %{mtune=native:%<mtune=native %:local_cpu_detect(tune)}" -+#else -+# define MCPU_MTUNE_NATIVE_SPECS "" -+#endif -+ -+#define DRIVER_SELF_SPECS MCPU_MTUNE_NATIVE_SPECS -+ - #endif /* ! GCC_ARM_H */ ---- a/src/gcc/config/arm/arm.md -+++ b/src/gcc/config/arm/arm.md -@@ -48,6 +48,15 @@ - (DOM_CC_X_OR_Y 2) - ] - ) -+;; conditional compare combination -+(define_constants -+ [(CMP_CMP 0) -+ (CMN_CMP 1) -+ (CMP_CMN 2) -+ (CMN_CMN 3) -+ (NUM_OF_COND_CMP 4) -+ ] -+) - - ;; UNSPEC Usage: - ;; Note: sin and cos are no-longer used. -@@ -104,6 +113,10 @@ - (UNSPEC_SYMBOL_OFFSET 27) ; The offset of the start of the symbol from - ; another symbolic address. - (UNSPEC_MEMORY_BARRIER 28) ; Represent a memory barrier. -+ (UNSPEC_UNALIGNED_LOAD 29) ; Used to represent ldr/ldrh instructions that access -+ ; unaligned locations, on architectures which support -+ ; that. -+ (UNSPEC_UNALIGNED_STORE 30) ; Same for str/strh. - ] - ) - -@@ -332,6 +345,13 @@ - (const_string "mult") - (const_string "alu"))) - -+; Is this an (integer side) multiply with a 64-bit result? -+(define_attr "mul64" "no,yes" -+ (if_then_else -+ (eq_attr "insn" "smlalxy,umull,umulls,umlal,umlals,smull,smulls,smlal,smlals") -+ (const_string "yes") -+ (const_string "no"))) -+ - ; Load scheduling, set from the arm_ld_sched variable - ; initialized by arm_option_override() - (define_attr "ldsched" "no,yes" (const (symbol_ref "arm_ld_sched"))) -@@ -490,7 +510,7 @@ - - (define_attr "tune_cortexr4" "yes,no" - (const (if_then_else -- (eq_attr "tune" "cortexr4,cortexr4f") -+ (eq_attr "tune" "cortexr4,cortexr4f,cortexr5") - (const_string "yes") - (const_string "no")))) - -@@ -498,7 +518,7 @@ - - (define_attr "generic_sched" "yes,no" - (const (if_then_else -- (ior (eq_attr "tune" "fa526,fa626,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1020e,arm1026ejs,arm1136js,arm1136jfs,cortexa5,cortexa8,cortexa9,cortexm4") -+ (ior (eq_attr "tune" "fa526,fa626,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1020e,arm1026ejs,arm1136js,arm1136jfs,cortexa5,cortexa8,cortexa9,cortexa15,cortexm4") - (eq_attr "tune_cortexr4" "yes")) - (const_string "no") - (const_string "yes")))) -@@ -524,6 +544,7 @@ - (include "cortex-a5.md") - (include "cortex-a8.md") - (include "cortex-a9.md") -+(include "cortex-a15.md") - (include "cortex-r4.md") - (include "cortex-r4f.md") - (include "cortex-m4.md") -@@ -701,21 +722,24 @@ - ;; (plus (reg rN) (reg sp)) into (reg rN). In this case reload will - ;; put the duplicated register first, and not try the commutative version. - (define_insn_and_split "*arm_addsi3" -- [(set (match_operand:SI 0 "s_register_operand" "=r, k,r,r, k,r") -- (plus:SI (match_operand:SI 1 "s_register_operand" "%rk,k,r,rk,k,rk") -- (match_operand:SI 2 "reg_or_int_operand" "rI,rI,k,L, L,?n")))] -+ [(set (match_operand:SI 0 "s_register_operand" "=r, k,r,r, k, r, k,r, k, r") -+ (plus:SI (match_operand:SI 1 "s_register_operand" "%rk,k,r,rk,k, rk,k,rk,k, rk") -+ (match_operand:SI 2 "reg_or_int_operand" "rI,rI,k,Pj,Pj,L, L,PJ,PJ,?n")))] - "TARGET_32BIT" - "@ - add%?\\t%0, %1, %2 - add%?\\t%0, %1, %2 - add%?\\t%0, %2, %1 -+ addw%?\\t%0, %1, %2 -+ addw%?\\t%0, %1, %2 - sub%?\\t%0, %1, #%n2 - sub%?\\t%0, %1, #%n2 -+ subw%?\\t%0, %1, #%n2 -+ subw%?\\t%0, %1, #%n2 - #" - "TARGET_32BIT - && GET_CODE (operands[2]) == CONST_INT -- && !(const_ok_for_arm (INTVAL (operands[2])) -- || const_ok_for_arm (-INTVAL (operands[2]))) -+ && !const_ok_for_op (INTVAL (operands[2]), PLUS) - && (reload_completed || !arm_eliminable_register (operands[1]))" - [(clobber (const_int 0))] - " -@@ -724,8 +748,9 @@ - operands[1], 0); - DONE; - " -- [(set_attr "length" "4,4,4,4,4,16") -- (set_attr "predicable" "yes")] -+ [(set_attr "length" "4,4,4,4,4,4,4,4,4,16") -+ (set_attr "predicable" "yes") -+ (set_attr "arch" "*,*,*,t2,t2,*,*,t2,t2,*")] - ) - - (define_insn_and_split "*thumb1_addsi3" -@@ -791,7 +816,7 @@ - "" - ) - --(define_insn "*addsi3_compare0" -+(define_insn "addsi3_compare0" - [(set (reg:CC_NOOV CC_REGNUM) - (compare:CC_NOOV - (plus:SI (match_operand:SI 1 "s_register_operand" "r, r") -@@ -1806,7 +1831,37 @@ - (set_attr "predicable" "yes")] - ) - --(define_insn "*maddhidi4" -+;; Note: there is no maddhisi4ibt because this one is canonical form -+(define_insn "*maddhisi4tb" -+ [(set (match_operand:SI 0 "s_register_operand" "=r") -+ (plus:SI (mult:SI (ashiftrt:SI -+ (match_operand:SI 1 "s_register_operand" "r") -+ (const_int 16)) -+ (sign_extend:SI -+ (match_operand:HI 2 "s_register_operand" "r"))) -+ (match_operand:SI 3 "s_register_operand" "r")))] -+ "TARGET_DSP_MULTIPLY" -+ "smlatb%?\\t%0, %1, %2, %3" -+ [(set_attr "insn" "smlaxy") -+ (set_attr "predicable" "yes")] -+) -+ -+(define_insn "*maddhisi4tt" -+ [(set (match_operand:SI 0 "s_register_operand" "=r") -+ (plus:SI (mult:SI (ashiftrt:SI -+ (match_operand:SI 1 "s_register_operand" "r") -+ (const_int 16)) -+ (ashiftrt:SI -+ (match_operand:SI 2 "s_register_operand" "r") -+ (const_int 16))) -+ (match_operand:SI 3 "s_register_operand" "r")))] -+ "TARGET_DSP_MULTIPLY" -+ "smlatt%?\\t%0, %1, %2, %3" -+ [(set_attr "insn" "smlaxy") -+ (set_attr "predicable" "yes")] -+) -+ -+(define_insn "maddhidi4" - [(set (match_operand:DI 0 "s_register_operand" "=r") - (plus:DI - (mult:DI (sign_extend:DI -@@ -1819,6 +1874,39 @@ - [(set_attr "insn" "smlalxy") - (set_attr "predicable" "yes")]) - -+;; Note: there is no maddhidi4ibt because this one is canonical form -+(define_insn "*maddhidi4tb" -+ [(set (match_operand:DI 0 "s_register_operand" "=r") -+ (plus:DI -+ (mult:DI (sign_extend:DI -+ (ashiftrt:SI -+ (match_operand:SI 1 "s_register_operand" "r") -+ (const_int 16))) -+ (sign_extend:DI -+ (match_operand:HI 2 "s_register_operand" "r"))) -+ (match_operand:DI 3 "s_register_operand" "0")))] -+ "TARGET_DSP_MULTIPLY" -+ "smlaltb%?\\t%Q0, %R0, %1, %2" -+ [(set_attr "insn" "smlalxy") -+ (set_attr "predicable" "yes")]) -+ -+(define_insn "*maddhidi4tt" -+ [(set (match_operand:DI 0 "s_register_operand" "=r") -+ (plus:DI -+ (mult:DI (sign_extend:DI -+ (ashiftrt:SI -+ (match_operand:SI 1 "s_register_operand" "r") -+ (const_int 16))) -+ (sign_extend:DI -+ (ashiftrt:SI -+ (match_operand:SI 2 "s_register_operand" "r") -+ (const_int 16)))) -+ (match_operand:DI 3 "s_register_operand" "0")))] -+ "TARGET_DSP_MULTIPLY" -+ "smlaltt%?\\t%Q0, %R0, %1, %2" -+ [(set_attr "insn" "smlalxy") -+ (set_attr "predicable" "yes")]) -+ - (define_expand "mulsf3" - [(set (match_operand:SF 0 "s_register_operand" "") - (mult:SF (match_operand:SF 1 "s_register_operand" "") -@@ -2384,10 +2472,10 @@ - ;;; this insv pattern, so this pattern needs to be reevalutated. - - (define_expand "insv" -- [(set (zero_extract:SI (match_operand:SI 0 "s_register_operand" "") -- (match_operand:SI 1 "general_operand" "") -- (match_operand:SI 2 "general_operand" "")) -- (match_operand:SI 3 "reg_or_int_operand" ""))] -+ [(set (zero_extract (match_operand 0 "nonimmediate_operand" "") -+ (match_operand 1 "general_operand" "") -+ (match_operand 2 "general_operand" "")) -+ (match_operand 3 "reg_or_int_operand" ""))] - "TARGET_ARM || arm_arch_thumb2" - " - { -@@ -2398,35 +2486,70 @@ - - if (arm_arch_thumb2) - { -- bool use_bfi = TRUE; -- -- if (GET_CODE (operands[3]) == CONST_INT) -+ if (unaligned_access && MEM_P (operands[0]) -+ && s_register_operand (operands[3], GET_MODE (operands[3])) -+ && (width == 16 || width == 32) && (start_bit % BITS_PER_UNIT) == 0) - { -- HOST_WIDE_INT val = INTVAL (operands[3]) & mask; -+ rtx base_addr; -+ -+ if (BYTES_BIG_ENDIAN) -+ start_bit = GET_MODE_BITSIZE (GET_MODE (operands[3])) - width -+ - start_bit; - -- if (val == 0) -+ if (width == 32) - { -- emit_insn (gen_insv_zero (operands[0], operands[1], -- operands[2])); -- DONE; -+ base_addr = adjust_address (operands[0], SImode, -+ start_bit / BITS_PER_UNIT); -+ emit_insn (gen_unaligned_storesi (base_addr, operands[3])); - } -+ else -+ { -+ rtx tmp = gen_reg_rtx (HImode); - -- /* See if the set can be done with a single orr instruction. */ -- if (val == mask && const_ok_for_arm (val << start_bit)) -- use_bfi = FALSE; -+ base_addr = adjust_address (operands[0], HImode, -+ start_bit / BITS_PER_UNIT); -+ emit_move_insn (tmp, gen_lowpart (HImode, operands[3])); -+ emit_insn (gen_unaligned_storehi (base_addr, tmp)); -+ } -+ DONE; - } -- -- if (use_bfi) -+ else if (s_register_operand (operands[0], GET_MODE (operands[0]))) - { -- if (GET_CODE (operands[3]) != REG) -- operands[3] = force_reg (SImode, operands[3]); -+ bool use_bfi = TRUE; - -- emit_insn (gen_insv_t2 (operands[0], operands[1], operands[2], -- operands[3])); -- DONE; -+ if (GET_CODE (operands[3]) == CONST_INT) -+ { -+ HOST_WIDE_INT val = INTVAL (operands[3]) & mask; -+ -+ if (val == 0) -+ { -+ emit_insn (gen_insv_zero (operands[0], operands[1], -+ operands[2])); -+ DONE; -+ } -+ -+ /* See if the set can be done with a single orr instruction. */ -+ if (val == mask && const_ok_for_arm (val << start_bit)) -+ use_bfi = FALSE; -+ } -+ -+ if (use_bfi) -+ { -+ if (GET_CODE (operands[3]) != REG) -+ operands[3] = force_reg (SImode, operands[3]); -+ -+ emit_insn (gen_insv_t2 (operands[0], operands[1], operands[2], -+ operands[3])); -+ DONE; -+ } - } -+ else -+ FAIL; - } - -+ if (!s_register_operand (operands[0], GET_MODE (operands[0]))) -+ FAIL; -+ - target = copy_rtx (operands[0]); - /* Avoid using a subreg as a subtarget, and avoid writing a paradoxical - subreg as the final target. */ -@@ -3618,12 +3741,10 @@ - ;; to reduce register pressure later on. - - (define_expand "extzv" -- [(set (match_dup 4) -- (ashift:SI (match_operand:SI 1 "register_operand" "") -- (match_operand:SI 2 "const_int_operand" ""))) -- (set (match_operand:SI 0 "register_operand" "") -- (lshiftrt:SI (match_dup 4) -- (match_operand:SI 3 "const_int_operand" "")))] -+ [(set (match_operand 0 "s_register_operand" "") -+ (zero_extract (match_operand 1 "nonimmediate_operand" "") -+ (match_operand 2 "const_int_operand" "") -+ (match_operand 3 "const_int_operand" "")))] - "TARGET_THUMB1 || arm_arch_thumb2" - " - { -@@ -3632,10 +3753,57 @@ - - if (arm_arch_thumb2) - { -- emit_insn (gen_extzv_t2 (operands[0], operands[1], operands[2], -- operands[3])); -- DONE; -+ HOST_WIDE_INT width = INTVAL (operands[2]); -+ HOST_WIDE_INT bitpos = INTVAL (operands[3]); -+ -+ if (unaligned_access && MEM_P (operands[1]) -+ && (width == 16 || width == 32) && (bitpos % BITS_PER_UNIT) == 0) -+ { -+ rtx base_addr; -+ -+ if (BYTES_BIG_ENDIAN) -+ bitpos = GET_MODE_BITSIZE (GET_MODE (operands[0])) - width -+ - bitpos; -+ -+ if (width == 32) -+ { -+ base_addr = adjust_address (operands[1], SImode, -+ bitpos / BITS_PER_UNIT); -+ emit_insn (gen_unaligned_loadsi (operands[0], base_addr)); -+ } -+ else -+ { -+ rtx dest = operands[0]; -+ rtx tmp = gen_reg_rtx (SImode); -+ -+ /* We may get a paradoxical subreg here. Strip it off. */ -+ if (GET_CODE (dest) == SUBREG -+ && GET_MODE (dest) == SImode -+ && GET_MODE (SUBREG_REG (dest)) == HImode) -+ dest = SUBREG_REG (dest); -+ -+ if (GET_MODE_BITSIZE (GET_MODE (dest)) != width) -+ FAIL; -+ -+ base_addr = adjust_address (operands[1], HImode, -+ bitpos / BITS_PER_UNIT); -+ emit_insn (gen_unaligned_loadhiu (tmp, base_addr)); -+ emit_move_insn (gen_lowpart (SImode, dest), tmp); -+ } -+ DONE; -+ } -+ else if (s_register_operand (operands[1], GET_MODE (operands[1]))) -+ { -+ emit_insn (gen_extzv_t2 (operands[0], operands[1], operands[2], -+ operands[3])); -+ DONE; -+ } -+ else -+ FAIL; - } -+ -+ if (!s_register_operand (operands[1], GET_MODE (operands[1]))) -+ FAIL; - - operands[3] = GEN_INT (rshift); - -@@ -3645,12 +3813,154 @@ - DONE; - } - -- operands[2] = GEN_INT (lshift); -- operands[4] = gen_reg_rtx (SImode); -+ emit_insn (gen_extzv_t1 (operands[0], operands[1], GEN_INT (lshift), -+ operands[3], gen_reg_rtx (SImode))); -+ DONE; - }" - ) - --(define_insn "extv" -+;; Helper for extzv, for the Thumb-1 register-shifts case. -+ -+(define_expand "extzv_t1" -+ [(set (match_operand:SI 4 "s_register_operand" "") -+ (ashift:SI (match_operand:SI 1 "nonimmediate_operand" "") -+ (match_operand:SI 2 "const_int_operand" ""))) -+ (set (match_operand:SI 0 "s_register_operand" "") -+ (lshiftrt:SI (match_dup 4) -+ (match_operand:SI 3 "const_int_operand" "")))] -+ "TARGET_THUMB1" -+ "") -+ -+(define_expand "extv" -+ [(set (match_operand 0 "s_register_operand" "") -+ (sign_extract (match_operand 1 "nonimmediate_operand" "") -+ (match_operand 2 "const_int_operand" "") -+ (match_operand 3 "const_int_operand" "")))] -+ "arm_arch_thumb2" -+{ -+ HOST_WIDE_INT width = INTVAL (operands[2]); -+ HOST_WIDE_INT bitpos = INTVAL (operands[3]); -+ -+ if (unaligned_access && MEM_P (operands[1]) && (width == 16 || width == 32) -+ && (bitpos % BITS_PER_UNIT) == 0) -+ { -+ rtx base_addr; -+ -+ if (BYTES_BIG_ENDIAN) -+ bitpos = GET_MODE_BITSIZE (GET_MODE (operands[0])) - width - bitpos; -+ -+ if (width == 32) -+ { -+ base_addr = adjust_address (operands[1], SImode, -+ bitpos / BITS_PER_UNIT); -+ emit_insn (gen_unaligned_loadsi (operands[0], base_addr)); -+ } -+ else -+ { -+ rtx dest = operands[0]; -+ rtx tmp = gen_reg_rtx (SImode); -+ -+ /* We may get a paradoxical subreg here. Strip it off. */ -+ if (GET_CODE (dest) == SUBREG -+ && GET_MODE (dest) == SImode -+ && GET_MODE (SUBREG_REG (dest)) == HImode) -+ dest = SUBREG_REG (dest); -+ -+ if (GET_MODE_BITSIZE (GET_MODE (dest)) != width) -+ FAIL; -+ -+ base_addr = adjust_address (operands[1], HImode, -+ bitpos / BITS_PER_UNIT); -+ emit_insn (gen_unaligned_loadhis (tmp, base_addr)); -+ emit_move_insn (gen_lowpart (SImode, dest), tmp); -+ } -+ -+ DONE; -+ } -+ else if (!s_register_operand (operands[1], GET_MODE (operands[1]))) -+ FAIL; -+ else if (GET_MODE (operands[0]) == SImode -+ && GET_MODE (operands[1]) == SImode) -+ { -+ emit_insn (gen_extv_regsi (operands[0], operands[1], operands[2], -+ operands[3])); -+ DONE; -+ } -+ -+ FAIL; -+}) -+ -+; Helper to expand register forms of extv with the proper modes. -+ -+(define_expand "extv_regsi" -+ [(set (match_operand:SI 0 "s_register_operand" "") -+ (sign_extract:SI (match_operand:SI 1 "s_register_operand" "") -+ (match_operand 2 "const_int_operand" "") -+ (match_operand 3 "const_int_operand" "")))] -+ "" -+{ -+}) -+ -+; ARMv6+ unaligned load/store instructions (used for packed structure accesses). -+ -+(define_insn "unaligned_loadsi" -+ [(set (match_operand:SI 0 "s_register_operand" "=l,r") -+ (unspec:SI [(match_operand:SI 1 "memory_operand" "Uw,m")] -+ UNSPEC_UNALIGNED_LOAD))] -+ "unaligned_access && TARGET_32BIT" -+ "ldr%?\t%0, %1\t@ unaligned" -+ [(set_attr "arch" "t2,any") -+ (set_attr "length" "2,4") -+ (set_attr "predicable" "yes") -+ (set_attr "type" "load1")]) -+ -+(define_insn "unaligned_loadhis" -+ [(set (match_operand:SI 0 "s_register_operand" "=l,r") -+ (sign_extend:SI -+ (unspec:HI [(match_operand:HI 1 "memory_operand" "Uw,m")] -+ UNSPEC_UNALIGNED_LOAD)))] -+ "unaligned_access && TARGET_32BIT" -+ "ldr%(sh%)\t%0, %1\t@ unaligned" -+ [(set_attr "arch" "t2,any") -+ (set_attr "length" "2,4") -+ (set_attr "predicable" "yes") -+ (set_attr "type" "load_byte")]) -+ -+(define_insn "unaligned_loadhiu" -+ [(set (match_operand:SI 0 "s_register_operand" "=l,r") -+ (zero_extend:SI -+ (unspec:HI [(match_operand:HI 1 "memory_operand" "Uw,m")] -+ UNSPEC_UNALIGNED_LOAD)))] -+ "unaligned_access && TARGET_32BIT" -+ "ldr%(h%)\t%0, %1\t@ unaligned" -+ [(set_attr "arch" "t2,any") -+ (set_attr "length" "2,4") -+ (set_attr "predicable" "yes") -+ (set_attr "type" "load_byte")]) -+ -+(define_insn "unaligned_storesi" -+ [(set (match_operand:SI 0 "memory_operand" "=Uw,m") -+ (unspec:SI [(match_operand:SI 1 "s_register_operand" "l,r")] -+ UNSPEC_UNALIGNED_STORE))] -+ "unaligned_access && TARGET_32BIT" -+ "str%?\t%1, %0\t@ unaligned" -+ [(set_attr "arch" "t2,any") -+ (set_attr "length" "2,4") -+ (set_attr "predicable" "yes") -+ (set_attr "type" "store1")]) -+ -+(define_insn "unaligned_storehi" -+ [(set (match_operand:HI 0 "memory_operand" "=Uw,m") -+ (unspec:HI [(match_operand:HI 1 "s_register_operand" "l,r")] -+ UNSPEC_UNALIGNED_STORE))] -+ "unaligned_access && TARGET_32BIT" -+ "str%(h%)\t%1, %0\t@ unaligned" -+ [(set_attr "arch" "t2,any") -+ (set_attr "length" "2,4") -+ (set_attr "predicable" "yes") -+ (set_attr "type" "store1")]) -+ -+(define_insn "*extv_reg" - [(set (match_operand:SI 0 "s_register_operand" "=r") - (sign_extract:SI (match_operand:SI 1 "s_register_operand" "r") - (match_operand:SI 2 "const_int_operand" "M") -@@ -3672,6 +3982,28 @@ - (set_attr "predicable" "yes")] - ) - -+ -+;; Division instructions -+(define_insn "divsi3" -+ [(set (match_operand:SI 0 "s_register_operand" "=r") -+ (div:SI (match_operand:SI 1 "s_register_operand" "r") -+ (match_operand:SI 2 "s_register_operand" "r")))] -+ "TARGET_IDIV" -+ "sdiv%?\t%0, %1, %2" -+ [(set_attr "predicable" "yes") -+ (set_attr "insn" "sdiv")] -+) -+ -+(define_insn "udivsi3" -+ [(set (match_operand:SI 0 "s_register_operand" "=r") -+ (udiv:SI (match_operand:SI 1 "s_register_operand" "r") -+ (match_operand:SI 2 "s_register_operand" "r")))] -+ "TARGET_IDIV" -+ "udiv%?\t%0, %1, %2" -+ [(set_attr "predicable" "yes") -+ (set_attr "insn" "udiv")] -+) -+ - - ;; Unary arithmetic insns - -@@ -4044,8 +4376,8 @@ - - (define_insn "zero_extend<mode>di2" - [(set (match_operand:DI 0 "s_register_operand" "=r") -- (zero_extend:DI (match_operand:QHSI 1 "<qhs_extenddi_op>" -- "<qhs_extenddi_cstr>")))] -+ (zero_extend:DI (match_operand:QHSI 1 "<qhs_zextenddi_op>" -+ "<qhs_zextenddi_cstr>")))] - "TARGET_32BIT <qhs_zextenddi_cond>" - "#" - [(set_attr "length" "8") -@@ -5937,8 +6269,8 @@ - - - (define_insn "*arm_movqi_insn" -- [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r,m") -- (match_operand:QI 1 "general_operand" "rI,K,m,r"))] -+ [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,l,Uu,r,m") -+ (match_operand:QI 1 "general_operand" "rI,K,Uu,l,m,r"))] - "TARGET_32BIT - && ( register_operand (operands[0], QImode) - || register_operand (operands[1], QImode))" -@@ -5946,10 +6278,14 @@ - mov%?\\t%0, %1 - mvn%?\\t%0, #%B1 - ldr%(b%)\\t%0, %1 -+ str%(b%)\\t%1, %0 -+ ldr%(b%)\\t%0, %1 - str%(b%)\\t%1, %0" -- [(set_attr "type" "*,*,load1,store1") -- (set_attr "insn" "mov,mvn,*,*") -- (set_attr "predicable" "yes")] -+ [(set_attr "type" "*,*,load1,store1,load1,store1") -+ (set_attr "insn" "mov,mvn,*,*,*,*") -+ (set_attr "predicable" "yes") -+ (set_attr "arch" "any,any,t2,t2,any,any") -+ (set_attr "length" "4,4,2,2,4,4")] - ) - - (define_insn "*thumb1_movqi_insn" -@@ -6179,7 +6515,7 @@ - [(match_operand:DF 0 "arm_reload_memory_operand" "=o") - (match_operand:DF 1 "s_register_operand" "r") - (match_operand:SI 2 "s_register_operand" "=&r")] -- "TARGET_32BIT" -+ "TARGET_THUMB2" - " - { - enum rtx_code code = GET_CODE (XEXP (operands[0], 0)); -@@ -6442,7 +6778,7 @@ - - (define_expand "cbranchsi4" - [(set (pc) (if_then_else -- (match_operator 0 "arm_comparison_operator" -+ (match_operator 0 "expandable_comparison_operator" - [(match_operand:SI 1 "s_register_operand" "") - (match_operand:SI 2 "nonmemory_operand" "")]) - (label_ref (match_operand 3 "" "")) -@@ -6493,7 +6829,7 @@ - - (define_expand "cbranchsf4" - [(set (pc) (if_then_else -- (match_operator 0 "arm_comparison_operator" -+ (match_operator 0 "expandable_comparison_operator" - [(match_operand:SF 1 "s_register_operand" "") - (match_operand:SF 2 "arm_float_compare_operand" "")]) - (label_ref (match_operand 3 "" "")) -@@ -6505,7 +6841,7 @@ - - (define_expand "cbranchdf4" - [(set (pc) (if_then_else -- (match_operator 0 "arm_comparison_operator" -+ (match_operator 0 "expandable_comparison_operator" - [(match_operand:DF 1 "s_register_operand" "") - (match_operand:DF 2 "arm_float_compare_operand" "")]) - (label_ref (match_operand 3 "" "")) -@@ -6517,7 +6853,7 @@ - - (define_expand "cbranchdi4" - [(set (pc) (if_then_else -- (match_operator 0 "arm_comparison_operator" -+ (match_operator 0 "expandable_comparison_operator" - [(match_operand:DI 1 "cmpdi_operand" "") - (match_operand:DI 2 "cmpdi_operand" "")]) - (label_ref (match_operand 3 "" "")) -@@ -7106,13 +7442,17 @@ - - (define_insn "*arm_cmpsi_insn" - [(set (reg:CC CC_REGNUM) -- (compare:CC (match_operand:SI 0 "s_register_operand" "r,r") -- (match_operand:SI 1 "arm_add_operand" "rI,L")))] -+ (compare:CC (match_operand:SI 0 "s_register_operand" "l,r,r,r") -+ (match_operand:SI 1 "arm_add_operand" "Py,r,rI,L")))] - "TARGET_32BIT" - "@ - cmp%?\\t%0, %1 -+ cmp%?\\t%0, %1 -+ cmp%?\\t%0, %1 - cmn%?\\t%0, #%n1" -- [(set_attr "conds" "set")] -+ [(set_attr "conds" "set") -+ (set_attr "arch" "t2,t2,any,any") -+ (set_attr "length" "2,2,4,4")] - ) - - (define_insn "*cmpsi_shiftsi" -@@ -7283,7 +7623,14 @@ - return \"b%d1\\t%l0\"; - " - [(set_attr "conds" "use") -- (set_attr "type" "branch")] -+ (set_attr "type" "branch") -+ (set (attr "length") -+ (if_then_else -+ (and (ne (symbol_ref "TARGET_THUMB2") (const_int 0)) -+ (and (ge (minus (match_dup 0) (pc)) (const_int -250)) -+ (le (minus (match_dup 0) (pc)) (const_int 256)))) -+ (const_int 2) -+ (const_int 4)))] - ) - - (define_insn "*arm_cond_branch_reversed" -@@ -7302,7 +7649,14 @@ - return \"b%D1\\t%l0\"; - " - [(set_attr "conds" "use") -- (set_attr "type" "branch")] -+ (set_attr "type" "branch") -+ (set (attr "length") -+ (if_then_else -+ (and (ne (symbol_ref "TARGET_THUMB2") (const_int 0)) -+ (and (ge (minus (match_dup 0) (pc)) (const_int -250)) -+ (le (minus (match_dup 0) (pc)) (const_int 256)))) -+ (const_int 2) -+ (const_int 4)))] - ) - - -@@ -7354,7 +7708,7 @@ - - (define_expand "cstoresi4" - [(set (match_operand:SI 0 "s_register_operand" "") -- (match_operator:SI 1 "arm_comparison_operator" -+ (match_operator:SI 1 "expandable_comparison_operator" - [(match_operand:SI 2 "s_register_operand" "") - (match_operand:SI 3 "reg_or_int_operand" "")]))] - "TARGET_32BIT || TARGET_THUMB1" -@@ -7490,7 +7844,7 @@ - - (define_expand "cstoresf4" - [(set (match_operand:SI 0 "s_register_operand" "") -- (match_operator:SI 1 "arm_comparison_operator" -+ (match_operator:SI 1 "expandable_comparison_operator" - [(match_operand:SF 2 "s_register_operand" "") - (match_operand:SF 3 "arm_float_compare_operand" "")]))] - "TARGET_32BIT && TARGET_HARD_FLOAT" -@@ -7500,7 +7854,7 @@ - - (define_expand "cstoredf4" - [(set (match_operand:SI 0 "s_register_operand" "") -- (match_operator:SI 1 "arm_comparison_operator" -+ (match_operator:SI 1 "expandable_comparison_operator" - [(match_operand:DF 2 "s_register_operand" "") - (match_operand:DF 3 "arm_float_compare_operand" "")]))] - "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE" -@@ -7510,7 +7864,7 @@ - - (define_expand "cstoredi4" - [(set (match_operand:SI 0 "s_register_operand" "") -- (match_operator:SI 1 "arm_comparison_operator" -+ (match_operator:SI 1 "expandable_comparison_operator" - [(match_operand:DI 2 "cmpdi_operand" "") - (match_operand:DI 3 "cmpdi_operand" "")]))] - "TARGET_32BIT" -@@ -7630,7 +7984,7 @@ - - (define_expand "movsicc" - [(set (match_operand:SI 0 "s_register_operand" "") -- (if_then_else:SI (match_operand 1 "arm_comparison_operator" "") -+ (if_then_else:SI (match_operand 1 "expandable_comparison_operator" "") - (match_operand:SI 2 "arm_not_operand" "") - (match_operand:SI 3 "arm_not_operand" "")))] - "TARGET_32BIT" -@@ -7650,7 +8004,7 @@ - - (define_expand "movsfcc" - [(set (match_operand:SF 0 "s_register_operand" "") -- (if_then_else:SF (match_operand 1 "arm_comparison_operator" "") -+ (if_then_else:SF (match_operand 1 "expandable_comparison_operator" "") - (match_operand:SF 2 "s_register_operand" "") - (match_operand:SF 3 "nonmemory_operand" "")))] - "TARGET_32BIT && TARGET_HARD_FLOAT" -@@ -7676,7 +8030,7 @@ - - (define_expand "movdfcc" - [(set (match_operand:DF 0 "s_register_operand" "") -- (if_then_else:DF (match_operand 1 "arm_comparison_operator" "") -+ (if_then_else:DF (match_operand 1 "expandable_comparison_operator" "") - (match_operand:DF 2 "s_register_operand" "") - (match_operand:DF 3 "arm_float_add_operand" "")))] - "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP_DOUBLE)" -@@ -7754,7 +8108,14 @@ - return \"b%?\\t%l0\"; - } - " -- [(set_attr "predicable" "yes")] -+ [(set_attr "predicable" "yes") -+ (set (attr "length") -+ (if_then_else -+ (and (ne (symbol_ref "TARGET_THUMB2") (const_int 0)) -+ (and (ge (minus (match_dup 0) (pc)) (const_int -2044)) -+ (le (minus (match_dup 0) (pc)) (const_int 2048)))) -+ (const_int 2) -+ (const_int 4)))] - ) - - (define_insn "*thumb_jump" -@@ -8839,40 +9200,85 @@ - (set_attr "length" "8,12")] - ) - --;; ??? Is it worth using these conditional patterns in Thumb-2 mode? - (define_insn "*cmp_ite0" - [(set (match_operand 6 "dominant_cc_register" "") - (compare - (if_then_else:SI - (match_operator 4 "arm_comparison_operator" -- [(match_operand:SI 0 "s_register_operand" "r,r,r,r") -- (match_operand:SI 1 "arm_add_operand" "rI,L,rI,L")]) -+ [(match_operand:SI 0 "s_register_operand" -+ "l,l,l,r,r,r,r,r,r") -+ (match_operand:SI 1 "arm_add_operand" -+ "lPy,lPy,lPy,rI,L,rI,L,rI,L")]) - (match_operator:SI 5 "arm_comparison_operator" -- [(match_operand:SI 2 "s_register_operand" "r,r,r,r") -- (match_operand:SI 3 "arm_add_operand" "rI,rI,L,L")]) -+ [(match_operand:SI 2 "s_register_operand" -+ "l,r,r,l,l,r,r,r,r") -+ (match_operand:SI 3 "arm_add_operand" -+ "lPy,rI,L,lPy,lPy,rI,rI,L,L")]) - (const_int 0)) - (const_int 0)))] -- "TARGET_ARM" -+ "TARGET_32BIT" - "* - { -- static const char * const opcodes[4][2] = -+ static const char * const cmp1[NUM_OF_COND_CMP][2] = - { -- {\"cmp\\t%2, %3\;cmp%d5\\t%0, %1\", -- \"cmp\\t%0, %1\;cmp%d4\\t%2, %3\"}, -- {\"cmp\\t%2, %3\;cmn%d5\\t%0, #%n1\", -- \"cmn\\t%0, #%n1\;cmp%d4\\t%2, %3\"}, -- {\"cmn\\t%2, #%n3\;cmp%d5\\t%0, %1\", -- \"cmp\\t%0, %1\;cmn%d4\\t%2, #%n3\"}, -- {\"cmn\\t%2, #%n3\;cmn%d5\\t%0, #%n1\", -- \"cmn\\t%0, #%n1\;cmn%d4\\t%2, #%n3\"} -+ {\"cmp%d5\\t%0, %1\", -+ \"cmp%d4\\t%2, %3\"}, -+ {\"cmn%d5\\t%0, #%n1\", -+ \"cmp%d4\\t%2, %3\"}, -+ {\"cmp%d5\\t%0, %1\", -+ \"cmn%d4\\t%2, #%n3\"}, -+ {\"cmn%d5\\t%0, #%n1\", -+ \"cmn%d4\\t%2, #%n3\"} - }; -+ static const char * const cmp2[NUM_OF_COND_CMP][2] = -+ { -+ {\"cmp\\t%2, %3\", -+ \"cmp\\t%0, %1\"}, -+ {\"cmp\\t%2, %3\", -+ \"cmn\\t%0, #%n1\"}, -+ {\"cmn\\t%2, #%n3\", -+ \"cmp\\t%0, %1\"}, -+ {\"cmn\\t%2, #%n3\", -+ \"cmn\\t%0, #%n1\"} -+ }; -+ static const char * const ite[2] = -+ { -+ \"it\\t%d5\", -+ \"it\\t%d4\" -+ }; -+ static const int cmp_idx[9] = {CMP_CMP, CMP_CMP, CMP_CMN, -+ CMP_CMP, CMN_CMP, CMP_CMP, -+ CMN_CMP, CMP_CMN, CMN_CMN}; - int swap = - comparison_dominates_p (GET_CODE (operands[5]), GET_CODE (operands[4])); - -- return opcodes[which_alternative][swap]; -+ output_asm_insn (cmp2[cmp_idx[which_alternative]][swap], operands); -+ if (TARGET_THUMB2) { -+ output_asm_insn (ite[swap], operands); -+ } -+ output_asm_insn (cmp1[cmp_idx[which_alternative]][swap], operands); -+ return \"\"; - }" - [(set_attr "conds" "set") -- (set_attr "length" "8")] -+ (set_attr "arch" "t2,t2,t2,t2,t2,any,any,any,any") -+ (set_attr_alternative "length" -+ [(const_int 6) -+ (const_int 8) -+ (const_int 8) -+ (const_int 8) -+ (const_int 8) -+ (if_then_else (eq_attr "is_thumb" "no") -+ (const_int 8) -+ (const_int 10)) -+ (if_then_else (eq_attr "is_thumb" "no") -+ (const_int 8) -+ (const_int 10)) -+ (if_then_else (eq_attr "is_thumb" "no") -+ (const_int 8) -+ (const_int 10)) -+ (if_then_else (eq_attr "is_thumb" "no") -+ (const_int 8) -+ (const_int 10))])] - ) - - (define_insn "*cmp_ite1" -@@ -8880,35 +9286,81 @@ - (compare - (if_then_else:SI - (match_operator 4 "arm_comparison_operator" -- [(match_operand:SI 0 "s_register_operand" "r,r,r,r") -- (match_operand:SI 1 "arm_add_operand" "rI,L,rI,L")]) -+ [(match_operand:SI 0 "s_register_operand" -+ "l,l,l,r,r,r,r,r,r") -+ (match_operand:SI 1 "arm_add_operand" -+ "lPy,lPy,lPy,rI,L,rI,L,rI,L")]) - (match_operator:SI 5 "arm_comparison_operator" -- [(match_operand:SI 2 "s_register_operand" "r,r,r,r") -- (match_operand:SI 3 "arm_add_operand" "rI,rI,L,L")]) -+ [(match_operand:SI 2 "s_register_operand" -+ "l,r,r,l,l,r,r,r,r") -+ (match_operand:SI 3 "arm_add_operand" -+ "lPy,rI,L,lPy,lPy,rI,rI,L,L")]) - (const_int 1)) - (const_int 0)))] -- "TARGET_ARM" -+ "TARGET_32BIT" - "* - { -- static const char * const opcodes[4][2] = -+ static const char * const cmp1[NUM_OF_COND_CMP][2] = -+ { -+ {\"cmp\\t%0, %1\", -+ \"cmp\\t%2, %3\"}, -+ {\"cmn\\t%0, #%n1\", -+ \"cmp\\t%2, %3\"}, -+ {\"cmp\\t%0, %1\", -+ \"cmn\\t%2, #%n3\"}, -+ {\"cmn\\t%0, #%n1\", -+ \"cmn\\t%2, #%n3\"} -+ }; -+ static const char * const cmp2[NUM_OF_COND_CMP][2] = - { -- {\"cmp\\t%0, %1\;cmp%d4\\t%2, %3\", -- \"cmp\\t%2, %3\;cmp%D5\\t%0, %1\"}, -- {\"cmn\\t%0, #%n1\;cmp%d4\\t%2, %3\", -- \"cmp\\t%2, %3\;cmn%D5\\t%0, #%n1\"}, -- {\"cmp\\t%0, %1\;cmn%d4\\t%2, #%n3\", -- \"cmn\\t%2, #%n3\;cmp%D5\\t%0, %1\"}, -- {\"cmn\\t%0, #%n1\;cmn%d4\\t%2, #%n3\", -- \"cmn\\t%2, #%n3\;cmn%D5\\t%0, #%n1\"} -+ {\"cmp%d4\\t%2, %3\", -+ \"cmp%D5\\t%0, %1\"}, -+ {\"cmp%d4\\t%2, %3\", -+ \"cmn%D5\\t%0, #%n1\"}, -+ {\"cmn%d4\\t%2, #%n3\", -+ \"cmp%D5\\t%0, %1\"}, -+ {\"cmn%d4\\t%2, #%n3\", -+ \"cmn%D5\\t%0, #%n1\"} - }; -+ static const char * const ite[2] = -+ { -+ \"it\\t%d4\", -+ \"it\\t%D5\" -+ }; -+ static const int cmp_idx[9] = {CMP_CMP, CMP_CMP, CMP_CMN, -+ CMP_CMP, CMN_CMP, CMP_CMP, -+ CMN_CMP, CMP_CMN, CMN_CMN}; - int swap = - comparison_dominates_p (GET_CODE (operands[5]), - reverse_condition (GET_CODE (operands[4]))); - -- return opcodes[which_alternative][swap]; -+ output_asm_insn (cmp1[cmp_idx[which_alternative]][swap], operands); -+ if (TARGET_THUMB2) { -+ output_asm_insn (ite[swap], operands); -+ } -+ output_asm_insn (cmp2[cmp_idx[which_alternative]][swap], operands); -+ return \"\"; - }" - [(set_attr "conds" "set") -- (set_attr "length" "8")] -+ (set_attr "arch" "t2,t2,t2,t2,t2,any,any,any,any") -+ (set_attr_alternative "length" -+ [(const_int 6) -+ (const_int 8) -+ (const_int 8) -+ (const_int 8) -+ (const_int 8) -+ (if_then_else (eq_attr "is_thumb" "no") -+ (const_int 8) -+ (const_int 10)) -+ (if_then_else (eq_attr "is_thumb" "no") -+ (const_int 8) -+ (const_int 10)) -+ (if_then_else (eq_attr "is_thumb" "no") -+ (const_int 8) -+ (const_int 10)) -+ (if_then_else (eq_attr "is_thumb" "no") -+ (const_int 8) -+ (const_int 10))])] - ) - - (define_insn "*cmp_and" -@@ -8916,34 +9368,80 @@ - (compare - (and:SI - (match_operator 4 "arm_comparison_operator" -- [(match_operand:SI 0 "s_register_operand" "r,r,r,r") -- (match_operand:SI 1 "arm_add_operand" "rI,L,rI,L")]) -+ [(match_operand:SI 0 "s_register_operand" -+ "l,l,l,r,r,r,r,r,r") -+ (match_operand:SI 1 "arm_add_operand" -+ "lPy,lPy,lPy,rI,L,rI,L,rI,L")]) - (match_operator:SI 5 "arm_comparison_operator" -- [(match_operand:SI 2 "s_register_operand" "r,r,r,r") -- (match_operand:SI 3 "arm_add_operand" "rI,rI,L,L")])) -+ [(match_operand:SI 2 "s_register_operand" -+ "l,r,r,l,l,r,r,r,r") -+ (match_operand:SI 3 "arm_add_operand" -+ "lPy,rI,L,lPy,lPy,rI,rI,L,L")])) - (const_int 0)))] -- "TARGET_ARM" -+ "TARGET_32BIT" - "* - { -- static const char *const opcodes[4][2] = -+ static const char *const cmp1[NUM_OF_COND_CMP][2] = -+ { -+ {\"cmp%d5\\t%0, %1\", -+ \"cmp%d4\\t%2, %3\"}, -+ {\"cmn%d5\\t%0, #%n1\", -+ \"cmp%d4\\t%2, %3\"}, -+ {\"cmp%d5\\t%0, %1\", -+ \"cmn%d4\\t%2, #%n3\"}, -+ {\"cmn%d5\\t%0, #%n1\", -+ \"cmn%d4\\t%2, #%n3\"} -+ }; -+ static const char *const cmp2[NUM_OF_COND_CMP][2] = -+ { -+ {\"cmp\\t%2, %3\", -+ \"cmp\\t%0, %1\"}, -+ {\"cmp\\t%2, %3\", -+ \"cmn\\t%0, #%n1\"}, -+ {\"cmn\\t%2, #%n3\", -+ \"cmp\\t%0, %1\"}, -+ {\"cmn\\t%2, #%n3\", -+ \"cmn\\t%0, #%n1\"} -+ }; -+ static const char *const ite[2] = - { -- {\"cmp\\t%2, %3\;cmp%d5\\t%0, %1\", -- \"cmp\\t%0, %1\;cmp%d4\\t%2, %3\"}, -- {\"cmp\\t%2, %3\;cmn%d5\\t%0, #%n1\", -- \"cmn\\t%0, #%n1\;cmp%d4\\t%2, %3\"}, -- {\"cmn\\t%2, #%n3\;cmp%d5\\t%0, %1\", -- \"cmp\\t%0, %1\;cmn%d4\\t%2, #%n3\"}, -- {\"cmn\\t%2, #%n3\;cmn%d5\\t%0, #%n1\", -- \"cmn\\t%0, #%n1\;cmn%d4\\t%2, #%n3\"} -+ \"it\\t%d5\", -+ \"it\\t%d4\" - }; -+ static const int cmp_idx[9] = {CMP_CMP, CMP_CMP, CMP_CMN, -+ CMP_CMP, CMN_CMP, CMP_CMP, -+ CMN_CMP, CMP_CMN, CMN_CMN}; - int swap = - comparison_dominates_p (GET_CODE (operands[5]), GET_CODE (operands[4])); - -- return opcodes[which_alternative][swap]; -+ output_asm_insn (cmp2[cmp_idx[which_alternative]][swap], operands); -+ if (TARGET_THUMB2) { -+ output_asm_insn (ite[swap], operands); -+ } -+ output_asm_insn (cmp1[cmp_idx[which_alternative]][swap], operands); -+ return \"\"; - }" - [(set_attr "conds" "set") - (set_attr "predicable" "no") -- (set_attr "length" "8")] -+ (set_attr "arch" "t2,t2,t2,t2,t2,any,any,any,any") -+ (set_attr_alternative "length" -+ [(const_int 6) -+ (const_int 8) -+ (const_int 8) -+ (const_int 8) -+ (const_int 8) -+ (if_then_else (eq_attr "is_thumb" "no") -+ (const_int 8) -+ (const_int 10)) -+ (if_then_else (eq_attr "is_thumb" "no") -+ (const_int 8) -+ (const_int 10)) -+ (if_then_else (eq_attr "is_thumb" "no") -+ (const_int 8) -+ (const_int 10)) -+ (if_then_else (eq_attr "is_thumb" "no") -+ (const_int 8) -+ (const_int 10))])] - ) - - (define_insn "*cmp_ior" -@@ -8951,34 +9449,80 @@ - (compare - (ior:SI - (match_operator 4 "arm_comparison_operator" -- [(match_operand:SI 0 "s_register_operand" "r,r,r,r") -- (match_operand:SI 1 "arm_add_operand" "rI,L,rI,L")]) -+ [(match_operand:SI 0 "s_register_operand" -+ "l,l,l,r,r,r,r,r,r") -+ (match_operand:SI 1 "arm_add_operand" -+ "lPy,lPy,lPy,rI,L,rI,L,rI,L")]) - (match_operator:SI 5 "arm_comparison_operator" -- [(match_operand:SI 2 "s_register_operand" "r,r,r,r") -- (match_operand:SI 3 "arm_add_operand" "rI,rI,L,L")])) -+ [(match_operand:SI 2 "s_register_operand" -+ "l,r,r,l,l,r,r,r,r") -+ (match_operand:SI 3 "arm_add_operand" -+ "lPy,rI,L,lPy,lPy,rI,rI,L,L")])) - (const_int 0)))] -- "TARGET_ARM" -+ "TARGET_32BIT" - "* --{ -- static const char *const opcodes[4][2] = - { -- {\"cmp\\t%0, %1\;cmp%D4\\t%2, %3\", -- \"cmp\\t%2, %3\;cmp%D5\\t%0, %1\"}, -- {\"cmn\\t%0, #%n1\;cmp%D4\\t%2, %3\", -- \"cmp\\t%2, %3\;cmn%D5\\t%0, #%n1\"}, -- {\"cmp\\t%0, %1\;cmn%D4\\t%2, #%n3\", -- \"cmn\\t%2, #%n3\;cmp%D5\\t%0, %1\"}, -- {\"cmn\\t%0, #%n1\;cmn%D4\\t%2, #%n3\", -- \"cmn\\t%2, #%n3\;cmn%D5\\t%0, #%n1\"} -- }; -- int swap = -- comparison_dominates_p (GET_CODE (operands[5]), GET_CODE (operands[4])); -+ static const char *const cmp1[NUM_OF_COND_CMP][2] = -+ { -+ {\"cmp\\t%0, %1\", -+ \"cmp\\t%2, %3\"}, -+ {\"cmn\\t%0, #%n1\", -+ \"cmp\\t%2, %3\"}, -+ {\"cmp\\t%0, %1\", -+ \"cmn\\t%2, #%n3\"}, -+ {\"cmn\\t%0, #%n1\", -+ \"cmn\\t%2, #%n3\"} -+ }; -+ static const char *const cmp2[NUM_OF_COND_CMP][2] = -+ { -+ {\"cmp%D4\\t%2, %3\", -+ \"cmp%D5\\t%0, %1\"}, -+ {\"cmp%D4\\t%2, %3\", -+ \"cmn%D5\\t%0, #%n1\"}, -+ {\"cmn%D4\\t%2, #%n3\", -+ \"cmp%D5\\t%0, %1\"}, -+ {\"cmn%D4\\t%2, #%n3\", -+ \"cmn%D5\\t%0, #%n1\"} -+ }; -+ static const char *const ite[2] = -+ { -+ \"it\\t%D4\", -+ \"it\\t%D5\" -+ }; -+ static const int cmp_idx[9] = {CMP_CMP, CMP_CMP, CMP_CMN, -+ CMP_CMP, CMN_CMP, CMP_CMP, -+ CMN_CMP, CMP_CMN, CMN_CMN}; -+ int swap = -+ comparison_dominates_p (GET_CODE (operands[5]), GET_CODE (operands[4])); - -- return opcodes[which_alternative][swap]; --} --" -+ output_asm_insn (cmp1[cmp_idx[which_alternative]][swap], operands); -+ if (TARGET_THUMB2) { -+ output_asm_insn (ite[swap], operands); -+ } -+ output_asm_insn (cmp2[cmp_idx[which_alternative]][swap], operands); -+ return \"\"; -+ } -+ " - [(set_attr "conds" "set") -- (set_attr "length" "8")] -+ (set_attr "arch" "t2,t2,t2,t2,t2,any,any,any,any") -+ (set_attr_alternative "length" -+ [(const_int 6) -+ (const_int 8) -+ (const_int 8) -+ (const_int 8) -+ (const_int 8) -+ (if_then_else (eq_attr "is_thumb" "no") -+ (const_int 8) -+ (const_int 10)) -+ (if_then_else (eq_attr "is_thumb" "no") -+ (const_int 8) -+ (const_int 10)) -+ (if_then_else (eq_attr "is_thumb" "no") -+ (const_int 8) -+ (const_int 10)) -+ (if_then_else (eq_attr "is_thumb" "no") -+ (const_int 8) -+ (const_int 10))])] - ) - - (define_insn_and_split "*ior_scc_scc" -@@ -8990,11 +9534,11 @@ - [(match_operand:SI 4 "s_register_operand" "r") - (match_operand:SI 5 "arm_add_operand" "rIL")]))) - (clobber (reg:CC CC_REGNUM))] -- "TARGET_ARM -+ "TARGET_32BIT - && (arm_select_dominance_cc_mode (operands[3], operands[6], DOM_CC_X_OR_Y) - != CCmode)" - "#" -- "TARGET_ARM && reload_completed" -+ "TARGET_32BIT && reload_completed" - [(set (match_dup 7) - (compare - (ior:SI -@@ -9023,9 +9567,9 @@ - (set (match_operand:SI 7 "s_register_operand" "=r") - (ior:SI (match_op_dup 3 [(match_dup 1) (match_dup 2)]) - (match_op_dup 6 [(match_dup 4) (match_dup 5)])))] -- "TARGET_ARM" -+ "TARGET_32BIT" - "#" -- "TARGET_ARM && reload_completed" -+ "TARGET_32BIT && reload_completed" - [(set (match_dup 0) - (compare - (ior:SI -@@ -9046,11 +9590,11 @@ - [(match_operand:SI 4 "s_register_operand" "r") - (match_operand:SI 5 "arm_add_operand" "rIL")]))) - (clobber (reg:CC CC_REGNUM))] -- "TARGET_ARM -+ "TARGET_32BIT - && (arm_select_dominance_cc_mode (operands[3], operands[6], DOM_CC_X_AND_Y) - != CCmode)" - "#" -- "TARGET_ARM && reload_completed -+ "TARGET_32BIT && reload_completed - && (arm_select_dominance_cc_mode (operands[3], operands[6], DOM_CC_X_AND_Y) - != CCmode)" - [(set (match_dup 7) -@@ -9081,9 +9625,9 @@ - (set (match_operand:SI 7 "s_register_operand" "=r") - (and:SI (match_op_dup 3 [(match_dup 1) (match_dup 2)]) - (match_op_dup 6 [(match_dup 4) (match_dup 5)])))] -- "TARGET_ARM" -+ "TARGET_32BIT" - "#" -- "TARGET_ARM && reload_completed" -+ "TARGET_32BIT && reload_completed" - [(set (match_dup 0) - (compare - (and:SI -@@ -9108,11 +9652,11 @@ - [(match_operand:SI 4 "s_register_operand" "r,r,r") - (match_operand:SI 5 "arm_add_operand" "rIL,rIL,rIL")]))) - (clobber (reg:CC CC_REGNUM))] -- "TARGET_ARM -+ "TARGET_32BIT - && (arm_select_dominance_cc_mode (operands[3], operands[6], DOM_CC_X_AND_Y) - == CCmode)" - "#" -- "TARGET_ARM && reload_completed" -+ "TARGET_32BIT && reload_completed" - [(parallel [(set (match_dup 0) - (match_op_dup 3 [(match_dup 1) (match_dup 2)])) - (clobber (reg:CC CC_REGNUM))]) -@@ -10222,6 +10766,8 @@ - ;; Push multiple registers to the stack. Registers are in parallel (use ...) - ;; expressions. For simplicity, the first register is also in the unspec - ;; part. -+;; To avoid the usage of GNU extension, the length attribute is computed -+;; in a C function arm_attr_length_push_multi. - (define_insn "*push_multi" - [(match_parallel 2 "multi_register_push" - [(set (match_operand:BLK 0 "memory_operand" "=m") -@@ -10261,7 +10807,9 @@ - - return \"\"; - }" -- [(set_attr "type" "store4")] -+ [(set_attr "type" "store4") -+ (set (attr "length") -+ (symbol_ref "arm_attr_length_push_multi (operands[2], operands[1])"))] - ) - - (define_insn "stack_tie" ---- a/src/gcc/config/arm/arm.opt -+++ b/src/gcc/config/arm/arm.opt -@@ -48,6 +48,11 @@ - Target RejectNegative Joined - Specify the name of the target architecture - -+; Other arm_arch values are loaded from arm-tables.opt -+; but that is a generated file and this is an odd-one-out. -+EnumValue -+Enum(arm_arch) String(native) Value(-1) DriverOnly -+ - marm - Target RejectNegative InverseMask(THUMB) Undocumented - -@@ -153,14 +158,23 @@ - Target RejectNegative Joined - Tune code for the given processor - -+; Other processor_type values are loaded from arm-tables.opt -+; but that is a generated file and this is an odd-one-out. -+EnumValue -+Enum(processor_type) String(native) Value(-1) DriverOnly -+ - mwords-little-endian - Target Report RejectNegative Mask(LITTLE_WORDS) - Assume big endian bytes, little endian words - - mvectorize-with-neon-quad --Target Report Mask(NEON_VECTORIZE_QUAD) -+Target Report RejectNegative InverseMask(NEON_VECTORIZE_DOUBLE) - Use Neon quad-word (rather than double-word) registers for vectorization - -+mvectorize-with-neon-double -+Target Report RejectNegative Mask(NEON_VECTORIZE_DOUBLE) -+Use Neon double-word (rather than quad-word) registers for vectorization -+ - mword-relocations - Target Report Var(target_word_relocations) Init(TARGET_DEFAULT_WORD_RELOCATIONS) - Only generate absolute relocations on word sized values. -@@ -169,3 +183,7 @@ - Target Report Var(fix_cm3_ldrd) Init(2) - Avoid overlapping destination and address registers on LDRD instructions - that may trigger Cortex-M3 errata. -+ -+munaligned-access -+Target Report Var(unaligned_access) Init(2) -+Enable unaligned word and halfword accesses to packed data. ---- a/src/gcc/config/arm/bpabi.h -+++ b/src/gcc/config/arm/bpabi.h -@@ -56,7 +56,8 @@ - "|march=armv4|mcpu=fa526|mcpu=fa626:--fix-v4bx}" - - #define BE8_LINK_SPEC " %{mbig-endian:%{march=armv7-a|mcpu=cortex-a5"\ -- "|mcpu=cortex-a8|mcpu=cortex-a9|mcpu=cortex-a15:%{!r:--be8}}}" -+ "|mcpu=cortex-a8|mcpu=cortex-a9|mcpu=cortex-a15|mcpu=generic-armv7-a"\ -+ ":%{!r:--be8}}}" - - /* Tell the assembler to build BPABI binaries. */ - #undef SUBTARGET_EXTRA_ASM_SPEC ---- a/src/gcc/config/arm/constraints.md -+++ b/src/gcc/config/arm/constraints.md -@@ -31,11 +31,12 @@ - ;; The following multi-letter normal constraints have been used: - ;; in ARM/Thumb-2 state: Da, Db, Dc, Dn, Dl, DL, Dv, Dy, Di, Dz - ;; in Thumb-1 state: Pa, Pb, Pc, Pd --;; in Thumb-2 state: Ps, Pt, Pu, Pv, Pw, Px -+;; in Thumb-2 state: Pj, PJ, Ps, Pt, Pu, Pv, Pw, Px, Py - - ;; The following memory constraints have been used: - ;; in ARM/Thumb-2 state: Q, Ut, Uv, Uy, Un, Um, Us - ;; in ARM state: Uq -+;; in Thumb state: Uu, Uw - - - (define_register_constraint "f" "TARGET_ARM ? FPA_REGS : NO_REGS" -@@ -74,6 +75,18 @@ - (and (match_code "const_int") - (match_test "(ival & 0xffff0000) == 0"))))) - -+(define_constraint "Pj" -+ "@internal A 12-bit constant suitable for an ADDW or SUBW instruction. (Thumb-2)" -+ (and (match_code "const_int") -+ (and (match_test "TARGET_THUMB2") -+ (match_test "(ival & 0xfffff000) == 0")))) -+ -+(define_constraint "PJ" -+ "@internal A constant that satisfies the Pj constrant if negated." -+ (and (match_code "const_int") -+ (and (match_test "TARGET_THUMB2") -+ (match_test "((-ival) & 0xfffff000) == 0")))) -+ - (define_register_constraint "k" "STACK_REG" - "@internal The stack register.") - -@@ -189,6 +202,11 @@ - (and (match_code "const_int") - (match_test "TARGET_THUMB2 && ival >= -7 && ival <= -1"))) - -+(define_constraint "Py" -+ "@internal In Thumb-2 state a constant in the range 0 to 255" -+ (and (match_code "const_int") -+ (match_test "TARGET_THUMB2 && ival >= 0 && ival <= 255"))) -+ - (define_constraint "G" - "In ARM/Thumb-2 state a valid FPA immediate constant." - (and (match_code "const_double") -@@ -327,6 +345,27 @@ - (and (match_code "mem") - (match_test "REG_P (XEXP (op, 0))"))) - -+(define_memory_constraint "Uu" -+ "@internal -+ In Thumb state an address that is valid in 16bit encoding." -+ (and (match_code "mem") -+ (match_test "TARGET_THUMB -+ && thumb1_legitimate_address_p (GET_MODE (op), XEXP (op, 0), -+ 0)"))) -+ -+; The 16-bit post-increment LDR/STR accepted by thumb1_legitimate_address_p -+; are actually LDM/STM instructions, so cannot be used to access unaligned -+; data. -+(define_memory_constraint "Uw" -+ "@internal -+ In Thumb state an address that is valid in 16bit encoding, and that can be -+ used for unaligned accesses." -+ (and (match_code "mem") -+ (match_test "TARGET_THUMB -+ && thumb1_legitimate_address_p (GET_MODE (op), XEXP (op, 0), -+ 0) -+ && GET_CODE (XEXP (op, 0)) != POST_INC"))) -+ - ;; We used to have constraint letters for S and R in ARM state, but - ;; all uses of these now appear to have been removed. - ---- a/src/gcc/config/arm/cortex-a15.md -+++ b/src/gcc/config/arm/cortex-a15.md -@@ -0,0 +1,186 @@ -+;; ARM Cortex-A15 pipeline description -+;; Copyright (C) 2011 Free Software Foundation, Inc. -+;; -+;; Written by Matthew Gretton-Dann <matthew.gretton-dann@arm.com> -+ -+;; This file is part of GCC. -+;; -+;; GCC is free software; you can redistribute it and/or modify it -+;; under the terms of the GNU General Public License as published by -+;; the Free Software Foundation; either version 3, or (at your option) -+;; any later version. -+;; -+;; GCC is distributed in the hope that it will be useful, but -+;; WITHOUT ANY WARRANTY; without even the implied warranty of -+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+;; General Public License for more details. -+;; -+;; You should have received a copy of the GNU General Public License -+;; along with GCC; see the file COPYING3. If not see -+;; <http://www.gnu.org/licenses/>. -+ -+(define_automaton "cortex_a15") -+ -+;; The Cortex-A15 core is modelled as a triple issue pipeline that has -+;; the following dispatch units. -+;; 1. Two pipelines for simple integer operations: SX1, SX2 -+;; 2. Two pipelines for Neon and FP data-processing operations: CX1, CX2 -+;; 3. One pipeline for branch operations: BX -+;; 4. One pipeline for integer multiply and divide operations: MX -+;; 5. Two pipelines for load and store operations: LS1, LS2 -+;; -+;; We can issue into three pipelines per-cycle. -+;; -+;; We assume that where we have unit pairs xx1 is always filled before xx2. -+ -+;; The three issue units -+(define_cpu_unit "ca15_i0, ca15_i1, ca15_i2" "cortex_a15") -+ -+(define_reservation "ca15_issue1" "(ca15_i0|ca15_i1|ca15_i2)") -+(define_reservation "ca15_issue2" "((ca15_i0+ca15_i1)|(ca15_i1+ca15_i2))") -+(define_reservation "ca15_issue3" "(ca15_i0+ca15_i1+ca15_i2)") -+(final_presence_set "ca15_i1" "ca15_i0") -+(final_presence_set "ca15_i2" "ca15_i1") -+ -+;; The main dispatch units -+(define_cpu_unit "ca15_sx1, ca15_sx2" "cortex_a15") -+(define_cpu_unit "ca15_cx1, ca15_cx2" "cortex_a15") -+(define_cpu_unit "ca15_ls1, ca15_ls2" "cortex_a15") -+(define_cpu_unit "ca15_bx, ca15_mx" "cortex_a15") -+ -+(define_reservation "ca15_ls" "(ca15_ls1|ca15_ls2)") -+ -+;; The extended load-store pipeline -+(define_cpu_unit "ca15_ldr, ca15_str" "cortex_a15") -+ -+;; The extended ALU pipeline -+(define_cpu_unit "ca15_sx1_alu, ca15_sx1_shf, ca15_sx1_sat" "cortex_a15") -+(define_cpu_unit "ca15_sx2_alu, ca15_sx2_shf, ca15_sx2_sat" "cortex_a15") -+ -+;; Simple Execution Unit: -+;; -+;; Simple ALU without shift -+(define_insn_reservation "cortex_a15_alu" 2 -+ (and (eq_attr "tune" "cortexa15") -+ (and (eq_attr "type" "alu") -+ (eq_attr "neon_type" "none"))) -+ "ca15_issue1,(ca15_sx1,ca15_sx1_alu)|(ca15_sx2,ca15_sx2_alu)") -+ -+;; ALU ops with immediate shift -+(define_insn_reservation "cortex_a15_alu_shift" 3 -+ (and (eq_attr "tune" "cortexa15") -+ (and (eq_attr "type" "alu_shift") -+ (eq_attr "neon_type" "none"))) -+ "ca15_issue1,(ca15_sx1,ca15_sx1+ca15_sx1_shf,ca15_sx1_alu)\ -+ |(ca15_sx2,ca15_sx2+ca15_sx2_shf,ca15_sx2_alu)") -+ -+;; ALU ops with register controlled shift -+(define_insn_reservation "cortex_a15_alu_shift_reg" 3 -+ (and (eq_attr "tune" "cortexa15") -+ (and (eq_attr "type" "alu_shift_reg") -+ (eq_attr "neon_type" "none"))) -+ "(ca15_issue2,ca15_sx1+ca15_sx2,ca15_sx1_shf,ca15_sx2_alu)\ -+ |(ca15_issue1,(ca15_issue1+ca15_sx2,ca15_sx1+ca15_sx2_shf)\ -+ |(ca15_issue1+ca15_sx1,ca15_sx1+ca15_sx1_shf),ca15_sx1_alu)") -+ -+;; Multiply Execution Unit: -+;; -+;; 32-bit multiplies -+(define_insn_reservation "cortex_a15_mult32" 3 -+ (and (eq_attr "tune" "cortexa15") -+ (and (eq_attr "type" "mult") -+ (and (eq_attr "neon_type" "none") -+ (eq_attr "mul64" "no")))) -+ "ca15_issue1,ca15_mx") -+ -+;; 64-bit multiplies -+(define_insn_reservation "cortex_a15_mult64" 4 -+ (and (eq_attr "tune" "cortexa15") -+ (and (eq_attr "type" "mult") -+ (and (eq_attr "neon_type" "none") -+ (eq_attr "mul64" "yes")))) -+ "ca15_issue1,ca15_mx*2") -+ -+;; Integer divide -+(define_insn_reservation "cortex_a15_udiv" 9 -+ (and (eq_attr "tune" "cortexa15") -+ (eq_attr "insn" "udiv")) -+ "ca15_issue1,ca15_mx") -+ -+(define_insn_reservation "cortex_a15_sdiv" 10 -+ (and (eq_attr "tune" "cortexa15") -+ (eq_attr "insn" "sdiv")) -+ "ca15_issue1,ca15_mx") -+ -+;; Block all issue pipes for a cycle -+(define_insn_reservation "cortex_a15_block" 1 -+ (and (eq_attr "tune" "cortexa15") -+ (and (eq_attr "type" "block") -+ (eq_attr "neon_type" "none"))) -+ "ca15_issue3") -+ -+;; Branch execution Unit -+;; -+;; Branches take one issue slot. -+;; No latency as there is no result -+(define_insn_reservation "cortex_a15_branch" 0 -+ (and (eq_attr "tune" "cortexa15") -+ (and (eq_attr "type" "branch") -+ (eq_attr "neon_type" "none"))) -+ "ca15_issue1,ca15_bx") -+ -+ -+;; We lie with calls. They take up all issue slots, and form a block in the -+;; pipeline. The result however is available the next cycle. -+;; -+;; Addition of new units requires this to be updated. -+(define_insn_reservation "cortex_a15_call" 1 -+ (and (eq_attr "tune" "cortexa15") -+ (and (eq_attr "type" "call") -+ (eq_attr "neon_type" "none"))) -+ "ca15_issue3,\ -+ ca15_sx1+ca15_sx2+ca15_bx+ca15_mx+ca15_cx1+ca15_cx2+ca15_ls1+ca15_ls2,\ -+ ca15_sx1_alu+ca15_sx1_shf+ca15_sx1_sat+ca15_sx2_alu+ca15_sx2_shf\ -+ +ca15_sx2_sat+ca15_ldr+ca15_str") -+ -+;; Load-store execution Unit -+;; -+;; Loads of up to two words. -+(define_insn_reservation "cortex_a15_load1" 4 -+ (and (eq_attr "tune" "cortexa15") -+ (and (eq_attr "type" "load_byte,load1,load2") -+ (eq_attr "neon_type" "none"))) -+ "ca15_issue1,ca15_ls,ca15_ldr,nothing") -+ -+;; Loads of three or four words. -+(define_insn_reservation "cortex_a15_load3" 5 -+ (and (eq_attr "tune" "cortexa15") -+ (and (eq_attr "type" "load3,load4") -+ (eq_attr "neon_type" "none"))) -+ "ca15_issue2,ca15_ls1+ca15_ls2,ca15_ldr,ca15_ldr,nothing") -+ -+;; Stores of up to two words. -+(define_insn_reservation "cortex_a15_store1" 0 -+ (and (eq_attr "tune" "cortexa15") -+ (and (eq_attr "type" "store1,store2") -+ (eq_attr "neon_type" "none"))) -+ "ca15_issue1,ca15_ls,ca15_str") -+ -+;; Stores of three or four words. -+(define_insn_reservation "cortex_a15_store3" 0 -+ (and (eq_attr "tune" "cortexa15") -+ (and (eq_attr "type" "store3,store4") -+ (eq_attr "neon_type" "none"))) -+ "ca15_issue2,ca15_ls1+ca15_ls2,ca15_str,ca15_str") -+ -+;; Simple execution unit bypasses -+(define_bypass 1 "cortex_a15_alu" -+ "cortex_a15_alu,cortex_a15_alu_shift,cortex_a15_alu_shift_reg") -+(define_bypass 2 "cortex_a15_alu_shift" -+ "cortex_a15_alu,cortex_a15_alu_shift,cortex_a15_alu_shift_reg") -+(define_bypass 2 "cortex_a15_alu_shift_reg" -+ "cortex_a15_alu,cortex_a15_alu_shift,cortex_a15_alu_shift_reg") -+(define_bypass 1 "cortex_a15_alu" "cortex_a15_load1,cortex_a15_load3") -+(define_bypass 2 "cortex_a15_alu_shift" "cortex_a15_load1,cortex_a15_load3") -+(define_bypass 2 "cortex_a15_alu_shift_reg" -+ "cortex_a15_load1,cortex_a15_load3") ---- a/src/gcc/config/arm/cortex-a9.md -+++ b/src/gcc/config/arm/cortex-a9.md -@@ -68,7 +68,8 @@ - "cortex_a9_mac_m1*2, cortex_a9_mac_m2, cortex_a9_p0_wb") - (define_reservation "cortex_a9_mac" - "cortex_a9_multcycle1*2 ,cortex_a9_mac_m2, cortex_a9_p0_wb") -- -+(define_reservation "cortex_a9_mult_long" -+ "cortex_a9_mac_m1*3, cortex_a9_mac_m2, cortex_a9_p0_wb") - - ;; Issue at the same time along the load store pipeline and - ;; the VFP / Neon pipeline is not possible. -@@ -139,29 +140,35 @@ - (eq_attr "insn" "smlaxy")) - "cortex_a9_mac16") - -- - (define_insn_reservation "cortex_a9_multiply" 4 - (and (eq_attr "tune" "cortexa9") -- (eq_attr "insn" "mul")) -+ (eq_attr "insn" "mul,smmul,smmulr")) - "cortex_a9_mult") - - (define_insn_reservation "cortex_a9_mac" 4 - (and (eq_attr "tune" "cortexa9") -- (eq_attr "insn" "mla")) -+ (eq_attr "insn" "mla,smmla")) - "cortex_a9_mac") - -+(define_insn_reservation "cortex_a9_multiply_long" 5 -+ (and (eq_attr "tune" "cortexa9") -+ (eq_attr "insn" "smull,umull,smulls,umulls,smlal,smlals,umlal,umlals")) -+ "cortex_a9_mult_long") -+ - ;; An instruction with a result in E2 can be forwarded - ;; to E2 or E1 or M1 or the load store unit in the next cycle. - - (define_bypass 1 "cortex_a9_dp" - "cortex_a9_dp_shift, cortex_a9_multiply, - cortex_a9_load1_2, cortex_a9_dp, cortex_a9_store1_2, -- cortex_a9_mult16, cortex_a9_mac16, cortex_a9_mac, cortex_a9_store3_4, cortex_a9_load3_4") -+ cortex_a9_mult16, cortex_a9_mac16, cortex_a9_mac, cortex_a9_store3_4, cortex_a9_load3_4, -+ cortex_a9_multiply_long") - - (define_bypass 2 "cortex_a9_dp_shift" - "cortex_a9_dp_shift, cortex_a9_multiply, - cortex_a9_load1_2, cortex_a9_dp, cortex_a9_store1_2, -- cortex_a9_mult16, cortex_a9_mac16, cortex_a9_mac, cortex_a9_store3_4, cortex_a9_load3_4") -+ cortex_a9_mult16, cortex_a9_mac16, cortex_a9_mac, cortex_a9_store3_4, cortex_a9_load3_4, -+ cortex_a9_multiply_long") - - ;; An instruction in the load store pipeline can provide - ;; read access to a DP instruction in the P0 default pipeline -@@ -212,7 +219,7 @@ - - (define_bypass 1 - "cortex_a9_fps" -- "cortex_a9_fadd, cortex_a9_fps, cortex_a9_fcmp, cortex_a9_dp, cortex_a9_dp_shift, cortex_a9_multiply") -+ "cortex_a9_fadd, cortex_a9_fps, cortex_a9_fcmp, cortex_a9_dp, cortex_a9_dp_shift, cortex_a9_multiply, cortex_a9_multiply_long") - - ;; Scheduling on the FP_ADD pipeline. - (define_reservation "ca9fp_add" "ca9_issue_vfp_neon + ca9fp_add1, ca9fp_add2, ca9fp_add3, ca9fp_add4") ---- a/src/gcc/config/arm/driver-arm.c -+++ b/src/gcc/config/arm/driver-arm.c -@@ -0,0 +1,149 @@ -+/* Subroutines for the gcc driver. -+ Copyright (C) 2011 Free Software Foundation, Inc. -+ -+This file is part of GCC. -+ -+GCC is free software; you can redistribute it and/or modify -+it under the terms of the GNU General Public License as published by -+the Free Software Foundation; either version 3, or (at your option) -+any later version. -+ -+GCC is distributed in the hope that it will be useful, -+but WITHOUT ANY WARRANTY; without even the implied warranty of -+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+GNU General Public License for more details. -+ -+You should have received a copy of the GNU General Public License -+along with GCC; see the file COPYING3. If not see -+<http://www.gnu.org/licenses/>. */ -+ -+#include "config.h" -+#include "system.h" -+#include "coretypes.h" -+#include "tm.h" -+#include "configargs.h" -+ -+struct vendor_cpu { -+ const char *part_no; -+ const char *arch_name; -+ const char *cpu_name; -+}; -+ -+static struct vendor_cpu arm_cpu_table[] = { -+ {"0x926", "armv5te", "arm926ej-s"}, -+ {"0xa26", "armv5te", "arm1026ej-s"}, -+ {"0xb02", "armv6k", "mpcore"}, -+ {"0xb36", "armv6j", "arm1136j-s"}, -+ {"0xb56", "armv6t2", "arm1156t2-s"}, -+ {"0xb76", "armv6zk", "arm1176jz-s"}, -+ {"0xc05", "armv7-a", "cortex-a5"}, -+ {"0xc08", "armv7-a", "cortex-a8"}, -+ {"0xc09", "armv7-a", "cortex-a9"}, -+ {"0xc0f", "armv7-a", "cortex-a15"}, -+ {"0xc14", "armv7-r", "cortex-r4"}, -+ {"0xc15", "armv7-r", "cortex-r5"}, -+ {"0xc20", "armv6-m", "cortex-m0"}, -+ {"0xc21", "armv6-m", "cortex-m1"}, -+ {"0xc23", "armv7-m", "cortex-m3"}, -+ {"0xc24", "armv7e-m", "cortex-m4"}, -+ {NULL, NULL, NULL} -+}; -+ -+static struct { -+ const char *vendor_no; -+ const struct vendor_cpu *vendor_parts; -+} vendors[] = { -+ {"0x41", arm_cpu_table}, -+ {NULL, NULL} -+}; -+ -+/* This will be called by the spec parser in gcc.c when it sees -+ a %:local_cpu_detect(args) construct. Currently it will be called -+ with either "arch", "cpu" or "tune" as argument depending on if -+ -march=native, -mcpu=native or -mtune=native is to be substituted. -+ -+ It returns a string containing new command line parameters to be -+ put at the place of the above two options, depending on what CPU -+ this is executed. E.g. "-march=armv7-a" on a Cortex-A8 for -+ -march=native. If the routine can't detect a known processor, -+ the -march or -mtune option is discarded. -+ -+ ARGC and ARGV are set depending on the actual arguments given -+ in the spec. */ -+const char * -+host_detect_local_cpu (int argc, const char **argv) -+{ -+ const char *val = NULL; -+ char buf[128]; -+ FILE *f = NULL; -+ bool arch; -+ const struct vendor_cpu *cpu_table = NULL; -+ -+ if (argc < 1) -+ goto not_found; -+ -+ arch = strcmp (argv[0], "arch") == 0; -+ if (!arch && strcmp (argv[0], "cpu") != 0 && strcmp (argv[0], "tune")) -+ goto not_found; -+ -+ f = fopen ("/proc/cpuinfo", "r"); -+ if (f == NULL) -+ goto not_found; -+ -+ while (fgets (buf, sizeof (buf), f) != NULL) -+ { -+ /* Ensure that CPU implementer is ARM (0x41). */ -+ if (strncmp (buf, "CPU implementer", sizeof ("CPU implementer") - 1) == 0) -+ { -+ int i; -+ for (i = 0; vendors[i].vendor_no != NULL; i++) -+ if (strstr (buf, vendors[i].vendor_no) != NULL) -+ { -+ cpu_table = vendors[i].vendor_parts; -+ break; -+ } -+ } -+ -+ /* Detect arch/cpu. */ -+ if (strncmp (buf, "CPU part", sizeof ("CPU part") - 1) == 0) -+ { -+ int i; -+ -+ if (cpu_table == NULL) -+ goto not_found; -+ -+ for (i = 0; cpu_table[i].part_no != NULL; i++) -+ if (strstr (buf, cpu_table[i].part_no) != NULL) -+ { -+ val = arch ? cpu_table[i].arch_name : cpu_table[i].cpu_name; -+ break; -+ } -+ break; -+ } -+ } -+ -+ fclose (f); -+ -+ if (val == NULL) -+ goto not_found; -+ -+ return concat ("-m", argv[0], "=", val, NULL); -+ -+not_found: -+ { -+ unsigned int i; -+ unsigned int opt; -+ const char *search[] = {NULL, "arch"}; -+ -+ if (f) -+ fclose (f); -+ -+ search[0] = argv[0]; -+ for (opt = 0; opt < ARRAY_SIZE (search); opt++) -+ for (i = 0; i < ARRAY_SIZE (configure_default_options); i++) -+ if (strcmp (configure_default_options[i].name, search[opt]) == 0) -+ return concat ("-m", search[opt], "=", -+ configure_default_options[i].value, NULL); -+ return NULL; -+ } -+} ---- a/src/gcc/config/arm/elf.h -+++ b/src/gcc/config/arm/elf.h -@@ -56,8 +56,7 @@ - #define ASM_SPEC "\ - %{mbig-endian:-EB} \ - %{mlittle-endian:-EL} \ --%{mcpu=*:-mcpu=%*} \ --%{march=*:-march=%*} \ -+%(asm_cpu_spec) \ - %{mapcs-*:-mapcs-%*} \ - %(subtarget_asm_float_spec) \ - %{mthumb-interwork:-mthumb-interwork} \ ---- a/src/gcc/config/arm/iterators.md -+++ b/src/gcc/config/arm/iterators.md -@@ -33,6 +33,15 @@ - ;; A list of integer modes that are up to one word long - (define_mode_iterator QHSI [QI HI SI]) - -+;; A list of integer modes that are less than a word -+(define_mode_iterator NARROW [QI HI]) -+ -+;; A list of all the integer modes upto 64bit -+(define_mode_iterator QHSD [QI HI SI DI]) -+ -+;; A list of the 32bit and 64bit integer modes -+(define_mode_iterator SIDI [SI DI]) -+ - ;; Integer element sizes implemented by IWMMXT. - (define_mode_iterator VMMX [V2SI V4HI V8QI]) - -@@ -194,24 +203,22 @@ - - ;; Mode of pair of elements for each vector mode, to define transfer - ;; size for structure lane/dup loads and stores. --(define_mode_attr V_two_elem [(V8QI "HI") (V16QI "HI") -- (V4HI "SI") (V8HI "SI") -+(define_mode_attr V_two_elem [(V8QI "HI") (V16QI "HI") -+ (V4HI "SI") (V8HI "SI") - (V2SI "V2SI") (V4SI "V2SI") - (V2SF "V2SF") (V4SF "V2SF") - (DI "V2DI") (V2DI "V2DI")]) - - ;; Similar, for three elements. --;; ??? Should we define extra modes so that sizes of all three-element --;; accesses can be accurately represented? --(define_mode_attr V_three_elem [(V8QI "SI") (V16QI "SI") -- (V4HI "V4HI") (V8HI "V4HI") -- (V2SI "V4SI") (V4SI "V4SI") -- (V2SF "V4SF") (V4SF "V4SF") -- (DI "EI") (V2DI "EI")]) -+(define_mode_attr V_three_elem [(V8QI "BLK") (V16QI "BLK") -+ (V4HI "BLK") (V8HI "BLK") -+ (V2SI "BLK") (V4SI "BLK") -+ (V2SF "BLK") (V4SF "BLK") -+ (DI "EI") (V2DI "EI")]) - - ;; Similar, for four elements. - (define_mode_attr V_four_elem [(V8QI "SI") (V16QI "SI") -- (V4HI "V4HI") (V8HI "V4HI") -+ (V4HI "V4HI") (V8HI "V4HI") - (V2SI "V4SI") (V4SI "V4SI") - (V2SF "V4SF") (V4SF "V4SF") - (DI "OI") (V2DI "OI")]) -@@ -381,10 +388,17 @@ - (define_mode_attr qhs_zextenddi_cond [(SI "") (HI "&& arm_arch6") (QI "")]) - (define_mode_attr qhs_sextenddi_cond [(SI "") (HI "&& arm_arch6") - (QI "&& arm_arch6")]) --(define_mode_attr qhs_extenddi_op [(SI "s_register_operand") -+(define_mode_attr qhs_zextenddi_op [(SI "s_register_operand") - (HI "nonimmediate_operand") - (QI "nonimmediate_operand")]) --(define_mode_attr qhs_extenddi_cstr [(SI "r") (HI "rm") (QI "rm")]) -+(define_mode_attr qhs_extenddi_op [(SI "s_register_operand") -+ (HI "nonimmediate_operand") -+ (QI "arm_reg_or_extendqisi_mem_op")]) -+(define_mode_attr qhs_extenddi_cstr [(SI "r") (HI "rm") (QI "rUq")]) -+(define_mode_attr qhs_zextenddi_cstr [(SI "r") (HI "rm") (QI "rm")]) -+ -+;; Mode attribute for vshll. -+(define_mode_attr V_innermode [(V8QI "QI") (V4HI "HI") (V2SI "SI")]) - - ;;---------------------------------------------------------------------------- - ;; Code attributes ---- a/src/gcc/config/arm/linux-atomic-64bit.c -+++ b/src/gcc/config/arm/linux-atomic-64bit.c -@@ -0,0 +1,166 @@ -+/* 64bit Linux-specific atomic operations for ARM EABI. -+ Copyright (C) 2008, 2009, 2010, 2011 Free Software Foundation, Inc. -+ Based on linux-atomic.c -+ -+ 64 bit additions david.gilbert@linaro.org -+ -+This file is part of GCC. -+ -+GCC is free software; you can redistribute it and/or modify it under -+the terms of the GNU General Public License as published by the Free -+Software Foundation; either version 3, or (at your option) any later -+version. -+ -+GCC is distributed in the hope that it will be useful, but WITHOUT ANY -+WARRANTY; without even the implied warranty of MERCHANTABILITY or -+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+for more details. -+ -+Under Section 7 of GPL version 3, you are granted additional -+permissions described in the GCC Runtime Library Exception, version -+3.1, as published by the Free Software Foundation. -+ -+You should have received a copy of the GNU General Public License and -+a copy of the GCC Runtime Library Exception along with this program; -+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -+<http://www.gnu.org/licenses/>. */ -+ -+/* 64bit helper functions for atomic operations; the compiler will -+ call these when the code is compiled for a CPU without ldrexd/strexd. -+ (If the CPU had those then the compiler inlines the operation). -+ -+ These helpers require a kernel helper that's only present on newer -+ kernels; we check for that in an init section and bail out rather -+ unceremoneously. */ -+ -+extern unsigned int __write (int fd, const void *buf, unsigned int count); -+extern void abort (void); -+ -+/* Kernel helper for compare-and-exchange. */ -+typedef int (__kernel_cmpxchg64_t) (const long long* oldval, -+ const long long* newval, -+ long long *ptr); -+#define __kernel_cmpxchg64 (*(__kernel_cmpxchg64_t *) 0xffff0f60) -+ -+/* Kernel helper page version number. */ -+#define __kernel_helper_version (*(unsigned int *)0xffff0ffc) -+ -+/* Check that the kernel has a new enough version at load. */ -+static void __check_for_sync8_kernelhelper (void) -+{ -+ if (__kernel_helper_version < 5) -+ { -+ const char err[] = "A newer kernel is required to run this binary. " -+ "(__kernel_cmpxchg64 helper)\n"; -+ /* At this point we need a way to crash with some information -+ for the user - I'm not sure I can rely on much else being -+ available at this point, so do the same as generic-morestack.c -+ write () and abort (). */ -+ __write (2 /* stderr. */, err, sizeof (err)); -+ abort (); -+ } -+}; -+ -+static void (*__sync8_kernelhelper_inithook[]) (void) -+ __attribute__ ((used, section (".init_array"))) = { -+ &__check_for_sync8_kernelhelper -+}; -+ -+#define HIDDEN __attribute__ ((visibility ("hidden"))) -+ -+#define FETCH_AND_OP_WORD64(OP, PFX_OP, INF_OP) \ -+ long long HIDDEN \ -+ __sync_fetch_and_##OP##_8 (long long *ptr, long long val) \ -+ { \ -+ int failure; \ -+ long long tmp,tmp2; \ -+ \ -+ do { \ -+ tmp = *ptr; \ -+ tmp2 = PFX_OP (tmp INF_OP val); \ -+ failure = __kernel_cmpxchg64 (&tmp, &tmp2, ptr); \ -+ } while (failure != 0); \ -+ \ -+ return tmp; \ -+ } -+ -+FETCH_AND_OP_WORD64 (add, , +) -+FETCH_AND_OP_WORD64 (sub, , -) -+FETCH_AND_OP_WORD64 (or, , |) -+FETCH_AND_OP_WORD64 (and, , &) -+FETCH_AND_OP_WORD64 (xor, , ^) -+FETCH_AND_OP_WORD64 (nand, ~, &) -+ -+#define NAME_oldval(OP, WIDTH) __sync_fetch_and_##OP##_##WIDTH -+#define NAME_newval(OP, WIDTH) __sync_##OP##_and_fetch_##WIDTH -+ -+/* Implement both __sync_<op>_and_fetch and __sync_fetch_and_<op> for -+ subword-sized quantities. */ -+ -+#define OP_AND_FETCH_WORD64(OP, PFX_OP, INF_OP) \ -+ long long HIDDEN \ -+ __sync_##OP##_and_fetch_8 (long long *ptr, long long val) \ -+ { \ -+ int failure; \ -+ long long tmp,tmp2; \ -+ \ -+ do { \ -+ tmp = *ptr; \ -+ tmp2 = PFX_OP (tmp INF_OP val); \ -+ failure = __kernel_cmpxchg64 (&tmp, &tmp2, ptr); \ -+ } while (failure != 0); \ -+ \ -+ return tmp2; \ -+ } -+ -+OP_AND_FETCH_WORD64 (add, , +) -+OP_AND_FETCH_WORD64 (sub, , -) -+OP_AND_FETCH_WORD64 (or, , |) -+OP_AND_FETCH_WORD64 (and, , &) -+OP_AND_FETCH_WORD64 (xor, , ^) -+OP_AND_FETCH_WORD64 (nand, ~, &) -+ -+long long HIDDEN -+__sync_val_compare_and_swap_8 (long long *ptr, long long oldval, -+ long long newval) -+{ -+ int failure; -+ long long actual_oldval; -+ -+ while (1) -+ { -+ actual_oldval = *ptr; -+ -+ if (__builtin_expect (oldval != actual_oldval, 0)) -+ return actual_oldval; -+ -+ failure = __kernel_cmpxchg64 (&actual_oldval, &newval, ptr); -+ -+ if (__builtin_expect (!failure, 1)) -+ return oldval; -+ } -+} -+ -+typedef unsigned char bool; -+ -+bool HIDDEN -+__sync_bool_compare_and_swap_8 (long long *ptr, long long oldval, -+ long long newval) -+{ -+ int failure = __kernel_cmpxchg64 (&oldval, &newval, ptr); -+ return (failure == 0); -+} -+ -+long long HIDDEN -+__sync_lock_test_and_set_8 (long long *ptr, long long val) -+{ -+ int failure; -+ long long oldval; -+ -+ do { -+ oldval = *ptr; -+ failure = __kernel_cmpxchg64 (&oldval, &val, ptr); -+ } while (failure != 0); -+ -+ return oldval; -+} ---- a/src/gcc/config/arm/linux-atomic.c -+++ b/src/gcc/config/arm/linux-atomic.c -@@ -32,8 +32,8 @@ - #define __kernel_dmb (*(__kernel_dmb_t *) 0xffff0fa0) - - /* Note: we implement byte, short and int versions of atomic operations using -- the above kernel helpers, but there is no support for "long long" (64-bit) -- operations as yet. */ -+ the above kernel helpers; see linux-atomic-64bit.c for "long long" (64-bit) -+ operations. */ - - #define HIDDEN __attribute__ ((visibility ("hidden"))) - -@@ -273,6 +273,7 @@ - *ptr = 0; \ - } - -+SYNC_LOCK_RELEASE (long long, 8) - SYNC_LOCK_RELEASE (int, 4) - SYNC_LOCK_RELEASE (short, 2) - SYNC_LOCK_RELEASE (char, 1) ---- a/src/gcc/config/arm/neon-testgen.ml -+++ b/src/gcc/config/arm/neon-testgen.ml -@@ -177,7 +177,7 @@ - let alt2 = commas (fun x -> x) (n_things n elt_regexp) "" in - "\\\\\\{((" ^ alt1 ^ ")|(" ^ alt2 ^ "))\\\\\\}" - | (PtrTo elt | CstPtrTo elt) -> -- "\\\\\\[" ^ (analyze_shape_elt elt) ^ "\\\\\\]" -+ "\\\\\\[" ^ (analyze_shape_elt elt) ^ "\\(:\\[0-9\\]+\\)?\\\\\\]" - | Element_of_dreg -> (analyze_shape_elt Dreg) ^ "\\\\\\[\\[0-9\\]+\\\\\\]" - | Element_of_qreg -> (analyze_shape_elt Qreg) ^ "\\\\\\[\\[0-9\\]+\\\\\\]" - | All_elements_of_dreg -> (analyze_shape_elt Dreg) ^ "\\\\\\[\\\\\\]" ---- a/src/gcc/config/arm/neon.md -+++ b/src/gcc/config/arm/neon.md -@@ -783,30 +783,57 @@ - - (define_insn "orn<mode>3_neon" - [(set (match_operand:VDQ 0 "s_register_operand" "=w") -- (ior:VDQ (match_operand:VDQ 1 "s_register_operand" "w") -- (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w"))))] -+ (ior:VDQ (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w")) -+ (match_operand:VDQ 1 "s_register_operand" "w")))] - "TARGET_NEON" - "vorn\t%<V_reg>0, %<V_reg>1, %<V_reg>2" - [(set_attr "neon_type" "neon_int_1")] - ) - --(define_insn "orndi3_neon" -- [(set (match_operand:DI 0 "s_register_operand" "=w,?=&r,?&r") -- (ior:DI (match_operand:DI 1 "s_register_operand" "w,r,0") -- (not:DI (match_operand:DI 2 "s_register_operand" "w,0,r"))))] -+;; TODO: investigate whether we should disable -+;; this and bicdi3_neon for the A8 in line with the other -+;; changes above. -+(define_insn_and_split "orndi3_neon" -+ [(set (match_operand:DI 0 "s_register_operand" "=w,?&r,?&r,?&r") -+ (ior:DI (not:DI (match_operand:DI 2 "s_register_operand" "w,0,0,r")) -+ (match_operand:DI 1 "s_register_operand" "w,r,r,0")))] - "TARGET_NEON" - "@ - vorn\t%P0, %P1, %P2 - # -+ # - #" -- [(set_attr "neon_type" "neon_int_1,*,*") -- (set_attr "length" "*,8,8")] -+ "reload_completed && -+ (TARGET_NEON && !(IS_VFP_REGNUM (REGNO (operands[0]))))" -+ [(set (match_dup 0) (ior:SI (not:SI (match_dup 2)) (match_dup 1))) -+ (set (match_dup 3) (ior:SI (not:SI (match_dup 4)) (match_dup 5)))] -+ " -+ { -+ if (TARGET_THUMB2) -+ { -+ operands[3] = gen_highpart (SImode, operands[0]); -+ operands[0] = gen_lowpart (SImode, operands[0]); -+ operands[4] = gen_highpart (SImode, operands[2]); -+ operands[2] = gen_lowpart (SImode, operands[2]); -+ operands[5] = gen_highpart (SImode, operands[1]); -+ operands[1] = gen_lowpart (SImode, operands[1]); -+ } -+ else -+ { -+ emit_insn (gen_one_cmpldi2 (operands[0], operands[2])); -+ emit_insn (gen_iordi3 (operands[0], operands[1], operands[0])); -+ DONE; -+ } -+ }" -+ [(set_attr "neon_type" "neon_int_1,*,*,*") -+ (set_attr "length" "*,16,8,8") -+ (set_attr "arch" "any,a,t2,t2")] - ) - - (define_insn "bic<mode>3_neon" - [(set (match_operand:VDQ 0 "s_register_operand" "=w") -- (and:VDQ (match_operand:VDQ 1 "s_register_operand" "w") -- (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w"))))] -+ (and:VDQ (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w")) -+ (match_operand:VDQ 1 "s_register_operand" "w")))] - "TARGET_NEON" - "vbic\t%<V_reg>0, %<V_reg>1, %<V_reg>2" - [(set_attr "neon_type" "neon_int_1")] -@@ -929,17 +956,59 @@ - ; SImode elements. - - (define_insn "vashl<mode>3" -+ [(set (match_operand:VDQIW 0 "s_register_operand" "=w,w") -+ (ashift:VDQIW (match_operand:VDQIW 1 "s_register_operand" "w,w") -+ (match_operand:VDQIW 2 "imm_lshift_or_reg_neon" "w,Dn")))] -+ "TARGET_NEON" -+ { -+ switch (which_alternative) -+ { -+ case 0: return "vshl.<V_s_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"; -+ case 1: return neon_output_shift_immediate ("vshl", 'i', &operands[2], -+ <MODE>mode, -+ VALID_NEON_QREG_MODE (<MODE>mode), -+ true); -+ default: gcc_unreachable (); -+ } -+ } -+ [(set (attr "neon_type") -+ (if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0)) -+ (const_string "neon_vshl_ddd") -+ (const_string "neon_shift_3")))] -+) -+ -+(define_insn "vashr<mode>3_imm" - [(set (match_operand:VDQIW 0 "s_register_operand" "=w") -- (ashift:VDQIW (match_operand:VDQIW 1 "s_register_operand" "w") -- (match_operand:VDQIW 2 "s_register_operand" "w")))] -+ (ashiftrt:VDQIW (match_operand:VDQIW 1 "s_register_operand" "w") -+ (match_operand:VDQIW 2 "imm_for_neon_rshift_operand" "Dn")))] - "TARGET_NEON" -- "vshl.<V_s_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2" -+ { -+ return neon_output_shift_immediate ("vshr", 's', &operands[2], -+ <MODE>mode, VALID_NEON_QREG_MODE (<MODE>mode), -+ false); -+ } - [(set (attr "neon_type") - (if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0)) - (const_string "neon_vshl_ddd") - (const_string "neon_shift_3")))] - ) - -+(define_insn "vlshr<mode>3_imm" -+ [(set (match_operand:VDQIW 0 "s_register_operand" "=w") -+ (lshiftrt:VDQIW (match_operand:VDQIW 1 "s_register_operand" "w") -+ (match_operand:VDQIW 2 "imm_for_neon_rshift_operand" "Dn")))] -+ "TARGET_NEON" -+ { -+ return neon_output_shift_immediate ("vshr", 'u', &operands[2], -+ <MODE>mode, VALID_NEON_QREG_MODE (<MODE>mode), -+ false); -+ } -+ [(set (attr "neon_type") -+ (if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0)) -+ (const_string "neon_vshl_ddd") -+ (const_string "neon_shift_3")))] -+) -+ - ; Used for implementing logical shift-right, which is a left-shift by a negative - ; amount, with signed operands. This is essentially the same as ashl<mode>3 - ; above, but using an unspec in case GCC tries anything tricky with negative -@@ -977,28 +1046,34 @@ - (define_expand "vashr<mode>3" - [(set (match_operand:VDQIW 0 "s_register_operand" "") - (ashiftrt:VDQIW (match_operand:VDQIW 1 "s_register_operand" "") -- (match_operand:VDQIW 2 "s_register_operand" "")))] -+ (match_operand:VDQIW 2 "imm_rshift_or_reg_neon" "")))] - "TARGET_NEON" - { - rtx neg = gen_reg_rtx (<MODE>mode); -- -- emit_insn (gen_neg<mode>2 (neg, operands[2])); -- emit_insn (gen_ashl<mode>3_signed (operands[0], operands[1], neg)); -- -+ if (REG_P (operands[2])) -+ { -+ emit_insn (gen_neg<mode>2 (neg, operands[2])); -+ emit_insn (gen_ashl<mode>3_signed (operands[0], operands[1], neg)); -+ } -+ else -+ emit_insn (gen_vashr<mode>3_imm (operands[0], operands[1], operands[2])); - DONE; - }) - - (define_expand "vlshr<mode>3" - [(set (match_operand:VDQIW 0 "s_register_operand" "") - (lshiftrt:VDQIW (match_operand:VDQIW 1 "s_register_operand" "") -- (match_operand:VDQIW 2 "s_register_operand" "")))] -+ (match_operand:VDQIW 2 "imm_rshift_or_reg_neon" "")))] - "TARGET_NEON" - { - rtx neg = gen_reg_rtx (<MODE>mode); -- -- emit_insn (gen_neg<mode>2 (neg, operands[2])); -- emit_insn (gen_ashl<mode>3_unsigned (operands[0], operands[1], neg)); -- -+ if (REG_P (operands[2])) -+ { -+ emit_insn (gen_neg<mode>2 (neg, operands[2])); -+ emit_insn (gen_ashl<mode>3_unsigned (operands[0], operands[1], neg)); -+ } -+ else -+ emit_insn (gen_vlshr<mode>3_imm (operands[0], operands[1], operands[2])); - DONE; - }) - -@@ -1160,66 +1235,14 @@ - (const_string "neon_int_1") (const_string "neon_int_5")))] - ) - --; FIXME: We wouldn't need the following insns if we could write subregs of --; vector registers. Make an attempt at removing unnecessary moves, though --; we're really at the mercy of the register allocator. -- --(define_insn "neon_move_lo_quad_<mode>" -- [(set (match_operand:ANY128 0 "s_register_operand" "+w") -- (vec_concat:ANY128 -- (match_operand:<V_HALF> 1 "s_register_operand" "w") -- (vec_select:<V_HALF> -- (match_dup 0) -- (match_operand:ANY128 2 "vect_par_constant_high" ""))))] -- "TARGET_NEON" --{ -- int dest = REGNO (operands[0]); -- int src = REGNO (operands[1]); -- -- if (dest != src) -- return "vmov\t%e0, %P1"; -- else -- return ""; --} -- [(set_attr "neon_type" "neon_bp_simple")] --) -- --(define_insn "neon_move_hi_quad_<mode>" -- [(set (match_operand:ANY128 0 "s_register_operand" "+w") -- (vec_concat:ANY128 -- (vec_select:<V_HALF> -- (match_dup 0) -- (match_operand:ANY128 2 "vect_par_constant_low" "")) -- (match_operand:<V_HALF> 1 "s_register_operand" "w")))] -- -- "TARGET_NEON" --{ -- int dest = REGNO (operands[0]); -- int src = REGNO (operands[1]); -- -- if (dest != src) -- return "vmov\t%f0, %P1"; -- else -- return ""; --} -- [(set_attr "neon_type" "neon_bp_simple")] --) -- - (define_expand "move_hi_quad_<mode>" - [(match_operand:ANY128 0 "s_register_operand" "") - (match_operand:<V_HALF> 1 "s_register_operand" "")] - "TARGET_NEON" - { -- rtvec v = rtvec_alloc (<V_mode_nunits>/2); -- rtx t1; -- int i; -- -- for (i=0; i < (<V_mode_nunits>/2); i++) -- RTVEC_ELT (v, i) = GEN_INT (i); -- -- t1 = gen_rtx_PARALLEL (<MODE>mode, v); -- emit_insn (gen_neon_move_hi_quad_<mode> (operands[0], operands[1], t1)); -- -+ emit_move_insn (simplify_gen_subreg (<V_HALF>mode, operands[0], <MODE>mode, -+ GET_MODE_SIZE (<V_HALF>mode)), -+ operands[1]); - DONE; - }) - -@@ -1228,16 +1251,9 @@ - (match_operand:<V_HALF> 1 "s_register_operand" "")] - "TARGET_NEON" - { -- rtvec v = rtvec_alloc (<V_mode_nunits>/2); -- rtx t1; -- int i; -- -- for (i=0; i < (<V_mode_nunits>/2); i++) -- RTVEC_ELT (v, i) = GEN_INT ((<V_mode_nunits>/2) + i); -- -- t1 = gen_rtx_PARALLEL (<MODE>mode, v); -- emit_insn (gen_neon_move_lo_quad_<mode> (operands[0], operands[1], t1)); -- -+ emit_move_insn (simplify_gen_subreg (<V_HALF>mode, operands[0], -+ <MODE>mode, 0), -+ operands[1]); - DONE; - }) - -@@ -2875,183 +2891,27 @@ - (set_attr "neon_type" "neon_bp_simple")] - ) - --(define_insn "neon_vget_highv16qi" -- [(set (match_operand:V8QI 0 "s_register_operand" "=w") -- (vec_select:V8QI (match_operand:V16QI 1 "s_register_operand" "w") -- (parallel [(const_int 8) (const_int 9) -- (const_int 10) (const_int 11) -- (const_int 12) (const_int 13) -- (const_int 14) (const_int 15)])))] -- "TARGET_NEON" --{ -- int dest = REGNO (operands[0]); -- int src = REGNO (operands[1]); -- -- if (dest != src + 2) -- return "vmov\t%P0, %f1"; -- else -- return ""; --} -- [(set_attr "neon_type" "neon_bp_simple")] --) -- --(define_insn "neon_vget_highv8hi" -- [(set (match_operand:V4HI 0 "s_register_operand" "=w") -- (vec_select:V4HI (match_operand:V8HI 1 "s_register_operand" "w") -- (parallel [(const_int 4) (const_int 5) -- (const_int 6) (const_int 7)])))] -- "TARGET_NEON" --{ -- int dest = REGNO (operands[0]); -- int src = REGNO (operands[1]); -- -- if (dest != src + 2) -- return "vmov\t%P0, %f1"; -- else -- return ""; --} -- [(set_attr "neon_type" "neon_bp_simple")] --) -- --(define_insn "neon_vget_highv4si" -- [(set (match_operand:V2SI 0 "s_register_operand" "=w") -- (vec_select:V2SI (match_operand:V4SI 1 "s_register_operand" "w") -- (parallel [(const_int 2) (const_int 3)])))] -- "TARGET_NEON" --{ -- int dest = REGNO (operands[0]); -- int src = REGNO (operands[1]); -- -- if (dest != src + 2) -- return "vmov\t%P0, %f1"; -- else -- return ""; --} -- [(set_attr "neon_type" "neon_bp_simple")] --) -- --(define_insn "neon_vget_highv4sf" -- [(set (match_operand:V2SF 0 "s_register_operand" "=w") -- (vec_select:V2SF (match_operand:V4SF 1 "s_register_operand" "w") -- (parallel [(const_int 2) (const_int 3)])))] -- "TARGET_NEON" --{ -- int dest = REGNO (operands[0]); -- int src = REGNO (operands[1]); -- -- if (dest != src + 2) -- return "vmov\t%P0, %f1"; -- else -- return ""; --} -- [(set_attr "neon_type" "neon_bp_simple")] --) -- --(define_insn "neon_vget_highv2di" -- [(set (match_operand:DI 0 "s_register_operand" "=w") -- (vec_select:DI (match_operand:V2DI 1 "s_register_operand" "w") -- (parallel [(const_int 1)])))] -- "TARGET_NEON" --{ -- int dest = REGNO (operands[0]); -- int src = REGNO (operands[1]); -- -- if (dest != src + 2) -- return "vmov\t%P0, %f1"; -- else -- return ""; --} -- [(set_attr "neon_type" "neon_bp_simple")] --) -- --(define_insn "neon_vget_lowv16qi" -- [(set (match_operand:V8QI 0 "s_register_operand" "=w") -- (vec_select:V8QI (match_operand:V16QI 1 "s_register_operand" "w") -- (parallel [(const_int 0) (const_int 1) -- (const_int 2) (const_int 3) -- (const_int 4) (const_int 5) -- (const_int 6) (const_int 7)])))] -- "TARGET_NEON" --{ -- int dest = REGNO (operands[0]); -- int src = REGNO (operands[1]); -- -- if (dest != src) -- return "vmov\t%P0, %e1"; -- else -- return ""; --} -- [(set_attr "neon_type" "neon_bp_simple")] --) -- --(define_insn "neon_vget_lowv8hi" -- [(set (match_operand:V4HI 0 "s_register_operand" "=w") -- (vec_select:V4HI (match_operand:V8HI 1 "s_register_operand" "w") -- (parallel [(const_int 0) (const_int 1) -- (const_int 2) (const_int 3)])))] -- "TARGET_NEON" --{ -- int dest = REGNO (operands[0]); -- int src = REGNO (operands[1]); -- -- if (dest != src) -- return "vmov\t%P0, %e1"; -- else -- return ""; --} -- [(set_attr "neon_type" "neon_bp_simple")] --) -- --(define_insn "neon_vget_lowv4si" -- [(set (match_operand:V2SI 0 "s_register_operand" "=w") -- (vec_select:V2SI (match_operand:V4SI 1 "s_register_operand" "w") -- (parallel [(const_int 0) (const_int 1)])))] -- "TARGET_NEON" --{ -- int dest = REGNO (operands[0]); -- int src = REGNO (operands[1]); -- -- if (dest != src) -- return "vmov\t%P0, %e1"; -- else -- return ""; --} -- [(set_attr "neon_type" "neon_bp_simple")] --) -- --(define_insn "neon_vget_lowv4sf" -- [(set (match_operand:V2SF 0 "s_register_operand" "=w") -- (vec_select:V2SF (match_operand:V4SF 1 "s_register_operand" "w") -- (parallel [(const_int 0) (const_int 1)])))] -+(define_expand "neon_vget_high<mode>" -+ [(match_operand:<V_HALF> 0 "s_register_operand") -+ (match_operand:VQX 1 "s_register_operand")] - "TARGET_NEON" - { -- int dest = REGNO (operands[0]); -- int src = REGNO (operands[1]); -- -- if (dest != src) -- return "vmov\t%P0, %e1"; -- else -- return ""; --} -- [(set_attr "neon_type" "neon_bp_simple")] --) -+ emit_move_insn (operands[0], -+ simplify_gen_subreg (<V_HALF>mode, operands[1], <MODE>mode, -+ GET_MODE_SIZE (<V_HALF>mode))); -+ DONE; -+}) - --(define_insn "neon_vget_lowv2di" -- [(set (match_operand:DI 0 "s_register_operand" "=w") -- (vec_select:DI (match_operand:V2DI 1 "s_register_operand" "w") -- (parallel [(const_int 0)])))] -+(define_expand "neon_vget_low<mode>" -+ [(match_operand:<V_HALF> 0 "s_register_operand") -+ (match_operand:VQX 1 "s_register_operand")] - "TARGET_NEON" - { -- int dest = REGNO (operands[0]); -- int src = REGNO (operands[1]); -- -- if (dest != src) -- return "vmov\t%P0, %e1"; -- else -- return ""; --} -- [(set_attr "neon_type" "neon_bp_simple")] --) -+ emit_move_insn (operands[0], -+ simplify_gen_subreg (<V_HALF>mode, operands[1], -+ <MODE>mode, 0)); -+ DONE; -+}) - - (define_insn "neon_vcvt<mode>" - [(set (match_operand:<V_CVTTO> 0 "s_register_operand" "=w") -@@ -4248,18 +4108,24 @@ - DONE; - }) - -+(define_expand "vec_load_lanes<mode><mode>" -+ [(set (match_operand:VDQX 0 "s_register_operand") -+ (unspec:VDQX [(match_operand:VDQX 1 "neon_struct_operand")] -+ UNSPEC_VLD1))] -+ "TARGET_NEON") -+ - (define_insn "neon_vld1<mode>" - [(set (match_operand:VDQX 0 "s_register_operand" "=w") -- (unspec:VDQX [(mem:VDQX (match_operand:SI 1 "s_register_operand" "r"))] -+ (unspec:VDQX [(match_operand:VDQX 1 "neon_struct_operand" "Um")] - UNSPEC_VLD1))] - "TARGET_NEON" -- "vld1.<V_sz_elem>\t%h0, [%1]" -+ "vld1.<V_sz_elem>\t%h0, %A1" - [(set_attr "neon_type" "neon_vld1_1_2_regs")] - ) - - (define_insn "neon_vld1_lane<mode>" - [(set (match_operand:VDX 0 "s_register_operand" "=w") -- (unspec:VDX [(mem:<V_elem> (match_operand:SI 1 "s_register_operand" "r")) -+ (unspec:VDX [(match_operand:<V_elem> 1 "neon_struct_operand" "Um") - (match_operand:VDX 2 "s_register_operand" "0") - (match_operand:SI 3 "immediate_operand" "i")] - UNSPEC_VLD1_LANE))] -@@ -4270,9 +4136,9 @@ - if (lane < 0 || lane >= max) - error ("lane out of range"); - if (max == 1) -- return "vld1.<V_sz_elem>\t%P0, [%1]"; -+ return "vld1.<V_sz_elem>\t%P0, %A1"; - else -- return "vld1.<V_sz_elem>\t{%P0[%c3]}, [%1]"; -+ return "vld1.<V_sz_elem>\t{%P0[%c3]}, %A1"; - } - [(set (attr "neon_type") - (if_then_else (eq (const_string "<V_mode_nunits>") (const_int 2)) -@@ -4282,7 +4148,7 @@ - - (define_insn "neon_vld1_lane<mode>" - [(set (match_operand:VQX 0 "s_register_operand" "=w") -- (unspec:VQX [(mem:<V_elem> (match_operand:SI 1 "s_register_operand" "r")) -+ (unspec:VQX [(match_operand:<V_elem> 1 "neon_struct_operand" "Um") - (match_operand:VQX 2 "s_register_operand" "0") - (match_operand:SI 3 "immediate_operand" "i")] - UNSPEC_VLD1_LANE))] -@@ -4301,9 +4167,9 @@ - } - operands[0] = gen_rtx_REG (<V_HALF>mode, regno); - if (max == 2) -- return "vld1.<V_sz_elem>\t%P0, [%1]"; -+ return "vld1.<V_sz_elem>\t%P0, %A1"; - else -- return "vld1.<V_sz_elem>\t{%P0[%c3]}, [%1]"; -+ return "vld1.<V_sz_elem>\t{%P0[%c3]}, %A1"; - } - [(set (attr "neon_type") - (if_then_else (eq (const_string "<V_mode_nunits>") (const_int 2)) -@@ -4313,14 +4179,14 @@ - - (define_insn "neon_vld1_dup<mode>" - [(set (match_operand:VDX 0 "s_register_operand" "=w") -- (unspec:VDX [(mem:<V_elem> (match_operand:SI 1 "s_register_operand" "r"))] -+ (unspec:VDX [(match_operand:<V_elem> 1 "neon_struct_operand" "Um")] - UNSPEC_VLD1_DUP))] - "TARGET_NEON" - { - if (GET_MODE_NUNITS (<MODE>mode) > 1) -- return "vld1.<V_sz_elem>\t{%P0[]}, [%1]"; -+ return "vld1.<V_sz_elem>\t{%P0[]}, %A1"; - else -- return "vld1.<V_sz_elem>\t%h0, [%1]"; -+ return "vld1.<V_sz_elem>\t%h0, %A1"; - } - [(set (attr "neon_type") - (if_then_else (gt (const_string "<V_mode_nunits>") (const_string "1")) -@@ -4330,14 +4196,14 @@ - - (define_insn "neon_vld1_dup<mode>" - [(set (match_operand:VQX 0 "s_register_operand" "=w") -- (unspec:VQX [(mem:<V_elem> (match_operand:SI 1 "s_register_operand" "r"))] -+ (unspec:VQX [(match_operand:<V_elem> 1 "neon_struct_operand" "Um")] - UNSPEC_VLD1_DUP))] - "TARGET_NEON" - { - if (GET_MODE_NUNITS (<MODE>mode) > 2) -- return "vld1.<V_sz_elem>\t{%e0[], %f0[]}, [%1]"; -+ return "vld1.<V_sz_elem>\t{%e0[], %f0[]}, %A1"; - else -- return "vld1.<V_sz_elem>\t%h0, [%1]"; -+ return "vld1.<V_sz_elem>\t%h0, %A1"; - } - [(set (attr "neon_type") - (if_then_else (gt (const_string "<V_mode_nunits>") (const_string "1")) -@@ -4345,16 +4211,22 @@ - (const_string "neon_vld1_1_2_regs")))] - ) - -+(define_expand "vec_store_lanes<mode><mode>" -+ [(set (match_operand:VDQX 0 "neon_struct_operand") -+ (unspec:VDQX [(match_operand:VDQX 1 "s_register_operand")] -+ UNSPEC_VST1))] -+ "TARGET_NEON") -+ - (define_insn "neon_vst1<mode>" -- [(set (mem:VDQX (match_operand:SI 0 "s_register_operand" "r")) -+ [(set (match_operand:VDQX 0 "neon_struct_operand" "=Um") - (unspec:VDQX [(match_operand:VDQX 1 "s_register_operand" "w")] - UNSPEC_VST1))] - "TARGET_NEON" -- "vst1.<V_sz_elem>\t%h1, [%0]" -+ "vst1.<V_sz_elem>\t%h1, %A0" - [(set_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs")]) - - (define_insn "neon_vst1_lane<mode>" -- [(set (mem:<V_elem> (match_operand:SI 0 "s_register_operand" "r")) -+ [(set (match_operand:<V_elem> 0 "neon_struct_operand" "=Um") - (vec_select:<V_elem> - (match_operand:VDX 1 "s_register_operand" "w") - (parallel [(match_operand:SI 2 "neon_lane_number" "i")])))] -@@ -4365,9 +4237,9 @@ - if (lane < 0 || lane >= max) - error ("lane out of range"); - if (max == 1) -- return "vst1.<V_sz_elem>\t{%P1}, [%0]"; -+ return "vst1.<V_sz_elem>\t{%P1}, %A0"; - else -- return "vst1.<V_sz_elem>\t{%P1[%c2]}, [%0]"; -+ return "vst1.<V_sz_elem>\t{%P1[%c2]}, %A0"; - } - [(set (attr "neon_type") - (if_then_else (eq (const_string "<V_mode_nunits>") (const_int 1)) -@@ -4375,7 +4247,7 @@ - (const_string "neon_vst1_vst2_lane")))]) - - (define_insn "neon_vst1_lane<mode>" -- [(set (mem:<V_elem> (match_operand:SI 0 "s_register_operand" "r")) -+ [(set (match_operand:<V_elem> 0 "neon_struct_operand" "=Um") - (vec_select:<V_elem> - (match_operand:VQX 1 "s_register_operand" "w") - (parallel [(match_operand:SI 2 "neon_lane_number" "i")])))] -@@ -4394,24 +4266,31 @@ - } - operands[1] = gen_rtx_REG (<V_HALF>mode, regno); - if (max == 2) -- return "vst1.<V_sz_elem>\t{%P1}, [%0]"; -+ return "vst1.<V_sz_elem>\t{%P1}, %A0"; - else -- return "vst1.<V_sz_elem>\t{%P1[%c2]}, [%0]"; -+ return "vst1.<V_sz_elem>\t{%P1[%c2]}, %A0"; - } - [(set_attr "neon_type" "neon_vst1_vst2_lane")] - ) - -+(define_expand "vec_load_lanesti<mode>" -+ [(set (match_operand:TI 0 "s_register_operand") -+ (unspec:TI [(match_operand:TI 1 "neon_struct_operand") -+ (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -+ UNSPEC_VLD2))] -+ "TARGET_NEON") -+ - (define_insn "neon_vld2<mode>" - [(set (match_operand:TI 0 "s_register_operand" "=w") -- (unspec:TI [(mem:TI (match_operand:SI 1 "s_register_operand" "r")) -+ (unspec:TI [(match_operand:TI 1 "neon_struct_operand" "Um") - (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - UNSPEC_VLD2))] - "TARGET_NEON" - { - if (<V_sz_elem> == 64) -- return "vld1.64\t%h0, [%1]"; -+ return "vld1.64\t%h0, %A1"; - else -- return "vld2.<V_sz_elem>\t%h0, [%1]"; -+ return "vld2.<V_sz_elem>\t%h0, %A1"; - } - [(set (attr "neon_type") - (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64")) -@@ -4419,18 +4298,25 @@ - (const_string "neon_vld2_2_regs_vld1_vld2_all_lanes")))] - ) - -+(define_expand "vec_load_lanesoi<mode>" -+ [(set (match_operand:OI 0 "s_register_operand") -+ (unspec:OI [(match_operand:OI 1 "neon_struct_operand") -+ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -+ UNSPEC_VLD2))] -+ "TARGET_NEON") -+ - (define_insn "neon_vld2<mode>" - [(set (match_operand:OI 0 "s_register_operand" "=w") -- (unspec:OI [(mem:OI (match_operand:SI 1 "s_register_operand" "r")) -+ (unspec:OI [(match_operand:OI 1 "neon_struct_operand" "Um") - (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - UNSPEC_VLD2))] - "TARGET_NEON" -- "vld2.<V_sz_elem>\t%h0, [%1]" -+ "vld2.<V_sz_elem>\t%h0, %A1" - [(set_attr "neon_type" "neon_vld2_2_regs_vld1_vld2_all_lanes")]) - - (define_insn "neon_vld2_lane<mode>" - [(set (match_operand:TI 0 "s_register_operand" "=w") -- (unspec:TI [(mem:<V_two_elem> (match_operand:SI 1 "s_register_operand" "r")) -+ (unspec:TI [(match_operand:<V_two_elem> 1 "neon_struct_operand" "Um") - (match_operand:TI 2 "s_register_operand" "0") - (match_operand:SI 3 "immediate_operand" "i") - (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -@@ -4447,7 +4333,7 @@ - ops[1] = gen_rtx_REG (DImode, regno + 2); - ops[2] = operands[1]; - ops[3] = operands[3]; -- output_asm_insn ("vld2.<V_sz_elem>\t{%P0[%c3], %P1[%c3]}, [%2]", ops); -+ output_asm_insn ("vld2.<V_sz_elem>\t{%P0[%c3], %P1[%c3]}, %A2", ops); - return ""; - } - [(set_attr "neon_type" "neon_vld1_vld2_lane")] -@@ -4455,7 +4341,7 @@ - - (define_insn "neon_vld2_lane<mode>" - [(set (match_operand:OI 0 "s_register_operand" "=w") -- (unspec:OI [(mem:<V_two_elem> (match_operand:SI 1 "s_register_operand" "r")) -+ (unspec:OI [(match_operand:<V_two_elem> 1 "neon_struct_operand" "Um") - (match_operand:OI 2 "s_register_operand" "0") - (match_operand:SI 3 "immediate_operand" "i") - (unspec:VMQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -@@ -4477,7 +4363,7 @@ - ops[1] = gen_rtx_REG (DImode, regno + 4); - ops[2] = operands[1]; - ops[3] = GEN_INT (lane); -- output_asm_insn ("vld2.<V_sz_elem>\t{%P0[%c3], %P1[%c3]}, [%2]", ops); -+ output_asm_insn ("vld2.<V_sz_elem>\t{%P0[%c3], %P1[%c3]}, %A2", ops); - return ""; - } - [(set_attr "neon_type" "neon_vld1_vld2_lane")] -@@ -4485,15 +4371,15 @@ - - (define_insn "neon_vld2_dup<mode>" - [(set (match_operand:TI 0 "s_register_operand" "=w") -- (unspec:TI [(mem:<V_two_elem> (match_operand:SI 1 "s_register_operand" "r")) -+ (unspec:TI [(match_operand:<V_two_elem> 1 "neon_struct_operand" "Um") - (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - UNSPEC_VLD2_DUP))] - "TARGET_NEON" - { - if (GET_MODE_NUNITS (<MODE>mode) > 1) -- return "vld2.<V_sz_elem>\t{%e0[], %f0[]}, [%1]"; -+ return "vld2.<V_sz_elem>\t{%e0[], %f0[]}, %A1"; - else -- return "vld1.<V_sz_elem>\t%h0, [%1]"; -+ return "vld1.<V_sz_elem>\t%h0, %A1"; - } - [(set (attr "neon_type") - (if_then_else (gt (const_string "<V_mode_nunits>") (const_string "1")) -@@ -4501,17 +4387,24 @@ - (const_string "neon_vld1_1_2_regs")))] - ) - -+(define_expand "vec_store_lanesti<mode>" -+ [(set (match_operand:TI 0 "neon_struct_operand") -+ (unspec:TI [(match_operand:TI 1 "s_register_operand") -+ (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -+ UNSPEC_VST2))] -+ "TARGET_NEON") -+ - (define_insn "neon_vst2<mode>" -- [(set (mem:TI (match_operand:SI 0 "s_register_operand" "r")) -+ [(set (match_operand:TI 0 "neon_struct_operand" "=Um") - (unspec:TI [(match_operand:TI 1 "s_register_operand" "w") - (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - UNSPEC_VST2))] - "TARGET_NEON" - { - if (<V_sz_elem> == 64) -- return "vst1.64\t%h1, [%0]"; -+ return "vst1.64\t%h1, %A0"; - else -- return "vst2.<V_sz_elem>\t%h1, [%0]"; -+ return "vst2.<V_sz_elem>\t%h1, %A0"; - } - [(set (attr "neon_type") - (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64")) -@@ -4519,18 +4412,25 @@ - (const_string "neon_vst1_1_2_regs_vst2_2_regs")))] - ) - -+(define_expand "vec_store_lanesoi<mode>" -+ [(set (match_operand:OI 0 "neon_struct_operand") -+ (unspec:OI [(match_operand:OI 1 "s_register_operand") -+ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -+ UNSPEC_VST2))] -+ "TARGET_NEON") -+ - (define_insn "neon_vst2<mode>" -- [(set (mem:OI (match_operand:SI 0 "s_register_operand" "r")) -+ [(set (match_operand:OI 0 "neon_struct_operand" "=Um") - (unspec:OI [(match_operand:OI 1 "s_register_operand" "w") - (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - UNSPEC_VST2))] - "TARGET_NEON" -- "vst2.<V_sz_elem>\t%h1, [%0]" -+ "vst2.<V_sz_elem>\t%h1, %A0" - [(set_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs")] - ) - - (define_insn "neon_vst2_lane<mode>" -- [(set (mem:<V_two_elem> (match_operand:SI 0 "s_register_operand" "r")) -+ [(set (match_operand:<V_two_elem> 0 "neon_struct_operand" "=Um") - (unspec:<V_two_elem> - [(match_operand:TI 1 "s_register_operand" "w") - (match_operand:SI 2 "immediate_operand" "i") -@@ -4548,14 +4448,14 @@ - ops[1] = gen_rtx_REG (DImode, regno); - ops[2] = gen_rtx_REG (DImode, regno + 2); - ops[3] = operands[2]; -- output_asm_insn ("vst2.<V_sz_elem>\t{%P1[%c3], %P2[%c3]}, [%0]", ops); -+ output_asm_insn ("vst2.<V_sz_elem>\t{%P1[%c3], %P2[%c3]}, %A0", ops); - return ""; - } - [(set_attr "neon_type" "neon_vst1_vst2_lane")] - ) - - (define_insn "neon_vst2_lane<mode>" -- [(set (mem:<V_two_elem> (match_operand:SI 0 "s_register_operand" "r")) -+ [(set (match_operand:<V_two_elem> 0 "neon_struct_operand" "=Um") - (unspec:<V_two_elem> - [(match_operand:OI 1 "s_register_operand" "w") - (match_operand:SI 2 "immediate_operand" "i") -@@ -4578,23 +4478,30 @@ - ops[1] = gen_rtx_REG (DImode, regno); - ops[2] = gen_rtx_REG (DImode, regno + 4); - ops[3] = GEN_INT (lane); -- output_asm_insn ("vst2.<V_sz_elem>\t{%P1[%c3], %P2[%c3]}, [%0]", ops); -+ output_asm_insn ("vst2.<V_sz_elem>\t{%P1[%c3], %P2[%c3]}, %A0", ops); - return ""; - } - [(set_attr "neon_type" "neon_vst1_vst2_lane")] - ) - -+(define_expand "vec_load_lanesei<mode>" -+ [(set (match_operand:EI 0 "s_register_operand") -+ (unspec:EI [(match_operand:EI 1 "neon_struct_operand") -+ (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -+ UNSPEC_VLD3))] -+ "TARGET_NEON") -+ - (define_insn "neon_vld3<mode>" - [(set (match_operand:EI 0 "s_register_operand" "=w") -- (unspec:EI [(mem:EI (match_operand:SI 1 "s_register_operand" "r")) -+ (unspec:EI [(match_operand:EI 1 "neon_struct_operand" "Um") - (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - UNSPEC_VLD3))] - "TARGET_NEON" - { - if (<V_sz_elem> == 64) -- return "vld1.64\t%h0, [%1]"; -+ return "vld1.64\t%h0, %A1"; - else -- return "vld3.<V_sz_elem>\t%h0, [%1]"; -+ return "vld3.<V_sz_elem>\t%h0, %A1"; - } - [(set (attr "neon_type") - (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64")) -@@ -4602,28 +4509,36 @@ - (const_string "neon_vld3_vld4")))] - ) - -+(define_expand "vec_load_lanesci<mode>" -+ [(match_operand:CI 0 "s_register_operand") -+ (match_operand:CI 1 "neon_struct_operand") -+ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -+ "TARGET_NEON" -+{ -+ emit_insn (gen_neon_vld3<mode> (operands[0], operands[1])); -+ DONE; -+}) -+ - (define_expand "neon_vld3<mode>" -- [(match_operand:CI 0 "s_register_operand" "=w") -- (match_operand:SI 1 "s_register_operand" "+r") -+ [(match_operand:CI 0 "s_register_operand") -+ (match_operand:CI 1 "neon_struct_operand") - (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - "TARGET_NEON" - { -- emit_insn (gen_neon_vld3qa<mode> (operands[0], operands[0], -- operands[1], operands[1])); -- emit_insn (gen_neon_vld3qb<mode> (operands[0], operands[0], -- operands[1], operands[1])); -+ rtx mem; -+ -+ mem = adjust_address (operands[1], EImode, 0); -+ emit_insn (gen_neon_vld3qa<mode> (operands[0], mem)); -+ mem = adjust_address (mem, EImode, GET_MODE_SIZE (EImode)); -+ emit_insn (gen_neon_vld3qb<mode> (operands[0], mem, operands[0])); - DONE; - }) - - (define_insn "neon_vld3qa<mode>" - [(set (match_operand:CI 0 "s_register_operand" "=w") -- (unspec:CI [(mem:CI (match_operand:SI 3 "s_register_operand" "2")) -- (match_operand:CI 1 "s_register_operand" "0") -+ (unspec:CI [(match_operand:EI 1 "neon_struct_operand" "Um") - (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -- UNSPEC_VLD3A)) -- (set (match_operand:SI 2 "s_register_operand" "=r") -- (plus:SI (match_dup 3) -- (const_int 24)))] -+ UNSPEC_VLD3A))] - "TARGET_NEON" - { - int regno = REGNO (operands[0]); -@@ -4631,8 +4546,8 @@ - ops[0] = gen_rtx_REG (DImode, regno); - ops[1] = gen_rtx_REG (DImode, regno + 4); - ops[2] = gen_rtx_REG (DImode, regno + 8); -- ops[3] = operands[2]; -- output_asm_insn ("vld3.<V_sz_elem>\t{%P0, %P1, %P2}, [%3]!", ops); -+ ops[3] = operands[1]; -+ output_asm_insn ("vld3.<V_sz_elem>\t{%P0, %P1, %P2}, %A3", ops); - return ""; - } - [(set_attr "neon_type" "neon_vld3_vld4")] -@@ -4640,13 +4555,10 @@ - - (define_insn "neon_vld3qb<mode>" - [(set (match_operand:CI 0 "s_register_operand" "=w") -- (unspec:CI [(mem:CI (match_operand:SI 3 "s_register_operand" "2")) -- (match_operand:CI 1 "s_register_operand" "0") -+ (unspec:CI [(match_operand:EI 1 "neon_struct_operand" "Um") -+ (match_operand:CI 2 "s_register_operand" "0") - (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -- UNSPEC_VLD3B)) -- (set (match_operand:SI 2 "s_register_operand" "=r") -- (plus:SI (match_dup 3) -- (const_int 24)))] -+ UNSPEC_VLD3B))] - "TARGET_NEON" - { - int regno = REGNO (operands[0]); -@@ -4654,8 +4566,8 @@ - ops[0] = gen_rtx_REG (DImode, regno + 2); - ops[1] = gen_rtx_REG (DImode, regno + 6); - ops[2] = gen_rtx_REG (DImode, regno + 10); -- ops[3] = operands[2]; -- output_asm_insn ("vld3.<V_sz_elem>\t{%P0, %P1, %P2}, [%3]!", ops); -+ ops[3] = operands[1]; -+ output_asm_insn ("vld3.<V_sz_elem>\t{%P0, %P1, %P2}, %A3", ops); - return ""; - } - [(set_attr "neon_type" "neon_vld3_vld4")] -@@ -4663,7 +4575,7 @@ - - (define_insn "neon_vld3_lane<mode>" - [(set (match_operand:EI 0 "s_register_operand" "=w") -- (unspec:EI [(mem:<V_three_elem> (match_operand:SI 1 "s_register_operand" "r")) -+ (unspec:EI [(match_operand:<V_three_elem> 1 "neon_struct_operand" "Um") - (match_operand:EI 2 "s_register_operand" "0") - (match_operand:SI 3 "immediate_operand" "i") - (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -@@ -4681,7 +4593,7 @@ - ops[2] = gen_rtx_REG (DImode, regno + 4); - ops[3] = operands[1]; - ops[4] = operands[3]; -- output_asm_insn ("vld3.<V_sz_elem>\t{%P0[%c4], %P1[%c4], %P2[%c4]}, [%3]", -+ output_asm_insn ("vld3.<V_sz_elem>\t{%P0[%c4], %P1[%c4], %P2[%c4]}, %A3", - ops); - return ""; - } -@@ -4690,7 +4602,7 @@ - - (define_insn "neon_vld3_lane<mode>" - [(set (match_operand:CI 0 "s_register_operand" "=w") -- (unspec:CI [(mem:<V_three_elem> (match_operand:SI 1 "s_register_operand" "r")) -+ (unspec:CI [(match_operand:<V_three_elem> 1 "neon_struct_operand" "Um") - (match_operand:CI 2 "s_register_operand" "0") - (match_operand:SI 3 "immediate_operand" "i") - (unspec:VMQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -@@ -4713,7 +4625,7 @@ - ops[2] = gen_rtx_REG (DImode, regno + 8); - ops[3] = operands[1]; - ops[4] = GEN_INT (lane); -- output_asm_insn ("vld3.<V_sz_elem>\t{%P0[%c4], %P1[%c4], %P2[%c4]}, [%3]", -+ output_asm_insn ("vld3.<V_sz_elem>\t{%P0[%c4], %P1[%c4], %P2[%c4]}, %A3", - ops); - return ""; - } -@@ -4722,7 +4634,7 @@ - - (define_insn "neon_vld3_dup<mode>" - [(set (match_operand:EI 0 "s_register_operand" "=w") -- (unspec:EI [(mem:<V_three_elem> (match_operand:SI 1 "s_register_operand" "r")) -+ (unspec:EI [(match_operand:<V_three_elem> 1 "neon_struct_operand" "Um") - (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - UNSPEC_VLD3_DUP))] - "TARGET_NEON" -@@ -4735,91 +4647,106 @@ - ops[1] = gen_rtx_REG (DImode, regno + 2); - ops[2] = gen_rtx_REG (DImode, regno + 4); - ops[3] = operands[1]; -- output_asm_insn ("vld3.<V_sz_elem>\t{%P0[], %P1[], %P2[]}, [%3]", ops); -+ output_asm_insn ("vld3.<V_sz_elem>\t{%P0[], %P1[], %P2[]}, %A3", ops); - return ""; - } - else -- return "vld1.<V_sz_elem>\t%h0, [%1]"; -+ return "vld1.<V_sz_elem>\t%h0, %A1"; - } - [(set (attr "neon_type") - (if_then_else (gt (const_string "<V_mode_nunits>") (const_string "1")) - (const_string "neon_vld3_vld4_all_lanes") - (const_string "neon_vld1_1_2_regs")))]) - -+(define_expand "vec_store_lanesei<mode>" -+ [(set (match_operand:EI 0 "neon_struct_operand") -+ (unspec:EI [(match_operand:EI 1 "s_register_operand") -+ (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -+ UNSPEC_VST3))] -+ "TARGET_NEON") -+ - (define_insn "neon_vst3<mode>" -- [(set (mem:EI (match_operand:SI 0 "s_register_operand" "r")) -+ [(set (match_operand:EI 0 "neon_struct_operand" "=Um") - (unspec:EI [(match_operand:EI 1 "s_register_operand" "w") - (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - UNSPEC_VST3))] - "TARGET_NEON" - { - if (<V_sz_elem> == 64) -- return "vst1.64\t%h1, [%0]"; -+ return "vst1.64\t%h1, %A0"; - else -- return "vst3.<V_sz_elem>\t%h1, [%0]"; -+ return "vst3.<V_sz_elem>\t%h1, %A0"; - } - [(set (attr "neon_type") - (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64")) - (const_string "neon_vst1_1_2_regs_vst2_2_regs") - (const_string "neon_vst2_4_regs_vst3_vst4")))]) - -+(define_expand "vec_store_lanesci<mode>" -+ [(match_operand:CI 0 "neon_struct_operand") -+ (match_operand:CI 1 "s_register_operand") -+ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -+ "TARGET_NEON" -+{ -+ emit_insn (gen_neon_vst3<mode> (operands[0], operands[1])); -+ DONE; -+}) -+ - (define_expand "neon_vst3<mode>" -- [(match_operand:SI 0 "s_register_operand" "+r") -- (match_operand:CI 1 "s_register_operand" "w") -+ [(match_operand:CI 0 "neon_struct_operand") -+ (match_operand:CI 1 "s_register_operand") - (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - "TARGET_NEON" - { -- emit_insn (gen_neon_vst3qa<mode> (operands[0], operands[0], operands[1])); -- emit_insn (gen_neon_vst3qb<mode> (operands[0], operands[0], operands[1])); -+ rtx mem; -+ -+ mem = adjust_address (operands[0], EImode, 0); -+ emit_insn (gen_neon_vst3qa<mode> (mem, operands[1])); -+ mem = adjust_address (mem, EImode, GET_MODE_SIZE (EImode)); -+ emit_insn (gen_neon_vst3qb<mode> (mem, operands[1])); - DONE; - }) - - (define_insn "neon_vst3qa<mode>" -- [(set (mem:EI (match_operand:SI 1 "s_register_operand" "0")) -- (unspec:EI [(match_operand:CI 2 "s_register_operand" "w") -+ [(set (match_operand:EI 0 "neon_struct_operand" "=Um") -+ (unspec:EI [(match_operand:CI 1 "s_register_operand" "w") - (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -- UNSPEC_VST3A)) -- (set (match_operand:SI 0 "s_register_operand" "=r") -- (plus:SI (match_dup 1) -- (const_int 24)))] -+ UNSPEC_VST3A))] - "TARGET_NEON" - { -- int regno = REGNO (operands[2]); -+ int regno = REGNO (operands[1]); - rtx ops[4]; - ops[0] = operands[0]; - ops[1] = gen_rtx_REG (DImode, regno); - ops[2] = gen_rtx_REG (DImode, regno + 4); - ops[3] = gen_rtx_REG (DImode, regno + 8); -- output_asm_insn ("vst3.<V_sz_elem>\t{%P1, %P2, %P3}, [%0]!", ops); -+ output_asm_insn ("vst3.<V_sz_elem>\t{%P1, %P2, %P3}, %A0", ops); - return ""; - } - [(set_attr "neon_type" "neon_vst2_4_regs_vst3_vst4")] - ) - - (define_insn "neon_vst3qb<mode>" -- [(set (mem:EI (match_operand:SI 1 "s_register_operand" "0")) -- (unspec:EI [(match_operand:CI 2 "s_register_operand" "w") -+ [(set (match_operand:EI 0 "neon_struct_operand" "=Um") -+ (unspec:EI [(match_operand:CI 1 "s_register_operand" "w") - (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -- UNSPEC_VST3B)) -- (set (match_operand:SI 0 "s_register_operand" "=r") -- (plus:SI (match_dup 1) -- (const_int 24)))] -+ UNSPEC_VST3B))] - "TARGET_NEON" - { -- int regno = REGNO (operands[2]); -+ int regno = REGNO (operands[1]); - rtx ops[4]; - ops[0] = operands[0]; - ops[1] = gen_rtx_REG (DImode, regno + 2); - ops[2] = gen_rtx_REG (DImode, regno + 6); - ops[3] = gen_rtx_REG (DImode, regno + 10); -- output_asm_insn ("vst3.<V_sz_elem>\t{%P1, %P2, %P3}, [%0]!", ops); -+ output_asm_insn ("vst3.<V_sz_elem>\t{%P1, %P2, %P3}, %A0", ops); - return ""; - } - [(set_attr "neon_type" "neon_vst2_4_regs_vst3_vst4")] - ) - - (define_insn "neon_vst3_lane<mode>" -- [(set (mem:<V_three_elem> (match_operand:SI 0 "s_register_operand" "r")) -+ [(set (match_operand:<V_three_elem> 0 "neon_struct_operand" "=Um") - (unspec:<V_three_elem> - [(match_operand:EI 1 "s_register_operand" "w") - (match_operand:SI 2 "immediate_operand" "i") -@@ -4838,7 +4765,7 @@ - ops[2] = gen_rtx_REG (DImode, regno + 2); - ops[3] = gen_rtx_REG (DImode, regno + 4); - ops[4] = operands[2]; -- output_asm_insn ("vst3.<V_sz_elem>\t{%P1[%c4], %P2[%c4], %P3[%c4]}, [%0]", -+ output_asm_insn ("vst3.<V_sz_elem>\t{%P1[%c4], %P2[%c4], %P3[%c4]}, %A0", - ops); - return ""; - } -@@ -4846,7 +4773,7 @@ - ) - - (define_insn "neon_vst3_lane<mode>" -- [(set (mem:<V_three_elem> (match_operand:SI 0 "s_register_operand" "r")) -+ [(set (match_operand:<V_three_elem> 0 "neon_struct_operand" "=Um") - (unspec:<V_three_elem> - [(match_operand:CI 1 "s_register_operand" "w") - (match_operand:SI 2 "immediate_operand" "i") -@@ -4870,23 +4797,30 @@ - ops[2] = gen_rtx_REG (DImode, regno + 4); - ops[3] = gen_rtx_REG (DImode, regno + 8); - ops[4] = GEN_INT (lane); -- output_asm_insn ("vst3.<V_sz_elem>\t{%P1[%c4], %P2[%c4], %P3[%c4]}, [%0]", -+ output_asm_insn ("vst3.<V_sz_elem>\t{%P1[%c4], %P2[%c4], %P3[%c4]}, %A0", - ops); - return ""; - } - [(set_attr "neon_type" "neon_vst3_vst4_lane")]) - -+(define_expand "vec_load_lanesoi<mode>" -+ [(set (match_operand:OI 0 "s_register_operand") -+ (unspec:OI [(match_operand:OI 1 "neon_struct_operand") -+ (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -+ UNSPEC_VLD4))] -+ "TARGET_NEON") -+ - (define_insn "neon_vld4<mode>" - [(set (match_operand:OI 0 "s_register_operand" "=w") -- (unspec:OI [(mem:OI (match_operand:SI 1 "s_register_operand" "r")) -+ (unspec:OI [(match_operand:OI 1 "neon_struct_operand" "Um") - (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - UNSPEC_VLD4))] - "TARGET_NEON" - { - if (<V_sz_elem> == 64) -- return "vld1.64\t%h0, [%1]"; -+ return "vld1.64\t%h0, %A1"; - else -- return "vld4.<V_sz_elem>\t%h0, [%1]"; -+ return "vld4.<V_sz_elem>\t%h0, %A1"; - } - [(set (attr "neon_type") - (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64")) -@@ -4894,28 +4828,36 @@ - (const_string "neon_vld3_vld4")))] - ) - -+(define_expand "vec_load_lanesxi<mode>" -+ [(match_operand:XI 0 "s_register_operand") -+ (match_operand:XI 1 "neon_struct_operand") -+ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -+ "TARGET_NEON" -+{ -+ emit_insn (gen_neon_vld4<mode> (operands[0], operands[1])); -+ DONE; -+}) -+ - (define_expand "neon_vld4<mode>" -- [(match_operand:XI 0 "s_register_operand" "=w") -- (match_operand:SI 1 "s_register_operand" "+r") -+ [(match_operand:XI 0 "s_register_operand") -+ (match_operand:XI 1 "neon_struct_operand") - (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - "TARGET_NEON" - { -- emit_insn (gen_neon_vld4qa<mode> (operands[0], operands[0], -- operands[1], operands[1])); -- emit_insn (gen_neon_vld4qb<mode> (operands[0], operands[0], -- operands[1], operands[1])); -+ rtx mem; -+ -+ mem = adjust_address (operands[1], OImode, 0); -+ emit_insn (gen_neon_vld4qa<mode> (operands[0], mem)); -+ mem = adjust_address (mem, OImode, GET_MODE_SIZE (OImode)); -+ emit_insn (gen_neon_vld4qb<mode> (operands[0], mem, operands[0])); - DONE; - }) - - (define_insn "neon_vld4qa<mode>" - [(set (match_operand:XI 0 "s_register_operand" "=w") -- (unspec:XI [(mem:XI (match_operand:SI 3 "s_register_operand" "2")) -- (match_operand:XI 1 "s_register_operand" "0") -+ (unspec:XI [(match_operand:OI 1 "neon_struct_operand" "Um") - (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -- UNSPEC_VLD4A)) -- (set (match_operand:SI 2 "s_register_operand" "=r") -- (plus:SI (match_dup 3) -- (const_int 32)))] -+ UNSPEC_VLD4A))] - "TARGET_NEON" - { - int regno = REGNO (operands[0]); -@@ -4924,8 +4866,8 @@ - ops[1] = gen_rtx_REG (DImode, regno + 4); - ops[2] = gen_rtx_REG (DImode, regno + 8); - ops[3] = gen_rtx_REG (DImode, regno + 12); -- ops[4] = operands[2]; -- output_asm_insn ("vld4.<V_sz_elem>\t{%P0, %P1, %P2, %P3}, [%4]!", ops); -+ ops[4] = operands[1]; -+ output_asm_insn ("vld4.<V_sz_elem>\t{%P0, %P1, %P2, %P3}, %A4", ops); - return ""; - } - [(set_attr "neon_type" "neon_vld3_vld4")] -@@ -4933,13 +4875,10 @@ - - (define_insn "neon_vld4qb<mode>" - [(set (match_operand:XI 0 "s_register_operand" "=w") -- (unspec:XI [(mem:XI (match_operand:SI 3 "s_register_operand" "2")) -- (match_operand:XI 1 "s_register_operand" "0") -+ (unspec:XI [(match_operand:OI 1 "neon_struct_operand" "Um") -+ (match_operand:XI 2 "s_register_operand" "0") - (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -- UNSPEC_VLD4B)) -- (set (match_operand:SI 2 "s_register_operand" "=r") -- (plus:SI (match_dup 3) -- (const_int 32)))] -+ UNSPEC_VLD4B))] - "TARGET_NEON" - { - int regno = REGNO (operands[0]); -@@ -4948,8 +4887,8 @@ - ops[1] = gen_rtx_REG (DImode, regno + 6); - ops[2] = gen_rtx_REG (DImode, regno + 10); - ops[3] = gen_rtx_REG (DImode, regno + 14); -- ops[4] = operands[2]; -- output_asm_insn ("vld4.<V_sz_elem>\t{%P0, %P1, %P2, %P3}, [%4]!", ops); -+ ops[4] = operands[1]; -+ output_asm_insn ("vld4.<V_sz_elem>\t{%P0, %P1, %P2, %P3}, %A4", ops); - return ""; - } - [(set_attr "neon_type" "neon_vld3_vld4")] -@@ -4957,7 +4896,7 @@ - - (define_insn "neon_vld4_lane<mode>" - [(set (match_operand:OI 0 "s_register_operand" "=w") -- (unspec:OI [(mem:<V_four_elem> (match_operand:SI 1 "s_register_operand" "r")) -+ (unspec:OI [(match_operand:<V_four_elem> 1 "neon_struct_operand" "Um") - (match_operand:OI 2 "s_register_operand" "0") - (match_operand:SI 3 "immediate_operand" "i") - (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -@@ -4976,7 +4915,7 @@ - ops[3] = gen_rtx_REG (DImode, regno + 6); - ops[4] = operands[1]; - ops[5] = operands[3]; -- output_asm_insn ("vld4.<V_sz_elem>\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, [%4]", -+ output_asm_insn ("vld4.<V_sz_elem>\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, %A4", - ops); - return ""; - } -@@ -4985,7 +4924,7 @@ - - (define_insn "neon_vld4_lane<mode>" - [(set (match_operand:XI 0 "s_register_operand" "=w") -- (unspec:XI [(mem:<V_four_elem> (match_operand:SI 1 "s_register_operand" "r")) -+ (unspec:XI [(match_operand:<V_four_elem> 1 "neon_struct_operand" "Um") - (match_operand:XI 2 "s_register_operand" "0") - (match_operand:SI 3 "immediate_operand" "i") - (unspec:VMQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -@@ -5009,7 +4948,7 @@ - ops[3] = gen_rtx_REG (DImode, regno + 12); - ops[4] = operands[1]; - ops[5] = GEN_INT (lane); -- output_asm_insn ("vld4.<V_sz_elem>\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, [%4]", -+ output_asm_insn ("vld4.<V_sz_elem>\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, %A4", - ops); - return ""; - } -@@ -5018,7 +4957,7 @@ - - (define_insn "neon_vld4_dup<mode>" - [(set (match_operand:OI 0 "s_register_operand" "=w") -- (unspec:OI [(mem:<V_four_elem> (match_operand:SI 1 "s_register_operand" "r")) -+ (unspec:OI [(match_operand:<V_four_elem> 1 "neon_struct_operand" "Um") - (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - UNSPEC_VLD4_DUP))] - "TARGET_NEON" -@@ -5032,12 +4971,12 @@ - ops[2] = gen_rtx_REG (DImode, regno + 4); - ops[3] = gen_rtx_REG (DImode, regno + 6); - ops[4] = operands[1]; -- output_asm_insn ("vld4.<V_sz_elem>\t{%P0[], %P1[], %P2[], %P3[]}, [%4]", -+ output_asm_insn ("vld4.<V_sz_elem>\t{%P0[], %P1[], %P2[], %P3[]}, %A4", - ops); - return ""; - } - else -- return "vld1.<V_sz_elem>\t%h0, [%1]"; -+ return "vld1.<V_sz_elem>\t%h0, %A1"; - } - [(set (attr "neon_type") - (if_then_else (gt (const_string "<V_mode_nunits>") (const_string "1")) -@@ -5045,17 +4984,24 @@ - (const_string "neon_vld1_1_2_regs")))] - ) - -+(define_expand "vec_store_lanesoi<mode>" -+ [(set (match_operand:OI 0 "neon_struct_operand") -+ (unspec:OI [(match_operand:OI 1 "s_register_operand") -+ (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -+ UNSPEC_VST4))] -+ "TARGET_NEON") -+ - (define_insn "neon_vst4<mode>" -- [(set (mem:OI (match_operand:SI 0 "s_register_operand" "r")) -+ [(set (match_operand:OI 0 "neon_struct_operand" "=Um") - (unspec:OI [(match_operand:OI 1 "s_register_operand" "w") - (unspec:VDX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - UNSPEC_VST4))] - "TARGET_NEON" - { - if (<V_sz_elem> == 64) -- return "vst1.64\t%h1, [%0]"; -+ return "vst1.64\t%h1, %A0"; - else -- return "vst4.<V_sz_elem>\t%h1, [%0]"; -+ return "vst4.<V_sz_elem>\t%h1, %A0"; - } - [(set (attr "neon_type") - (if_then_else (eq (const_string "<V_sz_elem>") (const_string "64")) -@@ -5063,65 +5009,73 @@ - (const_string "neon_vst2_4_regs_vst3_vst4")))] - ) - -+(define_expand "vec_store_lanesxi<mode>" -+ [(match_operand:XI 0 "neon_struct_operand") -+ (match_operand:XI 1 "s_register_operand") -+ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -+ "TARGET_NEON" -+{ -+ emit_insn (gen_neon_vst4<mode> (operands[0], operands[1])); -+ DONE; -+}) -+ - (define_expand "neon_vst4<mode>" -- [(match_operand:SI 0 "s_register_operand" "+r") -- (match_operand:XI 1 "s_register_operand" "w") -+ [(match_operand:XI 0 "neon_struct_operand") -+ (match_operand:XI 1 "s_register_operand") - (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] - "TARGET_NEON" - { -- emit_insn (gen_neon_vst4qa<mode> (operands[0], operands[0], operands[1])); -- emit_insn (gen_neon_vst4qb<mode> (operands[0], operands[0], operands[1])); -+ rtx mem; -+ -+ mem = adjust_address (operands[0], OImode, 0); -+ emit_insn (gen_neon_vst4qa<mode> (mem, operands[1])); -+ mem = adjust_address (mem, OImode, GET_MODE_SIZE (OImode)); -+ emit_insn (gen_neon_vst4qb<mode> (mem, operands[1])); - DONE; - }) - - (define_insn "neon_vst4qa<mode>" -- [(set (mem:OI (match_operand:SI 1 "s_register_operand" "0")) -- (unspec:OI [(match_operand:XI 2 "s_register_operand" "w") -+ [(set (match_operand:OI 0 "neon_struct_operand" "=Um") -+ (unspec:OI [(match_operand:XI 1 "s_register_operand" "w") - (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -- UNSPEC_VST4A)) -- (set (match_operand:SI 0 "s_register_operand" "=r") -- (plus:SI (match_dup 1) -- (const_int 32)))] -+ UNSPEC_VST4A))] - "TARGET_NEON" - { -- int regno = REGNO (operands[2]); -+ int regno = REGNO (operands[1]); - rtx ops[5]; - ops[0] = operands[0]; - ops[1] = gen_rtx_REG (DImode, regno); - ops[2] = gen_rtx_REG (DImode, regno + 4); - ops[3] = gen_rtx_REG (DImode, regno + 8); - ops[4] = gen_rtx_REG (DImode, regno + 12); -- output_asm_insn ("vst4.<V_sz_elem>\t{%P1, %P2, %P3, %P4}, [%0]!", ops); -+ output_asm_insn ("vst4.<V_sz_elem>\t{%P1, %P2, %P3, %P4}, %A0", ops); - return ""; - } - [(set_attr "neon_type" "neon_vst2_4_regs_vst3_vst4")] - ) - - (define_insn "neon_vst4qb<mode>" -- [(set (mem:OI (match_operand:SI 1 "s_register_operand" "0")) -- (unspec:OI [(match_operand:XI 2 "s_register_operand" "w") -+ [(set (match_operand:OI 0 "neon_struct_operand" "=Um") -+ (unspec:OI [(match_operand:XI 1 "s_register_operand" "w") - (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] -- UNSPEC_VST4B)) -- (set (match_operand:SI 0 "s_register_operand" "=r") -- (plus:SI (match_dup 1) -- (const_int 32)))] -+ UNSPEC_VST4B))] - "TARGET_NEON" - { -- int regno = REGNO (operands[2]); -+ int regno = REGNO (operands[1]); - rtx ops[5]; - ops[0] = operands[0]; - ops[1] = gen_rtx_REG (DImode, regno + 2); - ops[2] = gen_rtx_REG (DImode, regno + 6); - ops[3] = gen_rtx_REG (DImode, regno + 10); - ops[4] = gen_rtx_REG (DImode, regno + 14); -- output_asm_insn ("vst4.<V_sz_elem>\t{%P1, %P2, %P3, %P4}, [%0]!", ops); -+ output_asm_insn ("vst4.<V_sz_elem>\t{%P1, %P2, %P3, %P4}, %A0", ops); - return ""; - } - [(set_attr "neon_type" "neon_vst2_4_regs_vst3_vst4")] - ) - - (define_insn "neon_vst4_lane<mode>" -- [(set (mem:<V_four_elem> (match_operand:SI 0 "s_register_operand" "r")) -+ [(set (match_operand:<V_four_elem> 0 "neon_struct_operand" "=Um") - (unspec:<V_four_elem> - [(match_operand:OI 1 "s_register_operand" "w") - (match_operand:SI 2 "immediate_operand" "i") -@@ -5141,7 +5095,7 @@ - ops[3] = gen_rtx_REG (DImode, regno + 4); - ops[4] = gen_rtx_REG (DImode, regno + 6); - ops[5] = operands[2]; -- output_asm_insn ("vst4.<V_sz_elem>\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, [%0]", -+ output_asm_insn ("vst4.<V_sz_elem>\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, %A0", - ops); - return ""; - } -@@ -5149,7 +5103,7 @@ - ) - - (define_insn "neon_vst4_lane<mode>" -- [(set (mem:<V_four_elem> (match_operand:SI 0 "s_register_operand" "r")) -+ [(set (match_operand:<V_four_elem> 0 "neon_struct_operand" "=Um") - (unspec:<V_four_elem> - [(match_operand:XI 1 "s_register_operand" "w") - (match_operand:SI 2 "immediate_operand" "i") -@@ -5174,7 +5128,7 @@ - ops[3] = gen_rtx_REG (DImode, regno + 8); - ops[4] = gen_rtx_REG (DImode, regno + 12); - ops[5] = GEN_INT (lane); -- output_asm_insn ("vst4.<V_sz_elem>\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, [%0]", -+ output_asm_insn ("vst4.<V_sz_elem>\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, %A0", - ops); - return ""; - } -@@ -5362,6 +5316,44 @@ - } - ) - -+(define_insn "neon_vec_<US>shiftl_<mode>" -+ [(set (match_operand:<V_widen> 0 "register_operand" "=w") -+ (SE:<V_widen> (ashift:VW (match_operand:VW 1 "register_operand" "w") -+ (match_operand:<V_innermode> 2 "const_neon_scalar_shift_amount_operand" ""))))] -+ "TARGET_NEON" -+{ -+ return "vshll.<US><V_sz_elem> %q0, %P1, %2"; -+} -+ [(set_attr "neon_type" "neon_shift_1")] -+) -+ -+(define_expand "vec_widen_<US>shiftl_lo_<mode>" -+ [(match_operand:<V_unpack> 0 "register_operand" "") -+ (SE:<V_unpack> (match_operand:VU 1 "register_operand" "")) -+ (match_operand:SI 2 "immediate_operand" "i")] -+ "TARGET_NEON && !BYTES_BIG_ENDIAN" -+ { -+ emit_insn (gen_neon_vec_<US>shiftl_<V_half> (operands[0], -+ simplify_gen_subreg (<V_HALF>mode, operands[1], <MODE>mode, 0), -+ operands[2])); -+ DONE; -+ } -+) -+ -+(define_expand "vec_widen_<US>shiftl_hi_<mode>" -+ [(match_operand:<V_unpack> 0 "register_operand" "") -+ (SE:<V_unpack> (match_operand:VU 1 "register_operand" "")) -+ (match_operand:SI 2 "immediate_operand" "i")] -+ "TARGET_NEON && !BYTES_BIG_ENDIAN" -+ { -+ emit_insn (gen_neon_vec_<US>shiftl_<V_half> (operands[0], -+ simplify_gen_subreg (<V_HALF>mode, operands[1], <MODE>mode, -+ GET_MODE_SIZE (<V_HALF>mode)), -+ operands[2])); -+ DONE; -+ } -+) -+ - ;; Vectorize for non-neon-quad case - (define_insn "neon_unpack<US>_<mode>" - [(set (match_operand:<V_widen> 0 "register_operand" "=w") -@@ -5438,6 +5430,34 @@ - } - ) - -+(define_expand "vec_widen_<US>shiftl_hi_<mode>" -+ [(match_operand:<V_double_width> 0 "register_operand" "") -+ (SE:<V_double_width> (match_operand:VDI 1 "register_operand" "")) -+ (match_operand:SI 2 "immediate_operand" "i")] -+ "TARGET_NEON" -+ { -+ rtx tmpreg = gen_reg_rtx (<V_widen>mode); -+ emit_insn (gen_neon_vec_<US>shiftl_<mode> (tmpreg, operands[1], operands[2])); -+ emit_insn (gen_neon_vget_high<V_widen_l> (operands[0], tmpreg)); -+ -+ DONE; -+ } -+) -+ -+(define_expand "vec_widen_<US>shiftl_lo_<mode>" -+ [(match_operand:<V_double_width> 0 "register_operand" "") -+ (SE:<V_double_width> (match_operand:VDI 1 "register_operand" "")) -+ (match_operand:SI 2 "immediate_operand" "i")] -+ "TARGET_NEON" -+ { -+ rtx tmpreg = gen_reg_rtx (<V_widen>mode); -+ emit_insn (gen_neon_vec_<US>shiftl_<mode> (tmpreg, operands[1], operands[2])); -+ emit_insn (gen_neon_vget_low<V_widen_l> (operands[0], tmpreg)); -+ -+ DONE; -+ } -+) -+ - ;; The case when using all quad registers. - (define_insn "vec_pack_trunc_<mode>" - [(set (match_operand:<V_narrow_pack> 0 "register_operand" "=&w") -@@ -5474,3 +5494,32 @@ - emit_insn (gen_neon_vec_pack_trunc_<V_double> (operands[0], tempreg)); - DONE; - }) -+ -+(define_insn "neon_vabd<mode>_2" -+ [(set (match_operand:VDQ 0 "s_register_operand" "=w") -+ (abs:VDQ (minus:VDQ (match_operand:VDQ 1 "s_register_operand" "w") -+ (match_operand:VDQ 2 "s_register_operand" "w"))))] -+ "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)" -+ "vabd.<V_s_elem> %<V_reg>0, %<V_reg>1, %<V_reg>2" -+ [(set (attr "neon_type") -+ (if_then_else (ne (symbol_ref "<Is_float_mode>") (const_int 0)) -+ (if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0)) -+ (const_string "neon_fp_vadd_ddd_vabs_dd") -+ (const_string "neon_fp_vadd_qqq_vabs_qq")) -+ (const_string "neon_int_5")))] -+) -+ -+(define_insn "neon_vabd<mode>_3" -+ [(set (match_operand:VDQ 0 "s_register_operand" "=w") -+ (abs:VDQ (unspec:VDQ [(match_operand:VDQ 1 "s_register_operand" "w") -+ (match_operand:VDQ 2 "s_register_operand" "w")] -+ UNSPEC_VSUB)))] -+ "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)" -+ "vabd.<V_if_elem> %<V_reg>0, %<V_reg>1, %<V_reg>2" -+ [(set (attr "neon_type") -+ (if_then_else (ne (symbol_ref "<Is_float_mode>") (const_int 0)) -+ (if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0)) -+ (const_string "neon_fp_vadd_ddd_vabs_dd") -+ (const_string "neon_fp_vadd_qqq_vabs_qq")) -+ (const_string "neon_int_5")))] -+) ---- a/src/gcc/config/arm/predicates.md -+++ b/src/gcc/config/arm/predicates.md -@@ -129,11 +129,18 @@ - (ior (match_operand 0 "arm_rhs_operand") - (match_operand 0 "memory_operand"))) - -+;; This doesn't have to do much because the constant is already checked -+;; in the shift_operator predicate. - (define_predicate "shift_amount_operand" - (ior (and (match_test "TARGET_ARM") - (match_operand 0 "s_register_operand")) - (match_operand 0 "const_int_operand"))) - -+(define_predicate "const_neon_scalar_shift_amount_operand" -+ (and (match_code "const_int") -+ (match_test "((unsigned HOST_WIDE_INT) INTVAL (op)) <= GET_MODE_BITSIZE (mode) -+ && ((unsigned HOST_WIDE_INT) INTVAL (op)) > 0"))) -+ - (define_predicate "arm_add_operand" - (ior (match_operand 0 "arm_rhs_operand") - (match_operand 0 "arm_neg_immediate_operand"))) -@@ -218,13 +225,20 @@ - (match_test "mode == GET_MODE (op)"))) - - ;; True for shift operators. -+;; Notes: -+;; * mult is only permitted with a constant shift amount -+;; * patterns that permit register shift amounts only in ARM mode use -+;; shift_amount_operand, patterns that always allow registers do not, -+;; so we don't have to worry about that sort of thing here. - (define_special_predicate "shift_operator" - (and (ior (ior (and (match_code "mult") - (match_test "power_of_two_operand (XEXP (op, 1), mode)")) - (and (match_code "rotate") - (match_test "GET_CODE (XEXP (op, 1)) == CONST_INT - && ((unsigned HOST_WIDE_INT) INTVAL (XEXP (op, 1))) < 32"))) -- (match_code "ashift,ashiftrt,lshiftrt,rotatert")) -+ (and (match_code "ashift,ashiftrt,lshiftrt,rotatert") -+ (match_test "GET_CODE (XEXP (op, 1)) != CONST_INT -+ || ((unsigned HOST_WIDE_INT) INTVAL (XEXP (op, 1))) < 32"))) - (match_test "mode == GET_MODE (op)"))) - - ;; True for MULT, to identify which variant of shift_operator is in use. -@@ -241,11 +255,15 @@ - - ;; True for integer comparisons and, if FP is active, for comparisons - ;; other than LTGT or UNEQ. -+(define_special_predicate "expandable_comparison_operator" -+ (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu, -+ unordered,ordered,unlt,unle,unge,ungt")) -+ -+;; Likewise, but only accept comparisons that are directly supported -+;; by ARM condition codes. - (define_special_predicate "arm_comparison_operator" -- (ior (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu") -- (and (match_test "TARGET_32BIT && TARGET_HARD_FLOAT -- && (TARGET_FPA || TARGET_VFP)") -- (match_code "unordered,ordered,unlt,unle,unge,ungt")))) -+ (and (match_operand 0 "expandable_comparison_operator") -+ (match_test "maybe_get_arm_condition_code (op) != ARM_NV"))) - - (define_special_predicate "lt_ge_comparison_operator" - (match_code "lt,ge")) -@@ -289,8 +307,11 @@ - - (define_special_predicate "arm_extendqisi_mem_op" - (and (match_operand 0 "memory_operand") -- (match_test "arm_legitimate_address_outer_p (mode, XEXP (op, 0), -- SIGN_EXTEND, 0)"))) -+ (match_test "TARGET_ARM ? arm_legitimate_address_outer_p (mode, -+ XEXP (op, 0), -+ SIGN_EXTEND, -+ 0) -+ : memory_address_p (QImode, XEXP (op, 0))"))) - - (define_special_predicate "arm_reg_or_extendqisi_mem_op" - (ior (match_operand 0 "arm_extendqisi_mem_op") -@@ -585,6 +606,26 @@ - return neon_immediate_valid_for_move (op, mode, NULL, NULL); - }) - -+(define_predicate "imm_for_neon_lshift_operand" -+ (match_code "const_vector") -+{ -+ return neon_immediate_valid_for_shift (op, mode, NULL, NULL, true); -+}) -+ -+(define_predicate "imm_for_neon_rshift_operand" -+ (match_code "const_vector") -+{ -+ return neon_immediate_valid_for_shift (op, mode, NULL, NULL, false); -+}) -+ -+(define_predicate "imm_lshift_or_reg_neon" -+ (ior (match_operand 0 "s_register_operand") -+ (match_operand 0 "imm_for_neon_lshift_operand"))) -+ -+(define_predicate "imm_rshift_or_reg_neon" -+ (ior (match_operand 0 "s_register_operand") -+ (match_operand 0 "imm_for_neon_rshift_operand"))) -+ - (define_predicate "imm_for_neon_logic_operand" - (match_code "const_vector") - { -@@ -684,5 +725,9 @@ - return true; - }) - -+(define_special_predicate "neon_struct_operand" -+ (and (match_code "mem") -+ (match_test "TARGET_32BIT && neon_vector_mem_operand (op, 2)"))) -+ - (define_special_predicate "add_operator" - (match_code "plus")) ---- a/src/gcc/config/arm/semi.h -+++ b/src/gcc/config/arm/semi.h -@@ -65,8 +65,7 @@ - #define ASM_SPEC "\ - %{fpic|fpie: -k} %{fPIC|fPIE: -k} \ - %{mbig-endian:-EB} \ --%{mcpu=*:-mcpu=%*} \ --%{march=*:-march=%*} \ -+%(arm_cpu_spec) \ - %{mapcs-float:-mfloat} \ - %{msoft-float:-mfloat-abi=soft} %{mhard-float:-mfloat-abi=hard} \ - %{mfloat-abi=*} %{mfpu=*} \ ---- a/src/gcc/config/arm/sync.md -+++ b/src/gcc/config/arm/sync.md -@@ -1,6 +1,7 @@ - ;; Machine description for ARM processor synchronization primitives. - ;; Copyright (C) 2010 Free Software Foundation, Inc. - ;; Written by Marcus Shawcroft (marcus.shawcroft@arm.com) -+;; 64bit Atomics by Dave Gilbert (david.gilbert@linaro.org) - ;; - ;; This file is part of GCC. - ;; -@@ -33,31 +34,24 @@ - MEM_VOLATILE_P (operands[0]) = 1; - }) - --(define_expand "sync_compare_and_swapsi" -- [(set (match_operand:SI 0 "s_register_operand") -- (unspec_volatile:SI [(match_operand:SI 1 "memory_operand") -- (match_operand:SI 2 "s_register_operand") -- (match_operand:SI 3 "s_register_operand")] -- VUNSPEC_SYNC_COMPARE_AND_SWAP))] -- "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER" -- { -- struct arm_sync_generator generator; -- generator.op = arm_sync_generator_omrn; -- generator.u.omrn = gen_arm_sync_compare_and_swapsi; -- arm_expand_sync (SImode, &generator, operands[0], operands[1], operands[2], -- operands[3]); -- DONE; -- }) - --(define_mode_iterator NARROW [QI HI]) -+(define_mode_attr sync_predtab [(SI "TARGET_HAVE_LDREX && -+ TARGET_HAVE_MEMORY_BARRIER") -+ (QI "TARGET_HAVE_LDREXBH && -+ TARGET_HAVE_MEMORY_BARRIER") -+ (HI "TARGET_HAVE_LDREXBH && -+ TARGET_HAVE_MEMORY_BARRIER") -+ (DI "TARGET_HAVE_LDREXD && -+ ARM_DOUBLEWORD_ALIGN && -+ TARGET_HAVE_MEMORY_BARRIER")]) - - (define_expand "sync_compare_and_swap<mode>" -- [(set (match_operand:NARROW 0 "s_register_operand") -- (unspec_volatile:NARROW [(match_operand:NARROW 1 "memory_operand") -- (match_operand:NARROW 2 "s_register_operand") -- (match_operand:NARROW 3 "s_register_operand")] -+ [(set (match_operand:QHSD 0 "s_register_operand") -+ (unspec_volatile:QHSD [(match_operand:QHSD 1 "memory_operand") -+ (match_operand:QHSD 2 "s_register_operand") -+ (match_operand:QHSD 3 "s_register_operand")] - VUNSPEC_SYNC_COMPARE_AND_SWAP))] -- "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER" -+ "<sync_predtab>" - { - struct arm_sync_generator generator; - generator.op = arm_sync_generator_omrn; -@@ -67,25 +61,11 @@ - DONE; - }) - --(define_expand "sync_lock_test_and_setsi" -- [(match_operand:SI 0 "s_register_operand") -- (match_operand:SI 1 "memory_operand") -- (match_operand:SI 2 "s_register_operand")] -- "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER" -- { -- struct arm_sync_generator generator; -- generator.op = arm_sync_generator_omn; -- generator.u.omn = gen_arm_sync_lock_test_and_setsi; -- arm_expand_sync (SImode, &generator, operands[0], operands[1], NULL, -- operands[2]); -- DONE; -- }) -- - (define_expand "sync_lock_test_and_set<mode>" -- [(match_operand:NARROW 0 "s_register_operand") -- (match_operand:NARROW 1 "memory_operand") -- (match_operand:NARROW 2 "s_register_operand")] -- "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER" -+ [(match_operand:QHSD 0 "s_register_operand") -+ (match_operand:QHSD 1 "memory_operand") -+ (match_operand:QHSD 2 "s_register_operand")] -+ "<sync_predtab>" - { - struct arm_sync_generator generator; - generator.op = arm_sync_generator_omn; -@@ -115,51 +95,25 @@ - (plus "*") - (minus "*")]) - --(define_expand "sync_<sync_optab>si" -- [(match_operand:SI 0 "memory_operand") -- (match_operand:SI 1 "s_register_operand") -- (syncop:SI (match_dup 0) (match_dup 1))] -- "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER" -- { -- struct arm_sync_generator generator; -- generator.op = arm_sync_generator_omn; -- generator.u.omn = gen_arm_sync_new_<sync_optab>si; -- arm_expand_sync (SImode, &generator, NULL, operands[0], NULL, operands[1]); -- DONE; -- }) -- --(define_expand "sync_nandsi" -- [(match_operand:SI 0 "memory_operand") -- (match_operand:SI 1 "s_register_operand") -- (not:SI (and:SI (match_dup 0) (match_dup 1)))] -- "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER" -- { -- struct arm_sync_generator generator; -- generator.op = arm_sync_generator_omn; -- generator.u.omn = gen_arm_sync_new_nandsi; -- arm_expand_sync (SImode, &generator, NULL, operands[0], NULL, operands[1]); -- DONE; -- }) -- - (define_expand "sync_<sync_optab><mode>" -- [(match_operand:NARROW 0 "memory_operand") -- (match_operand:NARROW 1 "s_register_operand") -- (syncop:NARROW (match_dup 0) (match_dup 1))] -- "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER" -+ [(match_operand:QHSD 0 "memory_operand") -+ (match_operand:QHSD 1 "s_register_operand") -+ (syncop:QHSD (match_dup 0) (match_dup 1))] -+ "<sync_predtab>" - { - struct arm_sync_generator generator; - generator.op = arm_sync_generator_omn; - generator.u.omn = gen_arm_sync_new_<sync_optab><mode>; - arm_expand_sync (<MODE>mode, &generator, NULL, operands[0], NULL, -- operands[1]); -+ operands[1]); - DONE; - }) - - (define_expand "sync_nand<mode>" -- [(match_operand:NARROW 0 "memory_operand") -- (match_operand:NARROW 1 "s_register_operand") -- (not:NARROW (and:NARROW (match_dup 0) (match_dup 1)))] -- "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER" -+ [(match_operand:QHSD 0 "memory_operand") -+ (match_operand:QHSD 1 "s_register_operand") -+ (not:QHSD (and:QHSD (match_dup 0) (match_dup 1)))] -+ "<sync_predtab>" - { - struct arm_sync_generator generator; - generator.op = arm_sync_generator_omn; -@@ -169,57 +123,27 @@ - DONE; - }) - --(define_expand "sync_new_<sync_optab>si" -- [(match_operand:SI 0 "s_register_operand") -- (match_operand:SI 1 "memory_operand") -- (match_operand:SI 2 "s_register_operand") -- (syncop:SI (match_dup 1) (match_dup 2))] -- "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER" -- { -- struct arm_sync_generator generator; -- generator.op = arm_sync_generator_omn; -- generator.u.omn = gen_arm_sync_new_<sync_optab>si; -- arm_expand_sync (SImode, &generator, operands[0], operands[1], NULL, -- operands[2]); -- DONE; -- }) -- --(define_expand "sync_new_nandsi" -- [(match_operand:SI 0 "s_register_operand") -- (match_operand:SI 1 "memory_operand") -- (match_operand:SI 2 "s_register_operand") -- (not:SI (and:SI (match_dup 1) (match_dup 2)))] -- "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER" -- { -- struct arm_sync_generator generator; -- generator.op = arm_sync_generator_omn; -- generator.u.omn = gen_arm_sync_new_nandsi; -- arm_expand_sync (SImode, &generator, operands[0], operands[1], NULL, -- operands[2]); -- DONE; -- }) -- - (define_expand "sync_new_<sync_optab><mode>" -- [(match_operand:NARROW 0 "s_register_operand") -- (match_operand:NARROW 1 "memory_operand") -- (match_operand:NARROW 2 "s_register_operand") -- (syncop:NARROW (match_dup 1) (match_dup 2))] -- "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER" -+ [(match_operand:QHSD 0 "s_register_operand") -+ (match_operand:QHSD 1 "memory_operand") -+ (match_operand:QHSD 2 "s_register_operand") -+ (syncop:QHSD (match_dup 1) (match_dup 2))] -+ "<sync_predtab>" - { - struct arm_sync_generator generator; - generator.op = arm_sync_generator_omn; - generator.u.omn = gen_arm_sync_new_<sync_optab><mode>; - arm_expand_sync (<MODE>mode, &generator, operands[0], operands[1], -- NULL, operands[2]); -+ NULL, operands[2]); - DONE; - }) - - (define_expand "sync_new_nand<mode>" -- [(match_operand:NARROW 0 "s_register_operand") -- (match_operand:NARROW 1 "memory_operand") -- (match_operand:NARROW 2 "s_register_operand") -- (not:NARROW (and:NARROW (match_dup 1) (match_dup 2)))] -- "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER" -+ [(match_operand:QHSD 0 "s_register_operand") -+ (match_operand:QHSD 1 "memory_operand") -+ (match_operand:QHSD 2 "s_register_operand") -+ (not:QHSD (and:QHSD (match_dup 1) (match_dup 2)))] -+ "<sync_predtab>" - { - struct arm_sync_generator generator; - generator.op = arm_sync_generator_omn; -@@ -229,57 +153,27 @@ - DONE; - }); - --(define_expand "sync_old_<sync_optab>si" -- [(match_operand:SI 0 "s_register_operand") -- (match_operand:SI 1 "memory_operand") -- (match_operand:SI 2 "s_register_operand") -- (syncop:SI (match_dup 1) (match_dup 2))] -- "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER" -- { -- struct arm_sync_generator generator; -- generator.op = arm_sync_generator_omn; -- generator.u.omn = gen_arm_sync_old_<sync_optab>si; -- arm_expand_sync (SImode, &generator, operands[0], operands[1], NULL, -- operands[2]); -- DONE; -- }) -- --(define_expand "sync_old_nandsi" -- [(match_operand:SI 0 "s_register_operand") -- (match_operand:SI 1 "memory_operand") -- (match_operand:SI 2 "s_register_operand") -- (not:SI (and:SI (match_dup 1) (match_dup 2)))] -- "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER" -- { -- struct arm_sync_generator generator; -- generator.op = arm_sync_generator_omn; -- generator.u.omn = gen_arm_sync_old_nandsi; -- arm_expand_sync (SImode, &generator, operands[0], operands[1], NULL, -- operands[2]); -- DONE; -- }) -- - (define_expand "sync_old_<sync_optab><mode>" -- [(match_operand:NARROW 0 "s_register_operand") -- (match_operand:NARROW 1 "memory_operand") -- (match_operand:NARROW 2 "s_register_operand") -- (syncop:NARROW (match_dup 1) (match_dup 2))] -- "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER" -+ [(match_operand:QHSD 0 "s_register_operand") -+ (match_operand:QHSD 1 "memory_operand") -+ (match_operand:QHSD 2 "s_register_operand") -+ (syncop:QHSD (match_dup 1) (match_dup 2))] -+ "<sync_predtab>" - { - struct arm_sync_generator generator; - generator.op = arm_sync_generator_omn; - generator.u.omn = gen_arm_sync_old_<sync_optab><mode>; - arm_expand_sync (<MODE>mode, &generator, operands[0], operands[1], -- NULL, operands[2]); -+ NULL, operands[2]); - DONE; - }) - - (define_expand "sync_old_nand<mode>" -- [(match_operand:NARROW 0 "s_register_operand") -- (match_operand:NARROW 1 "memory_operand") -- (match_operand:NARROW 2 "s_register_operand") -- (not:NARROW (and:NARROW (match_dup 1) (match_dup 2)))] -- "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER" -+ [(match_operand:QHSD 0 "s_register_operand") -+ (match_operand:QHSD 1 "memory_operand") -+ (match_operand:QHSD 2 "s_register_operand") -+ (not:QHSD (and:QHSD (match_dup 1) (match_dup 2)))] -+ "<sync_predtab>" - { - struct arm_sync_generator generator; - generator.op = arm_sync_generator_omn; -@@ -289,22 +183,22 @@ - DONE; - }) - --(define_insn "arm_sync_compare_and_swapsi" -- [(set (match_operand:SI 0 "s_register_operand" "=&r") -- (unspec_volatile:SI -- [(match_operand:SI 1 "arm_sync_memory_operand" "+Q") -- (match_operand:SI 2 "s_register_operand" "r") -- (match_operand:SI 3 "s_register_operand" "r")] -- VUNSPEC_SYNC_COMPARE_AND_SWAP)) -- (set (match_dup 1) (unspec_volatile:SI [(match_dup 2)] -+(define_insn "arm_sync_compare_and_swap<mode>" -+ [(set (match_operand:SIDI 0 "s_register_operand" "=&r") -+ (unspec_volatile:SIDI -+ [(match_operand:SIDI 1 "arm_sync_memory_operand" "+Q") -+ (match_operand:SIDI 2 "s_register_operand" "r") -+ (match_operand:SIDI 3 "s_register_operand" "r")] -+ VUNSPEC_SYNC_COMPARE_AND_SWAP)) -+ (set (match_dup 1) (unspec_volatile:SIDI [(match_dup 2)] - VUNSPEC_SYNC_COMPARE_AND_SWAP)) - (set (reg:CC CC_REGNUM) (unspec_volatile:CC [(match_dup 1)] - VUNSPEC_SYNC_COMPARE_AND_SWAP)) - ] -- "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER" -+ "<sync_predtab>" - { - return arm_output_sync_insn (insn, operands); -- } -+ } - [(set_attr "sync_result" "0") - (set_attr "sync_memory" "1") - (set_attr "sync_required_value" "2") -@@ -318,7 +212,7 @@ - (zero_extend:SI - (unspec_volatile:NARROW - [(match_operand:NARROW 1 "arm_sync_memory_operand" "+Q") -- (match_operand:SI 2 "s_register_operand" "r") -+ (match_operand:SI 2 "s_register_operand" "r") - (match_operand:SI 3 "s_register_operand" "r")] - VUNSPEC_SYNC_COMPARE_AND_SWAP))) - (set (match_dup 1) (unspec_volatile:NARROW [(match_dup 2)] -@@ -326,10 +220,10 @@ - (set (reg:CC CC_REGNUM) (unspec_volatile:CC [(match_dup 1)] - VUNSPEC_SYNC_COMPARE_AND_SWAP)) - ] -- "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER" -+ "<sync_predtab>" - { - return arm_output_sync_insn (insn, operands); -- } -+ } - [(set_attr "sync_result" "0") - (set_attr "sync_memory" "1") - (set_attr "sync_required_value" "2") -@@ -338,18 +232,18 @@ - (set_attr "conds" "clob") - (set_attr "predicable" "no")]) - --(define_insn "arm_sync_lock_test_and_setsi" -- [(set (match_operand:SI 0 "s_register_operand" "=&r") -- (match_operand:SI 1 "arm_sync_memory_operand" "+Q")) -+(define_insn "arm_sync_lock_test_and_set<mode>" -+ [(set (match_operand:SIDI 0 "s_register_operand" "=&r") -+ (match_operand:SIDI 1 "arm_sync_memory_operand" "+Q")) - (set (match_dup 1) -- (unspec_volatile:SI [(match_operand:SI 2 "s_register_operand" "r")] -- VUNSPEC_SYNC_LOCK)) -+ (unspec_volatile:SIDI [(match_operand:SIDI 2 "s_register_operand" "r")] -+ VUNSPEC_SYNC_LOCK)) - (clobber (reg:CC CC_REGNUM)) - (clobber (match_scratch:SI 3 "=&r"))] -- "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER" -+ "<sync_predtab>" - { - return arm_output_sync_insn (insn, operands); -- } -+ } - [(set_attr "sync_release_barrier" "no") - (set_attr "sync_result" "0") - (set_attr "sync_memory" "1") -@@ -364,10 +258,10 @@ - (zero_extend:SI (match_operand:NARROW 1 "arm_sync_memory_operand" "+Q"))) - (set (match_dup 1) - (unspec_volatile:NARROW [(match_operand:SI 2 "s_register_operand" "r")] -- VUNSPEC_SYNC_LOCK)) -+ VUNSPEC_SYNC_LOCK)) - (clobber (reg:CC CC_REGNUM)) - (clobber (match_scratch:SI 3 "=&r"))] -- "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER" -+ "<sync_predtab>" - { - return arm_output_sync_insn (insn, operands); - } -@@ -380,22 +274,22 @@ - (set_attr "conds" "clob") - (set_attr "predicable" "no")]) - --(define_insn "arm_sync_new_<sync_optab>si" -- [(set (match_operand:SI 0 "s_register_operand" "=&r") -- (unspec_volatile:SI [(syncop:SI -- (match_operand:SI 1 "arm_sync_memory_operand" "+Q") -- (match_operand:SI 2 "s_register_operand" "r")) -- ] -- VUNSPEC_SYNC_NEW_OP)) -+(define_insn "arm_sync_new_<sync_optab><mode>" -+ [(set (match_operand:SIDI 0 "s_register_operand" "=&r") -+ (unspec_volatile:SIDI [(syncop:SIDI -+ (match_operand:SIDI 1 "arm_sync_memory_operand" "+Q") -+ (match_operand:SIDI 2 "s_register_operand" "r")) -+ ] -+ VUNSPEC_SYNC_NEW_OP)) - (set (match_dup 1) -- (unspec_volatile:SI [(match_dup 1) (match_dup 2)] -- VUNSPEC_SYNC_NEW_OP)) -+ (unspec_volatile:SIDI [(match_dup 1) (match_dup 2)] -+ VUNSPEC_SYNC_NEW_OP)) - (clobber (reg:CC CC_REGNUM)) - (clobber (match_scratch:SI 3 "=&r"))] -- "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER" -+ "<sync_predtab>" - { - return arm_output_sync_insn (insn, operands); -- } -+ } - [(set_attr "sync_result" "0") - (set_attr "sync_memory" "1") - (set_attr "sync_new_value" "2") -@@ -405,54 +299,54 @@ - (set_attr "conds" "clob") - (set_attr "predicable" "no")]) - --(define_insn "arm_sync_new_nandsi" -+(define_insn "arm_sync_new_<sync_optab><mode>" - [(set (match_operand:SI 0 "s_register_operand" "=&r") -- (unspec_volatile:SI [(not:SI (and:SI -- (match_operand:SI 1 "arm_sync_memory_operand" "+Q") -- (match_operand:SI 2 "s_register_operand" "r"))) -- ] -- VUNSPEC_SYNC_NEW_OP)) -+ (unspec_volatile:SI [(syncop:SI -+ (zero_extend:SI -+ (match_operand:NARROW 1 "arm_sync_memory_operand" "+Q")) -+ (match_operand:SI 2 "s_register_operand" "r")) -+ ] -+ VUNSPEC_SYNC_NEW_OP)) - (set (match_dup 1) -- (unspec_volatile:SI [(match_dup 1) (match_dup 2)] -- VUNSPEC_SYNC_NEW_OP)) -+ (unspec_volatile:NARROW [(match_dup 1) (match_dup 2)] -+ VUNSPEC_SYNC_NEW_OP)) - (clobber (reg:CC CC_REGNUM)) - (clobber (match_scratch:SI 3 "=&r"))] -- "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER" -+ "<sync_predtab>" - { - return arm_output_sync_insn (insn, operands); -- } -+ } - [(set_attr "sync_result" "0") - (set_attr "sync_memory" "1") - (set_attr "sync_new_value" "2") - (set_attr "sync_t1" "0") - (set_attr "sync_t2" "3") -- (set_attr "sync_op" "nand") -+ (set_attr "sync_op" "<sync_optab>") - (set_attr "conds" "clob") - (set_attr "predicable" "no")]) - --(define_insn "arm_sync_new_<sync_optab><mode>" -- [(set (match_operand:SI 0 "s_register_operand" "=&r") -- (unspec_volatile:SI [(syncop:SI -- (zero_extend:SI -- (match_operand:NARROW 1 "arm_sync_memory_operand" "+Q")) -- (match_operand:SI 2 "s_register_operand" "r")) -- ] -- VUNSPEC_SYNC_NEW_OP)) -+(define_insn "arm_sync_new_nand<mode>" -+ [(set (match_operand:SIDI 0 "s_register_operand" "=&r") -+ (unspec_volatile:SIDI [(not:SIDI (and:SIDI -+ (match_operand:SIDI 1 "arm_sync_memory_operand" "+Q") -+ (match_operand:SIDI 2 "s_register_operand" "r"))) -+ ] -+ VUNSPEC_SYNC_NEW_OP)) - (set (match_dup 1) -- (unspec_volatile:NARROW [(match_dup 1) (match_dup 2)] -- VUNSPEC_SYNC_NEW_OP)) -+ (unspec_volatile:SIDI [(match_dup 1) (match_dup 2)] -+ VUNSPEC_SYNC_NEW_OP)) - (clobber (reg:CC CC_REGNUM)) - (clobber (match_scratch:SI 3 "=&r"))] -- "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER" -+ "<sync_predtab>" - { - return arm_output_sync_insn (insn, operands); -- } -+ } - [(set_attr "sync_result" "0") - (set_attr "sync_memory" "1") - (set_attr "sync_new_value" "2") - (set_attr "sync_t1" "0") - (set_attr "sync_t2" "3") -- (set_attr "sync_op" "<sync_optab>") -+ (set_attr "sync_op" "nand") - (set_attr "conds" "clob") - (set_attr "predicable" "no")]) - -@@ -461,19 +355,19 @@ - (unspec_volatile:SI - [(not:SI - (and:SI -- (zero_extend:SI -- (match_operand:NARROW 1 "arm_sync_memory_operand" "+Q")) -- (match_operand:SI 2 "s_register_operand" "r"))) -+ (zero_extend:SI -+ (match_operand:NARROW 1 "arm_sync_memory_operand" "+Q")) -+ (match_operand:SI 2 "s_register_operand" "r"))) - ] VUNSPEC_SYNC_NEW_OP)) - (set (match_dup 1) - (unspec_volatile:NARROW [(match_dup 1) (match_dup 2)] -- VUNSPEC_SYNC_NEW_OP)) -+ VUNSPEC_SYNC_NEW_OP)) - (clobber (reg:CC CC_REGNUM)) - (clobber (match_scratch:SI 3 "=&r"))] -- "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER" -+ "<sync_predtab>" - { - return arm_output_sync_insn (insn, operands); -- } -+ } - [(set_attr "sync_result" "0") - (set_attr "sync_memory" "1") - (set_attr "sync_new_value" "2") -@@ -483,20 +377,20 @@ - (set_attr "conds" "clob") - (set_attr "predicable" "no")]) - --(define_insn "arm_sync_old_<sync_optab>si" -- [(set (match_operand:SI 0 "s_register_operand" "=&r") -- (unspec_volatile:SI [(syncop:SI -- (match_operand:SI 1 "arm_sync_memory_operand" "+Q") -- (match_operand:SI 2 "s_register_operand" "r")) -- ] -- VUNSPEC_SYNC_OLD_OP)) -+(define_insn "arm_sync_old_<sync_optab><mode>" -+ [(set (match_operand:SIDI 0 "s_register_operand" "=&r") -+ (unspec_volatile:SIDI [(syncop:SIDI -+ (match_operand:SIDI 1 "arm_sync_memory_operand" "+Q") -+ (match_operand:SIDI 2 "s_register_operand" "r")) -+ ] -+ VUNSPEC_SYNC_OLD_OP)) - (set (match_dup 1) -- (unspec_volatile:SI [(match_dup 1) (match_dup 2)] -- VUNSPEC_SYNC_OLD_OP)) -+ (unspec_volatile:SIDI [(match_dup 1) (match_dup 2)] -+ VUNSPEC_SYNC_OLD_OP)) - (clobber (reg:CC CC_REGNUM)) -- (clobber (match_scratch:SI 3 "=&r")) -+ (clobber (match_scratch:SIDI 3 "=&r")) - (clobber (match_scratch:SI 4 "<sync_clobber>"))] -- "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER" -+ "<sync_predtab>" - { - return arm_output_sync_insn (insn, operands); - } -@@ -509,20 +403,21 @@ - (set_attr "conds" "clob") - (set_attr "predicable" "no")]) - --(define_insn "arm_sync_old_nandsi" -+(define_insn "arm_sync_old_<sync_optab><mode>" - [(set (match_operand:SI 0 "s_register_operand" "=&r") -- (unspec_volatile:SI [(not:SI (and:SI -- (match_operand:SI 1 "arm_sync_memory_operand" "+Q") -- (match_operand:SI 2 "s_register_operand" "r"))) -- ] -- VUNSPEC_SYNC_OLD_OP)) -+ (unspec_volatile:SI [(syncop:SI -+ (zero_extend:SI -+ (match_operand:NARROW 1 "arm_sync_memory_operand" "+Q")) -+ (match_operand:SI 2 "s_register_operand" "r")) -+ ] -+ VUNSPEC_SYNC_OLD_OP)) - (set (match_dup 1) -- (unspec_volatile:SI [(match_dup 1) (match_dup 2)] -- VUNSPEC_SYNC_OLD_OP)) -+ (unspec_volatile:NARROW [(match_dup 1) (match_dup 2)] -+ VUNSPEC_SYNC_OLD_OP)) - (clobber (reg:CC CC_REGNUM)) - (clobber (match_scratch:SI 3 "=&r")) -- (clobber (match_scratch:SI 4 "=&r"))] -- "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER" -+ (clobber (match_scratch:SI 4 "<sync_clobber>"))] -+ "<sync_predtab>" - { - return arm_output_sync_insn (insn, operands); - } -@@ -530,26 +425,25 @@ - (set_attr "sync_memory" "1") - (set_attr "sync_new_value" "2") - (set_attr "sync_t1" "3") -- (set_attr "sync_t2" "4") -- (set_attr "sync_op" "nand") -+ (set_attr "sync_t2" "<sync_t2_reqd>") -+ (set_attr "sync_op" "<sync_optab>") - (set_attr "conds" "clob") - (set_attr "predicable" "no")]) - --(define_insn "arm_sync_old_<sync_optab><mode>" -- [(set (match_operand:SI 0 "s_register_operand" "=&r") -- (unspec_volatile:SI [(syncop:SI -- (zero_extend:SI -- (match_operand:NARROW 1 "arm_sync_memory_operand" "+Q")) -- (match_operand:SI 2 "s_register_operand" "r")) -- ] -- VUNSPEC_SYNC_OLD_OP)) -+(define_insn "arm_sync_old_nand<mode>" -+ [(set (match_operand:SIDI 0 "s_register_operand" "=&r") -+ (unspec_volatile:SIDI [(not:SIDI (and:SIDI -+ (match_operand:SIDI 1 "arm_sync_memory_operand" "+Q") -+ (match_operand:SIDI 2 "s_register_operand" "r"))) -+ ] -+ VUNSPEC_SYNC_OLD_OP)) - (set (match_dup 1) -- (unspec_volatile:NARROW [(match_dup 1) (match_dup 2)] -+ (unspec_volatile:SIDI [(match_dup 1) (match_dup 2)] - VUNSPEC_SYNC_OLD_OP)) - (clobber (reg:CC CC_REGNUM)) -- (clobber (match_scratch:SI 3 "=&r")) -- (clobber (match_scratch:SI 4 "<sync_clobber>"))] -- "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER" -+ (clobber (match_scratch:SIDI 3 "=&r")) -+ (clobber (match_scratch:SI 4 "=&r"))] -+ "<sync_predtab>" - { - return arm_output_sync_insn (insn, operands); - } -@@ -557,26 +451,26 @@ - (set_attr "sync_memory" "1") - (set_attr "sync_new_value" "2") - (set_attr "sync_t1" "3") -- (set_attr "sync_t2" "<sync_t2_reqd>") -- (set_attr "sync_op" "<sync_optab>") -+ (set_attr "sync_t2" "4") -+ (set_attr "sync_op" "nand") - (set_attr "conds" "clob") - (set_attr "predicable" "no")]) - - (define_insn "arm_sync_old_nand<mode>" - [(set (match_operand:SI 0 "s_register_operand" "=&r") -- (unspec_volatile:SI [(not:SI (and:SI -- (zero_extend:SI -- (match_operand:NARROW 1 "arm_sync_memory_operand" "+Q")) -- (match_operand:SI 2 "s_register_operand" "r"))) -- ] -- VUNSPEC_SYNC_OLD_OP)) -+ (unspec_volatile:SI [(not:SI (and:SI -+ (zero_extend:SI -+ (match_operand:NARROW 1 "arm_sync_memory_operand" "+Q")) -+ (match_operand:SI 2 "s_register_operand" "r"))) -+ ] -+ VUNSPEC_SYNC_OLD_OP)) - (set (match_dup 1) -- (unspec_volatile:NARROW [(match_dup 1) (match_dup 2)] -- VUNSPEC_SYNC_OLD_OP)) -+ (unspec_volatile:NARROW [(match_dup 1) (match_dup 2)] -+ VUNSPEC_SYNC_OLD_OP)) - (clobber (reg:CC CC_REGNUM)) - (clobber (match_scratch:SI 3 "=&r")) - (clobber (match_scratch:SI 4 "=&r"))] -- "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER" -+ "<sync_predtab>" - { - return arm_output_sync_insn (insn, operands); - } ---- a/src/gcc/config/arm/t-arm -+++ b/src/gcc/config/arm/t-arm -@@ -31,6 +31,16 @@ - $(srcdir)/config/arm/fmp626.md \ - $(srcdir)/config/arm/fa726te.md \ - $(srcdir)/config/arm/arm926ejs.md \ -+ $(srcdir)/config/arm/cortex-a15.md \ -+ $(srcdir)/config/arm/cortex-a5.md \ -+ $(srcdir)/config/arm/cortex-a8.md \ -+ $(srcdir)/config/arm/cortex-a8-neon.md \ -+ $(srcdir)/config/arm/cortex-a9.md \ -+ $(srcdir)/config/arm/cortex-a9-neon.md \ -+ $(srcdir)/config/arm/cortex-m4-fpu.md \ -+ $(srcdir)/config/arm/cortex-m4.md \ -+ $(srcdir)/config/arm/cortex-r4f.md \ -+ $(srcdir)/config/arm/cortex-r4.md \ - $(srcdir)/config/arm/cirrus.md \ - $(srcdir)/config/arm/fpa.md \ - $(srcdir)/config/arm/vec-common.md \ ---- a/src/gcc/config/arm/t-linux-eabi -+++ b/src/gcc/config/arm/t-linux-eabi -@@ -36,3 +36,4 @@ - EXTRA_MULTILIB_PARTS=crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o - - LIB2FUNCS_STATIC_EXTRA += $(srcdir)/config/arm/linux-atomic.c -+LIB2FUNCS_STATIC_EXTRA += $(srcdir)/config/arm/linux-atomic-64bit.c ---- a/src/gcc/config/arm/thumb2.md -+++ b/src/gcc/config/arm/thumb2.md -@@ -207,7 +207,9 @@ - (define_insn "*thumb2_movhi_insn" - [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r") - (match_operand:HI 1 "general_operand" "rI,n,r,m"))] -- "TARGET_THUMB2" -+ "TARGET_THUMB2 -+ && (register_operand (operands[0], HImode) -+ || register_operand (operands[1], HImode))" - "@ - mov%?\\t%0, %1\\t%@ movhi - movw%?\\t%0, %L1\\t%@ movhi -@@ -779,26 +781,6 @@ - (set_attr "length" "2")] - ) - --(define_insn "divsi3" -- [(set (match_operand:SI 0 "s_register_operand" "=r") -- (div:SI (match_operand:SI 1 "s_register_operand" "r") -- (match_operand:SI 2 "s_register_operand" "r")))] -- "TARGET_THUMB2 && arm_arch_hwdiv" -- "sdiv%?\t%0, %1, %2" -- [(set_attr "predicable" "yes") -- (set_attr "insn" "sdiv")] --) -- --(define_insn "udivsi3" -- [(set (match_operand:SI 0 "s_register_operand" "=r") -- (udiv:SI (match_operand:SI 1 "s_register_operand" "r") -- (match_operand:SI 2 "s_register_operand" "r")))] -- "TARGET_THUMB2 && arm_arch_hwdiv" -- "udiv%?\t%0, %1, %2" -- [(set_attr "predicable" "yes") -- (set_attr "insn" "udiv")] --) -- - (define_insn "*thumb2_subsi_short" - [(set (match_operand:SI 0 "low_register_operand" "=l") - (minus:SI (match_operand:SI 1 "low_register_operand" "l") -@@ -836,7 +818,7 @@ - "operands[4] = GEN_INT (- INTVAL (operands[2]));" - ) - --(define_insn "*thumb2_addsi3_compare0" -+(define_insn "thumb2_addsi3_compare0" - [(set (reg:CC_NOOV CC_REGNUM) - (compare:CC_NOOV - (plus:SI (match_operand:SI 1 "s_register_operand" "l, 0, r") -@@ -1118,3 +1100,54 @@ - " - operands[2] = GEN_INT (32 - INTVAL (operands[2])); - ") -+ -+;; Define the subtract-one-and-jump insns so loop.c -+;; knows what to generate. -+(define_expand "doloop_end" -+ [(use (match_operand 0 "" "")) ; loop pseudo -+ (use (match_operand 1 "" "")) ; iterations; zero if unknown -+ (use (match_operand 2 "" "")) ; max iterations -+ (use (match_operand 3 "" "")) ; loop level -+ (use (match_operand 4 "" ""))] ; label -+ "TARGET_32BIT" -+ " -+ { -+ /* Currently SMS relies on the do-loop pattern to recognize loops -+ where (1) the control part consists of all insns defining and/or -+ using a certain 'count' register and (2) the loop count can be -+ adjusted by modifying this register prior to the loop. -+ ??? The possible introduction of a new block to initialize the -+ new IV can potentially affect branch optimizations. */ -+ if (optimize > 0 && flag_modulo_sched) -+ { -+ rtx s0; -+ rtx bcomp; -+ rtx loc_ref; -+ rtx cc_reg; -+ rtx insn; -+ rtx cmp; -+ -+ /* Only use this on innermost loops. */ -+ if (INTVAL (operands[3]) > 1) -+ FAIL; -+ if (GET_MODE (operands[0]) != SImode) -+ FAIL; -+ -+ s0 = operands [0]; -+ if (TARGET_THUMB2) -+ insn = emit_insn (gen_thumb2_addsi3_compare0 (s0, s0, GEN_INT (-1))); -+ else -+ insn = emit_insn (gen_addsi3_compare0 (s0, s0, GEN_INT (-1))); -+ -+ cmp = XVECEXP (PATTERN (insn), 0, 0); -+ cc_reg = SET_DEST (cmp); -+ bcomp = gen_rtx_NE (VOIDmode, cc_reg, const0_rtx); -+ loc_ref = gen_rtx_LABEL_REF (VOIDmode, operands [4]); -+ emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, -+ gen_rtx_IF_THEN_ELSE (VOIDmode, bcomp, -+ loc_ref, pc_rtx))); -+ DONE; -+ }else -+ FAIL; -+}") -+ ---- a/src/gcc/config/arm/unwind-arm.c -+++ b/src/gcc/config/arm/unwind-arm.c -@@ -32,13 +32,18 @@ - typedef unsigned char bool; - - typedef struct _ZSt9type_info type_info; /* This names C++ type_info type */ -+enum __cxa_type_match_result -+ { -+ ctm_failed = 0, -+ ctm_succeeded = 1, -+ ctm_succeeded_with_ptr_to_base = 2 -+ }; - - void __attribute__((weak)) __cxa_call_unexpected(_Unwind_Control_Block *ucbp); - bool __attribute__((weak)) __cxa_begin_cleanup(_Unwind_Control_Block *ucbp); --bool __attribute__((weak)) __cxa_type_match(_Unwind_Control_Block *ucbp, -- const type_info *rttip, -- bool is_reference, -- void **matched_object); -+enum __cxa_type_match_result __attribute__((weak)) __cxa_type_match -+ (_Unwind_Control_Block *ucbp, const type_info *rttip, -+ bool is_reference, void **matched_object); - - _Unwind_Ptr __attribute__((weak)) - __gnu_Unwind_Find_exidx (_Unwind_Ptr, int *); -@@ -1107,6 +1112,7 @@ - _uw rtti; - bool is_reference = (data[0] & uint32_highbit) != 0; - void *matched; -+ enum __cxa_type_match_result match_type; - - /* Check for no-throw areas. */ - if (data[1] == (_uw) -2) -@@ -1118,17 +1124,31 @@ - { - /* Match a catch specification. */ - rtti = _Unwind_decode_target2 ((_uw) &data[1]); -- if (!__cxa_type_match (ucbp, (type_info *) rtti, -- is_reference, -- &matched)) -- matched = (void *)0; -+ match_type = __cxa_type_match (ucbp, -+ (type_info *) rtti, -+ is_reference, -+ &matched); - } -+ else -+ match_type = ctm_succeeded; - -- if (matched) -+ if (match_type) - { - ucbp->barrier_cache.sp = - _Unwind_GetGR (context, R_SP); -- ucbp->barrier_cache.bitpattern[0] = (_uw) matched; -+ // ctm_succeeded_with_ptr_to_base really -+ // means _c_t_m indirected the pointer -+ // object. We have to reconstruct the -+ // additional pointer layer by using a temporary. -+ if (match_type == ctm_succeeded_with_ptr_to_base) -+ { -+ ucbp->barrier_cache.bitpattern[2] -+ = (_uw) matched; -+ ucbp->barrier_cache.bitpattern[0] -+ = (_uw) &ucbp->barrier_cache.bitpattern[2]; -+ } -+ else -+ ucbp->barrier_cache.bitpattern[0] = (_uw) matched; - ucbp->barrier_cache.bitpattern[1] = (_uw) data; - return _URC_HANDLER_FOUND; - } -@@ -1196,8 +1216,6 @@ - ucbp->barrier_cache.bitpattern[4] = (_uw) &data[1]; - - if (data[0] & uint32_highbit) -- phase2_call_unexpected_after_unwind = 1; -- else - { - data += rtti_count + 1; - /* Setup for entry to the handler. */ -@@ -1207,6 +1225,8 @@ - _Unwind_SetGR (context, 0, (_uw) ucbp); - return _URC_INSTALL_CONTEXT; - } -+ else -+ phase2_call_unexpected_after_unwind = 1; - } - if (data[0] & uint32_highbit) - data++; ---- a/src/gcc/config/arm/vfp.md -+++ b/src/gcc/config/arm/vfp.md -@@ -401,8 +401,8 @@ - ;; DFmode moves - - (define_insn "*movdf_vfp" -- [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=w,?r,w ,r, m,w ,Uv,w,r") -- (match_operand:DF 1 "soft_df_operand" " ?r,w,Dy,mF,r,UvF,w, w,r"))] -+ [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=w,?r,w ,w ,Uv,r, m,w,r") -+ (match_operand:DF 1 "soft_df_operand" " ?r,w,Dy,UvF,w ,mF,r,w,r"))] - "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP - && ( register_operand (operands[0], DFmode) - || register_operand (operands[1], DFmode))" -@@ -418,9 +418,9 @@ - gcc_assert (TARGET_VFP_DOUBLE); - return \"fconstd%?\\t%P0, #%G1\"; - case 3: case 4: -- return output_move_double (operands); -- case 5: case 6: - return output_move_vfp (operands); -+ case 5: case 6: -+ return output_move_double (operands); - case 7: - if (TARGET_VFP_SINGLE) - return \"fcpys%?\\t%0, %1\;fcpys%?\\t%p0, %p1\"; -@@ -435,7 +435,7 @@ - " - [(set_attr "type" - "r_2_f,f_2_r,fconstd,f_loadd,f_stored,load2,store2,ffarithd,*") -- (set (attr "length") (cond [(eq_attr "alternative" "3,4,8") (const_int 8) -+ (set (attr "length") (cond [(eq_attr "alternative" "5,6,8") (const_int 8) - (eq_attr "alternative" "7") - (if_then_else - (eq (symbol_ref "TARGET_VFP_SINGLE") -@@ -449,8 +449,8 @@ - ) - - (define_insn "*thumb2_movdf_vfp" -- [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=w,?r,w ,r, m,w ,Uv,w,r") -- (match_operand:DF 1 "soft_df_operand" " ?r,w,Dy,mF,r,UvF,w, w,r"))] -+ [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=w,?r,w ,w ,Uv,r ,m,w,r") -+ (match_operand:DF 1 "soft_df_operand" " ?r,w,Dy,UvF,w, mF,r, w,r"))] - "TARGET_THUMB2 && TARGET_HARD_FLOAT && TARGET_VFP" - "* - { -@@ -463,10 +463,10 @@ - case 2: - gcc_assert (TARGET_VFP_DOUBLE); - return \"fconstd%?\\t%P0, #%G1\"; -- case 3: case 4: case 8: -- return output_move_double (operands); -- case 5: case 6: -+ case 3: case 4: - return output_move_vfp (operands); -+ case 5: case 6: case 8: -+ return output_move_double (operands); - case 7: - if (TARGET_VFP_SINGLE) - return \"fcpys%?\\t%0, %1\;fcpys%?\\t%p0, %p1\"; -@@ -478,8 +478,8 @@ - } - " - [(set_attr "type" -- "r_2_f,f_2_r,fconstd,load2,store2,f_loadd,f_stored,ffarithd,*") -- (set (attr "length") (cond [(eq_attr "alternative" "3,4,8") (const_int 8) -+ "r_2_f,f_2_r,fconstd,f_loadd,f_stored,load2,store2,ffarithd,*") -+ (set (attr "length") (cond [(eq_attr "alternative" "5,6,8") (const_int 8) - (eq_attr "alternative" "7") - (if_then_else - (eq (symbol_ref "TARGET_VFP_SINGLE") -@@ -487,8 +487,8 @@ - (const_int 8) - (const_int 4))] - (const_int 4))) -- (set_attr "pool_range" "*,*,*,4096,*,1020,*,*,*") -- (set_attr "neg_pool_range" "*,*,*,0,*,1008,*,*,*")] -+ (set_attr "pool_range" "*,*,*,1020,*,4096,*,*,*") -+ (set_attr "neg_pool_range" "*,*,*,1008,*,0,*,*,*")] - ) - - ---- a/src/gcc/config/arm/x-arm -+++ b/src/gcc/config/arm/x-arm -@@ -0,0 +1,3 @@ -+driver-arm.o: $(srcdir)/config/arm/driver-arm.c \ -+ $(CONFIG_H) $(SYSTEM_H) -+ $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< ---- a/src/gcc/config/darwin.c -+++ b/src/gcc/config/darwin.c -@@ -1753,19 +1753,51 @@ - return (!strncmp ((const char *)p, "_OBJC_", 6)); - } - --/* LTO support for Mach-O. */ -+/* LTO support for Mach-O. - --/* Section names for LTO sections. */ --static unsigned int lto_section_names_offset = 0; -+ This version uses three mach-o sections to encapsulate the (unlimited -+ number of) lto sections. - --/* This is the obstack which we use to allocate the many strings. */ --static struct obstack lto_section_names_obstack; -+ __GNU_LTO, __lto_sections contains the concatented GNU LTO section data. -+ __GNU_LTO, __section_names contains the GNU LTO section names. -+ __GNU_LTO, __section_index contains an array of values that index these. -+ -+ Indexed thus: -+ <section offset from the start of __GNU_LTO, __lto_sections>, -+ <section length> -+ <name offset from the start of __GNU_LTO, __section_names, -+ <name length>. -+ -+ At present, for both m32 and m64 mach-o files each of these fields is -+ represented by a uint32_t. This is because, AFAICT, a mach-o object -+ cannot exceed 4Gb because the section_64 offset field (see below) is 32bits. -+ -+ uint32_t offset; -+ "offset An integer specifying the offset to this section in the file." */ -+ -+/* Count lto section numbers. */ -+static unsigned int lto_section_num = 0; -+ -+/* A vector of information about LTO sections, at present, we only have -+ the name. TODO: see if we can get the data length somehow. */ -+typedef struct GTY (()) darwin_lto_section_e { -+ const char *sectname; -+} darwin_lto_section_e ; -+DEF_VEC_O(darwin_lto_section_e); -+DEF_VEC_ALLOC_O(darwin_lto_section_e, gc); - --/* Segment name for LTO sections. */ -+static GTY (()) VEC (darwin_lto_section_e, gc) * lto_section_names; -+ -+/* Segment for LTO data. */ - #define LTO_SEGMENT_NAME "__GNU_LTO" - --/* Section name for LTO section names section. */ --#define LTO_NAMES_SECTION "__section_names" -+/* Section wrapper scheme (used here to wrap the unlimited number of LTO -+ sections into three Mach-O ones). -+ NOTE: These names MUST be kept in sync with those in -+ libiberty/simple-object-mach-o. */ -+#define LTO_SECTS_SECTION "__wrapper_sects" -+#define LTO_NAMES_SECTION "__wrapper_names" -+#define LTO_INDEX_SECTION "__wrapper_index" - - /* File to temporarily store LTO data. This is appended to asm_out_file - in darwin_end_file. */ -@@ -1808,37 +1840,38 @@ - unsigned int flags, - tree decl ATTRIBUTE_UNUSED) - { -- /* LTO sections go in a special segment __GNU_LTO. We want to replace the -- section name with something we can use to represent arbitrary-length -- names (section names in Mach-O are at most 16 characters long). */ -+ /* LTO sections go in a special section that encapsulates the (unlimited) -+ number of GNU LTO sections within a single mach-o one. */ - if (strncmp (name, LTO_SECTION_NAME_PREFIX, - strlen (LTO_SECTION_NAME_PREFIX)) == 0) - { -+ darwin_lto_section_e e; - /* We expect certain flags to be set... */ - gcc_assert ((flags & (SECTION_DEBUG | SECTION_NAMED)) - == (SECTION_DEBUG | SECTION_NAMED)); - -- /* Add the section name to the things to output when we end the -- current assembler output file. -- This is all not very efficient, but that doesn't matter -- this -- shouldn't be a hot path in the compiler... */ -- obstack_1grow (<o_section_names_obstack, '\t'); -- obstack_grow (<o_section_names_obstack, ".ascii ", 7); -- obstack_1grow (<o_section_names_obstack, '"'); -- obstack_grow (<o_section_names_obstack, name, strlen (name)); -- obstack_grow (<o_section_names_obstack, "\\0\"\n", 4); -- -- /* Output the dummy section name. */ -- fprintf (asm_out_file, "\t# %s\n", name); -- fprintf (asm_out_file, "\t.section %s,__%08X,regular,debug\n", -- LTO_SEGMENT_NAME, lto_section_names_offset); -- -- /* Update the offset for the next section name. Make sure we stay -- within reasonable length. */ -- lto_section_names_offset += strlen (name) + 1; -- gcc_assert (lto_section_names_offset > 0 -- && lto_section_names_offset < ((unsigned) 1 << 31)); -- } -+ /* Switch to our combined section. */ -+ fprintf (asm_out_file, "\t.section %s,%s,regular,debug\n", -+ LTO_SEGMENT_NAME, LTO_SECTS_SECTION); -+ /* Output a label for the start of this sub-section. */ -+ fprintf (asm_out_file, "L_GNU_LTO%d:\t;# %s\n", -+ lto_section_num, name); -+ /* We have to jump through hoops to get the values of the intra-section -+ offsets... */ -+ fprintf (asm_out_file, "\t.set L$gnu$lto$offs%d,L_GNU_LTO%d-L_GNU_LTO0\n", -+ lto_section_num, lto_section_num); -+ fprintf (asm_out_file, -+ "\t.set L$gnu$lto$size%d,L_GNU_LTO%d-L_GNU_LTO%d\n", -+ lto_section_num, lto_section_num+1, lto_section_num); -+ lto_section_num++; -+ e.sectname = xstrdup (name); -+ /* Keep the names, we'll need to make a table later. -+ TODO: check that we do not revisit sections, that would break -+ the assumption of how this is done. */ -+ if (lto_section_names == NULL) -+ lto_section_names = VEC_alloc (darwin_lto_section_e, gc, 16); -+ VEC_safe_push (darwin_lto_section_e, gc, lto_section_names, &e); -+ } - else if (strncmp (name, "__DWARF,", 8) == 0) - darwin_asm_dwarf_section (name, flags, decl); - else -@@ -2711,16 +2744,12 @@ - darwin_asm_output_dwarf_delta (file, size, lab, sname); - } - --/* Called from the within the TARGET_ASM_FILE_START for each target. -- Initialize the stuff we need for LTO long section names support. */ -+/* Called from the within the TARGET_ASM_FILE_START for each target. */ - - void - darwin_file_start (void) - { -- /* We fill this obstack with the complete section text for the lto section -- names to write in darwin_file_end. */ -- obstack_init (<o_section_names_obstack); -- lto_section_names_offset = 0; -+ /* Nothing to do. */ - } - - /* Called for the TARGET_ASM_FILE_END hook. -@@ -2731,8 +2760,6 @@ - void - darwin_file_end (void) - { -- const char *lto_section_names; -- - machopic_finish (asm_out_file); - if (strcmp (lang_hooks.name, "GNU C++") == 0) - { -@@ -2762,6 +2789,13 @@ - lto_asm_txt = buf = (char *) xmalloc (n + 1); - while (fgets (lto_asm_txt, n, lto_asm_out_file)) - fputs (lto_asm_txt, asm_out_file); -+ /* Put a termination label. */ -+ fprintf (asm_out_file, "\t.section %s,%s,regular,debug\n", -+ LTO_SEGMENT_NAME, LTO_SECTS_SECTION); -+ fprintf (asm_out_file, "L_GNU_LTO%d:\t;# end of lto\n", -+ lto_section_num); -+ /* Make sure our termination label stays in this section. */ -+ fputs ("\t.space\t1\n", asm_out_file); - } - - /* Remove the temporary file. */ -@@ -2770,21 +2804,50 @@ - free (lto_asm_out_name); - } - -- /* Finish the LTO section names obstack. Don't output anything if -- there are no recorded section names. */ -- obstack_1grow (<o_section_names_obstack, '\0'); -- lto_section_names = XOBFINISH (<o_section_names_obstack, const char *); -- if (strlen (lto_section_names) > 0) -+ /* Output the names and indices. */ -+ if (lto_section_names && VEC_length (darwin_lto_section_e, lto_section_names)) - { -- fprintf (asm_out_file, -- "\t.section %s,%s,regular,debug\n", -+ int count; -+ darwin_lto_section_e *ref; -+ /* For now, we'll make the offsets 4 bytes and unaligned - we'll fix -+ the latter up ourselves. */ -+ const char *op = integer_asm_op (4,0); -+ -+ /* Emit the names. */ -+ fprintf (asm_out_file, "\t.section %s,%s,regular,debug\n", - LTO_SEGMENT_NAME, LTO_NAMES_SECTION); -- fprintf (asm_out_file, -- "\t# Section names in %s are offsets into this table\n", -- LTO_SEGMENT_NAME); -- fprintf (asm_out_file, "%s\n", lto_section_names); -+ FOR_EACH_VEC_ELT (darwin_lto_section_e, lto_section_names, count, ref) -+ { -+ fprintf (asm_out_file, "L_GNU_LTO_NAME%d:\n", count); -+ /* We have to jump through hoops to get the values of the intra-section -+ offsets... */ -+ fprintf (asm_out_file, -+ "\t.set L$gnu$lto$noff%d,L_GNU_LTO_NAME%d-L_GNU_LTO_NAME0\n", -+ count, count); -+ fprintf (asm_out_file, -+ "\t.set L$gnu$lto$nsiz%d,L_GNU_LTO_NAME%d-L_GNU_LTO_NAME%d\n", -+ count, count+1, count); -+ fprintf (asm_out_file, "\t.asciz\t\"%s\"\n", ref->sectname); -+ } -+ fprintf (asm_out_file, "L_GNU_LTO_NAME%d:\t;# end\n", lto_section_num); -+ /* make sure our termination label stays in this section. */ -+ fputs ("\t.space\t1\n", asm_out_file); -+ -+ /* Emit the Index. */ -+ fprintf (asm_out_file, "\t.section %s,%s,regular,debug\n", -+ LTO_SEGMENT_NAME, LTO_INDEX_SECTION); -+ fputs ("\t.align\t2\n", asm_out_file); -+ fputs ("# Section offset, Section length, Name offset, Name length\n", -+ asm_out_file); -+ FOR_EACH_VEC_ELT (darwin_lto_section_e, lto_section_names, count, ref) -+ { -+ fprintf (asm_out_file, "%s L$gnu$lto$offs%d\t;# %s\n", -+ op, count, ref->sectname); -+ fprintf (asm_out_file, "%s L$gnu$lto$size%d\n", op, count); -+ fprintf (asm_out_file, "%s L$gnu$lto$noff%d\n", op, count); -+ fprintf (asm_out_file, "%s L$gnu$lto$nsiz%d\n", op, count); -+ } - } -- obstack_free (<o_section_names_obstack, NULL); - - /* If we have section anchors, then we must prevent the linker from - re-arranging data. */ ---- a/src/gcc/config/host-linux.c -+++ b/src/gcc/config/host-linux.c -@@ -84,6 +84,8 @@ - # define TRY_EMPTY_VM_SPACE 0x60000000 - #elif defined(__mc68000__) - # define TRY_EMPTY_VM_SPACE 0x40000000 -+#elif defined(__ARM_EABI__) -+# define TRY_EMPTY_VM_SPACE 0x60000000 - #else - # define TRY_EMPTY_VM_SPACE 0 - #endif ---- a/src/gcc/config/i386/i386.c -+++ b/src/gcc/config/i386/i386.c -@@ -16329,7 +16329,6 @@ - basic_block bb = BLOCK_FOR_INSN (insn); - int distance = 0; - df_ref *def_rec; -- enum attr_type insn_type; - - if (insn != BB_HEAD (bb)) - { -@@ -16345,8 +16344,8 @@ - && (regno1 == DF_REF_REGNO (*def_rec) - || regno2 == DF_REF_REGNO (*def_rec))) - { -- insn_type = get_attr_type (prev); -- if (insn_type != TYPE_LEA) -+ if (recog_memoized (prev) < 0 -+ || get_attr_type (prev) != TYPE_LEA) - goto done; - } - } -@@ -16385,8 +16384,8 @@ - && (regno1 == DF_REF_REGNO (*def_rec) - || regno2 == DF_REF_REGNO (*def_rec))) - { -- insn_type = get_attr_type (prev); -- if (insn_type != TYPE_LEA) -+ if (recog_memoized (prev) < 0 -+ || get_attr_type (prev) != TYPE_LEA) - goto done; - } - } ---- a/src/gcc/config/i386/i386.md -+++ b/src/gcc/config/i386/i386.md -@@ -5103,7 +5103,7 @@ - && reload_completed - && (SSE_REG_P (operands[0]) - || (GET_CODE (operands[0]) == SUBREG -- && SSE_REG_P (operands[0])))" -+ && SSE_REG_P (SUBREG_REG (operands[0]))))" - [(set (match_dup 0) (float:MODEF (match_dup 1)))]) - - (define_split -@@ -5116,7 +5116,7 @@ - && reload_completed - && (SSE_REG_P (operands[0]) - || (GET_CODE (operands[0]) == SUBREG -- && SSE_REG_P (operands[0])))" -+ && SSE_REG_P (SUBREG_REG (operands[0]))))" - [(set (match_dup 2) (match_dup 1)) - (set (match_dup 0) (float:MODEF (match_dup 2)))]) - -@@ -5207,7 +5207,7 @@ - && reload_completed - && (SSE_REG_P (operands[0]) - || (GET_CODE (operands[0]) == SUBREG -- && SSE_REG_P (operands[0])))" -+ && SSE_REG_P (SUBREG_REG (operands[0]))))" - [(const_int 0)] - { - rtx op1 = operands[1]; -@@ -5248,7 +5248,7 @@ - && reload_completed - && (SSE_REG_P (operands[0]) - || (GET_CODE (operands[0]) == SUBREG -- && SSE_REG_P (operands[0])))" -+ && SSE_REG_P (SUBREG_REG (operands[0]))))" - [(const_int 0)] - { - operands[3] = simplify_gen_subreg (<ssevecmode>mode, operands[0], -@@ -5270,7 +5270,7 @@ - && reload_completed - && (SSE_REG_P (operands[0]) - || (GET_CODE (operands[0]) == SUBREG -- && SSE_REG_P (operands[0])))" -+ && SSE_REG_P (SUBREG_REG (operands[0]))))" - [(const_int 0)] - { - rtx op1 = operands[1]; -@@ -5314,7 +5314,7 @@ - && reload_completed - && (SSE_REG_P (operands[0]) - || (GET_CODE (operands[0]) == SUBREG -- && SSE_REG_P (operands[0])))" -+ && SSE_REG_P (SUBREG_REG (operands[0]))))" - [(const_int 0)] - { - operands[3] = simplify_gen_subreg (<ssevecmode>mode, operands[0], -@@ -5375,7 +5375,7 @@ - && reload_completed - && (SSE_REG_P (operands[0]) - || (GET_CODE (operands[0]) == SUBREG -- && SSE_REG_P (operands[0])))" -+ && SSE_REG_P (SUBREG_REG (operands[0]))))" - [(set (match_dup 0) (float:MODEF (match_dup 1)))]) - - (define_insn "*float<SSEMODEI24:mode><MODEF:mode>2_sse_nointerunit" -@@ -5410,7 +5410,7 @@ - && reload_completed - && (SSE_REG_P (operands[0]) - || (GET_CODE (operands[0]) == SUBREG -- && SSE_REG_P (operands[0])))" -+ && SSE_REG_P (SUBREG_REG (operands[0]))))" - [(set (match_dup 2) (match_dup 1)) - (set (match_dup 0) (float:MODEF (match_dup 2)))]) - -@@ -5423,7 +5423,7 @@ - && reload_completed - && (SSE_REG_P (operands[0]) - || (GET_CODE (operands[0]) == SUBREG -- && SSE_REG_P (operands[0])))" -+ && SSE_REG_P (SUBREG_REG (operands[0]))))" - [(set (match_dup 0) (float:MODEF (match_dup 1)))]) - - (define_insn "*float<SSEMODEI24:mode><X87MODEF:mode>2_i387_with_temp" -@@ -14625,7 +14625,7 @@ - emit_insn (gen_sse4_1_round<mode>2 - (operands[0], operands[1], GEN_INT (0x04))); - else -- ix86_expand_rint (operand0, operand1); -+ ix86_expand_rint (operands[0], operands[1]); - } - else - { -@@ -14649,9 +14649,9 @@ - if (optimize_insn_for_size_p ()) - FAIL; - if (TARGET_64BIT || (<MODE>mode != DFmode)) -- ix86_expand_round (operand0, operand1); -+ ix86_expand_round (operands[0], operands[1]); - else -- ix86_expand_rounddf_32 (operand0, operand1); -+ ix86_expand_rounddf_32 (operands[0], operands[1]); - DONE; - }) - -@@ -14796,7 +14796,7 @@ - { - if (optimize_insn_for_size_p ()) - FAIL; -- ix86_expand_lround (operand0, operand1); -+ ix86_expand_lround (operands[0], operands[1]); - DONE; - }) - -@@ -14871,9 +14871,9 @@ - emit_insn (gen_sse4_1_round<mode>2 - (operands[0], operands[1], GEN_INT (0x01))); - else if (TARGET_64BIT || (<MODE>mode != DFmode)) -- ix86_expand_floorceil (operand0, operand1, true); -+ ix86_expand_floorceil (operands[0], operands[1], true); - else -- ix86_expand_floorceildf_32 (operand0, operand1, true); -+ ix86_expand_floorceildf_32 (operands[0], operands[1], true); - } - else - { -@@ -15053,7 +15053,7 @@ - { - if (TARGET_64BIT && optimize_insn_for_size_p ()) - FAIL; -- ix86_expand_lfloorceil (operand0, operand1, true); -+ ix86_expand_lfloorceil (operands[0], operands[1], true); - DONE; - }) - -@@ -15128,9 +15128,9 @@ - else if (optimize_insn_for_size_p ()) - FAIL; - else if (TARGET_64BIT || (<MODE>mode != DFmode)) -- ix86_expand_floorceil (operand0, operand1, false); -+ ix86_expand_floorceil (operands[0], operands[1], false); - else -- ix86_expand_floorceildf_32 (operand0, operand1, false); -+ ix86_expand_floorceildf_32 (operands[0], operands[1], false); - } - else - { -@@ -15308,7 +15308,7 @@ - "SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH - && !flag_trapping_math" - { -- ix86_expand_lfloorceil (operand0, operand1, false); -+ ix86_expand_lfloorceil (operands[0], operands[1], false); - DONE; - }) - -@@ -15383,9 +15383,9 @@ - else if (optimize_insn_for_size_p ()) - FAIL; - else if (TARGET_64BIT || (<MODE>mode != DFmode)) -- ix86_expand_trunc (operand0, operand1); -+ ix86_expand_trunc (operands[0], operands[1]); - else -- ix86_expand_truncdf_32 (operand0, operand1); -+ ix86_expand_truncdf_32 (operands[0], operands[1]); - } - else - { -@@ -18285,8 +18285,8 @@ - (match_operand:SI 3 "const_int_operand" "i")] - UNSPECV_LWPVAL_INTRINSIC)] - "TARGET_LWP" -- "/* Avoid unused variable warning. */ -- (void) operand0;") -+ ;; Avoid unused variable warning. -+ "(void) operands[0];") - - (define_insn "*lwp_lwpval<mode>3_1" - [(unspec_volatile [(match_operand:SWI48 0 "register_operand" "r") ---- a/src/gcc/config/i386/sse.md -+++ b/src/gcc/config/i386/sse.md -@@ -4521,15 +4521,14 @@ - [(set (match_operand:V4DF 0 "register_operand" "=x,x") - (vec_select:V4DF - (vec_concat:V8DF -- (match_operand:V4DF 1 "nonimmediate_operand" "xm,x") -- (match_operand:V4DF 2 "nonimmediate_operand" " 1,xm")) -+ (match_operand:V4DF 1 "nonimmediate_operand" " x,m") -+ (match_operand:V4DF 2 "nonimmediate_operand" "xm,1")) - (parallel [(const_int 0) (const_int 4) - (const_int 2) (const_int 6)])))] -- "TARGET_AVX -- && (!MEM_P (operands[1]) || rtx_equal_p (operands[1], operands[2]))" -+ "TARGET_AVX" - "@ -- vmovddup\t{%1, %0|%0, %1} -- vunpcklpd\t{%2, %1, %0|%0, %1, %2}" -+ vunpcklpd\t{%2, %1, %0|%0, %1, %2} -+ vmovddup\t{%1, %0|%0, %1}" - [(set_attr "type" "sselog") - (set_attr "prefix" "vex") - (set_attr "mode" "V4DF")]) ---- a/src/gcc/config/pa/pa.c -+++ b/src/gcc/config/pa/pa.c -@@ -1863,6 +1863,11 @@ - /* Handle the most common case: storing into a register. */ - else if (register_operand (operand0, mode)) - { -+ /* Legitimize TLS symbol references. This happens for references -+ that aren't a legitimate constant. */ -+ if (PA_SYMBOL_REF_TLS_P (operand1)) -+ operand1 = legitimize_tls_address (operand1); -+ - if (register_operand (operand1, mode) - || (GET_CODE (operand1) == CONST_INT - && cint_ok_for_move (INTVAL (operand1))) ---- a/src/gcc/config/pa/pa.h -+++ b/src/gcc/config/pa/pa.h -@@ -848,6 +848,9 @@ - && (NEW_HP_ASSEMBLER \ - || TARGET_GAS \ - || GET_CODE (X) != LABEL_REF) \ -+ && (!PA_SYMBOL_REF_TLS_P (X) \ -+ || (SYMBOL_REF_TLS_MODEL (X) != TLS_MODEL_GLOBAL_DYNAMIC \ -+ && SYMBOL_REF_TLS_MODEL (X) != TLS_MODEL_LOCAL_DYNAMIC)) \ - && (!TARGET_64BIT \ - || GET_CODE (X) != CONST_DOUBLE) \ - && (!TARGET_64BIT \ ---- a/src/gcc/config/rs6000/rs6000.c -+++ b/src/gcc/config/rs6000/rs6000.c -@@ -5134,7 +5134,9 @@ - for (i = 0; i < n_elts; ++i) - { - x = XVECEXP (vals, 0, i); -- if (!CONSTANT_P (x)) -+ if (!(CONST_INT_P (x) -+ || GET_CODE (x) == CONST_DOUBLE -+ || GET_CODE (x) == CONST_FIXED)) - ++n_var; - } - if (n_var == 0) -@@ -5286,7 +5288,9 @@ - for (i = 0; i < n_elts; ++i) - { - x = XVECEXP (vals, 0, i); -- if (!CONSTANT_P (x)) -+ if (!(CONST_INT_P (x) -+ || GET_CODE (x) == CONST_DOUBLE -+ || GET_CODE (x) == CONST_FIXED)) - ++n_var, one_var = i; - else if (x != CONST0_RTX (inner_mode)) - all_const_zero = false; -@@ -6824,6 +6828,7 @@ - #if TARGET_MACHO - && DEFAULT_ABI == ABI_DARWIN - && (flag_pic || MACHO_DYNAMIC_NO_PIC_P) -+ && machopic_symbol_defined_p (x) - #else - && DEFAULT_ABI == ABI_V4 - && !flag_pic -@@ -20227,7 +20232,7 @@ - { - /* This blockage is needed so that sched doesn't decide to move - the sp change before the register restores. */ -- if (frame_reg_rtx != sp_reg_rtx -+ if (DEFAULT_ABI == ABI_V4 - || (TARGET_SPE_ABI - && info->spe_64bit_regs_used != 0 - && info->first_gp_reg_save != 32)) ---- a/src/gcc/config/sparc/sparc.h -+++ b/src/gcc/config/sparc/sparc.h -@@ -408,6 +408,7 @@ - %{mcpu=sparclite:-Asparclite} \ - %{mcpu=sparclite86x:-Asparclite} \ - %{mcpu=f930:-Asparclite} %{mcpu=f934:-Asparclite} \ -+%{mcpu=v8:-Av8} \ - %{mv8plus:-Av8plus} \ - %{mcpu=v9:-Av9} \ - %{mcpu=ultrasparc:%{!mv8plus:-Av9a}} \ ---- a/src/gcc/config/sparc/sparc.md -+++ b/src/gcc/config/sparc/sparc.md -@@ -1813,8 +1813,8 @@ - }) - - (define_insn "*movsf_insn" -- [(set (match_operand:V32 0 "nonimmediate_operand" "=d,f,*r,*r,*r,f,*r,m,m") -- (match_operand:V32 1 "input_operand" "GY,f,*rRY,Q,S,m,m,f,*rGY"))] -+ [(set (match_operand:V32 0 "nonimmediate_operand" "=d,f, *r,*r,*r,f,*r,m, m") -+ (match_operand:V32 1 "input_operand" "GY,f,*rRY, Q, S,m, m,f,*rGY"))] - "TARGET_FPU - && (register_operand (operands[0], <V32:MODE>mode) - || register_or_zero_operand (operands[1], <V32:MODE>mode))" -@@ -1861,8 +1861,8 @@ - ;; when -mno-fpu. - - (define_insn "*movsf_insn_no_fpu" -- [(set (match_operand:SF 0 "nonimmediate_operand" "=r,r,r,r,m") -- (match_operand:SF 1 "input_operand" "rR,Q,S,m,rG"))] -+ [(set (match_operand:SF 0 "nonimmediate_operand" "=r,r,r,r, m") -+ (match_operand:SF 1 "input_operand" "rR,Q,S,m,rG"))] - "! TARGET_FPU - && (register_operand (operands[0], SFmode) - || register_or_zero_operand (operands[1], SFmode))" -@@ -1948,8 +1948,8 @@ - - ;; Be careful, fmovd does not exist when !v9. - (define_insn "*movdf_insn_sp32" -- [(set (match_operand:DF 0 "nonimmediate_operand" "=e,W,U,T,o,e,*r,o,e,o") -- (match_operand:DF 1 "input_operand" "W#F,e,T,U,G,e,*rFo,*r,o#F,e"))] -+ [(set (match_operand:DF 0 "nonimmediate_operand" "= e,W,U,T,o,e, *r, o, e,o") -+ (match_operand:DF 1 "input_operand" "W#F,e,T,U,G,e,*rFo,*r,o#F,e"))] - "TARGET_FPU - && ! TARGET_V9 - && (register_operand (operands[0], DFmode) -@@ -1969,8 +1969,8 @@ - (set_attr "length" "*,*,*,*,2,2,2,2,2,2")]) - - (define_insn "*movdf_insn_sp32_no_fpu" -- [(set (match_operand:DF 0 "nonimmediate_operand" "=U,T,o,r,o") -- (match_operand:DF 1 "input_operand" "T,U,G,ro,r"))] -+ [(set (match_operand:DF 0 "nonimmediate_operand" "=U,T,o, r,o") -+ (match_operand:DF 1 "input_operand" " T,U,G,ro,r"))] - "! TARGET_FPU - && ! TARGET_V9 - && (register_operand (operands[0], DFmode) -@@ -1986,8 +1986,8 @@ - - ;; We have available v9 double floats but not 64-bit integer registers. - (define_insn "*movdf_insn_sp32_v9" -- [(set (match_operand:V64 0 "nonimmediate_operand" "=b,e,e,T,W,U,T,f,*r,o") -- (match_operand:V64 1 "input_operand" "GY,e,W#F,GY,e,T,U,o#F,*roGYDF,*rGYf"))] -+ [(set (match_operand:V64 0 "nonimmediate_operand" "=b,e, e, T,W,U,T, f, *r, o") -+ (match_operand:V64 1 "input_operand" "GY,e,W#F,GY,e,T,U,o#F,*roFD,*rGYf"))] - "TARGET_FPU - && TARGET_V9 - && ! TARGET_ARCH64 -@@ -2009,8 +2009,8 @@ - (set_attr "fptype" "double,double,*,*,*,*,*,*,*,*")]) - - (define_insn "*movdf_insn_sp32_v9_no_fpu" -- [(set (match_operand:DF 0 "nonimmediate_operand" "=U,T,T,r,o") -- (match_operand:DF 1 "input_operand" "T,U,G,ro,rG"))] -+ [(set (match_operand:DF 0 "nonimmediate_operand" "=U,T,T, r, o") -+ (match_operand:DF 1 "input_operand" " T,U,G,ro,rG"))] - "! TARGET_FPU - && TARGET_V9 - && ! TARGET_ARCH64 -@@ -2027,8 +2027,8 @@ - - ;; We have available both v9 double floats and 64-bit integer registers. - (define_insn "*movdf_insn_sp64" -- [(set (match_operand:V64 0 "nonimmediate_operand" "=b,e,e,W,*r,*r,m,*r") -- (match_operand:V64 1 "input_operand" "GY,e,W#F,e,*rGY,m,*rGY,DF"))] -+ [(set (match_operand:V64 0 "nonimmediate_operand" "=b,e, e,W, *r,*r, m,*r") -+ (match_operand:V64 1 "input_operand" "GY,e,W#F,e,*rGY, m,*rGY,FD"))] - "TARGET_FPU - && TARGET_ARCH64 - && (register_operand (operands[0], <V64:MODE>mode) -@@ -2047,8 +2047,8 @@ - (set_attr "fptype" "double,double,*,*,*,*,*,*")]) - - (define_insn "*movdf_insn_sp64_no_fpu" -- [(set (match_operand:DF 0 "nonimmediate_operand" "=r,r,m") -- (match_operand:DF 1 "input_operand" "r,m,rG"))] -+ [(set (match_operand:DF 0 "nonimmediate_operand" "=r,r, m") -+ (match_operand:DF 1 "input_operand" "r,m,rG"))] - "! TARGET_FPU - && TARGET_ARCH64 - && (register_operand (operands[0], DFmode) -@@ -2288,8 +2288,8 @@ - }) - - (define_insn "*movtf_insn_sp32" -- [(set (match_operand:TF 0 "nonimmediate_operand" "=b,e,o,U,r") -- (match_operand:TF 1 "input_operand" "G,oe,GeUr,o,roG"))] -+ [(set (match_operand:TF 0 "nonimmediate_operand" "=b, e, o,U, r") -+ (match_operand:TF 1 "input_operand" " G,oe,GeUr,o,roG"))] - "TARGET_FPU - && ! TARGET_ARCH64 - && (register_operand (operands[0], TFmode) -@@ -2302,8 +2302,8 @@ - ;; when -mno-fpu. - - (define_insn "*movtf_insn_sp32_no_fpu" -- [(set (match_operand:TF 0 "nonimmediate_operand" "=o,U,o,r,o") -- (match_operand:TF 1 "input_operand" "G,o,U,roG,r"))] -+ [(set (match_operand:TF 0 "nonimmediate_operand" "=o,U,o, r,o") -+ (match_operand:TF 1 "input_operand" " G,o,U,roG,r"))] - "! TARGET_FPU - && ! TARGET_ARCH64 - && (register_operand (operands[0], TFmode) -@@ -2312,8 +2312,8 @@ - [(set_attr "length" "4")]) - - (define_insn "*movtf_insn_sp64" -- [(set (match_operand:TF 0 "nonimmediate_operand" "=b,e,o,r") -- (match_operand:TF 1 "input_operand" "G,oe,Ger,roG"))] -+ [(set (match_operand:TF 0 "nonimmediate_operand" "=b, e, o, r") -+ (match_operand:TF 1 "input_operand" "G,oe,Ger,roG"))] - "TARGET_FPU - && TARGET_ARCH64 - && ! TARGET_HARD_QUAD -@@ -2323,8 +2323,8 @@ - [(set_attr "length" "2")]) - - (define_insn "*movtf_insn_sp64_hq" -- [(set (match_operand:TF 0 "nonimmediate_operand" "=b,e,e,m,o,r") -- (match_operand:TF 1 "input_operand" "G,e,m,e,rG,roG"))] -+ [(set (match_operand:TF 0 "nonimmediate_operand" "=b,e,e,m, o, r") -+ (match_operand:TF 1 "input_operand" "G,e,m,e,rG,roG"))] - "TARGET_FPU - && TARGET_ARCH64 - && TARGET_HARD_QUAD -@@ -2341,8 +2341,8 @@ - (set_attr "length" "2,*,*,*,2,2")]) - - (define_insn "*movtf_insn_sp64_no_fpu" -- [(set (match_operand:TF 0 "nonimmediate_operand" "=r,o") -- (match_operand:TF 1 "input_operand" "orG,rG"))] -+ [(set (match_operand:TF 0 "nonimmediate_operand" "= r, o") -+ (match_operand:TF 1 "input_operand" "orG,rG"))] - "! TARGET_FPU - && TARGET_ARCH64 - && (register_operand (operands[0], TFmode) ---- a/src/gcc/config.host -+++ b/src/gcc/config.host -@@ -100,6 +100,14 @@ - esac - - case ${host} in -+ arm*-*-linux*) -+ case ${target} in -+ arm*-*-*) -+ host_extra_gcc_objs="driver-arm.o" -+ host_xmake_file="${host_xmake_file} arm/x-arm" -+ ;; -+ esac -+ ;; - alpha*-*-linux*) - case ${target} in - alpha*-*-linux*) ---- a/src/gcc/configure -+++ b/src/gcc/configure -@@ -1647,7 +1647,8 @@ - use sysroot as the system root during the build - --with-sysroot=DIR Search for usr/lib, usr/include, et al, within DIR. - --with-specs=SPECS add SPECS to driver command-line processing -- --with-pkgversion=PKG Use PKG in the version string in place of "GCC" -+ --with-pkgversion=PKG Use PKG in the version string in place of "Linaro -+ GCC `cat $srcdir/LINARO-VERSION`" - --with-bugurl=URL Direct users to URL to report a bug - --with-multilib-list Select multilibs (SH only) - --with-gnu-ld assume the C compiler uses GNU ld default=no -@@ -7129,7 +7130,7 @@ - *) PKGVERSION="($withval) " ;; - esac - else -- PKGVERSION="(GCC) " -+ PKGVERSION="(Linaro GCC `cat $srcdir/LINARO-VERSION`) " - - fi - -@@ -7442,17 +7443,7 @@ - RANLIB="$ac_cv_prog_RANLIB" - fi - --case "${host}" in --*-*-darwin*) -- # By default, the Darwin ranlib will not treat common symbols as -- # definitions when building the archive table of contents. Other -- # ranlibs do that; pass an option to the Darwin ranlib that makes -- # it behave similarly. -- ranlib_flags="-c" -- ;; --*) -- ranlib_flags="" --esac -+ranlib_flags="" - - - # Find a good install program. We prefer a C program (faster), -@@ -15740,7 +15731,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -16653,7 +16644,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -16671,7 +16662,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -@@ -17505,7 +17496,7 @@ - lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 - lt_status=$lt_dlunknown - cat > conftest.$ac_ext <<_LT_EOF --#line 17508 "configure" -+#line 17499 "configure" - #include "confdefs.h" - - #if HAVE_DLFCN_H -@@ -17611,7 +17602,7 @@ - lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 - lt_status=$lt_dlunknown - cat > conftest.$ac_ext <<_LT_EOF --#line 17614 "configure" -+#line 17605 "configure" - #include "confdefs.h" - - #if HAVE_DLFCN_H -@@ -18537,7 +18528,7 @@ - esac - ;; - -- freebsd[12]*) -+ freebsd2.*) - # C++ shared libraries reported to be fairly broken before - # switch to ELF - ld_shlibs_CXX=no -@@ -20312,7 +20303,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -20330,7 +20321,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) ---- a/src/gcc/configure.ac -+++ b/src/gcc/configure.ac -@@ -760,7 +760,7 @@ - ) - AC_SUBST(CONFIGURE_SPECS) - --ACX_PKGVERSION([GCC]) -+ACX_PKGVERSION([Linaro GCC `cat $srcdir/LINARO-VERSION`]) - ACX_BUGURL([http://gcc.gnu.org/bugs.html]) - - # Sanity check enable_languages in case someone does not run the toplevel -@@ -807,17 +807,7 @@ - gcc_AC_PROG_LN_S - ACX_PROG_LN($LN_S) - AC_PROG_RANLIB --case "${host}" in --*-*-darwin*) -- # By default, the Darwin ranlib will not treat common symbols as -- # definitions when building the archive table of contents. Other -- # ranlibs do that; pass an option to the Darwin ranlib that makes -- # it behave similarly. -- ranlib_flags="-c" -- ;; --*) -- ranlib_flags="" --esac -+ranlib_flags="" - AC_SUBST(ranlib_flags) - - gcc_AC_PROG_INSTALL ---- a/src/gcc/cp/ChangeLog -+++ b/src/gcc/cp/ChangeLog -@@ -1,3 +1,32 @@ -+2011-11-22 Paolo Carlini <paolo.carlini@oracle.com> -+ -+ PR c++/51265 -+ * semantics.c (finish_decltype_type): Handle PTRMEM_CST. -+ -+2011-11-18 Paolo Carlini <paolo.carlini@oracle.com> -+ -+ PR c++/51150 -+ * pt.c (tsubst_copy_and_build): Handle FIX_TRUNC_EXPR. -+ -+2011-11-07 Jason Merrill <jason@redhat.com> -+ -+ PR c++/50870 -+ * pt.c (tsubst_copy): Handle NAMESPACE_DECL. -+ (tsubst_copy_and_build) [COMPONENT_REF]: Handle a still-dependent -+ object. -+ -+2011-11-04 Eric Botcazou <ebotcazou@adacore.com> -+ -+ PR c++/50608 -+ * semantics.c (finish_offsetof): Adjust call to fold_offsetof. -+ * typeck.c (cp_build_addr_expr_1): Call fold_offsetof_1. -+ -+2011-10-29 Paolo Carlini <paolo.carlini@oracle.com> -+ -+ PR c++/50901 -+ * call.c (build_new_op_1): Handle ABS_EXPR together with the -+ other unary EXPR. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/gcc/cp/call.c -+++ b/src/gcc/cp/call.c -@@ -4996,6 +4996,7 @@ - case POSTDECREMENT_EXPR: - case REALPART_EXPR: - case IMAGPART_EXPR: -+ case ABS_EXPR: - return cp_build_unary_op (code, arg1, candidates != 0, complain); - - case ARRAY_REF: ---- a/src/gcc/cp/pt.c -+++ b/src/gcc/cp/pt.c -@@ -11439,6 +11439,9 @@ - mark_used (t); - return t; - -+ case NAMESPACE_DECL: -+ return t; -+ - case OVERLOAD: - /* An OVERLOAD will always be a non-dependent overload set; an - overload set from function scope will just be represented with an -@@ -12704,6 +12707,10 @@ - return build_x_unary_op (TREE_CODE (t), RECUR (TREE_OPERAND (t, 0)), - complain); - -+ case FIX_TRUNC_EXPR: -+ return cp_build_unary_op (FIX_TRUNC_EXPR, RECUR (TREE_OPERAND (t, 0)), -+ 0, complain); -+ - case ADDR_EXPR: - op1 = TREE_OPERAND (t, 0); - if (TREE_CODE (op1) == LABEL_DECL) -@@ -13179,7 +13186,9 @@ - if (member == error_mark_node) - return error_mark_node; - -- if (object_type && !CLASS_TYPE_P (object_type)) -+ if (type_dependent_expression_p (object)) -+ /* We can't do much here. */; -+ else if (!CLASS_TYPE_P (object_type)) - { - if (SCALAR_TYPE_P (object_type)) - { ---- a/src/gcc/cp/semantics.c -+++ b/src/gcc/cp/semantics.c -@@ -3348,7 +3348,7 @@ - } - if (TREE_CODE (expr) == INDIRECT_REF && REFERENCE_REF_P (expr)) - expr = TREE_OPERAND (expr, 0); -- return fold_offsetof (expr, NULL_TREE); -+ return fold_offsetof (expr); - } - - /* Replace the AGGR_INIT_EXPR at *TP with an equivalent CALL_EXPR. This -@@ -4927,8 +4927,9 @@ - gcc_unreachable (); - - case INTEGER_CST: -+ case PTRMEM_CST: - /* We can get here when the id-expression refers to an -- enumerator. */ -+ enumerator or non-type template parameter. */ - type = TREE_TYPE (expr); - break; - ---- a/src/gcc/cp/typeck.c -+++ b/src/gcc/cp/typeck.c -@@ -4835,9 +4835,7 @@ - && TREE_CONSTANT (TREE_OPERAND (val, 0))) - { - tree type = build_pointer_type (argtype); -- tree op0 = fold_convert (type, TREE_OPERAND (val, 0)); -- tree op1 = fold_convert (sizetype, fold_offsetof (arg, val)); -- return fold_build2 (POINTER_PLUS_EXPR, type, op0, op1); -+ return fold_convert (type, fold_offsetof_1 (arg)); - } - - /* Handle complex lvalues (when permitted) ---- a/src/gcc/cp/typeck2.c -+++ b/src/gcc/cp/typeck2.c -@@ -479,18 +479,20 @@ - - - /* The recursive part of split_nonconstant_init. DEST is an lvalue -- expression to which INIT should be assigned. INIT is a CONSTRUCTOR. */ -+ expression to which INIT should be assigned. INIT is a CONSTRUCTOR. -+ Return true if the whole of the value was initialized by the -+ generated statements. */ - --static void --split_nonconstant_init_1 (tree dest, tree *initp) -+static bool -+split_nonconstant_init_1 (tree dest, tree init) - { - unsigned HOST_WIDE_INT idx; -- tree init = *initp; - tree field_index, value; - tree type = TREE_TYPE (dest); - tree inner_type = NULL; - bool array_type_p = false; -- HOST_WIDE_INT num_type_elements, num_initialized_elements; -+ bool complete_p = true; -+ HOST_WIDE_INT num_split_elts = 0; - - switch (TREE_CODE (type)) - { -@@ -502,7 +504,6 @@ - case RECORD_TYPE: - case UNION_TYPE: - case QUAL_UNION_TYPE: -- num_initialized_elements = 0; - FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), idx, - field_index, value) - { -@@ -525,13 +526,14 @@ - sub = build3 (COMPONENT_REF, inner_type, dest, field_index, - NULL_TREE); - -- split_nonconstant_init_1 (sub, &value); -+ if (!split_nonconstant_init_1 (sub, value)) -+ complete_p = false; -+ num_split_elts++; - } - else if (!initializer_constant_valid_p (value, inner_type)) - { - tree code; - tree sub; -- HOST_WIDE_INT inner_elements; - - /* FIXME: Ordered removal is O(1) so the whole function is - worst-case quadratic. This could be fixed using an aside -@@ -555,21 +557,9 @@ - code = build_stmt (input_location, EXPR_STMT, code); - add_stmt (code); - -- inner_elements = count_type_elements (inner_type, true); -- if (inner_elements < 0) -- num_initialized_elements = -1; -- else if (num_initialized_elements >= 0) -- num_initialized_elements += inner_elements; -- continue; -+ num_split_elts++; - } - } -- -- num_type_elements = count_type_elements (type, true); -- /* If all elements of the initializer are non-constant and -- have been split out, we don't need the empty CONSTRUCTOR. */ -- if (num_type_elements > 0 -- && num_type_elements == num_initialized_elements) -- *initp = NULL; - break; - - case VECTOR_TYPE: -@@ -581,6 +571,7 @@ - code = build2 (MODIFY_EXPR, type, dest, cons); - code = build_stmt (input_location, EXPR_STMT, code); - add_stmt (code); -+ num_split_elts += CONSTRUCTOR_NELTS (init); - } - break; - -@@ -590,6 +581,8 @@ - - /* The rest of the initializer is now a constant. */ - TREE_CONSTANT (init) = 1; -+ return complete_p && complete_ctor_at_level_p (TREE_TYPE (init), -+ num_split_elts, inner_type); - } - - /* A subroutine of store_init_value. Splits non-constant static -@@ -605,7 +598,8 @@ - if (TREE_CODE (init) == CONSTRUCTOR) - { - code = push_stmt_list (); -- split_nonconstant_init_1 (dest, &init); -+ if (split_nonconstant_init_1 (dest, init)) -+ init = NULL_TREE; - code = pop_stmt_list (code); - DECL_INITIAL (dest) = init; - TREE_READONLY (dest) = 0; ---- a/src/gcc/ddg.c -+++ b/src/gcc/ddg.c -@@ -145,6 +145,27 @@ - return rtx_mem_access_p (PATTERN (insn)); - } - -+/* Return true if DEF_INSN contains address being auto-inc or auto-dec -+ which is used in USE_INSN. Otherwise return false. The result is -+ being used to decide whether to remove the edge between def_insn and -+ use_insn when -fmodulo-sched-allow-regmoves is set. This function -+ doesn't need to consider the specific address register; no reg_moves -+ will be allowed for any life range defined by def_insn and used -+ by use_insn, if use_insn uses an address register auto-inc'ed by -+ def_insn. */ -+bool -+autoinc_var_is_used_p (rtx def_insn, rtx use_insn) -+{ -+ rtx note; -+ -+ for (note = REG_NOTES (def_insn); note; note = XEXP (note, 1)) -+ if (REG_NOTE_KIND (note) == REG_INC -+ && reg_referenced_p (XEXP (note, 0), PATTERN (use_insn))) -+ return true; -+ -+ return false; -+} -+ - /* Computes the dependence parameters (latency, distance etc.), creates - a ddg_edge and adds it to the given DDG. */ - static void -@@ -173,10 +194,15 @@ - compensate for that by generating reg-moves based on the life-range - analysis. The anti-deps that will be deleted are the ones which - have true-deps edges in the opposite direction (in other words -- the kernel has only one def of the relevant register). TODO: -- support the removal of all anti-deps edges, i.e. including those -+ the kernel has only one def of the relevant register). -+ If the address that is being auto-inc or auto-dec in DEST_NODE -+ is used in SRC_NODE then do not remove the edge to make sure -+ reg-moves will not be created for this address. -+ TODO: support the removal of all anti-deps edges, i.e. including those - whose register has multiple defs in the loop. */ -- if (flag_modulo_sched_allow_regmoves && (t == ANTI_DEP && dt == REG_DEP)) -+ if (flag_modulo_sched_allow_regmoves -+ && (t == ANTI_DEP && dt == REG_DEP) -+ && !autoinc_var_is_used_p (dest_node->insn, src_node->insn)) - { - rtx set; - -@@ -301,8 +327,15 @@ - - gcc_assert (first_def_node); - -+ /* Always create the edge if the use node is a branch in -+ order to prevent the creation of reg-moves. -+ If the address that is being auto-inc or auto-dec in LAST_DEF -+ is used in USE_INSN then do not remove the edge to make sure -+ reg-moves will not be created for that address. */ - if (DF_REF_ID (last_def) != DF_REF_ID (first_def) -- || !flag_modulo_sched_allow_regmoves) -+ || !flag_modulo_sched_allow_regmoves -+ || JUMP_P (use_node->insn) -+ || autoinc_var_is_used_p (DF_REF_INSN (last_def), use_insn)) - create_ddg_dep_no_link (g, use_node, first_def_node, ANTI_DEP, - REG_DEP, 1); - -@@ -385,6 +418,33 @@ - &PATTERN (insn2)); - } - -+/* Given two nodes, analyze their RTL insns and add intra-loop mem deps -+ to ddg G. */ -+static void -+add_intra_loop_mem_dep (ddg_ptr g, ddg_node_ptr from, ddg_node_ptr to) -+{ -+ -+ if ((from->cuid == to->cuid) -+ || !insns_may_alias_p (from->insn, to->insn)) -+ /* Do not create edge if memory references have disjoint alias sets -+ or 'to' and 'from' are the same instruction. */ -+ return; -+ -+ if (mem_write_insn_p (from->insn)) -+ { -+ if (mem_read_insn_p (to->insn)) -+ create_ddg_dep_no_link (g, from, to, -+ DEBUG_INSN_P (to->insn) -+ ? ANTI_DEP : TRUE_DEP, MEM_DEP, 0); -+ else -+ create_ddg_dep_no_link (g, from, to, -+ DEBUG_INSN_P (to->insn) -+ ? ANTI_DEP : OUTPUT_DEP, MEM_DEP, 0); -+ } -+ else if (!mem_read_insn_p (to->insn)) -+ create_ddg_dep_no_link (g, from, to, ANTI_DEP, MEM_DEP, 0); -+} -+ - /* Given two nodes, analyze their RTL insns and add inter-loop mem deps - to ddg G. */ - static void -@@ -472,10 +532,22 @@ - if (DEBUG_INSN_P (j_node->insn)) - continue; - if (mem_access_insn_p (j_node->insn)) -- /* Don't bother calculating inter-loop dep if an intra-loop dep -- already exists. */ -+ { -+ /* Don't bother calculating inter-loop dep if an intra-loop dep -+ already exists. */ - if (! TEST_BIT (dest_node->successors, j)) - add_inter_loop_mem_dep (g, dest_node, j_node); -+ /* If -fmodulo-sched-allow-regmoves -+ is set certain anti-dep edges are not created. -+ It might be that these anti-dep edges are on the -+ path from one memory instruction to another such that -+ removing these edges could cause a violation of the -+ memory dependencies. Thus we add intra edges between -+ every two memory instructions in this case. */ -+ if (flag_modulo_sched_allow_regmoves -+ && !TEST_BIT (dest_node->predecessors, j)) -+ add_intra_loop_mem_dep (g, j_node, dest_node); -+ } - } - } - } -@@ -1011,6 +1083,7 @@ - for (i = 0; i < all_sccs->num_sccs; i++) - free_scc (all_sccs->sccs[i]); - -+ free (all_sccs->sccs); - free (all_sccs); - } - ---- a/src/gcc/ddg.h -+++ b/src/gcc/ddg.h -@@ -186,4 +186,6 @@ - int find_nodes_on_paths (sbitmap result, ddg_ptr, sbitmap from, sbitmap to); - int longest_simple_path (ddg_ptr, int from, int to, sbitmap via); - -+bool autoinc_var_is_used_p (rtx, rtx); -+ - #endif /* GCC_DDG_H */ ---- a/src/gcc/df-problems.c -+++ b/src/gcc/df-problems.c -@@ -3375,7 +3375,7 @@ - while (*mws_rec) - { - struct df_mw_hardreg *mws = *mws_rec; -- if ((DF_MWS_REG_DEF_P (mws)) -+ if (DF_MWS_REG_USE_P (mws) - && !df_ignore_stack_reg (mws->start_regno)) - { - bool really_add_notes = debug_insn != 0; ---- a/src/gcc/doc/tm.texi.in -+++ b/src/gcc/doc/tm.texi.in -@@ -2521,7 +2521,7 @@ - register, so @code{TARGET_PREFERRED_RELOAD_CLASS} returns @code{NO_REGS} when - @var{x} is a floating-point constant. If the constant can't be loaded - into any kind of register, code generation will be better if --@code{LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead -+@code{TARGET_LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead - of using @code{TARGET_PREFERRED_RELOAD_CLASS}. - - If an insn has pseudos in it after register allocation, reload will go -@@ -2558,8 +2558,8 @@ - register, so @code{PREFERRED_RELOAD_CLASS} returns @code{NO_REGS} when - @var{x} is a floating-point constant. If the constant can't be loaded - into any kind of register, code generation will be better if --@code{LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead --of using @code{PREFERRED_RELOAD_CLASS}. -+@code{TARGET_LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead -+of using @code{TARGET_PREFERRED_RELOAD_CLASS}. - - If an insn has pseudos in it after register allocation, reload will go - through the alternatives and call repeatedly @code{PREFERRED_RELOAD_CLASS} -@@ -4305,6 +4305,8 @@ - must have move patterns for this mode. - @end deftypefn - -+@hook TARGET_ARRAY_MODE_SUPPORTED_P -+ - @hook TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P - Define this to return nonzero for machine modes for which the port has - small register classes. If this target hook returns nonzero for a given -@@ -5555,13 +5557,13 @@ - @code{TARGET_MODE_DEPENDENT_ADDRESS_P} target hook. - @end defmac - --@defmac LEGITIMATE_CONSTANT_P (@var{x}) --A C expression that is nonzero if @var{x} is a legitimate constant for --an immediate operand on the target machine. You can assume that --@var{x} satisfies @code{CONSTANT_P}, so you need not check this. In fact, --@samp{1} is a suitable definition for this macro on machines where --anything @code{CONSTANT_P} is valid. --@end defmac -+@hook TARGET_LEGITIMATE_CONSTANT_P -+This hook returns true if @var{x} is a legitimate constant for a -+@var{mode}-mode immediate operand on the target machine. You can assume that -+@var{x} satisfies @code{CONSTANT_P}, so you need not check this. -+ -+The default definition returns true. -+@end deftypefn - - @hook TARGET_DELEGITIMIZE_ADDRESS - This hook is used to undo the possibly obfuscating effects of the ---- a/src/gcc/dojump.c -+++ b/src/gcc/dojump.c -@@ -36,6 +36,7 @@ - #include "ggc.h" - #include "basic-block.h" - #include "output.h" -+#include "tm_p.h" - - static bool prefer_and_bit_test (enum machine_mode, int); - static void do_jump_by_parts_greater (tree, tree, int, rtx, rtx, int); ---- a/src/gcc/dwarf2out.c -+++ b/src/gcc/dwarf2out.c -@@ -4431,6 +4431,11 @@ - const char *section; /* Section this loclist is relative to */ - dw_loc_descr_ref expr; - hashval_t hash; -+ /* True if all addresses in this and subsequent lists are known to be -+ resolved. */ -+ bool resolved_addr; -+ /* True if this list has been replaced by dw_loc_next. */ -+ bool replaced; - bool emitted; - } dw_loc_list_node; - -@@ -6091,6 +6096,19 @@ - /* Table of decl location linked lists. */ - static GTY ((param_is (var_loc_list))) htab_t decl_loc_table; - -+/* A cached location list. */ -+struct GTY (()) cached_dw_loc_list_def { -+ /* The DECL_UID of the decl that this entry describes. */ -+ unsigned int decl_id; -+ -+ /* The cached location list. */ -+ dw_loc_list_ref loc_list; -+}; -+typedef struct cached_dw_loc_list_def cached_dw_loc_list; -+ -+/* Table of cached location lists. */ -+static GTY ((param_is (cached_dw_loc_list))) htab_t cached_dw_loc_list_table; -+ - /* A pointer to the base of a list of references to DIE's that - are uniquely identified by their tag, presence/absence of - children DIE's, and list of attribute/value pairs. */ -@@ -6439,7 +6457,7 @@ - static void insert_double (double_int, unsigned char *); - static void insert_float (const_rtx, unsigned char *); - static rtx rtl_for_decl_location (tree); --static bool add_location_or_const_value_attribute (dw_die_ref, tree, -+static bool add_location_or_const_value_attribute (dw_die_ref, tree, bool, - enum dwarf_attribute); - static bool tree_add_const_value_attribute (dw_die_ref, tree); - static bool tree_add_const_value_attribute_for_decl (dw_die_ref, tree); -@@ -8173,6 +8191,24 @@ - htab_find_with_hash (decl_loc_table, decl, DECL_UID (decl)); - } - -+/* Returns a hash value for X (which really is a cached_dw_loc_list_list). */ -+ -+static hashval_t -+cached_dw_loc_list_table_hash (const void *x) -+{ -+ return (hashval_t) ((const cached_dw_loc_list *) x)->decl_id; -+} -+ -+/* Return nonzero if decl_id of cached_dw_loc_list X is the same as -+ UID of decl *Y. */ -+ -+static int -+cached_dw_loc_list_table_eq (const void *x, const void *y) -+{ -+ return (((const cached_dw_loc_list *) x)->decl_id -+ == DECL_UID ((const_tree) y)); -+} -+ - /* Equate a DIE to a particular declaration. */ - - static void -@@ -16995,15 +17031,22 @@ - these things can crop up in other ways also.) Note that one type of - constant value which can be passed into an inlined function is a constant - pointer. This can happen for example if an actual argument in an inlined -- function call evaluates to a compile-time constant address. */ -+ function call evaluates to a compile-time constant address. -+ -+ CACHE_P is true if it is worth caching the location list for DECL, -+ so that future calls can reuse it rather than regenerate it from scratch. -+ This is true for BLOCK_NONLOCALIZED_VARS in inlined subroutines, -+ since we will need to refer to them each time the function is inlined. */ - - static bool --add_location_or_const_value_attribute (dw_die_ref die, tree decl, -+add_location_or_const_value_attribute (dw_die_ref die, tree decl, bool cache_p, - enum dwarf_attribute attr) - { - rtx rtl; - dw_loc_list_ref list; - var_loc_list *loc_list; -+ cached_dw_loc_list *cache; -+ void **slot; - - if (TREE_CODE (decl) == ERROR_MARK) - return false; -@@ -17040,7 +17083,33 @@ - && add_const_value_attribute (die, rtl)) - return true; - } -- list = loc_list_from_tree (decl, decl_by_reference_p (decl) ? 0 : 2); -+ /* If this decl is from BLOCK_NONLOCALIZED_VARS, we might need its -+ list several times. See if we've already cached the contents. */ -+ list = NULL; -+ if (loc_list == NULL || cached_dw_loc_list_table == NULL) -+ cache_p = false; -+ if (cache_p) -+ { -+ cache = (cached_dw_loc_list *) -+ htab_find_with_hash (cached_dw_loc_list_table, decl, DECL_UID (decl)); -+ if (cache) -+ list = cache->loc_list; -+ } -+ if (list == NULL) -+ { -+ list = loc_list_from_tree (decl, decl_by_reference_p (decl) ? 0 : 2); -+ /* It is usually worth caching this result if the decl is from -+ BLOCK_NONLOCALIZED_VARS and if the list has at least two elements. */ -+ if (cache_p && list && list->dw_loc_next) -+ { -+ slot = htab_find_slot_with_hash (cached_dw_loc_list_table, decl, -+ DECL_UID (decl), INSERT); -+ cache = ggc_alloc_cleared_cached_dw_loc_list (); -+ cache->decl_id = DECL_UID (decl); -+ cache->loc_list = list; -+ *slot = cache; -+ } -+ } - if (list) - { - add_AT_location_description (die, attr, list); -@@ -18738,7 +18807,7 @@ - equate_decl_number_to_die (node, parm_die); - if (! DECL_ABSTRACT (node_or_origin)) - add_location_or_const_value_attribute (parm_die, node_or_origin, -- DW_AT_location); -+ node == NULL, DW_AT_location); - - break; - -@@ -18923,6 +18992,7 @@ - tree context; - int was_abstract; - htab_t old_decl_loc_table; -+ htab_t old_cached_dw_loc_list_table; - - /* Make sure we have the actual abstract inline, not a clone. */ - decl = DECL_ORIGIN (decl); -@@ -18937,6 +19007,8 @@ - get locations in abstract instantces. */ - old_decl_loc_table = decl_loc_table; - decl_loc_table = NULL; -+ old_cached_dw_loc_list_table = cached_dw_loc_list_table; -+ cached_dw_loc_list_table = NULL; - - /* Be sure we've emitted the in-class declaration DIE (if any) first, so - we don't get confused by DECL_ABSTRACT. */ -@@ -18961,6 +19033,7 @@ - - current_function_decl = save_fn; - decl_loc_table = old_decl_loc_table; -+ cached_dw_loc_list_table = old_cached_dw_loc_list_table; - pop_cfun (); - } - -@@ -19745,9 +19818,8 @@ - && !TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (decl_or_origin))) - defer_location (decl_or_origin, var_die); - else -- add_location_or_const_value_attribute (var_die, -- decl_or_origin, -- DW_AT_location); -+ add_location_or_const_value_attribute (var_die, decl_or_origin, -+ decl == NULL, DW_AT_location); - add_pubname (decl_or_origin, var_die); - } - else -@@ -21534,6 +21606,7 @@ - dwarf2out_decl (decl); - - htab_empty (decl_loc_table); -+ htab_empty (cached_dw_loc_list_table); - } - - /* Output a marker (i.e. a label) for the beginning of the generated code for -@@ -22267,6 +22340,11 @@ - decl_loc_table = htab_create_ggc (10, decl_loc_table_hash, - decl_loc_table_eq, NULL); - -+ /* Allocate the cached_dw_loc_list_table. */ -+ cached_dw_loc_list_table -+ = htab_create_ggc (10, cached_dw_loc_list_table_hash, -+ cached_dw_loc_list_table_eq, NULL); -+ - /* Allocate the initial hunk of the decl_scope_table. */ - decl_scope_table = VEC_alloc (tree, gc, 256); - -@@ -22907,30 +22985,53 @@ - { - dw_die_ref c; - dw_attr_ref a; -- dw_loc_list_ref *curr; -+ dw_loc_list_ref *curr, *start, loc; - unsigned ix; - - FOR_EACH_VEC_ELT (dw_attr_node, die->die_attr, ix, a) - switch (AT_class (a)) - { - case dw_val_class_loc_list: -- curr = AT_loc_list_ptr (a); -- while (*curr) -+ start = curr = AT_loc_list_ptr (a); -+ loc = *curr; -+ gcc_assert (loc); -+ /* The same list can be referenced more than once. See if we have -+ already recorded the result from a previous pass. */ -+ if (loc->replaced) -+ *curr = loc->dw_loc_next; -+ else if (!loc->resolved_addr) - { -- if (!resolve_addr_in_expr ((*curr)->expr)) -+ /* As things stand, we do not expect or allow one die to -+ reference a suffix of another die's location list chain. -+ References must be identical or completely separate. -+ There is therefore no need to cache the result of this -+ pass on any list other than the first; doing so -+ would lead to unnecessary writes. */ -+ while (*curr) - { -- dw_loc_list_ref next = (*curr)->dw_loc_next; -- if (next && (*curr)->ll_symbol) -+ gcc_assert (!(*curr)->replaced && !(*curr)->resolved_addr); -+ if (!resolve_addr_in_expr ((*curr)->expr)) - { -- gcc_assert (!next->ll_symbol); -- next->ll_symbol = (*curr)->ll_symbol; -+ dw_loc_list_ref next = (*curr)->dw_loc_next; -+ if (next && (*curr)->ll_symbol) -+ { -+ gcc_assert (!next->ll_symbol); -+ next->ll_symbol = (*curr)->ll_symbol; -+ } -+ *curr = next; - } -- *curr = next; -+ else -+ curr = &(*curr)->dw_loc_next; - } -+ if (loc == *start) -+ loc->resolved_addr = 1; - else -- curr = &(*curr)->dw_loc_next; -+ { -+ loc->replaced = 1; -+ loc->dw_loc_next = *start; -+ } - } -- if (!AT_loc_list (a)) -+ if (!*start) - { - remove_AT (die, a->dw_attr); - ix--; -@@ -23359,6 +23460,7 @@ - add_location_or_const_value_attribute ( - VEC_index (deferred_locations, deferred_locations_list, i)->die, - VEC_index (deferred_locations, deferred_locations_list, i)->variable, -+ false, - DW_AT_location); - } - ---- a/src/gcc/expmed.c -+++ b/src/gcc/expmed.c -@@ -657,6 +657,10 @@ - && GET_MODE (value) != BLKmode - && bitsize > 0 - && GET_MODE_BITSIZE (op_mode) >= bitsize -+ /* Do not use insv for volatile bitfields when -+ -fstrict-volatile-bitfields is in effect. */ -+ && !(MEM_P (op0) && MEM_VOLATILE_P (op0) -+ && flag_strict_volatile_bitfields > 0) - && ! ((REG_P (op0) || GET_CODE (op0) == SUBREG) - && (bitsize + bitpos > GET_MODE_BITSIZE (op_mode))) - && insn_data[CODE_FOR_insv].operand[1].predicate (GEN_INT (bitsize), -@@ -700,19 +704,21 @@ - copy_back = true; - } - -- /* On big-endian machines, we count bits from the most significant. -- If the bit field insn does not, we must invert. */ -- -- if (BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN) -- xbitpos = unit - bitsize - xbitpos; -- - /* We have been counting XBITPOS within UNIT. - Count instead within the size of the register. */ -- if (BITS_BIG_ENDIAN && !MEM_P (xop0)) -+ if (BYTES_BIG_ENDIAN && !MEM_P (xop0)) - xbitpos += GET_MODE_BITSIZE (op_mode) - unit; - - unit = GET_MODE_BITSIZE (op_mode); - -+ /* If BITS_BIG_ENDIAN is zero on a BYTES_BIG_ENDIAN machine, we count -+ "backwards" from the size of the unit we are inserting into. -+ Otherwise, we count bits from the most significant on a -+ BYTES/BITS_BIG_ENDIAN machine. */ -+ -+ if (BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN) -+ xbitpos = unit - bitsize - xbitpos; -+ - /* Convert VALUE to op_mode (which insv insn wants) in VALUE1. */ - value1 = value; - if (GET_MODE (value) != op_mode) -@@ -1528,6 +1534,10 @@ - if (ext_mode != MAX_MACHINE_MODE - && bitsize > 0 - && GET_MODE_BITSIZE (ext_mode) >= bitsize -+ /* Do not use extv/extzv for volatile bitfields when -+ -fstrict-volatile-bitfields is in effect. */ -+ && !(MEM_P (op0) && MEM_VOLATILE_P (op0) -+ && flag_strict_volatile_bitfields > 0) - /* If op0 is a register, we need it in EXT_MODE to make it - acceptable to the format of ext(z)v. */ - && !(GET_CODE (op0) == SUBREG && GET_MODE (op0) != ext_mode) -@@ -1552,17 +1562,20 @@ - /* Get ref to first byte containing part of the field. */ - xop0 = adjust_address (xop0, byte_mode, xoffset); - -- /* On big-endian machines, we count bits from the most significant. -- If the bit field insn does not, we must invert. */ -- if (BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN) -- xbitpos = unit - bitsize - xbitpos; -- - /* Now convert from counting within UNIT to counting in EXT_MODE. */ -- if (BITS_BIG_ENDIAN && !MEM_P (xop0)) -+ if (BYTES_BIG_ENDIAN && !MEM_P (xop0)) - xbitpos += GET_MODE_BITSIZE (ext_mode) - unit; - - unit = GET_MODE_BITSIZE (ext_mode); - -+ /* If BITS_BIG_ENDIAN is zero on a BYTES_BIG_ENDIAN machine, we count -+ "backwards" from the size of the unit we are extracting from. -+ Otherwise, we count bits from the most significant on a -+ BYTES/BITS_BIG_ENDIAN machine. */ -+ -+ if (BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN) -+ xbitpos = unit - bitsize - xbitpos; -+ - if (xtarget == 0) - xtarget = xspec_target = gen_reg_rtx (tmode); - ---- a/src/gcc/expr.c -+++ b/src/gcc/expr.c -@@ -1497,7 +1497,7 @@ - if (nregs == 0) - return; - -- if (CONSTANT_P (x) && ! LEGITIMATE_CONSTANT_P (x)) -+ if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x)) - x = validize_mem (force_const_mem (mode, x)); - - /* See if the machine can do this with a load multiple insn. */ -@@ -2308,7 +2308,7 @@ - offset -= size; - - cst = (*constfun) (constfundata, offset, mode); -- if (!LEGITIMATE_CONSTANT_P (cst)) -+ if (!targetm.legitimate_constant_p (mode, cst)) - return 0; - - if (!reverse) -@@ -3363,7 +3363,7 @@ - - y_cst = y; - -- if (!LEGITIMATE_CONSTANT_P (y)) -+ if (!targetm.legitimate_constant_p (mode, y)) - { - y = force_const_mem (mode, y); - -@@ -3419,7 +3419,7 @@ - - REAL_VALUE_FROM_CONST_DOUBLE (r, y); - -- if (LEGITIMATE_CONSTANT_P (y)) -+ if (targetm.legitimate_constant_p (dstmode, y)) - oldcost = rtx_cost (y, SET, speed); - else - oldcost = rtx_cost (force_const_mem (dstmode, y), SET, speed); -@@ -3442,7 +3442,7 @@ - - trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode); - -- if (LEGITIMATE_CONSTANT_P (trunc_y)) -+ if (targetm.legitimate_constant_p (srcmode, trunc_y)) - { - /* Skip if the target needs extra instructions to perform - the extension. */ -@@ -3855,7 +3855,7 @@ - by setting SKIP to 0. */ - skip = (reg_parm_stack_space == 0) ? 0 : not_stack; - -- if (CONSTANT_P (x) && ! LEGITIMATE_CONSTANT_P (x)) -+ if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x)) - x = validize_mem (force_const_mem (mode, x)); - - /* If X is a hard register in a non-integer mode, copy it into a pseudo; -@@ -4866,16 +4866,136 @@ - return NULL_RTX; - } - -+/* Return true if field F of structure TYPE is a flexible array. */ -+ -+static bool -+flexible_array_member_p (const_tree f, const_tree type) -+{ -+ const_tree tf; -+ -+ tf = TREE_TYPE (f); -+ return (DECL_CHAIN (f) == NULL -+ && TREE_CODE (tf) == ARRAY_TYPE -+ && TYPE_DOMAIN (tf) -+ && TYPE_MIN_VALUE (TYPE_DOMAIN (tf)) -+ && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf))) -+ && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf)) -+ && int_size_in_bytes (type) >= 0); -+} -+ -+/* If FOR_CTOR_P, return the number of top-level elements that a constructor -+ must have in order for it to completely initialize a value of type TYPE. -+ Return -1 if the number isn't known. -+ -+ If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */ -+ -+static HOST_WIDE_INT -+count_type_elements (const_tree type, bool for_ctor_p) -+{ -+ switch (TREE_CODE (type)) -+ { -+ case ARRAY_TYPE: -+ { -+ tree nelts; -+ -+ nelts = array_type_nelts (type); -+ if (nelts && host_integerp (nelts, 1)) -+ { -+ unsigned HOST_WIDE_INT n; -+ -+ n = tree_low_cst (nelts, 1) + 1; -+ if (n == 0 || for_ctor_p) -+ return n; -+ else -+ return n * count_type_elements (TREE_TYPE (type), false); -+ } -+ return for_ctor_p ? -1 : 1; -+ } -+ -+ case RECORD_TYPE: -+ { -+ unsigned HOST_WIDE_INT n; -+ tree f; -+ -+ n = 0; -+ for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f)) -+ if (TREE_CODE (f) == FIELD_DECL) -+ { -+ if (!for_ctor_p) -+ n += count_type_elements (TREE_TYPE (f), false); -+ else if (!flexible_array_member_p (f, type)) -+ /* Don't count flexible arrays, which are not supposed -+ to be initialized. */ -+ n += 1; -+ } -+ -+ return n; -+ } -+ -+ case UNION_TYPE: -+ case QUAL_UNION_TYPE: -+ { -+ tree f; -+ HOST_WIDE_INT n, m; -+ -+ gcc_assert (!for_ctor_p); -+ /* Estimate the number of scalars in each field and pick the -+ maximum. Other estimates would do instead; the idea is simply -+ to make sure that the estimate is not sensitive to the ordering -+ of the fields. */ -+ n = 1; -+ for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f)) -+ if (TREE_CODE (f) == FIELD_DECL) -+ { -+ m = count_type_elements (TREE_TYPE (f), false); -+ /* If the field doesn't span the whole union, add an extra -+ scalar for the rest. */ -+ if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)), -+ TYPE_SIZE (type)) != 1) -+ m++; -+ if (n < m) -+ n = m; -+ } -+ return n; -+ } -+ -+ case COMPLEX_TYPE: -+ return 2; -+ -+ case VECTOR_TYPE: -+ return TYPE_VECTOR_SUBPARTS (type); -+ -+ case INTEGER_TYPE: -+ case REAL_TYPE: -+ case FIXED_POINT_TYPE: -+ case ENUMERAL_TYPE: -+ case BOOLEAN_TYPE: -+ case POINTER_TYPE: -+ case OFFSET_TYPE: -+ case REFERENCE_TYPE: -+ return 1; -+ -+ case ERROR_MARK: -+ return 0; -+ -+ case VOID_TYPE: -+ case METHOD_TYPE: -+ case FUNCTION_TYPE: -+ case LANG_TYPE: -+ default: -+ gcc_unreachable (); -+ } -+} -+ - /* Helper for categorize_ctor_elements. Identical interface. */ - - static bool - categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts, -- HOST_WIDE_INT *p_elt_count, -- bool *p_must_clear) -+ HOST_WIDE_INT *p_init_elts, bool *p_complete) - { - unsigned HOST_WIDE_INT idx; -- HOST_WIDE_INT nz_elts, elt_count; -- tree value, purpose; -+ HOST_WIDE_INT nz_elts, init_elts, num_fields; -+ tree value, purpose, elt_type; - - /* Whether CTOR is a valid constant initializer, in accordance with what - initializer_constant_valid_p does. If inferred from the constructor -@@ -4884,7 +5004,9 @@ - bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor); - - nz_elts = 0; -- elt_count = 0; -+ init_elts = 0; -+ num_fields = 0; -+ elt_type = NULL_TREE; - - FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value) - { -@@ -4899,6 +5021,8 @@ - mult = (tree_low_cst (hi_index, 1) - - tree_low_cst (lo_index, 1) + 1); - } -+ num_fields += mult; -+ elt_type = TREE_TYPE (value); - - switch (TREE_CODE (value)) - { -@@ -4906,11 +5030,11 @@ - { - HOST_WIDE_INT nz = 0, ic = 0; - -- bool const_elt_p -- = categorize_ctor_elements_1 (value, &nz, &ic, p_must_clear); -+ bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic, -+ p_complete); - - nz_elts += mult * nz; -- elt_count += mult * ic; -+ init_elts += mult * ic; - - if (const_from_elts_p && const_p) - const_p = const_elt_p; -@@ -4922,12 +5046,12 @@ - case FIXED_CST: - if (!initializer_zerop (value)) - nz_elts += mult; -- elt_count += mult; -+ init_elts += mult; - break; - - case STRING_CST: - nz_elts += mult * TREE_STRING_LENGTH (value); -- elt_count += mult * TREE_STRING_LENGTH (value); -+ init_elts += mult * TREE_STRING_LENGTH (value); - break; - - case COMPLEX_CST: -@@ -4935,7 +5059,7 @@ - nz_elts += mult; - if (!initializer_zerop (TREE_IMAGPART (value))) - nz_elts += mult; -- elt_count += mult; -+ init_elts += mult; - break; - - case VECTOR_CST: -@@ -4945,65 +5069,31 @@ - { - if (!initializer_zerop (TREE_VALUE (v))) - nz_elts += mult; -- elt_count += mult; -+ init_elts += mult; - } - } - break; - - default: - { -- HOST_WIDE_INT tc = count_type_elements (TREE_TYPE (value), true); -- if (tc < 1) -- tc = 1; -+ HOST_WIDE_INT tc = count_type_elements (elt_type, false); - nz_elts += mult * tc; -- elt_count += mult * tc; -+ init_elts += mult * tc; - - if (const_from_elts_p && const_p) -- const_p = initializer_constant_valid_p (value, TREE_TYPE (value)) -+ const_p = initializer_constant_valid_p (value, elt_type) - != NULL_TREE; - } - break; - } - } - -- if (!*p_must_clear -- && (TREE_CODE (TREE_TYPE (ctor)) == UNION_TYPE -- || TREE_CODE (TREE_TYPE (ctor)) == QUAL_UNION_TYPE)) -- { -- tree init_sub_type; -- bool clear_this = true; -- -- if (!VEC_empty (constructor_elt, CONSTRUCTOR_ELTS (ctor))) -- { -- /* We don't expect more than one element of the union to be -- initialized. Not sure what we should do otherwise... */ -- gcc_assert (VEC_length (constructor_elt, CONSTRUCTOR_ELTS (ctor)) -- == 1); -- -- init_sub_type = TREE_TYPE (VEC_index (constructor_elt, -- CONSTRUCTOR_ELTS (ctor), -- 0)->value); -- -- /* ??? We could look at each element of the union, and find the -- largest element. Which would avoid comparing the size of the -- initialized element against any tail padding in the union. -- Doesn't seem worth the effort... */ -- if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (ctor)), -- TYPE_SIZE (init_sub_type)) == 1) -- { -- /* And now we have to find out if the element itself is fully -- constructed. E.g. for union { struct { int a, b; } s; } u -- = { .s = { .a = 1 } }. */ -- if (elt_count == count_type_elements (init_sub_type, false)) -- clear_this = false; -- } -- } -- -- *p_must_clear = clear_this; -- } -+ if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor), -+ num_fields, elt_type)) -+ *p_complete = false; - - *p_nz_elts += nz_elts; -- *p_elt_count += elt_count; -+ *p_init_elts += init_elts; - - return const_p; - } -@@ -5013,111 +5103,50 @@ - and place it in *P_NZ_ELTS; - * how many scalar fields in total are in CTOR, - and place it in *P_ELT_COUNT. -- * if a type is a union, and the initializer from the constructor -- is not the largest element in the union, then set *p_must_clear. -+ * whether the constructor is complete -- in the sense that every -+ meaningful byte is explicitly given a value -- -+ and place it in *P_COMPLETE. - - Return whether or not CTOR is a valid static constant initializer, the same - as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */ - - bool - categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts, -- HOST_WIDE_INT *p_elt_count, -- bool *p_must_clear) -+ HOST_WIDE_INT *p_init_elts, bool *p_complete) - { - *p_nz_elts = 0; -- *p_elt_count = 0; -- *p_must_clear = false; -+ *p_init_elts = 0; -+ *p_complete = true; - -- return -- categorize_ctor_elements_1 (ctor, p_nz_elts, p_elt_count, p_must_clear); -+ return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete); - } - --/* Count the number of scalars in TYPE. Return -1 on overflow or -- variable-sized. If ALLOW_FLEXARR is true, don't count flexible -- array member at the end of the structure. */ -+/* TYPE is initialized by a constructor with NUM_ELTS elements, the last -+ of which had type LAST_TYPE. Each element was itself a complete -+ initializer, in the sense that every meaningful byte was explicitly -+ given a value. Return true if the same is true for the constructor -+ as a whole. */ - --HOST_WIDE_INT --count_type_elements (const_tree type, bool allow_flexarr) -+bool -+complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts, -+ const_tree last_type) - { -- const HOST_WIDE_INT max = ~((HOST_WIDE_INT)1 << (HOST_BITS_PER_WIDE_INT-1)); -- switch (TREE_CODE (type)) -+ if (TREE_CODE (type) == UNION_TYPE -+ || TREE_CODE (type) == QUAL_UNION_TYPE) - { -- case ARRAY_TYPE: -- { -- tree telts = array_type_nelts (type); -- if (telts && host_integerp (telts, 1)) -- { -- HOST_WIDE_INT n = tree_low_cst (telts, 1) + 1; -- HOST_WIDE_INT m = count_type_elements (TREE_TYPE (type), false); -- if (n == 0) -- return 0; -- else if (max / n > m) -- return n * m; -- } -- return -1; -- } -- -- case RECORD_TYPE: -- { -- HOST_WIDE_INT n = 0, t; -- tree f; -- -- for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f)) -- if (TREE_CODE (f) == FIELD_DECL) -- { -- t = count_type_elements (TREE_TYPE (f), false); -- if (t < 0) -- { -- /* Check for structures with flexible array member. */ -- tree tf = TREE_TYPE (f); -- if (allow_flexarr -- && DECL_CHAIN (f) == NULL -- && TREE_CODE (tf) == ARRAY_TYPE -- && TYPE_DOMAIN (tf) -- && TYPE_MIN_VALUE (TYPE_DOMAIN (tf)) -- && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf))) -- && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf)) -- && int_size_in_bytes (type) >= 0) -- break; -- -- return -1; -- } -- n += t; -- } -- -- return n; -- } -- -- case UNION_TYPE: -- case QUAL_UNION_TYPE: -- return -1; -- -- case COMPLEX_TYPE: -- return 2; -- -- case VECTOR_TYPE: -- return TYPE_VECTOR_SUBPARTS (type); -- -- case INTEGER_TYPE: -- case REAL_TYPE: -- case FIXED_POINT_TYPE: -- case ENUMERAL_TYPE: -- case BOOLEAN_TYPE: -- case POINTER_TYPE: -- case OFFSET_TYPE: -- case REFERENCE_TYPE: -- return 1; -+ if (num_elts == 0) -+ return false; - -- case ERROR_MARK: -- return 0; -+ gcc_assert (num_elts == 1 && last_type); - -- case VOID_TYPE: -- case METHOD_TYPE: -- case FUNCTION_TYPE: -- case LANG_TYPE: -- default: -- gcc_unreachable (); -+ /* ??? We could look at each element of the union, and find the -+ largest element. Which would avoid comparing the size of the -+ initialized element against any tail padding in the union. -+ Doesn't seem worth the effort... */ -+ return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1; - } -+ -+ return count_type_elements (type, true) == num_elts; - } - - /* Return 1 if EXP contains mostly (3/4) zeros. */ -@@ -5126,18 +5155,12 @@ - mostly_zeros_p (const_tree exp) - { - if (TREE_CODE (exp) == CONSTRUCTOR) -- - { -- HOST_WIDE_INT nz_elts, count, elts; -- bool must_clear; -- -- categorize_ctor_elements (exp, &nz_elts, &count, &must_clear); -- if (must_clear) -- return 1; -- -- elts = count_type_elements (TREE_TYPE (exp), false); -+ HOST_WIDE_INT nz_elts, init_elts; -+ bool complete_p; - -- return nz_elts < elts / 4; -+ categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p); -+ return !complete_p || nz_elts < init_elts / 4; - } - - return initializer_zerop (exp); -@@ -5149,12 +5172,11 @@ - all_zeros_p (const_tree exp) - { - if (TREE_CODE (exp) == CONSTRUCTOR) -- - { -- HOST_WIDE_INT nz_elts, count; -- bool must_clear; -+ HOST_WIDE_INT nz_elts, init_elts; -+ bool complete_p; - -- categorize_ctor_elements (exp, &nz_elts, &count, &must_clear); -+ categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p); - return nz_elts == 0; - } - -@@ -7666,18 +7688,16 @@ - { - enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0)); - this_optab = usmul_widen_optab; -- if (mode == GET_MODE_2XWIDER_MODE (innermode)) -+ if (find_widening_optab_handler (this_optab, mode, innermode, 0) -+ != CODE_FOR_nothing) - { -- if (optab_handler (this_optab, mode) != CODE_FOR_nothing) -- { -- if (TYPE_UNSIGNED (TREE_TYPE (treeop0))) -- expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, -- EXPAND_NORMAL); -- else -- expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0, -- EXPAND_NORMAL); -- goto binop3; -- } -+ if (TYPE_UNSIGNED (TREE_TYPE (treeop0))) -+ expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, -+ EXPAND_NORMAL); -+ else -+ expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0, -+ EXPAND_NORMAL); -+ goto binop3; - } - } - /* Check for a multiplication with matching signedness. */ -@@ -7692,10 +7712,10 @@ - optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab; - this_optab = zextend_p ? umul_widen_optab : smul_widen_optab; - -- if (mode == GET_MODE_2XWIDER_MODE (innermode) -- && TREE_CODE (treeop0) != INTEGER_CST) -+ if (TREE_CODE (treeop0) != INTEGER_CST) - { -- if (optab_handler (this_optab, mode) != CODE_FOR_nothing) -+ if (find_widening_optab_handler (this_optab, mode, innermode, 0) -+ != CODE_FOR_nothing) - { - expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, - EXPAND_NORMAL); -@@ -7703,7 +7723,8 @@ - unsignedp, this_optab); - return REDUCE_BIT_FIELD (temp); - } -- if (optab_handler (other_optab, mode) != CODE_FOR_nothing -+ if (find_widening_optab_handler (other_optab, mode, innermode, 0) -+ != CODE_FOR_nothing - && innermode == word_mode) - { - rtx htem, hipart; -@@ -8269,6 +8290,19 @@ - return target; - } - -+ case VEC_WIDEN_LSHIFT_HI_EXPR: -+ case VEC_WIDEN_LSHIFT_LO_EXPR: -+ { -+ tree oprnd0 = treeop0; -+ tree oprnd1 = treeop1; -+ -+ expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL); -+ target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX, -+ target, unsignedp); -+ gcc_assert (target); -+ return target; -+ } -+ - case VEC_PACK_TRUNC_EXPR: - case VEC_PACK_SAT_EXPR: - case VEC_PACK_FIX_TRUNC_EXPR: -@@ -8545,10 +8579,13 @@ - if (code == SSA_NAME - && (g = SSA_NAME_DEF_STMT (ssa_name)) - && gimple_code (g) == GIMPLE_CALL) -- pmode = promote_function_mode (type, mode, &unsignedp, -- TREE_TYPE -- (TREE_TYPE (gimple_call_fn (g))), -- 2); -+ { -+ gcc_assert (!gimple_call_internal_p (g)); -+ pmode = promote_function_mode (type, mode, &unsignedp, -+ TREE_TYPE -+ (TREE_TYPE (gimple_call_fn (g))), -+ 2); -+ } - else - pmode = promote_decl_mode (exp, &unsignedp); - gcc_assert (GET_MODE (decl_rtl) == pmode); -@@ -9108,7 +9145,7 @@ - constant and we don't need a memory reference. */ - if (CONSTANT_P (op0) - && mode2 != BLKmode -- && LEGITIMATE_CONSTANT_P (op0) -+ && targetm.legitimate_constant_p (mode2, op0) - && !must_force_mem) - op0 = force_reg (mode2, op0); - -@@ -9189,8 +9226,11 @@ - && modifier != EXPAND_CONST_ADDRESS - && modifier != EXPAND_INITIALIZER) - /* If the field is volatile, we always want an aligned -- access. */ -- || (volatilep && flag_strict_volatile_bitfields > 0) -+ access. Only do this if the access is not already naturally -+ aligned, otherwise "normal" (non-bitfield) volatile fields -+ become non-addressable. */ -+ || (volatilep && flag_strict_volatile_bitfields > 0 -+ && (bitpos % GET_MODE_ALIGNMENT (mode) != 0)) - /* If the field isn't aligned enough to fetch as a memref, - fetch it as a bit field. */ - || (mode1 != BLKmode ---- a/src/gcc/fold-const.c -+++ b/src/gcc/fold-const.c -@@ -9232,15 +9232,10 @@ - 0 <= N < M as is common. In general, the precise value of P is unknown. - M is chosen as large as possible such that constant N can be determined. - -- Returns M and sets *RESIDUE to N. -- -- If ALLOW_FUNC_ALIGN is true, do take functions' DECL_ALIGN_UNIT into -- account. This is not always possible due to PR 35705. -- */ -+ Returns M and sets *RESIDUE to N. */ - - static unsigned HOST_WIDE_INT --get_pointer_modulus_and_residue (tree expr, unsigned HOST_WIDE_INT *residue, -- bool allow_func_align) -+get_pointer_modulus_and_residue (tree expr, unsigned HOST_WIDE_INT *residue) - { - enum tree_code code; - -@@ -9270,9 +9265,8 @@ - } - } - -- if (DECL_P (expr) -- && (allow_func_align || TREE_CODE (expr) != FUNCTION_DECL)) -- return DECL_ALIGN_UNIT (expr); -+ if (DECL_P (expr)) -+ return get_object_alignment (expr, ~0U) / BITS_PER_UNIT; - } - else if (code == POINTER_PLUS_EXPR) - { -@@ -9282,8 +9276,7 @@ - - op0 = TREE_OPERAND (expr, 0); - STRIP_NOPS (op0); -- modulus = get_pointer_modulus_and_residue (op0, residue, -- allow_func_align); -+ modulus = get_pointer_modulus_and_residue (op0, residue); - - op1 = TREE_OPERAND (expr, 1); - STRIP_NOPS (op1); -@@ -11163,8 +11156,7 @@ - unsigned HOST_WIDE_INT modulus, residue; - unsigned HOST_WIDE_INT low = TREE_INT_CST_LOW (arg1); - -- modulus = get_pointer_modulus_and_residue (arg0, &residue, -- integer_onep (arg1)); -+ modulus = get_pointer_modulus_and_residue (arg0, &residue); - - /* This works because modulus is a power of 2. If this weren't the - case, we'd have to replace it by its greatest power-of-2 ---- a/src/gcc/fortran/ChangeLog -+++ b/src/gcc/fortran/ChangeLog -@@ -1,3 +1,18 @@ -+2011-11-25 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/50408 -+ * trans-decl.c (gfc_get_module_backend_decl): Also copy -+ ts.u.derived from the gsym if the ts.type is BT_CLASS. -+ (gfc_get_extern_function_decl): Copy also the backend_decl -+ for the symbol's ts.u.{derived,cl} from the gsym. -+ * trans-types.c (gfc_copy_dt_decls_ifequal): Directly -+ return if "from" and "to" are the same. -+ -+2011-11-24 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/51218 -+ * gfortran.dg/implicit_pure_1.f90: New. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/gcc/fortran/resolve.c -+++ b/src/gcc/fortran/resolve.c -@@ -3132,10 +3132,10 @@ - "procedure within a PURE procedure", name, &expr->where); - t = FAILURE; - } -- } - -- if (!pure_function (expr, &name) && name && gfc_implicit_pure (NULL)) -- gfc_current_ns->proc_name->attr.implicit_pure = 0; -+ if (gfc_implicit_pure (NULL)) -+ gfc_current_ns->proc_name->attr.implicit_pure = 0; -+ } - - /* Functions without the RECURSIVE attribution are not allowed to - * call themselves. */ -@@ -3195,6 +3195,9 @@ - else if (gfc_pure (NULL)) - gfc_error ("Subroutine call to '%s' at %L is not PURE", sym->name, - &c->loc); -+ -+ if (gfc_implicit_pure (NULL)) -+ gfc_current_ns->proc_name->attr.implicit_pure = 0; - } - - ---- a/src/gcc/fortran/trans-decl.c -+++ b/src/gcc/fortran/trans-decl.c -@@ -677,7 +677,7 @@ - } - else if (s->backend_decl) - { -- if (sym->ts.type == BT_DERIVED) -+ if (sym->ts.type == BT_DERIVED || sym->ts.type == BT_CLASS) - gfc_copy_dt_decls_ifequal (s->ts.u.derived, sym->ts.u.derived, - true); - else if (sym->ts.type == BT_CHARACTER) -@@ -1602,6 +1602,11 @@ - gfc_find_symbol (sym->name, gsym->ns, 0, &s); - if (s && s->backend_decl) - { -+ if (sym->ts.type == BT_DERIVED || sym->ts.type == BT_CLASS) -+ gfc_copy_dt_decls_ifequal (s->ts.u.derived, sym->ts.u.derived, -+ true); -+ else if (sym->ts.type == BT_CHARACTER) -+ sym->ts.u.cl->backend_decl = s->ts.u.cl->backend_decl; - sym->backend_decl = s->backend_decl; - return sym->backend_decl; - } ---- a/src/gcc/fortran/trans-types.c -+++ b/src/gcc/fortran/trans-types.c -@@ -2092,6 +2092,9 @@ - gfc_component *to_cm; - gfc_component *from_cm; - -+ if (from == to) -+ return 1; -+ - if (from->backend_decl == NULL - || !gfc_compare_derived_types (from, to)) - return 0; ---- a/src/gcc/gengtype-lex.c -+++ b/src/gcc/gengtype-lex.c -@@ -55,7 +55,6 @@ - typedef unsigned char flex_uint8_t; - typedef unsigned short int flex_uint16_t; - typedef unsigned int flex_uint32_t; --#endif /* ! C99 */ - - /* Limits of integral types. */ - #ifndef INT8_MIN -@@ -86,6 +85,8 @@ - #define UINT32_MAX (4294967295U) - #endif - -+#endif /* ! C99 */ -+ - #endif /* ! FLEXINT_H */ - - #ifdef __cplusplus -@@ -142,7 +143,15 @@ - - /* Size of default input buffer. */ - #ifndef YY_BUF_SIZE -+#ifdef __ia64__ -+/* On IA-64, the buffer size is 16k, not 8k. -+ * Moreover, YY_BUF_SIZE is 2*YY_READ_BUF_SIZE in the general case. -+ * Ditto for the __ia64__ case accordingly. -+ */ -+#define YY_BUF_SIZE 32768 -+#else - #define YY_BUF_SIZE 16384 -+#endif /* __ia64__ */ - #endif - - /* The state buf must be large enough to hold one state per character in the main buffer. -@@ -942,7 +951,7 @@ - #define YY_MORE_ADJ 0 - #define YY_RESTORE_YY_MORE_OFFSET - char *yytext; --#line 1 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 1 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - /* -*- indented-text -*- */ - /* Process source files and output type information. - Copyright (C) 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010 -@@ -964,7 +973,7 @@ - along with GCC; see the file COPYING3. If not see - <http://www.gnu.org/licenses/>. */ - #define YY_NO_INPUT 1 --#line 25 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 25 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - #include "bconfig.h" - #include "system.h" - -@@ -988,7 +997,7 @@ - } - - --#line 991 "gengtype-lex.c" -+#line 1000 "gengtype-lex.c" - - #define INITIAL 0 - #define in_struct 1 -@@ -1070,7 +1079,12 @@ - - /* Amount of stuff to slurp up with each read. */ - #ifndef YY_READ_BUF_SIZE -+#ifdef __ia64__ -+/* On IA-64, the buffer size is 16k, not 8k */ -+#define YY_READ_BUF_SIZE 16384 -+#else - #define YY_READ_BUF_SIZE 8192 -+#endif /* __ia64__ */ - #endif - - /* Copy whatever the last rule matched to the standard output. */ -@@ -1089,7 +1103,7 @@ - if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \ - { \ - int c = '*'; \ -- unsigned n; \ -+ size_t n; \ - for ( n = 0; n < max_size && \ - (c = getc( yyin )) != EOF && c != '\n'; ++n ) \ - buf[n] = (char) c; \ -@@ -1174,7 +1188,7 @@ - register char *yy_cp, *yy_bp; - register int yy_act; - --#line 59 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 59 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - - /* Do this on entry to yylex(): */ - *yylval = 0; -@@ -1185,7 +1199,7 @@ - } - - /* Things we look for in skipping mode: */ --#line 1188 "gengtype-lex.c" -+#line 1202 "gengtype-lex.c" - - if ( !(yy_init) ) - { -@@ -1271,7 +1285,7 @@ - (yy_c_buf_p) = yy_cp -= 1; - YY_DO_BEFORE_ACTION; /* set up yytext again */ - YY_RULE_SETUP --#line 70 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 70 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { - BEGIN(in_struct); - return TYPEDEF; -@@ -1283,7 +1297,7 @@ - (yy_c_buf_p) = yy_cp -= 1; - YY_DO_BEFORE_ACTION; /* set up yytext again */ - YY_RULE_SETUP --#line 74 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 74 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { - BEGIN(in_struct); - return STRUCT; -@@ -1295,7 +1309,7 @@ - (yy_c_buf_p) = yy_cp -= 1; - YY_DO_BEFORE_ACTION; /* set up yytext again */ - YY_RULE_SETUP --#line 78 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 78 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { - BEGIN(in_struct); - return UNION; -@@ -1307,7 +1321,7 @@ - (yy_c_buf_p) = yy_cp -= 1; - YY_DO_BEFORE_ACTION; /* set up yytext again */ - YY_RULE_SETUP --#line 82 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 82 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { - BEGIN(in_struct); - return EXTERN; -@@ -1319,7 +1333,7 @@ - (yy_c_buf_p) = yy_cp -= 1; - YY_DO_BEFORE_ACTION; /* set up yytext again */ - YY_RULE_SETUP --#line 86 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 86 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { - BEGIN(in_struct); - return STATIC; -@@ -1331,7 +1345,7 @@ - (yy_c_buf_p) = yy_cp -= 1; - YY_DO_BEFORE_ACTION; /* set up yytext again */ - YY_RULE_SETUP --#line 91 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 91 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { - BEGIN(in_struct); - return DEFVEC_OP; -@@ -1343,7 +1357,7 @@ - (yy_c_buf_p) = yy_cp -= 1; - YY_DO_BEFORE_ACTION; /* set up yytext again */ - YY_RULE_SETUP --#line 95 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 95 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { - BEGIN(in_struct); - return DEFVEC_I; -@@ -1355,7 +1369,7 @@ - (yy_c_buf_p) = yy_cp -= 1; - YY_DO_BEFORE_ACTION; /* set up yytext again */ - YY_RULE_SETUP --#line 99 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 99 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { - BEGIN(in_struct); - return DEFVEC_ALLOC; -@@ -1365,19 +1379,19 @@ - - case 9: - YY_RULE_SETUP --#line 107 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 107 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { BEGIN(in_struct_comment); } - YY_BREAK - case 10: - /* rule 10 can match eol */ - YY_RULE_SETUP --#line 109 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 109 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { update_lineno (yytext, yyleng); } - YY_BREAK - case 11: - /* rule 11 can match eol */ - YY_RULE_SETUP --#line 110 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 110 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { lexer_line.line++; } - YY_BREAK - case 12: -@@ -1386,7 +1400,7 @@ - (yy_c_buf_p) = yy_cp = yy_bp + 5; - YY_DO_BEFORE_ACTION; /* set up yytext again */ - YY_RULE_SETUP --#line 112 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 112 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - /* don't care */ - YY_BREAK - case 13: -@@ -1395,7 +1409,7 @@ - (yy_c_buf_p) = yy_cp = yy_bp + 3; - YY_DO_BEFORE_ACTION; /* set up yytext again */ - YY_RULE_SETUP --#line 113 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 113 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { return GTY_TOKEN; } - YY_BREAK - case 14: -@@ -1404,7 +1418,7 @@ - (yy_c_buf_p) = yy_cp = yy_bp + 3; - YY_DO_BEFORE_ACTION; /* set up yytext again */ - YY_RULE_SETUP --#line 114 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 114 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { return VEC_TOKEN; } - YY_BREAK - case 15: -@@ -1413,7 +1427,7 @@ - (yy_c_buf_p) = yy_cp = yy_bp + 5; - YY_DO_BEFORE_ACTION; /* set up yytext again */ - YY_RULE_SETUP --#line 115 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 115 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { return UNION; } - YY_BREAK - case 16: -@@ -1422,7 +1436,7 @@ - (yy_c_buf_p) = yy_cp = yy_bp + 6; - YY_DO_BEFORE_ACTION; /* set up yytext again */ - YY_RULE_SETUP --#line 116 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 116 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { return STRUCT; } - YY_BREAK - case 17: -@@ -1431,7 +1445,7 @@ - (yy_c_buf_p) = yy_cp = yy_bp + 4; - YY_DO_BEFORE_ACTION; /* set up yytext again */ - YY_RULE_SETUP --#line 117 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 117 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { return ENUM; } - YY_BREAK - case 18: -@@ -1440,7 +1454,7 @@ - (yy_c_buf_p) = yy_cp = yy_bp + 9; - YY_DO_BEFORE_ACTION; /* set up yytext again */ - YY_RULE_SETUP --#line 118 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 118 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { return PTR_ALIAS; } - YY_BREAK - case 19: -@@ -1449,12 +1463,12 @@ - (yy_c_buf_p) = yy_cp = yy_bp + 10; - YY_DO_BEFORE_ACTION; /* set up yytext again */ - YY_RULE_SETUP --#line 119 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 119 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { return NESTED_PTR; } - YY_BREAK - case 20: - YY_RULE_SETUP --#line 120 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 120 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { return NUM; } - YY_BREAK - case 21: -@@ -1463,7 +1477,7 @@ - (yy_c_buf_p) = yy_cp -= 1; - YY_DO_BEFORE_ACTION; /* set up yytext again */ - YY_RULE_SETUP --#line 121 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 121 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { - *yylval = XDUPVAR (const char, yytext, yyleng, yyleng+1); - return PARAM_IS; -@@ -1474,11 +1488,11 @@ - *yy_cp = (yy_hold_char); /* undo effects of setting up yytext */ - (yy_c_buf_p) = yy_cp -= 1; - YY_DO_BEFORE_ACTION; /* set up yytext again */ --#line 127 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 127 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - case 23: - /* rule 23 can match eol */ - YY_RULE_SETUP --#line 127 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 127 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { - size_t len; - -@@ -1496,7 +1510,7 @@ - (yy_c_buf_p) = yy_cp -= 1; - YY_DO_BEFORE_ACTION; /* set up yytext again */ - YY_RULE_SETUP --#line 139 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 139 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { - *yylval = XDUPVAR (const char, yytext, yyleng, yyleng+1); - return ID; -@@ -1505,7 +1519,7 @@ - case 25: - /* rule 25 can match eol */ - YY_RULE_SETUP --#line 144 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 144 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { - *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng-1); - return STRING; -@@ -1515,7 +1529,7 @@ - case 26: - /* rule 26 can match eol */ - YY_RULE_SETUP --#line 149 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 149 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { - *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng-1); - return ARRAY; -@@ -1524,7 +1538,7 @@ - case 27: - /* rule 27 can match eol */ - YY_RULE_SETUP --#line 153 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 153 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { - *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng); - return CHAR; -@@ -1532,24 +1546,24 @@ - YY_BREAK - case 28: - YY_RULE_SETUP --#line 158 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 158 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { return ELLIPSIS; } - YY_BREAK - case 29: - YY_RULE_SETUP --#line 159 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 159 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { return yytext[0]; } - YY_BREAK - /* ignore pp-directives */ - case 30: - /* rule 30 can match eol */ - YY_RULE_SETUP --#line 162 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 162 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - {lexer_line.line++;} - YY_BREAK - case 31: - YY_RULE_SETUP --#line 164 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 164 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { - error_at_line (&lexer_line, "unexpected character `%s'", yytext); - } -@@ -1557,30 +1571,30 @@ - - case 32: - YY_RULE_SETUP --#line 169 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 169 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { BEGIN(in_comment); } - YY_BREAK - case 33: - /* rule 33 can match eol */ - YY_RULE_SETUP --#line 170 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 170 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { lexer_line.line++; } - YY_BREAK - case 34: --#line 172 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 172 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - case 35: - /* rule 35 can match eol */ --#line 173 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 173 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - case 36: - /* rule 36 can match eol */ - YY_RULE_SETUP --#line 173 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 173 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - /* do nothing */ - YY_BREAK - case 37: - /* rule 37 can match eol */ - YY_RULE_SETUP --#line 174 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 174 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { update_lineno (yytext, yyleng); } - YY_BREAK - case 38: -@@ -1589,21 +1603,21 @@ - (yy_c_buf_p) = yy_cp = yy_bp + 1; - YY_DO_BEFORE_ACTION; /* set up yytext again */ - YY_RULE_SETUP --#line 175 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 175 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - /* do nothing */ - YY_BREAK - - case 39: - /* rule 39 can match eol */ - YY_RULE_SETUP --#line 178 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 178 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { lexer_line.line++; } - YY_BREAK - case 40: --#line 180 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 180 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - case 41: - YY_RULE_SETUP --#line 180 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 180 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - /* do nothing */ - YY_BREAK - case 42: -@@ -1612,25 +1626,25 @@ - (yy_c_buf_p) = yy_cp = yy_bp + 1; - YY_DO_BEFORE_ACTION; /* set up yytext again */ - YY_RULE_SETUP --#line 181 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 181 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - /* do nothing */ - YY_BREAK - - case 43: - YY_RULE_SETUP --#line 183 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 183 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { BEGIN(INITIAL); } - YY_BREAK - case 44: - YY_RULE_SETUP --#line 184 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 184 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { BEGIN(in_struct); } - YY_BREAK - case 45: --#line 187 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 187 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - case 46: - YY_RULE_SETUP --#line 187 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 187 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - { - error_at_line (&lexer_line, - "unterminated comment or string; unexpected EOF"); -@@ -1639,15 +1653,15 @@ - case 47: - /* rule 47 can match eol */ - YY_RULE_SETUP --#line 192 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 192 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - /* do nothing */ - YY_BREAK - case 48: - YY_RULE_SETUP --#line 194 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 194 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - YY_FATAL_ERROR( "flex scanner jammed" ); - YY_BREAK --#line 1650 "gengtype-lex.c" -+#line 1664 "gengtype-lex.c" - case YY_STATE_EOF(INITIAL): - case YY_STATE_EOF(in_struct): - case YY_STATE_EOF(in_struct_comment): -@@ -2371,8 +2385,8 @@ - - /** Setup the input buffer state to scan the given bytes. The next call to yylex() will - * scan from a @e copy of @a bytes. -- * @param bytes the byte buffer to scan -- * @param len the number of bytes in the buffer pointed to by @a bytes. -+ * @param yybytes the byte buffer to scan -+ * @param _yybytes_len the number of bytes in the buffer pointed to by @a bytes. - * - * @return the newly allocated buffer state object. - */ -@@ -2611,7 +2625,7 @@ - - #define YYTABLES_NAME "yytables" - --#line 194 "/d/gcc-4.6.2/gcc-4.6.2/gcc/gengtype-lex.l" -+#line 194 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2011.12/gcc/gengtype-lex.l" - - - ---- a/src/gcc/genopinit.c -+++ b/src/gcc/genopinit.c -@@ -46,10 +46,12 @@ - used. $A and $B are replaced with the full name of the mode; $a and $b - are replaced with the short form of the name, as above. - -- If $N is present in the pattern, it means the two modes must be consecutive -- widths in the same mode class (e.g, QImode and HImode). $I means that -- only full integer modes should be considered for the next mode, and $F -- means that only float modes should be considered. -+ If $N is present in the pattern, it means the two modes must be in -+ the same mode class, and $b must be greater than $a (e.g, QImode -+ and HImode). -+ -+ $I means that only full integer modes should be considered for the -+ next mode, and $F means that only float modes should be considered. - $P means that both full and partial integer modes should be considered. - $Q means that only fixed-point modes should be considered. - -@@ -74,6 +76,8 @@ - "set_convert_optab_handler (fractuns_optab, $B, $A, CODE_FOR_$(fractuns$Q$a$I$b2$))", - "set_convert_optab_handler (satfract_optab, $B, $A, CODE_FOR_$(satfract$a$Q$b2$))", - "set_convert_optab_handler (satfractuns_optab, $B, $A, CODE_FOR_$(satfractuns$I$a$Q$b2$))", -+ "set_convert_optab_handler (vec_load_lanes_optab, $A, $B, CODE_FOR_$(vec_load_lanes$a$b$))", -+ "set_convert_optab_handler (vec_store_lanes_optab, $A, $B, CODE_FOR_$(vec_store_lanes$a$b$))", - "set_optab_handler (add_optab, $A, CODE_FOR_$(add$P$a3$))", - "set_optab_handler (addv_optab, $A, CODE_FOR_$(add$F$a3$)),\n\ - set_optab_handler (add_optab, $A, CODE_FOR_$(add$F$a3$))", -@@ -97,17 +101,17 @@ - "set_optab_handler (smulv_optab, $A, CODE_FOR_$(mulv$I$a3$))", - "set_optab_handler (umul_highpart_optab, $A, CODE_FOR_$(umul$a3_highpart$))", - "set_optab_handler (smul_highpart_optab, $A, CODE_FOR_$(smul$a3_highpart$))", -- "set_optab_handler (smul_widen_optab, $B, CODE_FOR_$(mul$a$b3$)$N)", -- "set_optab_handler (umul_widen_optab, $B, CODE_FOR_$(umul$a$b3$)$N)", -- "set_optab_handler (usmul_widen_optab, $B, CODE_FOR_$(usmul$a$b3$)$N)", -- "set_optab_handler (smadd_widen_optab, $B, CODE_FOR_$(madd$a$b4$)$N)", -- "set_optab_handler (umadd_widen_optab, $B, CODE_FOR_$(umadd$a$b4$)$N)", -- "set_optab_handler (ssmadd_widen_optab, $B, CODE_FOR_$(ssmadd$a$b4$)$N)", -- "set_optab_handler (usmadd_widen_optab, $B, CODE_FOR_$(usmadd$a$b4$)$N)", -- "set_optab_handler (smsub_widen_optab, $B, CODE_FOR_$(msub$a$b4$)$N)", -- "set_optab_handler (umsub_widen_optab, $B, CODE_FOR_$(umsub$a$b4$)$N)", -- "set_optab_handler (ssmsub_widen_optab, $B, CODE_FOR_$(ssmsub$a$b4$)$N)", -- "set_optab_handler (usmsub_widen_optab, $B, CODE_FOR_$(usmsub$a$b4$)$N)", -+ "set_widening_optab_handler (smul_widen_optab, $B, $A, CODE_FOR_$(mul$a$b3$)$N)", -+ "set_widening_optab_handler (umul_widen_optab, $B, $A, CODE_FOR_$(umul$a$b3$)$N)", -+ "set_widening_optab_handler (usmul_widen_optab, $B, $A, CODE_FOR_$(usmul$a$b3$)$N)", -+ "set_widening_optab_handler (smadd_widen_optab, $B, $A, CODE_FOR_$(madd$a$b4$)$N)", -+ "set_widening_optab_handler (umadd_widen_optab, $B, $A, CODE_FOR_$(umadd$a$b4$)$N)", -+ "set_widening_optab_handler (ssmadd_widen_optab, $B, $A, CODE_FOR_$(ssmadd$a$b4$)$N)", -+ "set_widening_optab_handler (usmadd_widen_optab, $B, $A, CODE_FOR_$(usmadd$a$b4$)$N)", -+ "set_widening_optab_handler (smsub_widen_optab, $B, $A, CODE_FOR_$(msub$a$b4$)$N)", -+ "set_widening_optab_handler (umsub_widen_optab, $B, $A, CODE_FOR_$(umsub$a$b4$)$N)", -+ "set_widening_optab_handler (ssmsub_widen_optab, $B, $A, CODE_FOR_$(ssmsub$a$b4$)$N)", -+ "set_widening_optab_handler (usmsub_widen_optab, $B, $A, CODE_FOR_$(usmsub$a$b4$)$N)", - "set_optab_handler (sdiv_optab, $A, CODE_FOR_$(div$a3$))", - "set_optab_handler (ssdiv_optab, $A, CODE_FOR_$(ssdiv$Q$a3$))", - "set_optab_handler (sdivv_optab, $A, CODE_FOR_$(div$V$I$a3$))", -@@ -264,6 +268,10 @@ - "set_optab_handler (vec_widen_umult_lo_optab, $A, CODE_FOR_$(vec_widen_umult_lo_$a$))", - "set_optab_handler (vec_widen_smult_hi_optab, $A, CODE_FOR_$(vec_widen_smult_hi_$a$))", - "set_optab_handler (vec_widen_smult_lo_optab, $A, CODE_FOR_$(vec_widen_smult_lo_$a$))", -+ "set_optab_handler (vec_widen_ushiftl_hi_optab, $A, CODE_FOR_$(vec_widen_ushiftl_hi_$a$))", -+ "set_optab_handler (vec_widen_ushiftl_lo_optab, $A, CODE_FOR_$(vec_widen_ushiftl_lo_$a$))", -+ "set_optab_handler (vec_widen_sshiftl_hi_optab, $A, CODE_FOR_$(vec_widen_sshiftl_hi_$a$))", -+ "set_optab_handler (vec_widen_sshiftl_lo_optab, $A, CODE_FOR_$(vec_widen_sshiftl_lo_$a$))", - "set_optab_handler (vec_unpacks_hi_optab, $A, CODE_FOR_$(vec_unpacks_hi_$a$))", - "set_optab_handler (vec_unpacks_lo_optab, $A, CODE_FOR_$(vec_unpacks_lo_$a$))", - "set_optab_handler (vec_unpacku_hi_optab, $A, CODE_FOR_$(vec_unpacku_hi_$a$))", -@@ -302,7 +310,7 @@ - { - int force_float = 0, force_int = 0, force_partial_int = 0; - int force_fixed = 0; -- int force_consec = 0; -+ int force_wider = 0; - int matches = 1; - - for (pp = optabs[pindex]; pp[0] != '$' || pp[1] != '('; pp++) -@@ -320,7 +328,7 @@ - switch (*++pp) - { - case 'N': -- force_consec = 1; -+ force_wider = 1; - break; - case 'I': - force_int = 1; -@@ -389,7 +397,10 @@ - || mode_class[i] == MODE_VECTOR_FRACT - || mode_class[i] == MODE_VECTOR_UFRACT - || mode_class[i] == MODE_VECTOR_ACCUM -- || mode_class[i] == MODE_VECTOR_UACCUM)) -+ || mode_class[i] == MODE_VECTOR_UACCUM) -+ && (! force_wider -+ || *pp == 'a' -+ || m1 < i)) - break; - } - -@@ -409,8 +420,7 @@ - } - - if (matches && pp[0] == '$' && pp[1] == ')' -- && *np == 0 -- && (! force_consec || (int) GET_MODE_WIDER_MODE(m1) == m2)) -+ && *np == 0) - break; - } - ---- a/src/gcc/gimple-low.c -+++ b/src/gcc/gimple-low.c -@@ -218,6 +218,10 @@ - tree fndecl, parms, p; - unsigned int i, nargs; - -+ /* Calls to internal functions always match their signature. */ -+ if (gimple_call_internal_p (stmt)) -+ return true; -+ - nargs = gimple_call_num_args (stmt); - - /* Get argument types for verification. */ ---- a/src/gcc/gimple-pretty-print.c -+++ b/src/gcc/gimple-pretty-print.c -@@ -343,6 +343,8 @@ - case VEC_EXTRACT_ODD_EXPR: - case VEC_INTERLEAVE_HIGH_EXPR: - case VEC_INTERLEAVE_LOW_EXPR: -+ case VEC_WIDEN_LSHIFT_HI_EXPR: -+ case VEC_WIDEN_LSHIFT_LO_EXPR: - for (p = tree_code_name [(int) code]; *p; p++) - pp_character (buffer, TOUPPER (*p)); - pp_string (buffer, " <"); -@@ -596,8 +598,12 @@ - - if (flags & TDF_RAW) - { -- dump_gimple_fmt (buffer, spc, flags, "%G <%T, %T", -- gs, gimple_call_fn (gs), lhs); -+ if (gimple_call_internal_p (gs)) -+ dump_gimple_fmt (buffer, spc, flags, "%G <%s, %T", gs, -+ internal_fn_name (gimple_call_internal_fn (gs)), lhs); -+ else -+ dump_gimple_fmt (buffer, spc, flags, "%G <%T, %T", -+ gs, gimple_call_fn (gs), lhs); - if (gimple_call_num_args (gs) > 0) - { - pp_string (buffer, ", "); -@@ -617,7 +623,10 @@ - - pp_space (buffer); - } -- print_call_name (buffer, gimple_call_fn (gs), flags); -+ if (gimple_call_internal_p (gs)) -+ pp_string (buffer, internal_fn_name (gimple_call_internal_fn (gs))); -+ else -+ print_call_name (buffer, gimple_call_fn (gs), flags); - pp_string (buffer, " ("); - dump_gimple_call_args (buffer, gs, flags); - pp_character (buffer, ')'); ---- a/src/gcc/gimple.c -+++ b/src/gcc/gimple.c -@@ -276,6 +276,59 @@ - } - - -+/* Helper for gimple_build_call_internal and gimple_build_call_internal_vec. -+ Build the basic components of a GIMPLE_CALL statement to internal -+ function FN with NARGS arguments. */ -+ -+static inline gimple -+gimple_build_call_internal_1 (enum internal_fn fn, unsigned nargs) -+{ -+ gimple s = gimple_build_with_ops (GIMPLE_CALL, ERROR_MARK, nargs + 3); -+ s->gsbase.subcode |= GF_CALL_INTERNAL; -+ gimple_call_set_internal_fn (s, fn); -+ gimple_call_reset_alias_info (s); -+ return s; -+} -+ -+ -+/* Build a GIMPLE_CALL statement to internal function FN. NARGS is -+ the number of arguments. The ... are the arguments. */ -+ -+gimple -+gimple_build_call_internal (enum internal_fn fn, unsigned nargs, ...) -+{ -+ va_list ap; -+ gimple call; -+ unsigned i; -+ -+ call = gimple_build_call_internal_1 (fn, nargs); -+ va_start (ap, nargs); -+ for (i = 0; i < nargs; i++) -+ gimple_call_set_arg (call, i, va_arg (ap, tree)); -+ va_end (ap); -+ -+ return call; -+} -+ -+ -+/* Build a GIMPLE_CALL statement to internal function FN with the arguments -+ specified in vector ARGS. */ -+ -+gimple -+gimple_build_call_internal_vec (enum internal_fn fn, VEC(tree, heap) *args) -+{ -+ unsigned i, nargs; -+ gimple call; -+ -+ nargs = VEC_length (tree, args); -+ call = gimple_build_call_internal_1 (fn, nargs); -+ for (i = 0; i < nargs; i++) -+ gimple_call_set_arg (call, i, VEC_index (tree, args, i)); -+ -+ return call; -+} -+ -+ - /* Build a GIMPLE_CALL statement from CALL_EXPR T. Note that T is - assumed to be in GIMPLE form already. Minimal checking is done of - this fact. */ -@@ -1774,6 +1827,20 @@ - return (gimple_body (fndecl) || (fn && fn->cfg)); - } - -+/* Return true if calls C1 and C2 are known to go to the same function. */ -+ -+bool -+gimple_call_same_target_p (const_gimple c1, const_gimple c2) -+{ -+ if (gimple_call_internal_p (c1)) -+ return (gimple_call_internal_p (c2) -+ && gimple_call_internal_fn (c1) == gimple_call_internal_fn (c2)); -+ else -+ return (gimple_call_fn (c1) == gimple_call_fn (c2) -+ || (gimple_call_fndecl (c1) -+ && gimple_call_fndecl (c1) == gimple_call_fndecl (c2))); -+} -+ - /* Detect flags from a GIMPLE_CALL. This is just like - call_expr_flags, but for gimple tuples. */ - -@@ -1786,6 +1853,8 @@ - - if (decl) - flags = flags_from_decl_or_type (decl); -+ else if (gimple_call_internal_p (stmt)) -+ flags = internal_fn_flags (gimple_call_internal_fn (stmt)); - else - { - t = TREE_TYPE (gimple_call_fn (stmt)); -@@ -1801,18 +1870,35 @@ - return flags; - } - -+/* Return the "fn spec" string for call STMT. */ -+ -+static tree -+gimple_call_fnspec (const_gimple stmt) -+{ -+ tree fn, type, attr; -+ -+ fn = gimple_call_fn (stmt); -+ if (!fn) -+ return NULL_TREE; -+ -+ type = TREE_TYPE (TREE_TYPE (fn)); -+ if (!type) -+ return NULL_TREE; -+ -+ attr = lookup_attribute ("fn spec", TYPE_ATTRIBUTES (type)); -+ if (!attr) -+ return NULL_TREE; -+ -+ return TREE_VALUE (TREE_VALUE (attr)); -+} -+ - /* Detects argument flags for argument number ARG on call STMT. */ - - int - gimple_call_arg_flags (const_gimple stmt, unsigned arg) - { -- tree type = TREE_TYPE (TREE_TYPE (gimple_call_fn (stmt))); -- tree attr = lookup_attribute ("fn spec", TYPE_ATTRIBUTES (type)); -- if (!attr) -- return 0; -- -- attr = TREE_VALUE (TREE_VALUE (attr)); -- if (1 + arg >= (unsigned) TREE_STRING_LENGTH (attr)) -+ tree attr = gimple_call_fnspec (stmt); -+ if (!attr || 1 + arg >= (unsigned) TREE_STRING_LENGTH (attr)) - return 0; - - switch (TREE_STRING_POINTER (attr)[1 + arg]) -@@ -1850,13 +1936,8 @@ - if (gimple_call_flags (stmt) & ECF_MALLOC) - return ERF_NOALIAS; - -- type = TREE_TYPE (TREE_TYPE (gimple_call_fn (stmt))); -- attr = lookup_attribute ("fn spec", TYPE_ATTRIBUTES (type)); -- if (!attr) -- return 0; -- -- attr = TREE_VALUE (TREE_VALUE (attr)); -- if (TREE_STRING_LENGTH (attr) < 1) -+ attr = gimple_call_fnspec (stmt); -+ if (!attr || TREE_STRING_LENGTH (attr) < 1) - return 0; - - switch (TREE_STRING_POINTER (attr)[0]) -@@ -2293,6 +2374,7 @@ - if (is_gimple_call (s)) - { - unsigned nargs = gimple_call_num_args (s); -+ tree fn; - - if (!(gimple_call_flags (s) & (ECF_CONST | ECF_PURE))) - return true; -@@ -2307,7 +2389,8 @@ - return true; - } - -- if (TREE_SIDE_EFFECTS (gimple_call_fn (s))) -+ fn = gimple_call_fn (s); -+ if (fn && TREE_SIDE_EFFECTS (fn)) - return true; - - for (i = 0; i < nargs; i++) -@@ -2349,14 +2432,15 @@ - if (is_gimple_call (s)) - { - unsigned nargs = gimple_call_num_args (s); -+ tree fn; - - if (!(gimple_call_flags (s) & (ECF_CONST | ECF_PURE))) - return true; - - /* We cannot use gimple_has_volatile_ops here, - because we must ignore a volatile LHS. */ -- if (TREE_SIDE_EFFECTS (gimple_call_fn (s)) -- || TREE_THIS_VOLATILE (gimple_call_fn (s))) -+ fn = gimple_call_fn (s); -+ if (fn && (TREE_SIDE_EFFECTS (fn) || TREE_THIS_VOLATILE (fn))) - { - gcc_assert (gimple_has_volatile_ops (s)); - return true; -@@ -3113,7 +3197,6 @@ - gimple_call_copy_skip_args (gimple stmt, bitmap args_to_skip) - { - int i; -- tree fn = gimple_call_fn (stmt); - int nargs = gimple_call_num_args (stmt); - VEC(tree, heap) *vargs = VEC_alloc (tree, heap, nargs); - gimple new_stmt; -@@ -3122,7 +3205,11 @@ - if (!bitmap_bit_p (args_to_skip, i)) - VEC_quick_push (tree, vargs, gimple_call_arg (stmt, i)); - -- new_stmt = gimple_build_call_vec (fn, vargs); -+ if (gimple_call_internal_p (stmt)) -+ new_stmt = gimple_build_call_internal_vec (gimple_call_internal_fn (stmt), -+ vargs); -+ else -+ new_stmt = gimple_build_call_vec (gimple_call_fn (stmt), vargs); - VEC_free (tree, heap, vargs); - if (gimple_call_lhs (stmt)) - gimple_call_set_lhs (new_stmt, gimple_call_lhs (stmt)); ---- a/src/gcc/gimple.h -+++ b/src/gcc/gimple.h -@@ -30,6 +30,7 @@ - #include "basic-block.h" - #include "tree-ssa-operands.h" - #include "tree-ssa-alias.h" -+#include "internal-fn.h" - - struct gimple_seq_node_d; - typedef struct gimple_seq_node_d *gimple_seq_node; -@@ -82,6 +83,8 @@ - name, a _DECL, a _REF, etc. */ - }; - -+#define GF_CALL_INTERNAL_FN_SHIFT 8 -+ - /* Specific flags for individual GIMPLE statements. These flags are - always stored in gimple_statement_base.subcode and they may only be - defined for statement codes that do not use sub-codes. -@@ -102,6 +105,8 @@ - GF_CALL_TAILCALL = 1 << 3, - GF_CALL_VA_ARG_PACK = 1 << 4, - GF_CALL_NOTHROW = 1 << 5, -+ GF_CALL_INTERNAL = 1 << 6, -+ GF_CALL_INTERNAL_FN = 0xff << GF_CALL_INTERNAL_FN_SHIFT, - GF_OMP_PARALLEL_COMBINED = 1 << 0, - - /* True on an GIMPLE_OMP_RETURN statement if the return does not require -@@ -817,6 +822,8 @@ - - gimple gimple_build_call_vec (tree, VEC(tree, heap) *); - gimple gimple_build_call (tree, unsigned, ...); -+gimple gimple_build_call_internal (enum internal_fn, unsigned, ...); -+gimple gimple_build_call_internal_vec (enum internal_fn, VEC(tree, heap) *); - gimple gimple_build_call_from_tree (tree); - gimple gimplify_assign (tree, tree, gimple_seq *); - gimple gimple_build_cond (enum tree_code, tree, tree, tree, tree); -@@ -861,6 +868,7 @@ - void gimple_seq_free (gimple_seq); - void gimple_seq_add_seq (gimple_seq *, gimple_seq); - gimple_seq gimple_seq_copy (gimple_seq); -+bool gimple_call_same_target_p (const_gimple, const_gimple); - int gimple_call_flags (const_gimple); - int gimple_call_return_flags (const_gimple); - int gimple_call_arg_flags (const_gimple, unsigned); -@@ -2012,6 +2020,27 @@ - } - - -+/* Return true if call GS calls an internal-only function, as enumerated -+ by internal_fn. */ -+ -+static inline bool -+gimple_call_internal_p (const_gimple gs) -+{ -+ GIMPLE_CHECK (gs, GIMPLE_CALL); -+ return (gs->gsbase.subcode & GF_CALL_INTERNAL) != 0; -+} -+ -+ -+/* Return the target of internal call GS. */ -+ -+static inline enum internal_fn -+gimple_call_internal_fn (const_gimple gs) -+{ -+ gcc_assert (gimple_call_internal_p (gs)); -+ return (enum internal_fn) (gs->gsbase.subcode >> GF_CALL_INTERNAL_FN_SHIFT); -+} -+ -+ - /* Return a pointer to the tree node representing the function called by call - statement GS. */ - -@@ -2029,6 +2058,7 @@ - gimple_call_set_fn (gimple gs, tree fn) - { - GIMPLE_CHECK (gs, GIMPLE_CALL); -+ gcc_assert (!gimple_call_internal_p (gs)); - gimple_set_op (gs, 1, fn); - } - -@@ -2039,10 +2069,23 @@ - gimple_call_set_fndecl (gimple gs, tree decl) - { - GIMPLE_CHECK (gs, GIMPLE_CALL); -+ gcc_assert (!gimple_call_internal_p (gs)); - gimple_set_op (gs, 1, build_fold_addr_expr_loc (gimple_location (gs), decl)); - } - - -+/* Set internal function FN to be the function called by call statement GS. */ -+ -+static inline void -+gimple_call_set_internal_fn (gimple gs, enum internal_fn fn) -+{ -+ GIMPLE_CHECK (gs, GIMPLE_CALL); -+ gcc_assert (gimple_call_internal_p (gs)); -+ gs->gsbase.subcode &= ~GF_CALL_INTERNAL_FN; -+ gs->gsbase.subcode |= (int) fn << GF_CALL_INTERNAL_FN_SHIFT; -+} -+ -+ - /* If a given GIMPLE_CALL's callee is a FUNCTION_DECL, return it. - Otherwise return NULL. This function is analogous to - get_callee_fndecl in tree land. */ -@@ -2051,7 +2094,7 @@ - gimple_call_fndecl (const_gimple gs) - { - tree addr = gimple_call_fn (gs); -- if (TREE_CODE (addr) == ADDR_EXPR) -+ if (addr && TREE_CODE (addr) == ADDR_EXPR) - { - tree fndecl = TREE_OPERAND (addr, 0); - if (TREE_CODE (fndecl) == MEM_REF) -@@ -2073,8 +2116,13 @@ - static inline tree - gimple_call_return_type (const_gimple gs) - { -- tree fn = gimple_call_fn (gs); -- tree type = TREE_TYPE (fn); -+ tree fn, type; -+ -+ fn = gimple_call_fn (gs); -+ if (fn == NULL_TREE) -+ return TREE_TYPE (gimple_call_lhs (gs)); -+ -+ type = TREE_TYPE (fn); - - /* See through the pointer. */ - type = TREE_TYPE (type); ---- a/src/gcc/gimplify.c -+++ b/src/gcc/gimplify.c -@@ -3711,9 +3711,8 @@ - case ARRAY_TYPE: - { - struct gimplify_init_ctor_preeval_data preeval_data; -- HOST_WIDE_INT num_type_elements, num_ctor_elements; -- HOST_WIDE_INT num_nonzero_elements; -- bool cleared, valid_const_initializer; -+ HOST_WIDE_INT num_ctor_elements, num_nonzero_elements; -+ bool cleared, complete_p, valid_const_initializer; - - /* Aggregate types must lower constructors to initialization of - individual elements. The exception is that a CONSTRUCTOR node -@@ -3730,7 +3729,7 @@ - can only do so if it known to be a valid constant initializer. */ - valid_const_initializer - = categorize_ctor_elements (ctor, &num_nonzero_elements, -- &num_ctor_elements, &cleared); -+ &num_ctor_elements, &complete_p); - - /* If a const aggregate variable is being initialized, then it - should never be a lose to promote the variable to be static. */ -@@ -3768,26 +3767,29 @@ - parts in, then generate code for the non-constant parts. */ - /* TODO. There's code in cp/typeck.c to do this. */ - -- num_type_elements = count_type_elements (type, true); -- -- /* If count_type_elements could not determine number of type elements -- for a constant-sized object, assume clearing is needed. -- Don't do this for variable-sized objects, as store_constructor -- will ignore the clearing of variable-sized objects. */ -- if (num_type_elements < 0 && int_size_in_bytes (type) >= 0) -+ if (int_size_in_bytes (TREE_TYPE (ctor)) < 0) -+ /* store_constructor will ignore the clearing of variable-sized -+ objects. Initializers for such objects must explicitly set -+ every field that needs to be set. */ -+ cleared = false; -+ else if (!complete_p) -+ /* If the constructor isn't complete, clear the whole object -+ beforehand. -+ -+ ??? This ought not to be needed. For any element not present -+ in the initializer, we should simply set them to zero. Except -+ we'd need to *find* the elements that are not present, and that -+ requires trickery to avoid quadratic compile-time behavior in -+ large cases or excessive memory use in small cases. */ - cleared = true; -- /* If there are "lots" of zeros, then block clear the object first. */ -- else if (num_type_elements - num_nonzero_elements -+ else if (num_ctor_elements - num_nonzero_elements - > CLEAR_RATIO (optimize_function_for_speed_p (cfun)) -- && num_nonzero_elements < num_type_elements/4) -- cleared = true; -- /* ??? This bit ought not be needed. For any element not present -- in the initializer, we should simply set them to zero. Except -- we'd need to *find* the elements that are not present, and that -- requires trickery to avoid quadratic compile-time behavior in -- large cases or excessive memory use in small cases. */ -- else if (num_ctor_elements < num_type_elements) -+ && num_nonzero_elements < num_ctor_elements / 4) -+ /* If there are "lots" of zeros, it's more efficient to clear -+ the memory and then set the nonzero elements. */ - cleared = true; -+ else -+ cleared = false; - - /* If there are "lots" of initialized elements, and all of them - are valid address constants, then the entire initializer can ---- a/src/gcc/hooks.c -+++ b/src/gcc/hooks.c -@@ -101,6 +101,15 @@ - return true; - } - -+/* Generic hook that takes (enum machine_mode, unsigned HOST_WIDE_INT) -+ and returns false. */ -+bool -+hook_bool_mode_uhwi_false (enum machine_mode mode ATTRIBUTE_UNUSED, -+ unsigned HOST_WIDE_INT value ATTRIBUTE_UNUSED) -+{ -+ return false; -+} -+ - /* Generic hook that takes (FILE *, const char *) and does nothing. */ - void - hook_void_FILEptr_constcharptr (FILE *a ATTRIBUTE_UNUSED, const char *b ATTRIBUTE_UNUSED) ---- a/src/gcc/hooks.h -+++ b/src/gcc/hooks.h -@@ -34,6 +34,8 @@ - extern bool hook_bool_mode_true (enum machine_mode); - extern bool hook_bool_mode_const_rtx_false (enum machine_mode, const_rtx); - extern bool hook_bool_mode_const_rtx_true (enum machine_mode, const_rtx); -+extern bool hook_bool_mode_uhwi_false (enum machine_mode, -+ unsigned HOST_WIDE_INT); - extern bool hook_bool_tree_false (tree); - extern bool hook_bool_const_tree_false (const_tree); - extern bool hook_bool_tree_true (tree); ---- a/src/gcc/ifcvt.c -+++ b/src/gcc/ifcvt.c -@@ -1,5 +1,6 @@ - /* If-conversion support. -- Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010 -+ Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010, -+ 2011 - Free Software Foundation, Inc. - - This file is part of GCC. -@@ -304,6 +305,10 @@ - - for (insn = start; ; insn = NEXT_INSN (insn)) - { -+ /* dwarf2out can't cope with conditional prologues. */ -+ if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_PROLOGUE_END) -+ return FALSE; -+ - if (NOTE_P (insn) || DEBUG_INSN_P (insn)) - goto insn_done; - ---- a/src/gcc/internal-fn.c -+++ b/src/gcc/internal-fn.c -@@ -0,0 +1,147 @@ -+/* Internal functions. -+ Copyright (C) 2011 Free Software Foundation, Inc. -+ -+This file is part of GCC. -+ -+GCC is free software; you can redistribute it and/or modify it under -+the terms of the GNU General Public License as published by the Free -+Software Foundation; either version 3, or (at your option) any later -+version. -+ -+GCC is distributed in the hope that it will be useful, but WITHOUT ANY -+WARRANTY; without even the implied warranty of MERCHANTABILITY or -+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+for more details. -+ -+You should have received a copy of the GNU General Public License -+along with GCC; see the file COPYING3. If not see -+<http://www.gnu.org/licenses/>. */ -+ -+#include "config.h" -+#include "system.h" -+#include "coretypes.h" -+#include "gimple.h" -+#include "tree.h" -+#include "expr.h" -+#include "optabs.h" -+#include "recog.h" -+ -+/* The names of each internal function, indexed by function number. */ -+const char *const internal_fn_name_array[] = { -+#define DEF_INTERNAL_FN(CODE, FLAGS) #CODE, -+#include "internal-fn.def" -+#undef DEF_INTERNAL_FN -+ "<invalid-fn>" -+}; -+ -+/* The ECF_* flags of each internal function, indexed by function number. */ -+const int internal_fn_flags_array[] = { -+#define DEF_INTERNAL_FN(CODE, FLAGS) FLAGS, -+#include "internal-fn.def" -+#undef DEF_INTERNAL_FN -+ 0 -+}; -+ -+/* ARRAY_TYPE is an array of vector modes. Return the associated insn -+ for load-lanes-style optab OPTAB. The insn must exist. */ -+ -+static enum insn_code -+get_multi_vector_move (tree array_type, convert_optab optab) -+{ -+ enum insn_code icode; -+ enum machine_mode imode; -+ enum machine_mode vmode; -+ -+ gcc_assert (TREE_CODE (array_type) == ARRAY_TYPE); -+ imode = TYPE_MODE (array_type); -+ vmode = TYPE_MODE (TREE_TYPE (array_type)); -+ -+ icode = convert_optab_handler (optab, imode, vmode); -+ gcc_assert (icode != CODE_FOR_nothing); -+ return icode; -+} -+ -+/* Expand LOAD_LANES call STMT. */ -+ -+static void -+expand_LOAD_LANES (gimple stmt) -+{ -+ tree type, lhs, rhs; -+ rtx target, mem; -+ enum insn_code icode; -+ const struct insn_operand_data *operand; -+ -+ lhs = gimple_call_lhs (stmt); -+ rhs = gimple_call_arg (stmt, 0); -+ type = TREE_TYPE (lhs); -+ -+ target = expand_expr (lhs, NULL_RTX, VOIDmode, EXPAND_WRITE); -+ mem = expand_normal (rhs); -+ -+ gcc_assert (REG_P (target)); -+ gcc_assert (MEM_P (mem)); -+ PUT_MODE (mem, TYPE_MODE (type)); -+ -+ icode = get_multi_vector_move (type, vec_load_lanes_optab); -+ -+ operand = &insn_data[(int) icode].operand[1]; -+ if (operand->predicate && !operand->predicate (mem, operand->mode)) -+ mem = replace_equiv_address (mem, force_reg (Pmode, XEXP (mem, 0))); -+ -+ emit_insn (GEN_FCN (icode) (target, mem)); -+} -+ -+/* Expand STORE_LANES call STMT. */ -+ -+static void -+expand_STORE_LANES (gimple stmt) -+{ -+ tree type, lhs, rhs; -+ rtx target, reg; -+ enum insn_code icode; -+ const struct insn_operand_data *operand; -+ -+ lhs = gimple_call_lhs (stmt); -+ rhs = gimple_call_arg (stmt, 0); -+ type = TREE_TYPE (rhs); -+ -+ target = expand_expr (lhs, NULL_RTX, VOIDmode, EXPAND_WRITE); -+ reg = expand_normal (rhs); -+ -+ gcc_assert (MEM_P (target)); -+ PUT_MODE (target, TYPE_MODE (type)); -+ -+ icode = get_multi_vector_move (type, vec_store_lanes_optab); -+ -+ operand = &insn_data[(int) icode].operand[0]; -+ if (operand->predicate && !operand->predicate (target, operand->mode)) -+ target = replace_equiv_address (target, -+ force_reg (Pmode, XEXP (target, 0))); -+ -+ operand = &insn_data[(int) icode].operand[1]; -+ if (operand->predicate && !operand->predicate (reg, operand->mode)) -+ reg = force_reg (TYPE_MODE (type), reg); -+ -+ emit_insn (GEN_FCN (icode) (target, reg)); -+} -+ -+/* Routines to expand each internal function, indexed by function number. -+ Each routine has the prototype: -+ -+ expand_<NAME> (gimple stmt) -+ -+ where STMT is the statement that performs the call. */ -+static void (*const internal_fn_expanders[]) (gimple) = { -+#define DEF_INTERNAL_FN(CODE, FLAGS) expand_##CODE, -+#include "internal-fn.def" -+#undef DEF_INTERNAL_FN -+ 0 -+}; -+ -+/* Expand STMT, which is a call to internal function FN. */ -+ -+void -+expand_internal_call (gimple stmt) -+{ -+ internal_fn_expanders[(int) gimple_call_internal_fn (stmt)] (stmt); -+} ---- a/src/gcc/internal-fn.def -+++ b/src/gcc/internal-fn.def -@@ -0,0 +1,42 @@ -+/* Internal functions. -+ Copyright (C) 2011 Free Software Foundation, Inc. -+ -+This file is part of GCC. -+ -+GCC is free software; you can redistribute it and/or modify it under -+the terms of the GNU General Public License as published by the Free -+Software Foundation; either version 3, or (at your option) any later -+version. -+ -+GCC is distributed in the hope that it will be useful, but WITHOUT ANY -+WARRANTY; without even the implied warranty of MERCHANTABILITY or -+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+for more details. -+ -+You should have received a copy of the GNU General Public License -+along with GCC; see the file COPYING3. If not see -+<http://www.gnu.org/licenses/>. */ -+ -+/* This file specifies a list of internal "functions". These functions -+ differ from built-in functions in that they have no linkage and cannot -+ be called directly by the user. They represent operations that are only -+ synthesised by GCC itself. -+ -+ Internal functions are used instead of tree codes if the operation -+ and its operands are more naturally represented as a GIMPLE_CALL -+ than a GIMPLE_ASSIGN. -+ -+ Each entry in this file has the form: -+ -+ DEF_INTERNAL_FN (NAME, FLAGS) -+ -+ where NAME is the name of the function and FLAGS is a set of -+ ECF_* flags. Each entry must have a corresponding expander -+ of the form: -+ -+ void expand_NAME (gimple stmt) -+ -+ where STMT is the statement that performs the call. */ -+ -+DEF_INTERNAL_FN (LOAD_LANES, ECF_CONST | ECF_LEAF) -+DEF_INTERNAL_FN (STORE_LANES, ECF_CONST | ECF_LEAF) ---- a/src/gcc/internal-fn.h -+++ b/src/gcc/internal-fn.h -@@ -0,0 +1,52 @@ -+/* Internal functions. -+ Copyright (C) 2011 Free Software Foundation, Inc. -+ -+This file is part of GCC. -+ -+GCC is free software; you can redistribute it and/or modify it under -+the terms of the GNU General Public License as published by the Free -+Software Foundation; either version 3, or (at your option) any later -+version. -+ -+GCC is distributed in the hope that it will be useful, but WITHOUT ANY -+WARRANTY; without even the implied warranty of MERCHANTABILITY or -+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -+for more details. -+ -+You should have received a copy of the GNU General Public License -+along with GCC; see the file COPYING3. If not see -+<http://www.gnu.org/licenses/>. */ -+ -+#ifndef GCC_INTERNAL_FN_H -+#define GCC_INTERNAL_FN_H -+ -+enum internal_fn { -+#define DEF_INTERNAL_FN(CODE, FLAGS) IFN_##CODE, -+#include "internal-fn.def" -+#undef DEF_INTERNAL_FN -+ IFN_LAST -+}; -+ -+extern const char *const internal_fn_name_array[]; -+extern const int internal_fn_flags_array[]; -+ -+/* Return the name of internal function FN. The name is only meaningful -+ for dumps; it has no linkage. */ -+ -+static inline const char * -+internal_fn_name (enum internal_fn fn) -+{ -+ return internal_fn_name_array[(int) fn]; -+} -+ -+/* Return the ECF_* flags for function FN. */ -+ -+static inline int -+internal_fn_flags (enum internal_fn fn) -+{ -+ return internal_fn_flags_array[(int) fn]; -+} -+ -+extern void expand_internal_call (gimple); -+ -+#endif ---- a/src/gcc/ipa-prop.c -+++ b/src/gcc/ipa-prop.c -@@ -1418,6 +1418,8 @@ - { - tree target = gimple_call_fn (call); - -+ if (!target) -+ return; - if (TREE_CODE (target) == SSA_NAME) - ipa_analyze_indirect_call_uses (node, info, parms_info, call, target); - else if (TREE_CODE (target) == OBJ_TYPE_REF) ---- a/src/gcc/loop-doloop.c -+++ b/src/gcc/loop-doloop.c -@@ -78,6 +78,8 @@ - rtx inc_src; - rtx condition; - rtx pattern; -+ rtx cc_reg = NULL_RTX; -+ rtx reg_orig = NULL_RTX; - - /* The canonical doloop pattern we expect has one of the following - forms: -@@ -96,7 +98,16 @@ - 2) (set (reg) (plus (reg) (const_int -1)) - (set (pc) (if_then_else (reg != 0) - (label_ref (label)) -- (pc))). */ -+ (pc))). -+ -+ Some targets (ARM) do the comparison before the branch, as in the -+ following form: -+ -+ 3) (parallel [(set (cc) (compare ((plus (reg) (const_int -1), 0))) -+ (set (reg) (plus (reg) (const_int -1)))]) -+ (set (pc) (if_then_else (cc == NE) -+ (label_ref (label)) -+ (pc))) */ - - pattern = PATTERN (doloop_pat); - -@@ -104,19 +115,47 @@ - { - rtx cond; - rtx prev_insn = prev_nondebug_insn (doloop_pat); -+ rtx cmp_arg1, cmp_arg2; -+ rtx cmp_orig; - -- /* We expect the decrement to immediately precede the branch. */ -+ /* In case the pattern is not PARALLEL we expect two forms -+ of doloop which are cases 2) and 3) above: in case 2) the -+ decrement immediately precedes the branch, while in case 3) -+ the compare and decrement instructions immediately precede -+ the branch. */ - - if (prev_insn == NULL_RTX || !INSN_P (prev_insn)) - return 0; - - cmp = pattern; -- inc = PATTERN (PREV_INSN (doloop_pat)); -+ if (GET_CODE (PATTERN (prev_insn)) == PARALLEL) -+ { -+ /* The third case: the compare and decrement instructions -+ immediately precede the branch. */ -+ cmp_orig = XVECEXP (PATTERN (prev_insn), 0, 0); -+ if (GET_CODE (cmp_orig) != SET) -+ return 0; -+ if (GET_CODE (SET_SRC (cmp_orig)) != COMPARE) -+ return 0; -+ cmp_arg1 = XEXP (SET_SRC (cmp_orig), 0); -+ cmp_arg2 = XEXP (SET_SRC (cmp_orig), 1); -+ if (cmp_arg2 != const0_rtx -+ || GET_CODE (cmp_arg1) != PLUS) -+ return 0; -+ reg_orig = XEXP (cmp_arg1, 0); -+ if (XEXP (cmp_arg1, 1) != GEN_INT (-1) -+ || !REG_P (reg_orig)) -+ return 0; -+ cc_reg = SET_DEST (cmp_orig); -+ -+ inc = XVECEXP (PATTERN (prev_insn), 0, 1); -+ } -+ else -+ inc = PATTERN (prev_insn); - /* We expect the condition to be of the form (reg != 0) */ - cond = XEXP (SET_SRC (cmp), 0); - if (GET_CODE (cond) != NE || XEXP (cond, 1) != const0_rtx) - return 0; -- - } - else - { -@@ -162,11 +201,15 @@ - return 0; - - if ((XEXP (condition, 0) == reg) -+ /* For the third case: */ -+ || ((cc_reg != NULL_RTX) -+ && (XEXP (condition, 0) == cc_reg) -+ && (reg_orig == reg)) - || (GET_CODE (XEXP (condition, 0)) == PLUS -- && XEXP (XEXP (condition, 0), 0) == reg)) -+ && XEXP (XEXP (condition, 0), 0) == reg)) - { - if (GET_CODE (pattern) != PARALLEL) -- /* The second form we expect: -+ /* For the second form we expect: - - (set (reg) (plus (reg) (const_int -1)) - (set (pc) (if_then_else (reg != 0) -@@ -181,7 +224,24 @@ - (set (reg) (plus (reg) (const_int -1))) - (additional clobbers and uses)]) - -- So we return that form instead. -+ For the third form we expect: -+ -+ (parallel [(set (cc) (compare ((plus (reg) (const_int -1)), 0)) -+ (set (reg) (plus (reg) (const_int -1)))]) -+ (set (pc) (if_then_else (cc == NE) -+ (label_ref (label)) -+ (pc))) -+ -+ which is equivalent to the following: -+ -+ (parallel [(set (cc) (compare (reg, 1)) -+ (set (reg) (plus (reg) (const_int -1))) -+ (set (pc) (if_then_else (NE == cc) -+ (label_ref (label)) -+ (pc))))]) -+ -+ So we return the second form instead for the two cases. -+ - */ - condition = gen_rtx_fmt_ee (NE, VOIDmode, inc_src, const1_rtx); - ---- a/src/gcc/modulo-sched.c -+++ b/src/gcc/modulo-sched.c -@@ -116,14 +116,18 @@ - - /* The number of different iterations the nodes in ps span, assuming - the stage boundaries are placed efficiently. */ --#define PS_STAGE_COUNT(ps) ((PS_MAX_CYCLE (ps) - PS_MIN_CYCLE (ps) \ -- + 1 + (ps)->ii - 1) / (ps)->ii) -+#define CALC_STAGE_COUNT(max_cycle,min_cycle,ii) ((max_cycle - min_cycle \ -+ + 1 + ii - 1) / ii) -+/* The stage count of ps. */ -+#define PS_STAGE_COUNT(ps) (((partial_schedule_ptr)(ps))->stage_count) - - /* A single instruction in the partial schedule. */ - struct ps_insn - { -- /* The corresponding DDG_NODE. */ -- ddg_node_ptr node; -+ /* Identifies the instruction to be scheduled. Values smaller than -+ the ddg's num_nodes refer directly to ddg nodes. A value of -+ X - num_nodes refers to register move X. */ -+ int id; - - /* The (absolute) cycle in which the PS instruction is scheduled. - Same as SCHED_TIME (node). */ -@@ -133,10 +137,35 @@ - ps_insn_ptr next_in_row, - prev_in_row; - -- /* The number of nodes in the same row that come after this node. */ -- int row_rest_count; - }; - -+/* Information about a register move that has been added to a partial -+ schedule. */ -+struct ps_reg_move_info -+{ -+ /* The source of the move is defined by the ps_insn with id DEF. -+ The destination is used by the ps_insns with the ids in USES. */ -+ int def; -+ sbitmap uses; -+ -+ /* The original form of USES' instructions used OLD_REG, but they -+ should now use NEW_REG. */ -+ rtx old_reg; -+ rtx new_reg; -+ -+ /* The number of consecutive stages that the move occupies. */ -+ int num_consecutive_stages; -+ -+ /* An instruction that sets NEW_REG to the correct value. The first -+ move associated with DEF will have an rhs of OLD_REG; later moves -+ use the result of the previous move. */ -+ rtx insn; -+}; -+ -+typedef struct ps_reg_move_info ps_reg_move_info; -+DEF_VEC_O (ps_reg_move_info); -+DEF_VEC_ALLOC_O (ps_reg_move_info, heap); -+ - /* Holds the partial schedule as an array of II rows. Each entry of the - array points to a linked list of PS_INSNs, which represents the - instructions that are scheduled for that row. */ -@@ -148,6 +177,16 @@ - /* rows[i] points to linked list of insns scheduled in row i (0<=i<ii). */ - ps_insn_ptr *rows; - -+ /* All the moves added for this partial schedule. Index X has -+ a ps_insn id of X + g->num_nodes. */ -+ VEC (ps_reg_move_info, heap) *reg_moves; -+ -+ /* rows_length[i] holds the number of instructions in the row. -+ It is used only (as an optimization) to back off quickly from -+ trying to schedule a node in a full row; that is, to avoid running -+ through futile DFA state transitions. */ -+ int *rows_length; -+ - /* The earliest absolute cycle of an insn in the partial schedule. */ - int min_cycle; - -@@ -155,29 +194,18 @@ - int max_cycle; - - ddg_ptr g; /* The DDG of the insns in the partial schedule. */ --}; - --/* We use this to record all the register replacements we do in -- the kernel so we can undo SMS if it is not profitable. */ --struct undo_replace_buff_elem --{ -- rtx insn; -- rtx orig_reg; -- rtx new_reg; -- struct undo_replace_buff_elem *next; -+ int stage_count; /* The stage count of the partial schedule. */ - }; - - -- - static partial_schedule_ptr create_partial_schedule (int ii, ddg_ptr, int history); - static void free_partial_schedule (partial_schedule_ptr); - static void reset_partial_schedule (partial_schedule_ptr, int new_ii); - void print_partial_schedule (partial_schedule_ptr, FILE *); - static void verify_partial_schedule (partial_schedule_ptr, sbitmap); - static ps_insn_ptr ps_add_node_check_conflicts (partial_schedule_ptr, -- ddg_node_ptr node, int cycle, -- sbitmap must_precede, -- sbitmap must_follow); -+ int, int, sbitmap, sbitmap); - static void rotate_partial_schedule (partial_schedule_ptr, int); - void set_row_column_for_ps (partial_schedule_ptr); - static void ps_insert_empty_row (partial_schedule_ptr, int, sbitmap); -@@ -193,34 +221,27 @@ - static void permute_partial_schedule (partial_schedule_ptr, rtx); - static void generate_prolog_epilog (partial_schedule_ptr, struct loop *, - rtx, rtx); --static void duplicate_insns_of_cycles (partial_schedule_ptr, -- int, int, int, rtx); -- --#define SCHED_ASAP(x) (((node_sched_params_ptr)(x)->aux.info)->asap) --#define SCHED_TIME(x) (((node_sched_params_ptr)(x)->aux.info)->time) --#define SCHED_FIRST_REG_MOVE(x) \ -- (((node_sched_params_ptr)(x)->aux.info)->first_reg_move) --#define SCHED_NREG_MOVES(x) \ -- (((node_sched_params_ptr)(x)->aux.info)->nreg_moves) --#define SCHED_ROW(x) (((node_sched_params_ptr)(x)->aux.info)->row) --#define SCHED_STAGE(x) (((node_sched_params_ptr)(x)->aux.info)->stage) --#define SCHED_COLUMN(x) (((node_sched_params_ptr)(x)->aux.info)->column) -+static int calculate_stage_count (partial_schedule_ptr, int); -+static void calculate_must_precede_follow (ddg_node_ptr, int, int, -+ int, int, sbitmap, sbitmap, sbitmap); -+static int get_sched_window (partial_schedule_ptr, ddg_node_ptr, -+ sbitmap, int, int *, int *, int *); -+static bool try_scheduling_node_in_cycle (partial_schedule_ptr, int, int, -+ sbitmap, int *, sbitmap, sbitmap); -+static void remove_node_from_ps (partial_schedule_ptr, ps_insn_ptr); -+ -+#define NODE_ASAP(node) ((node)->aux.count) -+ -+#define SCHED_PARAMS(x) VEC_index (node_sched_params, node_sched_param_vec, x) -+#define SCHED_TIME(x) (SCHED_PARAMS (x)->time) -+#define SCHED_ROW(x) (SCHED_PARAMS (x)->row) -+#define SCHED_STAGE(x) (SCHED_PARAMS (x)->stage) -+#define SCHED_COLUMN(x) (SCHED_PARAMS (x)->column) - - /* The scheduling parameters held for each node. */ - typedef struct node_sched_params - { -- int asap; /* A lower-bound on the absolute scheduling cycle. */ -- int time; /* The absolute scheduling cycle (time >= asap). */ -- -- /* The following field (first_reg_move) is a pointer to the first -- register-move instruction added to handle the modulo-variable-expansion -- of the register defined by this node. This register-move copies the -- original register defined by the node. */ -- rtx first_reg_move; -- -- /* The number of register-move instructions added, immediately preceding -- first_reg_move. */ -- int nreg_moves; -+ int time; /* The absolute scheduling cycle. */ - - int row; /* Holds time % ii. */ - int stage; /* Holds time / ii. */ -@@ -230,6 +251,9 @@ - int column; - } *node_sched_params_ptr; - -+typedef struct node_sched_params node_sched_params; -+DEF_VEC_O (node_sched_params); -+DEF_VEC_ALLOC_O (node_sched_params, heap); - - /* The following three functions are copied from the current scheduler - code in order to use sched_analyze() for computing the dependencies. -@@ -279,6 +303,49 @@ - 0 - }; - -+/* Partial schedule instruction ID in PS is a register move. Return -+ information about it. */ -+static struct ps_reg_move_info * -+ps_reg_move (partial_schedule_ptr ps, int id) -+{ -+ gcc_checking_assert (id >= ps->g->num_nodes); -+ return VEC_index (ps_reg_move_info, ps->reg_moves, id - ps->g->num_nodes); -+} -+ -+/* Return the rtl instruction that is being scheduled by partial schedule -+ instruction ID, which belongs to schedule PS. */ -+static rtx -+ps_rtl_insn (partial_schedule_ptr ps, int id) -+{ -+ if (id < ps->g->num_nodes) -+ return ps->g->nodes[id].insn; -+ else -+ return ps_reg_move (ps, id)->insn; -+} -+ -+/* Partial schedule instruction ID, which belongs to PS, occured in -+ the original (unscheduled) loop. Return the first instruction -+ in the loop that was associated with ps_rtl_insn (PS, ID). -+ If the instruction had some notes before it, this is the first -+ of those notes. */ -+static rtx -+ps_first_note (partial_schedule_ptr ps, int id) -+{ -+ gcc_assert (id < ps->g->num_nodes); -+ return ps->g->nodes[id].first_note; -+} -+ -+/* Return the number of consecutive stages that are occupied by -+ partial schedule instruction ID in PS. */ -+static int -+ps_num_consecutive_stages (partial_schedule_ptr ps, int id) -+{ -+ if (id < ps->g->num_nodes) -+ return 1; -+ else -+ return ps_reg_move (ps, id)->num_consecutive_stages; -+} -+ - /* Given HEAD and TAIL which are the first and last insns in a loop; - return the register which controls the loop. Return zero if it has - more than one occurrence in the loop besides the control part or the -@@ -310,10 +377,10 @@ - either a single (parallel) branch-on-count or a (non-parallel) - branch immediately preceded by a single (decrement) insn. */ - first_insn_not_to_check = (GET_CODE (PATTERN (tail)) == PARALLEL ? tail -- : PREV_INSN (tail)); -+ : prev_nondebug_insn (tail)); - - for (insn = head; insn != first_insn_not_to_check; insn = NEXT_INSN (insn)) -- if (reg_mentioned_p (reg, insn)) -+ if (reg_mentioned_p (reg, insn) && !DEBUG_INSN_P (insn)) - { - if (dump_file) - { -@@ -379,35 +446,59 @@ - } - - --/* Points to the array that contains the sched data for each node. */ --static node_sched_params_ptr node_sched_params; -+/* A vector that contains the sched data for each ps_insn. */ -+static VEC (node_sched_params, heap) *node_sched_param_vec; - --/* Allocate sched_params for each node and initialize it. Assumes that -- the aux field of each node contain the asap bound (computed earlier), -- and copies it into the sched_params field. */ -+/* Allocate sched_params for each node and initialize it. */ - static void - set_node_sched_params (ddg_ptr g) - { -- int i; -+ VEC_truncate (node_sched_params, node_sched_param_vec, 0); -+ VEC_safe_grow_cleared (node_sched_params, heap, -+ node_sched_param_vec, g->num_nodes); -+} - -- /* Allocate for each node in the DDG a place to hold the "sched_data". */ -- /* Initialize ASAP/ALAP/HIGHT to zero. */ -- node_sched_params = (node_sched_params_ptr) -- xcalloc (g->num_nodes, -- sizeof (struct node_sched_params)); -+/* Make sure that node_sched_param_vec has an entry for every move in PS. */ -+static void -+extend_node_sched_params (partial_schedule_ptr ps) -+{ -+ VEC_safe_grow_cleared (node_sched_params, heap, node_sched_param_vec, -+ ps->g->num_nodes + VEC_length (ps_reg_move_info, -+ ps->reg_moves)); -+} - -- /* Set the pointer of the general data of the node to point to the -- appropriate sched_params structure. */ -- for (i = 0; i < g->num_nodes; i++) -+/* Update the sched_params (time, row and stage) for node U using the II, -+ the CYCLE of U and MIN_CYCLE. -+ We're not simply taking the following -+ SCHED_STAGE (u) = CALC_STAGE_COUNT (SCHED_TIME (u), min_cycle, ii); -+ because the stages may not be aligned on cycle 0. */ -+static void -+update_node_sched_params (int u, int ii, int cycle, int min_cycle) -+{ -+ int sc_until_cycle_zero; -+ int stage; -+ -+ SCHED_TIME (u) = cycle; -+ SCHED_ROW (u) = SMODULO (cycle, ii); -+ -+ /* The calculation of stage count is done adding the number -+ of stages before cycle zero and after cycle zero. */ -+ sc_until_cycle_zero = CALC_STAGE_COUNT (-1, min_cycle, ii); -+ -+ if (SCHED_TIME (u) < 0) -+ { -+ stage = CALC_STAGE_COUNT (-1, SCHED_TIME (u), ii); -+ SCHED_STAGE (u) = sc_until_cycle_zero - stage; -+ } -+ else - { -- /* Watch out for aliasing problems? */ -- node_sched_params[i].asap = g->nodes[i].aux.count; -- g->nodes[i].aux.info = &node_sched_params[i]; -+ stage = CALC_STAGE_COUNT (SCHED_TIME (u), 0, ii); -+ SCHED_STAGE (u) = sc_until_cycle_zero + stage - 1; - } - } - - static void --print_node_sched_params (FILE *file, int num_nodes, ddg_ptr g) -+print_node_sched_params (FILE *file, int num_nodes, partial_schedule_ptr ps) - { - int i; - -@@ -415,22 +506,170 @@ - return; - for (i = 0; i < num_nodes; i++) - { -- node_sched_params_ptr nsp = &node_sched_params[i]; -- rtx reg_move = nsp->first_reg_move; -- int j; -+ node_sched_params_ptr nsp = SCHED_PARAMS (i); - - fprintf (file, "Node = %d; INSN = %d\n", i, -- (INSN_UID (g->nodes[i].insn))); -- fprintf (file, " asap = %d:\n", nsp->asap); -+ INSN_UID (ps_rtl_insn (ps, i))); -+ fprintf (file, " asap = %d:\n", NODE_ASAP (&ps->g->nodes[i])); - fprintf (file, " time = %d:\n", nsp->time); -- fprintf (file, " nreg_moves = %d:\n", nsp->nreg_moves); -- for (j = 0; j < nsp->nreg_moves; j++) -+ fprintf (file, " stage = %d:\n", nsp->stage); -+ } -+} -+ -+/* Set SCHED_COLUMN for each instruction in row ROW of PS. */ -+static void -+set_columns_for_row (partial_schedule_ptr ps, int row) -+{ -+ ps_insn_ptr cur_insn; -+ int column; -+ -+ column = 0; -+ for (cur_insn = ps->rows[row]; cur_insn; cur_insn = cur_insn->next_in_row) -+ SCHED_COLUMN (cur_insn->id) = column++; -+} -+ -+/* Set SCHED_COLUMN for each instruction in PS. */ -+static void -+set_columns_for_ps (partial_schedule_ptr ps) -+{ -+ int row; -+ -+ for (row = 0; row < ps->ii; row++) -+ set_columns_for_row (ps, row); -+} -+ -+/* Try to schedule the move with ps_insn identifier I_REG_MOVE in PS. -+ Its single predecessor has already been scheduled, as has its -+ ddg node successors. (The move may have also another move as its -+ successor, in which case that successor will be scheduled later.) -+ -+ The move is part of a chain that satisfies register dependencies -+ between a producing ddg node and various consuming ddg nodes. -+ If some of these dependencies have a distance of 1 (meaning that -+ the use is upward-exposoed) then DISTANCE1_USES is nonnull and -+ contains the set of uses with distance-1 dependencies. -+ DISTANCE1_USES is null otherwise. -+ -+ MUST_FOLLOW is a scratch bitmap that is big enough to hold -+ all current ps_insn ids. -+ -+ Return true on success. */ -+static bool -+schedule_reg_move (partial_schedule_ptr ps, int i_reg_move, -+ sbitmap distance1_uses, sbitmap must_follow) -+{ -+ unsigned int u; -+ int this_time, this_distance, this_start, this_end, this_latency; -+ int start, end, c, ii; -+ sbitmap_iterator sbi; -+ ps_reg_move_info *move; -+ rtx this_insn; -+ ps_insn_ptr psi; -+ -+ move = ps_reg_move (ps, i_reg_move); -+ ii = ps->ii; -+ if (dump_file) -+ { -+ fprintf (dump_file, "Scheduling register move INSN %d; ii = %d" -+ ", min cycle = %d\n\n", INSN_UID (move->insn), ii, -+ PS_MIN_CYCLE (ps)); -+ print_rtl_single (dump_file, move->insn); -+ fprintf (dump_file, "\n%11s %11s %5s\n", "start", "end", "time"); -+ fprintf (dump_file, "=========== =========== =====\n"); -+ } -+ -+ start = INT_MIN; -+ end = INT_MAX; -+ -+ /* For dependencies of distance 1 between a producer ddg node A -+ and consumer ddg node B, we have a chain of dependencies: -+ -+ A --(T,L1,1)--> M1 --(T,L2,0)--> M2 ... --(T,Ln,0)--> B -+ -+ where Mi is the ith move. For dependencies of distance 0 between -+ a producer ddg node A and consumer ddg node C, we have a chain of -+ dependencies: -+ -+ A --(T,L1',0)--> M1' --(T,L2',0)--> M2' ... --(T,Ln',0)--> C -+ -+ where Mi' occupies the same position as Mi but occurs a stage later. -+ We can only schedule each move once, so if we have both types of -+ chain, we model the second as: -+ -+ A --(T,L1',1)--> M1 --(T,L2',0)--> M2 ... --(T,Ln',-1)--> C -+ -+ First handle the dependencies between the previously-scheduled -+ predecessor and the move. */ -+ this_insn = ps_rtl_insn (ps, move->def); -+ this_latency = insn_latency (this_insn, move->insn); -+ this_distance = distance1_uses && move->def < ps->g->num_nodes ? 1 : 0; -+ this_time = SCHED_TIME (move->def) - this_distance * ii; -+ this_start = this_time + this_latency; -+ this_end = this_time + ii; -+ if (dump_file) -+ fprintf (dump_file, "%11d %11d %5d %d --(T,%d,%d)--> %d\n", -+ this_start, this_end, SCHED_TIME (move->def), -+ INSN_UID (this_insn), this_latency, this_distance, -+ INSN_UID (move->insn)); -+ -+ if (start < this_start) -+ start = this_start; -+ if (end > this_end) -+ end = this_end; -+ -+ /* Handle the dependencies between the move and previously-scheduled -+ successors. */ -+ EXECUTE_IF_SET_IN_SBITMAP (move->uses, 0, u, sbi) -+ { -+ this_insn = ps_rtl_insn (ps, u); -+ this_latency = insn_latency (move->insn, this_insn); -+ if (distance1_uses && !TEST_BIT (distance1_uses, u)) -+ this_distance = -1; -+ else -+ this_distance = 0; -+ this_time = SCHED_TIME (u) + this_distance * ii; -+ this_start = this_time - ii; -+ this_end = this_time - this_latency; -+ if (dump_file) -+ fprintf (dump_file, "%11d %11d %5d %d --(T,%d,%d)--> %d\n", -+ this_start, this_end, SCHED_TIME (u), INSN_UID (move->insn), -+ this_latency, this_distance, INSN_UID (this_insn)); -+ -+ if (start < this_start) -+ start = this_start; -+ if (end > this_end) -+ end = this_end; -+ } -+ -+ if (dump_file) -+ { -+ fprintf (dump_file, "----------- ----------- -----\n"); -+ fprintf (dump_file, "%11d %11d %5s %s\n", start, end, "", "(max, min)"); -+ } -+ -+ sbitmap_zero (must_follow); -+ SET_BIT (must_follow, move->def); -+ -+ start = MAX (start, end - (ii - 1)); -+ for (c = end; c >= start; c--) -+ { -+ psi = ps_add_node_check_conflicts (ps, i_reg_move, c, -+ move->uses, must_follow); -+ if (psi) - { -- fprintf (file, " reg_move = "); -- print_rtl_single (file, reg_move); -- reg_move = PREV_INSN (reg_move); -+ update_node_sched_params (i_reg_move, ii, c, PS_MIN_CYCLE (ps)); -+ if (dump_file) -+ fprintf (dump_file, "\nScheduled register move INSN %d at" -+ " time %d, row %d\n\n", INSN_UID (move->insn), c, -+ SCHED_ROW (i_reg_move)); -+ return true; - } - } -+ -+ if (dump_file) -+ fprintf (dump_file, "\nNo available slot\n\n"); -+ -+ return false; - } - - /* -@@ -444,175 +683,201 @@ - nreg_moves = ----------------------------------- + 1 - { dependence. - ii { 1 if not. - */ --static struct undo_replace_buff_elem * --generate_reg_moves (partial_schedule_ptr ps, bool rescan) -+static bool -+schedule_reg_moves (partial_schedule_ptr ps) - { - ddg_ptr g = ps->g; - int ii = ps->ii; - int i; -- struct undo_replace_buff_elem *reg_move_replaces = NULL; - - for (i = 0; i < g->num_nodes; i++) - { - ddg_node_ptr u = &g->nodes[i]; - ddg_edge_ptr e; - int nreg_moves = 0, i_reg_move; -- sbitmap *uses_of_defs; -- rtx last_reg_move; - rtx prev_reg, old_reg; -- -+ int first_move; -+ int distances[2]; -+ sbitmap must_follow; -+ sbitmap distance1_uses; -+ rtx set = single_set (u->insn); -+ -+ /* Skip instructions that do not set a register. */ -+ if ((set && !REG_P (SET_DEST (set)))) -+ continue; -+ - /* Compute the number of reg_moves needed for u, by looking at life - ranges started at u (excluding self-loops). */ -+ distances[0] = distances[1] = false; - for (e = u->out; e; e = e->next_out) - if (e->type == TRUE_DEP && e->dest != e->src) - { -- int nreg_moves4e = (SCHED_TIME (e->dest) - SCHED_TIME (e->src)) / ii; -+ int nreg_moves4e = (SCHED_TIME (e->dest->cuid) -+ - SCHED_TIME (e->src->cuid)) / ii; - - if (e->distance == 1) -- nreg_moves4e = (SCHED_TIME (e->dest) - SCHED_TIME (e->src) + ii) / ii; -+ nreg_moves4e = (SCHED_TIME (e->dest->cuid) -+ - SCHED_TIME (e->src->cuid) + ii) / ii; - - /* If dest precedes src in the schedule of the kernel, then dest - will read before src writes and we can save one reg_copy. */ -- if (SCHED_ROW (e->dest) == SCHED_ROW (e->src) -- && SCHED_COLUMN (e->dest) < SCHED_COLUMN (e->src)) -+ if (SCHED_ROW (e->dest->cuid) == SCHED_ROW (e->src->cuid) -+ && SCHED_COLUMN (e->dest->cuid) < SCHED_COLUMN (e->src->cuid)) - nreg_moves4e--; - -+ if (nreg_moves4e >= 1) -+ { -+ /* !single_set instructions are not supported yet and -+ thus we do not except to encounter them in the loop -+ except from the doloop part. For the latter case -+ we assume no regmoves are generated as the doloop -+ instructions are tied to the branch with an edge. */ -+ gcc_assert (set); -+ /* If the instruction contains auto-inc register then -+ validate that the regmov is being generated for the -+ target regsiter rather then the inc'ed register. */ -+ gcc_assert (!autoinc_var_is_used_p (u->insn, e->dest->insn)); -+ } -+ -+ if (nreg_moves4e) -+ { -+ gcc_assert (e->distance < 2); -+ distances[e->distance] = true; -+ } - nreg_moves = MAX (nreg_moves, nreg_moves4e); - } - - if (nreg_moves == 0) - continue; - -+ /* Create NREG_MOVES register moves. */ -+ first_move = VEC_length (ps_reg_move_info, ps->reg_moves); -+ VEC_safe_grow_cleared (ps_reg_move_info, heap, ps->reg_moves, -+ first_move + nreg_moves); -+ extend_node_sched_params (ps); -+ -+ /* Record the moves associated with this node. */ -+ first_move += ps->g->num_nodes; -+ -+ /* Generate each move. */ -+ old_reg = prev_reg = SET_DEST (single_set (u->insn)); -+ for (i_reg_move = 0; i_reg_move < nreg_moves; i_reg_move++) -+ { -+ ps_reg_move_info *move = ps_reg_move (ps, first_move + i_reg_move); -+ -+ move->def = i_reg_move > 0 ? first_move + i_reg_move - 1 : i; -+ move->uses = sbitmap_alloc (first_move + nreg_moves); -+ move->old_reg = old_reg; -+ move->new_reg = gen_reg_rtx (GET_MODE (prev_reg)); -+ move->num_consecutive_stages = distances[0] && distances[1] ? 2 : 1; -+ move->insn = gen_move_insn (move->new_reg, copy_rtx (prev_reg)); -+ sbitmap_zero (move->uses); -+ -+ prev_reg = move->new_reg; -+ } -+ -+ distance1_uses = distances[1] ? sbitmap_alloc (g->num_nodes) : NULL; -+ - /* Every use of the register defined by node may require a different - copy of this register, depending on the time the use is scheduled. -- Set a bitmap vector, telling which nodes use each copy of this -- register. */ -- uses_of_defs = sbitmap_vector_alloc (nreg_moves, g->num_nodes); -- sbitmap_vector_zero (uses_of_defs, nreg_moves); -+ Record which uses require which move results. */ - for (e = u->out; e; e = e->next_out) - if (e->type == TRUE_DEP && e->dest != e->src) - { -- int dest_copy = (SCHED_TIME (e->dest) - SCHED_TIME (e->src)) / ii; -+ int dest_copy = (SCHED_TIME (e->dest->cuid) -+ - SCHED_TIME (e->src->cuid)) / ii; - - if (e->distance == 1) -- dest_copy = (SCHED_TIME (e->dest) - SCHED_TIME (e->src) + ii) / ii; -+ dest_copy = (SCHED_TIME (e->dest->cuid) -+ - SCHED_TIME (e->src->cuid) + ii) / ii; - -- if (SCHED_ROW (e->dest) == SCHED_ROW (e->src) -- && SCHED_COLUMN (e->dest) < SCHED_COLUMN (e->src)) -+ if (SCHED_ROW (e->dest->cuid) == SCHED_ROW (e->src->cuid) -+ && SCHED_COLUMN (e->dest->cuid) < SCHED_COLUMN (e->src->cuid)) - dest_copy--; - - if (dest_copy) -- SET_BIT (uses_of_defs[dest_copy - 1], e->dest->cuid); -- } -+ { -+ ps_reg_move_info *move; - -- /* Now generate the reg_moves, attaching relevant uses to them. */ -- SCHED_NREG_MOVES (u) = nreg_moves; -- old_reg = prev_reg = copy_rtx (SET_DEST (single_set (u->insn))); -- /* Insert the reg-moves right before the notes which precede -- the insn they relates to. */ -- last_reg_move = u->first_note; -+ move = ps_reg_move (ps, first_move + dest_copy - 1); -+ SET_BIT (move->uses, e->dest->cuid); -+ if (e->distance == 1) -+ SET_BIT (distance1_uses, e->dest->cuid); -+ } -+ } - -+ must_follow = sbitmap_alloc (first_move + nreg_moves); - for (i_reg_move = 0; i_reg_move < nreg_moves; i_reg_move++) -- { -- unsigned int i_use = 0; -- rtx new_reg = gen_reg_rtx (GET_MODE (prev_reg)); -- rtx reg_move = gen_move_insn (new_reg, prev_reg); -- sbitmap_iterator sbi; -- -- add_insn_before (reg_move, last_reg_move, NULL); -- last_reg_move = reg_move; -- -- if (!SCHED_FIRST_REG_MOVE (u)) -- SCHED_FIRST_REG_MOVE (u) = reg_move; -- -- EXECUTE_IF_SET_IN_SBITMAP (uses_of_defs[i_reg_move], 0, i_use, sbi) -- { -- struct undo_replace_buff_elem *rep; -- -- rep = (struct undo_replace_buff_elem *) -- xcalloc (1, sizeof (struct undo_replace_buff_elem)); -- rep->insn = g->nodes[i_use].insn; -- rep->orig_reg = old_reg; -- rep->new_reg = new_reg; -- -- if (! reg_move_replaces) -- reg_move_replaces = rep; -- else -- { -- rep->next = reg_move_replaces; -- reg_move_replaces = rep; -- } -- -- replace_rtx (g->nodes[i_use].insn, old_reg, new_reg); -- if (rescan) -- df_insn_rescan (g->nodes[i_use].insn); -- } -- -- prev_reg = new_reg; -- } -- sbitmap_vector_free (uses_of_defs); -+ if (!schedule_reg_move (ps, first_move + i_reg_move, -+ distance1_uses, must_follow)) -+ break; -+ sbitmap_free (must_follow); -+ if (distance1_uses) -+ sbitmap_free (distance1_uses); -+ if (i_reg_move < nreg_moves) -+ return false; - } -- return reg_move_replaces; -+ return true; - } - --/* Free memory allocated for the undo buffer. */ -+/* Emit the moves associatied with PS. Apply the substitutions -+ associated with them. */ - static void --free_undo_replace_buff (struct undo_replace_buff_elem *reg_move_replaces) -+apply_reg_moves (partial_schedule_ptr ps) - { -+ ps_reg_move_info *move; -+ int i; - -- while (reg_move_replaces) -+ FOR_EACH_VEC_ELT (ps_reg_move_info, ps->reg_moves, i, move) - { -- struct undo_replace_buff_elem *rep = reg_move_replaces; -+ unsigned int i_use; -+ sbitmap_iterator sbi; - -- reg_move_replaces = reg_move_replaces->next; -- free (rep); -+ EXECUTE_IF_SET_IN_SBITMAP (move->uses, 0, i_use, sbi) -+ { -+ replace_rtx (ps->g->nodes[i_use].insn, move->old_reg, move->new_reg); -+ df_insn_rescan (ps->g->nodes[i_use].insn); -+ } - } - } - --/* Bump the SCHED_TIMEs of all nodes to start from zero. Set the values -- of SCHED_ROW and SCHED_STAGE. */ -+/* Bump the SCHED_TIMEs of all nodes by AMOUNT. Set the values of -+ SCHED_ROW and SCHED_STAGE. */ - static void --normalize_sched_times (partial_schedule_ptr ps) -+reset_sched_times (partial_schedule_ptr ps, int amount) - { - int row; -- int amount = PS_MIN_CYCLE (ps); - int ii = ps->ii; - ps_insn_ptr crr_insn; - - for (row = 0; row < ii; row++) - for (crr_insn = ps->rows[row]; crr_insn; crr_insn = crr_insn->next_in_row) - { -- ddg_node_ptr u = crr_insn->node; -+ int u = crr_insn->id; - int normalized_time = SCHED_TIME (u) - amount; -+ int new_min_cycle = PS_MIN_CYCLE (ps) - amount; - -- if (dump_file) -- fprintf (dump_file, "crr_insn->node=%d, crr_insn->cycle=%d,\ -- min_cycle=%d\n", crr_insn->node->cuid, SCHED_TIME -- (u), ps->min_cycle); -+ if (dump_file) -+ { -+ /* Print the scheduling times after the rotation. */ -+ rtx insn = ps_rtl_insn (ps, u); -+ -+ fprintf (dump_file, "crr_insn->node=%d (insn id %d), " -+ "crr_insn->cycle=%d, min_cycle=%d", u, -+ INSN_UID (insn), normalized_time, new_min_cycle); -+ if (JUMP_P (insn)) -+ fprintf (dump_file, " (branch)"); -+ fprintf (dump_file, "\n"); -+ } -+ - gcc_assert (SCHED_TIME (u) >= ps->min_cycle); - gcc_assert (SCHED_TIME (u) <= ps->max_cycle); -- SCHED_TIME (u) = normalized_time; -- SCHED_ROW (u) = normalized_time % ii; -- SCHED_STAGE (u) = normalized_time / ii; -- } --} -- --/* Set SCHED_COLUMN of each node according to its position in PS. */ --static void --set_columns_for_ps (partial_schedule_ptr ps) --{ -- int row; -- -- for (row = 0; row < ps->ii; row++) -- { -- ps_insn_ptr cur_insn = ps->rows[row]; -- int column = 0; - -- for (; cur_insn; cur_insn = cur_insn->next_in_row) -- SCHED_COLUMN (cur_insn->node) = column++; -- } -+ crr_insn->cycle = normalized_time; -+ update_node_sched_params (u, ii, normalized_time, new_min_cycle); -+ } - } -- -+ - /* Permute the insns according to their order in PS, from row 0 to - row ii-1, and position them right before LAST. This schedules - the insns of the loop kernel. */ -@@ -625,14 +890,220 @@ - - for (row = 0; row < ii ; row++) - for (ps_ij = ps->rows[row]; ps_ij; ps_ij = ps_ij->next_in_row) -- if (PREV_INSN (last) != ps_ij->node->insn) -- reorder_insns_nobb (ps_ij->node->first_note, ps_ij->node->insn, -- PREV_INSN (last)); -+ { -+ rtx insn = ps_rtl_insn (ps, ps_ij->id); -+ -+ if (PREV_INSN (last) != insn) -+ { -+ if (ps_ij->id < ps->g->num_nodes) -+ reorder_insns_nobb (ps_first_note (ps, ps_ij->id), insn, -+ PREV_INSN (last)); -+ else -+ add_insn_before (insn, last, NULL); -+ } -+ } -+} -+ -+/* Set bitmaps TMP_FOLLOW and TMP_PRECEDE to MUST_FOLLOW and MUST_PRECEDE -+ respectively only if cycle C falls on the border of the scheduling -+ window boundaries marked by START and END cycles. STEP is the -+ direction of the window. */ -+static inline void -+set_must_precede_follow (sbitmap *tmp_follow, sbitmap must_follow, -+ sbitmap *tmp_precede, sbitmap must_precede, int c, -+ int start, int end, int step) -+{ -+ *tmp_precede = NULL; -+ *tmp_follow = NULL; -+ -+ if (c == start) -+ { -+ if (step == 1) -+ *tmp_precede = must_precede; -+ else /* step == -1. */ -+ *tmp_follow = must_follow; -+ } -+ if (c == end - step) -+ { -+ if (step == 1) -+ *tmp_follow = must_follow; -+ else /* step == -1. */ -+ *tmp_precede = must_precede; -+ } -+ -+} -+ -+/* Return True if the branch can be moved to row ii-1 while -+ normalizing the partial schedule PS to start from cycle zero and thus -+ optimize the SC. Otherwise return False. */ -+static bool -+optimize_sc (partial_schedule_ptr ps, ddg_ptr g) -+{ -+ int amount = PS_MIN_CYCLE (ps); -+ sbitmap sched_nodes = sbitmap_alloc (g->num_nodes); -+ int start, end, step; -+ int ii = ps->ii; -+ bool ok = false; -+ int stage_count, stage_count_curr; -+ -+ /* Compare the SC after normalization and SC after bringing the branch -+ to row ii-1. If they are equal just bail out. */ -+ stage_count = calculate_stage_count (ps, amount); -+ stage_count_curr = -+ calculate_stage_count (ps, SCHED_TIME (g->closing_branch->cuid) - (ii - 1)); -+ -+ if (stage_count == stage_count_curr) -+ { -+ if (dump_file) -+ fprintf (dump_file, "SMS SC already optimized.\n"); -+ -+ ok = false; -+ goto clear; -+ } -+ -+ if (dump_file) -+ { -+ fprintf (dump_file, "SMS Trying to optimize branch location\n"); -+ fprintf (dump_file, "SMS partial schedule before trial:\n"); -+ print_partial_schedule (ps, dump_file); -+ } -+ -+ /* First, normalize the partial scheduling. */ -+ reset_sched_times (ps, amount); -+ rotate_partial_schedule (ps, amount); -+ if (dump_file) -+ { -+ fprintf (dump_file, -+ "SMS partial schedule after normalization (ii, %d, SC %d):\n", -+ ii, stage_count); -+ print_partial_schedule (ps, dump_file); -+ } -+ -+ if (SMODULO (SCHED_TIME (g->closing_branch->cuid), ii) == ii - 1) -+ { -+ ok = true; -+ goto clear; -+ } -+ -+ sbitmap_ones (sched_nodes); -+ -+ /* Calculate the new placement of the branch. It should be in row -+ ii-1 and fall into it's scheduling window. */ -+ if (get_sched_window (ps, g->closing_branch, sched_nodes, ii, &start, -+ &step, &end) == 0) -+ { -+ bool success; -+ ps_insn_ptr next_ps_i; -+ int branch_cycle = SCHED_TIME (g->closing_branch->cuid); -+ int row = SMODULO (branch_cycle, ps->ii); -+ int num_splits = 0; -+ sbitmap must_precede, must_follow, tmp_precede, tmp_follow; -+ int c; -+ -+ if (dump_file) -+ fprintf (dump_file, "\nTrying to schedule node %d " -+ "INSN = %d in (%d .. %d) step %d\n", -+ g->closing_branch->cuid, -+ (INSN_UID (g->closing_branch->insn)), start, end, step); -+ -+ gcc_assert ((step > 0 && start < end) || (step < 0 && start > end)); -+ if (step == 1) -+ { -+ c = start + ii - SMODULO (start, ii) - 1; -+ gcc_assert (c >= start); -+ if (c >= end) -+ { -+ ok = false; -+ if (dump_file) -+ fprintf (dump_file, -+ "SMS failed to schedule branch at cycle: %d\n", c); -+ goto clear; -+ } -+ } -+ else -+ { -+ c = start - SMODULO (start, ii) - 1; -+ gcc_assert (c <= start); -+ -+ if (c <= end) -+ { -+ if (dump_file) -+ fprintf (dump_file, -+ "SMS failed to schedule branch at cycle: %d\n", c); -+ ok = false; -+ goto clear; -+ } -+ } -+ -+ must_precede = sbitmap_alloc (g->num_nodes); -+ must_follow = sbitmap_alloc (g->num_nodes); -+ -+ /* Try to schedule the branch is it's new cycle. */ -+ calculate_must_precede_follow (g->closing_branch, start, end, -+ step, ii, sched_nodes, -+ must_precede, must_follow); -+ -+ set_must_precede_follow (&tmp_follow, must_follow, &tmp_precede, -+ must_precede, c, start, end, step); -+ -+ /* Find the element in the partial schedule related to the closing -+ branch so we can remove it from it's current cycle. */ -+ for (next_ps_i = ps->rows[row]; -+ next_ps_i; next_ps_i = next_ps_i->next_in_row) -+ if (next_ps_i->id == g->closing_branch->cuid) -+ break; -+ -+ remove_node_from_ps (ps, next_ps_i); -+ success = -+ try_scheduling_node_in_cycle (ps, g->closing_branch->cuid, c, -+ sched_nodes, &num_splits, -+ tmp_precede, tmp_follow); -+ gcc_assert (num_splits == 0); -+ if (!success) -+ { -+ if (dump_file) -+ fprintf (dump_file, -+ "SMS failed to schedule branch at cycle: %d, " -+ "bringing it back to cycle %d\n", c, branch_cycle); -+ -+ /* The branch was failed to be placed in row ii - 1. -+ Put it back in it's original place in the partial -+ schedualing. */ -+ set_must_precede_follow (&tmp_follow, must_follow, &tmp_precede, -+ must_precede, branch_cycle, start, end, -+ step); -+ success = -+ try_scheduling_node_in_cycle (ps, g->closing_branch->cuid, -+ branch_cycle, sched_nodes, -+ &num_splits, tmp_precede, -+ tmp_follow); -+ gcc_assert (success && (num_splits == 0)); -+ ok = false; -+ } -+ else -+ { -+ /* The branch is placed in row ii - 1. */ -+ if (dump_file) -+ fprintf (dump_file, -+ "SMS success in moving branch to cycle %d\n", c); -+ -+ update_node_sched_params (g->closing_branch->cuid, ii, c, -+ PS_MIN_CYCLE (ps)); -+ ok = true; -+ } -+ -+ free (must_precede); -+ free (must_follow); -+ } -+ -+clear: -+ free (sched_nodes); -+ return ok; - } - - static void - duplicate_insns_of_cycles (partial_schedule_ptr ps, int from_stage, -- int to_stage, int for_prolog, rtx count_reg) -+ int to_stage, rtx count_reg) - { - int row; - ps_insn_ptr ps_ij; -@@ -640,59 +1111,30 @@ - for (row = 0; row < ps->ii; row++) - for (ps_ij = ps->rows[row]; ps_ij; ps_ij = ps_ij->next_in_row) - { -- ddg_node_ptr u_node = ps_ij->node; -- int j, i_reg_moves; -- rtx reg_move = NULL_RTX; -+ int u = ps_ij->id; -+ int first_u, last_u; -+ rtx u_insn; - - /* Do not duplicate any insn which refers to count_reg as it - belongs to the control part. -+ The closing branch is scheduled as well and thus should -+ be ignored. - TODO: This should be done by analyzing the control part of - the loop. */ -- if (reg_mentioned_p (count_reg, u_node->insn)) -+ u_insn = ps_rtl_insn (ps, u); -+ if (reg_mentioned_p (count_reg, u_insn) -+ || JUMP_P (u_insn)) - continue; - -- if (for_prolog) -- { -- /* SCHED_STAGE (u_node) >= from_stage == 0. Generate increasing -- number of reg_moves starting with the second occurrence of -- u_node, which is generated if its SCHED_STAGE <= to_stage. */ -- i_reg_moves = to_stage - SCHED_STAGE (u_node) + 1; -- i_reg_moves = MAX (i_reg_moves, 0); -- i_reg_moves = MIN (i_reg_moves, SCHED_NREG_MOVES (u_node)); -- -- /* The reg_moves start from the *first* reg_move backwards. */ -- if (i_reg_moves) -- { -- reg_move = SCHED_FIRST_REG_MOVE (u_node); -- for (j = 1; j < i_reg_moves; j++) -- reg_move = PREV_INSN (reg_move); -- } -- } -- else /* It's for the epilog. */ -+ first_u = SCHED_STAGE (u); -+ last_u = first_u + ps_num_consecutive_stages (ps, u) - 1; -+ if (from_stage <= last_u && to_stage >= first_u) - { -- /* SCHED_STAGE (u_node) <= to_stage. Generate all reg_moves, -- starting to decrease one stage after u_node no longer occurs; -- that is, generate all reg_moves until -- SCHED_STAGE (u_node) == from_stage - 1. */ -- i_reg_moves = SCHED_NREG_MOVES (u_node) -- - (from_stage - SCHED_STAGE (u_node) - 1); -- i_reg_moves = MAX (i_reg_moves, 0); -- i_reg_moves = MIN (i_reg_moves, SCHED_NREG_MOVES (u_node)); -- -- /* The reg_moves start from the *last* reg_move forwards. */ -- if (i_reg_moves) -- { -- reg_move = SCHED_FIRST_REG_MOVE (u_node); -- for (j = 1; j < SCHED_NREG_MOVES (u_node); j++) -- reg_move = PREV_INSN (reg_move); -- } -+ if (u < ps->g->num_nodes) -+ duplicate_insn_chain (ps_first_note (ps, u), u_insn); -+ else -+ emit_insn (copy_rtx (PATTERN (u_insn))); - } -- -- for (j = 0; j < i_reg_moves; j++, reg_move = NEXT_INSN (reg_move)) -- emit_insn (copy_rtx (PATTERN (reg_move))); -- if (SCHED_STAGE (u_node) >= from_stage -- && SCHED_STAGE (u_node) <= to_stage) -- duplicate_insn_chain (u_node->first_note, u_node->insn); - } - } - -@@ -726,11 +1168,13 @@ - } - - for (i = 0; i < last_stage; i++) -- duplicate_insns_of_cycles (ps, 0, i, 1, count_reg); -+ duplicate_insns_of_cycles (ps, 0, i, count_reg); - - /* Put the prolog on the entry edge. */ - e = loop_preheader_edge (loop); - split_edge_and_insert (e, get_insns ()); -+ if (!flag_resched_modulo_sched) -+ e->dest->flags |= BB_DISABLE_SCHEDULE; - - end_sequence (); - -@@ -738,15 +1182,30 @@ - start_sequence (); - - for (i = 0; i < last_stage; i++) -- duplicate_insns_of_cycles (ps, i + 1, last_stage, 0, count_reg); -+ duplicate_insns_of_cycles (ps, i + 1, last_stage, count_reg); - - /* Put the epilogue on the exit edge. */ - gcc_assert (single_exit (loop)); - e = single_exit (loop); - split_edge_and_insert (e, get_insns ()); -+ if (!flag_resched_modulo_sched) -+ e->dest->flags |= BB_DISABLE_SCHEDULE; -+ - end_sequence (); - } - -+/* Mark LOOP as software pipelined so the later -+ scheduling passes don't touch it. */ -+static void -+mark_loop_unsched (struct loop *loop) -+{ -+ unsigned i; -+ basic_block *bbs = get_loop_body (loop); -+ -+ for (i = 0; i < loop->num_nodes; i++) -+ bbs[i]->flags |= BB_DISABLE_SCHEDULE; -+} -+ - /* Return true if all the BBs of the loop are empty except the - loop header. */ - static bool -@@ -1009,10 +1468,10 @@ - continue; - } - -- /* Don't handle BBs with calls or barriers, or !single_set insns, -- or auto-increment insns (to avoid creating invalid reg-moves -- for the auto-increment insns). -- ??? Should handle auto-increment insns. -+ /* Don't handle BBs with calls or barriers -+ or !single_set with the exception of instructions that include -+ count_reg---these instructions are part of the control part -+ that do-loop recognizes. - ??? Should handle insns defining subregs. */ - for (insn = head; insn != NEXT_INSN (tail); insn = NEXT_INSN (insn)) - { -@@ -1021,8 +1480,8 @@ - if (CALL_P (insn) - || BARRIER_P (insn) - || (NONDEBUG_INSN_P (insn) && !JUMP_P (insn) -- && !single_set (insn) && GET_CODE (PATTERN (insn)) != USE) -- || (FIND_REG_INC_NOTE (insn, NULL_RTX) != 0) -+ && !single_set (insn) && GET_CODE (PATTERN (insn)) != USE -+ && !reg_mentioned_p (count_reg, insn)) - || (INSN_P (insn) && (set = single_set (insn)) - && GET_CODE (SET_DEST (set)) == SUBREG)) - break; -@@ -1036,8 +1495,6 @@ - fprintf (dump_file, "SMS loop-with-call\n"); - else if (BARRIER_P (insn)) - fprintf (dump_file, "SMS loop-with-barrier\n"); -- else if (FIND_REG_INC_NOTE (insn, NULL_RTX) != 0) -- fprintf (dump_file, "SMS reg inc\n"); - else if ((NONDEBUG_INSN_P (insn) && !JUMP_P (insn) - && !single_set (insn) && GET_CODE (PATTERN (insn)) != USE)) - fprintf (dump_file, "SMS loop-with-not-single-set\n"); -@@ -1049,7 +1506,11 @@ - continue; - } - -- if (! (g = create_ddg (bb, 0))) -+ /* Always schedule the closing branch with the rest of the -+ instructions. The branch is rotated to be in row ii-1 at the -+ end of the scheduling procedure to make sure it's the last -+ instruction in the iteration. */ -+ if (! (g = create_ddg (bb, 1))) - { - if (dump_file) - fprintf (dump_file, "SMS create_ddg failed\n"); -@@ -1072,9 +1533,9 @@ - { - rtx head, tail; - rtx count_reg, count_init; -- int mii, rec_mii; -- unsigned stage_count = 0; -+ int mii, rec_mii, stage_count, min_cycle; - HOST_WIDEST_INT loop_count = 0; -+ bool opt_sc_p; - - if (! (g = g_arr[loop->num])) - continue; -@@ -1151,63 +1612,103 @@ - fprintf (dump_file, "SMS iis %d %d %d (rec_mii, mii, maxii)\n", - rec_mii, mii, maxii); - -- /* After sms_order_nodes and before sms_schedule_by_order, to copy over -- ASAP. */ -- set_node_sched_params (g); -- -- ps = sms_schedule_by_order (g, mii, maxii, node_order); -- -- if (ps){ -- stage_count = PS_STAGE_COUNT (ps); -- gcc_assert(stage_count >= 1); -- } -- -- /* Stage count of 1 means that there is no interleaving between -- iterations, let the scheduling passes do the job. */ -- if (stage_count <= 1 -- || (count_init && (loop_count <= stage_count)) -- || (flag_branch_probabilities && (trip_count <= stage_count))) -+ for (;;) - { -- if (dump_file) -+ set_node_sched_params (g); -+ -+ stage_count = 0; -+ opt_sc_p = false; -+ ps = sms_schedule_by_order (g, mii, maxii, node_order); -+ -+ if (ps) - { -- fprintf (dump_file, "SMS failed... \n"); -- fprintf (dump_file, "SMS sched-failed (stage-count=%d, loop-count=", stage_count); -- fprintf (dump_file, HOST_WIDEST_INT_PRINT_DEC, loop_count); -- fprintf (dump_file, ", trip-count="); -- fprintf (dump_file, HOST_WIDEST_INT_PRINT_DEC, trip_count); -- fprintf (dump_file, ")\n"); -- } -- continue; -- } -- else -- { -- struct undo_replace_buff_elem *reg_move_replaces; -+ /* Try to achieve optimized SC by normalizing the partial -+ schedule (having the cycles start from cycle zero). -+ The branch location must be placed in row ii-1 in the -+ final scheduling. If failed, shift all instructions to -+ position the branch in row ii-1. */ -+ opt_sc_p = optimize_sc (ps, g); -+ if (opt_sc_p) -+ stage_count = calculate_stage_count (ps, 0); -+ else -+ { -+ /* Bring the branch to cycle ii-1. */ -+ int amount = (SCHED_TIME (g->closing_branch->cuid) -+ - (ps->ii - 1)); -+ -+ if (dump_file) -+ fprintf (dump_file, "SMS schedule branch at cycle ii-1\n"); - -- if (dump_file) -+ stage_count = calculate_stage_count (ps, amount); -+ } -+ -+ gcc_assert (stage_count >= 1); -+ } -+ -+ /* The default value of PARAM_SMS_MIN_SC is 2 as stage count of -+ 1 means that there is no interleaving between iterations thus -+ we let the scheduling passes do the job in this case. */ -+ if (stage_count < PARAM_VALUE (PARAM_SMS_MIN_SC) -+ || (count_init && (loop_count <= stage_count)) -+ || (flag_branch_probabilities && (trip_count <= stage_count))) - { -- fprintf (dump_file, -- "SMS succeeded %d %d (with ii, sc)\n", ps->ii, -- stage_count); -- print_partial_schedule (ps, dump_file); -- fprintf (dump_file, -- "SMS Branch (%d) will later be scheduled at cycle %d.\n", -- g->closing_branch->cuid, PS_MIN_CYCLE (ps) - 1); -+ if (dump_file) -+ { -+ fprintf (dump_file, "SMS failed... \n"); -+ fprintf (dump_file, "SMS sched-failed (stage-count=%d," -+ " loop-count=", stage_count); -+ fprintf (dump_file, HOST_WIDEST_INT_PRINT_DEC, loop_count); -+ fprintf (dump_file, ", trip-count="); -+ fprintf (dump_file, HOST_WIDEST_INT_PRINT_DEC, trip_count); -+ fprintf (dump_file, ")\n"); -+ } -+ break; - } - -- /* Set the stage boundaries. If the DDG is built with closing_branch_deps, -- the closing_branch was scheduled and should appear in the last (ii-1) -- row. Otherwise, we are free to schedule the branch, and we let nodes -- that were scheduled at the first PS_MIN_CYCLE cycle appear in the first -- row; this should reduce stage_count to minimum. -- TODO: Revisit the issue of scheduling the insns of the -- control part relative to the branch when the control part -- has more than one insn. */ -- normalize_sched_times (ps); -- rotate_partial_schedule (ps, PS_MIN_CYCLE (ps)); -+ if (!opt_sc_p) -+ { -+ /* Rotate the partial schedule to have the branch in row ii-1. */ -+ int amount = SCHED_TIME (g->closing_branch->cuid) - (ps->ii - 1); -+ -+ reset_sched_times (ps, amount); -+ rotate_partial_schedule (ps, amount); -+ } -+ - set_columns_for_ps (ps); - -+ min_cycle = PS_MIN_CYCLE (ps) - SMODULO (PS_MIN_CYCLE (ps), ps->ii); -+ if (!schedule_reg_moves (ps)) -+ { -+ mii = ps->ii + 1; -+ free_partial_schedule (ps); -+ continue; -+ } -+ -+ /* Moves that handle incoming values might have been added -+ to a new first stage. Bump the stage count if so. -+ -+ ??? Perhaps we could consider rotating the schedule here -+ instead? */ -+ if (PS_MIN_CYCLE (ps) < min_cycle) -+ { -+ reset_sched_times (ps, 0); -+ stage_count++; -+ } -+ -+ /* The stage count should now be correct without rotation. */ -+ gcc_checking_assert (stage_count == calculate_stage_count (ps, 0)); -+ PS_STAGE_COUNT (ps) = stage_count; -+ - canon_loop (loop); - -+ if (dump_file) -+ { -+ fprintf (dump_file, -+ "%s:%d SMS succeeded %d %d (with ii, sc)\n", -+ insn_file (tail), insn_line (tail), ps->ii, stage_count); -+ print_partial_schedule (ps, dump_file); -+ } -+ - /* case the BCT count is not known , Do loop-versioning */ - if (count_reg && ! count_init) - { -@@ -1230,23 +1731,23 @@ - permute_partial_schedule (ps, g->closing_branch->first_note); - - /* Mark this loop as software pipelined so the later -- scheduling passes doesn't touch it. */ -+ scheduling passes don't touch it. */ - if (! flag_resched_modulo_sched) -- g->bb->flags |= BB_DISABLE_SCHEDULE; -+ mark_loop_unsched (loop); -+ - /* The life-info is not valid any more. */ - df_set_bb_dirty (g->bb); - -- reg_move_replaces = generate_reg_moves (ps, true); -+ apply_reg_moves (ps); - if (dump_file) -- print_node_sched_params (dump_file, g->num_nodes, g); -+ print_node_sched_params (dump_file, g->num_nodes, ps); - /* Generate prolog and epilog. */ - generate_prolog_epilog (ps, loop, count_reg, count_init); -- -- free_undo_replace_buff (reg_move_replaces); -+ break; - } - - free_partial_schedule (ps); -- free (node_sched_params); -+ VEC_free (node_sched_params, heap, node_sched_param_vec); - free (node_order); - free_ddg (g); - } -@@ -1347,19 +1848,21 @@ - scheduling window is empty and zero otherwise. */ - - static int --get_sched_window (partial_schedule_ptr ps, int *nodes_order, int i, -- sbitmap sched_nodes, int ii, int *start_p, int *step_p, int *end_p) -+get_sched_window (partial_schedule_ptr ps, ddg_node_ptr u_node, -+ sbitmap sched_nodes, int ii, int *start_p, int *step_p, -+ int *end_p) - { - int start, step, end; -+ int early_start, late_start; - ddg_edge_ptr e; -- int u = nodes_order [i]; -- ddg_node_ptr u_node = &ps->g->nodes[u]; - sbitmap psp = sbitmap_alloc (ps->g->num_nodes); - sbitmap pss = sbitmap_alloc (ps->g->num_nodes); - sbitmap u_node_preds = NODE_PREDECESSORS (u_node); - sbitmap u_node_succs = NODE_SUCCESSORS (u_node); - int psp_not_empty; - int pss_not_empty; -+ int count_preds; -+ int count_succs; - - /* 1. compute sched window for u (start, end, step). */ - sbitmap_zero (psp); -@@ -1367,214 +1870,119 @@ - psp_not_empty = sbitmap_a_and_b_cg (psp, u_node_preds, sched_nodes); - pss_not_empty = sbitmap_a_and_b_cg (pss, u_node_succs, sched_nodes); - -- if (psp_not_empty && !pss_not_empty) -- { -- int early_start = INT_MIN; -- -- end = INT_MAX; -- for (e = u_node->in; e != 0; e = e->next_in) -- { -- ddg_node_ptr v_node = e->src; -- -- if (dump_file) -- { -- fprintf (dump_file, "\nProcessing edge: "); -- print_ddg_edge (dump_file, e); -- fprintf (dump_file, -- "\nScheduling %d (%d) in psp_not_empty," -- " checking p %d (%d): ", u_node->cuid, -- INSN_UID (u_node->insn), v_node->cuid, INSN_UID -- (v_node->insn)); -- } -- -- if (TEST_BIT (sched_nodes, v_node->cuid)) -- { -- int p_st = SCHED_TIME (v_node); -- -- early_start = -- MAX (early_start, p_st + e->latency - (e->distance * ii)); -- -- if (dump_file) -- fprintf (dump_file, -- "pred st = %d; early_start = %d; latency: %d", -- p_st, early_start, e->latency); -+ /* We first compute a forward range (start <= end), then decide whether -+ to reverse it. */ -+ early_start = INT_MIN; -+ late_start = INT_MAX; -+ start = INT_MIN; -+ end = INT_MAX; -+ step = 1; -+ -+ count_preds = 0; -+ count_succs = 0; -+ -+ if (dump_file && (psp_not_empty || pss_not_empty)) -+ { -+ fprintf (dump_file, "\nAnalyzing dependencies for node %d (INSN %d)" -+ "; ii = %d\n\n", u_node->cuid, INSN_UID (u_node->insn), ii); -+ fprintf (dump_file, "%11s %11s %11s %11s %5s\n", -+ "start", "early start", "late start", "end", "time"); -+ fprintf (dump_file, "=========== =========== =========== ===========" -+ " =====\n"); -+ } -+ /* Calculate early_start and limit end. Both bounds are inclusive. */ -+ if (psp_not_empty) -+ for (e = u_node->in; e != 0; e = e->next_in) -+ { -+ int v = e->src->cuid; - -- if (e->data_type == MEM_DEP) -- end = MIN (end, SCHED_TIME (v_node) + ii - 1); -- } -- else if (dump_file) -- fprintf (dump_file, "the node is not scheduled\n"); -- } -- start = early_start; -- end = MIN (end, early_start + ii); -- /* Schedule the node close to it's predecessors. */ -- step = 1; -+ if (TEST_BIT (sched_nodes, v)) -+ { -+ int p_st = SCHED_TIME (v); -+ int earliest = p_st + e->latency - (e->distance * ii); -+ int latest = (e->data_type == MEM_DEP ? p_st + ii - 1 : INT_MAX); - -- if (dump_file) -- fprintf (dump_file, -- "\nScheduling %d (%d) in a window (%d..%d) with step %d\n", -- u_node->cuid, INSN_UID (u_node->insn), start, end, step); -- } -+ if (dump_file) -+ { -+ fprintf (dump_file, "%11s %11d %11s %11d %5d", -+ "", earliest, "", latest, p_st); -+ print_ddg_edge (dump_file, e); -+ fprintf (dump_file, "\n"); -+ } - -- else if (!psp_not_empty && pss_not_empty) -- { -- int late_start = INT_MAX; -+ early_start = MAX (early_start, earliest); -+ end = MIN (end, latest); - -- end = INT_MIN; -- for (e = u_node->out; e != 0; e = e->next_out) -- { -- ddg_node_ptr v_node = e->dest; -+ if (e->type == TRUE_DEP && e->data_type == REG_DEP) -+ count_preds++; -+ } -+ } - -- if (dump_file) -- { -- fprintf (dump_file, "\nProcessing edge:"); -- print_ddg_edge (dump_file, e); -- fprintf (dump_file, -- "\nScheduling %d (%d) in pss_not_empty," -- " checking s %d (%d): ", u_node->cuid, -- INSN_UID (u_node->insn), v_node->cuid, INSN_UID -- (v_node->insn)); -- } -+ /* Calculate late_start and limit start. Both bounds are inclusive. */ -+ if (pss_not_empty) -+ for (e = u_node->out; e != 0; e = e->next_out) -+ { -+ int v = e->dest->cuid; - -- if (TEST_BIT (sched_nodes, v_node->cuid)) -- { -- int s_st = SCHED_TIME (v_node); -+ if (TEST_BIT (sched_nodes, v)) -+ { -+ int s_st = SCHED_TIME (v); -+ int earliest = (e->data_type == MEM_DEP ? s_st - ii + 1 : INT_MIN); -+ int latest = s_st - e->latency + (e->distance * ii); - -- late_start = MIN (late_start, -- s_st - e->latency + (e->distance * ii)); -+ if (dump_file) -+ { -+ fprintf (dump_file, "%11d %11s %11d %11s %5d", -+ earliest, "", latest, "", s_st); -+ print_ddg_edge (dump_file, e); -+ fprintf (dump_file, "\n"); -+ } - -- if (dump_file) -- fprintf (dump_file, -- "succ st = %d; late_start = %d; latency = %d", -- s_st, late_start, e->latency); -- -- if (e->data_type == MEM_DEP) -- end = MAX (end, SCHED_TIME (v_node) - ii + 1); -- if (dump_file) -- fprintf (dump_file, "end = %d\n", end); -+ start = MAX (start, earliest); -+ late_start = MIN (late_start, latest); - -- } -- else if (dump_file) -- fprintf (dump_file, "the node is not scheduled\n"); -+ if (e->type == TRUE_DEP && e->data_type == REG_DEP) -+ count_succs++; -+ } -+ } - -- } -- start = late_start; -- end = MAX (end, late_start - ii); -- /* Schedule the node close to it's successors. */ -+ if (dump_file && (psp_not_empty || pss_not_empty)) -+ { -+ fprintf (dump_file, "----------- ----------- ----------- -----------" -+ " -----\n"); -+ fprintf (dump_file, "%11d %11d %11d %11d %5s %s\n", -+ start, early_start, late_start, end, "", -+ "(max, max, min, min)"); -+ } -+ -+ /* Get a target scheduling window no bigger than ii. */ -+ if (early_start == INT_MIN && late_start == INT_MAX) -+ early_start = NODE_ASAP (u_node); -+ else if (early_start == INT_MIN) -+ early_start = late_start - (ii - 1); -+ late_start = MIN (late_start, early_start + (ii - 1)); -+ -+ /* Apply memory dependence limits. */ -+ start = MAX (start, early_start); -+ end = MIN (end, late_start); -+ -+ if (dump_file && (psp_not_empty || pss_not_empty)) -+ fprintf (dump_file, "%11s %11d %11d %11s %5s final window\n", -+ "", start, end, "", ""); -+ -+ /* If there are at least as many successors as predecessors, schedule the -+ node close to its successors. */ -+ if (pss_not_empty && count_succs >= count_preds) -+ { -+ int tmp = end; -+ end = start; -+ start = tmp; - step = -1; -- -- if (dump_file) -- fprintf (dump_file, -- "\nScheduling %d (%d) in a window (%d..%d) with step %d\n", -- u_node->cuid, INSN_UID (u_node->insn), start, end, step); -- - } - -- else if (psp_not_empty && pss_not_empty) -- { -- int early_start = INT_MIN; -- int late_start = INT_MAX; -- int count_preds = 0; -- int count_succs = 0; -- -- start = INT_MIN; -- end = INT_MAX; -- for (e = u_node->in; e != 0; e = e->next_in) -- { -- ddg_node_ptr v_node = e->src; -- -- if (dump_file) -- { -- fprintf (dump_file, "\nProcessing edge:"); -- print_ddg_edge (dump_file, e); -- fprintf (dump_file, -- "\nScheduling %d (%d) in psp_pss_not_empty," -- " checking p %d (%d): ", u_node->cuid, INSN_UID -- (u_node->insn), v_node->cuid, INSN_UID -- (v_node->insn)); -- } -- -- if (TEST_BIT (sched_nodes, v_node->cuid)) -- { -- int p_st = SCHED_TIME (v_node); -- -- early_start = MAX (early_start, -- p_st + e->latency -- - (e->distance * ii)); -- -- if (dump_file) -- fprintf (dump_file, -- "pred st = %d; early_start = %d; latency = %d", -- p_st, early_start, e->latency); -- -- if (e->type == TRUE_DEP && e->data_type == REG_DEP) -- count_preds++; -- -- if (e->data_type == MEM_DEP) -- end = MIN (end, SCHED_TIME (v_node) + ii - 1); -- } -- else if (dump_file) -- fprintf (dump_file, "the node is not scheduled\n"); -- -- } -- for (e = u_node->out; e != 0; e = e->next_out) -- { -- ddg_node_ptr v_node = e->dest; -- -- if (dump_file) -- { -- fprintf (dump_file, "\nProcessing edge:"); -- print_ddg_edge (dump_file, e); -- fprintf (dump_file, -- "\nScheduling %d (%d) in psp_pss_not_empty," -- " checking s %d (%d): ", u_node->cuid, INSN_UID -- (u_node->insn), v_node->cuid, INSN_UID -- (v_node->insn)); -- } -- -- if (TEST_BIT (sched_nodes, v_node->cuid)) -- { -- int s_st = SCHED_TIME (v_node); -- -- late_start = MIN (late_start, -- s_st - e->latency -- + (e->distance * ii)); -- -- if (dump_file) -- fprintf (dump_file, -- "succ st = %d; late_start = %d; latency = %d", -- s_st, late_start, e->latency); -- -- if (e->type == TRUE_DEP && e->data_type == REG_DEP) -- count_succs++; -- -- if (e->data_type == MEM_DEP) -- start = MAX (start, SCHED_TIME (v_node) - ii + 1); -- } -- else if (dump_file) -- fprintf (dump_file, "the node is not scheduled\n"); -- -- } -- start = MAX (start, early_start); -- end = MIN (end, MIN (early_start + ii, late_start + 1)); -- step = 1; -- /* If there are more successors than predecessors schedule the -- node close to it's successors. */ -- if (count_succs >= count_preds) -- { -- int old_start = start; -- -- start = end - 1; -- end = old_start - 1; -- step = -1; -- } -- } -- else /* psp is empty && pss is empty. */ -- { -- start = SCHED_ASAP (u_node); -- end = start + ii; -- step = 1; -- } -+ /* Now that we've finalized the window, make END an exclusive rather -+ than an inclusive bound. */ -+ end += step; - - *start_p = start; - *step_p = step; -@@ -1587,10 +1995,10 @@ - if (dump_file) - fprintf (dump_file, "\nEmpty window: start=%d, end=%d, step=%d\n", - start, end, step); -- return -1; -+ return -1; - } - -- return 0; -+ return 0; - } - - /* Calculate MUST_PRECEDE/MUST_FOLLOW bitmaps of U_NODE; which is the -@@ -1646,7 +2054,7 @@ - SCHED_TIME (e->src) - (e->distance * ii) == first_cycle_in_window */ - for (e = u_node->in; e != 0; e = e->next_in) - if (TEST_BIT (sched_nodes, e->src->cuid) -- && ((SCHED_TIME (e->src) - (e->distance * ii)) == -+ && ((SCHED_TIME (e->src->cuid) - (e->distance * ii)) == - first_cycle_in_window)) - { - if (dump_file) -@@ -1671,7 +2079,7 @@ - SCHED_TIME (e->dest) + (e->distance * ii) == last_cycle_in_window */ - for (e = u_node->out; e != 0; e = e->next_out) - if (TEST_BIT (sched_nodes, e->dest->cuid) -- && ((SCHED_TIME (e->dest) + (e->distance * ii)) == -+ && ((SCHED_TIME (e->dest->cuid) + (e->distance * ii)) == - last_cycle_in_window)) - { - if (dump_file) -@@ -1695,7 +2103,7 @@ - last row of the scheduling window) */ - - static bool --try_scheduling_node_in_cycle (partial_schedule_ptr ps, ddg_node_ptr u_node, -+try_scheduling_node_in_cycle (partial_schedule_ptr ps, - int u, int cycle, sbitmap sched_nodes, - int *num_splits, sbitmap must_precede, - sbitmap must_follow) -@@ -1704,11 +2112,10 @@ - bool success = 0; - - verify_partial_schedule (ps, sched_nodes); -- psi = ps_add_node_check_conflicts (ps, u_node, cycle, -- must_precede, must_follow); -+ psi = ps_add_node_check_conflicts (ps, u, cycle, must_precede, must_follow); - if (psi) - { -- SCHED_TIME (u_node) = cycle; -+ SCHED_TIME (u) = cycle; - SET_BIT (sched_nodes, u); - success = 1; - *num_splits = 0; -@@ -1760,23 +2167,17 @@ - continue; - } - -- if (JUMP_P (insn)) /* Closing branch handled later. */ -- { -- RESET_BIT (tobe_scheduled, u); -- continue; -- } -- - if (TEST_BIT (sched_nodes, u)) - continue; - - /* Try to get non-empty scheduling window. */ - success = 0; -- if (get_sched_window (ps, nodes_order, i, sched_nodes, ii, &start, -+ if (get_sched_window (ps, u_node, sched_nodes, ii, &start, - &step, &end) == 0) - { - if (dump_file) -- fprintf (dump_file, "\nTrying to schedule node %d \ -- INSN = %d in (%d .. %d) step %d\n", u, (INSN_UID -+ fprintf (dump_file, "\nTrying to schedule node %d " -+ "INSN = %d in (%d .. %d) step %d\n", u, (INSN_UID - (g->nodes[u].insn)), start, end, step); - - gcc_assert ((step > 0 && start < end) -@@ -1788,26 +2189,13 @@ - - for (c = start; c != end; c += step) - { -- sbitmap tmp_precede = NULL; -- sbitmap tmp_follow = NULL; -- -- if (c == start) -- { -- if (step == 1) -- tmp_precede = must_precede; -- else /* step == -1. */ -- tmp_follow = must_follow; -- } -- if (c == end - step) -- { -- if (step == 1) -- tmp_follow = must_follow; -- else /* step == -1. */ -- tmp_precede = must_precede; -- } -+ sbitmap tmp_precede, tmp_follow; - -+ set_must_precede_follow (&tmp_follow, must_follow, -+ &tmp_precede, must_precede, -+ c, start, end, step); - success = -- try_scheduling_node_in_cycle (ps, u_node, u, c, -+ try_scheduling_node_in_cycle (ps, u, c, - sched_nodes, - &num_splits, tmp_precede, - tmp_follow); -@@ -1883,6 +2271,7 @@ - int ii = ps->ii; - int new_ii = ii + 1; - int row; -+ int *rows_length_new; - - verify_partial_schedule (ps, sched_nodes); - -@@ -1893,18 +2282,20 @@ - if (dump_file) - fprintf (dump_file, "split_row=%d\n", split_row); - -- normalize_sched_times (ps); -- rotate_partial_schedule (ps, ps->min_cycle); -+ reset_sched_times (ps, PS_MIN_CYCLE (ps)); -+ rotate_partial_schedule (ps, PS_MIN_CYCLE (ps)); - - rows_new = (ps_insn_ptr *) xcalloc (new_ii, sizeof (ps_insn_ptr)); -+ rows_length_new = (int *) xcalloc (new_ii, sizeof (int)); - for (row = 0; row < split_row; row++) - { - rows_new[row] = ps->rows[row]; -+ rows_length_new[row] = ps->rows_length[row]; - ps->rows[row] = NULL; - for (crr_insn = rows_new[row]; - crr_insn; crr_insn = crr_insn->next_in_row) - { -- ddg_node_ptr u = crr_insn->node; -+ int u = crr_insn->id; - int new_time = SCHED_TIME (u) + (SCHED_TIME (u) / ii); - - SCHED_TIME (u) = new_time; -@@ -1920,11 +2311,12 @@ - for (row = split_row; row < ii; row++) - { - rows_new[row + 1] = ps->rows[row]; -+ rows_length_new[row + 1] = ps->rows_length[row]; - ps->rows[row] = NULL; - for (crr_insn = rows_new[row + 1]; - crr_insn; crr_insn = crr_insn->next_in_row) - { -- ddg_node_ptr u = crr_insn->node; -+ int u = crr_insn->id; - int new_time = SCHED_TIME (u) + (SCHED_TIME (u) / ii) + 1; - - SCHED_TIME (u) = new_time; -@@ -1941,6 +2333,8 @@ - + (SMODULO (ps->max_cycle, ii) >= split_row ? 1 : 0); - free (ps->rows); - ps->rows = rows_new; -+ free (ps->rows_length); -+ ps->rows_length = rows_length_new; - ps->ii = new_ii; - gcc_assert (ps->min_cycle >= 0); - -@@ -1962,24 +2356,24 @@ - { - ddg_edge_ptr e; - int lower = INT_MIN, upper = INT_MAX; -- ddg_node_ptr crit_pred = NULL; -- ddg_node_ptr crit_succ = NULL; -+ int crit_pred = -1; -+ int crit_succ = -1; - int crit_cycle; - - for (e = u_node->in; e != 0; e = e->next_in) - { -- ddg_node_ptr v_node = e->src; -+ int v = e->src->cuid; - -- if (TEST_BIT (sched_nodes, v_node->cuid) -- && (low == SCHED_TIME (v_node) + e->latency - (e->distance * ii))) -- if (SCHED_TIME (v_node) > lower) -+ if (TEST_BIT (sched_nodes, v) -+ && (low == SCHED_TIME (v) + e->latency - (e->distance * ii))) -+ if (SCHED_TIME (v) > lower) - { -- crit_pred = v_node; -- lower = SCHED_TIME (v_node); -+ crit_pred = v; -+ lower = SCHED_TIME (v); - } - } - -- if (crit_pred != NULL) -+ if (crit_pred >= 0) - { - crit_cycle = SCHED_TIME (crit_pred) + 1; - return SMODULO (crit_cycle, ii); -@@ -1987,17 +2381,18 @@ - - for (e = u_node->out; e != 0; e = e->next_out) - { -- ddg_node_ptr v_node = e->dest; -- if (TEST_BIT (sched_nodes, v_node->cuid) -- && (up == SCHED_TIME (v_node) - e->latency + (e->distance * ii))) -- if (SCHED_TIME (v_node) < upper) -+ int v = e->dest->cuid; -+ -+ if (TEST_BIT (sched_nodes, v) -+ && (up == SCHED_TIME (v) - e->latency + (e->distance * ii))) -+ if (SCHED_TIME (v) < upper) - { -- crit_succ = v_node; -- upper = SCHED_TIME (v_node); -+ crit_succ = v; -+ upper = SCHED_TIME (v); - } - } - -- if (crit_succ != NULL) -+ if (crit_succ >= 0) - { - crit_cycle = SCHED_TIME (crit_succ); - return SMODULO (crit_cycle, ii); -@@ -2016,16 +2411,23 @@ - ps_insn_ptr crr_insn; - - for (row = 0; row < ps->ii; row++) -- for (crr_insn = ps->rows[row]; crr_insn; crr_insn = crr_insn->next_in_row) -- { -- ddg_node_ptr u = crr_insn->node; -- -- gcc_assert (TEST_BIT (sched_nodes, u->cuid)); -- /* ??? Test also that all nodes of sched_nodes are in ps, perhaps by -- popcount (sched_nodes) == number of insns in ps. */ -- gcc_assert (SCHED_TIME (u) >= ps->min_cycle); -- gcc_assert (SCHED_TIME (u) <= ps->max_cycle); -- } -+ { -+ int length = 0; -+ -+ for (crr_insn = ps->rows[row]; crr_insn; crr_insn = crr_insn->next_in_row) -+ { -+ int u = crr_insn->id; -+ -+ length++; -+ gcc_assert (TEST_BIT (sched_nodes, u)); -+ /* ??? Test also that all nodes of sched_nodes are in ps, perhaps by -+ popcount (sched_nodes) == number of insns in ps. */ -+ gcc_assert (SCHED_TIME (u) >= ps->min_cycle); -+ gcc_assert (SCHED_TIME (u) <= ps->max_cycle); -+ } -+ -+ gcc_assert (ps->rows_length[row] == length); -+ } - } - - -@@ -2431,6 +2833,8 @@ - { - partial_schedule_ptr ps = XNEW (struct partial_schedule); - ps->rows = (ps_insn_ptr *) xcalloc (ii, sizeof (ps_insn_ptr)); -+ ps->rows_length = (int *) xcalloc (ii, sizeof (int)); -+ ps->reg_moves = NULL; - ps->ii = ii; - ps->history = history; - ps->min_cycle = INT_MAX; -@@ -2465,10 +2869,19 @@ - static void - free_partial_schedule (partial_schedule_ptr ps) - { -+ ps_reg_move_info *move; -+ unsigned int i; -+ - if (!ps) - return; -+ -+ FOR_EACH_VEC_ELT (ps_reg_move_info, ps->reg_moves, i, move) -+ sbitmap_free (move->uses); -+ VEC_free (ps_reg_move_info, heap, ps->reg_moves); -+ - free_ps_insns (ps); - free (ps->rows); -+ free (ps->rows_length); - free (ps); - } - -@@ -2486,6 +2899,8 @@ - ps->rows = (ps_insn_ptr *) xrealloc (ps->rows, new_ii - * sizeof (ps_insn_ptr)); - memset (ps->rows, 0, new_ii * sizeof (ps_insn_ptr)); -+ ps->rows_length = (int *) xrealloc (ps->rows_length, new_ii * sizeof (int)); -+ memset (ps->rows_length, 0, new_ii * sizeof (int)); - ps->ii = new_ii; - ps->min_cycle = INT_MAX; - ps->max_cycle = INT_MIN; -@@ -2505,8 +2920,13 @@ - fprintf (dump, "\n[ROW %d ]: ", i); - while (ps_i) - { -- fprintf (dump, "%d, ", -- INSN_UID (ps_i->node->insn)); -+ rtx insn = ps_rtl_insn (ps, ps_i->id); -+ -+ if (JUMP_P (insn)) -+ fprintf (dump, "%d (branch), ", INSN_UID (insn)); -+ else -+ fprintf (dump, "%d, ", INSN_UID (insn)); -+ - ps_i = ps_i->next_in_row; - } - } -@@ -2514,36 +2934,31 @@ - - /* Creates an object of PS_INSN and initializes it to the given parameters. */ - static ps_insn_ptr --create_ps_insn (ddg_node_ptr node, int rest_count, int cycle) -+create_ps_insn (int id, int cycle) - { - ps_insn_ptr ps_i = XNEW (struct ps_insn); - -- ps_i->node = node; -+ ps_i->id = id; - ps_i->next_in_row = NULL; - ps_i->prev_in_row = NULL; -- ps_i->row_rest_count = rest_count; - ps_i->cycle = cycle; - - return ps_i; - } - - --/* Removes the given PS_INSN from the partial schedule. Returns false if the -- node is not found in the partial schedule, else returns true. */ --static bool -+/* Removes the given PS_INSN from the partial schedule. */ -+static void - remove_node_from_ps (partial_schedule_ptr ps, ps_insn_ptr ps_i) - { - int row; - -- if (!ps || !ps_i) -- return false; -- -+ gcc_assert (ps && ps_i); -+ - row = SMODULO (ps_i->cycle, ps->ii); - if (! ps_i->prev_in_row) - { -- if (ps_i != ps->rows[row]) -- return false; -- -+ gcc_assert (ps_i == ps->rows[row]); - ps->rows[row] = ps_i->next_in_row; - if (ps->rows[row]) - ps->rows[row]->prev_in_row = NULL; -@@ -2554,8 +2969,10 @@ - if (ps_i->next_in_row) - ps_i->next_in_row->prev_in_row = ps_i->prev_in_row; - } -+ -+ ps->rows_length[row] -= 1; - free (ps_i); -- return true; -+ return; - } - - /* Unlike what literature describes for modulo scheduling (which focuses -@@ -2571,6 +2988,7 @@ - ps_insn_ptr next_ps_i; - ps_insn_ptr first_must_follow = NULL; - ps_insn_ptr last_must_precede = NULL; -+ ps_insn_ptr last_in_row = NULL; - int row; - - if (! ps_i) -@@ -2585,10 +3003,11 @@ - next_ps_i; - next_ps_i = next_ps_i->next_in_row) - { -- if (must_follow && TEST_BIT (must_follow, next_ps_i->node->cuid) -+ if (must_follow -+ && TEST_BIT (must_follow, next_ps_i->id) - && ! first_must_follow) - first_must_follow = next_ps_i; -- if (must_precede && TEST_BIT (must_precede, next_ps_i->node->cuid)) -+ if (must_precede && TEST_BIT (must_precede, next_ps_i->id)) - { - /* If we have already met a node that must follow, then - there is no possible column. */ -@@ -2597,8 +3016,37 @@ - else - last_must_precede = next_ps_i; - } -+ /* The closing branch must be the last in the row. */ -+ if (must_precede -+ && TEST_BIT (must_precede, next_ps_i->id) -+ && JUMP_P (ps_rtl_insn (ps, next_ps_i->id))) -+ return false; -+ -+ last_in_row = next_ps_i; - } - -+ /* The closing branch is scheduled as well. Make sure there is no -+ dependent instruction after it as the branch should be the last -+ instruction in the row. */ -+ if (JUMP_P (ps_rtl_insn (ps, ps_i->id))) -+ { -+ if (first_must_follow) -+ return false; -+ if (last_in_row) -+ { -+ /* Make the branch the last in the row. New instructions -+ will be inserted at the beginning of the row or after the -+ last must_precede instruction thus the branch is guaranteed -+ to remain the last instruction in the row. */ -+ last_in_row->next_in_row = ps_i; -+ ps_i->prev_in_row = last_in_row; -+ ps_i->next_in_row = NULL; -+ } -+ else -+ ps->rows[row] = ps_i; -+ return true; -+ } -+ - /* Now insert the node after INSERT_AFTER_PSI. */ - - if (! last_must_precede) -@@ -2631,7 +3079,6 @@ - { - ps_insn_ptr prev, next; - int row; -- ddg_node_ptr next_node; - - if (!ps || !ps_i) - return false; -@@ -2641,11 +3088,9 @@ - if (! ps_i->next_in_row) - return false; - -- next_node = ps_i->next_in_row->node; -- - /* Check if next_in_row is dependent on ps_i, both having same sched - times (typically ANTI_DEP). If so, ps_i cannot skip over it. */ -- if (must_follow && TEST_BIT (must_follow, next_node->cuid)) -+ if (must_follow && TEST_BIT (must_follow, ps_i->next_in_row->id)) - return false; - - /* Advance PS_I over its next_in_row in the doubly linked list. */ -@@ -2676,21 +3121,16 @@ - before/after (respectively) the node pointed to by PS_I when scheduled - in the same cycle. */ - static ps_insn_ptr --add_node_to_ps (partial_schedule_ptr ps, ddg_node_ptr node, int cycle, -+add_node_to_ps (partial_schedule_ptr ps, int id, int cycle, - sbitmap must_precede, sbitmap must_follow) - { - ps_insn_ptr ps_i; -- int rest_count = 1; - int row = SMODULO (cycle, ps->ii); - -- if (ps->rows[row] -- && ps->rows[row]->row_rest_count >= issue_rate) -+ if (ps->rows_length[row] >= issue_rate) - return NULL; - -- if (ps->rows[row]) -- rest_count += ps->rows[row]->row_rest_count; -- -- ps_i = create_ps_insn (node, rest_count, cycle); -+ ps_i = create_ps_insn (id, cycle); - - /* Finds and inserts PS_I according to MUST_FOLLOW and - MUST_PRECEDE. */ -@@ -2700,6 +3140,7 @@ - return NULL; - } - -+ ps->rows_length[row] += 1; - return ps_i; - } - -@@ -2741,7 +3182,7 @@ - crr_insn; - crr_insn = crr_insn->next_in_row) - { -- rtx insn = crr_insn->node->insn; -+ rtx insn = ps_rtl_insn (ps, crr_insn->id); - - if (!NONDEBUG_INSN_P (insn)) - continue; -@@ -2778,7 +3219,7 @@ - cuid N must be come before/after (respectively) the node pointed to by - PS_I when scheduled in the same cycle. */ - ps_insn_ptr --ps_add_node_check_conflicts (partial_schedule_ptr ps, ddg_node_ptr n, -+ps_add_node_check_conflicts (partial_schedule_ptr ps, int n, - int c, sbitmap must_precede, - sbitmap must_follow) - { -@@ -2820,6 +3261,22 @@ - return ps_i; - } - -+/* Calculate the stage count of the partial schedule PS. The calculation -+ takes into account the rotation amount passed in ROTATION_AMOUNT. */ -+int -+calculate_stage_count (partial_schedule_ptr ps, int rotation_amount) -+{ -+ int new_min_cycle = PS_MIN_CYCLE (ps) - rotation_amount; -+ int new_max_cycle = PS_MAX_CYCLE (ps) - rotation_amount; -+ int stage_count = CALC_STAGE_COUNT (-1, new_min_cycle, ps->ii); -+ -+ /* The calculation of stage count is done adding the number of stages -+ before cycle zero and after cycle zero. */ -+ stage_count += CALC_STAGE_COUNT (new_max_cycle, 0, ps->ii); -+ -+ return stage_count; -+} -+ - /* Rotate the rows of PS such that insns scheduled at time - START_CYCLE will appear in row 0. Updates max/min_cycles. */ - void -@@ -2837,11 +3294,16 @@ - for (i = 0; i < backward_rotates; i++) - { - ps_insn_ptr first_row = ps->rows[0]; -+ int first_row_length = ps->rows_length[0]; - - for (row = 0; row < last_row; row++) -- ps->rows[row] = ps->rows[row+1]; -+ { -+ ps->rows[row] = ps->rows[row + 1]; -+ ps->rows_length[row] = ps->rows_length[row + 1]; -+ } - - ps->rows[last_row] = first_row; -+ ps->rows_length[last_row] = first_row_length; - } - - ps->max_cycle -= start_cycle; ---- a/src/gcc/objc/ChangeLog -+++ b/src/gcc/objc/ChangeLog -@@ -1,3 +1,18 @@ -+2011-11-12 Iain Sandoe <iains@gcc.gnu.org> -+ -+ Backport from mainline -+ 2011-10-29 Iain Sandoe <iains@gcc.gnu.org> -+ -+ PR target/47997 -+ * objc-act.c (objc_build_string_object): Remove redundant second -+ call to fix_string_type (). Add a checking assert that we are, -+ indeed, passed a STRING_CST. -+ -+2011-11-12 Iain Sandoe <iains@gcc.gnu.org> -+ -+ * objc-next-runtime-abi-01.c (objc_eh_personality): Use gcc personality -+ for Objective-C m32. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/gcc/objc/objc-act.c -+++ b/src/gcc/objc/objc-act.c -@@ -3136,9 +3136,8 @@ - struct string_descriptor *desc, key; - void **loc; - -- /* Prep the string argument. */ -- string = fix_string_type (string); -- TREE_SET_CODE (string, STRING_CST); -+ /* We should be passed a STRING_CST. */ -+ gcc_checking_assert (TREE_CODE (string) == STRING_CST); - length = TREE_STRING_LENGTH (string) - 1; - - /* The target may have different ideas on how to construct an ObjC string ---- a/src/gcc/objc/objc-next-runtime-abi-01.c -+++ b/src/gcc/objc/objc-next-runtime-abi-01.c -@@ -2871,12 +2871,15 @@ - return eh_id; - } - -+/* For NeXT ABI 0 and 1, the personality routines are just those of the -+ underlying language. */ -+ - static tree - objc_eh_personality (void) - { - if (!objc_eh_personality_decl) - #ifndef OBJCPLUS -- objc_eh_personality_decl = build_personality_function ("objc"); -+ objc_eh_personality_decl = build_personality_function ("gcc"); - #else - objc_eh_personality_decl = build_personality_function ("gxx"); - #endif ---- a/src/gcc/optabs.c -+++ b/src/gcc/optabs.c -@@ -225,6 +225,61 @@ - return 1; - } - -+/* Given two input operands, OP0 and OP1, determine what the correct from_mode -+ for a widening operation would be. In most cases this would be OP0, but if -+ that's a constant it'll be VOIDmode, which isn't useful. */ -+ -+static enum machine_mode -+widened_mode (enum machine_mode to_mode, rtx op0, rtx op1) -+{ -+ enum machine_mode m0 = GET_MODE (op0); -+ enum machine_mode m1 = GET_MODE (op1); -+ enum machine_mode result; -+ -+ if (m0 == VOIDmode && m1 == VOIDmode) -+ return to_mode; -+ else if (m0 == VOIDmode || GET_MODE_SIZE (m0) < GET_MODE_SIZE (m1)) -+ result = m1; -+ else -+ result = m0; -+ -+ if (GET_MODE_SIZE (result) > GET_MODE_SIZE (to_mode)) -+ return to_mode; -+ -+ return result; -+} -+ -+/* Find a widening optab even if it doesn't widen as much as we want. -+ E.g. if from_mode is HImode, and to_mode is DImode, and there is no -+ direct HI->SI insn, then return SI->DI, if that exists. -+ If PERMIT_NON_WIDENING is non-zero then this can be used with -+ non-widening optabs also. */ -+ -+enum insn_code -+find_widening_optab_handler_and_mode (optab op, enum machine_mode to_mode, -+ enum machine_mode from_mode, -+ int permit_non_widening, -+ enum machine_mode *found_mode) -+{ -+ for (; (permit_non_widening || from_mode != to_mode) -+ && GET_MODE_SIZE (from_mode) <= GET_MODE_SIZE (to_mode) -+ && from_mode != VOIDmode; -+ from_mode = GET_MODE_WIDER_MODE (from_mode)) -+ { -+ enum insn_code handler = widening_optab_handler (op, to_mode, -+ from_mode); -+ -+ if (handler != CODE_FOR_nothing) -+ { -+ if (found_mode) -+ *found_mode = from_mode; -+ return handler; -+ } -+ } -+ -+ return CODE_FOR_nothing; -+} -+ - /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP - says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need - not actually do a sign-extend or zero-extend, but can leave the -@@ -399,6 +454,14 @@ - return TYPE_UNSIGNED (type) ? - vec_widen_umult_lo_optab : vec_widen_smult_lo_optab; - -+ case VEC_WIDEN_LSHIFT_HI_EXPR: -+ return TYPE_UNSIGNED (type) ? -+ vec_widen_ushiftl_hi_optab : vec_widen_sshiftl_hi_optab; -+ -+ case VEC_WIDEN_LSHIFT_LO_EXPR: -+ return TYPE_UNSIGNED (type) ? -+ vec_widen_ushiftl_lo_optab : vec_widen_sshiftl_lo_optab; -+ - case VEC_UNPACK_HI_EXPR: - return TYPE_UNSIGNED (type) ? - vec_unpacku_hi_optab : vec_unpacks_hi_optab; -@@ -517,8 +580,9 @@ - optab_for_tree_code (ops->code, TREE_TYPE (oprnd0), optab_default); - if (ops->code == WIDEN_MULT_PLUS_EXPR - || ops->code == WIDEN_MULT_MINUS_EXPR) -- icode = (int) optab_handler (widen_pattern_optab, -- TYPE_MODE (TREE_TYPE (ops->op2))); -+ icode = (int) find_widening_optab_handler (widen_pattern_optab, -+ TYPE_MODE (TREE_TYPE (ops->op2)), -+ tmode0, 0); - else - icode = (int) optab_handler (widen_pattern_optab, tmode0); - gcc_assert (icode != CODE_FOR_nothing); -@@ -1389,7 +1453,9 @@ - rtx target, int unsignedp, enum optab_methods methods, - rtx last) - { -- int icode = (int) optab_handler (binoptab, mode); -+ enum machine_mode from_mode = widened_mode (mode, op0, op1); -+ int icode = (int) find_widening_optab_handler (binoptab, mode, -+ from_mode, 1); - enum machine_mode mode0 = insn_data[icode].operand[1].mode; - enum machine_mode mode1 = insn_data[icode].operand[2].mode; - enum machine_mode tmp_mode; -@@ -1546,7 +1612,9 @@ - /* If we can do it with a three-operand insn, do so. */ - - if (methods != OPTAB_MUST_WIDEN -- && optab_handler (binoptab, mode) != CODE_FOR_nothing) -+ && find_widening_optab_handler (binoptab, mode, -+ widened_mode (mode, op0, op1), 1) -+ != CODE_FOR_nothing) - { - temp = expand_binop_directly (mode, binoptab, op0, op1, target, - unsignedp, methods, last); -@@ -1586,8 +1654,9 @@ - - if (binoptab == smul_optab - && GET_MODE_WIDER_MODE (mode) != VOIDmode -- && (optab_handler ((unsignedp ? umul_widen_optab : smul_widen_optab), -- GET_MODE_WIDER_MODE (mode)) -+ && (widening_optab_handler ((unsignedp ? umul_widen_optab -+ : smul_widen_optab), -+ GET_MODE_WIDER_MODE (mode), mode) - != CODE_FOR_nothing)) - { - temp = expand_binop (GET_MODE_WIDER_MODE (mode), -@@ -1618,9 +1687,11 @@ - if (optab_handler (binoptab, wider_mode) != CODE_FOR_nothing - || (binoptab == smul_optab - && GET_MODE_WIDER_MODE (wider_mode) != VOIDmode -- && (optab_handler ((unsignedp ? umul_widen_optab -- : smul_widen_optab), -- GET_MODE_WIDER_MODE (wider_mode)) -+ && (find_widening_optab_handler ((unsignedp -+ ? umul_widen_optab -+ : smul_widen_optab), -+ GET_MODE_WIDER_MODE (wider_mode), -+ mode, 0) - != CODE_FOR_nothing))) - { - rtx xop0 = op0, xop1 = op1; -@@ -2043,8 +2114,8 @@ - && optab_handler (add_optab, word_mode) != CODE_FOR_nothing) - { - rtx product = NULL_RTX; -- -- if (optab_handler (umul_widen_optab, mode) != CODE_FOR_nothing) -+ if (widening_optab_handler (umul_widen_optab, mode, word_mode) -+ != CODE_FOR_nothing) - { - product = expand_doubleword_mult (mode, op0, op1, target, - true, methods); -@@ -2053,7 +2124,8 @@ - } - - if (product == NULL_RTX -- && optab_handler (smul_widen_optab, mode) != CODE_FOR_nothing) -+ && widening_optab_handler (smul_widen_optab, mode, word_mode) -+ != CODE_FOR_nothing) - { - product = expand_doubleword_mult (mode, op0, op1, target, - false, methods); -@@ -2144,7 +2216,8 @@ - wider_mode != VOIDmode; - wider_mode = GET_MODE_WIDER_MODE (wider_mode)) - { -- if (optab_handler (binoptab, wider_mode) != CODE_FOR_nothing -+ if (find_widening_optab_handler (binoptab, wider_mode, mode, 1) -+ != CODE_FOR_nothing - || (methods == OPTAB_LIB - && optab_libfunc (binoptab, wider_mode))) - { -@@ -6171,6 +6244,9 @@ - init_optab (usashl_optab, US_ASHIFT); - init_optab (ashr_optab, ASHIFTRT); - init_optab (lshr_optab, LSHIFTRT); -+ init_optabv (vashl_optab, ASHIFT); -+ init_optabv (vashr_optab, ASHIFTRT); -+ init_optabv (vlshr_optab, LSHIFTRT); - init_optab (rotl_optab, ROTATE); - init_optab (rotr_optab, ROTATERT); - init_optab (smin_optab, SMIN); -@@ -6283,6 +6359,10 @@ - init_optab (vec_widen_umult_lo_optab, UNKNOWN); - init_optab (vec_widen_smult_hi_optab, UNKNOWN); - init_optab (vec_widen_smult_lo_optab, UNKNOWN); -+ init_optab (vec_widen_ushiftl_hi_optab, UNKNOWN); -+ init_optab (vec_widen_ushiftl_lo_optab, UNKNOWN); -+ init_optab (vec_widen_sshiftl_hi_optab, UNKNOWN); -+ init_optab (vec_widen_sshiftl_lo_optab, UNKNOWN); - init_optab (vec_unpacks_hi_optab, UNKNOWN); - init_optab (vec_unpacks_lo_optab, UNKNOWN); - init_optab (vec_unpacku_hi_optab, UNKNOWN); ---- a/src/gcc/optabs.h -+++ b/src/gcc/optabs.h -@@ -42,6 +42,11 @@ - int insn_code; - }; - -+struct widening_optab_handlers -+{ -+ struct optab_handlers handlers[NUM_MACHINE_MODES][NUM_MACHINE_MODES]; -+}; -+ - struct optab_d - { - enum rtx_code code; -@@ -50,6 +55,7 @@ - void (*libcall_gen)(struct optab_d *, const char *name, char suffix, - enum machine_mode); - struct optab_handlers handlers[NUM_MACHINE_MODES]; -+ struct widening_optab_handlers *widening; - }; - typedef struct optab_d * optab; - -@@ -344,6 +350,12 @@ - OTI_vec_widen_umult_lo, - OTI_vec_widen_smult_hi, - OTI_vec_widen_smult_lo, -+ /* Widening shift left. -+ The high/low part of the resulting vector is returned. */ -+ OTI_vec_widen_ushiftl_hi, -+ OTI_vec_widen_ushiftl_lo, -+ OTI_vec_widen_sshiftl_hi, -+ OTI_vec_widen_sshiftl_lo, - /* Extract and widen the high/low part of a vector of signed or - floating point elements. */ - OTI_vec_unpacks_hi, -@@ -536,6 +548,10 @@ - #define vec_widen_umult_lo_optab (&optab_table[OTI_vec_widen_umult_lo]) - #define vec_widen_smult_hi_optab (&optab_table[OTI_vec_widen_smult_hi]) - #define vec_widen_smult_lo_optab (&optab_table[OTI_vec_widen_smult_lo]) -+#define vec_widen_ushiftl_hi_optab (&optab_table[OTI_vec_widen_ushiftl_hi]) -+#define vec_widen_ushiftl_lo_optab (&optab_table[OTI_vec_widen_ushiftl_lo]) -+#define vec_widen_sshiftl_hi_optab (&optab_table[OTI_vec_widen_sshiftl_hi]) -+#define vec_widen_sshiftl_lo_optab (&optab_table[OTI_vec_widen_sshiftl_lo]) - #define vec_unpacks_hi_optab (&optab_table[OTI_vec_unpacks_hi]) - #define vec_unpacks_lo_optab (&optab_table[OTI_vec_unpacks_lo]) - #define vec_unpacku_hi_optab (&optab_table[OTI_vec_unpacku_hi]) -@@ -578,6 +594,9 @@ - COI_satfract, - COI_satfractuns, - -+ COI_vec_load_lanes, -+ COI_vec_store_lanes, -+ - COI_MAX - }; - -@@ -598,6 +617,8 @@ - #define fractuns_optab (&convert_optab_table[COI_fractuns]) - #define satfract_optab (&convert_optab_table[COI_satfract]) - #define satfractuns_optab (&convert_optab_table[COI_satfractuns]) -+#define vec_load_lanes_optab (&convert_optab_table[COI_vec_load_lanes]) -+#define vec_store_lanes_optab (&convert_optab_table[COI_vec_store_lanes]) - - /* Contains the optab used for each rtx code. */ - extern optab code_to_optab[NUM_RTX_CODE + 1]; -@@ -794,6 +815,15 @@ - extern void emit_unop_insn (int, rtx, rtx, enum rtx_code); - extern bool maybe_emit_unop_insn (int, rtx, rtx, enum rtx_code); - -+/* Find a widening optab even if it doesn't widen as much as we want. */ -+#define find_widening_optab_handler(A,B,C,D) \ -+ find_widening_optab_handler_and_mode (A, B, C, D, NULL) -+extern enum insn_code find_widening_optab_handler_and_mode (optab, -+ enum machine_mode, -+ enum machine_mode, -+ int, -+ enum machine_mode *); -+ - /* An extra flag to control optab_for_tree_code's behavior. This is needed to - distinguish between machines with a vector shift that takes a scalar for the - shift amount vs. machines that take a vector for the shift amount. */ -@@ -869,6 +899,23 @@ - + (int) CODE_FOR_nothing); - } - -+/* Like optab_handler, but for widening_operations that have a TO_MODE and -+ a FROM_MODE. */ -+ -+static inline enum insn_code -+widening_optab_handler (optab op, enum machine_mode to_mode, -+ enum machine_mode from_mode) -+{ -+ if (to_mode == from_mode || from_mode == VOIDmode) -+ return optab_handler (op, to_mode); -+ -+ if (op->widening) -+ return (enum insn_code) (op->widening->handlers[(int) to_mode][(int) from_mode].insn_code -+ + (int) CODE_FOR_nothing); -+ -+ return CODE_FOR_nothing; -+} -+ - /* Record that insn CODE should be used to implement mode MODE of OP. */ - - static inline void -@@ -877,6 +924,26 @@ - op->handlers[(int) mode].insn_code = (int) code - (int) CODE_FOR_nothing; - } - -+/* Like set_optab_handler, but for widening operations that have a TO_MODE -+ and a FROM_MODE. */ -+ -+static inline void -+set_widening_optab_handler (optab op, enum machine_mode to_mode, -+ enum machine_mode from_mode, enum insn_code code) -+{ -+ if (to_mode == from_mode) -+ set_optab_handler (op, to_mode, code); -+ else -+ { -+ if (op->widening == NULL) -+ op->widening = (struct widening_optab_handlers *) -+ xcalloc (1, sizeof (struct widening_optab_handlers)); -+ -+ op->widening->handlers[(int) to_mode][(int) from_mode].insn_code -+ = (int) code - (int) CODE_FOR_nothing; -+ } -+} -+ - /* Return the insn used to perform conversion OP from mode FROM_MODE - to mode TO_MODE; return CODE_FOR_nothing if the target does not have - such an insn. */ ---- a/src/gcc/opts.c -+++ b/src/gcc/opts.c -@@ -823,6 +823,12 @@ - opts->x_flag_split_stack = 0; - } - } -+ -+ /* Set PARAM_MAX_STORES_TO_SINK to 0 if either vectorization or if-conversion -+ is disabled. */ -+ if (!opts->x_flag_tree_vectorize || !opts->x_flag_tree_loop_if_convert) -+ maybe_set_param_value (PARAM_MAX_STORES_TO_SINK, 0, -+ opts->x_param_values, opts_set->x_param_values); - } - - #define LEFT_COLUMN 27 ---- a/src/gcc/params.def -+++ b/src/gcc/params.def -@@ -344,6 +344,11 @@ - "sms-max-ii-factor", - "A factor for tuning the upper bound that swing modulo scheduler uses for scheduling a loop", - 100, 0, 0) -+/* The minimum value of stage count that swing modulo scheduler will generate. */ -+DEFPARAM(PARAM_SMS_MIN_SC, -+ "sms-min-sc", -+ "The minimum value of stage count that swing modulo scheduler will generate.", -+ 2, 1, 1) - DEFPARAM(PARAM_SMS_DFA_HISTORY, - "sms-dfa-history", - "The number of cycles the swing modulo scheduler considers when checking conflicts using DFA", -@@ -883,6 +888,13 @@ - "name lookup fails", - 1000, 0, 0) - -+/* Maximum number of conditional store pairs that can be sunk. */ -+DEFPARAM (PARAM_MAX_STORES_TO_SINK, -+ "max-stores-to-sink", -+ "Maximum number of conditional store pairs that can be sunk", -+ 2, 0, 0) -+ -+ - /* - Local variables: - mode:c ---- a/src/gcc/params.h -+++ b/src/gcc/params.h -@@ -206,4 +206,6 @@ - PARAM_VALUE (PARAM_PREFETCH_MIN_INSN_TO_MEM_RATIO) - #define MIN_NONDEBUG_INSN_UID \ - PARAM_VALUE (PARAM_MIN_NONDEBUG_INSN_UID) -+#define MAX_STORES_TO_SINK \ -+ PARAM_VALUE (PARAM_MAX_STORES_TO_SINK) - #endif /* ! GCC_PARAMS_H */ ---- a/src/gcc/po/ChangeLog -+++ b/src/gcc/po/ChangeLog -@@ -1,3 +1,7 @@ -+2011-10-30 Joseph Myers <joseph@codesourcery.com> -+ -+ * ja.po: Update. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/gcc/po/ja.po -+++ b/src/gcc/po/ja.po -@@ -20,7 +20,7 @@ - "Project-Id-Version: gcc 4.6.1\n" - "Report-Msgid-Bugs-To: http://gcc.gnu.org/bugs.html\n" - "POT-Creation-Date: 2011-06-21 10:27+0000\n" --"PO-Revision-Date: 2011-10-25 22:36+0900\n" -+"PO-Revision-Date: 2011-10-30 18:48+0900\n" - "Last-Translator: Yasuaki Taniguchi <yasuakit@gmail.com>\n" - "Language-Team: Japanese <translation-team-ja@lists.sourceforge.net>\n" - "Language: ja\n" -@@ -834,12 +834,12 @@ - #: gcov.c:420 - #, c-format - msgid " -a, --all-blocks Show information for every basic block\n" --msgstr "" -+msgstr " -a, --all-blocks 各基本ブロックに関する情報を表示する\n" - - #: gcov.c:421 - #, c-format - msgid " -b, --branch-probabilities Include branch probabilities in output\n" --msgstr "" -+msgstr " -b, --branch-probabilities 出力に分岐可能性情報を含める\n" - - #: gcov.c:422 - #, c-format -@@ -847,6 +847,8 @@ - " -c, --branch-counts Given counts of branches taken\n" - " rather than percentages\n" - msgstr "" -+" -c, --branch-counts 分岐に関する百分率では無く行われた\n" -+" 回数を取得する\n" - - #: gcov.c:424 - #, c-format -@@ -859,21 +861,23 @@ - " -l, --long-file-names Use long output file names for included\n" - " source files\n" - msgstr "" -+" -l, --long-file-names インクルードされたソースファイルに関する長い\n" -+" 出力ファイル名を使用する\n" - - #: gcov.c:427 - #, c-format - msgid " -f, --function-summaries Output summaries for each function\n" --msgstr "" -+msgstr " -f, --function-summaries 各関数に関する要約を出力する\n" - - #: gcov.c:428 - #, c-format - msgid " -o, --object-directory DIR|FILE Search for object files in DIR or called FILE\n" --msgstr "" -+msgstr " -o, --object-directory DIR|FILE オブジェクトファイルを DIR 内または呼び出し用 FILE 内で検索する\n" - - #: gcov.c:429 - #, c-format - msgid " -p, --preserve-paths Preserve all pathname components\n" --msgstr "" -+msgstr " -p, --preserve-paths すべてのパス名要素を保護する\n" - - #: gcov.c:430 - #, c-format -@@ -977,7 +981,7 @@ - #: gcov.c:1045 - #, c-format - msgid "%s:cannot open data file, assuming not executed\n" --msgstr "" -+msgstr "%s:データファイルを開けません。実行されていないと見なします\n" - - #: gcov.c:1052 - #, c-format -@@ -1027,7 +1031,7 @@ - #: gcov.c:1379 - #, c-format - msgid "%s:graph is unsolvable for '%s'\n" --msgstr "" -+msgstr "%s: '%s' 用のグラフが解決できません\n" - - #: gcov.c:1459 - #, c-format -@@ -1037,7 +1041,7 @@ - #: gcov.c:1462 - #, c-format - msgid "Lines executed:%s of %d\n" --msgstr "" -+msgstr "実行された行:%s of %d\n" - - #: gcov.c:1466 - #, c-format -@@ -1047,7 +1051,7 @@ - #: gcov.c:1472 - #, c-format - msgid "Branches executed:%s of %d\n" --msgstr "" -+msgstr "実行された分岐:%s of %d\n" - - #: gcov.c:1476 - #, c-format -@@ -1057,12 +1061,12 @@ - #: gcov.c:1482 - #, c-format - msgid "No branches\n" --msgstr "" -+msgstr "分岐がありません\n" - - #: gcov.c:1484 - #, c-format - msgid "Calls executed:%s of %d\n" --msgstr "" -+msgstr "実行された呼び出し:%s of %d\n" - - #: gcov.c:1488 - #, c-format -@@ -1075,24 +1079,24 @@ - msgstr "%s: '%s' に対する行がありません\n" - - #: gcov.c:1843 --#, fuzzy, c-format -+#, c-format - msgid "call %2d returned %s\n" --msgstr "呼び出し %d の戻り = %d\n" -+msgstr "" - - #: gcov.c:1848 --#, fuzzy, c-format -+#, c-format - msgid "call %2d never executed\n" --msgstr "呼び出し %d は一度も実行せず\n" -+msgstr "" - - #: gcov.c:1853 --#, fuzzy, c-format -+#, c-format - msgid "branch %2d taken %s%s\n" --msgstr "ブランチ %d 受理 = %d%%\n" -+msgstr "" - - #: gcov.c:1857 --#, fuzzy, c-format -+#, c-format - msgid "branch %2d never executed\n" --msgstr "ブランチ %d は一度も実行されず\n" -+msgstr "" - - #: gcov.c:1862 - #, c-format -@@ -1100,9 +1104,9 @@ - msgstr "" - - #: gcov.c:1865 --#, fuzzy, c-format -+#, c-format - msgid "unconditional %2d never executed\n" --msgstr "呼び出し %d は一度も実行せず\n" -+msgstr "" - - #: gcov.c:1901 - #, c-format -@@ -1412,11 +1416,11 @@ - - #: opts.c:1183 - msgid "The following options take separate arguments" --msgstr "" -+msgstr "次のオプションは分離した引数を取ります" - - #: opts.c:1185 - msgid "The following options take joined arguments" --msgstr "" -+msgstr "次のオプションは結合した引数を取ります" - - #: opts.c:1196 - msgid "The following options are language-related" -@@ -1472,7 +1476,7 @@ - #: targhooks.c:1469 - #, c-format - msgid "created and used with differing settings of '%s'" --msgstr "" -+msgstr "作成時と使用時で '%s' の設定が異なります" - - #: targhooks.c:1471 - msgid "out of memory" -@@ -1480,11 +1484,11 @@ - - #: targhooks.c:1486 - msgid "created and used with different settings of -fpic" --msgstr "" -+msgstr "作成時と使用時で -fpic の設定が異なります" - - #: targhooks.c:1488 - msgid "created and used with different settings of -fpie" --msgstr "" -+msgstr "作成時と使用時で -fpie の設定が異なります" - - #: tlink.c:386 - #, c-format -@@ -1717,11 +1721,11 @@ - - #: params.def:100 - msgid "The maximum depth of recursive inlining for inline functions" --msgstr "" -+msgstr "インライン関数を再帰的にインライン化する時の最大深度" - - #: params.def:105 - msgid "The maximum depth of recursive inlining for non-inline functions" --msgstr "" -+msgstr "非インライン関数を再帰的にインライン化する時の最大深度" - - #: params.def:110 - msgid "Inline recursively only when the probability of call being executed exceeds the parameter" -@@ -1761,16 +1765,15 @@ - - #: params.def:180 - msgid "The size of function body to be considered large" --msgstr "" -+msgstr "大きいと見なされる関数本体のサイズ" - - #: params.def:184 - msgid "Maximal growth due to inlining of large function (in percent)" - msgstr "" - - #: params.def:188 --#, fuzzy - msgid "The size of translation unit to be considered large" --msgstr "翻訳単位全体をファイルにダンプする" -+msgstr "大きいと見なされる翻訳単位のサイズ" - - #: params.def:192 - msgid "How much can given compilation unit grow because of the inlining (in percent)" -@@ -1786,20 +1789,19 @@ - - #: params.def:204 - msgid "The size of stack frame to be considered large" --msgstr "" -+msgstr "大きいと見なされるスタックフレームのサイズ" - - #: params.def:208 - msgid "Maximal stack frame growth due to inlining (in percent)" --msgstr "" -+msgstr "インライン化によって増加するスタックフレームの最大量 (百分率)" - - #: params.def:215 - msgid "The maximum amount of memory to be allocated by GCSE" --msgstr "" -+msgstr "GCSE によって配置されるメモリの最大量" - - #: params.def:222 --#, fuzzy - msgid "The maximum ratio of insertions to deletions of expressions in GCSE" --msgstr "RPTS 用の最大反復数を指定する" -+msgstr "" - - #: params.def:233 - msgid "The threshold ratio for performing partial redundancy elimination after reload" -@@ -1963,9 +1965,8 @@ - msgstr "" - - #: params.def:470 --#, fuzzy - msgid "Bound on number of iv uses in loop optimized in iv optimizations" --msgstr "目立たない、コストのかかる最適化を行なう" -+msgstr "" - - #: params.def:478 - msgid "If number of candidates in the set is smaller, we always try to remove unused ivs during its optimization" -@@ -2044,9 +2045,8 @@ - msgstr "" - - #: params.def:594 --#, fuzzy - msgid "The maximum number of iterations through CFG to extend regions" --msgstr "RPTS 用の最大反復数を指定する" -+msgstr "" - - #: params.def:599 - msgid "The maximum conflict delay for an insn to be considered for speculative motion" -@@ -2077,9 +2077,8 @@ - msgstr "" - - #: params.def:637 --#, fuzzy - msgid "The upper bound for sharing integer constants" --msgstr "`%s' の列挙値が整数定数ではありません" -+msgstr "整数定数を共有するための上限値" - - #: params.def:656 - msgid "Minimum number of virtual mappings to consider switching to full virtual renames" -@@ -2111,11 +2110,11 @@ - - #: params.def:714 - msgid "The number of insns executed before prefetch is completed" --msgstr "" -+msgstr "プリフェッチが完了する前に実行される命令数" - - #: params.def:721 - msgid "The number of prefetches that can run at the same time" --msgstr "" -+msgstr "同時に実行可能なプリフェッチの数" - - #: params.def:728 - msgid "The size of L1 cache" -@@ -2162,9 +2161,8 @@ - msgstr "" - - #: params.def:806 --#, fuzzy - msgid "maximum number of parameters in a SCoP" --msgstr "RPTS 用の最大反復数を指定する" -+msgstr "SCoP 内のパラメータの最大数" - - #: params.def:813 - msgid "maximum number of basic blocks per function to be analyzed by Graphite" -@@ -2597,9 +2595,9 @@ - msgstr "無効な %%E 値" - - #: config/alpha/alpha.c:5431 config/alpha/alpha.c:5479 --#, fuzzy, c-format -+#, c-format - msgid "unknown relocation unspec" --msgstr "不明な設定済コンストラクタ型です" -+msgstr "" - - #: config/alpha/alpha.c:5440 config/crx/crx.c:1119 - #: config/rs6000/rs6000.c:16490 config/spu/spu.c:1726 -@@ -3000,32 +2998,32 @@ - #: config/i386/i386.c:14106 config/i386/i386.c:14146 - #, c-format - msgid "operand is not a condition code, invalid operand code 'D'" --msgstr "" -+msgstr "被演算子は条件コードではありません。無効な被演算子コード 'D' です" - - #: config/i386/i386.c:14172 - #, c-format - msgid "operand is neither a constant nor a condition code, invalid operand code 'C'" --msgstr "" -+msgstr "被演算子は定数でも条件コードでもありません。無効な被演算子コード 'C' です" - - #: config/i386/i386.c:14182 - #, c-format - msgid "operand is neither a constant nor a condition code, invalid operand code 'F'" --msgstr "" -+msgstr "被演算子は定数でも条件コードでもありません。無効な被演算子コード 'F' です" - - #: config/i386/i386.c:14200 - #, c-format - msgid "operand is neither a constant nor a condition code, invalid operand code 'c'" --msgstr "" -+msgstr "被演算子は定数でも条件コードでもありません。無効な被演算子コード 'c' です" - - #: config/i386/i386.c:14210 - #, c-format - msgid "operand is neither a constant nor a condition code, invalid operand code 'f'" --msgstr "" -+msgstr "被演算子は定数でも条件コードでもありません。無効な被演算子コード 'f' です" - - #: config/i386/i386.c:14313 - #, c-format - msgid "operand is not a condition code, invalid operand code 'Y'" --msgstr "" -+msgstr "被演算子は条件コードではありません。無効な被演算子コード 'Y' です" - - #: config/i386/i386.c:14339 - #, c-format -@@ -3098,7 +3096,7 @@ - #: config/lm32/lm32.c:529 - #, c-format - msgid "only 0.0 can be loaded as an immediate" --msgstr "" -+msgstr "即値としてロードできるのは 0.0 のみです" - - #: config/lm32/lm32.c:599 - msgid "bad operand" -@@ -3138,15 +3136,15 @@ - - #: config/m32r/m32r.c:2290 - msgid "pre-increment address is not a register" --msgstr "" -+msgstr "前置増分アドレスがレジスタではありません" - - #: config/m32r/m32r.c:2297 - msgid "pre-decrement address is not a register" --msgstr "" -+msgstr "前置減分アドレスがレジスタではありません" - - #: config/m32r/m32r.c:2304 - msgid "post-increment address is not a register" --msgstr "" -+msgstr "後置増分アドレスがレジスタではありません" - - #: config/m32r/m32r.c:2380 config/m32r/m32r.c:2394 - #: config/rs6000/rs6000.c:25500 -@@ -3252,7 +3250,7 @@ - - #: config/mmix/mmix.c:1589 config/mmix/mmix.c:1719 - msgid "MMIX Internal: Expected a CONST_INT, not this" --msgstr "" -+msgstr "MMIX 内部: CONST_INT が予期されますが、異なっています" - - #: config/mmix/mmix.c:1668 - msgid "MMIX Internal: Bad value for 'm', not a CONST_INT" -@@ -3260,11 +3258,11 @@ - - #: config/mmix/mmix.c:1687 - msgid "MMIX Internal: Expected a register, not this" --msgstr "" -+msgstr "MMIX 内部: レジスタが予期されますが、異なっています" - - #: config/mmix/mmix.c:1697 - msgid "MMIX Internal: Expected a constant, not this" --msgstr "" -+msgstr "MMIX 内部: 定数が予期されますが、異なっています" - - #. We need the original here. - #: config/mmix/mmix.c:1781 -@@ -3301,7 +3299,7 @@ - - #: config/picochip/picochip.c:2983 config/picochip/picochip.c:3015 - msgid "Bad address, not (reg+disp):" --msgstr "" -+msgstr "誤ったアドレスです。 (reg+disp) ではありません:" - - #: config/picochip/picochip.c:3029 - msgid "Bad address, not register:" -@@ -3526,15 +3524,15 @@ - - #: config/sh/sh.c:9271 - msgid "created and used with different architectures / ABIs" --msgstr "" -+msgstr "作成時と使用時で アーキテクチャ/ABI が異なります" - - #: config/sh/sh.c:9273 - msgid "created and used with different ABIs" --msgstr "" -+msgstr "作成時と使用時で ABI が異なります" - - #: config/sh/sh.c:9275 - msgid "created and used with different endianness" --msgstr "" -+msgstr "作成時と使用時でエンディアンが異なります" - - #: config/sparc/sparc.c:7445 config/sparc/sparc.c:7451 - #, c-format -@@ -3617,7 +3615,7 @@ - #: config/vax/vax.c:427 - #, c-format - msgid "symbol with offset used in PIC mode" --msgstr "" -+msgstr "PIC モードで使用されるオフセット付きのシンボルです" - - #: config/vax/vax.c:513 - #, c-format -@@ -3837,19 +3835,19 @@ - msgstr "%s:%d:%d: ここから再帰的に実体化されました" - - #: cp/error.c:2913 --#, fuzzy, c-format -+#, c-format - msgid "%s:%d:%d: instantiated from here" - msgstr "%s:%d:%d: ここから実体化されました" - - #: cp/error.c:2918 - #, c-format - msgid "%s:%d: recursively instantiated from here" --msgstr "" -+msgstr "%s:%d: ここから再帰的に実体化されました" - - #: cp/error.c:2919 --#, fuzzy, c-format -+#, c-format - msgid "%s:%d: instantiated from here" --msgstr "%s:%d: ここで実体化されました\n" -+msgstr "%s:%d: ここから実体化されました" - - #: cp/error.c:2962 - #, c-format -@@ -4029,22 +4027,21 @@ - #: fortran/expr.c:607 - #, c-format - msgid "Constant expression required at %C" --msgstr "" -+msgstr "%C では定数式が要求されます" - - #: fortran/expr.c:610 - #, c-format - msgid "Integer expression required at %C" --msgstr "" -+msgstr "%C では整数式が要求されます" - - #: fortran/expr.c:615 --#, fuzzy, c-format -+#, c-format - msgid "Integer value too large in expression at %C" --msgstr "式の整数がオーバーフローしました" -+msgstr "%C の式内で整数値が大きすぎます" - - #: fortran/expr.c:3147 --#, fuzzy - msgid "array assignment" --msgstr "代入" -+msgstr "配列代入" - - #: fortran/gfortranspec.c:303 - #, c-format -@@ -4080,7 +4077,7 @@ - - #: fortran/io.c:551 - msgid "Unexpected element '%c' in format string at %L" --msgstr "" -+msgstr "予期しない要素 '%c' が書式文字列内 (位置 %L) にあります" - - #: fortran/io.c:553 - msgid "Unexpected end of format string" -@@ -4088,15 +4085,15 @@ - - #: fortran/io.c:554 - msgid "Zero width in format descriptor" --msgstr "" -+msgstr "幅 0 の書式記述子です" - - #: fortran/io.c:574 - msgid "Missing leading left parenthesis" --msgstr "" -+msgstr "前に左小括弧がありません" - - #: fortran/io.c:603 - msgid "Left parenthesis required after '*'" --msgstr "" -+msgstr "'*' の後には左小括弧が必要です" - - #: fortran/io.c:634 - msgid "Expected P edit descriptor" -@@ -4116,9 +4113,8 @@ - msgstr "" - - #: fortran/io.c:844 --#, fuzzy - msgid "E specifier not allowed with g0 descriptor" --msgstr "型指定子 `%s' は struct や class の後には使えません" -+msgstr "" - - #: fortran/io.c:914 - msgid "Positive exponent width required" -@@ -4362,9 +4358,8 @@ - msgstr "" - - #: fortran/resolve.c:6233 --#, fuzzy - msgid "End expression in DO loop" --msgstr "オペランドとして無効な式" -+msgstr "" - - #: fortran/resolve.c:6237 - msgid "Step expression in DO loop" -@@ -4564,7 +4559,7 @@ - #: java/jcf-dump.c:1148 - #, c-format - msgid " --extdirs PATH Set extensions directory path\n" --msgstr "" -+msgstr " --extdirs PATH 拡張のディレクトリパスを設定する\n" - - #: java/jcf-dump.c:1149 - #, c-format -@@ -4734,18 +4729,18 @@ - #: config/pa/pa-hpux11.h:111 config/pa/pa64-hpux.h:30 config/pa/pa64-hpux.h:33 - #: config/pa/pa64-hpux.h:42 config/pa/pa64-hpux.h:45 - msgid "warning: consider linking with '-static' as system libraries with" --msgstr "" -+msgstr "警告: システムライブラリとリンクする時は '-static' を指定することを検討してください" - - #: config/pa/pa-hpux10.h:90 config/pa/pa-hpux10.h:93 config/pa/pa-hpux10.h:101 - #: config/pa/pa-hpux10.h:104 config/pa/pa-hpux11.h:109 - #: config/pa/pa-hpux11.h:112 config/pa/pa64-hpux.h:31 config/pa/pa64-hpux.h:34 - #: config/pa/pa64-hpux.h:43 config/pa/pa64-hpux.h:46 - msgid " profiling support are only provided in archive format" --msgstr "" -+msgstr " プロファイリングサポートは書庫フォーマット内でのみ提供されます" - - #: config/rs6000/darwin.h:99 - msgid " conflicting code gen style switches are used" --msgstr "" -+msgstr " 競合しているコード生成スタイルスイッチが使用されています" - - #: config/arm/arm.h:178 - msgid "-msoft-float and -mhard_float may not be used together" -@@ -4805,7 +4800,7 @@ - - #: config/i386/linux-unwind.h:186 - msgid "ax ; {int $0x80 | syscall" --msgstr "" -+msgstr "ax ; {int $0x80 | syscall" - - #: config/s390/tpf.h:120 - msgid "static is not supported on TPF-OS" -@@ -4869,7 +4864,7 @@ - - #: java/lang.opt:206 - msgid "--extdirs=<path>\tSet the extension directory path" --msgstr "" -+msgstr "--extdirs=<path>\t拡張のディレクトリパスを設定する" - - #: java/lang.opt:216 - msgid "Input file is a file with a list of filenames to compile" -@@ -5388,7 +5383,7 @@ - - #: config/frv/frv.opt:31 - msgid "Enable label alignment optimizations" --msgstr "" -+msgstr "ラベル整列最適化を有効にする" - - #: config/frv/frv.opt:35 - msgid "Dynamically allocate cc registers" -@@ -5452,7 +5447,7 @@ - - #: config/frv/frv.opt:116 - msgid "Enable use of GPREL for read-only data in FDPIC" --msgstr "" -+msgstr "FDPIC 内の読み取り専用データ用 GPREL の使用を有効にする" - - #: config/frv/frv.opt:120 config/rs6000/rs6000.opt:216 - #: config/pdp11/pdp11.opt:67 -@@ -5460,9 +5455,8 @@ - msgstr "ハードウェア浮動小数点を利用する" - - #: config/frv/frv.opt:124 config/bfin/bfin.opt:77 --#, fuzzy - msgid "Enable inlining of PLT in function calls" --msgstr "関数呼び出しの前後でレジスタの保存を有効にする" -+msgstr "関数呼び出し内で PLT のインライン化を有効にする" - - #: config/frv/frv.opt:128 - msgid "Enable PIC support for building libraries" -@@ -5478,7 +5472,7 @@ - - #: config/frv/frv.opt:140 - msgid "Use media instructions" --msgstr "" -+msgstr "media 命令を使用する" - - #: config/frv/frv.opt:144 - msgid "Use multiply add/subtract instructions" -@@ -5494,7 +5488,7 @@ - - #: config/frv/frv.opt:157 - msgid "Do not mark ABI switches in e_flags" --msgstr "" -+msgstr "e_flags 内の ABI スイッチをマークしない" - - #: config/frv/frv.opt:161 - msgid "Remove redundant membars" -@@ -5506,7 +5500,7 @@ - - #: config/frv/frv.opt:169 - msgid "Enable setting GPRs to the result of comparisons" --msgstr "" -+msgstr "比較結果を汎用レジスタに設定することを有効にする" - - #: config/frv/frv.opt:173 - msgid "Change the amount of scheduler lookahead" -@@ -5565,9 +5559,8 @@ - msgstr "" - - #: config/mn10300/mn10300.opt:56 --#, fuzzy - msgid "Allow gcc to generate LIW instructions" --msgstr "gcc が repeat/erepeat 命令を使用することを許可する" -+msgstr "gcc が LIW 命令を生成することを許可する" - - #: config/s390/tpf.opt:23 - msgid "Enable TPF-OS tracing code" -@@ -5640,11 +5633,11 @@ - - #: config/s390/s390.opt:91 - msgid "Warn if a function uses alloca or creates an array with dynamic size" --msgstr "" -+msgstr "関数で alloca を使用するか、または動的サイズの配列を作成した場合に、警告する" - - #: config/s390/s390.opt:95 - msgid "Warn if a single function's framesize exceeds the given framesize" --msgstr "" -+msgstr "一つの関数のフレームサイズが与えられたフレームサイズを超過する場合に警告する" - - #: config/s390/s390.opt:99 - msgid "z/Architecture" -@@ -5692,7 +5685,7 @@ - - #: config/ia64/ia64.opt:56 - msgid "gp is constant (but save/restore gp on indirect calls)" --msgstr "gp を定数とする（但、間接呼び出しでは gp を save/restore する）" -+msgstr "gp を定数とする（ただし、間接呼び出しでは gp を save/restore する）" - - #: config/ia64/ia64.opt:60 - msgid "Generate self-relocatable code" -@@ -5741,39 +5734,39 @@ - #: config/ia64/ia64.opt:107 config/spu/spu.opt:72 config/sh/sh.opt:258 - #: config/pa/pa.opt:51 - msgid "Specify range of registers to make fixed" --msgstr "" -+msgstr "固定するレジスタの範囲を指定する" - - #: config/ia64/ia64.opt:119 - msgid "Use data speculation before reload" --msgstr "" -+msgstr "reload 前にデータ投機を使用する" - - #: config/ia64/ia64.opt:123 - msgid "Use data speculation after reload" --msgstr "" -+msgstr "reload 後にデータ投機を使用する" - - #: config/ia64/ia64.opt:127 - msgid "Use control speculation" --msgstr "" -+msgstr "制御投機を使用する" - - #: config/ia64/ia64.opt:131 - msgid "Use in block data speculation before reload" --msgstr "" -+msgstr "reload 前にブロック内データ投機を使用する" - - #: config/ia64/ia64.opt:135 - msgid "Use in block data speculation after reload" --msgstr "" -+msgstr "reload 後にブロック内データ投機を使用する" - - #: config/ia64/ia64.opt:139 - msgid "Use in block control speculation" --msgstr "" -+msgstr "ブロック内制御投機を使用する" - - #: config/ia64/ia64.opt:143 - msgid "Use simple data speculation check" --msgstr "" -+msgstr "単純データ投機検査を使用する" - - #: config/ia64/ia64.opt:147 - msgid "Use simple data speculation check for control speculation" --msgstr "" -+msgstr "制御投機用の単純データ投機検査を使用する" - - #: config/ia64/ia64.opt:151 - msgid "If set, data speculative instructions will be chosen for schedule only if there are no other choices at the moment " -@@ -5789,7 +5782,7 @@ - - #: config/ia64/ia64.opt:163 - msgid "Place a stop bit after every cycle when scheduling" --msgstr "" -+msgstr "スケジューリング時の各サイクル後にストップビットを配置する" - - #: config/ia64/ia64.opt:167 - msgid "Assume that floating-point stores and loads are not likely to cause conflict when placed into one instruction group" -@@ -5805,7 +5798,7 @@ - - #: config/ia64/ia64.opt:179 - msgid "Don't generate checks for control speculation in selective scheduling" --msgstr "" -+msgstr "選択的スケジューリング内では制御投機用の検査を生成しない" - - #: config/ia64/vms_symvec_libgcc_s.opt:3 - msgid "! It would be better to auto-generate this file." -@@ -6109,7 +6102,7 @@ - - #: config/m68k/m68k.opt:160 config/bfin/bfin.opt:61 - msgid "Enable separate data segment" --msgstr "" -+msgstr "分離データセグメントを有効にする" - - #: config/m68k/m68k.opt:164 config/bfin/bfin.opt:57 - msgid "ID of shared library to build" -@@ -6149,7 +6142,7 @@ - - #: config/i386/mingw.opt:23 - msgid "Warn about none ISO msvcrt scanf/printf width extensions" --msgstr "" -+msgstr "非 ISO の msvcrt scanf/printf の幅拡張に関して警告する" - - #: config/i386/mingw.opt:27 - msgid "For nested functions on stack executable permission is set." -@@ -6201,7 +6194,7 @@ - - #: config/i386/i386.opt:114 - msgid "Data greater than given threshold will go into .ldata section in x86-64 medium model" --msgstr "" -+msgstr "x86-64 メディアモデルでは与えられた閾値より大きいデータを .ldata セクションに配置する" - - #: config/i386/i386.opt:118 - msgid "Use given x86-64 code model" -@@ -6217,16 +6210,15 @@ - - #: config/i386/i386.opt:129 - msgid "Always use Dynamic Realigned Argument Pointer (DRAP) to realign stack" --msgstr "" -+msgstr "スタックを再整列するために動的再整列引数ポインタ (Dynamic Realigned Argument Pointer, DRAP) を常に使用する" - - #: config/i386/i386.opt:133 - msgid "Return values of functions in FPU registers" - msgstr "FPU レジスタ内の機能の値を返す" - - #: config/i386/i386.opt:137 --#, fuzzy - msgid "Generate floating point mathematics using given instruction set" --msgstr "ハードウェア浮動小数点命令を使用する" -+msgstr "与えられた命令集合を使用して浮動小数数値計算を生成する" - - #: config/i386/i386.opt:149 - msgid "Inline all known string operations" -@@ -6314,8 +6306,9 @@ - msgstr "8 バイトベクトルをメモリに返す" - - #: config/i386/i386.opt:253 -+#, fuzzy - msgid "Generate reciprocals instead of divss and sqrtss." --msgstr "" -+msgstr "divss および sqrtss の代わりに逆数 (reciprocal) を生成する" - - #: config/i386/i386.opt:257 - msgid "Generate cld instruction in the function prologue." -@@ -6331,7 +6324,7 @@ - - #: config/i386/i386.opt:271 - msgid "Use 128-bit AVX instructions instead of 256-bit AVX instructions in the auto-vectorizer." --msgstr "" -+msgstr "自動ベクトル化で 256 ビット AVX 命令の代わりに 128 ビット AVX 命令を使用する" - - #: config/i386/i386.opt:277 - msgid "Generate 32bit i386 code" -@@ -6382,9 +6375,8 @@ - msgstr "SSE4.1 と SSE4.2 の組み込み関数とコード生成をサポートしない" - - #: config/i386/i386.opt:328 --#, fuzzy - msgid "%<-msse5%> was removed" --msgstr "'-msse5' は削除されました" -+msgstr "%<-msse5%> は削除されました" - - #: config/i386/i386.opt:333 - msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2 and AVX built-in functions and code generation" -@@ -6544,7 +6536,7 @@ - - #: config/rs6000/rs6000.opt:152 - msgid "Use PowerPC General Purpose group optional instructions" --msgstr "PowerPC 一般用途グループオプション命令を使用する" -+msgstr "PowerPC 汎用グループオプション命令を使用する" - - #: config/rs6000/rs6000.opt:156 - msgid "Use PowerPC Graphics group optional instructions" -@@ -7002,7 +6994,7 @@ - - #: config/mcore/mcore.opt:56 config/fr30/fr30.opt:27 - msgid "Assume that run-time support has been provided, so omit -lsim from the linker command line" --msgstr "" -+msgstr "実行時サポートが提供されると見なし、リンカコマンドラインに -lsim を含めない" - - #: config/mcore/mcore.opt:60 - msgid "Use arbitrary sized immediates in bit operations" -@@ -7014,7 +7006,7 @@ - - #: config/mcore/mcore.opt:71 - msgid "Set the maximum amount for a single stack increment operation" --msgstr "単一のスタックインクリメント操作の最大値を設定する" -+msgstr "単一のスタック増分操作の最大値を設定する" - - #: config/mcore/mcore.opt:75 - msgid "Always treat bitfields as int-sized" -@@ -7234,7 +7226,7 @@ - - #: config/sh/sh.opt:246 - msgid "Division strategy, one of: call, call2, fp, inv, inv:minlat, inv20u, inv20l, inv:call, inv:call2, inv:fp, call-div1, call-fp, call-table" --msgstr "" -+msgstr "除算戦略、次のいずれか: call, call2, fp, inv, inv:minlat, inv20u, inv20l, inv:call, inv:call2, inv:fp, call-div1, call-fp, call-table" - - #: config/sh/sh.opt:250 - msgid "Specify name for 32 bit signed division function" -@@ -7282,7 +7274,7 @@ - - #: config/sh/sh.opt:298 - msgid "Mark MAC register as call-clobbered" --msgstr "" -+msgstr "MAC レジスタを呼び出しで破壊されるとマークする" - - #: config/sh/sh.opt:304 - msgid "Make structs a multiple of 4 bytes (warning: ABI altered)" -@@ -7960,7 +7952,7 @@ - - #: config/m68hc11/m68hc11.opt:49 - msgid "Auto pre/post decrement increment allowed" --msgstr "自動 pre/post デクリメント インクリメントを許容する" -+msgstr "自動 前置/後置 減分/増分 を許容する" - - #: config/m68hc11/m68hc11.opt:53 - msgid "Min/max instructions allowed" -@@ -7972,7 +7964,7 @@ - - #: config/m68hc11/m68hc11.opt:61 - msgid "Auto pre/post decrement increment not allowed" --msgstr "自動 pre/post デクリメント インクリメントを許容しない" -+msgstr "自動 前置/後置 減分/増分を許容しない" - - #: config/m68hc11/m68hc11.opt:65 - msgid "Use jsr and rts for function calls and returns" -@@ -8346,7 +8338,7 @@ - - #: config/bfin/bfin.opt:69 - msgid "Link with the fast floating-point library" --msgstr "" -+msgstr "高速な浮動小数ライブラリとリンクする" - - #: config/bfin/bfin.opt:81 - msgid "Do stack checking using bounds in L1 scratch memory" -@@ -8382,7 +8374,7 @@ - - #: config/picochip/picochip.opt:31 - msgid "Specify whether the byte access instructions should be used. Enabled by default." --msgstr "" -+msgstr "バイトアクセス命令を使用するかどうかを指定する。デフォルトでは有効となる" - - #: config/picochip/picochip.opt:35 - msgid "Enable debug output to be generated." -@@ -8390,11 +8382,11 @@ - - #: config/picochip/picochip.opt:39 - msgid "Allow a symbol value to be used as an immediate value in an instruction." --msgstr "" -+msgstr "命令内でシンボル値が即値として使用されることを許可する" - - #: config/picochip/picochip.opt:43 - msgid "Generate warnings when inefficient code is known to be generated." --msgstr "" -+msgstr "非効率なコードが生成された時に警告する" - - #: config/vxworks.opt:36 - msgid "Assume the VxWorks RTP environment" -@@ -8418,7 +8410,7 @@ - - #: config/darwin.opt:205 - msgid "Warn if constant CFString objects contain non-portable characters" --msgstr "" -+msgstr "定数 CFString オブジェクトが移植性の無い文字を含む場合に警告する" - - #: config/darwin.opt:210 - msgid "Generate AT&T-style stubs for Mach-O" -@@ -8430,7 +8422,7 @@ - - #: config/darwin.opt:218 - msgid "Generate code suitable for fast turn around debugging" --msgstr "" -+msgstr "デバッグを高速に行うために適したコードを生成する" - - #: config/darwin.opt:227 - msgid "The earliest MacOS X version on which this program will run" -@@ -8442,15 +8434,15 @@ - - #: config/darwin.opt:235 - msgid "Generate code for darwin loadable kernel extensions" --msgstr "" -+msgstr "darwin ロード可能カーネル拡張用のコードを生成する" - - #: config/darwin.opt:239 - msgid "Generate code for the kernel or loadable kernel extensions" --msgstr "" -+msgstr "カーネル用、またはロード可能カーネル拡張用のコードを生成する" - - #: config/darwin.opt:243 - msgid "-iframework <dir>\tAdd <dir> to the end of the system framework include path" --msgstr "" -+msgstr "-iframework <dir>\t<dir> をシステムフレームワークインクルードパスの末尾に加える" - - #: config/lynx.opt:23 - msgid "Support legacy multi-threading" -@@ -8737,7 +8729,6 @@ - msgstr "" - - #: config/microblaze/microblaze.opt:92 --#, fuzzy - msgid "Use hardware floating point conversion instructions" - msgstr "ハードウェア浮動小数点変換命令を使用する" - -@@ -8862,7 +8853,7 @@ - - #: c-family/c.opt:249 - msgid "-MT <target>\tAdd an unquoted target" --msgstr "" -+msgstr "-MT <target>\tターゲット (引用符を付けない) を追加する" - - #: c-family/c.opt:253 - msgid "Do not generate #line directives" -@@ -8898,11 +8889,11 @@ - - #: c-family/c.opt:288 - msgid "Warn about C constructs that are not in the common subset of C and C++" --msgstr "" -+msgstr "C と C++ の共通部分集合では無い C 構文に関して警告する" - - #: c-family/c.opt:292 - msgid "Warn about C++ constructs whose meaning differs between ISO C++ 1998 and ISO C++ 200x" --msgstr "" -+msgstr "ISO C++ 1998 と ISO C++ 200x で意味が異なる C++ 構文に関して警告する" - - #: c-family/c.opt:296 - msgid "Warn about casts which discard qualifiers" -@@ -8962,7 +8953,7 @@ - - #: c-family/c.opt:352 - msgid "Warn about stray tokens after #elif and #endif" --msgstr "" -+msgstr "#elif および #endif の後にあるはぐれたトークンに関して警告する" - - #: c-family/c.opt:356 - msgid "Warn about comparison of different enum types" -@@ -8977,9 +8968,8 @@ - msgstr "浮動小数点数の等価比較に関して警告する" - - #: c-family/c.opt:372 --#, fuzzy - msgid "Warn about printf/scanf/strftime/strfmon format string anomalies" --msgstr "printf/scanf/strftime/strfmon 形式の変則的なものに関して警告する" -+msgstr "printf/scanf/strftime/strfmon 書式文字列異常に関して警告する" - - #: c-family/c.opt:376 - msgid "Warn if passing too many arguments to a function for its format string" -@@ -8998,9 +8988,8 @@ - msgstr "セキュリティ問題になる可能性がある書式関数に関して警告する" - - #: c-family/c.opt:392 --#, fuzzy - msgid "Warn about strftime formats yielding 2-digit years" --msgstr "strftime 形式が二桁で年を表している時の警告しない" -+msgstr "strftime 書式が 2 桁の年の場合に警告する" - - #: c-family/c.opt:396 - msgid "Warn about zero-length formats" -@@ -9409,7 +9398,7 @@ - - #: c-family/c.opt:823 - msgid "Don't emit dllexported inline functions unless needed" --msgstr "" -+msgstr "必要が無い限り dllexported インライン関数を発行しない" - - #: c-family/c.opt:830 - msgid "Allow implicit conversions between vectors with differing numbers of subparts and/or differing element types." -@@ -9501,7 +9490,7 @@ - - #: c-family/c.opt:942 - msgid "Generate run time type descriptor information" --msgstr "" -+msgstr "実行時型記述子情報を生成する" - - #: c-family/c.opt:946 - msgid "Use the same size for double as for float" -@@ -9889,19 +9878,16 @@ - msgstr "関数が __attribute__((pure)) の候補となりそうな場合に警告する" - - #: common.opt:608 --#, fuzzy - msgid "Warn about enumerated switches, with no default, missing a case" --msgstr "列挙定数の switch で case 指定が欠けているものに関して警告する" -+msgstr "列挙定数を使用した switch 文で default 文が無いか特定の case が無い場合に警告する" - - #: common.opt:612 --#, fuzzy - msgid "Warn about enumerated switches missing a \"default:\" statement" --msgstr "列挙定数の switch で case 指定が欠けているものに関して警告する" -+msgstr "列挙定数を使用した switch 文で \"default:\" 文が無い場合に警告する" - - #: common.opt:616 --#, fuzzy - msgid "Warn about all enumerated switches missing a specific case" --msgstr "列挙定数の switch で case 指定が欠けているものに関して警告する" -+msgstr "列挙定数を使用した switch 文で特定の case が無い場合に警告する" - - #: common.opt:620 - msgid "Do not suppress warnings from system headers" -@@ -10000,9 +9986,8 @@ - msgstr "自動増加/減少命令を生成する" - - #: common.opt:821 --#, fuzzy - msgid "Generate code to check bounds before indexing arrays" --msgstr "配列の添字と添字境界を検査するコードを生成する" -+msgstr "配列の添え字を使用する前に境界検査を行うコードを生成する" - - #: common.opt:825 - #, fuzzy -@@ -10043,7 +10028,7 @@ - - #: common.opt:864 - msgid "Looks for opportunities to reduce stack adjustments and stack references." --msgstr "" -+msgstr "スタック調整およびスタック参照を削減する機会を探す" - - #: common.opt:868 - msgid "Do not put uninitialized globals in the common section" -@@ -10058,18 +10043,16 @@ - msgstr "" - - #: common.opt:884 --#, fuzzy - msgid "Perform comparison elimination after register allocation has finished" --msgstr "グローバル共通部分式を除去する" -+msgstr "レジスタは位置が完了した後に比較の除去を行う" - - #: common.opt:888 - msgid "Do not perform optimizations increasing noticeably stack usage" --msgstr "" -+msgstr "スタック使用量を著しく増加させる最適化を行わない" - - #: common.opt:892 --#, fuzzy - msgid "Perform a register copy-propagation optimization pass" --msgstr "最適化過程のレジスタつけ変えを行なう" -+msgstr "" - - #: common.opt:896 - msgid "Perform cross-jumping optimization" -@@ -10101,7 +10084,7 @@ - - #: common.opt:928 - msgid "Map one directory name to another in debug information" --msgstr "" -+msgstr "デバッグ情報内のディレクトリー名を他のものにマップする" - - #: common.opt:934 - msgid "Defer popping functions args from stack until later" -@@ -10116,9 +10099,8 @@ - msgstr "無意味な null ポインタ検査を削除する" - - #: common.opt:946 --#, fuzzy - msgid "Try to convert virtual calls to direct ones." --msgstr "リンカが PIC 呼び出しを直接呼び出しに変更することを許可するように試みる" -+msgstr "仮想呼び出しを直接呼び出しに変換することを試みる" - - #: common.opt:950 - #, fuzzy -@@ -10137,7 +10119,7 @@ - - #: common.opt:978 - msgid "-fdump-final-insns=filename\tDump to filename the insns at the end of translation" --msgstr "" -+msgstr "-fdump-final-insns=filename\t翻訳終了時に filename へ命令をダンプする" - - #: common.opt:982 - msgid "-fdump-go-spec=filename\tWrite all declarations to file as Go code" -@@ -10173,7 +10155,7 @@ - - #: common.opt:1014 common.opt:1018 - msgid "Perform unused type elimination in debug info" --msgstr "" -+msgstr "デバッグ情報内で使用されていない型の除去を行う" - - #: common.opt:1022 - msgid "Do not suppress C++ class debug information." -@@ -10181,25 +10163,24 @@ - - #: common.opt:1026 - msgid "Generate debug information to support Identical Code Folding (ICF)" --msgstr "" -+msgstr "Identical Code Folding (ICF) をサポートするためのデバッグ情報を生成する" - - #: common.opt:1030 - msgid "Enable exception handling" - msgstr "例外処理を有効にする" - - #: common.opt:1034 --#, fuzzy - msgid "Perform a number of minor, expensive optimizations" --msgstr "目立たない、コストのかかる最適化を行なう" -+msgstr "多くの、目立たないがコストが高い最適化を行う" - - #: common.opt:1038 - msgid "-fexcess-precision=[fast|standard]\tSpecify handling of excess floating-point precision" --msgstr "" -+msgstr "-fexcess-precision=[fast|standard]\t余分な浮動小数点精度の取り扱いを指定する" - - #: common.opt:1041 - #, c-format - msgid "unknown excess precision style %qs" --msgstr "" -+msgstr "不明な余分な精度スタイル %qs です" - - #: common.opt:1054 - msgid "Assume no NaNs or infinities are generated" -@@ -10222,52 +10203,45 @@ - msgstr "" - - #: common.opt:1077 --#, fuzzy, c-format -+#, c-format - msgid "unknown floating point contraction style %qs" --msgstr "浮動小数点定数を TOC 内に配置する" -+msgstr "不明な浮動小数短縮形 %qs です" - - #: common.opt:1094 - msgid "Allow function addresses to be held in registers" - msgstr "関数アドレスをレジスタに持たせる事を許可する" - - #: common.opt:1098 --#, fuzzy - msgid "Place each function into its own section" --msgstr "各々の関数をそれ自身のセクションに配置する" -+msgstr "それぞれの関数をそれ自身のセクションに配置する" - - #: common.opt:1102 --#, fuzzy - msgid "Perform global common subexpression elimination" --msgstr "グローバル共通部分式を除去する" -+msgstr "大域共通部分式の除去を行う" - - #: common.opt:1106 --#, fuzzy - msgid "Perform enhanced load motion during global common subexpression elimination" --msgstr "グローバル共通部分式を除去する" -+msgstr "" - - #: common.opt:1110 --#, fuzzy - msgid "Perform store motion after global common subexpression elimination" --msgstr "グローバル共通部分式を除去する" -+msgstr "" - - #: common.opt:1114 - msgid "Perform redundant load after store elimination in global common subexpression" - msgstr "" - - #: common.opt:1119 --#, fuzzy - msgid "Perform global common subexpression elimination after register allocation" --msgstr "グローバル共通部分式を除去する" -+msgstr "レジスタ配置後に大域共通部分式の除去を行う" - - #: common.opt:1125 --#, fuzzy - msgid "Enable in and out of Graphite representation" --msgstr "自動テンプレート実体化を有効にする" -+msgstr "" - - #: common.opt:1129 --#, fuzzy - msgid "Enable Graphite Identity transformation" --msgstr "呼び出しグラフ情報を送出する" -+msgstr "" - - #: common.opt:1133 - msgid "Mark all loops as parallel" -@@ -10306,9 +10280,8 @@ - msgstr "" - - #: common.opt:1173 --#, fuzzy - msgid "Perform conversion of conditional jumps to conditional execution" --msgstr "条件的な実行への変更のための閾値を変更する" -+msgstr "" - - #: common.opt:1177 - msgid "Convert conditional jumps in innermost loops to branchless equivalents" -@@ -10376,13 +10349,12 @@ - msgstr "" - - #: common.opt:1253 --#, fuzzy - msgid "Discover pure and const functions" --msgstr "使われない仮想関数を切り捨てる" -+msgstr "純粋および定数関数を見つける" - - #: common.opt:1257 - msgid "Discover readonly and non addressable static variables" --msgstr "" -+msgstr "読み取り専用およびアドレス付けできない静的変数を見つける" - - #: common.opt:1261 - msgid "Perform matrix layout flattening and transposing based" -@@ -10415,9 +10387,8 @@ - msgstr "" - - #: common.opt:1305 --#, fuzzy - msgid "Share slots for saving different hard registers." --msgstr "引数レジスタにローカルのものを格納する" -+msgstr "" - - #: common.opt:1309 - msgid "Share stack slots for spilled pseudo-registers." -@@ -10621,19 +10592,19 @@ - - #: common.opt:1521 - msgid "Enable basic program profiling code" --msgstr "" -+msgstr "基本プログラムプロファイリングコードを有効にする" - - #: common.opt:1525 - msgid "Insert arc-based program profiling code" --msgstr "" -+msgstr "円弧ベースプログラムプロファイリングコードを挿入する" - - #: common.opt:1529 - msgid "Set the top-level directory for storing the profile data." --msgstr "" -+msgstr "プロファイルデータ保存用の最上位ディレクリーを設定する" - - #: common.opt:1534 - msgid "Enable correction of flow inconsistent profile data input" --msgstr "" -+msgstr "フロー一貫性が無いデータ入力の訂正を有効にする" - - #: common.opt:1538 - msgid "Enable common options for generating profile info for profile feedback directed optimizations" -@@ -10653,7 +10624,7 @@ - - #: common.opt:1554 - msgid "Insert code to profile values of expressions" --msgstr "" -+msgstr "式の値をプロファイルするためのコードを挿入する" - - #: common.opt:1561 - msgid "-frandom-seed=<string>\tMake compile reproducible using <string>" -@@ -11836,7 +11807,7 @@ - #: c-decl.c:1150 - #, gcc-internal-format - msgid "nested function %q+D declared but never defined" --msgstr "" -+msgstr "入れ子になった関数 %q+D が宣言されましたが定義されていません" - - #: c-decl.c:1162 - #, gcc-internal-format -@@ -11893,7 +11864,7 @@ - #: c-decl.c:1613 - #, gcc-internal-format - msgid "prototype for %q+D follows non-prototype definition" --msgstr "" -+msgstr "非プロトタイプ定義に続いて %q+D 用のプロトタイプがあります" - - #: c-decl.c:1628 - #, gcc-internal-format -@@ -11969,9 +11940,9 @@ - msgstr "%q+D が異なる型で再定義されました" - - #: c-decl.c:1818 --#, fuzzy, gcc-internal-format -+#, gcc-internal-format - msgid "redefinition of typedef %q+D with variably modified type" --msgstr "%q+D が異なる型で再定義されました" -+msgstr "" - - #: c-decl.c:1825 - #, gcc-internal-format -@@ -12016,17 +11987,17 @@ - #: c-decl.c:2001 - #, gcc-internal-format - msgid "extern declaration of %q+D follows declaration with no linkage" --msgstr "" -+msgstr "リンク無し宣言の後に %q+D の extern 宣言が続いています" - - #: c-decl.c:2037 - #, gcc-internal-format - msgid "declaration of %q+D with no linkage follows extern declaration" --msgstr "" -+msgstr "extern 宣言の後にリンク無し %q+D の宣言が続いています" - - #: c-decl.c:2043 - #, gcc-internal-format - msgid "redeclaration of %q+D with no linkage" --msgstr "" -+msgstr "リンク無し %q+D の再定義です" - - #: c-decl.c:2069 - #, gcc-internal-format -@@ -12354,7 +12325,7 @@ - #: c-decl.c:4614 - #, gcc-internal-format - msgid "defining a type in a compound literal is invalid in C++" --msgstr "" -+msgstr "複合リテラル内での型定義は C++ では無効です" - - #: c-decl.c:4666 c-decl.c:4681 - #, gcc-internal-format -@@ -13393,23 +13364,23 @@ - #: c-parser.c:1829 - #, gcc-internal-format - msgid "expression in static assertion is not an integer" --msgstr "" -+msgstr "静的アサーション内の式が整数ではありません" - - #: c-parser.c:1836 - #, gcc-internal-format - msgid "expression in static assertion is not an integer constant expression" --msgstr "" -+msgstr "静的アサーション内の式が整数定数式ではありません" - - #: c-parser.c:1841 - #, gcc-internal-format - msgid "expression in static assertion is not constant" --msgstr "" -+msgstr "静的アサーション内の式が定数ではありません" - - #. Report the error. - #: c-parser.c:1846 cp/semantics.c:4719 - #, gcc-internal-format - msgid "static assertion failed: %E" --msgstr "" -+msgstr "静的アサーションに失敗しました: %E" - - #: c-parser.c:2207 c-parser.c:3063 c-parser.c:3709 c-parser.c:3983 - #: c-parser.c:5084 c-parser.c:5175 c-parser.c:5800 c-parser.c:6083 -@@ -14125,12 +14096,12 @@ - #: c-typeck.c:3578 - #, gcc-internal-format - msgid "increment of enumeration value is invalid in C++" --msgstr "列挙値のインクリメントは C++ では無効です" -+msgstr "列挙値の増分は C++ では無効です" - - #: c-typeck.c:3581 - #, gcc-internal-format - msgid "decrement of enumeration value is invalid in C++" --msgstr "列挙値のデクリメントは C++ では無効です" -+msgstr "列挙値の減分は C++ では無効です" - - #: c-typeck.c:3594 - #, gcc-internal-format -@@ -14140,22 +14111,22 @@ - #: c-typeck.c:3613 c-typeck.c:3645 - #, gcc-internal-format - msgid "wrong type argument to increment" --msgstr "インクリメントする引数の型が間違っています" -+msgstr "増分する引数の型が間違っています" - - #: c-typeck.c:3615 c-typeck.c:3648 - #, gcc-internal-format - msgid "wrong type argument to decrement" --msgstr "デクリメントする引数の型が間違っています" -+msgstr "減分する引数の型が間違っています" - - #: c-typeck.c:3635 - #, gcc-internal-format - msgid "increment of pointer to unknown structure" --msgstr "不明な構造体へのポインタのインクリメントです" -+msgstr "不明な構造体へのポインタの増分です" - - #: c-typeck.c:3638 - #, gcc-internal-format - msgid "decrement of pointer to unknown structure" --msgstr "不明な構造体へのポインタのデクリメントです" -+msgstr "不明な構造体へのポインタの減分です" - - #: c-typeck.c:3722 - #, gcc-internal-format -@@ -14170,12 +14141,12 @@ - #: c-typeck.c:3895 c-family/c-common.c:8658 - #, gcc-internal-format - msgid "increment of read-only location %qE" --msgstr "読み取り専用位置 %qE のインクリメントです" -+msgstr "読み取り専用位置 %qE の増分です" - - #: c-typeck.c:3898 c-family/c-common.c:8659 - #, gcc-internal-format - msgid "decrement of read-only location %qE" --msgstr "読み取り専用位置 %qE のデクリメントです" -+msgstr "読み取り専用位置 %qE の減分です" - - #: c-typeck.c:3939 - #, gcc-internal-format -@@ -19787,12 +19758,12 @@ - #: c-family/c-common.c:8611 - #, gcc-internal-format - msgid "increment of member %qD in read-only object" --msgstr "読み取り専用オブジェクト内のメンバ %qD のインクリメントです" -+msgstr "読み取り専用オブジェクト内のメンバ %qD の増分です" - - #: c-family/c-common.c:8613 - #, gcc-internal-format - msgid "decrement of member %qD in read-only object" --msgstr "読み取り専用オブジェクト内のメンバ %qD のデクリメントです" -+msgstr "読み取り専用オブジェクト内のメンバ %qD の減分です" - - #: c-family/c-common.c:8615 - #, gcc-internal-format -@@ -19807,12 +19778,12 @@ - #: c-family/c-common.c:8620 - #, gcc-internal-format - msgid "increment of read-only member %qD" --msgstr "読み取り専用メンバ %qD のインクリメントです" -+msgstr "読み取り専用メンバ %qD の増分です" - - #: c-family/c-common.c:8621 - #, gcc-internal-format - msgid "decrement of read-only member %qD" --msgstr "読み取り専用メンバ %qD のデクリメントです" -+msgstr "読み取り専用メンバ %qD の減分です" - - #: c-family/c-common.c:8622 - #, gcc-internal-format -@@ -19827,12 +19798,12 @@ - #: c-family/c-common.c:8627 - #, gcc-internal-format - msgid "increment of read-only variable %qD" --msgstr "読み取り専用変数 %qD のインクリメントです" -+msgstr "読み取り専用変数 %qD の増分です" - - #: c-family/c-common.c:8628 - #, gcc-internal-format - msgid "decrement of read-only variable %qD" --msgstr "読み取り専用変数 %qD のデクリメントです" -+msgstr "読み取り専用変数 %qD の減分です" - - #: c-family/c-common.c:8629 - #, gcc-internal-format -@@ -19847,12 +19818,12 @@ - #: c-family/c-common.c:8633 - #, gcc-internal-format - msgid "increment of read-only parameter %qD" --msgstr "読み取り専用パラメータ %qD のインクリメントです" -+msgstr "読み取り専用パラメータ %qD の増分です" - - #: c-family/c-common.c:8634 - #, gcc-internal-format - msgid "decrement of read-only parameter %qD" --msgstr "読み取り専用パラメータ %qD のデクリメントです" -+msgstr "読み取り専用パラメータ %qD の減分です" - - #: c-family/c-common.c:8635 - #, gcc-internal-format -@@ -19867,12 +19838,12 @@ - #: c-family/c-common.c:8642 - #, gcc-internal-format - msgid "increment of read-only named return value %qD" --msgstr "読み取り専用名前付き戻り値 %qD のインクリメントです" -+msgstr "読み取り専用名前付き戻り値 %qD の増分です" - - #: c-family/c-common.c:8644 - #, gcc-internal-format - msgid "decrement of read-only named return value %qD" --msgstr "読み取り専用名前付き戻り値 %qD のデクリメントです" -+msgstr "読み取り専用名前付き戻り値 %qD の減分です" - - #: c-family/c-common.c:8646 - #, gcc-internal-format -@@ -19887,12 +19858,12 @@ - #: c-family/c-common.c:8652 - #, gcc-internal-format - msgid "increment of function %qD" --msgstr "関数 %qD のインクリメントです" -+msgstr "関数 %qD の増分です" - - #: c-family/c-common.c:8653 - #, gcc-internal-format - msgid "decrement of function %qD" --msgstr "関数 %qD のデクリメントです" -+msgstr "関数 %qD の減分です" - - #: c-family/c-common.c:8654 - #, gcc-internal-format -@@ -19912,12 +19883,12 @@ - #: c-family/c-common.c:8677 - #, gcc-internal-format - msgid "lvalue required as increment operand" --msgstr "インクリメントの被演算子として左辺値が必要です" -+msgstr "増分の被演算子として左辺値が必要です" - - #: c-family/c-common.c:8680 - #, gcc-internal-format - msgid "lvalue required as decrement operand" --msgstr "デクリメントの被演算子として左辺値が必要です" -+msgstr "減分の被演算子として左辺値が必要です" - - #: c-family/c-common.c:8683 - #, gcc-internal-format -@@ -20556,12 +20527,12 @@ - #: c-family/c-omp.c:375 cp/semantics.c:4431 - #, gcc-internal-format - msgid "missing increment expression" --msgstr "インクリメント式がありません" -+msgstr "増分式がありません" - - #: c-family/c-omp.c:444 cp/semantics.c:4287 - #, gcc-internal-format - msgid "invalid increment expression" --msgstr "無効なインクリメント式です" -+msgstr "無効な増分式です" - - #: c-family/c-opts.c:303 - #, gcc-internal-format -@@ -20571,7 +20542,7 @@ - #: c-family/c-opts.c:306 - #, gcc-internal-format - msgid "obsolete option -I- used, please use -iquote instead" --msgstr "廃止あれたオプション -I- が使用されています。代わりに -iquote を使用してください" -+msgstr "廃止されたオプション -I- が使用されています。代わりに -iquote を使用してください" - - #: c-family/c-opts.c:486 - #, gcc-internal-format ---- a/src/gcc/recog.c -+++ b/src/gcc/recog.c -@@ -930,7 +930,9 @@ - return ((GET_MODE (op) == VOIDmode || GET_MODE (op) == mode - || mode == VOIDmode) - && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op)) -- && LEGITIMATE_CONSTANT_P (op)); -+ && targetm.legitimate_constant_p (mode == VOIDmode -+ ? GET_MODE (op) -+ : mode, op)); - - /* Except for certain constants with VOIDmode, already checked for, - OP's mode must match MODE if MODE specifies a mode. */ -@@ -1107,7 +1109,9 @@ - && (GET_MODE (op) == mode || mode == VOIDmode - || GET_MODE (op) == VOIDmode) - && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op)) -- && LEGITIMATE_CONSTANT_P (op)); -+ && targetm.legitimate_constant_p (mode == VOIDmode -+ ? GET_MODE (op) -+ : mode, op)); - } - - /* Returns 1 if OP is an operand that is a CONST_INT. */ ---- a/src/gcc/regcprop.c -+++ b/src/gcc/regcprop.c -@@ -418,10 +418,9 @@ - - offset = ((WORDS_BIG_ENDIAN ? wordoffset : 0) - + (BYTES_BIG_ENDIAN ? byteoffset : 0)); -- return gen_rtx_raw_REG (new_mode, -- regno + subreg_regno_offset (regno, orig_mode, -- offset, -- new_mode)); -+ regno += subreg_regno_offset (regno, orig_mode, offset, new_mode); -+ if (HARD_REGNO_MODE_OK (regno, new_mode)) -+ return gen_rtx_raw_REG (new_mode, regno); - } - return NULL_RTX; - } ---- a/src/gcc/reload.c -+++ b/src/gcc/reload.c -@@ -1017,6 +1017,7 @@ - #ifdef CANNOT_CHANGE_MODE_CLASS - && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, rclass) - #endif -+ && contains_reg_of_mode[(int) rclass][(int) GET_MODE (SUBREG_REG (in))] - && (CONSTANT_P (SUBREG_REG (in)) - || GET_CODE (SUBREG_REG (in)) == PLUS - || strict_low -@@ -1123,6 +1124,7 @@ - #ifdef CANNOT_CHANGE_MODE_CLASS - && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, rclass) - #endif -+ && contains_reg_of_mode[(int) rclass][(int) GET_MODE (SUBREG_REG (out))] - && (CONSTANT_P (SUBREG_REG (out)) - || strict_low - || (((REG_P (SUBREG_REG (out)) -@@ -4721,7 +4723,8 @@ - simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno], - GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x)); - gcc_assert (tem); -- if (CONSTANT_P (tem) && !LEGITIMATE_CONSTANT_P (tem)) -+ if (CONSTANT_P (tem) -+ && !targetm.legitimate_constant_p (GET_MODE (x), tem)) - { - tem = force_const_mem (GET_MODE (x), tem); - i = find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0), -@@ -6049,7 +6052,7 @@ - enum reload_type type, int ind_levels) - { - if (CONSTANT_P (x) -- && (! LEGITIMATE_CONSTANT_P (x) -+ && (!targetm.legitimate_constant_p (mode, x) - || targetm.preferred_reload_class (x, rclass) == NO_REGS)) - { - x = force_const_mem (mode, x); -@@ -6059,7 +6062,7 @@ - - else if (GET_CODE (x) == PLUS - && CONSTANT_P (XEXP (x, 1)) -- && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1)) -+ && (!targetm.legitimate_constant_p (GET_MODE (x), XEXP (x, 1)) - || targetm.preferred_reload_class (XEXP (x, 1), rclass) - == NO_REGS)) - { ---- a/src/gcc/reload1.c -+++ b/src/gcc/reload1.c -@@ -3899,6 +3899,10 @@ - if (XEXP (x, 0)) - set_label_offsets (XEXP (x, 0), NULL_RTX, 1); - -+ for (x = nonlocal_goto_handler_labels; x; x = XEXP (x, 1)) -+ if (XEXP (x, 0)) -+ set_label_offsets (XEXP (x, 0), NULL_RTX, 1); -+ - for_each_eh_label (set_initial_eh_label_offset); - } - -@@ -4155,6 +4159,9 @@ - } - else if (function_invariant_p (x)) - { -+ enum machine_mode mode; -+ -+ mode = GET_MODE (SET_DEST (set)); - if (GET_CODE (x) == PLUS) - { - /* This is PLUS of frame pointer and a constant, -@@ -4167,12 +4174,11 @@ - reg_equiv_invariant[i] = x; - num_eliminable_invariants++; - } -- else if (LEGITIMATE_CONSTANT_P (x)) -+ else if (targetm.legitimate_constant_p (mode, x)) - reg_equiv_constant[i] = x; - else - { -- reg_equiv_memory_loc[i] -- = force_const_mem (GET_MODE (SET_DEST (set)), x); -+ reg_equiv_memory_loc[i] = force_const_mem (mode, x); - if (! reg_equiv_memory_loc[i]) - reg_equiv_init[i] = NULL_RTX; - } -@@ -4474,6 +4480,43 @@ - } - } - } -+ -+/* *OP_PTR and *OTHER_PTR are two operands to a conceptual reload. -+ If *OP_PTR is a paradoxical subreg, try to remove that subreg -+ and apply the corresponding narrowing subreg to *OTHER_PTR. -+ Return true if the operands were changed, false otherwise. */ -+ -+static bool -+strip_paradoxical_subreg (rtx *op_ptr, rtx *other_ptr) -+{ -+ rtx op, inner, other, tem; -+ -+ op = *op_ptr; -+ if (GET_CODE (op) != SUBREG) -+ return false; -+ -+ inner = SUBREG_REG (op); -+ if (GET_MODE_SIZE (GET_MODE (op)) <= GET_MODE_SIZE (GET_MODE (inner))) -+ return false; -+ -+ other = *other_ptr; -+ tem = gen_lowpart_common (GET_MODE (inner), other); -+ if (!tem) -+ return false; -+ -+ /* If the lowpart operation turned a hard register into a subreg, -+ rather than simplifying it to another hard register, then the -+ mode change cannot be properly represented. For example, OTHER -+ might be valid in its current mode, but not in the new one. */ -+ if (GET_CODE (tem) == SUBREG -+ && REG_P (other) -+ && HARD_REGISTER_P (other)) -+ return false; -+ -+ *op_ptr = inner; -+ *other_ptr = tem; -+ return true; -+} - - /* A subroutine of reload_as_needed. If INSN has a REG_EH_REGION note, - examine all of the reload insns between PREV and NEXT exclusive, and -@@ -5554,7 +5597,7 @@ - chain reloads or do need an intermediate hard registers. */ - bool result = true; - int regno, n, code; -- rtx out, in, tem, insn; -+ rtx out, in, insn; - rtx last = get_last_insn (); - - /* Make r2 a component of r1. */ -@@ -5573,11 +5616,7 @@ - - /* If IN is a paradoxical SUBREG, remove it and try to put the - opposite SUBREG on OUT. Likewise for a paradoxical SUBREG on OUT. */ -- if (GET_CODE (in) == SUBREG -- && (GET_MODE_SIZE (GET_MODE (in)) -- > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) -- && (tem = gen_lowpart_common (GET_MODE (SUBREG_REG (in)), out)) != 0) -- in = SUBREG_REG (in), out = tem; -+ strip_paradoxical_subreg (&in, &out); - - if (GET_CODE (in) == PLUS - && (REG_P (XEXP (in, 0)) -@@ -6449,6 +6488,8 @@ - - if (regno >= 0 - && reg_last_reload_reg[regno] != 0 -+ && (GET_MODE_SIZE (GET_MODE (reg_last_reload_reg[regno])) -+ >= GET_MODE_SIZE (mode) + byte) - #ifdef CANNOT_CHANGE_MODE_CLASS - /* Verify that the register it's in can be used in - mode MODE. */ -@@ -6460,24 +6501,12 @@ - { - enum reg_class rclass = rld[r].rclass, last_class; - rtx last_reg = reg_last_reload_reg[regno]; -- enum machine_mode need_mode; - - i = REGNO (last_reg); - i += subreg_regno_offset (i, GET_MODE (last_reg), byte, mode); - last_class = REGNO_REG_CLASS (i); - -- if (byte == 0) -- need_mode = mode; -- else -- need_mode -- = smallest_mode_for_size -- (GET_MODE_BITSIZE (mode) + byte * BITS_PER_UNIT, -- GET_MODE_CLASS (mode) == MODE_PARTIAL_INT -- ? MODE_INT : GET_MODE_CLASS (mode)); -- -- if ((GET_MODE_SIZE (GET_MODE (last_reg)) -- >= GET_MODE_SIZE (need_mode)) -- && reg_reloaded_contents[i] == regno -+ if (reg_reloaded_contents[i] == regno - && TEST_HARD_REG_BIT (reg_reloaded_valid, i) - && HARD_REGNO_MODE_OK (i, rld[r].mode) - && (TEST_HARD_REG_BIT (reg_class_contents[(int) rclass], i) -@@ -7579,7 +7608,6 @@ - if (tertiary_icode != CODE_FOR_nothing) - { - rtx third_reloadreg = rld[tertiary_reload].reg_rtx; -- rtx tem; - - /* Copy primary reload reg to secondary reload reg. - (Note that these have been swapped above, then -@@ -7588,13 +7616,7 @@ - /* If REAL_OLD is a paradoxical SUBREG, remove it - and try to put the opposite SUBREG on - RELOADREG. */ -- if (GET_CODE (real_old) == SUBREG -- && (GET_MODE_SIZE (GET_MODE (real_old)) -- > GET_MODE_SIZE (GET_MODE (SUBREG_REG (real_old)))) -- && 0 != (tem = gen_lowpart_common -- (GET_MODE (SUBREG_REG (real_old)), -- reloadreg))) -- real_old = SUBREG_REG (real_old), reloadreg = tem; -+ strip_paradoxical_subreg (&real_old, &reloadreg); - - gen_reload (reloadreg, second_reloadreg, - rl->opnum, rl->when_needed); -@@ -8410,16 +8432,8 @@ - - /* If IN is a paradoxical SUBREG, remove it and try to put the - opposite SUBREG on OUT. Likewise for a paradoxical SUBREG on OUT. */ -- if (GET_CODE (in) == SUBREG -- && (GET_MODE_SIZE (GET_MODE (in)) -- > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) -- && (tem = gen_lowpart_common (GET_MODE (SUBREG_REG (in)), out)) != 0) -- in = SUBREG_REG (in), out = tem; -- else if (GET_CODE (out) == SUBREG -- && (GET_MODE_SIZE (GET_MODE (out)) -- > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))) -- && (tem = gen_lowpart_common (GET_MODE (SUBREG_REG (out)), in)) != 0) -- out = SUBREG_REG (out), in = tem; -+ if (!strip_paradoxical_subreg (&in, &out)) -+ strip_paradoxical_subreg (&out, &in); - - /* How to do this reload can get quite tricky. Normally, we are being - asked to reload a simple operand, such as a MEM, a constant, or a pseudo ---- a/src/gcc/reorg.c -+++ b/src/gcc/reorg.c -@@ -3554,9 +3554,11 @@ - } - } - -+ /* See if we have a simple (conditional) jump that is useless. */ - if (! INSN_ANNULLED_BRANCH_P (delay_insn) -- && prev_active_insn (target_label) == insn - && ! condjump_in_parallel_p (delay_insn) -+ && prev_active_insn (target_label) == insn -+ && ! BARRIER_P (prev_nonnote_insn (target_label)) - #ifdef HAVE_cc0 - /* If the last insn in the delay slot sets CC0 for some insn, - various code assumes that it is in a delay slot. We could ---- a/src/gcc/simplify-rtx.c -+++ b/src/gcc/simplify-rtx.c -@@ -1000,6 +1000,48 @@ - && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF) - return XEXP (op, 0); - -+ /* Extending a widening multiplication should be canonicalized to -+ a wider widening multiplication. */ -+ if (GET_CODE (op) == MULT) -+ { -+ rtx lhs = XEXP (op, 0); -+ rtx rhs = XEXP (op, 1); -+ enum rtx_code lcode = GET_CODE (lhs); -+ enum rtx_code rcode = GET_CODE (rhs); -+ -+ /* Widening multiplies usually extend both operands, but sometimes -+ they use a shift to extract a portion of a register. */ -+ if ((lcode == SIGN_EXTEND -+ || (lcode == ASHIFTRT && CONST_INT_P (XEXP (lhs, 1)))) -+ && (rcode == SIGN_EXTEND -+ || (rcode == ASHIFTRT && CONST_INT_P (XEXP (rhs, 1))))) -+ { -+ enum machine_mode lmode = GET_MODE (lhs); -+ enum machine_mode rmode = GET_MODE (rhs); -+ int bits; -+ -+ if (lcode == ASHIFTRT) -+ /* Number of bits not shifted off the end. */ -+ bits = GET_MODE_PRECISION (lmode) - INTVAL (XEXP (lhs, 1)); -+ else /* lcode == SIGN_EXTEND */ -+ /* Size of inner mode. */ -+ bits = GET_MODE_PRECISION (GET_MODE (XEXP (lhs, 0))); -+ -+ if (rcode == ASHIFTRT) -+ bits += GET_MODE_PRECISION (rmode) - INTVAL (XEXP (rhs, 1)); -+ else /* rcode == SIGN_EXTEND */ -+ bits += GET_MODE_PRECISION (GET_MODE (XEXP (rhs, 0))); -+ -+ /* We can only widen multiplies if the result is mathematiclly -+ equivalent. I.e. if overflow was impossible. */ -+ if (bits <= GET_MODE_PRECISION (GET_MODE (op))) -+ return simplify_gen_binary -+ (MULT, mode, -+ simplify_gen_unary (SIGN_EXTEND, mode, lhs, lmode), -+ simplify_gen_unary (SIGN_EXTEND, mode, rhs, rmode)); -+ } -+ } -+ - /* Check for a sign extension of a subreg of a promoted - variable, where the promotion is sign-extended, and the - target mode is the same as the variable's promotion. */ -@@ -1071,6 +1113,48 @@ - && GET_MODE_SIZE (mode) <= GET_MODE_SIZE (GET_MODE (XEXP (op, 0)))) - return rtl_hooks.gen_lowpart_no_emit (mode, op); - -+ /* Extending a widening multiplication should be canonicalized to -+ a wider widening multiplication. */ -+ if (GET_CODE (op) == MULT) -+ { -+ rtx lhs = XEXP (op, 0); -+ rtx rhs = XEXP (op, 1); -+ enum rtx_code lcode = GET_CODE (lhs); -+ enum rtx_code rcode = GET_CODE (rhs); -+ -+ /* Widening multiplies usually extend both operands, but sometimes -+ they use a shift to extract a portion of a register. */ -+ if ((lcode == ZERO_EXTEND -+ || (lcode == LSHIFTRT && CONST_INT_P (XEXP (lhs, 1)))) -+ && (rcode == ZERO_EXTEND -+ || (rcode == LSHIFTRT && CONST_INT_P (XEXP (rhs, 1))))) -+ { -+ enum machine_mode lmode = GET_MODE (lhs); -+ enum machine_mode rmode = GET_MODE (rhs); -+ int bits; -+ -+ if (lcode == LSHIFTRT) -+ /* Number of bits not shifted off the end. */ -+ bits = GET_MODE_PRECISION (lmode) - INTVAL (XEXP (lhs, 1)); -+ else /* lcode == ZERO_EXTEND */ -+ /* Size of inner mode. */ -+ bits = GET_MODE_PRECISION (GET_MODE (XEXP (lhs, 0))); -+ -+ if (rcode == LSHIFTRT) -+ bits += GET_MODE_PRECISION (rmode) - INTVAL (XEXP (rhs, 1)); -+ else /* rcode == ZERO_EXTEND */ -+ bits += GET_MODE_PRECISION (GET_MODE (XEXP (rhs, 0))); -+ -+ /* We can only widen multiplies if the result is mathematiclly -+ equivalent. I.e. if overflow was impossible. */ -+ if (bits <= GET_MODE_PRECISION (GET_MODE (op))) -+ return simplify_gen_binary -+ (MULT, mode, -+ simplify_gen_unary (ZERO_EXTEND, mode, lhs, lmode), -+ simplify_gen_unary (ZERO_EXTEND, mode, rhs, rmode)); -+ } -+ } -+ - /* (zero_extend:M (zero_extend:N <X>)) is (zero_extend:M <X>). */ - if (GET_CODE (op) == ZERO_EXTEND) - return simplify_gen_unary (ZERO_EXTEND, mode, XEXP (op, 0), -@@ -2506,6 +2590,46 @@ - XEXP (op0, 1), mode), - op1); - -+ /* Given (xor (and A B) C), using P^Q == (~P&Q) | (~Q&P), -+ we can transform like this: -+ (A&B)^C == ~(A&B)&C | ~C&(A&B) -+ == (~A|~B)&C | ~C&(A&B) * DeMorgan's Law -+ == ~A&C | ~B&C | A&(~C&B) * Distribute and re-order -+ Attempt a few simplifications when B and C are both constants. */ -+ if (GET_CODE (op0) == AND -+ && CONST_INT_P (op1) -+ && CONST_INT_P (XEXP (op0, 1))) -+ { -+ rtx a = XEXP (op0, 0); -+ rtx b = XEXP (op0, 1); -+ rtx c = op1; -+ HOST_WIDE_INT bval = INTVAL (b); -+ HOST_WIDE_INT cval = INTVAL (c); -+ -+ rtx na_c -+ = simplify_binary_operation (AND, mode, -+ simplify_gen_unary (NOT, mode, a, mode), -+ c); -+ if ((~cval & bval) == 0) -+ { -+ /* Try to simplify ~A&C | ~B&C. */ -+ if (na_c != NULL_RTX) -+ return simplify_gen_binary (IOR, mode, na_c, -+ GEN_INT (~bval & cval)); -+ } -+ else -+ { -+ /* If ~A&C is zero, simplify A&(~C&B) | ~B&C. */ -+ if (na_c == const0_rtx) -+ { -+ rtx a_nc_b = simplify_gen_binary (AND, mode, a, -+ GEN_INT (~cval & bval)); -+ return simplify_gen_binary (IOR, mode, a_nc_b, -+ GEN_INT (~bval & cval)); -+ } -+ } -+ } -+ - /* (xor (comparison foo bar) (const_int 1)) can become the reversed - comparison if STORE_FLAG_VALUE is 1. */ - if (STORE_FLAG_VALUE == 1 -@@ -5443,6 +5567,7 @@ - /* Optimize SUBREG truncations of zero and sign extended values. */ - if ((GET_CODE (op) == ZERO_EXTEND - || GET_CODE (op) == SIGN_EXTEND) -+ && SCALAR_INT_MODE_P (innermode) - && GET_MODE_BITSIZE (outermode) < GET_MODE_BITSIZE (innermode)) - { - unsigned int bitpos = subreg_lsb_1 (outermode, innermode, byte); -@@ -5481,6 +5606,7 @@ - if ((GET_CODE (op) == LSHIFTRT - || GET_CODE (op) == ASHIFTRT) - && SCALAR_INT_MODE_P (outermode) -+ && SCALAR_INT_MODE_P (innermode) - /* Ensure that OUTERMODE is at least twice as wide as the INNERMODE - to avoid the possibility that an outer LSHIFTRT shifts by more - than the sign extension's sign_bit_copies and introduces zeros -@@ -5500,6 +5626,7 @@ - if ((GET_CODE (op) == LSHIFTRT - || GET_CODE (op) == ASHIFTRT) - && SCALAR_INT_MODE_P (outermode) -+ && SCALAR_INT_MODE_P (innermode) - && GET_MODE_BITSIZE (outermode) < GET_MODE_BITSIZE (innermode) - && CONST_INT_P (XEXP (op, 1)) - && GET_CODE (XEXP (op, 0)) == ZERO_EXTEND -@@ -5514,6 +5641,7 @@ - the outer subreg is effectively a truncation to the original mode. */ - if (GET_CODE (op) == ASHIFT - && SCALAR_INT_MODE_P (outermode) -+ && SCALAR_INT_MODE_P (innermode) - && GET_MODE_BITSIZE (outermode) < GET_MODE_BITSIZE (innermode) - && CONST_INT_P (XEXP (op, 1)) - && (GET_CODE (XEXP (op, 0)) == ZERO_EXTEND -@@ -5527,7 +5655,7 @@ - /* Recognize a word extraction from a multi-word subreg. */ - if ((GET_CODE (op) == LSHIFTRT - || GET_CODE (op) == ASHIFTRT) -- && SCALAR_INT_MODE_P (outermode) -+ && SCALAR_INT_MODE_P (innermode) - && GET_MODE_BITSIZE (outermode) >= BITS_PER_WORD - && GET_MODE_BITSIZE (innermode) >= (2 * GET_MODE_BITSIZE (outermode)) - && CONST_INT_P (XEXP (op, 1)) -@@ -5549,6 +5677,7 @@ - - if ((GET_CODE (op) == LSHIFTRT - || GET_CODE (op) == ASHIFTRT) -+ && SCALAR_INT_MODE_P (innermode) - && MEM_P (XEXP (op, 0)) - && CONST_INT_P (XEXP (op, 1)) - && GET_MODE_SIZE (outermode) < GET_MODE_SIZE (GET_MODE (op)) ---- a/src/gcc/stor-layout.c -+++ b/src/gcc/stor-layout.c -@@ -546,6 +546,34 @@ - return MIN (BIGGEST_ALIGNMENT, MAX (1, mode_base_align[mode]*BITS_PER_UNIT)); - } - -+/* Return the natural mode of an array, given that it is SIZE bytes in -+ total and has elements of type ELEM_TYPE. */ -+ -+static enum machine_mode -+mode_for_array (tree elem_type, tree size) -+{ -+ tree elem_size; -+ unsigned HOST_WIDE_INT int_size, int_elem_size; -+ bool limit_p; -+ -+ /* One-element arrays get the component type's mode. */ -+ elem_size = TYPE_SIZE (elem_type); -+ if (simple_cst_equal (size, elem_size)) -+ return TYPE_MODE (elem_type); -+ -+ limit_p = true; -+ if (host_integerp (size, 1) && host_integerp (elem_size, 1)) -+ { -+ int_size = tree_low_cst (size, 1); -+ int_elem_size = tree_low_cst (elem_size, 1); -+ if (int_elem_size > 0 -+ && int_size % int_elem_size == 0 -+ && targetm.array_mode_supported_p (TYPE_MODE (elem_type), -+ int_size / int_elem_size)) -+ limit_p = false; -+ } -+ return mode_for_size_tree (size, MODE_INT, limit_p); -+} - - /* Subroutine of layout_decl: Force alignment required for the data type. - But if the decl itself wants greater alignment, don't override that. */ -@@ -2039,14 +2067,8 @@ - && (TYPE_MODE (TREE_TYPE (type)) != BLKmode - || TYPE_NO_FORCE_BLK (TREE_TYPE (type)))) - { -- /* One-element arrays get the component type's mode. */ -- if (simple_cst_equal (TYPE_SIZE (type), -- TYPE_SIZE (TREE_TYPE (type)))) -- SET_TYPE_MODE (type, TYPE_MODE (TREE_TYPE (type))); -- else -- SET_TYPE_MODE (type, mode_for_size_tree (TYPE_SIZE (type), -- MODE_INT, 1)); -- -+ SET_TYPE_MODE (type, mode_for_array (TREE_TYPE (type), -+ TYPE_SIZE (type))); - if (TYPE_MODE (type) != BLKmode - && STRICT_ALIGNMENT && TYPE_ALIGN (type) < BIGGEST_ALIGNMENT - && TYPE_ALIGN (type) < GET_MODE_ALIGNMENT (TYPE_MODE (type))) ---- a/src/gcc/target.def -+++ b/src/gcc/target.def -@@ -1344,6 +1344,13 @@ - unsigned, (unsigned nunroll, struct loop *loop), - NULL) - -+/* True if X is a legitimate MODE-mode immediate operand. */ -+DEFHOOK -+(legitimate_constant_p, -+ "", -+ bool, (enum machine_mode mode, rtx x), -+ default_legitimate_constant_p) -+ - /* True if the constant X cannot be placed in the constant pool. */ - DEFHOOK - (cannot_force_const_mem, -@@ -1611,6 +1618,38 @@ - bool, (enum machine_mode mode), - hook_bool_mode_false) - -+/* True if we should try to use a scalar mode to represent an array, -+ overriding the usual MAX_FIXED_MODE limit. */ -+DEFHOOK -+(array_mode_supported_p, -+ "Return true if GCC should try to use a scalar mode to store an array\n\ -+of @var{nelems} elements, given that each element has mode @var{mode}.\n\ -+Returning true here overrides the usual @code{MAX_FIXED_MODE} limit\n\ -+and allows GCC to use any defined integer mode.\n\ -+\n\ -+One use of this hook is to support vector load and store operations\n\ -+that operate on several homogeneous vectors. For example, ARM NEON\n\ -+has operations like:\n\ -+\n\ -+@smallexample\n\ -+int8x8x3_t vld3_s8 (const int8_t *)\n\ -+@end smallexample\n\ -+\n\ -+where the return type is defined as:\n\ -+\n\ -+@smallexample\n\ -+typedef struct int8x8x3_t\n\ -+@{\n\ -+ int8x8_t val[3];\n\ -+@} int8x8x3_t;\n\ -+@end smallexample\n\ -+\n\ -+If this hook allows @code{val} to have a scalar mode, then\n\ -+@code{int8x8x3_t} can have the same mode. GCC can then store\n\ -+@code{int8x8x3_t}s in registers rather than forcing them onto the stack.", -+ bool, (enum machine_mode mode, unsigned HOST_WIDE_INT nelems), -+ hook_bool_mode_uhwi_false) -+ - /* Compute cost of moving data from a register of class FROM to one of - TO, using MODE. */ - DEFHOOK ---- a/src/gcc/targhooks.c -+++ b/src/gcc/targhooks.c -@@ -1519,4 +1519,15 @@ - { OPT_LEVELS_NONE, 0, NULL, 0 } - }; - -+bool -+default_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, -+ rtx x ATTRIBUTE_UNUSED) -+{ -+#ifdef LEGITIMATE_CONSTANT_P -+ return LEGITIMATE_CONSTANT_P (x); -+#else -+ return true; -+#endif -+} -+ - #include "gt-targhooks.h" ---- a/src/gcc/targhooks.h -+++ b/src/gcc/targhooks.h -@@ -183,3 +183,4 @@ - - extern void *default_get_pch_validity (size_t *); - extern const char *default_pch_valid_p (const void *, size_t); -+extern bool default_legitimate_constant_p (enum machine_mode, rtx); ---- a/src/gcc/testsuite/ChangeLog -+++ b/src/gcc/testsuite/ChangeLog -@@ -1,3 +1,69 @@ -+2011-11-25 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/50408 -+ * gfortran.dg/whole_file_35.f90: New. -+ -+2011-11-24 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/51218 -+ * resolve.c (pure_subroutine): If called subroutine is -+ impure, unset implicit_pure. -+ (resolve_function): Move impure check to simplify code. -+ -+2011-11-22 Paolo Carlini <paolo.carlini@oracle.com> -+ -+ PR c++/51265 -+ * g++.dg/cpp0x/decltype36.C: New. -+ -+2011-11-19 Eric Botcazou <ebotcazou@adacore.com> -+ -+ * gcc.dg/delay-slot-2.c: New test. -+ -+2011-11-18 Joseph Myers <joseph@codesourcery.com> -+ -+ * gcc.dg/cpp/assert4.c: Test __linux__, not __gnu_linux__. -+ -+2011-11-18 Paolo Carlini <paolo.carlini@oracle.com> -+ -+ PR c++/51150 -+ * g++.dg/cpp0x/pr51150.C: New. -+ -+2011-11-16 Richard Earnshaw <rearnsha@arm.com> -+ Bernd Schmidt <bernds@coudesourcery.com> -+ Sebastian Huber <sebastian.huber@embedded-brains.de> -+ -+ PR target/49641 -+ * gcc.target/arm/pr49641.c: New test. -+ -+2011-11-10 Jakub Jelinek <jakub@redhat.com> -+ -+ PR middle-end/51077 -+ * gcc.c-torture/compile/pr51077.c: New test. -+ -+2011-11-07 Jason Merrill <jason@redhat.com> -+ -+ PR c++/50870 -+ * g++.dg/cpp0x/decltype35.C: New. -+ -+2011-11-04 Eric Botcazou <ebotcazou@adacore.com> -+ -+ * g++.dg/other/offsetof7.C: New test. -+ -+2011-11-02 Bernd Schmidt <bernds@codesourcery.com> -+ -+ * gcc.c-torture/compile/20110907.c: New file. -+ -+2011-10-29 Paolo Carlini <paolo.carlini@oracle.com> -+ -+ PR c++/50901 -+ * g++.dg/cpp0x/pr50901.C: New. -+ -+2011-10-27 Uros Bizjak <ubizjak@gmail.com> -+ Steven G. Kargl <kargl@gcc.gnu.org> -+ -+ PR target/50875 -+ * gfortran.dg/pr50875.f90: New test. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/gcc/testsuite/g++.dg/cpp0x/decltype35.C -+++ b/src/gcc/testsuite/g++.dg/cpp0x/decltype35.C -@@ -0,0 +1,15 @@ -+// PR c++/50870 -+// { dg-options -std=c++0x } -+ -+template <class V> -+ struct impl -+ { -+ template <class T> static T create(); -+ }; -+ -+template <class T, class U, class V, class -+ = decltype(impl<V>::template create<T>() -+ -> impl<V>::template create<U>())> -+struct tester { }; -+ -+tester<impl<float>*, int, float> ti; ---- a/src/gcc/testsuite/g++.dg/cpp0x/decltype36.C -+++ b/src/gcc/testsuite/g++.dg/cpp0x/decltype36.C -@@ -0,0 +1,21 @@ -+// PR c++/51265 -+// { dg-options -std=c++0x } -+ -+struct Funny -+{ -+ int print(int); -+}; -+ -+template<typename X> -+void c(); -+ -+template<typename X, X ff> -+void xx() -+{ -+ c<decltype(ff)>(); -+} -+ -+int main() -+{ -+ xx<int(Funny::*)(int), &Funny::print>(); -+} ---- a/src/gcc/testsuite/g++.dg/cpp0x/pr50901.C -+++ b/src/gcc/testsuite/g++.dg/cpp0x/pr50901.C -@@ -0,0 +1,9 @@ -+// { dg-options "-std=c++0x" } -+ -+template<class T> int foo(int a) -+{ -+ const unsigned b = a < 0 ? -a : a; -+ return 0; -+} -+ -+int i = foo<float>(1); ---- a/src/gcc/testsuite/g++.dg/cpp0x/pr51150.C -+++ b/src/gcc/testsuite/g++.dg/cpp0x/pr51150.C -@@ -0,0 +1,20 @@ -+// PR c++/51150 -+// { dg-options "-std=c++0x" } -+ -+struct Clock { -+ double Now(); -+}; -+template <class T> void Foo(Clock* clock) { -+ const int now = clock->Now(); -+} -+ -+template void Foo<float>(Clock*); -+ -+template <class T> void Boo(int val) { -+ const int now1 = (double)(val); -+ const int now2 = const_cast<double>(val); // { dg-error "invalid" } -+ const int now3 = static_cast<double>(val); -+ const int now4 = reinterpret_cast<double>(val); // { dg-error "invalid" } -+} -+ -+template void Boo<float>(int); ---- a/src/gcc/testsuite/g++.dg/other/offsetof7.C -+++ b/src/gcc/testsuite/g++.dg/other/offsetof7.C -@@ -0,0 +1,17 @@ -+// PR c++/50608 -+// Testcase by <dberger@oubliette.org> -+// { dg-do compile } -+ -+struct A { -+ int offset; -+}; -+ -+struct B: public A { -+}; -+ -+struct C { -+ A a; -+ B b; -+}; -+ -+int fails = __builtin_offsetof (C, b.offset); ---- a/src/gcc/testsuite/gcc.c-torture/compile/20110401-1.c -+++ b/src/gcc/testsuite/gcc.c-torture/compile/20110401-1.c -@@ -0,0 +1,22 @@ -+void asn1_length_der (unsigned long int len, unsigned char *ans, int *ans_len) -+{ -+ int k; -+ unsigned char temp[4]; -+ if (len < 128) { -+ if (ans != ((void *) 0)) -+ ans[0] = (unsigned char) len; -+ *ans_len = 1; -+ } else { -+ k = 0; -+ while (len) { -+ temp[k++] = len & 0xFF; -+ len = len >> 8; -+ } -+ *ans_len = k + 1; -+ if (ans != ((void *) 0)) { -+ ans[0] = ((unsigned char) k & 0x7F) + 128; -+ while (k--) -+ ans[*ans_len - 1 - k] = temp[k]; -+ } -+ } -+} ---- a/src/gcc/testsuite/gcc.c-torture/compile/20110913-1.c -+++ b/src/gcc/testsuite/gcc.c-torture/compile/20110913-1.c -@@ -0,0 +1,26 @@ -+struct ieee754_double { -+ double d; -+}; -+extern const float __exp_deltatable[178]; -+float __ieee754_expf (float x) -+{ -+ static const float himark = 88.72283935546875; -+ static const float lomark = -103.972084045410; -+ if (__builtin_isless(x, himark) && __builtin_isgreater(x, lomark)) -+ { -+ int tval; -+ double x22, t, result, dx; -+ float delta; -+ struct ieee754_double ex2_u; -+ dx -= t; -+ tval = (int) (t * 512.0); -+ if (t >= 0) -+ delta = - __exp_deltatable[tval]; -+ else -+ delta = __exp_deltatable[-tval]; -+ x22 = (0.5000000496709180453 * dx + 1.0000001192102037084) * dx + delta; -+ result = x22 * ex2_u.d + ex2_u.d; -+ return (float) result; -+ } -+ return x; -+} ---- a/src/gcc/testsuite/gcc.c-torture/compile/pr51077.c -+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr51077.c -@@ -0,0 +1,15 @@ -+/* PR middle-end/51077 */ -+ -+struct S { unsigned char s, t[256]; }; -+ -+void -+foo (const struct S *x, struct S *y, int z) -+{ -+ int i; -+ for (i = 0; i < 8; i++) -+ { -+ const struct S *a = &x[i]; -+ __builtin___memcpy_chk (y->t, a->t, z, __builtin_object_size (y->t, 0)); -+ y = (struct S *) &y->t[z]; -+ } -+} ---- a/src/gcc/testsuite/gcc.dg/cpp/assert4.c -+++ b/src/gcc/testsuite/gcc.dg/cpp/assert4.c -@@ -1,4 +1,4 @@ --/* Copyright (C) 2003, 2006, 2008 Free Software Foundation, Inc. -+/* Copyright (C) 2003, 2006, 2008, 2009, 2011 Free Software Foundation, Inc. - Test builtin preprocessor assertions. - By Kaveh Ghazi <ghazi@caip.rutgers.edu>. */ - -@@ -7,7 +7,7 @@ - - /* Check for #system assertions. */ - --#if defined __gnu_linux__ -+#if defined __linux__ - # if !#system(linux) || !#system(unix) || !#system(posix) - # error - # endif ---- a/src/gcc/testsuite/gcc.dg/delay-slot-2.c -+++ b/src/gcc/testsuite/gcc.dg/delay-slot-2.c -@@ -0,0 +1,116 @@ -+/* PR rtl-optimization/51187 */ -+/* Reported by Jurij Smakov <jurij@wooyd.org> */ -+ -+/* { dg-do compile } */ -+/* { dg-options "-g -O2" } */ -+ -+extern int printf (__const char *__restrict __format, ...); -+extern void print_c_condition (const char *); -+ -+enum decision_type -+{ -+ DT_num_insns, -+ DT_mode, DT_code, DT_veclen, -+ DT_elt_zero_int, DT_elt_one_int, DT_elt_zero_wide, DT_elt_zero_wide_safe, -+ DT_const_int, -+ DT_veclen_ge, DT_dup, DT_pred, DT_c_test, -+ DT_accept_op, DT_accept_insn -+}; -+ -+struct decision_test -+{ -+ struct decision_test *next; -+ enum decision_type type; -+ -+ union -+ { -+ int num_insns; -+ -+ struct -+ { -+ const char *name; -+ } pred; -+ -+ const char *c_test; -+ int veclen; -+ int dup; -+ long intval; -+ int opno; -+ -+ struct { -+ int code_number; -+ int lineno; -+ int num_clobbers_to_add; -+ } insn; -+ } u; -+}; -+ -+enum routine_type { -+ RECOG, SPLIT, PEEPHOLE2 -+}; -+ -+void -+write_cond (struct decision_test *p, int depth, -+ enum routine_type subroutine_type) -+{ -+ switch (p->type) -+ { -+ case DT_num_insns: -+ printf ("peep2_current_count >= %d", p->u.num_insns); -+ break; -+ -+ case DT_code: -+ printf ("GET_CODE (x%d) == ", depth); -+ break; -+ -+ case DT_veclen: -+ printf ("XVECLEN (x%d, 0) == %d", depth, p->u.veclen); -+ break; -+ -+ case DT_elt_zero_int: -+ printf ("XINT (x%d, 0) == %d", depth, (int) p->u.intval); -+ break; -+ -+ case DT_elt_one_int: -+ printf ("XINT (x%d, 1) == %d", depth, (int) p->u.intval); -+ break; -+ -+ case DT_elt_zero_wide: -+ case DT_elt_zero_wide_safe: -+ printf ("XWINT (x%d, 0) == ", depth); -+ print_host_wide_int (p->u.intval); -+ break; -+ -+ case DT_const_int: -+ printf ("x%d == const_int_rtx[MAX_SAVED_CONST_INT + (%d)]", -+ depth, (int) p->u.intval); -+ break; -+ -+ case DT_veclen_ge: -+ printf ("XVECLEN (x%d, 0) >= %d", depth, p->u.veclen); -+ break; -+ -+ case DT_dup: -+ printf ("rtx_equal_p (x%d, operands[%d])", depth, p->u.dup); -+ break; -+ -+ case DT_pred: -+ printf ("%s (x%d)", p->u.pred.name, depth); -+ break; -+ -+ case DT_c_test: -+ print_c_condition (p->u.c_test); -+ break; -+ -+ case DT_accept_insn: -+ ((void)(__builtin_expect(!(subroutine_type == RECOG), 0) ? __builtin_unreachable(), 0 : 0)); -+ ((void)(__builtin_expect(!(p->u.insn.num_clobbers_to_add), 0) ? __builtin_unreachable(), 0 : 0)); -+ printf ("pnum_clobbers != NULL"); -+ break; -+ -+ default: -+ __builtin_unreachable(); -+ } -+} -+ -+/* { dg-final { scan-assembler "printf" } } */ ---- a/src/gcc/testsuite/gcc.dg/di-longlong64-sync-1.c -+++ b/src/gcc/testsuite/gcc.dg/di-longlong64-sync-1.c -@@ -0,0 +1,164 @@ -+/* { dg-do run } */ -+/* { dg-require-effective-target sync_longlong } */ -+/* { dg-options "-std=gnu99" } */ -+/* { dg-message "note: '__sync_fetch_and_nand' changed semantics in GCC 4.4" "" { target *-*-* } 0 } */ -+/* { dg-message "note: '__sync_nand_and_fetch' changed semantics in GCC 4.4" "" { target *-*-* } 0 } */ -+ -+ -+/* Test basic functionality of the intrinsics. The operations should -+ not be optimized away if no one checks the return values. */ -+ -+/* Based on ia64-sync-[12].c, but 1) long on ARM is 32 bit so use long long -+ (an explicit 64bit type maybe a better bet) and 2) Use values that cross -+ the 32bit boundary and cause carries since the actual maths are done as -+ pairs of 32 bit instructions. */ -+ -+/* Note: This file is #included by some of the ARM tests. */ -+ -+__extension__ typedef __SIZE_TYPE__ size_t; -+ -+extern void abort (void); -+extern void *memcpy (void *, const void *, size_t); -+extern int memcmp (const void *, const void *, size_t); -+ -+/* Temporary space where the work actually gets done. */ -+static long long AL[24]; -+/* Values copied into AL before we start. */ -+static long long init_di[24] = { 0x100000002ll, 0x200000003ll, 0, 1, -+ -+ 0x100000002ll, 0x100000002ll, -+ 0x100000002ll, 0x100000002ll, -+ -+ 0, 0x1000e0de0000ll, -+ 42 , 0xc001c0de0000ll, -+ -+ -1ll, 0, 0xff00ff0000ll, -1ll, -+ -+ 0, 0x1000e0de0000ll, -+ 42 , 0xc001c0de0000ll, -+ -+ -1ll, 0, 0xff00ff0000ll, -1ll}; -+/* This is what should be in AL at the end. */ -+static long long test_di[24] = { 0x1234567890ll, 0x1234567890ll, 1, 0, -+ -+ 0x100000002ll, 0x100000002ll, -+ 0x100000002ll, 0x100000002ll, -+ -+ 1, 0xc001c0de0000ll, -+ 20, 0x1000e0de0000ll, -+ -+ 0x300000007ll , 0x500000009ll, -+ 0xf100ff0001ll, ~0xa00000007ll, -+ -+ 1, 0xc001c0de0000ll, -+ 20, 0x1000e0de0000ll, -+ -+ 0x300000007ll , 0x500000009ll, -+ 0xf100ff0001ll, ~0xa00000007ll }; -+ -+/* First check they work in terms of what they do to memory. */ -+static void -+do_noret_di (void) -+{ -+ __sync_val_compare_and_swap (AL+0, 0x100000002ll, 0x1234567890ll); -+ __sync_bool_compare_and_swap (AL+1, 0x200000003ll, 0x1234567890ll); -+ __sync_lock_test_and_set (AL+2, 1); -+ __sync_lock_release (AL+3); -+ -+ /* The following tests should not change the value since the -+ original does NOT match. */ -+ __sync_val_compare_and_swap (AL+4, 0x000000002ll, 0x1234567890ll); -+ __sync_val_compare_and_swap (AL+5, 0x100000000ll, 0x1234567890ll); -+ __sync_bool_compare_and_swap (AL+6, 0x000000002ll, 0x1234567890ll); -+ __sync_bool_compare_and_swap (AL+7, 0x100000000ll, 0x1234567890ll); -+ -+ __sync_fetch_and_add (AL+8, 1); -+ __sync_fetch_and_add (AL+9, 0xb000e0000000ll); /* + to both halves & carry. */ -+ __sync_fetch_and_sub (AL+10, 22); -+ __sync_fetch_and_sub (AL+11, 0xb000e0000000ll); -+ -+ __sync_fetch_and_and (AL+12, 0x300000007ll); -+ __sync_fetch_and_or (AL+13, 0x500000009ll); -+ __sync_fetch_and_xor (AL+14, 0xe00000001ll); -+ __sync_fetch_and_nand (AL+15, 0xa00000007ll); -+ -+ /* These should be the same as the fetch_and_* cases except for -+ return value. */ -+ __sync_add_and_fetch (AL+16, 1); -+ /* add to both halves & carry. */ -+ __sync_add_and_fetch (AL+17, 0xb000e0000000ll); -+ __sync_sub_and_fetch (AL+18, 22); -+ __sync_sub_and_fetch (AL+19, 0xb000e0000000ll); -+ -+ __sync_and_and_fetch (AL+20, 0x300000007ll); -+ __sync_or_and_fetch (AL+21, 0x500000009ll); -+ __sync_xor_and_fetch (AL+22, 0xe00000001ll); -+ __sync_nand_and_fetch (AL+23, 0xa00000007ll); -+} -+ -+/* Now check return values. */ -+static void -+do_ret_di (void) -+{ -+ if (__sync_val_compare_and_swap (AL+0, 0x100000002ll, 0x1234567890ll) != -+ 0x100000002ll) abort (); -+ if (__sync_bool_compare_and_swap (AL+1, 0x200000003ll, 0x1234567890ll) != -+ 1) abort (); -+ if (__sync_lock_test_and_set (AL+2, 1) != 0) abort (); -+ __sync_lock_release (AL+3); /* no return value, but keep to match results. */ -+ -+ /* The following tests should not change the value since the -+ original does NOT match. */ -+ if (__sync_val_compare_and_swap (AL+4, 0x000000002ll, 0x1234567890ll) != -+ 0x100000002ll) abort (); -+ if (__sync_val_compare_and_swap (AL+5, 0x100000000ll, 0x1234567890ll) != -+ 0x100000002ll) abort (); -+ if (__sync_bool_compare_and_swap (AL+6, 0x000000002ll, 0x1234567890ll) != -+ 0) abort (); -+ if (__sync_bool_compare_and_swap (AL+7, 0x100000000ll, 0x1234567890ll) != -+ 0) abort (); -+ -+ if (__sync_fetch_and_add (AL+8, 1) != 0) abort (); -+ if (__sync_fetch_and_add (AL+9, 0xb000e0000000ll) != 0x1000e0de0000ll) abort (); -+ if (__sync_fetch_and_sub (AL+10, 22) != 42) abort (); -+ if (__sync_fetch_and_sub (AL+11, 0xb000e0000000ll) != 0xc001c0de0000ll) -+ abort (); -+ -+ if (__sync_fetch_and_and (AL+12, 0x300000007ll) != -1ll) abort (); -+ if (__sync_fetch_and_or (AL+13, 0x500000009ll) != 0) abort (); -+ if (__sync_fetch_and_xor (AL+14, 0xe00000001ll) != 0xff00ff0000ll) abort (); -+ if (__sync_fetch_and_nand (AL+15, 0xa00000007ll) != -1ll) abort (); -+ -+ /* These should be the same as the fetch_and_* cases except for -+ return value. */ -+ if (__sync_add_and_fetch (AL+16, 1) != 1) abort (); -+ if (__sync_add_and_fetch (AL+17, 0xb000e0000000ll) != 0xc001c0de0000ll) -+ abort (); -+ if (__sync_sub_and_fetch (AL+18, 22) != 20) abort (); -+ if (__sync_sub_and_fetch (AL+19, 0xb000e0000000ll) != 0x1000e0de0000ll) -+ abort (); -+ -+ if (__sync_and_and_fetch (AL+20, 0x300000007ll) != 0x300000007ll) abort (); -+ if (__sync_or_and_fetch (AL+21, 0x500000009ll) != 0x500000009ll) abort (); -+ if (__sync_xor_and_fetch (AL+22, 0xe00000001ll) != 0xf100ff0001ll) abort (); -+ if (__sync_nand_and_fetch (AL+23, 0xa00000007ll) != ~0xa00000007ll) abort (); -+} -+ -+int main () -+{ -+ memcpy (AL, init_di, sizeof (init_di)); -+ -+ do_noret_di (); -+ -+ if (memcmp (AL, test_di, sizeof (test_di))) -+ abort (); -+ -+ memcpy (AL, init_di, sizeof (init_di)); -+ -+ do_ret_di (); -+ -+ if (memcmp (AL, test_di, sizeof (test_di))) -+ abort (); -+ -+ return 0; -+} ---- a/src/gcc/testsuite/gcc.dg/di-sync-multithread.c -+++ b/src/gcc/testsuite/gcc.dg/di-sync-multithread.c -@@ -0,0 +1,205 @@ -+/* { dg-do run } */ -+/* { dg-require-effective-target sync_longlong } */ -+/* { dg-require-effective-target pthread_h } */ -+/* { dg-require-effective-target pthread } */ -+/* { dg-options "-pthread -std=gnu99" } */ -+ -+/* test of long long atomic ops performed in parallel in 3 pthreads -+ david.gilbert@linaro.org */ -+ -+#include <pthread.h> -+#include <unistd.h> -+ -+/*#define DEBUGIT 1 */ -+ -+#ifdef DEBUGIT -+#include <stdio.h> -+ -+#define DOABORT(x,...) {\ -+ fprintf (stderr, x, __VA_ARGS__); fflush (stderr); abort ();\ -+ } -+ -+#else -+ -+#define DOABORT(x,...) abort (); -+ -+#endif -+ -+/* Passed to each thread to describe which bits it is going to work on. */ -+struct threadwork { -+ unsigned long long count; /* incremented each time the worker loops. */ -+ unsigned int thread; /* ID */ -+ unsigned int addlsb; /* 8 bit */ -+ unsigned int logic1lsb; /* 5 bit */ -+ unsigned int logic2lsb; /* 8 bit */ -+}; -+ -+/* The shared word where all the atomic work is done. */ -+static volatile long long workspace; -+ -+/* A shared word to tell the workers to quit when non-0. */ -+static long long doquit; -+ -+extern void abort (void); -+ -+/* Note this test doesn't test the return values much. */ -+void* -+worker (void* data) -+{ -+ struct threadwork *tw = (struct threadwork*)data; -+ long long add1bit = 1ll << tw->addlsb; -+ long long logic1bit = 1ll << tw->logic1lsb; -+ long long logic2bit = 1ll << tw->logic2lsb; -+ -+ /* Clear the bits we use. */ -+ __sync_and_and_fetch (&workspace, ~(0xffll * add1bit)); -+ __sync_fetch_and_and (&workspace, ~(0x1fll * logic1bit)); -+ __sync_fetch_and_and (&workspace, ~(0xffll * logic2bit)); -+ -+ do -+ { -+ long long tmp1, tmp2, tmp3; -+ /* OK, lets try and do some stuff to the workspace - by the end -+ of the main loop our area should be the same as it is now - i.e. 0. */ -+ -+ /* Push the arithmetic section upto 128 - one of the threads will -+ case this to carry accross the 32bit boundary. */ -+ for (tmp2 = 0; tmp2 < 64; tmp2++) -+ { -+ /* Add 2 using the two different adds. */ -+ tmp1 = __sync_add_and_fetch (&workspace, add1bit); -+ tmp3 = __sync_fetch_and_add (&workspace, add1bit); -+ -+ /* The value should be the intermediate add value in both cases. */ -+ if ((tmp1 & (add1bit * 0xff)) != (tmp3 & (add1bit * 0xff))) -+ DOABORT ("Mismatch of add intermediates on thread %d " -+ "workspace=0x%llx tmp1=0x%llx " -+ "tmp2=0x%llx tmp3=0x%llx\n", -+ tw->thread, workspace, tmp1, tmp2, tmp3); -+ } -+ -+ /* Set the logic bits. */ -+ tmp2=__sync_or_and_fetch (&workspace, -+ 0x1fll * logic1bit | 0xffll * logic2bit); -+ -+ /* Check the logic bits are set and the arithmetic value is correct. */ -+ if ((tmp2 & (0x1fll * logic1bit | 0xffll * logic2bit -+ | 0xffll * add1bit)) -+ != (0x1fll * logic1bit | 0xffll * logic2bit | 0x80ll * add1bit)) -+ DOABORT ("Midloop check failed on thread %d " -+ "workspace=0x%llx tmp2=0x%llx " -+ "masktmp2=0x%llx expected=0x%llx\n", -+ tw->thread, workspace, tmp2, -+ tmp2 & (0x1fll * logic1bit | 0xffll * logic2bit | -+ 0xffll * add1bit), -+ (0x1fll * logic1bit | 0xffll * logic2bit | 0x80ll * add1bit)); -+ -+ /* Pull the arithmetic set back down to 0 - again this should cause a -+ carry across the 32bit boundary in one thread. */ -+ -+ for (tmp2 = 0; tmp2 < 64; tmp2++) -+ { -+ /* Subtract 2 using the two different subs. */ -+ tmp1=__sync_sub_and_fetch (&workspace, add1bit); -+ tmp3=__sync_fetch_and_sub (&workspace, add1bit); -+ -+ /* The value should be the intermediate sub value in both cases. */ -+ if ((tmp1 & (add1bit * 0xff)) != (tmp3 & (add1bit * 0xff))) -+ DOABORT ("Mismatch of sub intermediates on thread %d " -+ "workspace=0x%llx tmp1=0x%llx " -+ "tmp2=0x%llx tmp3=0x%llx\n", -+ tw->thread, workspace, tmp1, tmp2, tmp3); -+ } -+ -+ -+ /* Clear the logic bits. */ -+ __sync_fetch_and_xor (&workspace, 0x1fll * logic1bit); -+ tmp3=__sync_and_and_fetch (&workspace, ~(0xffll * logic2bit)); -+ -+ /* The logic bits and the arithmetic bits should be zero again. */ -+ if (tmp3 & (0x1fll * logic1bit | 0xffll * logic2bit | 0xffll * add1bit)) -+ DOABORT ("End of worker loop; bits none 0 on thread %d " -+ "workspace=0x%llx tmp3=0x%llx " -+ "mask=0x%llx maskedtmp3=0x%llx\n", -+ tw->thread, workspace, tmp3, (0x1fll * logic1bit | -+ 0xffll * logic2bit | 0xffll * add1bit), -+ tmp3 & (0x1fll * logic1bit | 0xffll * logic2bit | 0xffll * add1bit)); -+ -+ __sync_add_and_fetch (&tw->count, 1); -+ } -+ while (!__sync_bool_compare_and_swap (&doquit, 1, 1)); -+ -+ pthread_exit (0); -+} -+ -+int -+main () -+{ -+ /* We have 3 threads doing three sets of operations, an 8 bit -+ arithmetic field, a 5 bit logic field and an 8 bit logic -+ field (just to pack them all in). -+ -+ 6 5 4 4 3 2 1 -+ 3 6 8 0 2 4 6 8 0 -+ |...,...|...,...|...,...|...,...|...,...|...,...|...,...|...,... -+ - T0 -- T1 -- T2 --T2 -- T0 -*- T2-- T1-- T1 -***- T0- -+ logic2 logic2 arith log2 arith log1 log1 arith log1 -+ -+ */ -+ unsigned int t; -+ long long tmp; -+ int err; -+ -+ struct threadwork tw[3]={ -+ { 0ll, 0, 27, 0, 56 }, -+ { 0ll, 1, 8,16, 48 }, -+ { 0ll, 2, 40,21, 35 } -+ }; -+ -+ pthread_t threads[3]; -+ -+ __sync_lock_release (&doquit); -+ -+ /* Get the work space into a known value - All 1's. */ -+ __sync_lock_release (&workspace); /* Now all 0. */ -+ tmp = __sync_val_compare_and_swap (&workspace, 0, -1ll); -+ if (tmp!=0) -+ DOABORT ("Initial __sync_val_compare_and_swap wasn't 0 workspace=0x%llx " -+ "tmp=0x%llx\n", workspace,tmp); -+ -+ for (t = 0; t < 3; t++) -+ { -+ err=pthread_create (&threads[t], NULL , worker, &tw[t]); -+ if (err) DOABORT ("pthread_create failed on thread %d with error %d\n", -+ t, err); -+ }; -+ -+ sleep (5); -+ -+ /* Stop please. */ -+ __sync_lock_test_and_set (&doquit, 1ll); -+ -+ for (t = 0; t < 3; t++) -+ { -+ err=pthread_join (threads[t], NULL); -+ if (err) -+ DOABORT ("pthread_join failed on thread %d with error %d\n", t, err); -+ }; -+ -+ __sync_synchronize (); -+ -+ /* OK, so all the workers have finished - -+ the workers should have zero'd their workspace, the unused areas -+ should still be 1. */ -+ if (!__sync_bool_compare_and_swap (&workspace, 0x040000e0ll, 0)) -+ DOABORT ("End of run workspace mismatch, got %llx\n", workspace); -+ -+ /* All the workers should have done some work. */ -+ for (t = 0; t < 3; t++) -+ { -+ if (tw[t].count == 0) DOABORT ("Worker %d gave 0 count\n", t); -+ }; -+ -+ return 0; -+} -+ ---- a/src/gcc/testsuite/gcc.dg/pr50193-1.c -+++ b/src/gcc/testsuite/gcc.dg/pr50193-1.c -@@ -0,0 +1,10 @@ -+/* PR 50193: ARM: ICE on a | (b << negative-constant) */ -+/* Ensure that the compiler doesn't ICE. */ -+ -+/* { dg-options "-O2" } */ -+ -+int -+foo(int a, int b) -+{ -+ return a | (b << -3); /* { dg-warning "left shift count is negative" } */ -+} ---- a/src/gcc/testsuite/gcc.dg/pr50717-1.c -+++ b/src/gcc/testsuite/gcc.dg/pr50717-1.c -@@ -0,0 +1,26 @@ -+/* PR tree-optimization/50717 */ -+/* Ensure that widening multiply-and-accumulate is not used where integer -+ type promotion or users' casts should prevent it. */ -+ -+/* { dg-options "-O2 -fdump-tree-widening_mul" } */ -+ -+long long -+f (unsigned int a, char b, long long c) -+{ -+ return (a * b) + c; -+} -+ -+int -+g (short a, short b, int c) -+{ -+ return (short)(a * b) + c; -+} -+ -+int -+h (char a, char b, int c) -+{ -+ return (char)(a * b) + c; -+} -+ -+/* { dg-final { scan-tree-dump-times "WIDEN_MULT_PLUS_EXPR" 0 "widening_mul" } } */ -+/* { dg-final { cleanup-tree-dump "widening_mul" } } */ ---- a/src/gcc/testsuite/gcc.dg/sms-10.c -+++ b/src/gcc/testsuite/gcc.dg/sms-10.c -@@ -0,0 +1,118 @@ -+ /* { dg-do run } */ -+ /* { dg-options "-O2 -fmodulo-sched -fmodulo-sched-allow-regmoves -fdump-rtl-sms" } */ -+ -+ -+typedef __SIZE_TYPE__ size_t; -+extern void *malloc (size_t); -+extern void free (void *); -+extern void abort (void); -+ -+struct regstat_n_sets_and_refs_t -+{ -+ int sets; -+ int refs; -+}; -+ -+struct regstat_n_sets_and_refs_t *regstat_n_sets_and_refs; -+ -+struct df_reg_info -+{ -+ unsigned int n_refs; -+}; -+ -+struct df_d -+{ -+ struct df_reg_info **def_regs; -+ struct df_reg_info **use_regs; -+}; -+struct df_d *df; -+ -+static inline int -+REG_N_SETS (int regno) -+{ -+ return regstat_n_sets_and_refs[regno].sets; -+} -+ -+__attribute__ ((noinline)) -+ int max_reg_num (void) -+{ -+ return 100; -+} -+ -+__attribute__ ((noinline)) -+ void regstat_init_n_sets_and_refs (void) -+{ -+ unsigned int i; -+ unsigned int max_regno = max_reg_num (); -+ -+ for (i = 0; i < max_regno; i++) -+ { -+ (regstat_n_sets_and_refs[i].sets = (df->def_regs[(i)]->n_refs)); -+ (regstat_n_sets_and_refs[i].refs = -+ (df->use_regs[(i)]->n_refs) + REG_N_SETS (i)); -+ } -+} -+ -+int a_sets[100] = -+ { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, -+ 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, -+ 40, 41, 42, -+ 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, -+ 62, 63, 64, -+ 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, -+ 84, 85, 86, -+ 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99 -+}; -+ -+int a_refs[100] = -+ { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, -+ 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, -+ 78, 80, 82, -+ 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, -+ 118, 120, -+ 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 142, 144, 146, 148, 150, -+ 152, 154, 156, -+ 158, 160, 162, 164, 166, 168, 170, 172, 174, 176, 178, 180, 182, 184, 186, -+ 188, 190, 192, -+ 194, 196, 198 -+}; -+ -+int -+main () -+{ -+ struct df_reg_info *b[100], *c[100]; -+ struct df_d df1; -+ size_t s = sizeof (struct df_reg_info); -+ struct regstat_n_sets_and_refs_t a[100]; -+ -+ df = &df1; -+ regstat_n_sets_and_refs = a; -+ int i; -+ -+ for (i = 0; i < 100; i++) -+ { -+ b[i] = (struct df_reg_info *) malloc (s); -+ b[i]->n_refs = i; -+ c[i] = (struct df_reg_info *) malloc (s); -+ c[i]->n_refs = i; -+ } -+ -+ df1.def_regs = b; -+ df1.use_regs = c; -+ regstat_init_n_sets_and_refs (); -+ -+ for (i = 0; i < 100; i++) -+ if ((a[i].sets != a_sets[i]) || (a[i].refs != a_refs[i])) -+ abort (); -+ -+ for (i = 0; i < 100; i++) -+ { -+ free (b[i]); -+ free (c[i]); -+ } -+ -+ return 0; -+} -+ -+/* { dg-final { scan-rtl-dump-times "SMS succeeded" 1 "sms" { target powerpc*-*-* } } } */ -+/* { dg-final { cleanup-rtl-dump "sms" } } */ ---- a/src/gcc/testsuite/gcc.dg/sms-9.c -+++ b/src/gcc/testsuite/gcc.dg/sms-9.c -@@ -0,0 +1,60 @@ -+/* { dg-do run } */ -+/* { dg-options "-O2 -fmodulo-sched -fno-auto-inc-dec -O2 -fmodulo-sched-allow-regmoves" } */ -+ -+#include <stdlib.h> -+#include <stdarg.h> -+ -+struct df_ref_info -+{ -+ unsigned int *begin; -+ unsigned int *count; -+}; -+ -+extern void *memset (void *s, int c, __SIZE_TYPE__ n); -+ -+ -+__attribute__ ((noinline)) -+ int -+ df_reorganize_refs_by_reg_by_insn (struct df_ref_info *ref_info, -+ int num, unsigned int start) -+{ -+ unsigned int m = num; -+ unsigned int offset = 77; -+ unsigned int r; -+ -+ for (r = start; r < m; r++) -+ { -+ ref_info->begin[r] = offset; -+ offset += ref_info->count[r]; -+ ref_info->count[r] = 0; -+ } -+ -+ return offset; -+} -+ -+int -+main () -+{ -+ struct df_ref_info temp; -+ int num = 100; -+ unsigned int start = 5; -+ int i, offset; -+ -+ temp.begin = malloc (100 * sizeof (unsigned int)); -+ temp.count = malloc (100 * sizeof (unsigned int)); -+ -+ memset (temp.begin, 0, sizeof (unsigned int) * num); -+ memset (temp.count, 0, sizeof (unsigned int) * num); -+ -+ for (i = 0; i < num; i++) -+ temp.count[i] = i + 1; -+ -+ offset = df_reorganize_refs_by_reg_by_insn (&temp, num, start); -+ -+ if (offset != 5112) -+ abort (); -+ -+ free (temp.begin); -+ free (temp.count); -+ return 0; -+} ---- a/src/gcc/testsuite/gcc.dg/torture/pr49030.c -+++ b/src/gcc/testsuite/gcc.dg/torture/pr49030.c -@@ -0,0 +1,19 @@ -+void -+sample_move_d32u24_sS (char *dst, float *src, unsigned long nsamples, -+ unsigned long dst_skip) -+{ -+ long long y; -+ while (nsamples--) -+ { -+ y = (long long) (*src * 8388608.0f) << 8; -+ if (y > 2147483647) { -+ *(int *) dst = 2147483647; -+ } else if (y < -2147483647 - 1) { -+ *(int *) dst = -2147483647 - 1; -+ } else { -+ *(int *) dst = (int) y; -+ } -+ dst += dst_skip; -+ src++; -+ } -+} ---- a/src/gcc/testsuite/gcc.dg/torture/pr49169.c -+++ b/src/gcc/testsuite/gcc.dg/torture/pr49169.c -@@ -0,0 +1,15 @@ -+/* { dg-do compile { target { arm*-*-* || mips*-*-* } } } */ -+ -+#include <stdlib.h> -+#include <stdint.h> -+ -+int -+main (void) -+{ -+ void *p = main; -+ if ((intptr_t) p & 1) -+ abort (); -+ return 0; -+} -+ -+/* { dg-final { scan-assembler "abort" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/O3-pr39675-2.c -+++ b/src/gcc/testsuite/gcc.dg/vect/O3-pr39675-2.c -@@ -26,7 +26,7 @@ - } - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided_wide } } } */ --/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_strided_wide } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided4 } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_strided4 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-11.c -+++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-11.c -@@ -48,7 +48,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "basic block vectorized using SLP" 0 "slp" } } */ --/* { dg-final { scan-tree-dump-times "SLP with multiple types" 1 "slp" } } */ -+/* { dg-final { scan-tree-dump-times "basic block vectorized using SLP" 1 "slp" { target vect64 } } } */ - /* { dg-final { cleanup-tree-dump "slp" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-24.c -+++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-24.c -@@ -0,0 +1,59 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define A 3 -+#define N 256 -+ -+short src[N], dst[N]; -+ -+void foo (short * __restrict__ dst, short * __restrict__ src, int h, -+ int stride, int dummy) -+{ -+ int i; -+ h /= 8; -+ for (i = 0; i < h; i++) -+ { -+ dst[0] += A*src[0]; -+ dst[1] += A*src[1]; -+ dst[2] += A*src[2]; -+ dst[3] += A*src[3]; -+ dst[4] += A*src[4]; -+ dst[5] += A*src[5]; -+ dst[6] += A*src[6]; -+ dst[7] += A*src[7]; -+ dst += stride; -+ src += stride; -+ if (dummy == 32) -+ abort (); -+ } -+} -+ -+ -+int main (void) -+{ -+ int i; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ dst[i] = 0; -+ src[i] = i; -+ } -+ -+ foo (dst, src, N, 8, 0); -+ -+ for (i = 0; i < N; i++) -+ { -+ if (dst[i] != A * i) -+ abort (); -+ } -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "basic block vectorized using SLP" 1 "slp" { target vect_element_align } } } */ -+/* { dg-final { cleanup-tree-dump "slp" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-25.c -+++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-25.c -@@ -0,0 +1,59 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define A 3 -+#define B 4 -+#define N 256 -+ -+short src[N], dst[N]; -+ -+void foo (short * __restrict__ dst, short * __restrict__ src, int h, int stride, int dummy) -+{ -+ int i; -+ h /= 16; -+ for (i = 0; i < h; i++) -+ { -+ dst[0] += A*src[0] + src[stride]; -+ dst[1] += A*src[1] + src[1+stride]; -+ dst[2] += A*src[2] + src[2+stride]; -+ dst[3] += A*src[3] + src[3+stride]; -+ dst[4] += A*src[4] + src[4+stride]; -+ dst[5] += A*src[5] + src[5+stride]; -+ dst[6] += A*src[6] + src[6+stride]; -+ dst[7] += A*src[7] + src[7+stride]; -+ dst += 8; -+ src += 8; -+ if (dummy == 32) -+ abort (); -+ } -+} -+ -+ -+int main (void) -+{ -+ int i; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ dst[i] = 0; -+ src[i] = i; -+ } -+ -+ foo (dst, src, N, 8, 0); -+ -+ for (i = 0; i < N/2; i++) -+ { -+ if (dst[i] != A * i + i + 8) -+ abort (); -+ } -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "basic block vectorized using SLP" 1 "slp" { target vect_element_align } } } */ -+/* { dg-final { cleanup-tree-dump "slp" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-26.c -+++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-26.c -@@ -0,0 +1,60 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define A 3 -+#define B 4 -+#define N 256 -+ -+char src[N], dst[N]; -+ -+void foo (char * __restrict__ dst, char * __restrict__ src, int h, -+ int stride, int dummy) -+{ -+ int i; -+ h /= 16; -+ for (i = 0; i < h; i++) -+ { -+ dst[0] += A*src[0]; -+ dst[1] += A*src[1]; -+ dst[2] += A*src[2]; -+ dst[3] += A*src[3]; -+ dst[4] += A*src[4]; -+ dst[5] += A*src[5]; -+ dst[6] += A*src[6]; -+ dst[7] += A*src[7]; -+ dst += 8; -+ src += 8; -+ if (dummy == 32) -+ abort (); -+ } -+} -+ -+ -+int main (void) -+{ -+ int i; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ dst[i] = 0; -+ src[i] = i/8; -+ } -+ -+ foo (dst, src, N, 8, 0); -+ -+ for (i = 0; i < N/2; i++) -+ { -+ if (dst[i] != A * src[i]) -+ abort (); -+ } -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "basic block vectorized using SLP" 1 "slp" { target vect64 } } } */ -+/* { dg-final { cleanup-tree-dump "slp" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-27.c -+++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-27.c -@@ -0,0 +1,49 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define A 3 -+#define N 16 -+ -+short src[N], dst[N]; -+ -+void foo (int a) -+{ -+ dst[0] += a*src[0]; -+ dst[1] += a*src[1]; -+ dst[2] += a*src[2]; -+ dst[3] += a*src[3]; -+ dst[4] += a*src[4]; -+ dst[5] += a*src[5]; -+ dst[6] += a*src[6]; -+ dst[7] += a*src[7]; -+} -+ -+ -+int main (void) -+{ -+ int i; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ dst[i] = 0; -+ src[i] = i; -+ } -+ -+ foo (A); -+ -+ for (i = 0; i < 8; i++) -+ { -+ if (dst[i] != A * i) -+ abort (); -+ } -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "basic block vectorized using SLP" 1 "slp" { target { vect_int_mult && { vect_unpack && vect_pack_trunc } } } } } */ -+/* { dg-final { cleanup-tree-dump "slp" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-28.c -+++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-28.c -@@ -0,0 +1,71 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define A 300 -+#define N 16 -+ -+char src[N]; -+short dst[N]; -+short src1[N], dst1[N]; -+ -+void foo (int a) -+{ -+ dst[0] = (short) (a * (int) src[0]); -+ dst[1] = (short) (a * (int) src[1]); -+ dst[2] = (short) (a * (int) src[2]); -+ dst[3] = (short) (a * (int) src[3]); -+ dst[4] = (short) (a * (int) src[4]); -+ dst[5] = (short) (a * (int) src[5]); -+ dst[6] = (short) (a * (int) src[6]); -+ dst[7] = (short) (a * (int) src[7]); -+ dst[8] = (short) (a * (int) src[8]); -+ dst[9] = (short) (a * (int) src[9]); -+ dst[10] = (short) (a * (int) src[10]); -+ dst[11] = (short) (a * (int) src[11]); -+ dst[12] = (short) (a * (int) src[12]); -+ dst[13] = (short) (a * (int) src[13]); -+ dst[14] = (short) (a * (int) src[14]); -+ dst[15] = (short) (a * (int) src[15]); -+ -+ dst1[0] += src1[0]; -+ dst1[1] += src1[1]; -+ dst1[2] += src1[2]; -+ dst1[3] += src1[3]; -+ dst1[4] += src1[4]; -+ dst1[5] += src1[5]; -+ dst1[6] += src1[6]; -+ dst1[7] += src1[7]; -+} -+ -+ -+int main (void) -+{ -+ int i; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ dst[i] = 2; -+ dst1[i] = 0; -+ src[i] = i; -+ src1[i] = i+2; -+ } -+ -+ foo (A); -+ -+ for (i = 0; i < N; i++) -+ { -+ if (dst[i] != A * i -+ || (i < N/2 && dst1[i] != i + 2)) -+ abort (); -+ } -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "basic block vectorized using SLP" 1 "slp" { target { vect_int_mult && { vect_pack_trunc && vect_unpack } } } } } */ -+/* { dg-final { cleanup-tree-dump "slp" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-29.c -+++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-29.c -@@ -0,0 +1,59 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define A 3 -+#define B 4 -+#define N 256 -+ -+short src[N], dst[N]; -+ -+void foo (short * __restrict__ dst, short * __restrict__ src, int h, int stride, int dummy) -+{ -+ int i; -+ h /= 16; -+ for (i = 0; i < h; i++) -+ { -+ dst[0] = A*src[0] + B*src[1]; -+ dst[1] = A*src[1] + B*src[2]; -+ dst[2] = A*src[2] + B*src[3]; -+ dst[3] = A*src[3] + B*src[4]; -+ dst[4] = A*src[4] + B*src[5]; -+ dst[5] = A*src[5] + B*src[6]; -+ dst[6] = A*src[6] + B*src[7]; -+ dst[7] = A*src[7] + B*src[8]; -+ dst += stride; -+ src += stride; -+ if (dummy == 32) -+ abort (); -+ } -+} -+ -+ -+int main (void) -+{ -+ int i; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ dst[i] = 0; -+ src[i] = i; -+ } -+ -+ foo (dst, src, N, 8, 0); -+ -+ for (i = 0; i < N/2; i++) -+ { -+ if (dst[i] != A * src[i] + B * src[i+1]) -+ abort (); -+ } -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "basic block vectorized using SLP" 1 "slp" { target { vect_int_mult && vect_element_align } } } } */ -+/* { dg-final { cleanup-tree-dump "slp" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-cond-1.c -+++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-cond-1.c -@@ -0,0 +1,46 @@ -+/* { dg-require-effective-target vect_condition } */ -+ -+#include "tree-vect.h" -+ -+#define N 128 -+ -+__attribute__((noinline, noclone)) void -+foo (int *a, int stride) -+{ -+ int i; -+ -+ for (i = 0; i < N/stride; i++, a += stride) -+ { -+ a[0] = a[0] ? 1 : 5; -+ a[1] = a[1] ? 2 : 6; -+ a[2] = a[2] ? 3 : 7; -+ a[3] = a[3] ? 4 : 8; -+ } -+} -+ -+ -+int a[N]; -+int main () -+{ -+ int i; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ a[i] = i; -+ -+ foo (a, 4); -+ -+ for (i = 1; i < N; i++) -+ if (a[i] != i%4 + 1) -+ abort (); -+ -+ if (a[0] != 5) -+ abort (); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "basic block vectorized using SLP" 1 "slp" { target vect_element_align } } } */ -+/* { dg-final { cleanup-tree-dump "slp" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-cond-3.c -+++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-cond-3.c -@@ -0,0 +1,85 @@ -+/* { dg-require-effective-target vect_condition } */ -+ -+#include "tree-vect.h" -+ -+#define N 64 -+ -+/* Comparison in int, then/else and result in unsigned char. */ -+ -+static inline unsigned char -+foo (int x, int y, int a, int b) -+{ -+ if (x >= y) -+ return a; -+ else -+ return b; -+} -+ -+__attribute__((noinline, noclone)) void -+bar (unsigned char * __restrict__ a, unsigned char * __restrict__ b, -+ unsigned char * __restrict__ c, unsigned char * __restrict__ d, -+ unsigned char * __restrict__ e, int stride, int w) -+{ -+ int i; -+ for (i = 0; i < N/stride; i++, a += stride, b += stride, c += stride, -+ d += stride, e += stride) -+ { -+ e[0] = foo (c[0], d[0], a[0] * w, b[0] * w); -+ e[1] = foo (c[1], d[1], a[1] * w, b[1] * w); -+ e[2] = foo (c[2], d[2], a[2] * w, b[2] * w); -+ e[3] = foo (c[3], d[3], a[3] * w, b[3] * w); -+ e[4] = foo (c[4], d[4], a[4] * w, b[4] * w); -+ e[5] = foo (c[5], d[5], a[5] * w, b[5] * w); -+ e[6] = foo (c[6], d[6], a[6] * w, b[6] * w); -+ e[7] = foo (c[7], d[7], a[7] * w, b[7] * w); -+ e[8] = foo (c[8], d[8], a[8] * w, b[8] * w); -+ e[9] = foo (c[9], d[9], a[9] * w, b[9] * w); -+ e[10] = foo (c[10], d[10], a[10] * w, b[10] * w); -+ e[11] = foo (c[11], d[11], a[11] * w, b[11] * w); -+ e[12] = foo (c[12], d[12], a[12] * w, b[12] * w); -+ e[13] = foo (c[13], d[13], a[13] * w, b[13] * w); -+ e[14] = foo (c[14], d[14], a[14] * w, b[14] * w); -+ e[15] = foo (c[15], d[15], a[15] * w, b[15] * w); -+ } -+} -+ -+ -+unsigned char a[N], b[N], c[N], d[N], e[N]; -+ -+int main () -+{ -+ int i; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ a[i] = i; -+ b[i] = 5; -+ e[i] = 0; -+ -+ switch (i % 9) -+ { -+ case 0: asm (""); c[i] = i; d[i] = i + 1; break; -+ case 1: c[i] = 0; d[i] = 0; break; -+ case 2: c[i] = i + 1; d[i] = i - 1; break; -+ case 3: c[i] = i; d[i] = i + 7; break; -+ case 4: c[i] = i; d[i] = i; break; -+ case 5: c[i] = i + 16; d[i] = i + 3; break; -+ case 6: c[i] = i - 5; d[i] = i; break; -+ case 7: c[i] = i; d[i] = i; break; -+ case 8: c[i] = i; d[i] = i - 7; break; -+ } -+ } -+ -+ bar (a, b, c, d, e, 16, 2); -+ for (i = 0; i < N; i++) -+ if (e[i] != ((i % 3) == 0 ? 10 : 2 * i)) -+ abort (); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "basic block vectorized using SLP" 1 "slp" { target { vect_element_align && vect_int_mult } } } } */ -+/* { dg-final { cleanup-tree-dump "slp" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-cond-4.c -+++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-cond-4.c -@@ -0,0 +1,85 @@ -+/* { dg-require-effective-target vect_condition } */ -+ -+#include "tree-vect.h" -+ -+#define N 64 -+ -+/* Comparison in short, then/else and result in int. */ -+static inline int -+foo (short x, short y, int a, int b) -+{ -+ if (x >= y) -+ return a; -+ else -+ return b; -+} -+ -+__attribute__((noinline, noclone)) void -+bar (short * __restrict__ a, short * __restrict__ b, -+ short * __restrict__ c, short * __restrict__ d, -+ int * __restrict__ e, int stride, int w) -+{ -+ int i; -+ for (i = 0; i < N/stride; i++, a += stride, b += stride, c += stride, -+ d += stride, e += stride) -+ { -+ e[0] = foo (c[0], d[0], a[0], b[0]); -+ e[1] = foo (c[1], d[1], a[1], b[1]); -+ e[2] = foo (c[2], d[2], a[2], b[2]); -+ e[3] = foo (c[3], d[3], a[3], b[3]); -+ e[4] = foo (c[4], d[4], a[4], b[4]); -+ e[5] = foo (c[5], d[5], a[5], b[5]); -+ e[6] = foo (c[6], d[6], a[6], b[6]); -+ e[7] = foo (c[7], d[7], a[7], b[7]); -+ e[8] = foo (c[8], d[8], a[8], b[8]); -+ e[9] = foo (c[9], d[9], a[9], b[9]); -+ e[10] = foo (c[10], d[10], a[10], b[10]); -+ e[11] = foo (c[11], d[11], a[11], b[11]); -+ e[12] = foo (c[12], d[12], a[12], b[12]); -+ e[13] = foo (c[13], d[13], a[13], b[13]); -+ e[14] = foo (c[14], d[14], a[14], b[14]); -+ e[15] = foo (c[15], d[15], a[15], b[15]); -+ } -+} -+ -+ -+short a[N], b[N], c[N], d[N]; -+int e[N]; -+ -+int main () -+{ -+ int i; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ a[i] = i; -+ b[i] = 5; -+ e[i] = 0; -+ -+ switch (i % 9) -+ { -+ case 0: asm (""); c[i] = - i - 1; d[i] = i + 1; break; -+ case 1: c[i] = 0; d[i] = 0; break; -+ case 2: c[i] = i + 1; d[i] = - i - 1; break; -+ case 3: c[i] = i; d[i] = i + 7; break; -+ case 4: c[i] = i; d[i] = i; break; -+ case 5: c[i] = i + 16; d[i] = i + 3; break; -+ case 6: c[i] = - i - 5; d[i] = - i; break; -+ case 7: c[i] = - i; d[i] = - i; break; -+ case 8: c[i] = - i; d[i] = - i - 7; break; -+ } -+ } -+ -+ bar (a, b, c, d, e, 16, 2); -+ for (i = 0; i < N; i++) -+ if (e[i] != ((i % 3) == 0 ? 5 : i)) -+ abort (); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "basic block vectorized using SLP" 1 "slp" { target vect_element_align } } } */ -+/* { dg-final { cleanup-tree-dump "slp" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-pattern-1.c -+++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-pattern-1.c -@@ -0,0 +1,55 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define N 8 -+ -+unsigned short X[N]; -+unsigned short Y[N]; -+unsigned int result[N]; -+ -+/* unsigned short->unsigned int widening-mult. */ -+__attribute__ ((noinline, noclone)) void -+foo (void) -+{ -+ result[0] = (unsigned int)(X[0] * Y[0]); -+ result[1] = (unsigned int)(X[1] * Y[1]); -+ result[2] = (unsigned int)(X[2] * Y[2]); -+ result[3] = (unsigned int)(X[3] * Y[3]); -+ result[4] = (unsigned int)(X[4] * Y[4]); -+ result[5] = (unsigned int)(X[5] * Y[5]); -+ result[6] = (unsigned int)(X[6] * Y[6]); -+ result[7] = (unsigned int)(X[7] * Y[7]); -+} -+ -+int main (void) -+{ -+ int i, tmp; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ X[i] = i; -+ Y[i] = 64-i; -+ } -+ -+ foo (); -+ -+ for (i = 0; i < N; i++) -+ { -+ __asm__ volatile (""); -+ tmp = X[i] * Y[i]; -+ if (result[i] != tmp) -+ abort (); -+ } -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "slp" { target { vect_widen_mult_hi_to_si || vect_unpack } } } } */ -+/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 8 "slp" { target vect_widen_mult_hi_to_si_pattern } } } */ -+/* { dg-final { scan-tree-dump-times "pattern recognized" 8 "slp" { target vect_widen_mult_hi_to_si_pattern } } } */ -+/* { dg-final { cleanup-tree-dump "slp" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-pattern-2.c -+++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-pattern-2.c -@@ -0,0 +1,53 @@ -+/* { dg-require-effective-target vect_condition } */ -+ -+#include "tree-vect.h" -+ -+#define N 128 -+ -+__attribute__((noinline, noclone)) void -+foo (short * __restrict__ a, int * __restrict__ b, int stride) -+{ -+ int i; -+ -+ for (i = 0; i < N/stride; i++, a += stride, b += stride) -+ { -+ a[0] = b[0] ? 1 : 7; -+ a[1] = b[1] ? 2 : 0; -+ a[2] = b[2] ? 3 : 0; -+ a[3] = b[3] ? 4 : 0; -+ a[4] = b[4] ? 5 : 0; -+ a[5] = b[5] ? 6 : 0; -+ a[6] = b[6] ? 7 : 0; -+ a[7] = b[7] ? 8 : 0; -+ } -+} -+ -+short a[N]; -+int b[N]; -+int main () -+{ -+ int i; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ a[i] = i; -+ b[i] = -i; -+ } -+ -+ foo (a, b, 8); -+ -+ for (i = 1; i < N; i++) -+ if (a[i] != i%8 + 1) -+ abort (); -+ -+ if (a[0] != 7) -+ abort (); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "basic block vectorized using SLP" 1 "slp" { target { vect_element_align && vect_pack_trunc } } } } */ -+/* { dg-final { cleanup-tree-dump "slp" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-12.c -+++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-12.c -@@ -113,7 +113,7 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" {target { vect_strided && vect_int_mult } } } } */ --/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" {target { vect_strided && vect_int_mult } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" {target { vect_strided8 && vect_int_mult } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" {target { vect_strided8 && vect_int_mult } } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/fast-math-pr35982.c -+++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-pr35982.c -@@ -20,7 +20,7 @@ - return avg; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_extract_even_odd_wide } } } */ --/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { xfail vect_extract_even_odd_wide } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_extract_even_odd } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { xfail vect_extract_even_odd } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/fast-math-slp-27.c -+++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-slp-27.c -@@ -13,5 +13,5 @@ - } - } - --/* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { target vect_strided } } } */ -+/* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { target vect_strided2 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-complex-3.c -+++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-complex-3.c -@@ -56,5 +56,5 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd_wide } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/if-cvt-stores-vect-ifcvt-18.c -+++ b/src/gcc/testsuite/gcc.dg/vect/if-cvt-stores-vect-ifcvt-18.c -@@ -0,0 +1,69 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define N 50 -+ -+typedef struct { -+ short a; -+ short b; -+} data; -+ -+data in1[N], in2[N], out[N]; -+short result[N*2] = {10,-7,11,-6,12,-5,13,-4,14,-3,15,-2,16,-1,17,0,18,1,19,2,20,3,21,4,22,5,23,6,24,7,25,8,26,9,27,10,28,11,29,12,30,13,31,14,32,15,33,16,34,17,35,18,36,19,37,20,38,21,39,22,40,23,41,24,42,25,43,26,44,27,45,28,46,29,47,30,48,31,49,32,50,33,51,34,52,35,53,36,54,37,55,38,56,39,57,40,58,41,59,42}; -+short out1[N], out2[N]; -+ -+__attribute__ ((noinline)) void -+foo () -+{ -+ int i; -+ short c, d; -+ -+ for (i = 0; i < N; i++) -+ { -+ c = in1[i].b; -+ d = in2[i].b; -+ -+ if (c >= d) -+ { -+ out[i].b = in1[i].a; -+ out[i].a = d + 5; -+ } -+ else -+ { -+ out[i].b = d - 12; -+ out[i].a = in2[i].a + d; -+ } -+ } -+} -+ -+int -+main (void) -+{ -+ int i; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ in1[i].a = i; -+ in1[i].b = i + 2; -+ in2[i].a = 5; -+ in2[i].b = i + 5; -+ __asm__ volatile (""); -+ } -+ -+ foo (); -+ -+ for (i = 0; i < N; i++) -+ { -+ if (out[i].a != result[2*i] || out[i].b != result[2*i+1]) -+ abort (); -+ } -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align || { ! vect_strided2 } } } } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/no-fre-pre-pr50208.c -+++ b/src/gcc/testsuite/gcc.dg/vect/no-fre-pre-pr50208.c -@@ -0,0 +1,17 @@ -+/* { dg-do compile } */ -+ -+char c; -+int a, b; -+ -+void foo (int j) -+{ -+ int i; -+ while (--j) -+ { -+ b = 3; -+ for (i = 0; i < 2; ++i) -+ a = b ^ c; -+ } -+} -+ -+/* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-10a.c -+++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-10a.c -@@ -54,5 +54,5 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { target vect_strided2 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-10b.c -+++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-10b.c -@@ -53,5 +53,5 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { target vect_strided2 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-18.c -+++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-18.c -@@ -47,5 +47,5 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { target vect_interleave } } } */ -+/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { target { vect_interleave || vect_strided2 } } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-20.c -+++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-20.c -@@ -50,5 +50,5 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { target vect_strided2 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/no-tree-fre-pr50039.c -+++ b/src/gcc/testsuite/gcc.dg/vect/no-tree-fre-pr50039.c -@@ -0,0 +1,15 @@ -+/* { dg-do compile } */ -+ -+extern unsigned char g_5; -+extern int g_31, g_76; -+int main(void) { -+ int i, j; -+ for (j=0; j < 2; ++j) { -+ g_31 = -3; -+ for (i=0; i < 2; ++i) -+ g_76 = (g_31 ? g_31+1 : 0) ^ g_5; -+ } -+} -+ -+/* { dg-final { cleanup-tree-dump "vect" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-pr29145.c -+++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-pr29145.c -@@ -1,5 +1,4 @@ - /* { dg-require-effective-target vect_int } */ --/* { dg-add-options quad_vectors } */ - - #include <stdarg.h> - #include "tree-vect.h" -@@ -8,7 +7,7 @@ - void with_restrict(int * __restrict p) - { - int i; -- int *q = p - 2; -+ int *q = p - 1; - - for (i = 0; i < 1000; ++i) { - p[i] = q[i]; -@@ -19,7 +18,7 @@ - void without_restrict(int * p) - { - int i; -- int *q = p - 2; -+ int *q = p - 1; - - for (i = 0; i < 1000; ++i) { - p[i] = q[i]; -@@ -38,8 +37,8 @@ - a[i] = b[i] = i; - } - -- with_restrict(a + 2); -- without_restrict(b + 2); -+ with_restrict(a + 1); -+ without_restrict(b + 1); - - for (i = 0; i < 1002; ++i) { - if (a[i] != b[i]) ---- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-101.c -+++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-101.c -@@ -45,6 +45,7 @@ - } - - /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" } } */ --/* { dg-final { scan-tree-dump-times "can't determine dependence" 1 "vect" } } */ -+/* { dg-final { scan-tree-dump-times "can't determine dependence" 1 "vect" { xfail vect_multiple_sizes } } } */ -+/* { dg-final { scan-tree-dump-times "can't determine dependence" 2 "vect" { target vect_multiple_sizes } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-102.c -+++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-102.c -@@ -53,6 +53,7 @@ - } - - /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" } } */ --/* { dg-final { scan-tree-dump-times "possible dependence between data-refs" 1 "vect" } } */ -+/* { dg-final { scan-tree-dump-times "possible dependence between data-refs" 1 "vect" { xfail vect_multiple_sizes } } } */ -+/* { dg-final { scan-tree-dump-times "possible dependence between data-refs" 2 "vect" { target vect_multiple_sizes } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-102a.c -+++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-102a.c -@@ -53,6 +53,7 @@ - } - - /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" } } */ --/* { dg-final { scan-tree-dump-times "possible dependence between data-refs" 1 "vect" } } */ -+/* { dg-final { scan-tree-dump-times "possible dependence between data-refs" 1 "vect" { xfail vect_multiple_sizes } } } */ -+/* { dg-final { scan-tree-dump-times "possible dependence between data-refs" 2 "vect" { target vect_multiple_sizes } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-37.c -+++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-37.c -@@ -58,5 +58,6 @@ - If/when the aliasing problems are resolved, unalignment may - prevent vectorization on some targets. */ - /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { xfail *-*-* } } } */ --/* { dg-final { scan-tree-dump-times "can't determine dependence between" 2 "vect" } } */ -+/* { dg-final { scan-tree-dump-times "can't determine dependence" 2 "vect" { xfail vect_multiple_sizes } } } */ -+/* { dg-final { scan-tree-dump-times "can't determine dependence" 4 "vect" { target vect_multiple_sizes } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-79.c -+++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-79.c -@@ -46,5 +46,6 @@ - If/when the aliasing problems are resolved, unalignment may - prevent vectorization on some targets. */ - /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail *-*-* } } } */ --/* { dg-final { scan-tree-dump-times "can't determine dependence between" 1 "vect" } } */ -+/* { dg-final { scan-tree-dump-times "can't determine dependence" 1 "vect" { xfail vect_multiple_sizes } } } */ -+/* { dg-final { scan-tree-dump-times "can't determine dependence" 2 "vect" { target vect_multiple_sizes } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/pr30843.c -+++ b/src/gcc/testsuite/gcc.dg/vect/pr30843.c -@@ -20,6 +20,6 @@ - } - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave || vect_strided4 } } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/pr30858.c -+++ b/src/gcc/testsuite/gcc.dg/vect/pr30858.c -@@ -11,5 +11,6 @@ - } - - /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" } } */ --/* { dg-final { scan-tree-dump-times "Unknown def-use cycle pattern." 1 "vect" } } */ -+/* { dg-final { scan-tree-dump-times "Unknown def-use cycle pattern." 1 "vect" { xfail vect_multiple_sizes } } } */ -+/* { dg-final { scan-tree-dump-times "Unknown def-use cycle pattern." 2 "vect" { target vect_multiple_sizes } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/pr33866.c -+++ b/src/gcc/testsuite/gcc.dg/vect/pr33866.c -@@ -27,6 +27,6 @@ - } - - /* Needs interleaving support. */ --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave || vect_strided2 } } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/pr37539.c -+++ b/src/gcc/testsuite/gcc.dg/vect/pr37539.c -@@ -40,7 +40,7 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_strided_wide } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target { vect_strided4 && vect_strided2 } } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - - ---- a/src/gcc/testsuite/gcc.dg/vect/pr50014.c -+++ b/src/gcc/testsuite/gcc.dg/vect/pr50014.c -@@ -0,0 +1,16 @@ -+/* { dg-do compile } */ -+/* { dg-require-effective-target vect_int } */ -+ -+int f(unsigned char *s, int n) -+{ -+ int sum = 0; -+ int i; -+ -+ for (i = 0; i < n; i++) -+ sum += 256 * s[i]; -+ -+ return sum; -+} -+ -+/* { dg-final { cleanup-tree-dump "vect" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/slp-11.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-11.c -@@ -1,113 +0,0 @@ --/* { dg-require-effective-target vect_int } */ -- --#include <stdarg.h> --#include "tree-vect.h" -- --#define N 8 -- --int --main1 () --{ -- int i; -- unsigned int out[N*8], a0, a1, a2, a3, a4, a5, a6, a7, b1, b0, b2, b3, b4, b5, b6, b7; -- unsigned int in[N*8] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63}; -- float out2[N*8]; -- -- /* Different operations - not SLPable. */ -- for (i = 0; i < N; i++) -- { -- a0 = in[i*8] + 5; -- a1 = in[i*8 + 1] * 6; -- a2 = in[i*8 + 2] + 7; -- a3 = in[i*8 + 3] + 8; -- a4 = in[i*8 + 4] + 9; -- a5 = in[i*8 + 5] + 10; -- a6 = in[i*8 + 6] + 11; -- a7 = in[i*8 + 7] + 12; -- -- b0 = a0 * 3; -- b1 = a1 * 2; -- b2 = a2 * 12; -- b3 = a3 * 5; -- b4 = a4 * 8; -- b5 = a5 * 4; -- b6 = a6 * 3; -- b7 = a7 * 2; -- -- out[i*8] = b0 - 2; -- out[i*8 + 1] = b1 - 3; -- out[i*8 + 2] = b2 - 2; -- out[i*8 + 3] = b3 - 1; -- out[i*8 + 4] = b4 - 8; -- out[i*8 + 5] = b5 - 7; -- out[i*8 + 6] = b6 - 3; -- out[i*8 + 7] = b7 - 7; -- } -- -- /* check results: */ -- for (i = 0; i < N; i++) -- { -- if (out[i*8] != (in[i*8] + 5) * 3 - 2 -- || out[i*8 + 1] != (in[i*8 + 1] * 6) * 2 - 3 -- || out[i*8 + 2] != (in[i*8 + 2] + 7) * 12 - 2 -- || out[i*8 + 3] != (in[i*8 + 3] + 8) * 5 - 1 -- || out[i*8 + 4] != (in[i*8 + 4] + 9) * 8 - 8 -- || out[i*8 + 5] != (in[i*8 + 5] + 10) * 4 - 7 -- || out[i*8 + 6] != (in[i*8 + 6] + 11) * 3 - 3 -- || out[i*8 + 7] != (in[i*8 + 7] + 12) * 2 - 7) -- abort (); -- } -- -- /* Requires permutation - not SLPable. */ -- for (i = 0; i < N*2; i++) -- { -- out[i*4] = (in[i*4] + 2) * 3; -- out[i*4 + 1] = (in[i*4 + 2] + 2) * 7; -- out[i*4 + 2] = (in[i*4 + 1] + 7) * 3; -- out[i*4 + 3] = (in[i*4 + 3] + 3) * 4; -- } -- -- /* check results: */ -- for (i = 0; i < N*2; i++) -- { -- if (out[i*4] != (in[i*4] + 2) * 3 -- || out[i*4 + 1] != (in[i*4 + 2] + 2) * 7 -- || out[i*4 + 2] != (in[i*4 + 1] + 7) * 3 -- || out[i*4 + 3] != (in[i*4 + 3] + 3) * 4) -- abort (); -- } -- -- /* Different operations - not SLPable. */ -- for (i = 0; i < N*4; i++) -- { -- out2[i*2] = ((float) in[i*2] * 2 + 6) ; -- out2[i*2 + 1] = (float) (in[i*2 + 1] * 3 + 7); -- } -- -- /* check results: */ -- for (i = 0; i < N*4; i++) -- { -- if (out2[i*2] != ((float) in[i*2] * 2 + 6) -- || out2[i*2 + 1] != (float) (in[i*2 + 1] * 3 + 7)) -- abort (); -- } -- -- -- return 0; --} -- --int main (void) --{ -- check_vect (); -- -- main1 (); -- -- return 0; --} -- --/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { target { { vect_uintfloat_cvt && vect_strided_wide } && vect_int_mult } } } } */ --/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { target { { { ! vect_uintfloat_cvt } && vect_strided_wide } && vect_int_mult } } } } */ --/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" {target { ! { vect_int_mult && vect_strided_wide } } } } } */ --/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" } } */ --/* { dg-final { cleanup-tree-dump "vect" } } */ -- ---- a/src/gcc/testsuite/gcc.dg/vect/slp-11a.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-11a.c -@@ -0,0 +1,75 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define N 8 -+ -+int -+main1 () -+{ -+ int i; -+ unsigned int out[N*8], a0, a1, a2, a3, a4, a5, a6, a7, b1, b0, b2, b3, b4, b5, b6, b7; -+ unsigned int in[N*8] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63}; -+ -+ /* Different operations - not SLPable. */ -+ for (i = 0; i < N; i++) -+ { -+ a0 = in[i*8] + 5; -+ a1 = in[i*8 + 1] * 6; -+ a2 = in[i*8 + 2] + 7; -+ a3 = in[i*8 + 3] + 8; -+ a4 = in[i*8 + 4] + 9; -+ a5 = in[i*8 + 5] + 10; -+ a6 = in[i*8 + 6] + 11; -+ a7 = in[i*8 + 7] + 12; -+ -+ b0 = a0 * 3; -+ b1 = a1 * 2; -+ b2 = a2 * 12; -+ b3 = a3 * 5; -+ b4 = a4 * 8; -+ b5 = a5 * 4; -+ b6 = a6 * 3; -+ b7 = a7 * 2; -+ -+ out[i*8] = b0 - 2; -+ out[i*8 + 1] = b1 - 3; -+ out[i*8 + 2] = b2 - 2; -+ out[i*8 + 3] = b3 - 1; -+ out[i*8 + 4] = b4 - 8; -+ out[i*8 + 5] = b5 - 7; -+ out[i*8 + 6] = b6 - 3; -+ out[i*8 + 7] = b7 - 7; -+ } -+ -+ /* check results: */ -+ for (i = 0; i < N; i++) -+ { -+ if (out[i*8] != (in[i*8] + 5) * 3 - 2 -+ || out[i*8 + 1] != (in[i*8 + 1] * 6) * 2 - 3 -+ || out[i*8 + 2] != (in[i*8 + 2] + 7) * 12 - 2 -+ || out[i*8 + 3] != (in[i*8 + 3] + 8) * 5 - 1 -+ || out[i*8 + 4] != (in[i*8 + 4] + 9) * 8 - 8 -+ || out[i*8 + 5] != (in[i*8 + 5] + 10) * 4 - 7 -+ || out[i*8 + 6] != (in[i*8 + 6] + 11) * 3 - 3 -+ || out[i*8 + 7] != (in[i*8 + 7] + 12) * 2 - 7) -+ abort (); -+ } -+ -+ return 0; -+} -+ -+int main (void) -+{ -+ check_vect (); -+ -+ main1 (); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_strided8 && vect_int_mult } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! { vect_strided8 && vect_int_mult } } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/slp-11b.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-11b.c -@@ -0,0 +1,49 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define N 8 -+ -+int -+main1 () -+{ -+ int i; -+ unsigned int out[N*8], a0, a1, a2, a3, a4, a5, a6, a7, b1, b0, b2, b3, b4, b5, b6, b7; -+ unsigned int in[N*8] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63}; -+ -+ /* Requires permutation - not SLPable. */ -+ for (i = 0; i < N*2; i++) -+ { -+ out[i*4] = (in[i*4] + 2) * 3; -+ out[i*4 + 1] = (in[i*4 + 2] + 2) * 7; -+ out[i*4 + 2] = (in[i*4 + 1] + 7) * 3; -+ out[i*4 + 3] = (in[i*4 + 3] + 3) * 4; -+ } -+ -+ /* check results: */ -+ for (i = 0; i < N*2; i++) -+ { -+ if (out[i*4] != (in[i*4] + 2) * 3 -+ || out[i*4 + 1] != (in[i*4 + 2] + 2) * 7 -+ || out[i*4 + 2] != (in[i*4 + 1] + 7) * 3 -+ || out[i*4 + 3] != (in[i*4 + 3] + 3) * 4) -+ abort (); -+ } -+ -+ return 0; -+} -+ -+int main (void) -+{ -+ check_vect (); -+ -+ main1 (); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_strided4 && vect_int_mult } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! { vect_strided4 && vect_int_mult } } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/slp-11c.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-11c.c -@@ -0,0 +1,46 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define N 8 -+ -+int -+main1 () -+{ -+ int i; -+ unsigned int in[N*8] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63}; -+ float out[N*8]; -+ -+ /* Different operations - not SLPable. */ -+ for (i = 0; i < N*4; i++) -+ { -+ out[i*2] = ((float) in[i*2] * 2 + 6) ; -+ out[i*2 + 1] = (float) (in[i*2 + 1] * 3 + 7); -+ } -+ -+ /* check results: */ -+ for (i = 0; i < N*4; i++) -+ { -+ if (out[i*2] != ((float) in[i*2] * 2 + 6) -+ || out[i*2 + 1] != (float) (in[i*2 + 1] * 3 + 7)) -+ abort (); -+ } -+ -+ -+ return 0; -+} -+ -+int main (void) -+{ -+ check_vect (); -+ -+ main1 (); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { { vect_uintfloat_cvt && vect_strided2 } && vect_int_mult } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! { { vect_uintfloat_cvt && vect_strided2 } && vect_int_mult } } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/slp-12a.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-12a.c -@@ -11,7 +11,7 @@ - int i; - unsigned int out[N*8], a0, a1, a2, a3, a4, a5, a6, a7, b1, b0, b2, b3, b4, b5, b6, b7; - unsigned int in[N*8] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63}; -- unsigned int ia[N], ib[N*2]; -+ unsigned int ia[N]; - - for (i = 0; i < N; i++) - { -@@ -61,27 +61,6 @@ - abort (); - } - -- for (i = 0; i < N*2; i++) -- { -- out[i*4] = (in[i*4] + 2) * 3; -- out[i*4 + 1] = (in[i*4 + 1] + 2) * 7; -- out[i*4 + 2] = (in[i*4 + 2] + 7) * 3; -- out[i*4 + 3] = (in[i*4 + 3] + 7) * 7; -- -- ib[i] = 7; -- } -- -- /* check results: */ -- for (i = 0; i < N*2; i++) -- { -- if (out[i*4] != (in[i*4] + 2) * 3 -- || out[i*4 + 1] != (in[i*4 + 1] + 2) * 7 -- || out[i*4 + 2] != (in[i*4 + 2] + 7) * 3 -- || out[i*4 + 3] != (in[i*4 + 3] + 7) * 7 -- || ib[i] != 7) -- abort (); -- } -- - return 0; - } - -@@ -94,11 +73,8 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" {target { vect_strided_wide && vect_int_mult} } } } */ --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" {target { {! {vect_strided_wide}} && vect_int_mult } } } } */ --/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" {target { ! vect_int_mult } } } } */ --/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" {target { vect_strided_wide && vect_int_mult } } } } */ --/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" {target { {! {vect_strided_wide}} && vect_int_mult } } } } */ --/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" {target { ! vect_int_mult } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_strided8 && vect_int_mult } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! { vect_strided8 && vect_int_mult } } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target { vect_strided8 && vect_int_mult } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" { target { ! { vect_strided8 && vect_int_mult } } } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ -- ---- a/src/gcc/testsuite/gcc.dg/vect/slp-12b.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-12b.c -@@ -43,9 +43,9 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" {target { vect_strided_wide && vect_int_mult } } } } */ --/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" {target { { ! { vect_int_mult }} || { ! {vect_strided_wide}}} } } } */ --/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" {target { vect_strided_wide && vect_int_mult } } } } */ --/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" {target { { ! { vect_int_mult }} || { ! {vect_strided_wide}}} } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_strided2 && vect_int_mult } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! { vect_strided2 && vect_int_mult } } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target { vect_strided2 && vect_int_mult } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" { target { ! { vect_strided2 && vect_int_mult } } } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/slp-12c.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-12c.c -@@ -0,0 +1,53 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define N 8 -+ -+int -+main1 () -+{ -+ int i; -+ unsigned int out[N*8], a0, a1, a2, a3, a4, a5, a6, a7, b1, b0, b2, b3, b4, b5, b6, b7; -+ unsigned int in[N*8] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63}; -+ unsigned int ia[N*2]; -+ -+ for (i = 0; i < N*2; i++) -+ { -+ out[i*4] = (in[i*4] + 2) * 3; -+ out[i*4 + 1] = (in[i*4 + 1] + 2) * 7; -+ out[i*4 + 2] = (in[i*4 + 2] + 7) * 3; -+ out[i*4 + 3] = (in[i*4 + 3] + 7) * 7; -+ -+ ia[i] = 7; -+ } -+ -+ /* check results: */ -+ for (i = 0; i < N*2; i++) -+ { -+ if (out[i*4] != (in[i*4] + 2) * 3 -+ || out[i*4 + 1] != (in[i*4 + 1] + 2) * 7 -+ || out[i*4 + 2] != (in[i*4 + 2] + 7) * 3 -+ || out[i*4 + 3] != (in[i*4 + 3] + 7) * 7 -+ || ia[i] != 7) -+ abort (); -+ } -+ -+ return 0; -+} -+ -+int main (void) -+{ -+ check_vect (); -+ -+ main1 (); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_int_mult } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! vect_int_mult } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_int_mult } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" { target { ! vect_int_mult } } } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/slp-18.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-18.c -@@ -91,7 +91,7 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_strided } } } } */ --/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target { vect_strided } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target vect_strided8 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/slp-19.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-19.c -@@ -1,154 +0,0 @@ --/* { dg-require-effective-target vect_int } */ -- --#include <stdarg.h> --#include "tree-vect.h" -- --#define N 16 -- --int --main1 () --{ -- unsigned int i; -- unsigned int out[N*8]; -- unsigned int in[N*8] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63}; -- unsigned int ia[N*2], a0, a1, a2, a3; -- -- for (i = 0; i < N; i++) -- { -- out[i*8] = in[i*8]; -- out[i*8 + 1] = in[i*8 + 1]; -- out[i*8 + 2] = in[i*8 + 2]; -- out[i*8 + 3] = in[i*8 + 3]; -- out[i*8 + 4] = in[i*8 + 4]; -- out[i*8 + 5] = in[i*8 + 5]; -- out[i*8 + 6] = in[i*8 + 6]; -- out[i*8 + 7] = in[i*8 + 7]; -- -- ia[i] = in[i*8 + 2]; -- } -- -- /* check results: */ -- for (i = 0; i < N; i++) -- { -- if (out[i*8] != in[i*8] -- || out[i*8 + 1] != in[i*8 + 1] -- || out[i*8 + 2] != in[i*8 + 2] -- || out[i*8 + 3] != in[i*8 + 3] -- || out[i*8 + 4] != in[i*8 + 4] -- || out[i*8 + 5] != in[i*8 + 5] -- || out[i*8 + 6] != in[i*8 + 6] -- || out[i*8 + 7] != in[i*8 + 7] -- || ia[i] != in[i*8 + 2]) -- abort (); -- } -- -- for (i = 0; i < N*2; i++) -- { -- a0 = in[i*4] + 1; -- a1 = in[i*4 + 1] + 2; -- a2 = in[i*4 + 2] + 3; -- a3 = in[i*4 + 3] + 4; -- -- out[i*4] = a0; -- out[i*4 + 1] = a1; -- out[i*4 + 2] = a2; -- out[i*4 + 3] = a3; -- -- ia[i] = a2; -- } -- -- /* check results: */ -- for (i = 0; i < N*2; i++) -- { -- if (out[i*4] != in[i*4] + 1 -- || out[i*4 + 1] != in[i*4 + 1] + 2 -- || out[i*4 + 2] != in[i*4 + 2] + 3 -- || out[i*4 + 3] != in[i*4 + 3] + 4 -- || ia[i] != in[i*4 + 2] + 3) -- abort (); -- } -- -- /* The last stmt requires interleaving of not power of 2 size - not -- vectorizable. */ -- for (i = 0; i < N/2; i++) -- { -- out[i*12] = in[i*12]; -- out[i*12 + 1] = in[i*12 + 1]; -- out[i*12 + 2] = in[i*12 + 2]; -- out[i*12 + 3] = in[i*12 + 3]; -- out[i*12 + 4] = in[i*12 + 4]; -- out[i*12 + 5] = in[i*12 + 5]; -- out[i*12 + 6] = in[i*12 + 6]; -- out[i*12 + 7] = in[i*12 + 7]; -- out[i*12 + 8] = in[i*12 + 8]; -- out[i*12 + 9] = in[i*12 + 9]; -- out[i*12 + 10] = in[i*12 + 10]; -- out[i*12 + 11] = in[i*12 + 11]; -- -- ia[i] = in[i*12 + 7]; -- } -- -- /* check results: */ -- for (i = 0; i < N/2; i++) -- { -- if (out[i*12] != in[i*12] -- || out[i*12 + 1] != in[i*12 + 1] -- || out[i*12 + 2] != in[i*12 + 2] -- || out[i*12 + 3] != in[i*12 + 3] -- || out[i*12 + 4] != in[i*12 + 4] -- || out[i*12 + 5] != in[i*12 + 5] -- || out[i*12 + 6] != in[i*12 + 6] -- || out[i*12 + 7] != in[i*12 + 7] -- || out[i*12 + 8] != in[i*12 + 8] -- || out[i*12 + 9] != in[i*12 + 9] -- || out[i*12 + 10] != in[i*12 + 10] -- || out[i*12 + 11] != in[i*12 + 11] -- || ia[i] != in[i*12 + 7]) -- abort (); -- } -- -- /* Hybrid SLP with unrolling by 2. */ -- for (i = 0; i < N; i++) -- { -- out[i*6] = in[i*6]; -- out[i*6 + 1] = in[i*6 + 1]; -- out[i*6 + 2] = in[i*6 + 2]; -- out[i*6 + 3] = in[i*6 + 3]; -- out[i*6 + 4] = in[i*6 + 4]; -- out[i*6 + 5] = in[i*6 + 5]; -- -- ia[i] = i; -- } -- -- /* check results: */ -- for (i = 0; i < N/2; i++) -- { -- if (out[i*6] != in[i*6] -- || out[i*6 + 1] != in[i*6 + 1] -- || out[i*6 + 2] != in[i*6 + 2] -- || out[i*6 + 3] != in[i*6 + 3] -- || out[i*6 + 4] != in[i*6 + 4] -- || out[i*6 + 5] != in[i*6 + 5] -- || ia[i] != i) -- abort (); -- } -- -- -- return 0; --} -- --int main (void) --{ -- check_vect (); -- -- main1 (); -- -- return 0; --} -- --/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { target vect_strided_wide } } } */ --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { ! { vect_strided_wide } } } } } */ --/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" { target vect_strided_wide } } } */ --/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target { ! { vect_strided_wide } } } } } */ --/* { dg-final { cleanup-tree-dump "vect" } } */ -- ---- a/src/gcc/testsuite/gcc.dg/vect/slp-19a.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-19a.c -@@ -0,0 +1,61 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define N 16 -+ -+int -+main1 () -+{ -+ unsigned int i; -+ unsigned int out[N*8]; -+ unsigned int in[N*8] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63}; -+ unsigned int ia[N*2]; -+ -+ for (i = 0; i < N; i++) -+ { -+ out[i*8] = in[i*8]; -+ out[i*8 + 1] = in[i*8 + 1]; -+ out[i*8 + 2] = in[i*8 + 2]; -+ out[i*8 + 3] = in[i*8 + 3]; -+ out[i*8 + 4] = in[i*8 + 4]; -+ out[i*8 + 5] = in[i*8 + 5]; -+ out[i*8 + 6] = in[i*8 + 6]; -+ out[i*8 + 7] = in[i*8 + 7]; -+ -+ ia[i] = in[i*8 + 2]; -+ } -+ -+ /* check results: */ -+ for (i = 0; i < N; i++) -+ { -+ if (out[i*8] != in[i*8] -+ || out[i*8 + 1] != in[i*8 + 1] -+ || out[i*8 + 2] != in[i*8 + 2] -+ || out[i*8 + 3] != in[i*8 + 3] -+ || out[i*8 + 4] != in[i*8 + 4] -+ || out[i*8 + 5] != in[i*8 + 5] -+ || out[i*8 + 6] != in[i*8 + 6] -+ || out[i*8 + 7] != in[i*8 + 7] -+ || ia[i] != in[i*8 + 2]) -+ abort (); -+ } -+ -+ return 0; -+} -+ -+int main (void) -+{ -+ check_vect (); -+ -+ main1 (); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! vect_strided8 } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_strided8 } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" { target { ! vect_strided8} } } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/slp-19b.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-19b.c -@@ -0,0 +1,58 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define N 16 -+ -+int -+main1 () -+{ -+ unsigned int i; -+ unsigned int out[N*8]; -+ unsigned int in[N*8] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63}; -+ unsigned int ia[N*2], a0, a1, a2, a3; -+ -+ for (i = 0; i < N*2; i++) -+ { -+ a0 = in[i*4] + 1; -+ a1 = in[i*4 + 1] + 2; -+ a2 = in[i*4 + 2] + 3; -+ a3 = in[i*4 + 3] + 4; -+ -+ out[i*4] = a0; -+ out[i*4 + 1] = a1; -+ out[i*4 + 2] = a2; -+ out[i*4 + 3] = a3; -+ -+ ia[i] = a2; -+ } -+ -+ /* check results: */ -+ for (i = 0; i < N*2; i++) -+ { -+ if (out[i*4] != in[i*4] + 1 -+ || out[i*4 + 1] != in[i*4 + 1] + 2 -+ || out[i*4 + 2] != in[i*4 + 2] + 3 -+ || out[i*4 + 3] != in[i*4 + 3] + 4 -+ || ia[i] != in[i*4 + 2] + 3) -+ abort (); -+ } -+ -+ return 0; -+} -+ -+int main (void) -+{ -+ check_vect (); -+ -+ main1 (); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided4 } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! vect_strided4 } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_strided4 } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" { target { ! vect_strided4 } } } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/slp-19c.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-19c.c -@@ -0,0 +1,95 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define N 16 -+ -+int -+main1 () -+{ -+ unsigned int i; -+ unsigned int out[N*8]; -+ unsigned int in[N*8] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63}; -+ unsigned int ia[N*2], a0, a1, a2, a3; -+ -+ /* The last stmt requires interleaving of not power of 2 size - not -+ vectorizable. */ -+ for (i = 0; i < N/2; i++) -+ { -+ out[i*12] = in[i*12]; -+ out[i*12 + 1] = in[i*12 + 1]; -+ out[i*12 + 2] = in[i*12 + 2]; -+ out[i*12 + 3] = in[i*12 + 3]; -+ out[i*12 + 4] = in[i*12 + 4]; -+ out[i*12 + 5] = in[i*12 + 5]; -+ out[i*12 + 6] = in[i*12 + 6]; -+ out[i*12 + 7] = in[i*12 + 7]; -+ out[i*12 + 8] = in[i*12 + 8]; -+ out[i*12 + 9] = in[i*12 + 9]; -+ out[i*12 + 10] = in[i*12 + 10]; -+ out[i*12 + 11] = in[i*12 + 11]; -+ -+ ia[i] = in[i*12 + 7]; -+ } -+ -+ /* check results: */ -+ for (i = 0; i < N/2; i++) -+ { -+ if (out[i*12] != in[i*12] -+ || out[i*12 + 1] != in[i*12 + 1] -+ || out[i*12 + 2] != in[i*12 + 2] -+ || out[i*12 + 3] != in[i*12 + 3] -+ || out[i*12 + 4] != in[i*12 + 4] -+ || out[i*12 + 5] != in[i*12 + 5] -+ || out[i*12 + 6] != in[i*12 + 6] -+ || out[i*12 + 7] != in[i*12 + 7] -+ || out[i*12 + 8] != in[i*12 + 8] -+ || out[i*12 + 9] != in[i*12 + 9] -+ || out[i*12 + 10] != in[i*12 + 10] -+ || out[i*12 + 11] != in[i*12 + 11] -+ || ia[i] != in[i*12 + 7]) -+ abort (); -+ } -+ -+ /* Hybrid SLP with unrolling by 2. */ -+ for (i = 0; i < N; i++) -+ { -+ out[i*6] = in[i*6]; -+ out[i*6 + 1] = in[i*6 + 1]; -+ out[i*6 + 2] = in[i*6 + 2]; -+ out[i*6 + 3] = in[i*6 + 3]; -+ out[i*6 + 4] = in[i*6 + 4]; -+ out[i*6 + 5] = in[i*6 + 5]; -+ -+ ia[i] = i; -+ } -+ -+ /* check results: */ -+ for (i = 0; i < N/2; i++) -+ { -+ if (out[i*6] != in[i*6] -+ || out[i*6 + 1] != in[i*6 + 1] -+ || out[i*6 + 2] != in[i*6 + 2] -+ || out[i*6 + 3] != in[i*6 + 3] -+ || out[i*6 + 4] != in[i*6 + 4] -+ || out[i*6 + 5] != in[i*6 + 5] -+ || ia[i] != i) -+ abort (); -+ } -+ -+ return 0; -+} -+ -+int main (void) -+{ -+ check_vect (); -+ -+ main1 (); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/slp-21.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-21.c -@@ -199,9 +199,9 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 4 loops" 1 "vect" { target { vect_strided || vect_extract_even_odd } } } } */ --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { ! { vect_strided || vect_extract_even_odd } } } } } */ --/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target vect_strided } } } */ --/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" { target { ! { vect_strided } } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 4 loops" 1 "vect" { target { vect_strided4 || vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { ! { vect_strided4 || vect_extract_even_odd } } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target vect_strided4 } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" { target { ! { vect_strided4 } } } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/slp-23.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-23.c -@@ -106,8 +106,8 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { target { vect_strided_wide } && {! { vect_no_align} } } } } */ --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { ! { vect_strided_wide || vect_no_align} } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { target { vect_strided8 && { ! { vect_no_align} } } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { ! { vect_strided8 || vect_no_align } } } } } */ - /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/slp-25.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-25.c -@@ -1,5 +1,4 @@ - /* { dg-require-effective-target vect_int } */ --/* { dg-add-options quad_vectors } */ - - #include <stdarg.h> - #include "tree-vect.h" ---- a/src/gcc/testsuite/gcc.dg/vect/slp-3.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-3.c -@@ -1,12 +1,11 @@ - /* { dg-require-effective-target vect_int } */ --/* { dg-add-options quad_vectors } */ - - #include <stdarg.h> - #include "tree-vect.h" - --#define N 8 -+#define N 12 - --unsigned short in[N*8] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63}; -+unsigned short in[N*8] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31}; - - int - main1 () -@@ -101,7 +100,7 @@ - } - - /* SLP with unrolling by 8. */ -- for (i = 0; i < N/2; i++) -+ for (i = 0; i < N/4; i++) - { - out[i*9] = in[i*9]; - out[i*9 + 1] = in[i*9 + 1]; -@@ -115,7 +114,7 @@ - } - - /* check results: */ -- for (i = 0; i < N/2; i++) -+ for (i = 0; i < N/4; i++) - { - if (out[i*9] != in[i*9] - || out[i*9 + 1] != in[i*9 + 1] ---- a/src/gcc/testsuite/gcc.dg/vect/slp-cond-1.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-cond-1.c -@@ -0,0 +1,126 @@ -+/* { dg-require-effective-target vect_condition } */ -+#include "tree-vect.h" -+ -+#define N 32 -+int a[N], b[N]; -+int d[N], e[N]; -+int k[N]; -+ -+__attribute__((noinline, noclone)) void -+f1 (void) -+{ -+ int i; -+ for (i = 0; i < N/4; i++) -+ { -+ k[4*i] = a[4*i] < b[4*i] ? 17 : 0; -+ k[4*i+1] = a[4*i+1] < b[4*i+1] ? 17 : 0; -+ k[4*i+2] = a[4*i+2] < b[4*i+2] ? 17 : 0; -+ k[4*i+3] = a[4*i+3] < b[4*i+3] ? 17 : 0; -+ } -+} -+ -+__attribute__((noinline, noclone)) void -+f2 (void) -+{ -+ int i; -+ for (i = 0; i < N/2; ++i) -+ { -+ k[2*i] = a[2*i] < b[2*i] ? 0 : 24; -+ k[2*i+1] = a[2*i+1] < b[2*i+1] ? 7 : 4; -+ } -+} -+ -+__attribute__((noinline, noclone)) void -+f3 (void) -+{ -+ int i; -+ for (i = 0; i < N/2; ++i) -+ { -+ k[2*i] = a[2*i] < b[2*i] ? 51 : 12; -+ k[2*i+1] = a[2*i+1] > b[2*i+1] ? 51 : 12; -+ } -+} -+ -+__attribute__((noinline, noclone)) void -+f4 (void) -+{ -+ int i; -+ for (i = 0; i < N/2; ++i) -+ { -+ int d0 = d[2*i], e0 = e[2*i]; -+ int d1 = d[2*i+1], e1 = e[2*i+1]; -+ k[2*i] = a[2*i] >= b[2*i] ? d0 : e0; -+ k[2*i+1] = a[2*i+1] >= b[2*i+1] ? d1 : e1; -+ } -+} -+ -+int -+main () -+{ -+ int i; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ switch (i % 9) -+ { -+ case 0: asm (""); a[i] = - i - 1; b[i] = i + 1; break; -+ case 1: a[i] = 0; b[i] = 0; break; -+ case 2: a[i] = i + 1; b[i] = - i - 1; break; -+ case 3: a[i] = i; b[i] = i + 7; break; -+ case 4: a[i] = i; b[i] = i; break; -+ case 5: a[i] = i + 16; b[i] = i + 3; break; -+ case 6: a[i] = - i - 5; b[i] = - i; break; -+ case 7: a[i] = - i; b[i] = - i; break; -+ case 8: a[i] = - i; b[i] = - i - 7; break; -+ } -+ d[i] = i; -+ e[i] = 2 * i; -+ } -+ f1 (); -+ for (i = 0; i < N; i++) -+ if (k[i] != ((i % 3) == 0 ? 17 : 0)) -+ abort (); -+ -+ f2 (); -+ for (i = 0; i < N; i++) -+ { -+ switch (i % 9) -+ { -+ case 0: -+ case 6: -+ if (k[i] != ((i/9 % 2) == 0 ? 0 : 7)) -+ abort (); -+ break; -+ case 1: -+ case 5: -+ case 7: -+ if (k[i] != ((i/9 % 2) == 0 ? 4 : 24)) -+ abort (); -+ break; -+ case 2: -+ case 4: -+ case 8: -+ if (k[i] != ((i/9 % 2) == 0 ? 24 : 4)) -+ abort (); -+ break; -+ case 3: -+ if (k[i] != ((i/9 % 2) == 0 ? 7 : 0)) -+ abort (); -+ break; -+ } -+ } -+ -+ f3 (); -+ -+ f4 (); -+ for (i = 0; i < N; i++) -+ if (k[i] != ((i % 3) == 0 ? e[i] : d[i])) -+ abort (); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/slp-reduc-6.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-reduc-6.c -@@ -42,7 +42,7 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { xfail { vect_no_int_add || { ! vect_unpack } } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { xfail { vect_no_int_add || { ! { vect_unpack || vect_strided2 } } } } } } */ - /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" } } */ - /* { dg-final { scan-tree-dump-times "different interleaving chains in one node" 1 "vect" { target { ! vect_no_int_add } } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/slp-widen-mult-half.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-widen-mult-half.c -@@ -0,0 +1,52 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include "tree-vect.h" -+#include <stdlib.h> -+ -+#define N 32 -+#define COEF 32470 -+#define COEF2 324700 -+ -+unsigned char in[N]; -+int out[N]; -+int out2[N]; -+ -+__attribute__ ((noinline)) void -+foo () -+{ -+ int i; -+ -+ for (i = 0; i < N/2; i++) -+ { -+ out[2*i] = in[2*i] * COEF; -+ out2[2*i] = in[2*i] + COEF2; -+ out[2*i+1] = in[2*i+1] * COEF; -+ out2[2*i+1] = in[2*i+1] + COEF2; -+ } -+} -+ -+int main (void) -+{ -+ int i; -+ -+ for (i = 0; i < N; i++) -+ { -+ in[i] = i; -+ __asm__ volatile (""); -+ } -+ -+ foo (); -+ -+ for (i = 0; i < N; i++) -+ if (out[i] != in[i] * COEF || out2[i] != in[i] + COEF2) -+ abort (); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_widen_mult_hi_to_si } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target vect_widen_mult_hi_to_si } } } */ -+/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 2 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */ -+/* { dg-final { scan-tree-dump-times "pattern recognized" 2 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-1.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-1.c -@@ -85,6 +85,6 @@ - fbar (a); - } - --/* { dg-final { scan-tree-dump-times "vectorized 6 loops" 1 "vect" { target vect_extract_even_odd_wide } } } */ --/* { dg-final { scan-tree-dump-times "vectorized 5 loops" 1 "vect" { xfail vect_extract_even_odd_wide } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 6 loops" 1 "vect" { target vect_strided2 } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 5 loops" 1 "vect" { xfail vect_strided2 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-10.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-10.c -@@ -22,5 +22,5 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { ! vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { ! vect_strided2 } } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-104.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-104.c -@@ -64,6 +64,7 @@ - } - - /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" } } */ --/* { dg-final { scan-tree-dump-times "possible dependence between data-refs" 1 "vect" } } */ -+/* { dg-final { scan-tree-dump-times "possible dependence between data-refs" 1 "vect" { xfail vect_multiple_sizes } } } */ -+/* { dg-final { scan-tree-dump-times "possible dependence between data-refs" 2 "vect" { target vect_multiple_sizes } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-107.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-107.c -@@ -40,6 +40,6 @@ - return main1 (); - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_extract_even_odd_wide } } } */ --/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { xfail vect_extract_even_odd_wide } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { xfail vect_strided2 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-109.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-109.c -@@ -1,5 +1,4 @@ - /* { dg-require-effective-target vect_int } */ --/* { dg-add-options quad_vectors } */ - - #include <stdarg.h> - #include "tree-vect.h" ---- a/src/gcc/testsuite/gcc.dg/vect/vect-119.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-119.c -@@ -0,0 +1,28 @@ -+/* { dg-do compile } */ -+ -+#define OUTER 32 -+#define INNER 40 -+ -+static unsigned int -+bar (const unsigned int x[INNER][2], unsigned int sum) -+{ -+ int i; -+ -+ for (i = 0; i < INNER; i++) -+ sum += x[i][0] * x[i][0] + x[i][1] * x[i][1]; -+ return sum; -+} -+ -+unsigned int foo (const unsigned int x[OUTER][INNER][2]) -+{ -+ int i; -+ unsigned int sum; -+ -+ sum = 0.0f; -+ for (i = 0; i < OUTER; i++) -+ sum = bar (x[i], sum); -+ return sum; -+} -+ -+/* { dg-final { scan-tree-dump-times "Detected interleaving of size 2" 1 "vect" } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-40.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-40.c -@@ -1,4 +1,5 @@ - /* { dg-require-effective-target vect_float } */ -+/* { dg-add-options double_vectors } */ - - #include <stdarg.h> - #include "tree-vect.h" ---- a/src/gcc/testsuite/gcc.dg/vect/vect-42.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-42.c -@@ -1,4 +1,5 @@ - /* { dg-require-effective-target vect_float } */ -+/* { dg-add-options double_vectors } */ - - #include <stdarg.h> - #include "tree-vect.h" ---- a/src/gcc/testsuite/gcc.dg/vect/vect-46.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-46.c -@@ -1,4 +1,5 @@ - /* { dg-require-effective-target vect_float } */ -+/* { dg-add-options double_vectors } */ - - #include <stdarg.h> - #include "tree-vect.h" ---- a/src/gcc/testsuite/gcc.dg/vect/vect-48.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-48.c -@@ -1,4 +1,5 @@ - /* { dg-require-effective-target vect_float } */ -+/* { dg-add-options double_vectors } */ - - #include <stdarg.h> - #include "tree-vect.h" ---- a/src/gcc/testsuite/gcc.dg/vect/vect-52.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-52.c -@@ -1,4 +1,5 @@ - /* { dg-require-effective-target vect_float } */ -+/* { dg-add-options double_vectors } */ - - #include <stdarg.h> - #include "tree-vect.h" ---- a/src/gcc/testsuite/gcc.dg/vect/vect-54.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-54.c -@@ -1,4 +1,5 @@ - /* { dg-require-effective-target vect_float } */ -+/* { dg-add-options double_vectors } */ - - #include <stdarg.h> - #include "tree-vect.h" ---- a/src/gcc/testsuite/gcc.dg/vect/vect-96.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-96.c -@@ -1,4 +1,5 @@ - /* { dg-require-effective-target vect_int } */ -+/* { dg-add-options double_vectors } */ - - #include <stdarg.h> - #include "tree-vect.h" ---- a/src/gcc/testsuite/gcc.dg/vect/vect-98.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-98.c -@@ -38,6 +38,6 @@ - } - - /* Needs interleaving support. */ --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd_wide } } } } */ --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { xfail { vect_interleave && vect_extract_even_odd_wide } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided4 } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { xfail vect_strided4 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-cond-8a.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-cond-8a.c -@@ -0,0 +1,75 @@ -+/* { dg-require-effective-target vect_condition } */ -+ -+#include "tree-vect.h" -+ -+#define N 1024 -+int a[N], b[N], c[N]; -+char d[N], e[N], f[N]; -+unsigned char k[N]; -+ -+__attribute__((noinline, noclone)) void -+f1 (void) -+{ -+ int i; -+ for (i = 0; i < N; ++i) -+ k[i] = a[i] < b[i] ? 17 : 0; -+} -+ -+__attribute__((noinline, noclone)) void -+f2 (void) -+{ -+ int i; -+ for (i = 0; i < N; ++i) -+ k[i] = a[i] < b[i] ? 0 : 24; -+} -+ -+__attribute__((noinline, noclone)) void -+f3 (void) -+{ -+ int i; -+ for (i = 0; i < N; ++i) -+ k[i] = a[i] < b[i] ? 51 : 12; -+} -+ -+int -+main () -+{ -+ int i; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ switch (i % 9) -+ { -+ case 0: asm (""); a[i] = - i - 1; b[i] = i + 1; break; -+ case 1: a[i] = 0; b[i] = 0; break; -+ case 2: a[i] = i + 1; b[i] = - i - 1; break; -+ case 3: a[i] = i; b[i] = i + 7; break; -+ case 4: a[i] = i; b[i] = i; break; -+ case 5: a[i] = i + 16; b[i] = i + 3; break; -+ case 6: a[i] = - i - 5; b[i] = - i; break; -+ case 7: a[i] = - i; b[i] = - i; break; -+ case 8: a[i] = - i; b[i] = - i - 7; break; -+ } -+ d[i] = i; -+ e[i] = 2 * i; -+ } -+ f1 (); -+ for (i = 0; i < N; i++) -+ if (k[i] != ((i % 3) == 0 ? 17 : 0)) -+ abort (); -+ f2 (); -+ for (i = 0; i < N; i++) -+ if (k[i] != ((i % 3) == 0 ? 0 : 24)) -+ abort (); -+ f3 (); -+ for (i = 0; i < N; i++) -+ if (k[i] != ((i % 3) == 0 ? 51 : 12)) -+ abort (); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "note: vectorized 1 loops" 3 "vect" } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-cselim-1.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-cselim-1.c -@@ -0,0 +1,86 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define N 50 -+ -+typedef struct { -+ short a; -+ short b; -+} data; -+ -+data in1[N], in2[N], out[N]; -+short result[N*2] = {7,-7,9,-6,11,-5,13,-4,15,-3,17,-2,19,-1,21,0,23,1,25,2,27,3,29,4,31,5,33,6,35,7,37,8,39,9,41,10,43,11,45,12,47,13,49,14,51,15,53,16,55,17,57,18,59,19,61,20,63,21,65,22,67,23,69,24,71,25,73,26,75,27,77,28,79,29,81,30,83,31,85,32,87,33,89,34,91,35,93,36,95,37,97,38,99,39,101,40,103,41,105,42}; -+short out1[N], out2[N]; -+ -+__attribute__ ((noinline)) void -+foo () -+{ -+ int i; -+ short c, d; -+ -+ /* Vectorizable with conditional store sinking. */ -+ for (i = 0; i < N; i++) -+ { -+ c = in1[i].b; -+ d = in2[i].b; -+ -+ if (c >= d) -+ { -+ out[i].b = c; -+ out[i].a = d + 5; -+ } -+ else -+ { -+ out[i].b = d - 12; -+ out[i].a = c + d; -+ } -+ } -+ -+ /* Not vectorizable. */ -+ for (i = 0; i < N; i++) -+ { -+ c = in1[i].b; -+ d = in2[i].b; -+ -+ if (c >= d) -+ { -+ out1[i] = c; -+ } -+ else -+ { -+ out2[i] = c + d; -+ } -+ } -+} -+ -+int -+main (void) -+{ -+ int i; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ in1[i].a = i; -+ in1[i].b = i + 2; -+ in2[i].a = 5; -+ in2[i].b = i + 5; -+ __asm__ volatile (""); -+ } -+ -+ foo (); -+ -+ for (i = 0; i < N; i++) -+ { -+ if (out[i].a != result[2*i] || out[i].b != result[2*i+1]) -+ abort (); -+ } -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align || { ! vect_strided2 } } } } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-cselim-2.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-cselim-2.c -@@ -0,0 +1,65 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define N 50 -+ -+int a[N], b[N], in1[N], in2[N]; -+int result[2*N] = {5,-7,7,-6,9,-5,11,-4,13,-3,15,-2,17,-1,19,0,21,1,23,2,25,3,27,4,29,5,31,6,33,7,35,8,37,9,39,10,41,11,43,12,45,13,47,14,49,15,51,16,53,17,55,18,57,19,59,20,61,21,63,22,65,23,67,24,69,25,71,26,73,27,75,28,77,29,79,30,81,31,83,32,85,33,87,34,89,35,91,36,93,37,95,38,97,39,99,40,101,41,103,42}; -+ -+__attribute__ ((noinline)) void -+foo (int *pa, int *pb) -+{ -+ int i; -+ int c, d; -+ -+ /* Store sinking should not work here since the pointers may alias. */ -+ for (i = 0; i < N; i++) -+ { -+ c = in1[i]; -+ d = in2[i]; -+ -+ if (c >= d) -+ { -+ *pa = c; -+ *pb = d + 5; -+ } -+ else -+ { -+ *pb = d - 12; -+ *pa = c + d; -+ } -+ -+ pa++; -+ pb++; -+ } -+} -+ -+int -+main (void) -+{ -+ int i; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ in1[i] = i; -+ in2[i] = i + 5; -+ __asm__ volatile (""); -+ } -+ -+ foo (a, b); -+ -+ for (i = 0; i < N; i++) -+ { -+ if (a[i] != result[2*i] || b[i] != result[2*i+1]) -+ abort (); -+ } -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-1.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-1.c -@@ -1,5 +1,4 @@ - /* { dg-require-effective-target vect_int } */ --/* { dg-add-options quad_vectors } */ - - #include <stdarg.h> - #include "tree-vect.h" ---- a/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-3.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-3.c -@@ -1,4 +1,5 @@ - /* { dg-require-effective-target vect_int } */ -+/* { dg-add-options double_vectors } */ - - #include <stdarg.h> - #include "tree-vect.h" ---- a/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-4.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-4.c -@@ -1,5 +1,4 @@ - /* { dg-require-effective-target vect_int } */ --/* { dg-add-options quad_vectors } */ - - #include <stdarg.h> - #include "tree-vect.h" ---- a/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-6.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-6.c -@@ -1,4 +1,5 @@ - /* { dg-require-effective-target vect_int } */ -+/* { dg-add-options double_vectors } */ - - #include <stdarg.h> - #include "tree-vect.h" ---- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-1.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-1.c -@@ -22,5 +22,6 @@ - } - - /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail *-*-* } } } */ --/* { dg-final { scan-tree-dump-times "strided access in outer loop" 1 "vect" } } */ -+/* { dg-final { scan-tree-dump-times "strided access in outer loop" 1 "vect" { xfail vect_multiple_sizes } } } */ -+/* { dg-final { scan-tree-dump-times "strided access in outer loop" 2 "vect" { target vect_multiple_sizes } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-1a.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-1a.c -@@ -20,5 +20,6 @@ - } - - /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail *-*-* } } } */ --/* { dg-final { scan-tree-dump-times "strided access in outer loop" 1 "vect" } } */ -+/* { dg-final { scan-tree-dump-times "strided access in outer loop" 1 "vect" { xfail vect_multiple_sizes } } } */ -+/* { dg-final { scan-tree-dump-times "strided access in outer loop" 2 "vect" { target vect_multiple_sizes } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-1b.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-1b.c -@@ -22,5 +22,6 @@ - } - - /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail *-*-* } } } */ --/* { dg-final { scan-tree-dump-times "strided access in outer loop" 1 "vect" } } */ -+/* { dg-final { scan-tree-dump-times "strided access in outer loop" 1 "vect" { xfail vect_multiple_sizes } } } */ -+/* { dg-final { scan-tree-dump-times "strided access in outer loop" 2 "vect" { target vect_multiple_sizes } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-2b.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-2b.c -@@ -37,5 +37,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "strided access in outer loop." 1 "vect" } } */ -+/* { dg-final { scan-tree-dump-times "strided access in outer loop" 1 "vect" { xfail vect_multiple_sizes } } } */ -+/* { dg-final { scan-tree-dump-times "strided access in outer loop" 2 "vect" { target vect_multiple_sizes } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-3a.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-3a.c -@@ -49,5 +49,6 @@ - } - - /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail vect_no_align } } } */ --/* { dg-final { scan-tree-dump-times "step doesn't divide the vector-size" 2 "vect" } } */ -+/* { dg-final { scan-tree-dump-times "step doesn't divide the vector-size" 2 "vect" { xfail vect_multiple_sizes } } } */ -+/* { dg-final { scan-tree-dump-times "step doesn't divide the vector-size" 3 "vect" { target vect_multiple_sizes } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-3b.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-3b.c -@@ -49,5 +49,6 @@ - } - - /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail *-*-* } } } */ --/* { dg-final { scan-tree-dump-times "strided access in outer loop" 2 "vect" } } */ -+/* { dg-final { scan-tree-dump-times "strided access in outer loop" 2 "vect" { xfail vect_multiple_sizes } } } */ -+/* { dg-final { scan-tree-dump-times "strided access in outer loop" 4 "vect" { target vect_multiple_sizes } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-5.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-5.c -@@ -1,5 +1,4 @@ - /* { dg-require-effective-target vect_float } */ --/* { dg-add-options quad_vectors } */ - - #include <stdarg.h> - #include <signal.h> -@@ -17,7 +16,7 @@ - float B[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))); - float C[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))); - float D[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))); -- float E[4] = {0,1,2,480}; -+ float E[4] = {0,480,960,1440}; - float s; - - int i, j; -@@ -55,7 +54,7 @@ - s = 0; - for (j=0; j<N; j+=4) - s += C[j]; -- B[i+3] = B[i] + s; -+ B[i+1] = B[i] + s; - } - - /* check results: */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-1.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-1.c -@@ -0,0 +1,64 @@ -+/* { dg-require-effective-target vect_int } */ -+/* { dg-require-effective-target vect_shift } */ -+ -+#include <stdlib.h> -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define N 64 -+ -+/* Modified rgb to rgb conversion from FFmpeg. */ -+__attribute__ ((noinline)) void -+foo (unsigned char *src, unsigned char *dst) -+{ -+ unsigned char *s = src; -+ unsigned short *d = (unsigned short *)dst; -+ int i; -+ -+ for (i = 0; i < N/4; i++) -+ { -+ const int b = *s++; -+ const int g = *s++; -+ const int r = *s++; -+ const int a = *s++; -+ *d = ((b>>3) | ((g&0xFC)<<3) | ((r&0xF8)<<8) | (a>>5)); -+ d++; -+ } -+ -+ s = src; -+ d = (unsigned short *)dst; -+ for (i = 0; i < N/4; i++) -+ { -+ const int b = *s++; -+ const int g = *s++; -+ const int r = *s++; -+ const int a = *s++; -+ if (*d != ((b>>3) | ((g&0xFC)<<3) | ((r&0xF8)<<8) | (a>>5))) -+ abort (); -+ d++; -+ } -+} -+ -+int main (void) -+{ -+ int i; -+ unsigned char in[N], out[N]; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ in[i] = i; -+ out[i] = 255; -+ __asm__ volatile (""); -+ } -+ -+ foo (in, out); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vect_recog_over_widening_pattern: detected" 4 "vect" } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-2.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-2.c -@@ -0,0 +1,65 @@ -+/* { dg-require-effective-target vect_int } */ -+/* { dg-require-effective-target vect_shift } */ -+ -+#include <stdlib.h> -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define N 64 -+ -+/* Modified rgb to rgb conversion from FFmpeg. */ -+__attribute__ ((noinline)) void -+foo (unsigned char *src, unsigned char *dst) -+{ -+ unsigned char *s = src; -+ int *d = (int *)dst; -+ int i; -+ -+ for (i = 0; i < N/4; i++) -+ { -+ const int b = *s++; -+ const int g = *s++; -+ const int r = *s++; -+ const int a = *s++; -+ *d = ((b>>3) | ((g&0xFC)<<3) | ((r&0xF8)<<8) | (a>>5)); -+ d++; -+ } -+ -+ s = src; -+ d = (int *)dst; -+ for (i = 0; i < N/4; i++) -+ { -+ const int b = *s++; -+ const int g = *s++; -+ const int r = *s++; -+ const int a = *s++; -+ if (*d != ((b>>3) | ((g&0xFC)<<3) | ((r&0xF8)<<8) | (a>>5))) -+ abort (); -+ d++; -+ } -+} -+ -+int main (void) -+{ -+ int i; -+ unsigned char in[N], out[N]; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ in[i] = i; -+ out[i] = 255; -+ __asm__ volatile (""); -+ } -+ -+ foo (in, out); -+ -+ return 0; -+} -+ -+/* Final value stays in int, so no over-widening is detected at the moment. */ -+/* { dg-final { scan-tree-dump-times "vect_recog_over_widening_pattern: detected" 0 "vect" } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-3.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-3.c -@@ -0,0 +1,64 @@ -+/* { dg-require-effective-target vect_int } */ -+/* { dg-require-effective-target vect_shift } */ -+ -+#include <stdlib.h> -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define N 64 -+ -+/* Modified rgb to rgb conversion from FFmpeg. */ -+__attribute__ ((noinline)) void -+foo (unsigned char *src, unsigned char *dst) -+{ -+ unsigned char *s = src; -+ unsigned short *d = (unsigned short *)dst; -+ int i; -+ -+ for (i = 0; i < N/4; i++) -+ { -+ const int b = *s++; -+ const int g = *s++; -+ const int r = *s++; -+ const int a = *s++; -+ *d = ((b>>3) | ((g&0xFFC)<<3) | ((r+0xF8)>>8) | (a<<9)); -+ d++; -+ } -+ -+ s = src; -+ d = (unsigned short *)dst; -+ for (i = 0; i < N/4; i++) -+ { -+ const int b = *s++; -+ const int g = *s++; -+ const int r = *s++; -+ const int a = *s++; -+ if (*d != ((b>>3) | ((g&0xFFC)<<3) | ((r+0xF8)>>8) | (a<<9))) -+ abort (); -+ d++; -+ } -+} -+ -+int main (void) -+{ -+ int i; -+ unsigned char in[N], out[N]; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ in[i] = i; -+ out[i] = 255; -+ __asm__ volatile (""); -+ } -+ -+ foo (in, out); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vect_recog_over_widening_pattern: detected" 1 "vect" } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-4.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-4.c -@@ -0,0 +1,68 @@ -+/* { dg-require-effective-target vect_int } */ -+/* { dg-require-effective-target vect_shift } */ -+ -+#include <stdlib.h> -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define N 64 -+ -+/* Modified rgb to rgb conversion from FFmpeg. */ -+__attribute__ ((noinline)) int -+foo (unsigned char *src, unsigned char *dst) -+{ -+ unsigned char *s = src; -+ unsigned short *d = (unsigned short *)dst, res; -+ int i, result = 0; -+ -+ for (i = 0; i < N/4; i++) -+ { -+ const int b = *s++; -+ const int g = *s++; -+ const int r = *s++; -+ const int a = *s++; -+ res = ((b>>3) | ((g&0xFC)<<3) | ((r&0xF8)<<8) | (a>>5)); -+ *d = res; -+ result += res; -+ d++; -+ } -+ -+ s = src; -+ d = (unsigned short *)dst; -+ for (i = 0; i < N/4; i++) -+ { -+ const int b = *s++; -+ const int g = *s++; -+ const int r = *s++; -+ const int a = *s++; -+ if (*d != ((b>>3) | ((g&0xFC)<<3) | ((r&0xF8)<<8) | (a>>5))) -+ abort (); -+ d++; -+ } -+ -+ return result; -+} -+ -+int main (void) -+{ -+ int i; -+ unsigned char in[N], out[N]; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ in[i] = i; -+ out[i] = 255; -+ __asm__ volatile (""); -+ } -+ -+ foo (in, out); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vect_recog_over_widening_pattern: detected" 4 "vect" } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-peel-1.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-peel-1.c -@@ -1,5 +1,4 @@ - /* { dg-require-effective-target vect_int } */ --/* { dg-add-options quad_vectors } */ - - #include <stdarg.h> - #include "tree-vect.h" ---- a/src/gcc/testsuite/gcc.dg/vect/vect-peel-2.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-peel-2.c -@@ -1,5 +1,4 @@ - /* { dg-require-effective-target vect_int } */ --/* { dg-add-options quad_vectors } */ - - #include <stdarg.h> - #include "tree-vect.h" ---- a/src/gcc/testsuite/gcc.dg/vect/vect-peel-4.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-peel-4.c -@@ -6,12 +6,12 @@ - #define N 128 - - int ib[N+7]; -+int ia[N+1]; - - __attribute__ ((noinline)) - int main1 () - { - int i; -- int ia[N+1]; - - /* Don't peel keeping one load and the store aligned. */ - for (i = 0; i <= N; i++) ---- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-s8b.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-s8b.c -@@ -58,7 +58,8 @@ - } - - /* { dg-final { scan-tree-dump-times "vect_recog_dot_prod_pattern: detected" 1 "vect" { xfail *-*-* } } } */ --/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 1 "vect" } } */ -+/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 1 "vect" { xfail vect_multiple_sizes } } } */ -+/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 2 "vect" { target vect_multiple_sizes } } } */ - - /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail *-*-* } } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-shift-3.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-shift-3.c -@@ -0,0 +1,37 @@ -+/* { dg-require-effective-target vect_shift } */ -+/* { dg-require-effective-target vect_int } */ -+ -+#include "tree-vect.h" -+ -+#define N 32 -+ -+unsigned short dst[N] __attribute__((aligned(N))); -+unsigned short src[N] __attribute__((aligned(N))); -+ -+__attribute__ ((noinline)) -+void array_shift(void) -+{ -+ int i; -+ for (i = 0; i < N; i++) -+ dst[i] = src[i] >> 3; -+} -+ -+int main() -+{ -+ volatile int i; -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ src[i] = i << 3; -+ -+ array_shift (); -+ -+ for (i = 0; i < N; i++) -+ if (dst[i] != i) -+ abort (); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-shift-4.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-shift-4.c -@@ -0,0 +1,37 @@ -+/* { dg-require-effective-target vect_shift_char } */ -+/* { dg-require-effective-target vect_int } */ -+ -+#include "tree-vect.h" -+ -+#define N 32 -+ -+unsigned char dst[N] __attribute__((aligned(N))); -+unsigned char src[N] __attribute__((aligned(N))); -+ -+__attribute__ ((noinline)) -+void array_shift(void) -+{ -+ int i; -+ for (i = 0; i < N; i++) -+ dst[i] = src[i] >> 3; -+} -+ -+int main() -+{ -+ volatile int i; -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ src[i] = i << 3; -+ -+ array_shift (); -+ -+ for (i = 0; i < N; i++) -+ if (dst[i] != i) -+ abort (); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-mult.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-mult.c -@@ -71,6 +71,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u16-i2.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u16-i2.c -@@ -55,6 +55,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u16-i4.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u16-i4.c -@@ -68,6 +68,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided4 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u16-mult.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u16-mult.c -@@ -62,6 +62,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u32-mult.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u32-mult.c -@@ -61,6 +61,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i2-gap.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i2-gap.c -@@ -69,6 +69,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i8-gap2.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i8-gap2.c -@@ -76,6 +76,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i8-gap7.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i8-gap7.c -@@ -81,6 +81,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-float.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-float.c -@@ -39,7 +39,7 @@ - } - - /* Needs interleaving support. */ --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd_wide } } } } */ --/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { xfail { vect_interleave && vect_extract_even_odd_wide } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { xfail vect_strided2 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-mult-char-ls.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-mult-char-ls.c -@@ -71,6 +71,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-mult.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-mult.c -@@ -71,6 +71,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-same-dr.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-same-dr.c -@@ -72,5 +72,5 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-store-a-u8-i2.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-store-a-u8-i2.c -@@ -55,6 +55,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave || vect_strided2 } } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-store-u16-i4.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-store-u16-i4.c -@@ -65,8 +65,8 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target { vect_interleave && vect_pack_trunc } } } } */ --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { { ! { vect_interleave } } && { vect_pack_trunc } } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target { { vect_interleave || vect_strided4 } && vect_pack_trunc } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { { ! { vect_interleave || vect_strided4 } } && { vect_pack_trunc } } } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-store-u32-i2.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-store-u32-i2.c -@@ -39,7 +39,7 @@ - } - - /* Needs interleaving support. */ --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave } } } } */ --/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { xfail { vect_interleave } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave || vect_strided2 } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { xfail { vect_interleave || vect_strided2 } } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u16-i2.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u16-i2.c -@@ -55,6 +55,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u16-i3.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u16-i3.c -@@ -0,0 +1,112 @@ -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define N 128 -+ -+typedef struct { -+ unsigned short a; -+ unsigned short b; -+ unsigned short c; -+} s; -+ -+#define A(I) (I) -+#define B(I) ((I) * 2) -+#define C(I) ((unsigned short) ~((I) ^ 0x18)) -+ -+void __attribute__ ((noinline)) -+check1 (s *res) -+{ -+ int i; -+ -+ for (i = 0; i < N; i++) -+ if (res[i].a != C (i) -+ || res[i].b != A (i) -+ || res[i].c != B (i)) -+ abort (); -+} -+ -+void __attribute__ ((noinline)) -+check2 (unsigned short *res) -+{ -+ int i; -+ -+ for (i = 0; i < N; i++) -+ if (res[i] != (unsigned short) (A (i) + B (i) + C (i))) -+ abort (); -+} -+ -+void __attribute__ ((noinline)) -+check3 (s *res) -+{ -+ int i; -+ -+ for (i = 0; i < N; i++) -+ if (res[i].a != i -+ || res[i].b != i -+ || res[i].c != i) -+ abort (); -+} -+ -+void __attribute__ ((noinline)) -+check4 (unsigned short *res) -+{ -+ int i; -+ -+ for (i = 0; i < N; i++) -+ if (res[i] != (unsigned short) (A (i) + B (i))) -+ abort (); -+} -+ -+void __attribute__ ((noinline)) -+main1 (s *arr) -+{ -+ int i; -+ s *ptr = arr; -+ s res1[N]; -+ unsigned short res2[N]; -+ -+ for (i = 0; i < N; i++) -+ { -+ res1[i].a = arr[i].c; -+ res1[i].b = arr[i].a; -+ res1[i].c = arr[i].b; -+ } -+ check1 (res1); -+ -+ for (i = 0; i < N; i++) -+ res2[i] = arr[i].a + arr[i].b + arr[i].c; -+ check2 (res2); -+ -+ for (i = 0; i < N; i++) -+ { -+ res1[i].a = i; -+ res1[i].b = i; -+ res1[i].c = i; -+ } -+ check3 (res1); -+ -+ for (i = 0; i < N; i++) -+ res2[i] = arr[i].a + arr[i].b; -+ check4 (res2); -+} -+ -+int main (void) -+{ -+ int i; -+ s arr[N]; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ arr[i].a = A (i); -+ arr[i].b = B (i); -+ arr[i].c = C (i); -+ } -+ main1 (arr); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorized 4 loops" 1 "vect" { target vect_strided3 } } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u16-i4.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u16-i4.c -@@ -68,6 +68,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided4 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u32-i4.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u32-i4.c -@@ -63,6 +63,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided4 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u32-i8.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u32-i8.c -@@ -77,6 +77,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u32-mult.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u32-mult.c -@@ -60,6 +60,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i2-gap.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i2-gap.c -@@ -71,6 +71,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i2.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i2.c -@@ -54,6 +54,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap2.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap2.c -@@ -78,6 +78,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap4.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap4.c -@@ -98,6 +98,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap7.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap7.c -@@ -83,6 +83,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8.c -@@ -85,6 +85,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-vfa-03.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-vfa-03.c -@@ -53,6 +53,6 @@ - } - - /* Needs interleaving support. */ --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { xfail { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { xfail vect_strided2 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-const-s16.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-const-s16.c -@@ -0,0 +1,60 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include "tree-vect.h" -+#include <stdlib.h> -+ -+#define N 32 -+ -+__attribute__ ((noinline)) void -+foo (int *__restrict a, -+ short *__restrict b, -+ int n) -+{ -+ int i; -+ -+ for (i = 0; i < n; i++) -+ a[i] = b[i] * 2333; -+ -+ for (i = 0; i < n; i++) -+ if (a[i] != b[i] * 2333) -+ abort (); -+} -+ -+__attribute__ ((noinline)) void -+bar (int *__restrict a, -+ short *__restrict b, -+ int n) -+{ -+ int i; -+ -+ for (i = 0; i < n; i++) -+ a[i] = b[i] * (short) 2333; -+ -+ for (i = 0; i < n; i++) -+ if (a[i] != b[i] * (short) 2333) -+ abort (); -+} -+ -+int main (void) -+{ -+ int i; -+ int a[N]; -+ short b[N]; -+ -+ for (i = 0; i < N; i++) -+ { -+ a[i] = 0; -+ b[i] = i; -+ __asm__ volatile (""); -+ } -+ -+ foo (a, b, N); -+ bar (a, b, N); -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_widen_mult_hi_to_si } } } */ -+/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 2 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */ -+/* { dg-final { scan-tree-dump-times "pattern recognized" 2 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-const-u16.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-const-u16.c -@@ -0,0 +1,77 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include "tree-vect.h" -+#include <stdlib.h> -+ -+#define N 32 -+ -+__attribute__ ((noinline)) void -+foo (unsigned int *__restrict a, -+ unsigned short *__restrict b, -+ int n) -+{ -+ int i; -+ -+ for (i = 0; i < n; i++) -+ a[i] = b[i] * 2333; -+ -+ for (i = 0; i < n; i++) -+ if (a[i] != b[i] * 2333) -+ abort (); -+} -+ -+__attribute__ ((noinline)) void -+bar (unsigned int *__restrict a, -+ unsigned short *__restrict b, -+ int n) -+{ -+ int i; -+ -+ for (i = 0; i < n; i++) -+ a[i] = (unsigned short) 2333 * b[i]; -+ -+ for (i = 0; i < n; i++) -+ if (a[i] != b[i] * (unsigned short) 2333) -+ abort (); -+} -+ -+__attribute__ ((noinline)) void -+baz (unsigned int *__restrict a, -+ unsigned short *__restrict b, -+ int n) -+{ -+ int i; -+ -+ for (i = 0; i < n; i++) -+ a[i] = b[i] * 233333333; -+ -+ for (i = 0; i < n; i++) -+ if (a[i] != b[i] * 233333333) -+ abort (); -+} -+ -+ -+int main (void) -+{ -+ int i; -+ unsigned int a[N]; -+ unsigned short b[N]; -+ -+ for (i = 0; i < N; i++) -+ { -+ a[i] = 0; -+ b[i] = i; -+ __asm__ volatile (""); -+ } -+ -+ foo (a, b, N); -+ bar (a, b, N); -+ baz (a, b, N); -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 3 "vect" { target vect_widen_mult_hi_to_si } } } */ -+/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 2 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */ -+/* { dg-final { scan-tree-dump-times "pattern recognized" 2 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-half-u8.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-half-u8.c -@@ -0,0 +1,59 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include "tree-vect.h" -+#include <stdlib.h> -+ -+#define N 32 -+#define COEF 32470 -+ -+unsigned char in[N]; -+int out[N]; -+ -+__attribute__ ((noinline)) void -+foo () -+{ -+ int i; -+ -+ for (i = 0; i < N; i++) -+ out[i] = in[i] * COEF; -+} -+ -+__attribute__ ((noinline)) void -+bar () -+{ -+ int i; -+ -+ for (i = 0; i < N; i++) -+ out[i] = COEF * in[i]; -+} -+ -+int main (void) -+{ -+ int i; -+ -+ for (i = 0; i < N; i++) -+ { -+ in[i] = i; -+ __asm__ volatile (""); -+ } -+ -+ foo (); -+ -+ for (i = 0; i < N; i++) -+ if (out[i] != in[i] * COEF) -+ abort (); -+ -+ bar (); -+ -+ for (i = 0; i < N; i++) -+ if (out[i] != in[i] * COEF) -+ abort (); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_widen_mult_hi_to_si } } } */ -+/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 2 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */ -+/* { dg-final { scan-tree-dump-times "pattern recognized" 2 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-half.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-half.c -@@ -0,0 +1,49 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include "tree-vect.h" -+#include <stdlib.h> -+ -+#define N 32 -+#define COEF 32470 -+#define COEF2 324700 -+ -+unsigned char in[N]; -+int out[N]; -+int out2[N]; -+ -+__attribute__ ((noinline)) void -+foo (int a) -+{ -+ int i; -+ -+ for (i = 0; i < N; i++) -+ { -+ out[i] = in[i] * COEF; -+ out2[i] = in[i] + a; -+ } -+} -+ -+int main (void) -+{ -+ int i; -+ -+ for (i = 0; i < N; i++) -+ { -+ in[i] = i; -+ __asm__ volatile (""); -+ } -+ -+ foo (COEF2); -+ -+ for (i = 0; i < N; i++) -+ if (out[i] != in[i] * COEF || out2[i] != in[i] + COEF2) -+ abort (); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_widen_mult_hi_to_si } } } */ -+/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 1 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */ -+/* { dg-final { scan-tree-dump-times "pattern recognized" 1 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-u16.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-u16.c -@@ -9,13 +9,11 @@ - unsigned short Y[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))); - unsigned int result[N]; - --/* short->int widening-mult */ -+/* unsigned short->unsigned int widening-mult. */ - __attribute__ ((noinline)) int - foo1(int len) { - int i; - -- /* Not vectorized because X[i] and Y[i] are casted to 'int' -- so the widening multiplication pattern is not recognized. */ - for (i=0; i<len; i++) { - result[i] = (unsigned int)(X[i] * Y[i]); - } -@@ -43,8 +41,8 @@ - return 0; - } - --/*The induction loop is vectorized */ --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { xfail *-*-* } } } */ --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_pack_trunc } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_widen_mult_hi_to_si || vect_unpack } } } } */ -+/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 1 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */ -+/* { dg-final { scan-tree-dump-times "pattern recognized" 1 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-u8.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-u8.c -@@ -9,7 +9,7 @@ - unsigned char Y[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))); - unsigned short result[N]; - --/* char->short widening-mult */ -+/* unsigned char-> unsigned short widening-mult. */ - __attribute__ ((noinline)) int - foo1(int len) { - int i; -@@ -28,8 +28,7 @@ - for (i=0; i<N; i++) { - X[i] = i; - Y[i] = 64-i; -- if (i%4 == 0) -- X[i] = 5; -+ __asm__ volatile (""); - } - - foo1 (N); -@@ -43,5 +42,7 @@ - } - - /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_widen_mult_qi_to_hi || vect_unpack } } } } */ -+/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 1 "vect" { target vect_widen_mult_qi_to_hi_pattern } } } */ -+/* { dg-final { scan-tree-dump-times "pattern recognized" 1 "vect" { target vect_widen_mult_qi_to_hi_pattern } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-shift-s16.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-shift-s16.c -@@ -0,0 +1,107 @@ -+/* { dg-require-effective-target vect_int } */ -+/* { dg-require-effective-target vect_shift } */ -+ -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define N 64 -+#define C 16 -+ -+__attribute__ ((noinline)) void -+foo (short *src, int *dst) -+{ -+ int i; -+ short b, b0, b1, b2, b3, *s = src; -+ int *d = dst; -+ -+ for (i = 0; i < N/4; i++) -+ { -+ b0 = *s++; -+ b1 = *s++; -+ b2 = *s++; -+ b3 = *s++; -+ *d = b0 << C; -+ d++; -+ *d = b1 << C; -+ d++; -+ *d = b2 << C; -+ d++; -+ *d = b3 << C; -+ d++; -+ } -+ -+ s = src; -+ d = dst; -+ for (i = 0; i < N; i++) -+ { -+ b = *s++; -+ if (*d != b << C) -+ abort (); -+ d++; -+ } -+ -+ s = src; -+ d = dst; -+ for (i = 0; i < N/4; i++) -+ { -+ b0 = *s++; -+ b1 = *s++; -+ b2 = *s++; -+ b3 = *s++; -+ *d = b0 << C; -+ d++; -+ *d = b1 << C; -+ d++; -+ *d = b2 << C; -+ d++; -+ *d = b3 << 6; -+ d++; -+ } -+ -+ s = src; -+ d = dst; -+ for (i = 0; i < N/4; i++) -+ { -+ b = *s++; -+ if (*d != b << C) -+ abort (); -+ d++; -+ b = *s++; -+ if (*d != b << C) -+ abort (); -+ d++; -+ b = *s++; -+ if (*d != b << C) -+ abort (); -+ d++; -+ b = *s++; -+ if (*d != b << 6) -+ abort (); -+ d++; -+ } -+} -+ -+int main (void) -+{ -+ int i; -+ short in[N]; -+ int out[N]; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ in[i] = i; -+ out[i] = 255; -+ __asm__ volatile (""); -+ } -+ -+ foo (in, out); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vect_recog_widen_shift_pattern: detected" 8 "vect" { target vect_widen_shift } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-shift-s8.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-shift-s8.c -@@ -0,0 +1,58 @@ -+/* { dg-require-effective-target vect_int } */ -+/* { dg-require-effective-target vect_shift } */ -+ -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define N 64 -+#define C 12 -+ -+__attribute__ ((noinline)) void -+foo (char *src, int *dst) -+{ -+ int i; -+ char b, *s = src; -+ int *d = dst; -+ -+ for (i = 0; i < N; i++) -+ { -+ b = *s++; -+ *d = b << C; -+ d++; -+ } -+ -+ s = src; -+ d = dst; -+ for (i = 0; i < N; i++) -+ { -+ b = *s++; -+ if (*d != b << C) -+ abort (); -+ d++; -+ } -+} -+ -+int main (void) -+{ -+ int i; -+ char in[N]; -+ int out[N]; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ in[i] = i; -+ out[i] = 255; -+ __asm__ volatile (""); -+ } -+ -+ foo (in, out); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vect_recog_widen_shift_pattern: detected" 1 "vect" { target vect_widen_shift } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-shift-u16.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-shift-u16.c -@@ -0,0 +1,58 @@ -+/* { dg-require-effective-target vect_int } */ -+/* { dg-require-effective-target vect_shift } */ -+ -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define N 64 -+#define C 7 -+ -+__attribute__ ((noinline)) void -+foo (unsigned short *src, unsigned int *dst) -+{ -+ int i; -+ unsigned short b, *s = src; -+ unsigned int *d = dst; -+ -+ for (i = 0; i < N; i++) -+ { -+ b = *s++; -+ *d = b << C; -+ d++; -+ } -+ -+ s = src; -+ d = dst; -+ for (i = 0; i < N; i++) -+ { -+ b = *s++; -+ if (*d != b << C) -+ abort (); -+ d++; -+ } -+} -+ -+int main (void) -+{ -+ int i; -+ unsigned short in[N]; -+ unsigned int out[N]; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ in[i] = i; -+ out[i] = 255; -+ __asm__ volatile (""); -+ } -+ -+ foo (in, out); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vect_recog_widen_shift_pattern: detected" 1 "vect" { target vect_widen_shift } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-shift-u8.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-shift-u8.c -@@ -0,0 +1,65 @@ -+/* { dg-require-effective-target vect_int } */ -+/* { dg-require-effective-target vect_shift } */ -+ -+#include <stdarg.h> -+#include "tree-vect.h" -+ -+#define N 64 -+#define C1 10 -+#define C2 5 -+ -+__attribute__ ((noinline)) void -+foo (unsigned char *src, unsigned int *dst1, unsigned int *dst2) -+{ -+ int i; -+ unsigned char b, *s = src; -+ unsigned int *d1 = dst1, *d2 = dst2; -+ -+ for (i = 0; i < N; i++) -+ { -+ b = *s++; -+ *d1 = b << C1; -+ d1++; -+ *d2 = b << C2; -+ d2++; -+ } -+ -+ s = src; -+ d1 = dst1; -+ d2 = dst2; -+ for (i = 0; i < N; i++) -+ { -+ b = *s++; -+ if (*d1 != b << C1 || *d2 != b << C2) -+ abort (); -+ d1++; -+ d2++; -+ } -+} -+ -+int main (void) -+{ -+ int i; -+ unsigned char in[N]; -+ unsigned int out1[N]; -+ unsigned int out2[N]; -+ -+ check_vect (); -+ -+ for (i = 0; i < N; i++) -+ { -+ in[i] = i; -+ out1[i] = 255; -+ out2[i] = 255; -+ __asm__ volatile (""); -+ } -+ -+ foo (in, out1, out2); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vect_recog_widen_shift_pattern: detected" 1 "vect" { target vect_widen_shift } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ -+ ---- a/src/gcc/testsuite/gcc.dg/vect/vect.exp -+++ b/src/gcc/testsuite/gcc.dg/vect/vect.exp -@@ -75,15 +75,20 @@ - lappend VECT_SLP_CFLAGS "-fdump-tree-slp-details" - - # Main loop. --dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/pr*.\[cS\]]] \ -- "" $DEFAULT_VECTCFLAGS --dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/vect-*.\[cS\]]] \ -- "" $DEFAULT_VECTCFLAGS --dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/slp-*.\[cS\]]] \ -- "" $DEFAULT_VECTCFLAGS --dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/bb-slp*.\[cS\]]] \ -- "" $VECT_SLP_CFLAGS -- -+set VECT_ADDITIONAL_FLAGS [list ""] -+if { [check_effective_target_lto] } { -+ lappend VECT_ADDITIONAL_FLAGS "-flto" -+} -+foreach flags $VECT_ADDITIONAL_FLAGS { -+ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/pr*.\[cS\]]] \ -+ $flags $DEFAULT_VECTCFLAGS -+ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/vect-*.\[cS\]]] \ -+ $flags $DEFAULT_VECTCFLAGS -+ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/slp-*.\[cS\]]] \ -+ $flags $DEFAULT_VECTCFLAGS -+ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/bb-slp*.\[cS\]]] \ -+ $flags $VECT_SLP_CFLAGS -+} - - #### Tests with special options - global SAVED_DEFAULT_VECTCFLAGS -@@ -210,6 +215,12 @@ - dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/ggc-*.\[cS\]]] \ - "" $DEFAULT_VECTCFLAGS - -+# -ftree-loop-if-convert-stores -+set DEFAULT_VECTCFLAGS $SAVED_DEFAULT_VECTCFLAGS -+lappend DEFAULT_VECTCFLAGS "-ftree-loop-if-convert-stores" -+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/if-cvt-stores-vect-*.\[cS\]]] \ -+ "" $DEFAULT_VECTCFLAGS -+ - # With -O3. - # Don't allow IPA cloning, because it throws our counts out of whack. - set DEFAULT_VECTCFLAGS $SAVED_DEFAULT_VECTCFLAGS -@@ -234,6 +245,18 @@ - dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/no-tree-reassoc-bb-slp-*.\[cS\]]] \ - "" $VECT_SLP_CFLAGS - -+# -fno-tree-fre -+set DEFAULT_VECTCFLAGS $SAVED_DEFAULT_VECTCFLAGS -+lappend DEFAULT_VECTCFLAGS "-fno-tree-fre" -+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/no-tree-fre-*.\[cS\]]] \ -+ "" $DEFAULT_VECTCFLAGS -+ -+# -fno-tree-fre -fno-tree-pre -+set DEFAULT_VECTCFLAGS $SAVED_DEFAULT_VECTCFLAGS -+lappend DEFAULT_VECTCFLAGS "-fno-tree-fre" "-fno-tree-pre" -+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/no-fre-pre*.\[cS\]]] \ -+ "" $DEFAULT_VECTCFLAGS -+ - # Clean up. - set dg-do-what-default ${save-dg-do-what-default} - ---- a/src/gcc/testsuite/gcc.target/arm/cmp-1.c -+++ b/src/gcc/testsuite/gcc.target/arm/cmp-1.c -@@ -0,0 +1,37 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O" } */ -+/* { dg-final { scan-assembler-not "\tbl\t" } } */ -+/* { dg-final { scan-assembler-not "__aeabi" } } */ -+int x, y; -+ -+#define TEST_EXPR(NAME, ARGS, EXPR) \ -+ int NAME##1 ARGS { return (EXPR); } \ -+ int NAME##2 ARGS { return !(EXPR); } \ -+ int NAME##3 ARGS { return (EXPR) ? x : y; } \ -+ void NAME##4 ARGS { if (EXPR) x++; } \ -+ void NAME##5 ARGS { if (!(EXPR)) x++; } -+ -+#define TEST(NAME, TYPE, OPERATOR) \ -+ TEST_EXPR (NAME##_rr, (TYPE a1, TYPE a2), a1 OPERATOR a2) \ -+ TEST_EXPR (NAME##_rm, (TYPE a1, TYPE *a2), a1 OPERATOR *a2) \ -+ TEST_EXPR (NAME##_mr, (TYPE *a1, TYPE a2), *a1 OPERATOR a2) \ -+ TEST_EXPR (NAME##_mm, (TYPE *a1, TYPE *a2), *a1 OPERATOR *a2) \ -+ TEST_EXPR (NAME##_rc, (TYPE a1), a1 OPERATOR 100) \ -+ TEST_EXPR (NAME##_cr, (TYPE a1), 100 OPERATOR a1) -+ -+#define TEST_OP(NAME, OPERATOR) \ -+ TEST (sc_##NAME, signed char, OPERATOR) \ -+ TEST (uc_##NAME, unsigned char, OPERATOR) \ -+ TEST (ss_##NAME, short, OPERATOR) \ -+ TEST (us_##NAME, unsigned short, OPERATOR) \ -+ TEST (si_##NAME, int, OPERATOR) \ -+ TEST (ui_##NAME, unsigned int, OPERATOR) \ -+ TEST (sll_##NAME, long long, OPERATOR) \ -+ TEST (ull_##NAME, unsigned long long, OPERATOR) -+ -+TEST_OP (eq, ==) -+TEST_OP (ne, !=) -+TEST_OP (lt, <) -+TEST_OP (gt, >) -+TEST_OP (le, <=) -+TEST_OP (ge, >=) ---- a/src/gcc/testsuite/gcc.target/arm/cmp-2.c -+++ b/src/gcc/testsuite/gcc.target/arm/cmp-2.c -@@ -0,0 +1,49 @@ -+/* { dg-do compile } */ -+/* { dg-require-effective-target arm_vfp_ok } */ -+/* { dg-skip-if "need fp instructions" { *-*-* } { "-mfloat-abi=soft" } { "" } } */ -+/* { dg-options "-O -mfpu=vfp -mfloat-abi=softfp" } */ -+/* { dg-final { scan-assembler-not "\tbl\t" } } */ -+/* { dg-final { scan-assembler-not "__aeabi" } } */ -+int x, y; -+ -+#define EQ(X, Y) ((X) == (Y)) -+#define NE(X, Y) ((X) != (Y)) -+#define LT(X, Y) ((X) < (Y)) -+#define GT(X, Y) ((X) > (Y)) -+#define LE(X, Y) ((X) <= (Y)) -+#define GE(X, Y) ((X) >= (Y)) -+ -+#define TEST_EXPR(NAME, ARGS, EXPR) \ -+ int NAME##1 ARGS { return (EXPR); } \ -+ int NAME##2 ARGS { return !(EXPR); } \ -+ int NAME##3 ARGS { return (EXPR) ? x : y; } \ -+ void NAME##4 ARGS { if (EXPR) x++; } \ -+ void NAME##5 ARGS { if (!(EXPR)) x++; } -+ -+#define TEST(NAME, TYPE, OPERATOR) \ -+ TEST_EXPR (NAME##_rr, (TYPE a1, TYPE a2), OPERATOR (a1, a2)) \ -+ TEST_EXPR (NAME##_rm, (TYPE a1, TYPE *a2), OPERATOR (a1, *a2)) \ -+ TEST_EXPR (NAME##_mr, (TYPE *a1, TYPE a2), OPERATOR (*a1, a2)) \ -+ TEST_EXPR (NAME##_mm, (TYPE *a1, TYPE *a2), OPERATOR (*a1, *a2)) \ -+ TEST_EXPR (NAME##_rc, (TYPE a1), OPERATOR (a1, 100)) \ -+ TEST_EXPR (NAME##_cr, (TYPE a1), OPERATOR (100, a1)) -+ -+#define TEST_OP(NAME, OPERATOR) \ -+ TEST (f_##NAME, float, OPERATOR) \ -+ TEST (d_##NAME, double, OPERATOR) \ -+ TEST (ld_##NAME, long double, OPERATOR) -+ -+TEST_OP (eq, EQ) -+TEST_OP (ne, NE) -+TEST_OP (lt, LT) -+TEST_OP (gt, GT) -+TEST_OP (le, LE) -+TEST_OP (ge, GE) -+TEST_OP (blt, __builtin_isless) -+TEST_OP (bgt, __builtin_isgreater) -+TEST_OP (ble, __builtin_islessequal) -+TEST_OP (bge, __builtin_isgreaterequal) -+/* This one should be expanded into separate ordered and equality -+ comparisons. */ -+TEST_OP (blg, __builtin_islessgreater) -+TEST_OP (bun, __builtin_isunordered) ---- a/src/gcc/testsuite/gcc.target/arm/di-longlong64-sync-withhelpers.c -+++ b/src/gcc/testsuite/gcc.target/arm/di-longlong64-sync-withhelpers.c -@@ -0,0 +1,14 @@ -+/* { dg-do compile } */ -+/* { dg-require-effective-target arm_arch_v5_ok } */ -+/* { dg-options "-std=gnu99" } */ -+/* { dg-add-options arm_arch_v5 } */ -+/* { dg-message "note: '__sync_fetch_and_nand' changed semantics in GCC 4.4" "" { target *-*-* } 0 } */ -+/* { dg-message "note: '__sync_nand_and_fetch' changed semantics in GCC 4.4" "" { target *-*-* } 0 } */ -+/* { dg-message "file included" "In file included" { target *-*-* } 0 } */ -+ -+#include "../../gcc.dg/di-longlong64-sync-1.c" -+ -+/* On an old ARM we have no ldrexd or strexd so we have to use helpers. */ -+/* { dg-final { scan-assembler-not "ldrexd" } } */ -+/* { dg-final { scan-assembler-not "strexd" } } */ -+/* { dg-final { scan-assembler "__sync_" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/di-longlong64-sync-withldrexd.c -+++ b/src/gcc/testsuite/gcc.target/arm/di-longlong64-sync-withldrexd.c -@@ -0,0 +1,17 @@ -+/* { dg-do compile } */ -+/* { dg-require-effective-target arm_arm_ok } */ -+/* { dg-options "-marm -std=gnu99" } */ -+/* { dg-require-effective-target arm_arch_v6k_ok } */ -+/* { dg-add-options arm_arch_v6k } */ -+/* { dg-message "note: '__sync_fetch_and_nand' changed semantics in GCC 4.4" "" { target *-*-* } 0 } */ -+/* { dg-message "note: '__sync_nand_and_fetch' changed semantics in GCC 4.4" "" { target *-*-* } 0 } */ -+/* { dg-message "file included" "In file included" { target *-*-* } 0 } */ -+ -+#include "../../gcc.dg/di-longlong64-sync-1.c" -+ -+/* We should be using ldrexd, strexd and no helpers or shorter ldrex. */ -+/* { dg-final { scan-assembler-times "\tldrexd" 46 } } */ -+/* { dg-final { scan-assembler-times "\tstrexd" 46 } } */ -+/* { dg-final { scan-assembler-not "__sync_" } } */ -+/* { dg-final { scan-assembler-not "ldrex\t" } } */ -+/* { dg-final { scan-assembler-not "strex\t" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/mla-2.c -+++ b/src/gcc/testsuite/gcc.target/arm/mla-2.c -@@ -0,0 +1,9 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2 -march=armv7-a" } */ -+ -+long long foolong (long long x, short *a, short *b) -+{ -+ return x + *a * *b; -+} -+ -+/* { dg-final { scan-assembler "smlalbb" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c -@@ -15,5 +15,5 @@ - out_float32x4_t = vld1q_dup_f32 (0); - } - --/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c -@@ -15,5 +15,5 @@ - out_poly16x8_t = vld1q_dup_p16 (0); - } - --/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c -@@ -15,5 +15,5 @@ - out_poly8x16_t = vld1q_dup_p8 (0); - } - --/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c -@@ -15,5 +15,5 @@ - out_int16x8_t = vld1q_dup_s16 (0); - } - --/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c -@@ -15,5 +15,5 @@ - out_int32x4_t = vld1q_dup_s32 (0); - } - --/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c -@@ -15,5 +15,5 @@ - out_int64x2_t = vld1q_dup_s64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c -@@ -15,5 +15,5 @@ - out_int8x16_t = vld1q_dup_s8 (0); - } - --/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c -@@ -15,5 +15,5 @@ - out_uint16x8_t = vld1q_dup_u16 (0); - } - --/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c -@@ -15,5 +15,5 @@ - out_uint32x4_t = vld1q_dup_u32 (0); - } - --/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c -@@ -15,5 +15,5 @@ - out_uint64x2_t = vld1q_dup_u64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c -@@ -15,5 +15,5 @@ - out_uint8x16_t = vld1q_dup_u8 (0); - } - --/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c -@@ -16,5 +16,5 @@ - out_float32x4_t = vld1q_lane_f32 (0, arg1_float32x4_t, 1); - } - --/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c -@@ -16,5 +16,5 @@ - out_poly16x8_t = vld1q_lane_p16 (0, arg1_poly16x8_t, 1); - } - --/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c -@@ -16,5 +16,5 @@ - out_poly8x16_t = vld1q_lane_p8 (0, arg1_poly8x16_t, 1); - } - --/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c -@@ -16,5 +16,5 @@ - out_int16x8_t = vld1q_lane_s16 (0, arg1_int16x8_t, 1); - } - --/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c -@@ -16,5 +16,5 @@ - out_int32x4_t = vld1q_lane_s32 (0, arg1_int32x4_t, 1); - } - --/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c -@@ -16,5 +16,5 @@ - out_int64x2_t = vld1q_lane_s64 (0, arg1_int64x2_t, 1); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c -@@ -16,5 +16,5 @@ - out_int8x16_t = vld1q_lane_s8 (0, arg1_int8x16_t, 1); - } - --/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c -@@ -16,5 +16,5 @@ - out_uint16x8_t = vld1q_lane_u16 (0, arg1_uint16x8_t, 1); - } - --/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c -@@ -16,5 +16,5 @@ - out_uint32x4_t = vld1q_lane_u32 (0, arg1_uint32x4_t, 1); - } - --/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c -@@ -16,5 +16,5 @@ - out_uint64x2_t = vld1q_lane_u64 (0, arg1_uint64x2_t, 1); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c -@@ -16,5 +16,5 @@ - out_uint8x16_t = vld1q_lane_u8 (0, arg1_uint8x16_t, 1); - } - --/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c -@@ -15,5 +15,5 @@ - out_float32x4_t = vld1q_f32 (0); - } - --/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c -@@ -15,5 +15,5 @@ - out_poly16x8_t = vld1q_p16 (0); - } - --/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c -@@ -15,5 +15,5 @@ - out_poly8x16_t = vld1q_p8 (0); - } - --/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c -@@ -15,5 +15,5 @@ - out_int16x8_t = vld1q_s16 (0); - } - --/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c -@@ -15,5 +15,5 @@ - out_int32x4_t = vld1q_s32 (0); - } - --/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c -@@ -15,5 +15,5 @@ - out_int64x2_t = vld1q_s64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c -@@ -15,5 +15,5 @@ - out_int8x16_t = vld1q_s8 (0); - } - --/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c -@@ -15,5 +15,5 @@ - out_uint16x8_t = vld1q_u16 (0); - } - --/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c -@@ -15,5 +15,5 @@ - out_uint32x4_t = vld1q_u32 (0); - } - --/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c -@@ -15,5 +15,5 @@ - out_uint64x2_t = vld1q_u64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c -@@ -15,5 +15,5 @@ - out_uint8x16_t = vld1q_u8 (0); - } - --/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c -@@ -15,5 +15,5 @@ - out_float32x2_t = vld1_dup_f32 (0); - } - --/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c -@@ -15,5 +15,5 @@ - out_poly16x4_t = vld1_dup_p16 (0); - } - --/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c -@@ -15,5 +15,5 @@ - out_poly8x8_t = vld1_dup_p8 (0); - } - --/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c -@@ -15,5 +15,5 @@ - out_int16x4_t = vld1_dup_s16 (0); - } - --/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c -@@ -15,5 +15,5 @@ - out_int32x2_t = vld1_dup_s32 (0); - } - --/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c -@@ -15,5 +15,5 @@ - out_int64x1_t = vld1_dup_s64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c -@@ -15,5 +15,5 @@ - out_int8x8_t = vld1_dup_s8 (0); - } - --/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c -@@ -15,5 +15,5 @@ - out_uint16x4_t = vld1_dup_u16 (0); - } - --/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c -@@ -15,5 +15,5 @@ - out_uint32x2_t = vld1_dup_u32 (0); - } - --/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c -@@ -15,5 +15,5 @@ - out_uint64x1_t = vld1_dup_u64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c -@@ -15,5 +15,5 @@ - out_uint8x8_t = vld1_dup_u8 (0); - } - --/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c -@@ -16,5 +16,5 @@ - out_float32x2_t = vld1_lane_f32 (0, arg1_float32x2_t, 1); - } - --/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c -@@ -16,5 +16,5 @@ - out_poly16x4_t = vld1_lane_p16 (0, arg1_poly16x4_t, 1); - } - --/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c -@@ -16,5 +16,5 @@ - out_poly8x8_t = vld1_lane_p8 (0, arg1_poly8x8_t, 1); - } - --/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c -@@ -16,5 +16,5 @@ - out_int16x4_t = vld1_lane_s16 (0, arg1_int16x4_t, 1); - } - --/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c -@@ -16,5 +16,5 @@ - out_int32x2_t = vld1_lane_s32 (0, arg1_int32x2_t, 1); - } - --/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c -@@ -16,5 +16,5 @@ - out_int64x1_t = vld1_lane_s64 (0, arg1_int64x1_t, 0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c -@@ -16,5 +16,5 @@ - out_int8x8_t = vld1_lane_s8 (0, arg1_int8x8_t, 1); - } - --/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c -@@ -16,5 +16,5 @@ - out_uint16x4_t = vld1_lane_u16 (0, arg1_uint16x4_t, 1); - } - --/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c -@@ -16,5 +16,5 @@ - out_uint32x2_t = vld1_lane_u32 (0, arg1_uint32x2_t, 1); - } - --/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c -@@ -16,5 +16,5 @@ - out_uint64x1_t = vld1_lane_u64 (0, arg1_uint64x1_t, 0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c -@@ -16,5 +16,5 @@ - out_uint8x8_t = vld1_lane_u8 (0, arg1_uint8x8_t, 1); - } - --/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1f32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1f32.c -@@ -15,5 +15,5 @@ - out_float32x2_t = vld1_f32 (0); - } - --/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1p16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1p16.c -@@ -15,5 +15,5 @@ - out_poly16x4_t = vld1_p16 (0); - } - --/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1p8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1p8.c -@@ -15,5 +15,5 @@ - out_poly8x8_t = vld1_p8 (0); - } - --/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1s16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1s16.c -@@ -15,5 +15,5 @@ - out_int16x4_t = vld1_s16 (0); - } - --/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1s32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1s32.c -@@ -15,5 +15,5 @@ - out_int32x2_t = vld1_s32 (0); - } - --/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1s64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1s64.c -@@ -15,5 +15,5 @@ - out_int64x1_t = vld1_s64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1s8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1s8.c -@@ -15,5 +15,5 @@ - out_int8x8_t = vld1_s8 (0); - } - --/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1u16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1u16.c -@@ -15,5 +15,5 @@ - out_uint16x4_t = vld1_u16 (0); - } - --/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1u32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1u32.c -@@ -15,5 +15,5 @@ - out_uint32x2_t = vld1_u32 (0); - } - --/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1u64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1u64.c -@@ -15,5 +15,5 @@ - out_uint64x1_t = vld1_u64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1u8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1u8.c -@@ -15,5 +15,5 @@ - out_uint8x8_t = vld1_u8 (0); - } - --/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c -@@ -16,5 +16,5 @@ - out_float32x4x2_t = vld2q_lane_f32 (0, arg1_float32x4x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c -@@ -16,5 +16,5 @@ - out_poly16x8x2_t = vld2q_lane_p16 (0, arg1_poly16x8x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c -@@ -16,5 +16,5 @@ - out_int16x8x2_t = vld2q_lane_s16 (0, arg1_int16x8x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c -@@ -16,5 +16,5 @@ - out_int32x4x2_t = vld2q_lane_s32 (0, arg1_int32x4x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c -@@ -16,5 +16,5 @@ - out_uint16x8x2_t = vld2q_lane_u16 (0, arg1_uint16x8x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c -@@ -16,5 +16,5 @@ - out_uint32x4x2_t = vld2q_lane_u32 (0, arg1_uint32x4x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c -@@ -15,6 +15,6 @@ - out_float32x4x2_t = vld2q_f32 (0); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c -@@ -15,6 +15,6 @@ - out_poly16x8x2_t = vld2q_p16 (0); - } - --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c -@@ -15,6 +15,6 @@ - out_poly8x16x2_t = vld2q_p8 (0); - } - --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c -@@ -15,6 +15,6 @@ - out_int16x8x2_t = vld2q_s16 (0); - } - --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c -@@ -15,6 +15,6 @@ - out_int32x4x2_t = vld2q_s32 (0); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c -@@ -15,6 +15,6 @@ - out_int8x16x2_t = vld2q_s8 (0); - } - --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c -@@ -15,6 +15,6 @@ - out_uint16x8x2_t = vld2q_u16 (0); - } - --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c -@@ -15,6 +15,6 @@ - out_uint32x4x2_t = vld2q_u32 (0); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c -@@ -15,6 +15,6 @@ - out_uint8x16x2_t = vld2q_u8 (0); - } - --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c -@@ -15,5 +15,5 @@ - out_float32x2x2_t = vld2_dup_f32 (0); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c -@@ -15,5 +15,5 @@ - out_poly16x4x2_t = vld2_dup_p16 (0); - } - --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c -@@ -15,5 +15,5 @@ - out_poly8x8x2_t = vld2_dup_p8 (0); - } - --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c -@@ -15,5 +15,5 @@ - out_int16x4x2_t = vld2_dup_s16 (0); - } - --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c -@@ -15,5 +15,5 @@ - out_int32x2x2_t = vld2_dup_s32 (0); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c -@@ -15,5 +15,5 @@ - out_int64x1x2_t = vld2_dup_s64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c -@@ -15,5 +15,5 @@ - out_int8x8x2_t = vld2_dup_s8 (0); - } - --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c -@@ -15,5 +15,5 @@ - out_uint16x4x2_t = vld2_dup_u16 (0); - } - --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c -@@ -15,5 +15,5 @@ - out_uint32x2x2_t = vld2_dup_u32 (0); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c -@@ -15,5 +15,5 @@ - out_uint64x1x2_t = vld2_dup_u64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c -@@ -15,5 +15,5 @@ - out_uint8x8x2_t = vld2_dup_u8 (0); - } - --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c -@@ -16,5 +16,5 @@ - out_float32x2x2_t = vld2_lane_f32 (0, arg1_float32x2x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c -@@ -16,5 +16,5 @@ - out_poly16x4x2_t = vld2_lane_p16 (0, arg1_poly16x4x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c -@@ -16,5 +16,5 @@ - out_poly8x8x2_t = vld2_lane_p8 (0, arg1_poly8x8x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c -@@ -16,5 +16,5 @@ - out_int16x4x2_t = vld2_lane_s16 (0, arg1_int16x4x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c -@@ -16,5 +16,5 @@ - out_int32x2x2_t = vld2_lane_s32 (0, arg1_int32x2x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c -@@ -16,5 +16,5 @@ - out_int8x8x2_t = vld2_lane_s8 (0, arg1_int8x8x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c -@@ -16,5 +16,5 @@ - out_uint16x4x2_t = vld2_lane_u16 (0, arg1_uint16x4x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c -@@ -16,5 +16,5 @@ - out_uint32x2x2_t = vld2_lane_u32 (0, arg1_uint32x2x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c -@@ -16,5 +16,5 @@ - out_uint8x8x2_t = vld2_lane_u8 (0, arg1_uint8x8x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2f32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2f32.c -@@ -15,5 +15,5 @@ - out_float32x2x2_t = vld2_f32 (0); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2p16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2p16.c -@@ -15,5 +15,5 @@ - out_poly16x4x2_t = vld2_p16 (0); - } - --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2p8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2p8.c -@@ -15,5 +15,5 @@ - out_poly8x8x2_t = vld2_p8 (0); - } - --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2s16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2s16.c -@@ -15,5 +15,5 @@ - out_int16x4x2_t = vld2_s16 (0); - } - --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2s32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2s32.c -@@ -15,5 +15,5 @@ - out_int32x2x2_t = vld2_s32 (0); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2s64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2s64.c -@@ -15,5 +15,5 @@ - out_int64x1x2_t = vld2_s64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2s8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2s8.c -@@ -15,5 +15,5 @@ - out_int8x8x2_t = vld2_s8 (0); - } - --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2u16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2u16.c -@@ -15,5 +15,5 @@ - out_uint16x4x2_t = vld2_u16 (0); - } - --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2u32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2u32.c -@@ -15,5 +15,5 @@ - out_uint32x2x2_t = vld2_u32 (0); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2u64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2u64.c -@@ -15,5 +15,5 @@ - out_uint64x1x2_t = vld2_u64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2u8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2u8.c -@@ -15,5 +15,5 @@ - out_uint8x8x2_t = vld2_u8 (0); - } - --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c -@@ -16,5 +16,5 @@ - out_float32x4x3_t = vld3q_lane_f32 (0, arg1_float32x4x3_t, 1); - } - --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c -@@ -16,5 +16,5 @@ - out_poly16x8x3_t = vld3q_lane_p16 (0, arg1_poly16x8x3_t, 1); - } - --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c -@@ -16,5 +16,5 @@ - out_int16x8x3_t = vld3q_lane_s16 (0, arg1_int16x8x3_t, 1); - } - --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c -@@ -16,5 +16,5 @@ - out_int32x4x3_t = vld3q_lane_s32 (0, arg1_int32x4x3_t, 1); - } - --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c -@@ -16,5 +16,5 @@ - out_uint16x8x3_t = vld3q_lane_u16 (0, arg1_uint16x8x3_t, 1); - } - --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c -@@ -16,5 +16,5 @@ - out_uint32x4x3_t = vld3q_lane_u32 (0, arg1_uint32x4x3_t, 1); - } - --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c -@@ -15,6 +15,6 @@ - out_float32x4x3_t = vld3q_f32 (0); - } - --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c -@@ -15,6 +15,6 @@ - out_poly16x8x3_t = vld3q_p16 (0); - } - --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c -@@ -15,6 +15,6 @@ - out_poly8x16x3_t = vld3q_p8 (0); - } - --/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c -@@ -15,6 +15,6 @@ - out_int16x8x3_t = vld3q_s16 (0); - } - --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c -@@ -15,6 +15,6 @@ - out_int32x4x3_t = vld3q_s32 (0); - } - --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c -@@ -15,6 +15,6 @@ - out_int8x16x3_t = vld3q_s8 (0); - } - --/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c -@@ -15,6 +15,6 @@ - out_uint16x8x3_t = vld3q_u16 (0); - } - --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c -@@ -15,6 +15,6 @@ - out_uint32x4x3_t = vld3q_u32 (0); - } - --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c -@@ -15,6 +15,6 @@ - out_uint8x16x3_t = vld3q_u8 (0); - } - --/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c -@@ -15,5 +15,5 @@ - out_float32x2x3_t = vld3_dup_f32 (0); - } - --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c -@@ -15,5 +15,5 @@ - out_poly16x4x3_t = vld3_dup_p16 (0); - } - --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c -@@ -15,5 +15,5 @@ - out_poly8x8x3_t = vld3_dup_p8 (0); - } - --/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c -@@ -15,5 +15,5 @@ - out_int16x4x3_t = vld3_dup_s16 (0); - } - --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c -@@ -15,5 +15,5 @@ - out_int32x2x3_t = vld3_dup_s32 (0); - } - --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c -@@ -15,5 +15,5 @@ - out_int64x1x3_t = vld3_dup_s64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c -@@ -15,5 +15,5 @@ - out_int8x8x3_t = vld3_dup_s8 (0); - } - --/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c -@@ -15,5 +15,5 @@ - out_uint16x4x3_t = vld3_dup_u16 (0); - } - --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c -@@ -15,5 +15,5 @@ - out_uint32x2x3_t = vld3_dup_u32 (0); - } - --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c -@@ -15,5 +15,5 @@ - out_uint64x1x3_t = vld3_dup_u64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c -@@ -15,5 +15,5 @@ - out_uint8x8x3_t = vld3_dup_u8 (0); - } - --/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c -@@ -16,5 +16,5 @@ - out_float32x2x3_t = vld3_lane_f32 (0, arg1_float32x2x3_t, 1); - } - --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c -@@ -16,5 +16,5 @@ - out_poly16x4x3_t = vld3_lane_p16 (0, arg1_poly16x4x3_t, 1); - } - --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c -@@ -16,5 +16,5 @@ - out_poly8x8x3_t = vld3_lane_p8 (0, arg1_poly8x8x3_t, 1); - } - --/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c -@@ -16,5 +16,5 @@ - out_int16x4x3_t = vld3_lane_s16 (0, arg1_int16x4x3_t, 1); - } - --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c -@@ -16,5 +16,5 @@ - out_int32x2x3_t = vld3_lane_s32 (0, arg1_int32x2x3_t, 1); - } - --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c -@@ -16,5 +16,5 @@ - out_int8x8x3_t = vld3_lane_s8 (0, arg1_int8x8x3_t, 1); - } - --/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c -@@ -16,5 +16,5 @@ - out_uint16x4x3_t = vld3_lane_u16 (0, arg1_uint16x4x3_t, 1); - } - --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c -@@ -16,5 +16,5 @@ - out_uint32x2x3_t = vld3_lane_u32 (0, arg1_uint32x2x3_t, 1); - } - --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c -@@ -16,5 +16,5 @@ - out_uint8x8x3_t = vld3_lane_u8 (0, arg1_uint8x8x3_t, 1); - } - --/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3f32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3f32.c -@@ -15,5 +15,5 @@ - out_float32x2x3_t = vld3_f32 (0); - } - --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3p16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3p16.c -@@ -15,5 +15,5 @@ - out_poly16x4x3_t = vld3_p16 (0); - } - --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3p8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3p8.c -@@ -15,5 +15,5 @@ - out_poly8x8x3_t = vld3_p8 (0); - } - --/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3s16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3s16.c -@@ -15,5 +15,5 @@ - out_int16x4x3_t = vld3_s16 (0); - } - --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3s32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3s32.c -@@ -15,5 +15,5 @@ - out_int32x2x3_t = vld3_s32 (0); - } - --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3s64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3s64.c -@@ -15,5 +15,5 @@ - out_int64x1x3_t = vld3_s64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3s8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3s8.c -@@ -15,5 +15,5 @@ - out_int8x8x3_t = vld3_s8 (0); - } - --/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3u16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3u16.c -@@ -15,5 +15,5 @@ - out_uint16x4x3_t = vld3_u16 (0); - } - --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3u32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3u32.c -@@ -15,5 +15,5 @@ - out_uint32x2x3_t = vld3_u32 (0); - } - --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3u64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3u64.c -@@ -15,5 +15,5 @@ - out_uint64x1x3_t = vld3_u64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3u8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3u8.c -@@ -15,5 +15,5 @@ - out_uint8x8x3_t = vld3_u8 (0); - } - --/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c -@@ -16,5 +16,5 @@ - out_float32x4x4_t = vld4q_lane_f32 (0, arg1_float32x4x4_t, 1); - } - --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c -@@ -16,5 +16,5 @@ - out_poly16x8x4_t = vld4q_lane_p16 (0, arg1_poly16x8x4_t, 1); - } - --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c -@@ -16,5 +16,5 @@ - out_int16x8x4_t = vld4q_lane_s16 (0, arg1_int16x8x4_t, 1); - } - --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c -@@ -16,5 +16,5 @@ - out_int32x4x4_t = vld4q_lane_s32 (0, arg1_int32x4x4_t, 1); - } - --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c -@@ -16,5 +16,5 @@ - out_uint16x8x4_t = vld4q_lane_u16 (0, arg1_uint16x8x4_t, 1); - } - --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c -@@ -16,5 +16,5 @@ - out_uint32x4x4_t = vld4q_lane_u32 (0, arg1_uint32x4x4_t, 1); - } - --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c -@@ -15,6 +15,6 @@ - out_float32x4x4_t = vld4q_f32 (0); - } - --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c -@@ -15,6 +15,6 @@ - out_poly16x8x4_t = vld4q_p16 (0); - } - --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c -@@ -15,6 +15,6 @@ - out_poly8x16x4_t = vld4q_p8 (0); - } - --/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c -@@ -15,6 +15,6 @@ - out_int16x8x4_t = vld4q_s16 (0); - } - --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c -@@ -15,6 +15,6 @@ - out_int32x4x4_t = vld4q_s32 (0); - } - --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c -@@ -15,6 +15,6 @@ - out_int8x16x4_t = vld4q_s8 (0); - } - --/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c -@@ -15,6 +15,6 @@ - out_uint16x8x4_t = vld4q_u16 (0); - } - --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c -@@ -15,6 +15,6 @@ - out_uint32x4x4_t = vld4q_u32 (0); - } - --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c -@@ -15,6 +15,6 @@ - out_uint8x16x4_t = vld4q_u8 (0); - } - --/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c -@@ -15,5 +15,5 @@ - out_float32x2x4_t = vld4_dup_f32 (0); - } - --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c -@@ -15,5 +15,5 @@ - out_poly16x4x4_t = vld4_dup_p16 (0); - } - --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c -@@ -15,5 +15,5 @@ - out_poly8x8x4_t = vld4_dup_p8 (0); - } - --/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c -@@ -15,5 +15,5 @@ - out_int16x4x4_t = vld4_dup_s16 (0); - } - --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c -@@ -15,5 +15,5 @@ - out_int32x2x4_t = vld4_dup_s32 (0); - } - --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c -@@ -15,5 +15,5 @@ - out_int64x1x4_t = vld4_dup_s64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c -@@ -15,5 +15,5 @@ - out_int8x8x4_t = vld4_dup_s8 (0); - } - --/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c -@@ -15,5 +15,5 @@ - out_uint16x4x4_t = vld4_dup_u16 (0); - } - --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c -@@ -15,5 +15,5 @@ - out_uint32x2x4_t = vld4_dup_u32 (0); - } - --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c -@@ -15,5 +15,5 @@ - out_uint64x1x4_t = vld4_dup_u64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c -@@ -15,5 +15,5 @@ - out_uint8x8x4_t = vld4_dup_u8 (0); - } - --/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c -@@ -16,5 +16,5 @@ - out_float32x2x4_t = vld4_lane_f32 (0, arg1_float32x2x4_t, 1); - } - --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c -@@ -16,5 +16,5 @@ - out_poly16x4x4_t = vld4_lane_p16 (0, arg1_poly16x4x4_t, 1); - } - --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c -@@ -16,5 +16,5 @@ - out_poly8x8x4_t = vld4_lane_p8 (0, arg1_poly8x8x4_t, 1); - } - --/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c -@@ -16,5 +16,5 @@ - out_int16x4x4_t = vld4_lane_s16 (0, arg1_int16x4x4_t, 1); - } - --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c -@@ -16,5 +16,5 @@ - out_int32x2x4_t = vld4_lane_s32 (0, arg1_int32x2x4_t, 1); - } - --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c -@@ -16,5 +16,5 @@ - out_int8x8x4_t = vld4_lane_s8 (0, arg1_int8x8x4_t, 1); - } - --/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c -@@ -16,5 +16,5 @@ - out_uint16x4x4_t = vld4_lane_u16 (0, arg1_uint16x4x4_t, 1); - } - --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c -@@ -16,5 +16,5 @@ - out_uint32x2x4_t = vld4_lane_u32 (0, arg1_uint32x2x4_t, 1); - } - --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c -@@ -16,5 +16,5 @@ - out_uint8x8x4_t = vld4_lane_u8 (0, arg1_uint8x8x4_t, 1); - } - --/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4f32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4f32.c -@@ -15,5 +15,5 @@ - out_float32x2x4_t = vld4_f32 (0); - } - --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4p16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4p16.c -@@ -15,5 +15,5 @@ - out_poly16x4x4_t = vld4_p16 (0); - } - --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4p8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4p8.c -@@ -15,5 +15,5 @@ - out_poly8x8x4_t = vld4_p8 (0); - } - --/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4s16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4s16.c -@@ -15,5 +15,5 @@ - out_int16x4x4_t = vld4_s16 (0); - } - --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4s32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4s32.c -@@ -15,5 +15,5 @@ - out_int32x2x4_t = vld4_s32 (0); - } - --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4s64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4s64.c -@@ -15,5 +15,5 @@ - out_int64x1x4_t = vld4_s64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4s8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4s8.c -@@ -15,5 +15,5 @@ - out_int8x8x4_t = vld4_s8 (0); - } - --/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4u16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4u16.c -@@ -15,5 +15,5 @@ - out_uint16x4x4_t = vld4_u16 (0); - } - --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4u32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4u32.c -@@ -15,5 +15,5 @@ - out_uint32x2x4_t = vld4_u32 (0); - } - --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4u64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4u64.c -@@ -15,5 +15,5 @@ - out_uint64x1x4_t = vld4_u64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4u8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4u8.c -@@ -15,5 +15,5 @@ - out_uint8x8x4_t = vld4_u8 (0); - } - --/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c -@@ -16,5 +16,5 @@ - vst1q_lane_f32 (arg0_float32_t, arg1_float32x4_t, 1); - } - --/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c -@@ -16,5 +16,5 @@ - vst1q_lane_p16 (arg0_poly16_t, arg1_poly16x8_t, 1); - } - --/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c -@@ -16,5 +16,5 @@ - vst1q_lane_p8 (arg0_poly8_t, arg1_poly8x16_t, 1); - } - --/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c -@@ -16,5 +16,5 @@ - vst1q_lane_s16 (arg0_int16_t, arg1_int16x8_t, 1); - } - --/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c -@@ -16,5 +16,5 @@ - vst1q_lane_s32 (arg0_int32_t, arg1_int32x4_t, 1); - } - --/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c -@@ -16,5 +16,5 @@ - vst1q_lane_s64 (arg0_int64_t, arg1_int64x2_t, 1); - } - --/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c -@@ -16,5 +16,5 @@ - vst1q_lane_s8 (arg0_int8_t, arg1_int8x16_t, 1); - } - --/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c -@@ -16,5 +16,5 @@ - vst1q_lane_u16 (arg0_uint16_t, arg1_uint16x8_t, 1); - } - --/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c -@@ -16,5 +16,5 @@ - vst1q_lane_u32 (arg0_uint32_t, arg1_uint32x4_t, 1); - } - --/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c -@@ -16,5 +16,5 @@ - vst1q_lane_u64 (arg0_uint64_t, arg1_uint64x2_t, 1); - } - --/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c -@@ -16,5 +16,5 @@ - vst1q_lane_u8 (arg0_uint8_t, arg1_uint8x16_t, 1); - } - --/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c -@@ -16,5 +16,5 @@ - vst1q_f32 (arg0_float32_t, arg1_float32x4_t); - } - --/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c -@@ -16,5 +16,5 @@ - vst1q_p16 (arg0_poly16_t, arg1_poly16x8_t); - } - --/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c -@@ -16,5 +16,5 @@ - vst1q_p8 (arg0_poly8_t, arg1_poly8x16_t); - } - --/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c -@@ -16,5 +16,5 @@ - vst1q_s16 (arg0_int16_t, arg1_int16x8_t); - } - --/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c -@@ -16,5 +16,5 @@ - vst1q_s32 (arg0_int32_t, arg1_int32x4_t); - } - --/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c -@@ -16,5 +16,5 @@ - vst1q_s64 (arg0_int64_t, arg1_int64x2_t); - } - --/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c -@@ -16,5 +16,5 @@ - vst1q_s8 (arg0_int8_t, arg1_int8x16_t); - } - --/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c -@@ -16,5 +16,5 @@ - vst1q_u16 (arg0_uint16_t, arg1_uint16x8_t); - } - --/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c -@@ -16,5 +16,5 @@ - vst1q_u32 (arg0_uint32_t, arg1_uint32x4_t); - } - --/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c -@@ -16,5 +16,5 @@ - vst1q_u64 (arg0_uint64_t, arg1_uint64x2_t); - } - --/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c -@@ -16,5 +16,5 @@ - vst1q_u8 (arg0_uint8_t, arg1_uint8x16_t); - } - --/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c -@@ -16,5 +16,5 @@ - vst1_lane_f32 (arg0_float32_t, arg1_float32x2_t, 1); - } - --/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c -@@ -16,5 +16,5 @@ - vst1_lane_p16 (arg0_poly16_t, arg1_poly16x4_t, 1); - } - --/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c -@@ -16,5 +16,5 @@ - vst1_lane_p8 (arg0_poly8_t, arg1_poly8x8_t, 1); - } - --/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c -@@ -16,5 +16,5 @@ - vst1_lane_s16 (arg0_int16_t, arg1_int16x4_t, 1); - } - --/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c -@@ -16,5 +16,5 @@ - vst1_lane_s32 (arg0_int32_t, arg1_int32x2_t, 1); - } - --/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c -@@ -16,5 +16,5 @@ - vst1_lane_s64 (arg0_int64_t, arg1_int64x1_t, 0); - } - --/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c -@@ -16,5 +16,5 @@ - vst1_lane_s8 (arg0_int8_t, arg1_int8x8_t, 1); - } - --/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c -@@ -16,5 +16,5 @@ - vst1_lane_u16 (arg0_uint16_t, arg1_uint16x4_t, 1); - } - --/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c -@@ -16,5 +16,5 @@ - vst1_lane_u32 (arg0_uint32_t, arg1_uint32x2_t, 1); - } - --/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c -@@ -16,5 +16,5 @@ - vst1_lane_u64 (arg0_uint64_t, arg1_uint64x1_t, 0); - } - --/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c -@@ -16,5 +16,5 @@ - vst1_lane_u8 (arg0_uint8_t, arg1_uint8x8_t, 1); - } - --/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1f32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1f32.c -@@ -16,5 +16,5 @@ - vst1_f32 (arg0_float32_t, arg1_float32x2_t); - } - --/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1p16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1p16.c -@@ -16,5 +16,5 @@ - vst1_p16 (arg0_poly16_t, arg1_poly16x4_t); - } - --/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1p8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1p8.c -@@ -16,5 +16,5 @@ - vst1_p8 (arg0_poly8_t, arg1_poly8x8_t); - } - --/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1s16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1s16.c -@@ -16,5 +16,5 @@ - vst1_s16 (arg0_int16_t, arg1_int16x4_t); - } - --/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1s32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1s32.c -@@ -16,5 +16,5 @@ - vst1_s32 (arg0_int32_t, arg1_int32x2_t); - } - --/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1s64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1s64.c -@@ -16,5 +16,5 @@ - vst1_s64 (arg0_int64_t, arg1_int64x1_t); - } - --/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1s8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1s8.c -@@ -16,5 +16,5 @@ - vst1_s8 (arg0_int8_t, arg1_int8x8_t); - } - --/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1u16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1u16.c -@@ -16,5 +16,5 @@ - vst1_u16 (arg0_uint16_t, arg1_uint16x4_t); - } - --/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1u32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1u32.c -@@ -16,5 +16,5 @@ - vst1_u32 (arg0_uint32_t, arg1_uint32x2_t); - } - --/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1u64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1u64.c -@@ -16,5 +16,5 @@ - vst1_u64 (arg0_uint64_t, arg1_uint64x1_t); - } - --/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1u8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1u8.c -@@ -16,5 +16,5 @@ - vst1_u8 (arg0_uint8_t, arg1_uint8x8_t); - } - --/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c -@@ -16,5 +16,5 @@ - vst2q_lane_f32 (arg0_float32_t, arg1_float32x4x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c -@@ -16,5 +16,5 @@ - vst2q_lane_p16 (arg0_poly16_t, arg1_poly16x8x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c -@@ -16,5 +16,5 @@ - vst2q_lane_s16 (arg0_int16_t, arg1_int16x8x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c -@@ -16,5 +16,5 @@ - vst2q_lane_s32 (arg0_int32_t, arg1_int32x4x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c -@@ -16,5 +16,5 @@ - vst2q_lane_u16 (arg0_uint16_t, arg1_uint16x8x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c -@@ -16,5 +16,5 @@ - vst2q_lane_u32 (arg0_uint32_t, arg1_uint32x4x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c -@@ -16,6 +16,6 @@ - vst2q_f32 (arg0_float32_t, arg1_float32x4x2_t); - } - --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c -@@ -16,6 +16,6 @@ - vst2q_p16 (arg0_poly16_t, arg1_poly16x8x2_t); - } - --/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c -@@ -16,6 +16,6 @@ - vst2q_p8 (arg0_poly8_t, arg1_poly8x16x2_t); - } - --/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c -@@ -16,6 +16,6 @@ - vst2q_s16 (arg0_int16_t, arg1_int16x8x2_t); - } - --/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c -@@ -16,6 +16,6 @@ - vst2q_s32 (arg0_int32_t, arg1_int32x4x2_t); - } - --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c -@@ -16,6 +16,6 @@ - vst2q_s8 (arg0_int8_t, arg1_int8x16x2_t); - } - --/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c -@@ -16,6 +16,6 @@ - vst2q_u16 (arg0_uint16_t, arg1_uint16x8x2_t); - } - --/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c -@@ -16,6 +16,6 @@ - vst2q_u32 (arg0_uint32_t, arg1_uint32x4x2_t); - } - --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c -@@ -16,6 +16,6 @@ - vst2q_u8 (arg0_uint8_t, arg1_uint8x16x2_t); - } - --/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c -@@ -16,5 +16,5 @@ - vst2_lane_f32 (arg0_float32_t, arg1_float32x2x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c -@@ -16,5 +16,5 @@ - vst2_lane_p16 (arg0_poly16_t, arg1_poly16x4x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c -@@ -16,5 +16,5 @@ - vst2_lane_p8 (arg0_poly8_t, arg1_poly8x8x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c -@@ -16,5 +16,5 @@ - vst2_lane_s16 (arg0_int16_t, arg1_int16x4x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c -@@ -16,5 +16,5 @@ - vst2_lane_s32 (arg0_int32_t, arg1_int32x2x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c -@@ -16,5 +16,5 @@ - vst2_lane_s8 (arg0_int8_t, arg1_int8x8x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c -@@ -16,5 +16,5 @@ - vst2_lane_u16 (arg0_uint16_t, arg1_uint16x4x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c -@@ -16,5 +16,5 @@ - vst2_lane_u32 (arg0_uint32_t, arg1_uint32x2x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c -@@ -16,5 +16,5 @@ - vst2_lane_u8 (arg0_uint8_t, arg1_uint8x8x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2f32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2f32.c -@@ -16,5 +16,5 @@ - vst2_f32 (arg0_float32_t, arg1_float32x2x2_t); - } - --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2p16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2p16.c -@@ -16,5 +16,5 @@ - vst2_p16 (arg0_poly16_t, arg1_poly16x4x2_t); - } - --/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2p8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2p8.c -@@ -16,5 +16,5 @@ - vst2_p8 (arg0_poly8_t, arg1_poly8x8x2_t); - } - --/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2s16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2s16.c -@@ -16,5 +16,5 @@ - vst2_s16 (arg0_int16_t, arg1_int16x4x2_t); - } - --/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2s32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2s32.c -@@ -16,5 +16,5 @@ - vst2_s32 (arg0_int32_t, arg1_int32x2x2_t); - } - --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2s64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2s64.c -@@ -16,5 +16,5 @@ - vst2_s64 (arg0_int64_t, arg1_int64x1x2_t); - } - --/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2s8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2s8.c -@@ -16,5 +16,5 @@ - vst2_s8 (arg0_int8_t, arg1_int8x8x2_t); - } - --/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2u16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2u16.c -@@ -16,5 +16,5 @@ - vst2_u16 (arg0_uint16_t, arg1_uint16x4x2_t); - } - --/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2u32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2u32.c -@@ -16,5 +16,5 @@ - vst2_u32 (arg0_uint32_t, arg1_uint32x2x2_t); - } - --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2u64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2u64.c -@@ -16,5 +16,5 @@ - vst2_u64 (arg0_uint64_t, arg1_uint64x1x2_t); - } - --/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2u8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2u8.c -@@ -16,5 +16,5 @@ - vst2_u8 (arg0_uint8_t, arg1_uint8x8x2_t); - } - --/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c -@@ -16,5 +16,5 @@ - vst3q_lane_f32 (arg0_float32_t, arg1_float32x4x3_t, 1); - } - --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c -@@ -16,5 +16,5 @@ - vst3q_lane_p16 (arg0_poly16_t, arg1_poly16x8x3_t, 1); - } - --/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c -@@ -16,5 +16,5 @@ - vst3q_lane_s16 (arg0_int16_t, arg1_int16x8x3_t, 1); - } - --/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c -@@ -16,5 +16,5 @@ - vst3q_lane_s32 (arg0_int32_t, arg1_int32x4x3_t, 1); - } - --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c -@@ -16,5 +16,5 @@ - vst3q_lane_u16 (arg0_uint16_t, arg1_uint16x8x3_t, 1); - } - --/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c -@@ -16,5 +16,5 @@ - vst3q_lane_u32 (arg0_uint32_t, arg1_uint32x4x3_t, 1); - } - --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c -@@ -16,6 +16,6 @@ - vst3q_f32 (arg0_float32_t, arg1_float32x4x3_t); - } - --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c -@@ -16,6 +16,6 @@ - vst3q_p16 (arg0_poly16_t, arg1_poly16x8x3_t); - } - --/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c -@@ -16,6 +16,6 @@ - vst3q_p8 (arg0_poly8_t, arg1_poly8x16x3_t); - } - --/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c -@@ -16,6 +16,6 @@ - vst3q_s16 (arg0_int16_t, arg1_int16x8x3_t); - } - --/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c -@@ -16,6 +16,6 @@ - vst3q_s32 (arg0_int32_t, arg1_int32x4x3_t); - } - --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c -@@ -16,6 +16,6 @@ - vst3q_s8 (arg0_int8_t, arg1_int8x16x3_t); - } - --/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c -@@ -16,6 +16,6 @@ - vst3q_u16 (arg0_uint16_t, arg1_uint16x8x3_t); - } - --/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c -@@ -16,6 +16,6 @@ - vst3q_u32 (arg0_uint32_t, arg1_uint32x4x3_t); - } - --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c -@@ -16,6 +16,6 @@ - vst3q_u8 (arg0_uint8_t, arg1_uint8x16x3_t); - } - --/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c -@@ -16,5 +16,5 @@ - vst3_lane_f32 (arg0_float32_t, arg1_float32x2x3_t, 1); - } - --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c -@@ -16,5 +16,5 @@ - vst3_lane_p16 (arg0_poly16_t, arg1_poly16x4x3_t, 1); - } - --/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c -@@ -16,5 +16,5 @@ - vst3_lane_p8 (arg0_poly8_t, arg1_poly8x8x3_t, 1); - } - --/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c -@@ -16,5 +16,5 @@ - vst3_lane_s16 (arg0_int16_t, arg1_int16x4x3_t, 1); - } - --/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c -@@ -16,5 +16,5 @@ - vst3_lane_s32 (arg0_int32_t, arg1_int32x2x3_t, 1); - } - --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c -@@ -16,5 +16,5 @@ - vst3_lane_s8 (arg0_int8_t, arg1_int8x8x3_t, 1); - } - --/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c -@@ -16,5 +16,5 @@ - vst3_lane_u16 (arg0_uint16_t, arg1_uint16x4x3_t, 1); - } - --/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c -@@ -16,5 +16,5 @@ - vst3_lane_u32 (arg0_uint32_t, arg1_uint32x2x3_t, 1); - } - --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c -@@ -16,5 +16,5 @@ - vst3_lane_u8 (arg0_uint8_t, arg1_uint8x8x3_t, 1); - } - --/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3f32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3f32.c -@@ -16,5 +16,5 @@ - vst3_f32 (arg0_float32_t, arg1_float32x2x3_t); - } - --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3p16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3p16.c -@@ -16,5 +16,5 @@ - vst3_p16 (arg0_poly16_t, arg1_poly16x4x3_t); - } - --/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3p8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3p8.c -@@ -16,5 +16,5 @@ - vst3_p8 (arg0_poly8_t, arg1_poly8x8x3_t); - } - --/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3s16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3s16.c -@@ -16,5 +16,5 @@ - vst3_s16 (arg0_int16_t, arg1_int16x4x3_t); - } - --/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3s32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3s32.c -@@ -16,5 +16,5 @@ - vst3_s32 (arg0_int32_t, arg1_int32x2x3_t); - } - --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3s64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3s64.c -@@ -16,5 +16,5 @@ - vst3_s64 (arg0_int64_t, arg1_int64x1x3_t); - } - --/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3s8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3s8.c -@@ -16,5 +16,5 @@ - vst3_s8 (arg0_int8_t, arg1_int8x8x3_t); - } - --/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3u16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3u16.c -@@ -16,5 +16,5 @@ - vst3_u16 (arg0_uint16_t, arg1_uint16x4x3_t); - } - --/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3u32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3u32.c -@@ -16,5 +16,5 @@ - vst3_u32 (arg0_uint32_t, arg1_uint32x2x3_t); - } - --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3u64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3u64.c -@@ -16,5 +16,5 @@ - vst3_u64 (arg0_uint64_t, arg1_uint64x1x3_t); - } - --/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3u8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3u8.c -@@ -16,5 +16,5 @@ - vst3_u8 (arg0_uint8_t, arg1_uint8x8x3_t); - } - --/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c -@@ -16,5 +16,5 @@ - vst4q_lane_f32 (arg0_float32_t, arg1_float32x4x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c -@@ -16,5 +16,5 @@ - vst4q_lane_p16 (arg0_poly16_t, arg1_poly16x8x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c -@@ -16,5 +16,5 @@ - vst4q_lane_s16 (arg0_int16_t, arg1_int16x8x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c -@@ -16,5 +16,5 @@ - vst4q_lane_s32 (arg0_int32_t, arg1_int32x4x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c -@@ -16,5 +16,5 @@ - vst4q_lane_u16 (arg0_uint16_t, arg1_uint16x8x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c -@@ -16,5 +16,5 @@ - vst4q_lane_u32 (arg0_uint32_t, arg1_uint32x4x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c -@@ -16,6 +16,6 @@ - vst4q_f32 (arg0_float32_t, arg1_float32x4x4_t); - } - --/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c -@@ -16,6 +16,6 @@ - vst4q_p16 (arg0_poly16_t, arg1_poly16x8x4_t); - } - --/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c -@@ -16,6 +16,6 @@ - vst4q_p8 (arg0_poly8_t, arg1_poly8x16x4_t); - } - --/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c -@@ -16,6 +16,6 @@ - vst4q_s16 (arg0_int16_t, arg1_int16x8x4_t); - } - --/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c -@@ -16,6 +16,6 @@ - vst4q_s32 (arg0_int32_t, arg1_int32x4x4_t); - } - --/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c -@@ -16,6 +16,6 @@ - vst4q_s8 (arg0_int8_t, arg1_int8x16x4_t); - } - --/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c -@@ -16,6 +16,6 @@ - vst4q_u16 (arg0_uint16_t, arg1_uint16x8x4_t); - } - --/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c -@@ -16,6 +16,6 @@ - vst4q_u32 (arg0_uint32_t, arg1_uint32x4x4_t); - } - --/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c -@@ -16,6 +16,6 @@ - vst4q_u8 (arg0_uint8_t, arg1_uint8x16x4_t); - } - --/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c -@@ -16,5 +16,5 @@ - vst4_lane_f32 (arg0_float32_t, arg1_float32x2x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c -@@ -16,5 +16,5 @@ - vst4_lane_p16 (arg0_poly16_t, arg1_poly16x4x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c -@@ -16,5 +16,5 @@ - vst4_lane_p8 (arg0_poly8_t, arg1_poly8x8x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c -@@ -16,5 +16,5 @@ - vst4_lane_s16 (arg0_int16_t, arg1_int16x4x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c -@@ -16,5 +16,5 @@ - vst4_lane_s32 (arg0_int32_t, arg1_int32x2x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c -@@ -16,5 +16,5 @@ - vst4_lane_s8 (arg0_int8_t, arg1_int8x8x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c -@@ -16,5 +16,5 @@ - vst4_lane_u16 (arg0_uint16_t, arg1_uint16x4x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c -@@ -16,5 +16,5 @@ - vst4_lane_u32 (arg0_uint32_t, arg1_uint32x2x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c -@@ -16,5 +16,5 @@ - vst4_lane_u8 (arg0_uint8_t, arg1_uint8x8x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4f32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4f32.c -@@ -16,5 +16,5 @@ - vst4_f32 (arg0_float32_t, arg1_float32x2x4_t); - } - --/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4p16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4p16.c -@@ -16,5 +16,5 @@ - vst4_p16 (arg0_poly16_t, arg1_poly16x4x4_t); - } - --/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4p8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4p8.c -@@ -16,5 +16,5 @@ - vst4_p8 (arg0_poly8_t, arg1_poly8x8x4_t); - } - --/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4s16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4s16.c -@@ -16,5 +16,5 @@ - vst4_s16 (arg0_int16_t, arg1_int16x4x4_t); - } - --/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4s32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4s32.c -@@ -16,5 +16,5 @@ - vst4_s32 (arg0_int32_t, arg1_int32x2x4_t); - } - --/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4s64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4s64.c -@@ -16,5 +16,5 @@ - vst4_s64 (arg0_int64_t, arg1_int64x1x4_t); - } - --/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4s8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4s8.c -@@ -16,5 +16,5 @@ - vst4_s8 (arg0_int8_t, arg1_int8x8x4_t); - } - --/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4u16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4u16.c -@@ -16,5 +16,5 @@ - vst4_u16 (arg0_uint16_t, arg1_uint16x4x4_t); - } - --/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4u32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4u32.c -@@ -16,5 +16,5 @@ - vst4_u32 (arg0_uint32_t, arg1_uint32x2x4_t); - } - --/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4u64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4u64.c -@@ -16,5 +16,5 @@ - vst4_u64 (arg0_uint64_t, arg1_uint64x1x4_t); - } - --/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4u8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4u8.c -@@ -16,5 +16,5 @@ - vst4_u8 (arg0_uint8_t, arg1_uint8x8x4_t); - } - --/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon-combine-sub-abs-into-vabd.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon-combine-sub-abs-into-vabd.c -@@ -0,0 +1,50 @@ -+/* { dg-do compile } */ -+/* { dg-require-effective-target arm_neon_ok } */ -+/* { dg-options "-O2 -funsafe-math-optimizations" } */ -+/* { dg-add-options arm_neon } */ -+ -+#include <arm_neon.h> -+float32x2_t f_sub_abs_to_vabd_32() -+{ -+ float32x2_t val1 = vdup_n_f32 (10); -+ float32x2_t val2 = vdup_n_f32 (30); -+ float32x2_t sres = vsub_f32(val1, val2); -+ float32x2_t res = vabs_f32 (sres); -+ -+ return res; -+} -+/* { dg-final { scan-assembler "vabd\.f32" } }*/ -+ -+#include <arm_neon.h> -+int8x8_t sub_abs_to_vabd_8() -+{ -+ int8x8_t val1 = vdup_n_s8 (10); -+ int8x8_t val2 = vdup_n_s8 (30); -+ int8x8_t sres = vsub_s8(val1, val2); -+ int8x8_t res = vabs_s8 (sres); -+ -+ return res; -+} -+/* { dg-final { scan-assembler "vabd\.s8" } }*/ -+ -+int16x4_t sub_abs_to_vabd_16() -+{ -+ int16x4_t val1 = vdup_n_s16 (10); -+ int16x4_t val2 = vdup_n_s16 (30); -+ int16x4_t sres = vsub_s16(val1, val2); -+ int16x4_t res = vabs_s16 (sres); -+ -+ return res; -+} -+/* { dg-final { scan-assembler "vabd\.s16" } }*/ -+ -+int32x2_t sub_abs_to_vabd_32() -+{ -+ int32x2_t val1 = vdup_n_s32 (10); -+ int32x2_t val2 = vdup_n_s32 (30); -+ int32x2_t sres = vsub_s32(val1, val2); -+ int32x2_t res = vabs_s32 (sres); -+ -+ return res; -+} -+/* { dg-final { scan-assembler "vabd\.s32" } }*/ ---- a/src/gcc/testsuite/gcc.target/arm/neon-modes-2.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon-modes-2.c -@@ -0,0 +1,24 @@ -+/* { dg-do compile } */ -+/* { dg-require-effective-target arm_neon_ok } */ -+/* { dg-options "-O1" } */ -+/* { dg-add-options arm_neon } */ -+ -+#include "arm_neon.h" -+ -+#define SETUP(A) x##A = vld3_u32 (ptr + A * 0x20) -+#define MODIFY(A) x##A = vld3_lane_u32 (ptr + A * 0x20 + 0x10, x##A, 1) -+#define STORE(A) vst3_u32 (ptr + A * 0x20, x##A) -+ -+#define MANY(A) A (0), A (1), A (2), A (3), A (4), A (5) -+ -+void -+bar (uint32_t *ptr, int y) -+{ -+ uint32x2x3_t MANY (SETUP); -+ int *x = __builtin_alloca (y); -+ int z[0x1000]; -+ foo (x, z); -+ MANY (MODIFY); -+ foo (x, z); -+ MANY (STORE); -+} ---- a/src/gcc/testsuite/gcc.target/arm/neon-modes-3.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon-modes-3.c -@@ -0,0 +1,61 @@ -+/* { dg-do compile } */ -+/* { dg-require-effective-target arm_neon_ok } */ -+/* { dg-options "-O" } */ -+/* { dg-add-options arm_neon } */ -+ -+#include <arm_neon.h> -+ -+void f1 (volatile float32x4_t *dest, volatile float32x4x4_t *src, int n) -+{ -+ float32x4x4_t a5, a6, a7, a8, a9; -+ int i; -+ -+ a5 = *src; -+ a6 = *src; -+ a7 = *src; -+ a8 = *src; -+ a9 = *src; -+ while (n--) -+ { -+ for (i = 0; i < 8; i++) -+ { -+ float32x4x4_t a0, a1, a2, a3, a4; -+ -+ a0 = *src; -+ a1 = *src; -+ a2 = *src; -+ a3 = *src; -+ a4 = *src; -+ *src = a0; -+ *dest = a0.val[0]; -+ *dest = a0.val[3]; -+ *src = a1; -+ *dest = a1.val[0]; -+ *dest = a1.val[3]; -+ *src = a2; -+ *dest = a2.val[0]; -+ *dest = a2.val[3]; -+ *src = a3; -+ *dest = a3.val[0]; -+ *dest = a3.val[3]; -+ *src = a4; -+ *dest = a4.val[0]; -+ *dest = a4.val[3]; -+ } -+ *src = a5; -+ *dest = a5.val[0]; -+ *dest = a5.val[3]; -+ *src = a6; -+ *dest = a6.val[0]; -+ *dest = a6.val[3]; -+ *src = a7; -+ *dest = a7.val[0]; -+ *dest = a7.val[3]; -+ *src = a8; -+ *dest = a8.val[0]; -+ *dest = a8.val[3]; -+ *src = a9; -+ *dest = a9.val[0]; -+ *dest = a9.val[3]; -+ } -+} ---- a/src/gcc/testsuite/gcc.target/arm/neon-vld3-1.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon-vld3-1.c -@@ -0,0 +1,27 @@ -+/* { dg-do run } */ -+/* { dg-require-effective-target arm_neon_hw } */ -+/* { dg-options "-O2" } */ -+/* { dg-add-options arm_neon } */ -+ -+#include "arm_neon.h" -+ -+uint32_t buffer[12]; -+ -+void __attribute__((noinline)) -+foo (uint32_t *a) -+{ -+ uint32x4x3_t x; -+ -+ x = vld3q_u32 (a); -+ x.val[0] = vaddq_u32 (x.val[0], x.val[1]); -+ vst3q_u32 (a, x); -+} -+ -+int -+main (void) -+{ -+ buffer[0] = 1; -+ buffer[1] = 2; -+ foo (buffer); -+ return buffer[0] != 3; -+} ---- a/src/gcc/testsuite/gcc.target/arm/neon-vlshr-imm-1.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon-vlshr-imm-1.c -@@ -0,0 +1,11 @@ -+/* { dg-do compile } */ -+/* { dg-require-effective-target arm_neon_ok } */ -+/* { dg-options "-O2 -mfpu=neon -mfloat-abi=softfp -ftree-vectorize" } */ -+/* { dg-final { scan-assembler "vshr\.u32.*#3" } } */ -+ -+/* Verify that VSHR immediate is used. */ -+void f1(int n, unsigned int x[], unsigned int y[]) { -+ int i; -+ for (i = 0; i < n; ++i) -+ y[i] = x[i] >> 3; -+} ---- a/src/gcc/testsuite/gcc.target/arm/neon-vorn-vbic.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon-vorn-vbic.c -@@ -0,0 +1,20 @@ -+/* { dg-do compile } */ -+/* { dg-require-effective-target arm_neon_ok } */ -+/* { dg-options "-O2 -ftree-vectorize" } */ -+/* { dg-add-options arm_neon } */ -+ -+void bor (int *__restrict__ c, int *__restrict__ a, int *__restrict__ b) -+{ -+ int i; -+ for (i = 0; i < 9; i++) -+ c[i] = b[i] | (~a[i]); -+} -+void bic (int *__restrict__ c, int *__restrict__ a, int *__restrict__ b) -+{ -+ int i; -+ for (i = 0; i < 9; i++) -+ c[i] = b[i] & (~a[i]); -+} -+ -+/* { dg-final { scan-assembler "vorn\\t" } } */ -+/* { dg-final { scan-assembler "vbic\\t" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon-vshl-imm-1.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon-vshl-imm-1.c -@@ -0,0 +1,11 @@ -+/* { dg-do compile } */ -+/* { dg-require-effective-target arm_neon_ok } */ -+/* { dg-options "-O2 -mfpu=neon -mfloat-abi=softfp -ftree-vectorize" } */ -+/* { dg-final { scan-assembler "vshl\.i32.*#3" } } */ -+ -+/* Verify that VSHR immediate is used. */ -+void f1(int n, int x[], int y[]) { -+ int i; -+ for (i = 0; i < n; ++i) -+ y[i] = x[i] << 3; -+} ---- a/src/gcc/testsuite/gcc.target/arm/neon-vshr-imm-1.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon-vshr-imm-1.c -@@ -0,0 +1,11 @@ -+/* { dg-do compile } */ -+/* { dg-require-effective-target arm_neon_ok } */ -+/* { dg-options "-O2 -mfpu=neon -mfloat-abi=softfp -ftree-vectorize" } */ -+/* { dg-final { scan-assembler "vshr\.s32.*#3" } } */ -+ -+/* Verify that VSHR immediate is used. */ -+void f1(int n, int x[], int y[]) { -+ int i; -+ for (i = 0; i < n; ++i) -+ y[i] = x[i] >> 3; -+} ---- a/src/gcc/testsuite/gcc.target/arm/neon-vst3-1.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon-vst3-1.c -@@ -0,0 +1,25 @@ -+/* { dg-do run } */ -+/* { dg-require-effective-target arm_neon_hw } */ -+/* { dg-options "-O2" } */ -+/* { dg-add-options arm_neon } */ -+ -+#include "arm_neon.h" -+ -+uint32_t buffer[64]; -+ -+void __attribute__((noinline)) -+foo (uint32_t *a) -+{ -+ uint32x4x3_t x; -+ -+ x = vld3q_u32 (a); -+ a[35] = 1; -+ vst3q_lane_u32 (a + 32, x, 1); -+} -+ -+int -+main (void) -+{ -+ foo (buffer); -+ return buffer[35] != 1; -+} ---- a/src/gcc/testsuite/gcc.target/arm/no-wmla-1.c -+++ b/src/gcc/testsuite/gcc.target/arm/no-wmla-1.c -@@ -0,0 +1,11 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2 -march=armv7-a" } */ -+ -+int -+foo (int a, short b, short c) -+{ -+ int bc = b * c; -+ return a + (short)bc; -+} -+ -+/* { dg-final { scan-assembler "mul" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/pr46329.c -+++ b/src/gcc/testsuite/gcc.target/arm/pr46329.c -@@ -0,0 +1,9 @@ -+/* { dg-options "-O2" } */ -+/* { dg-add-options arm_neon } */ -+ -+int __attribute__ ((vector_size (32))) x; -+void -+foo (void) -+{ -+ x <<= x; -+} ---- a/src/gcc/testsuite/gcc.target/arm/pr48183.c -+++ b/src/gcc/testsuite/gcc.target/arm/pr48183.c -@@ -0,0 +1,25 @@ -+/* testsuite/gcc.target/arm/pr48183.c */ -+ -+/* { dg-do compile } */ -+/* { dg-require-effective-target arm_neon_ok } */ -+/* { dg-options "-O -g" } */ -+/* { dg-add-options arm_neon } */ -+ -+#include <arm_neon.h> -+ -+void move_16bit_to_32bit (int32_t *dst, const short *src, unsigned n) -+{ -+ unsigned i; -+ int16x4x2_t input; -+ int32x4x2_t mid; -+ int32x4x2_t output; -+ -+ for (i = 0; i < n/2; i += 8) { -+ input = vld2_s16(src + i); -+ mid.val[0] = vmovl_s16(input.val[0]); -+ mid.val[1] = vmovl_s16(input.val[1]); -+ output.val[0] = vshlq_n_s32(mid.val[0], 8); -+ output.val[1] = vshlq_n_s32(mid.val[1], 8); -+ vst2q_s32((int32_t *)dst + i, output); -+ } -+} ---- a/src/gcc/testsuite/gcc.target/arm/pr49641.c -+++ b/src/gcc/testsuite/gcc.target/arm/pr49641.c -@@ -0,0 +1,18 @@ -+/* { dg-do compile } */ -+/* { dg-options "-mthumb -O2" } */ -+/* { dg-require-effective-target arm_thumb1_ok } */ -+/* { dg-final { scan-assembler-not "stmia\[\\t \]*r3!\[^\\n]*r3" } } */ -+typedef struct { -+ void *t1, *t2, *t3; -+} z; -+extern volatile int y; -+static inline void foo(z *x) { -+ x->t1 = &x->t2; -+ x->t2 = ((void *)0); -+ x->t3 = &x->t1; -+} -+extern z v; -+void bar (void) { -+ y = 0; -+ foo(&v); -+} ---- a/src/gcc/testsuite/gcc.target/arm/pr50099.c -+++ b/src/gcc/testsuite/gcc.target/arm/pr50099.c -@@ -0,0 +1,10 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2" } */ -+ -+long long foo (signed char * arg) -+{ -+ long long temp_1; -+ -+ temp_1 = arg[256]; -+ return temp_1; -+} ---- a/src/gcc/testsuite/gcc.target/arm/pr50318-1.c -+++ b/src/gcc/testsuite/gcc.target/arm/pr50318-1.c -@@ -0,0 +1,11 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2" } */ -+/* { dg-require-effective-target arm_dsp } */ -+ -+long long test (unsigned int sec, unsigned long long nsecs) -+{ -+ return (long long)(long)sec * 1000000000L + (long long)(unsigned -+ long)nsecs; -+} -+ -+/* { dg-final { scan-assembler "umlal" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/shiftable.c -+++ b/src/gcc/testsuite/gcc.target/arm/shiftable.c -@@ -0,0 +1,63 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2" } */ -+/* { dg-require-effective-target arm32 } */ -+ -+/* ARM has shift-and-alu insns. Depending on the ALU op GCC represents some -+ of these as a left shift, others as a multiply. Check that we match the -+ right one. */ -+ -+int -+plus (int a, int b) -+{ -+ return (a * 64) + b; -+} -+ -+/* { dg-final { scan-assembler "add.*\[al]sl #6" } } */ -+ -+int -+minus (int a, int b) -+{ -+ return a - (b * 64); -+} -+ -+/* { dg-final { scan-assembler "sub.*\[al]sl #6" } } */ -+ -+int -+ior (int a, int b) -+{ -+ return (a * 64) | b; -+} -+ -+/* { dg-final { scan-assembler "orr.*\[al]sl #6" } } */ -+ -+int -+xor (int a, int b) -+{ -+ return (a * 64) ^ b; -+} -+ -+/* { dg-final { scan-assembler "eor.*\[al]sl #6" } } */ -+ -+int -+and (int a, int b) -+{ -+ return (a * 64) & b; -+} -+ -+/* { dg-final { scan-assembler "and.*\[al]sl #6" } } */ -+ -+int -+rsb (int a, int b) -+{ -+ return (a * 64) - b; -+} -+ -+/* { dg-final { scan-assembler "rsb.*\[al]sl #6" } } */ -+ -+int -+mvn (int a, int b) -+{ -+ return ~(a * 64); -+} -+ -+/* { dg-final { scan-assembler "mvn.*\[al]sl #6" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/smlaltb-1.c -+++ b/src/gcc/testsuite/gcc.target/arm/smlaltb-1.c -@@ -0,0 +1,13 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2 -march=armv7-a" } */ -+ -+long long int -+foo (long long x, int in) -+{ -+ short a = in & 0xffff; -+ short b = (in & 0xffff0000) >> 16; -+ -+ return x + b * a; -+} -+ -+/* { dg-final { scan-assembler "smlaltb" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/smlaltt-1.c -+++ b/src/gcc/testsuite/gcc.target/arm/smlaltt-1.c -@@ -0,0 +1,13 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2 -march=armv7-a" } */ -+ -+long long int -+foo (long long x, int in1, int in2) -+{ -+ short a = (in1 & 0xffff0000) >> 16; -+ short b = (in2 & 0xffff0000) >> 16; -+ -+ return x + b * a; -+} -+ -+/* { dg-final { scan-assembler "smlaltt" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/smlatb-1.c -+++ b/src/gcc/testsuite/gcc.target/arm/smlatb-1.c -@@ -0,0 +1,13 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2 -march=armv7-a" } */ -+ -+int -+foo (int x, int in) -+{ -+ short a = in & 0xffff; -+ short b = (in & 0xffff0000) >> 16; -+ -+ return x + b * a; -+} -+ -+/* { dg-final { scan-assembler "smlatb" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/smlatt-1.c -+++ b/src/gcc/testsuite/gcc.target/arm/smlatt-1.c -@@ -0,0 +1,13 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2 -march=armv7-a" } */ -+ -+int -+foo (int x, int in1, int in2) -+{ -+ short a = (in1 & 0xffff0000) >> 16; -+ short b = (in2 & 0xffff0000) >> 16; -+ -+ return x + b * a; -+} -+ -+/* { dg-final { scan-assembler "smlatt" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c -+++ b/src/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c -@@ -0,0 +1,13 @@ -+/* Use conditional compare */ -+/* { dg-options "-O2" } */ -+/* { dg-skip-if "" { arm_thumb1_ok } } */ -+/* { dg-final { scan-assembler "cmpne" } } */ -+ -+int f(int i, int j) -+{ -+ if ( (i == '+') || (j == '-') ) { -+ return 1; -+ } else { -+ return 0; -+ } -+} ---- a/src/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c -+++ b/src/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c -@@ -0,0 +1,13 @@ -+/* Use conditional compare */ -+/* { dg-options "-O2" } */ -+/* { dg-skip-if "" { arm_thumb1_ok } } */ -+/* { dg-final { scan-assembler "cmpeq" } } */ -+ -+int f(int i, int j) -+{ -+ if ( (i == '+') && (j == '-') ) { -+ return 1; -+ } else { -+ return 0; -+ } -+} ---- a/src/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c -+++ b/src/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c -@@ -0,0 +1,12 @@ -+/* Use conditional compare */ -+/* { dg-options "-O2" } */ -+/* { dg-skip-if "" { arm_thumb1_ok } } */ -+/* { dg-final { scan-assembler "cmpgt" } } */ -+ -+int f(int i, int j) -+{ -+ if ( (i >= '+') ? (j > '-') : 0) -+ return 1; -+ else -+ return 0; -+} ---- a/src/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c -+++ b/src/gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c -@@ -0,0 +1,12 @@ -+/* Use conditional compare */ -+/* { dg-options "-O2" } */ -+/* { dg-skip-if "" { arm_thumb1_ok } } */ -+/* { dg-final { scan-assembler "cmpgt" } } */ -+ -+int f(int i, int j) -+{ -+ if ( (i >= '+') ? (j <= '-') : 1) -+ return 1; -+ else -+ return 0; -+} ---- a/src/gcc/testsuite/gcc.target/arm/thumb2-replicated-constant1.c -+++ b/src/gcc/testsuite/gcc.target/arm/thumb2-replicated-constant1.c -@@ -0,0 +1,27 @@ -+/* Ensure simple replicated constant immediates work. */ -+/* { dg-options "-mthumb -O2" } */ -+/* { dg-require-effective-target arm_thumb2_ok } */ -+ -+int -+foo1 (int a) -+{ -+ return a + 0xfefefefe; -+} -+ -+/* { dg-final { scan-assembler "add.*#-16843010" } } */ -+ -+int -+foo2 (int a) -+{ -+ return a - 0xab00ab00; -+} -+ -+/* { dg-final { scan-assembler "sub.*#-1426019584" } } */ -+ -+int -+foo3 (int a) -+{ -+ return a & 0x00cd00cd; -+} -+ -+/* { dg-final { scan-assembler "and.*#13435085" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/thumb2-replicated-constant2.c -+++ b/src/gcc/testsuite/gcc.target/arm/thumb2-replicated-constant2.c -@@ -0,0 +1,75 @@ -+/* Ensure split constants can use replicated patterns. */ -+/* { dg-options "-mthumb -O2" } */ -+/* { dg-require-effective-target arm_thumb2_ok } */ -+ -+int -+foo1 (int a) -+{ -+ return a + 0xfe00fe01; -+} -+ -+/* { dg-final { scan-assembler "add.*#-33489408" } } */ -+/* { dg-final { scan-assembler "add.*#1" } } */ -+ -+int -+foo2 (int a) -+{ -+ return a + 0xdd01dd00; -+} -+ -+/* { dg-final { scan-assembler "add.*#-587145984" } } */ -+/* { dg-final { scan-assembler "add.*#65536" } } */ -+ -+int -+foo3 (int a) -+{ -+ return a + 0x00443344; -+} -+ -+/* { dg-final { scan-assembler "add.*#4456516" } } */ -+/* { dg-final { scan-assembler "add.*#13056" } } */ -+ -+int -+foo4 (int a) -+{ -+ return a + 0x77330033; -+} -+ -+/* { dg-final { scan-assembler "add.*#1996488704" } } */ -+/* { dg-final { scan-assembler "add.*#3342387" } } */ -+ -+int -+foo5 (int a) -+{ -+ return a + 0x11221122; -+} -+ -+/* { dg-final { scan-assembler "add.*#285217024" } } */ -+/* { dg-final { scan-assembler "add.*#2228258" } } */ -+ -+int -+foo6 (int a) -+{ -+ return a + 0x66666677; -+} -+ -+/* { dg-final { scan-assembler "add.*#1717986918" } } */ -+/* { dg-final { scan-assembler "add.*#17" } } */ -+ -+int -+foo7 (int a) -+{ -+ return a + 0x99888888; -+} -+ -+/* { dg-final { scan-assembler "add.*#-2004318072" } } */ -+/* { dg-final { scan-assembler "add.*#285212672" } } */ -+ -+int -+foo8 (int a) -+{ -+ return a + 0xdddddfff; -+} -+ -+/* { dg-final { scan-assembler "add.*#-572662307" } } */ -+/* { dg-final { scan-assembler "addw.*#546" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/thumb2-replicated-constant3.c -+++ b/src/gcc/testsuite/gcc.target/arm/thumb2-replicated-constant3.c -@@ -0,0 +1,28 @@ -+/* Ensure negated/inverted replicated constant immediates work. */ -+/* { dg-options "-mthumb -O2" } */ -+/* { dg-require-effective-target arm_thumb2_ok } */ -+ -+int -+foo1 (int a) -+{ -+ return a | 0xffffff00; -+} -+ -+/* { dg-final { scan-assembler "orn.*#255" } } */ -+ -+int -+foo2 (int a) -+{ -+ return a & 0xffeeffee; -+} -+ -+/* { dg-final { scan-assembler "bic.*#1114129" } } */ -+ -+int -+foo3 (int a) -+{ -+ return a & 0xaaaaaa00; -+} -+ -+/* { dg-final { scan-assembler "and.*#-1431655766" } } */ -+/* { dg-final { scan-assembler "bic.*#170" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/thumb2-replicated-constant4.c -+++ b/src/gcc/testsuite/gcc.target/arm/thumb2-replicated-constant4.c -@@ -0,0 +1,22 @@ -+/* Ensure replicated constants don't make things worse. */ -+/* { dg-options "-mthumb -O2" } */ -+/* { dg-require-effective-target arm_thumb2_ok } */ -+ -+int -+foo1 (int a) -+{ -+ /* It might be tempting to use 0x01000100, but it wouldn't help. */ -+ return a + 0x01f001e0; -+} -+ -+/* { dg-final { scan-assembler "add.*#32505856" } } */ -+/* { dg-final { scan-assembler "add.*#480" } } */ -+ -+int -+foo2 (int a) -+{ -+ return a + 0x0f100e10; -+} -+ -+/* { dg-final { scan-assembler "add.*#252706816" } } */ -+/* { dg-final { scan-assembler "add.*#3600" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/unaligned-memcpy-1.c -+++ b/src/gcc/testsuite/gcc.target/arm/unaligned-memcpy-1.c -@@ -0,0 +1,19 @@ -+/* { dg-do compile } */ -+/* { dg-require-effective-target arm_unaligned } */ -+/* { dg-options "-O2" } */ -+ -+#include <string.h> -+ -+void unknown_alignment (char *dest, char *src) -+{ -+ memcpy (dest, src, 15); -+} -+ -+/* We should see three unaligned word loads and store pairs, one unaligned -+ ldrh/strh pair, and an ldrb/strb pair. Sanity check that. */ -+ -+/* { dg-final { scan-assembler-times "@ unaligned" 8 } } */ -+/* { dg-final { scan-assembler-times "ldrh" 1 } } */ -+/* { dg-final { scan-assembler-times "strh" 1 } } */ -+/* { dg-final { scan-assembler-times "ldrb" 1 } } */ -+/* { dg-final { scan-assembler-times "strb" 1 } } */ ---- a/src/gcc/testsuite/gcc.target/arm/unaligned-memcpy-2.c -+++ b/src/gcc/testsuite/gcc.target/arm/unaligned-memcpy-2.c -@@ -0,0 +1,21 @@ -+/* { dg-do compile } */ -+/* { dg-require-effective-target arm_unaligned } */ -+/* { dg-options "-O2" } */ -+ -+#include <string.h> -+ -+char dest[16]; -+ -+void aligned_dest (char *src) -+{ -+ memcpy (dest, src, 15); -+} -+ -+/* Expect a multi-word store for the main part of the copy, but subword -+ loads/stores for the remainder. */ -+ -+/* { dg-final { scan-assembler-times "stmia" 1 } } */ -+/* { dg-final { scan-assembler-times "ldrh" 1 } } */ -+/* { dg-final { scan-assembler-times "strh" 1 } } */ -+/* { dg-final { scan-assembler-times "ldrb" 1 } } */ -+/* { dg-final { scan-assembler-times "strb" 1 } } */ ---- a/src/gcc/testsuite/gcc.target/arm/unaligned-memcpy-3.c -+++ b/src/gcc/testsuite/gcc.target/arm/unaligned-memcpy-3.c -@@ -0,0 +1,21 @@ -+/* { dg-do compile } */ -+/* { dg-require-effective-target arm_unaligned } */ -+/* { dg-options "-O2" } */ -+ -+#include <string.h> -+ -+char src[16]; -+ -+void aligned_src (char *dest) -+{ -+ memcpy (dest, src, 15); -+} -+ -+/* Expect a multi-word load for the main part of the copy, but subword -+ loads/stores for the remainder. */ -+ -+/* { dg-final { scan-assembler-times "ldmia" 1 } } */ -+/* { dg-final { scan-assembler-times "ldrh" 1 } } */ -+/* { dg-final { scan-assembler-times "strh" 1 } } */ -+/* { dg-final { scan-assembler-times "ldrb" 1 } } */ -+/* { dg-final { scan-assembler-times "strb" 1 } } */ ---- a/src/gcc/testsuite/gcc.target/arm/unaligned-memcpy-4.c -+++ b/src/gcc/testsuite/gcc.target/arm/unaligned-memcpy-4.c -@@ -0,0 +1,18 @@ -+/* { dg-do compile } */ -+/* { dg-require-effective-target arm_unaligned } */ -+/* { dg-options "-O2" } */ -+ -+#include <string.h> -+ -+char src[16]; -+char dest[16]; -+ -+void aligned_both (void) -+{ -+ memcpy (dest, src, 15); -+} -+ -+/* We know both src and dest to be aligned: expect multiword loads/stores. */ -+ -+/* { dg-final { scan-assembler-times "ldmia" 1 } } */ -+/* { dg-final { scan-assembler-times "stmia" 1 } } */ ---- a/src/gcc/testsuite/gcc.target/arm/unsigned-extend-1.c -+++ b/src/gcc/testsuite/gcc.target/arm/unsigned-extend-1.c -@@ -0,0 +1,9 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2 -march=armv6" } */ -+ -+unsigned char foo (unsigned char c) -+{ -+ return (c >= '0') && (c <= '9'); -+} -+ -+/* { dg-final { scan-assembler-not "uxtb" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/vfp-1.c -+++ b/src/gcc/testsuite/gcc.target/arm/vfp-1.c -@@ -127,13 +127,13 @@ - - void test_ldst (float f[], double d[]) { - /* { dg-final { scan-assembler "flds.+ \\\[r0, #1020\\\]" } } */ -- /* { dg-final { scan-assembler "flds.+ \\\[r0, #-1020\\\]" } } */ -+ /* { dg-final { scan-assembler "flds.+ \\\[r\[0-9\], #-1020\\\]" { target { arm32 && { ! arm_thumb2_ok } } } } } */ - /* { dg-final { scan-assembler "add.+ r0, #1024" } } */ -- /* { dg-final { scan-assembler "fsts.+ \\\[r0, #0\\\]\n" } } */ -+ /* { dg-final { scan-assembler "fsts.+ \\\[r\[0-9\], #0\\\]\n" } } */ - f[256] = f[255] + f[-255]; - - /* { dg-final { scan-assembler "fldd.+ \\\[r1, #1016\\\]" } } */ -- /* { dg-final { scan-assembler "fldd.+ \\\[r1, #-1016\\\]" } } */ -+ /* { dg-final { scan-assembler "fldd.+ \\\[r\[1-9\], #-1016\\\]" { target { arm32 && { ! arm_thumb2_ok } } } } } */ - /* { dg-final { scan-assembler "fstd.+ \\\[r1, #256\\\]" } } */ - d[32] = d[127] + d[-127]; - } ---- a/src/gcc/testsuite/gcc.target/arm/wmul-10.c -+++ b/src/gcc/testsuite/gcc.target/arm/wmul-10.c -@@ -0,0 +1,10 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2 -march=armv7-a" } */ -+ -+unsigned long long -+foo (unsigned short a, unsigned short *b, unsigned short *c) -+{ -+ return (unsigned)a + (unsigned long long)*b * (unsigned long long)*c; -+} -+ -+/* { dg-final { scan-assembler "umlal" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/wmul-11.c -+++ b/src/gcc/testsuite/gcc.target/arm/wmul-11.c -@@ -0,0 +1,10 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2 -march=armv7-a" } */ -+ -+long long -+foo (int *b) -+{ -+ return 10 * (long long)*b; -+} -+ -+/* { dg-final { scan-assembler "smull" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/wmul-12.c -+++ b/src/gcc/testsuite/gcc.target/arm/wmul-12.c -@@ -0,0 +1,11 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2 -march=armv7-a" } */ -+ -+long long -+foo (int *b, int *c) -+{ -+ long long tmp = (long long)*b * *c; -+ return 10 + tmp; -+} -+ -+/* { dg-final { scan-assembler "smlal" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/wmul-13.c -+++ b/src/gcc/testsuite/gcc.target/arm/wmul-13.c -@@ -0,0 +1,10 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2 -march=armv7-a" } */ -+ -+long long -+foo (int *a, int *b) -+{ -+ return *a + (long long)*b * 10; -+} -+ -+/* { dg-final { scan-assembler "smlal" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/wmul-5.c -+++ b/src/gcc/testsuite/gcc.target/arm/wmul-5.c -@@ -0,0 +1,10 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2 -march=armv7-a" } */ -+ -+long long -+foo (long long a, char *b, char *c) -+{ -+ return a + *b * *c; -+} -+ -+/* { dg-final { scan-assembler "umlal" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/wmul-6.c -+++ b/src/gcc/testsuite/gcc.target/arm/wmul-6.c -@@ -0,0 +1,10 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2 -march=armv7-a" } */ -+ -+long long -+foo (long long a, unsigned char *b, signed char *c) -+{ -+ return a + (long long)*b * (long long)*c; -+} -+ -+/* { dg-final { scan-assembler "smlal" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/wmul-7.c -+++ b/src/gcc/testsuite/gcc.target/arm/wmul-7.c -@@ -0,0 +1,10 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2 -march=armv7-a" } */ -+ -+unsigned long long -+foo (unsigned long long a, unsigned char *b, unsigned short *c) -+{ -+ return a + *b * *c; -+} -+ -+/* { dg-final { scan-assembler "umlal" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/wmul-8.c -+++ b/src/gcc/testsuite/gcc.target/arm/wmul-8.c -@@ -0,0 +1,10 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2 -march=armv7-a" } */ -+ -+long long -+foo (long long a, int *b, int *c) -+{ -+ return a + (long long)*b * *c; -+} -+ -+/* { dg-final { scan-assembler "smlal" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/wmul-9.c -+++ b/src/gcc/testsuite/gcc.target/arm/wmul-9.c -@@ -0,0 +1,10 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2 -march=armv7-a" } */ -+ -+long long -+foo (long long a, short *b, char *c) -+{ -+ return a + *b * *c; -+} -+ -+/* { dg-final { scan-assembler "smlalbb" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/wmul-bitfield-1.c -+++ b/src/gcc/testsuite/gcc.target/arm/wmul-bitfield-1.c -@@ -0,0 +1,17 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2 -march=armv7-a" } */ -+ -+struct bf -+{ -+ int a : 3; -+ int b : 15; -+ int c : 3; -+}; -+ -+long long -+foo (long long a, struct bf b, struct bf c) -+{ -+ return a + b.b * c.b; -+} -+ -+/* { dg-final { scan-assembler "smlalbb" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/wmul-bitfield-2.c -+++ b/src/gcc/testsuite/gcc.target/arm/wmul-bitfield-2.c -@@ -0,0 +1,17 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2 -march=armv7-a" } */ -+ -+struct bf -+{ -+ int a : 3; -+ unsigned int b : 15; -+ int c : 3; -+}; -+ -+long long -+foo (long long a, struct bf b, struct bf c) -+{ -+ return a + b.b * c.c; -+} -+ -+/* { dg-final { scan-assembler "smlalbb" } } */ ---- a/src/gcc/testsuite/gcc.target/arm/xor-and.c -+++ b/src/gcc/testsuite/gcc.target/arm/xor-and.c -@@ -0,0 +1,14 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O -march=armv6" } */ -+ -+unsigned short foo (unsigned short x) -+{ -+ x ^= 0x4002; -+ x >>= 1; -+ x |= 0x8000; -+ return x; -+} -+ -+/* { dg-final { scan-assembler "orr" } } */ -+/* { dg-final { scan-assembler-not "mvn" } } */ -+/* { dg-final { scan-assembler-not "uxth" } } */ ---- a/src/gcc/testsuite/gcc.target/sparc/ultrasp12.c -+++ b/src/gcc/testsuite/gcc.target/sparc/ultrasp12.c -@@ -0,0 +1,64 @@ -+/* PR rtl-optimization/48830 */ -+/* Testcase by Hans-Peter Nilsson <hp@gcc.gnu.org> */ -+ -+/* { dg-do compile } */ -+/* { dg-require-effective-target lp64 } */ -+/* { dg-options "-O2 -mcpu=ultrasparc -mvis" } */ -+ -+typedef unsigned char uint8_t; -+typedef unsigned int uint32_t; -+typedef unsigned long int uint64_t; -+typedef unsigned long int uintmax_t; -+typedef unsigned char rc_vec_t __attribute__((__vector_size__(8))); -+typedef short rc_svec_type_ __attribute__((__vector_size__(8))); -+typedef unsigned char rc_vec4_type_ __attribute__((__vector_size__(4))); -+ -+void -+rc_stat_xsum_acc(const uint8_t *__restrict src1, int src1_dim, -+ const uint8_t *__restrict src2, int src2_dim, -+ int len, int height, uintmax_t sum[5]) -+{ -+ uint32_t s1 = 0; -+ uint32_t s2 = 0; -+ uintmax_t s11 = 0; -+ uintmax_t s22 = 0; -+ uintmax_t s12 = 0; -+ int full = len / ((1024) < (1024) ? (1024) : (1024)); -+ int rem = len % ((1024) < (1024) ? (1024) : (1024)); -+ int rem1 = rem / 1; -+ int y; -+ unsigned int rc_gsr_scale_ __attribute__ ((__unused__)) = 7; unsigned int rc_gsr_align_ __attribute__ ((__unused__)) = 4; unsigned int rc_gsr_set_ __attribute__ ((__unused__)) = 0; register unsigned int rc_gsr_fakedep_ __attribute__ ((__unused__)) = 0; unsigned int rc_gsr_ldinit_ __attribute__ ((__unused__)) = 0; -+ for (y = 0; y < height; y++) { -+ rc_vec_t a1, a2, a11, a22, a12; -+ int i1 = (y)*(src1_dim); -+ int i2 = (y)*(src2_dim); -+ int x; -+ ((a1) = ((rc_vec_t) {0})); -+ ((a2) = ((rc_vec_t) {0})); -+ ((a11) = ((rc_vec_t) {0})); -+ ((a22) = ((rc_vec_t) {0})); -+ ((a12) = ((rc_vec_t) {0})); -+ for (x = 0; x < full; x++) { -+ int k; -+ for (k = 0; k < ((1024) < (1024) ? (1024) : (1024)) / -+ 1; k++) -+ { -+ do { rc_vec_t v1, v2; ((v1) = *(const rc_vec_t*)(&(src1)[i1])); ((v2) = *(const rc_vec_t*)(&(src2)[i2])); ((a1) = (((union { rc_vec_t v; uint64_t i; })(uint64_t)(__builtin_vis_pdist (v1, ((rc_vec_t) {0}), (((union { rc_vec_t v; uint64_t i; })(uint64_t)(a1)).i)))).v)); ((a2) = (((union { rc_vec_t v; uint64_t i; })(uint64_t)(__builtin_vis_pdist (v2, ((rc_vec_t) {0}), (((union { rc_vec_t v; uint64_t i; })(uint64_t)(a2)).i)))).v)); do { rc_vec_t s1_ = (v1); rc_vec_t s2_ = (v1); rc_vec_t accvin_ = (a11); rc_vec_t s1lo7_, s1msb_, accvout_; uint32_t maclo_, machi_; rc_svec_type_ masklow_ = (rc_svec_type_){(255), (255), (255), (255)}; rc_svec_type_ s1msbhi_, s1msblo_, s1lo7hi_, s1lo7lo_; rc_svec_type_ s1msbdiv2hi_, s1msbdiv2lo_; rc_vec4_type_ s1lo7hi4_, s1lo7lo4_, s1msbhi4_, s1msblo4_; rc_vec4_type_ s1msbdiv2hi4_, s1msbdiv2lo4_, s2hi4_, s2lo4_; rc_vec4_type_ accvhi4_, accvlo4_; rc_svec_type_ mulhilo7_, mullolo7_, mulhimsbdiv2_, mullomsbdiv2_; rc_svec_type_ mulhi_, mullo_, mulhihi_, mullohi_; rc_svec_type_ mulhilo_, mullolo_; rc_vec4_type_ zero4_ = (((union { rc_vec4_type_ v; uint64_t i; })(uint64_t)(0)).v); rc_vec_t msb_ = (rc_vec_t){(0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80)}; ((s1msb_) = (s1_) & (msb_)); ((s1lo7_) = (s1_) & (~msb_)); do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_) : "0" (s1msb_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1msb_); (s1msbhi4_) = hl_.hilo_.hi_; (s1msblo4_) = hl_.hilo_.lo_; } while (0); s1msbhi_ = __builtin_vis_fexpand(s1msbhi4_); s1msblo_ = __builtin_vis_fexpand(s1msblo4_); s1msbdiv2hi4_ = __builtin_vis_fpack16(s1msbhi_); s1msbdiv2lo4_ = __builtin_vis_fpack16(s1msblo_); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s2_); (s2hi4_) = hl_.hilo_.hi_; (s2lo4_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1lo7_); (s1lo7hi4_) = hl_.hilo_.hi_; (s1lo7lo4_) = hl_.hilo_.lo_; } while (0); s1msbdiv2hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2hi4_, zero4_); s1msbdiv2lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2lo4_, zero4_); s1lo7hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7hi4_, zero4_); s1lo7lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7lo4_, zero4_); mulhilo7_ = __builtin_vis_fmul8x16(s2hi4_, s1lo7hi_); mullolo7_ = __builtin_vis_fmul8x16(s2lo4_, s1lo7lo_); mulhimsbdiv2_ = __builtin_vis_fmul8x16(s2hi4_, s1msbdiv2hi_); mullomsbdiv2_ = __builtin_vis_fmul8x16(s2lo4_, s1msbdiv2lo_); mulhi_ = mulhilo7_ + mulhimsbdiv2_ + mulhimsbdiv2_; mullo_ = mullolo7_ + mullomsbdiv2_ + mullomsbdiv2_; mulhihi_ = mulhi_ & ~masklow_; mulhilo_ = mulhi_ & masklow_; mullohi_ = mullo_ & ~masklow_; mullolo_ = mullo_ & masklow_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (accvin_); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); maclo_ = __builtin_vis_pdist ((rc_vec_t)mullolo_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i)); maclo_ = __builtin_vis_pdist ((rc_vec_t)mulhilo_, ((rc_vec_t) {0}), maclo_); machi_ = __builtin_vis_pdist ((rc_vec_t)mullohi_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i)); machi_ = __builtin_vis_pdist ((rc_vec_t)mulhihi_, ((rc_vec_t) {0}), machi_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)machi_)).v)), ((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)maclo_)).v))}}; (accvout_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (accvout_), "0" (rc_gsr_fakedep_)); (a11) = accvout_; } while (0); do { rc_vec_t s1_ = (v2); rc_vec_t s2_ = (v2); rc_vec_t accvin_ = (a22); rc_vec_t s1lo7_, s1msb_, accvout_; uint32_t maclo_, machi_; rc_svec_type_ masklow_ = (rc_svec_type_){(255), (255), (255), (255)}; rc_svec_type_ s1msbhi_, s1msblo_, s1lo7hi_, s1lo7lo_; rc_svec_type_ s1msbdiv2hi_, s1msbdiv2lo_; rc_vec4_type_ s1lo7hi4_, s1lo7lo4_, s1msbhi4_, s1msblo4_; rc_vec4_type_ s1msbdiv2hi4_, s1msbdiv2lo4_, s2hi4_, s2lo4_; rc_vec4_type_ accvhi4_, accvlo4_; rc_svec_type_ mulhilo7_, mullolo7_, mulhimsbdiv2_, mullomsbdiv2_; rc_svec_type_ mulhi_, mullo_, mulhihi_, mullohi_; rc_svec_type_ mulhilo_, mullolo_; rc_vec4_type_ zero4_ = (((union { rc_vec4_type_ v; uint64_t i; })(uint64_t)(0)).v); rc_vec_t msb_ = (rc_vec_t){(0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80)}; ((s1msb_) = (s1_) & (msb_)); ((s1lo7_) = (s1_) & (~msb_)); do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_) : "0" (s1msb_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1msb_); (s1msbhi4_) = hl_.hilo_.hi_; (s1msblo4_) = hl_.hilo_.lo_; } while (0); s1msbhi_ = __builtin_vis_fexpand(s1msbhi4_); s1msblo_ = __builtin_vis_fexpand(s1msblo4_); s1msbdiv2hi4_ = __builtin_vis_fpack16(s1msbhi_); s1msbdiv2lo4_ = __builtin_vis_fpack16(s1msblo_); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s2_); (s2hi4_) = hl_.hilo_.hi_; (s2lo4_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1lo7_); (s1lo7hi4_) = hl_.hilo_.hi_; (s1lo7lo4_) = hl_.hilo_.lo_; } while (0); s1msbdiv2hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2hi4_, zero4_); s1msbdiv2lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2lo4_, zero4_); s1lo7hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7hi4_, zero4_); s1lo7lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7lo4_, zero4_); mulhilo7_ = __builtin_vis_fmul8x16(s2hi4_, s1lo7hi_); mullolo7_ = __builtin_vis_fmul8x16(s2lo4_, s1lo7lo_); mulhimsbdiv2_ = __builtin_vis_fmul8x16(s2hi4_, s1msbdiv2hi_); mullomsbdiv2_ = __builtin_vis_fmul8x16(s2lo4_, s1msbdiv2lo_); mulhi_ = mulhilo7_ + mulhimsbdiv2_ + mulhimsbdiv2_; mullo_ = mullolo7_ + mullomsbdiv2_ + mullomsbdiv2_; mulhihi_ = mulhi_ & ~masklow_; mulhilo_ = mulhi_ & masklow_; mullohi_ = mullo_ & ~masklow_; mullolo_ = mullo_ & masklow_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (accvin_); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); maclo_ = __builtin_vis_pdist ((rc_vec_t)mullolo_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i)); maclo_ = __builtin_vis_pdist ((rc_vec_t)mulhilo_, ((rc_vec_t) {0}), maclo_); machi_ = __builtin_vis_pdist ((rc_vec_t)mullohi_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i)); machi_ = __builtin_vis_pdist ((rc_vec_t)mulhihi_, ((rc_vec_t) {0}), machi_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)machi_)).v)), ((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)maclo_)).v))}}; (accvout_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (accvout_), "0" (rc_gsr_fakedep_)); (a22) = accvout_; } while (0); do { rc_vec_t s1_ = (v1); rc_vec_t s2_ = (v2); rc_vec_t accvin_ = (a12); rc_vec_t s1lo7_, s1msb_, accvout_; uint32_t maclo_, machi_; rc_svec_type_ masklow_ = (rc_svec_type_){(255), (255), (255), (255)}; rc_svec_type_ s1msbhi_, s1msblo_, s1lo7hi_, s1lo7lo_; rc_svec_type_ s1msbdiv2hi_, s1msbdiv2lo_; rc_vec4_type_ s1lo7hi4_, s1lo7lo4_, s1msbhi4_, s1msblo4_; rc_vec4_type_ s1msbdiv2hi4_, s1msbdiv2lo4_, s2hi4_, s2lo4_; rc_vec4_type_ accvhi4_, accvlo4_; rc_svec_type_ mulhilo7_, mullolo7_, mulhimsbdiv2_, mullomsbdiv2_; rc_svec_type_ mulhi_, mullo_, mulhihi_, mullohi_; rc_svec_type_ mulhilo_, mullolo_; rc_vec4_type_ zero4_ = (((union { rc_vec4_type_ v; uint64_t i; })(uint64_t)(0)).v); rc_vec_t msb_ = (rc_vec_t){(0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80)}; ((s1msb_) = (s1_) & (msb_)); ((s1lo7_) = (s1_) & (~msb_)); do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_) : "0" (s1msb_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1msb_); (s1msbhi4_) = hl_.hilo_.hi_; (s1msblo4_) = hl_.hilo_.lo_; } while (0); s1msbhi_ = __builtin_vis_fexpand(s1msbhi4_); s1msblo_ = __builtin_vis_fexpand(s1msblo4_); s1msbdiv2hi4_ = __builtin_vis_fpack16(s1msbhi_); s1msbdiv2lo4_ = __builtin_vis_fpack16(s1msblo_); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s2_); (s2hi4_) = hl_.hilo_.hi_; (s2lo4_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1lo7_); (s1lo7hi4_) = hl_.hilo_.hi_; (s1lo7lo4_) = hl_.hilo_.lo_; } while (0); s1msbdiv2hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2hi4_, zero4_); s1msbdiv2lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2lo4_, zero4_); s1lo7hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7hi4_, zero4_); s1lo7lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7lo4_, zero4_); mulhilo7_ = __builtin_vis_fmul8x16(s2hi4_, s1lo7hi_); mullolo7_ = __builtin_vis_fmul8x16(s2lo4_, s1lo7lo_); mulhimsbdiv2_ = __builtin_vis_fmul8x16(s2hi4_, s1msbdiv2hi_); mullomsbdiv2_ = __builtin_vis_fmul8x16(s2lo4_, s1msbdiv2lo_); mulhi_ = mulhilo7_ + mulhimsbdiv2_ + mulhimsbdiv2_; mullo_ = mullolo7_ + mullomsbdiv2_ + mullomsbdiv2_; mulhihi_ = mulhi_ & ~masklow_; mulhilo_ = mulhi_ & masklow_; mullohi_ = mullo_ & ~masklow_; mullolo_ = mullo_ & masklow_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (accvin_); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); maclo_ = __builtin_vis_pdist ((rc_vec_t)mullolo_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i)); maclo_ = __builtin_vis_pdist ((rc_vec_t)mulhilo_, ((rc_vec_t) {0}), maclo_); machi_ = __builtin_vis_pdist ((rc_vec_t)mullohi_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i)); machi_ = __builtin_vis_pdist ((rc_vec_t)mulhihi_, ((rc_vec_t) {0}), machi_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)machi_)).v)), ((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)maclo_)).v))}}; (accvout_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (accvout_), "0" (rc_gsr_fakedep_)); (a12) = accvout_; } while (0); (i1) += 8; (i2) += 8; } while (0); -+ -+ } -+ do { uint32_t t1, t2, t11, t22, t12; ((t1) = (((union { rc_vec_t v; uint64_t i; })(uint64_t)(a1)).i)); ((t2) = (((union { rc_vec_t v; uint64_t i; })(uint64_t)(a2)).i)); do { rc_vec4_type_ accvhi4_, accvlo4_; uint64_t machi_, maclo_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (a11); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); machi_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i); maclo_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i); (t11) = maclo_ + machi_ * 256; } while (0); do { rc_vec4_type_ accvhi4_, accvlo4_; uint64_t machi_, maclo_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (a22); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); machi_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i); maclo_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i); (t22) = maclo_ + machi_ * 256; } while (0); do { rc_vec4_type_ accvhi4_, accvlo4_; uint64_t machi_, maclo_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (a12); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); machi_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i); maclo_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i); (t12) = maclo_ + machi_ * 256; } while (0); ((a1) = ((rc_vec_t) {0})); ((a2) = ((rc_vec_t) {0})); ((a11) = ((rc_vec_t) {0})); ((a22) = ((rc_vec_t) {0})); ((a12) = ((rc_vec_t) {0})); (s1) += t1; (s2) += t2; (s11) += t11; (s22) += t22; (s12) += t12; } while (0); -+ } -+ for (x = 0; x < rem1; x++) { -+ do { rc_vec_t v1, v2; ((v1) = *(const rc_vec_t*)(&(src1)[i1])); ((v2) = *(const rc_vec_t*)(&(src2)[i2])); ((a1) = (((union { rc_vec_t v; uint64_t i; })(uint64_t)(__builtin_vis_pdist (v1, ((rc_vec_t) {0}), (((union { rc_vec_t v; uint64_t i; })(uint64_t)(a1)).i)))).v)); ((a2) = (((union { rc_vec_t v; uint64_t i; })(uint64_t)(__builtin_vis_pdist (v2, ((rc_vec_t) {0}), (((union { rc_vec_t v; uint64_t i; })(uint64_t)(a2)).i)))).v)); do { rc_vec_t s1_ = (v1); rc_vec_t s2_ = (v1); rc_vec_t accvin_ = (a11); rc_vec_t s1lo7_, s1msb_, accvout_; uint32_t maclo_, machi_; rc_svec_type_ masklow_ = (rc_svec_type_){(255), (255), (255), (255)}; rc_svec_type_ s1msbhi_, s1msblo_, s1lo7hi_, s1lo7lo_; rc_svec_type_ s1msbdiv2hi_, s1msbdiv2lo_; rc_vec4_type_ s1lo7hi4_, s1lo7lo4_, s1msbhi4_, s1msblo4_; rc_vec4_type_ s1msbdiv2hi4_, s1msbdiv2lo4_, s2hi4_, s2lo4_; rc_vec4_type_ accvhi4_, accvlo4_; rc_svec_type_ mulhilo7_, mullolo7_, mulhimsbdiv2_, mullomsbdiv2_; rc_svec_type_ mulhi_, mullo_, mulhihi_, mullohi_; rc_svec_type_ mulhilo_, mullolo_; rc_vec4_type_ zero4_ = (((union { rc_vec4_type_ v; uint64_t i; })(uint64_t)(0)).v); rc_vec_t msb_ = (rc_vec_t){(0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80)}; ((s1msb_) = (s1_) & (msb_)); ((s1lo7_) = (s1_) & (~msb_)); do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_) : "0" (s1msb_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1msb_); (s1msbhi4_) = hl_.hilo_.hi_; (s1msblo4_) = hl_.hilo_.lo_; } while (0); s1msbhi_ = __builtin_vis_fexpand(s1msbhi4_); s1msblo_ = __builtin_vis_fexpand(s1msblo4_); s1msbdiv2hi4_ = __builtin_vis_fpack16(s1msbhi_); s1msbdiv2lo4_ = __builtin_vis_fpack16(s1msblo_); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s2_); (s2hi4_) = hl_.hilo_.hi_; (s2lo4_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1lo7_); (s1lo7hi4_) = hl_.hilo_.hi_; (s1lo7lo4_) = hl_.hilo_.lo_; } while (0); s1msbdiv2hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2hi4_, zero4_); s1msbdiv2lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2lo4_, zero4_); s1lo7hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7hi4_, zero4_); s1lo7lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7lo4_, zero4_); mulhilo7_ = __builtin_vis_fmul8x16(s2hi4_, s1lo7hi_); mullolo7_ = __builtin_vis_fmul8x16(s2lo4_, s1lo7lo_); mulhimsbdiv2_ = __builtin_vis_fmul8x16(s2hi4_, s1msbdiv2hi_); mullomsbdiv2_ = __builtin_vis_fmul8x16(s2lo4_, s1msbdiv2lo_); mulhi_ = mulhilo7_ + mulhimsbdiv2_ + mulhimsbdiv2_; mullo_ = mullolo7_ + mullomsbdiv2_ + mullomsbdiv2_; mulhihi_ = mulhi_ & ~masklow_; mulhilo_ = mulhi_ & masklow_; mullohi_ = mullo_ & ~masklow_; mullolo_ = mullo_ & masklow_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (accvin_); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); maclo_ = __builtin_vis_pdist ((rc_vec_t)mullolo_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i)); maclo_ = __builtin_vis_pdist ((rc_vec_t)mulhilo_, ((rc_vec_t) {0}), maclo_); machi_ = __builtin_vis_pdist ((rc_vec_t)mullohi_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i)); machi_ = __builtin_vis_pdist ((rc_vec_t)mulhihi_, ((rc_vec_t) {0}), machi_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)machi_)).v)), ((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)maclo_)).v))}}; (accvout_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (accvout_), "0" (rc_gsr_fakedep_)); (a11) = accvout_; } while (0); do { rc_vec_t s1_ = (v2); rc_vec_t s2_ = (v2); rc_vec_t accvin_ = (a22); rc_vec_t s1lo7_, s1msb_, accvout_; uint32_t maclo_, machi_; rc_svec_type_ masklow_ = (rc_svec_type_){(255), (255), (255), (255)}; rc_svec_type_ s1msbhi_, s1msblo_, s1lo7hi_, s1lo7lo_; rc_svec_type_ s1msbdiv2hi_, s1msbdiv2lo_; rc_vec4_type_ s1lo7hi4_, s1lo7lo4_, s1msbhi4_, s1msblo4_; rc_vec4_type_ s1msbdiv2hi4_, s1msbdiv2lo4_, s2hi4_, s2lo4_; rc_vec4_type_ accvhi4_, accvlo4_; rc_svec_type_ mulhilo7_, mullolo7_, mulhimsbdiv2_, mullomsbdiv2_; rc_svec_type_ mulhi_, mullo_, mulhihi_, mullohi_; rc_svec_type_ mulhilo_, mullolo_; rc_vec4_type_ zero4_ = (((union { rc_vec4_type_ v; uint64_t i; })(uint64_t)(0)).v); rc_vec_t msb_ = (rc_vec_t){(0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80)}; ((s1msb_) = (s1_) & (msb_)); ((s1lo7_) = (s1_) & (~msb_)); do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_) : "0" (s1msb_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1msb_); (s1msbhi4_) = hl_.hilo_.hi_; (s1msblo4_) = hl_.hilo_.lo_; } while (0); s1msbhi_ = __builtin_vis_fexpand(s1msbhi4_); s1msblo_ = __builtin_vis_fexpand(s1msblo4_); s1msbdiv2hi4_ = __builtin_vis_fpack16(s1msbhi_); s1msbdiv2lo4_ = __builtin_vis_fpack16(s1msblo_); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s2_); (s2hi4_) = hl_.hilo_.hi_; (s2lo4_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1lo7_); (s1lo7hi4_) = hl_.hilo_.hi_; (s1lo7lo4_) = hl_.hilo_.lo_; } while (0); s1msbdiv2hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2hi4_, zero4_); s1msbdiv2lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2lo4_, zero4_); s1lo7hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7hi4_, zero4_); s1lo7lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7lo4_, zero4_); mulhilo7_ = __builtin_vis_fmul8x16(s2hi4_, s1lo7hi_); mullolo7_ = __builtin_vis_fmul8x16(s2lo4_, s1lo7lo_); mulhimsbdiv2_ = __builtin_vis_fmul8x16(s2hi4_, s1msbdiv2hi_); mullomsbdiv2_ = __builtin_vis_fmul8x16(s2lo4_, s1msbdiv2lo_); mulhi_ = mulhilo7_ + mulhimsbdiv2_ + mulhimsbdiv2_; mullo_ = mullolo7_ + mullomsbdiv2_ + mullomsbdiv2_; mulhihi_ = mulhi_ & ~masklow_; mulhilo_ = mulhi_ & masklow_; mullohi_ = mullo_ & ~masklow_; mullolo_ = mullo_ & masklow_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (accvin_); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); maclo_ = __builtin_vis_pdist ((rc_vec_t)mullolo_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i)); maclo_ = __builtin_vis_pdist ((rc_vec_t)mulhilo_, ((rc_vec_t) {0}), maclo_); machi_ = __builtin_vis_pdist ((rc_vec_t)mullohi_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i)); machi_ = __builtin_vis_pdist ((rc_vec_t)mulhihi_, ((rc_vec_t) {0}), machi_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)machi_)).v)), ((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)maclo_)).v))}}; (accvout_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (accvout_), "0" (rc_gsr_fakedep_)); (a22) = accvout_; } while (0); do { rc_vec_t s1_ = (v1); rc_vec_t s2_ = (v2); rc_vec_t accvin_ = (a12); rc_vec_t s1lo7_, s1msb_, accvout_; uint32_t maclo_, machi_; rc_svec_type_ masklow_ = (rc_svec_type_){(255), (255), (255), (255)}; rc_svec_type_ s1msbhi_, s1msblo_, s1lo7hi_, s1lo7lo_; rc_svec_type_ s1msbdiv2hi_, s1msbdiv2lo_; rc_vec4_type_ s1lo7hi4_, s1lo7lo4_, s1msbhi4_, s1msblo4_; rc_vec4_type_ s1msbdiv2hi4_, s1msbdiv2lo4_, s2hi4_, s2lo4_; rc_vec4_type_ accvhi4_, accvlo4_; rc_svec_type_ mulhilo7_, mullolo7_, mulhimsbdiv2_, mullomsbdiv2_; rc_svec_type_ mulhi_, mullo_, mulhihi_, mullohi_; rc_svec_type_ mulhilo_, mullolo_; rc_vec4_type_ zero4_ = (((union { rc_vec4_type_ v; uint64_t i; })(uint64_t)(0)).v); rc_vec_t msb_ = (rc_vec_t){(0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80)}; ((s1msb_) = (s1_) & (msb_)); ((s1lo7_) = (s1_) & (~msb_)); do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_) : "0" (s1msb_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1msb_); (s1msbhi4_) = hl_.hilo_.hi_; (s1msblo4_) = hl_.hilo_.lo_; } while (0); s1msbhi_ = __builtin_vis_fexpand(s1msbhi4_); s1msblo_ = __builtin_vis_fexpand(s1msblo4_); s1msbdiv2hi4_ = __builtin_vis_fpack16(s1msbhi_); s1msbdiv2lo4_ = __builtin_vis_fpack16(s1msblo_); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s2_); (s2hi4_) = hl_.hilo_.hi_; (s2lo4_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1lo7_); (s1lo7hi4_) = hl_.hilo_.hi_; (s1lo7lo4_) = hl_.hilo_.lo_; } while (0); s1msbdiv2hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2hi4_, zero4_); s1msbdiv2lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2lo4_, zero4_); s1lo7hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7hi4_, zero4_); s1lo7lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7lo4_, zero4_); mulhilo7_ = __builtin_vis_fmul8x16(s2hi4_, s1lo7hi_); mullolo7_ = __builtin_vis_fmul8x16(s2lo4_, s1lo7lo_); mulhimsbdiv2_ = __builtin_vis_fmul8x16(s2hi4_, s1msbdiv2hi_); mullomsbdiv2_ = __builtin_vis_fmul8x16(s2lo4_, s1msbdiv2lo_); mulhi_ = mulhilo7_ + mulhimsbdiv2_ + mulhimsbdiv2_; mullo_ = mullolo7_ + mullomsbdiv2_ + mullomsbdiv2_; mulhihi_ = mulhi_ & ~masklow_; mulhilo_ = mulhi_ & masklow_; mullohi_ = mullo_ & ~masklow_; mullolo_ = mullo_ & masklow_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (accvin_); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); maclo_ = __builtin_vis_pdist ((rc_vec_t)mullolo_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i)); maclo_ = __builtin_vis_pdist ((rc_vec_t)mulhilo_, ((rc_vec_t) {0}), maclo_); machi_ = __builtin_vis_pdist ((rc_vec_t)mullohi_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i)); machi_ = __builtin_vis_pdist ((rc_vec_t)mulhihi_, ((rc_vec_t) {0}), machi_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)machi_)).v)), ((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)maclo_)).v))}}; (accvout_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (accvout_), "0" (rc_gsr_fakedep_)); (a12) = accvout_; } while (0); (i1) += 8; (i2) += 8; } while (0); -+ } -+ do { uint32_t t1, t2, t11, t22, t12; ((t1) = (((union { rc_vec_t v; uint64_t i; })(uint64_t)(a1)).i)); ((t2) = (((union { rc_vec_t v; uint64_t i; })(uint64_t)(a2)).i)); do { rc_vec4_type_ accvhi4_, accvlo4_; uint64_t machi_, maclo_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (a11); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); machi_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i); maclo_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i); (t11) = maclo_ + machi_ * 256; } while (0); do { rc_vec4_type_ accvhi4_, accvlo4_; uint64_t machi_, maclo_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (a22); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); machi_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i); maclo_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i); (t22) = maclo_ + machi_ * 256; } while (0); do { rc_vec4_type_ accvhi4_, accvlo4_; uint64_t machi_, maclo_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (a12); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); machi_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i); maclo_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i); (t12) = maclo_ + machi_ * 256; } while (0); ((a1) = ((rc_vec_t) {0})); ((a2) = ((rc_vec_t) {0})); ((a11) = ((rc_vec_t) {0})); ((a22) = ((rc_vec_t) {0})); ((a12) = ((rc_vec_t) {0})); (s1) += t1; (s2) += t2; (s11) += t11; (s22) += t22; (s12) += t12; } while (0); -+ -+ do { uint32_t t1, t2, t11, t22, t12; ((t1) = (((union { rc_vec_t v; uint64_t i; })(uint64_t)(a1)).i)); ((t2) = (((union { rc_vec_t v; uint64_t i; })(uint64_t)(a2)).i)); do { rc_vec4_type_ accvhi4_, accvlo4_; uint64_t machi_, maclo_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (a11); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); machi_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i); maclo_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i); (t11) = maclo_ + machi_ * 256; } while (0); do { rc_vec4_type_ accvhi4_, accvlo4_; uint64_t machi_, maclo_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (a22); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); machi_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i); maclo_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i); (t22) = maclo_ + machi_ * 256; } while (0); do { rc_vec4_type_ accvhi4_, accvlo4_; uint64_t machi_, maclo_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (a12); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); machi_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i); maclo_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i); (t12) = maclo_ + machi_ * 256; } while (0); ((a1) = ((rc_vec_t) {0})); ((a2) = ((rc_vec_t) {0})); ((a11) = ((rc_vec_t) {0})); ((a22) = ((rc_vec_t) {0})); ((a12) = ((rc_vec_t) {0})); (s1) += t1; (s2) += t2; (s11) += t11; (s22) += t22; (s12) += t12; } while (0); -+ } -+ sum[0] = s1; -+ sum[1] = s2; -+ sum[2] = s11; -+ sum[3] = s22; -+ sum[4] = s12; -+ ; -+} ---- a/src/gcc/testsuite/gfortran.dg/implicit_pure_1.f90 -+++ b/src/gcc/testsuite/gfortran.dg/implicit_pure_1.f90 -@@ -0,0 +1,53 @@ -+! { dg-do run } -+! -+! PR fortran/51218 -+! -+! Contributed by Harald Anlauf -+! -+ -+module a -+ implicit none -+ integer :: neval = 0 -+contains -+ subroutine inc_eval -+ neval = neval + 1 -+ end subroutine inc_eval -+end module a -+ -+module b -+ use a -+ implicit none -+contains -+ function f(x) ! Should be implicit pure -+ real :: f -+ real, intent(in) :: x -+ f = x -+ end function f -+ -+ function g(x) ! Should NOT be implicit pure -+ real :: g -+ real, intent(in) :: x -+ call inc_eval -+ g = x -+ end function g -+end module b -+ -+program gfcbug114a -+ use a -+ use b -+ implicit none -+ real :: x = 1, y = 1, t, u, v, w -+ if (neval /= 0) call abort () -+ t = f(x)*f(y) -+ if (neval /= 0) call abort () -+ u = f(x)*f(y) + f(x)*f(y) -+ if (neval /= 0) call abort () -+ v = g(x)*g(y) -+ if (neval /= 2) call abort () -+ w = g(x)*g(y) + g(x)*g(y) -+ if (neval /= 6) call abort () -+ if (t /= 1.0 .or. u /= 2.0 .or. v /= 1.0 .or. w /= 2) call abort () -+end program gfcbug114a -+ -+! { dg-final { scan-module "b" "IMPLICIT_PURE" } } -+! { dg-final { cleanup-modules "b" } } ---- a/src/gcc/testsuite/gfortran.dg/pr50875.f90 -+++ b/src/gcc/testsuite/gfortran.dg/pr50875.f90 -@@ -0,0 +1,39 @@ -+! { dg-do compile { target { i?86-*-* x86_64-*-* } } } -+! { dg-options "-O3 -mavx" } -+! -+! PR fortran/50875.f90 -+ -+module test -+ -+ implicit none -+ -+ integer, parameter :: dp=kind(1.d0) -+ -+ integer :: P = 2 -+ -+ real(kind=dp), allocatable :: real_array_A(:),real_array_B(:,:) -+ complex(kind=dp), allocatable :: cmplx_array_A(:) -+ -+contains -+ -+ subroutine routine_A -+ -+ integer :: i -+ -+ allocate(cmplx_array_A(P),real_array_B(P,P),real_array_A(P)) -+ -+ real_array_A = 1 -+ real_array_B = 1 -+ -+ do i = 1, p -+ cmplx_array_A = cmplx(real_array_B(:,i),0.0_dp,dp) -+ cmplx_array_A = cmplx_array_A * exp(cmplx(0.0_dp,real_array_A+1)) -+ end do -+ -+ deallocate(cmplx_array_A,real_array_B,real_array_A) -+ -+ end subroutine routine_A -+ -+end module test -+ -+! { dg-final { cleanup-modules "test" } } ---- a/src/gcc/testsuite/gfortran.dg/vect/pr19049.f90 -+++ b/src/gcc/testsuite/gfortran.dg/vect/pr19049.f90 -@@ -19,6 +19,7 @@ - end - - ! { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" } } --! { dg-final { scan-tree-dump-times "complicated access pattern" 1 "vect" } } -+! { dg-final { scan-tree-dump-times "complicated access pattern" 1 "vect" { xfail vect_multiple_sizes } } } -+! { dg-final { scan-tree-dump-times "complicated access pattern" 2 "vect" { target vect_multiple_sizes } } } - ! { dg-final { cleanup-tree-dump "vect" } } - ---- a/src/gcc/testsuite/gfortran.dg/whole_file_35.f90 -+++ b/src/gcc/testsuite/gfortran.dg/whole_file_35.f90 -@@ -0,0 +1,28 @@ -+! { dg-do compile } -+! -+! PR fortran/50408 -+! -+! Contributed by Vittorio Zecca -+! -+ module m -+ type int -+ integer :: val -+ end type int -+ interface ichar -+ module procedure uch -+ end interface -+ contains -+ function uch (c) -+ character (len=1), intent (in) :: c -+ type (int) :: uch -+ intrinsic ichar -+ uch%val = 127 - ichar (c) -+ end function uch -+ end module m -+ -+ program p -+ use m -+ print *,ichar('~') ! must print "1" -+ end program p -+ -+! { dg-final { cleanup-modules "m" } } ---- a/src/gcc/testsuite/lib/target-supports.exp -+++ b/src/gcc/testsuite/lib/target-supports.exp -@@ -1894,6 +1894,18 @@ - }] - } - -+# Return 1 if this is an ARM target that supports unaligned word/halfword -+# load/store instructions. -+ -+proc check_effective_target_arm_unaligned { } { -+ return [check_no_compiler_messages arm_unaligned assembly { -+ #ifndef __ARM_FEATURE_UNALIGNED -+ #error no unaligned support -+ #endif -+ int i; -+ }] -+} -+ - # Add the options needed for NEON. We need either -mfloat-abi=softfp - # or -mfloat-abi=hard, but if one is already specified by the - # multilib, use it. Similarly, if a -mfpu option already enables -@@ -1988,6 +2000,47 @@ - check_effective_target_arm_fp16_ok_nocache] - } - -+# Creates a series of routines that return 1 if the given architecture -+# can be selected and a routine to give the flags to select that architecture -+# Note: Extra flags may be added to disable options from newer compilers -+# (Thumb in particular - but others may be added in the future) -+# Usage: /* { dg-require-effective-target arm_arch_v5_ok } */ -+# /* { dg-add-options arm_arch_v5 } */ -+foreach { armfunc armflag armdef } { v5 "-march=armv5 -marm" __ARM_ARCH_5__ -+ v6 "-march=armv6" __ARM_ARCH_6__ -+ v6k "-march=armv6k" __ARM_ARCH_6K__ -+ v7a "-march=armv7-a" __ARM_ARCH_7A__ } { -+ eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] { -+ proc check_effective_target_arm_arch_FUNC_ok { } { -+ if { [ string match "*-marm*" "FLAG" ] && -+ ![check_effective_target_arm_arm_ok] } { -+ return 0 -+ } -+ return [check_no_compiler_messages arm_arch_FUNC_ok assembly { -+ #if !defined (DEF) -+ #error FOO -+ #endif -+ } "FLAG" ] -+ } -+ -+ proc add_options_for_arm_arch_FUNC { flags } { -+ return "$flags FLAG" -+ } -+ }] -+} -+ -+# Return 1 if this is an ARM target where -marm causes ARM to be -+# used (not Thumb) -+ -+proc check_effective_target_arm_arm_ok { } { -+ return [check_no_compiler_messages arm_arm_ok assembly { -+ #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__) -+ #error FOO -+ #endif -+ } "-marm"] -+} -+ -+ - # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be - # used. - -@@ -2338,6 +2391,26 @@ - } - - -+# Return 1 if the target supports hardware vector shift operation for char. -+ -+proc check_effective_target_vect_shift_char { } { -+ global et_vect_shift_char_saved -+ -+ if [info exists et_vect_shift_char_saved] { -+ verbose "check_effective_target_vect_shift_char: using cached result" 2 -+ } else { -+ set et_vect_shift_char_saved 0 -+ if { ([istarget powerpc*-*-*] -+ && ![istarget powerpc-*-linux*paired*]) -+ || [check_effective_target_arm32] } { -+ set et_vect_shift_char_saved 1 -+ } -+ } -+ -+ verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2 -+ return $et_vect_shift_char_saved -+} -+ - # Return 1 if the target supports hardware vectors of long, 0 otherwise. - # - # This can change for different subtargets so do not cache the result. -@@ -2673,7 +2746,8 @@ - } else { - set et_vect_widen_mult_qi_to_hi_saved 0 - } -- if { [istarget powerpc*-*-*] } { -+ if { [istarget powerpc*-*-*] -+ || ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } { - set et_vect_widen_mult_qi_to_hi_saved 1 - } - } -@@ -2706,7 +2780,8 @@ - || [istarget spu-*-*] - || [istarget ia64-*-*] - || [istarget i?86-*-*] -- || [istarget x86_64-*-*] } { -+ || [istarget x86_64-*-*] -+ || ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } { - set et_vect_widen_mult_hi_to_si_saved 1 - } - } -@@ -2715,6 +2790,72 @@ - } - - # Return 1 if the target plus current options supports a vector -+# widening multiplication of *char* args into *short* result, 0 otherwise. -+# -+# This won't change for different subtargets so cache the result. -+ -+proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } { -+ global et_vect_widen_mult_qi_to_hi_pattern -+ -+ if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved] { -+ verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2 -+ } else { -+ set et_vect_widen_mult_qi_to_hi_pattern_saved 0 -+ if { [istarget powerpc*-*-*] -+ || ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } { -+ set et_vect_widen_mult_qi_to_hi_pattern_saved 1 -+ } -+ } -+ verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2 -+ return $et_vect_widen_mult_qi_to_hi_pattern_saved -+} -+ -+# Return 1 if the target plus current options supports a vector -+# widening multiplication of *short* args into *int* result, 0 otherwise. -+# -+# This won't change for different subtargets so cache the result. -+ -+proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } { -+ global et_vect_widen_mult_hi_to_si_pattern -+ -+ if [info exists et_vect_widen_mult_hi_to_si_pattern_saved] { -+ verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2 -+ } else { -+ set et_vect_widen_mult_hi_to_si_pattern_saved 0 -+ if { [istarget powerpc*-*-*] -+ || [istarget spu-*-*] -+ || [istarget ia64-*-*] -+ || [istarget i?86-*-*] -+ || [istarget x86_64-*-*] -+ || ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } { -+ set et_vect_widen_mult_hi_to_si_pattern_saved 1 -+ } -+ } -+ verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2 -+ return $et_vect_widen_mult_hi_to_si_pattern_saved -+} -+ -+# Return 1 if the target plus current options supports a vector -+# widening shift, 0 otherwise. -+# -+# This won't change for different subtargets so cache the result. -+ -+proc check_effective_target_vect_widen_shift { } { -+ global et_vect_widen_shift_saved -+ -+ if [info exists et_vect_shift_saved] { -+ verbose "check_effective_target_vect_widen_shift: using cached result" 2 -+ } else { -+ set et_vect_widen_shift_saved 0 -+ if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } { -+ set et_vect_widen_shift_saved 1 -+ } -+ } -+ verbose "check_effective_target_vect_widen_shift: returning $et_vect_widen_shift_saved" 2 -+ return $et_vect_widen_shift_saved -+} -+ -+# Return 1 if the target plus current options supports a vector - # dot-product of signed chars, 0 otherwise. - # - # This won't change for different subtargets so cache the result. -@@ -3050,7 +3191,8 @@ - || [istarget ia64-*-*] - || [istarget i?86-*-*] - || [istarget spu-*-*] -- || [istarget x86_64-*-*] } { -+ || [istarget x86_64-*-*] -+ || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } { - set et_vect_cond_saved 1 - } - } -@@ -3149,29 +3291,6 @@ - return $et_vect_extract_even_odd_saved - } - --# Return 1 if the target supports vector even/odd elements extraction of --# vectors with SImode elements or larger, 0 otherwise. -- --proc check_effective_target_vect_extract_even_odd_wide { } { -- global et_vect_extract_even_odd_wide_saved -- -- if [info exists et_vect_extract_even_odd_wide_saved] { -- verbose "check_effective_target_vect_extract_even_odd_wide: using cached result" 2 -- } else { -- set et_vect_extract_even_odd_wide_saved 0 -- if { [istarget powerpc*-*-*] -- || [istarget i?86-*-*] -- || [istarget x86_64-*-*] -- || [istarget ia64-*-*] -- || [istarget spu-*-*] } { -- set et_vect_extract_even_odd_wide_saved 1 -- } -- } -- -- verbose "check_effective_target_vect_extract_even_wide_odd: returning $et_vect_extract_even_odd_wide_saved" 2 -- return $et_vect_extract_even_odd_wide_saved --} -- - # Return 1 if the target supports vector interleaving, 0 otherwise. - - proc check_effective_target_vect_interleave { } { -@@ -3194,41 +3313,66 @@ - return $et_vect_interleave_saved - } - --# Return 1 if the target supports vector interleaving and extract even/odd, 0 otherwise. --proc check_effective_target_vect_strided { } { -- global et_vect_strided_saved -+foreach N {2 3 4 8} { -+ eval [string map [list N $N] { -+ # Return 1 if the target supports 2-vector interleaving -+ proc check_effective_target_vect_stridedN { } { -+ global et_vect_stridedN_saved - -- if [info exists et_vect_strided_saved] { -- verbose "check_effective_target_vect_strided: using cached result" 2 -+ if [info exists et_vect_stridedN_saved] { -+ verbose "check_effective_target_vect_stridedN: using cached result" 2 -+ } else { -+ set et_vect_stridedN_saved 0 -+ if { (N & -N) == N -+ && [check_effective_target_vect_interleave] -+ && [check_effective_target_vect_extract_even_odd] } { -+ set et_vect_stridedN_saved 1 -+ } -+ if { [istarget arm*-*-*] && N >= 2 && N <= 4 } { -+ set et_vect_stridedN_saved 1 -+ } -+ } -+ -+ verbose "check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2 -+ return $et_vect_stridedN_saved -+ } -+ }] -+} -+ -+# Return 1 if the target supports multiple vector sizes -+ -+proc check_effective_target_vect_multiple_sizes { } { -+ global et_vect_multiple_sizes_saved -+ -+ if [info exists et_vect_multiple_sizes_saved] { -+ verbose "check_effective_target_vect_multiple_sizes: using cached result" 2 - } else { -- set et_vect_strided_saved 0 -- if { [check_effective_target_vect_interleave] -- && [check_effective_target_vect_extract_even_odd] } { -- set et_vect_strided_saved 1 -+ set et_vect_multiple_sizes_saved 0 -+ if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } { -+ set et_vect_multiple_sizes_saved 1 - } - } - -- verbose "check_effective_target_vect_strided: returning $et_vect_strided_saved" 2 -- return $et_vect_strided_saved -+ verbose "check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2 -+ return $et_vect_multiple_sizes_saved - } - --# Return 1 if the target supports vector interleaving and extract even/odd --# for wide element types, 0 otherwise. --proc check_effective_target_vect_strided_wide { } { -- global et_vect_strided_wide_saved -+# Return 1 if the target supports vectors of 64 bits. - -- if [info exists et_vect_strided_wide_saved] { -- verbose "check_effective_target_vect_strided_wide: using cached result" 2 -+proc check_effective_target_vect64 { } { -+ global et_vect64_saved -+ -+ if [info exists et_vect64_saved] { -+ verbose "check_effective_target_vect64: using cached result" 2 - } else { -- set et_vect_strided_wide_saved 0 -- if { [check_effective_target_vect_interleave] -- && [check_effective_target_vect_extract_even_odd_wide] } { -- set et_vect_strided_wide_saved 1 -+ set et_vect64_saved 0 -+ if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } { -+ set et_vect64_saved 1 - } - } - -- verbose "check_effective_target_vect_strided_wide: returning $et_vect_strided_wide_saved" 2 -- return $et_vect_strided_wide_saved -+ verbose "check_effective_target_vect64: returning $et_vect64_saved" 2 -+ return $et_vect64_saved - } - - # Return 1 if the target supports section-anchors -@@ -3281,6 +3425,31 @@ - return $et_sync_int_long_saved - } - -+# Return 1 if the target supports atomic operations on "long long" and can -+# execute them -+# So far only put checks in for ARM, others may want to add their own -+proc check_effective_target_sync_longlong { } { -+ return [check_runtime sync_longlong_runtime { -+ #include <stdlib.h> -+ int main () -+ { -+ long long l1; -+ -+ if (sizeof (long long) != 8) -+ exit (1); -+ -+ #ifdef __arm__ -+ /* Just check for native; checking for kernel fallback is tricky. */ -+ asm volatile ("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1"); -+ #else -+ # error "Add other suitable archs here" -+ #endif -+ -+ exit (0); -+ } -+ } "" ] -+} -+ - # Return 1 if the target supports atomic operations on "char" and "short". - - proc check_effective_target_sync_char_short { } { -@@ -3614,11 +3783,11 @@ - return $flags - } - --# Add to FLAGS the flags needed to enable 128-bit vectors. -+# Add to FLAGS the flags needed to enable 64-bit vectors. - --proc add_options_for_quad_vectors { flags } { -+proc add_options_for_double_vectors { flags } { - if [is-effective-target arm_neon_ok] { -- return "$flags -mvectorize-with-neon-quad" -+ return "$flags -mvectorize-with-neon-double" - } - - return $flags ---- a/src/gcc/tree-cfg.c -+++ b/src/gcc/tree-cfg.c -@@ -3046,7 +3046,26 @@ - tree fntype; - unsigned i; - -- if (TREE_CODE (fn) != OBJ_TYPE_REF -+ if (gimple_call_internal_p (stmt)) -+ { -+ if (fn) -+ { -+ error ("gimple call has two targets"); -+ debug_generic_stmt (fn); -+ return true; -+ } -+ } -+ else -+ { -+ if (!fn) -+ { -+ error ("gimple call has no target"); -+ return true; -+ } -+ } -+ -+ if (fn -+ && TREE_CODE (fn) != OBJ_TYPE_REF - && !is_gimple_val (fn)) - { - error ("invalid function in gimple call"); -@@ -3054,9 +3073,10 @@ - return true; - } - -- if (!POINTER_TYPE_P (TREE_TYPE (fn)) -- || (TREE_CODE (TREE_TYPE (TREE_TYPE (fn))) != FUNCTION_TYPE -- && TREE_CODE (TREE_TYPE (TREE_TYPE (fn))) != METHOD_TYPE)) -+ if (fn -+ && (!POINTER_TYPE_P (TREE_TYPE (fn)) -+ || (TREE_CODE (TREE_TYPE (TREE_TYPE (fn))) != FUNCTION_TYPE -+ && TREE_CODE (TREE_TYPE (TREE_TYPE (fn))) != METHOD_TYPE))) - { - error ("non-function in gimple call"); - return true; -@@ -3076,8 +3096,12 @@ - return true; - } - -- fntype = TREE_TYPE (TREE_TYPE (fn)); -- if (gimple_call_lhs (stmt) -+ if (fn) -+ fntype = TREE_TYPE (TREE_TYPE (fn)); -+ else -+ fntype = NULL_TREE; -+ if (fntype -+ && gimple_call_lhs (stmt) - && !useless_type_conversion_p (TREE_TYPE (gimple_call_lhs (stmt)), - TREE_TYPE (fntype)) - /* ??? At least C++ misses conversions at assignments from -@@ -3449,6 +3473,44 @@ - return false; - } - -+ case WIDEN_LSHIFT_EXPR: -+ { -+ if (!INTEGRAL_TYPE_P (lhs_type) -+ || !INTEGRAL_TYPE_P (rhs1_type) -+ || TREE_CODE (rhs2) != INTEGER_CST -+ || (2 * TYPE_PRECISION (rhs1_type) > TYPE_PRECISION (lhs_type))) -+ { -+ error ("type mismatch in widening vector shift expression"); -+ debug_generic_expr (lhs_type); -+ debug_generic_expr (rhs1_type); -+ debug_generic_expr (rhs2_type); -+ return true; -+ } -+ -+ return false; -+ } -+ -+ case VEC_WIDEN_LSHIFT_HI_EXPR: -+ case VEC_WIDEN_LSHIFT_LO_EXPR: -+ { -+ if (TREE_CODE (rhs1_type) != VECTOR_TYPE -+ || TREE_CODE (lhs_type) != VECTOR_TYPE -+ || !INTEGRAL_TYPE_P (TREE_TYPE (rhs1_type)) -+ || !INTEGRAL_TYPE_P (TREE_TYPE (lhs_type)) -+ || TREE_CODE (rhs2) != INTEGER_CST -+ || (2 * TYPE_PRECISION (TREE_TYPE (rhs1_type)) -+ > TYPE_PRECISION (TREE_TYPE (lhs_type)))) -+ { -+ error ("type mismatch in widening vector shift expression"); -+ debug_generic_expr (lhs_type); -+ debug_generic_expr (rhs1_type); -+ debug_generic_expr (rhs2_type); -+ return true; -+ } -+ -+ return false; -+ } -+ - case PLUS_EXPR: - case MINUS_EXPR: - { -@@ -3550,7 +3612,7 @@ - case WIDEN_MULT_EXPR: - if (TREE_CODE (lhs_type) != INTEGER_TYPE) - return true; -- return ((2 * TYPE_PRECISION (rhs1_type) != TYPE_PRECISION (lhs_type)) -+ return ((2 * TYPE_PRECISION (rhs1_type) > TYPE_PRECISION (lhs_type)) - || (TYPE_PRECISION (rhs1_type) != TYPE_PRECISION (rhs2_type))); - - case WIDEN_SUM_EXPR: -@@ -3643,7 +3705,7 @@ - && !FIXED_POINT_TYPE_P (rhs1_type)) - || !useless_type_conversion_p (rhs1_type, rhs2_type) - || !useless_type_conversion_p (lhs_type, rhs3_type) -- || 2 * TYPE_PRECISION (rhs1_type) != TYPE_PRECISION (lhs_type) -+ || 2 * TYPE_PRECISION (rhs1_type) > TYPE_PRECISION (lhs_type) - || TYPE_PRECISION (rhs1_type) != TYPE_PRECISION (rhs2_type)) - { - error ("type mismatch in widening multiply-accumulate expression"); -@@ -4130,9 +4192,10 @@ - didn't see a function declaration before the call. */ - if (is_gimple_call (stmt)) - { -- tree decl; -+ tree fn, decl; - -- if (!is_gimple_call_addr (gimple_call_fn (stmt))) -+ fn = gimple_call_fn (stmt); -+ if (fn && !is_gimple_call_addr (fn)) - { - error ("invalid function in call statement"); - return true; -@@ -7503,6 +7566,8 @@ - case GIMPLE_CALL: - if (gimple_call_lhs (g)) - break; -+ if (gimple_call_internal_p (g)) -+ break; - - /* This is a naked call, as opposed to a GIMPLE_CALL with an - LHS. All calls whose value is ignored should be ---- a/src/gcc/tree-data-ref.c -+++ b/src/gcc/tree-data-ref.c -@@ -721,11 +721,11 @@ - } - - /* Analyzes the behavior of the memory reference DR in the innermost loop or -- basic block that contains it. Returns true if analysis succeed or false -+ basic block that contains it. Returns true if analysis succeed or false - otherwise. */ - - bool --dr_analyze_innermost (struct data_reference *dr) -+dr_analyze_innermost (struct data_reference *dr, struct loop *nest) - { - gimple stmt = DR_STMT (dr); - struct loop *loop = loop_containing_stmt (stmt); -@@ -768,14 +768,25 @@ - } - else - base = build_fold_addr_expr (base); -+ - if (in_loop) - { - if (!simple_iv (loop, loop_containing_stmt (stmt), base, &base_iv, - false)) - { -- if (dump_file && (dump_flags & TDF_DETAILS)) -- fprintf (dump_file, "failed: evolution of base is not affine.\n"); -- return false; -+ if (nest) -+ { -+ if (dump_file && (dump_flags & TDF_DETAILS)) -+ fprintf (dump_file, "failed: evolution of base is not" -+ " affine.\n"); -+ return false; -+ } -+ else -+ { -+ base_iv.base = base; -+ base_iv.step = ssize_int (0); -+ base_iv.no_overflow = true; -+ } - } - } - else -@@ -800,10 +811,18 @@ - else if (!simple_iv (loop, loop_containing_stmt (stmt), - poffset, &offset_iv, false)) - { -- if (dump_file && (dump_flags & TDF_DETAILS)) -- fprintf (dump_file, "failed: evolution of offset is not" -- " affine.\n"); -- return false; -+ if (nest) -+ { -+ if (dump_file && (dump_flags & TDF_DETAILS)) -+ fprintf (dump_file, "failed: evolution of offset is not" -+ " affine.\n"); -+ return false; -+ } -+ else -+ { -+ offset_iv.base = poffset; -+ offset_iv.step = ssize_int (0); -+ } - } - } - -@@ -967,7 +986,7 @@ - DR_REF (dr) = memref; - DR_IS_READ (dr) = is_read; - -- dr_analyze_innermost (dr); -+ dr_analyze_innermost (dr, nest); - dr_analyze_indices (dr, nest, loop); - dr_analyze_alias (dr); - -@@ -991,6 +1010,48 @@ - return dr; - } - -+/* Check if OFFSET1 and OFFSET2 (DR_OFFSETs of some data-refs) are identical -+ expressions. */ -+static bool -+dr_equal_offsets_p1 (tree offset1, tree offset2) -+{ -+ bool res; -+ -+ STRIP_NOPS (offset1); -+ STRIP_NOPS (offset2); -+ -+ if (offset1 == offset2) -+ return true; -+ -+ if (TREE_CODE (offset1) != TREE_CODE (offset2) -+ || (!BINARY_CLASS_P (offset1) && !UNARY_CLASS_P (offset1))) -+ return false; -+ -+ res = dr_equal_offsets_p1 (TREE_OPERAND (offset1, 0), -+ TREE_OPERAND (offset2, 0)); -+ -+ if (!res || !BINARY_CLASS_P (offset1)) -+ return res; -+ -+ res = dr_equal_offsets_p1 (TREE_OPERAND (offset1, 1), -+ TREE_OPERAND (offset2, 1)); -+ -+ return res; -+} -+ -+/* Check if DRA and DRB have equal offsets. */ -+bool -+dr_equal_offsets_p (struct data_reference *dra, -+ struct data_reference *drb) -+{ -+ tree offset1, offset2; -+ -+ offset1 = DR_OFFSET (dra); -+ offset2 = DR_OFFSET (drb); -+ -+ return dr_equal_offsets_p1 (offset1, offset2); -+} -+ - /* Returns true if FNA == FNB. */ - - static bool -@@ -4294,7 +4355,7 @@ - DATAREFS. Returns chrec_dont_know when failing to analyze a - difficult case, returns NULL_TREE otherwise. */ - --static tree -+tree - find_data_references_in_bb (struct loop *loop, basic_block bb, - VEC (data_reference_p, heap) **datarefs) - { -@@ -5143,7 +5204,7 @@ - DR_STMT (dr) = stmt; - DR_REF (dr) = op0; - -- res = dr_analyze_innermost (dr) -+ res = dr_analyze_innermost (dr, loop_containing_stmt (stmt)) - && stride_of_unit_type_p (DR_STEP (dr), TREE_TYPE (op0)); - - free_data_ref (dr); -@@ -5183,7 +5244,7 @@ - - DR_STMT (dr) = stmt; - DR_REF (dr) = *ref->pos; -- dr_analyze_innermost (dr); -+ dr_analyze_innermost (dr, loop_containing_stmt (stmt)); - base_address = DR_BASE_ADDRESS (dr); - - if (!base_address) ---- a/src/gcc/tree-data-ref.h -+++ b/src/gcc/tree-data-ref.h -@@ -386,7 +386,7 @@ - DEF_VEC_ALLOC_O (data_ref_loc, heap); - - bool get_references_in_stmt (gimple, VEC (data_ref_loc, heap) **); --bool dr_analyze_innermost (struct data_reference *); -+bool dr_analyze_innermost (struct data_reference *, struct loop *); - extern bool compute_data_dependences_for_loop (struct loop *, bool, - VEC (loop_p, heap) **, - VEC (data_reference_p, heap) **, -@@ -426,10 +426,14 @@ - extern void compute_all_dependences (VEC (data_reference_p, heap) *, - VEC (ddr_p, heap) **, VEC (loop_p, heap) *, - bool); -+extern tree find_data_references_in_bb (struct loop *, basic_block, -+ VEC (data_reference_p, heap) **); - - extern void create_rdg_vertices (struct graph *, VEC (gimple, heap) *); - extern bool dr_may_alias_p (const struct data_reference *, - const struct data_reference *); -+extern bool dr_equal_offsets_p (struct data_reference *, -+ struct data_reference *); - - - /* Return true when the base objects of data references A and B are ---- a/src/gcc/tree-eh.c -+++ b/src/gcc/tree-eh.c -@@ -2752,7 +2752,7 @@ - || gimple_call_lhs (twos) - || gimple_call_chain (ones) - || gimple_call_chain (twos) -- || !operand_equal_p (gimple_call_fn (ones), gimple_call_fn (twos), 0) -+ || !gimple_call_same_target_p (ones, twos) - || gimple_call_num_args (ones) != gimple_call_num_args (twos)) - return false; - ---- a/src/gcc/tree-if-conv.c -+++ b/src/gcc/tree-if-conv.c -@@ -464,8 +464,8 @@ - /* Returns true when the memory references of STMT are read or written - unconditionally. In other words, this function returns true when - for every data reference A in STMT there exist other accesses to -- the same data reference with predicates that add up (OR-up) to the -- true predicate: this ensures that the data reference A is touched -+ a data reference with the same base with predicates that add up (OR-up) to -+ the true predicate: this ensures that the data reference A is touched - (read or written) on every iteration of the if-converted loop. */ - - static bool -@@ -489,21 +489,38 @@ - continue; - - for (j = 0; VEC_iterate (data_reference_p, drs, j, b); j++) -- if (DR_STMT (b) != stmt -- && same_data_refs (a, b)) -- { -- tree cb = bb_predicate (gimple_bb (DR_STMT (b))); -- -- if (DR_RW_UNCONDITIONALLY (b) == 1 -- || is_true_predicate (cb) -- || is_true_predicate (ca = fold_or_predicates (EXPR_LOCATION (cb), -- ca, cb))) -- { -- DR_RW_UNCONDITIONALLY (a) = 1; -- DR_RW_UNCONDITIONALLY (b) = 1; -- found = true; -- break; -- } -+ { -+ tree ref_base_a = DR_REF (a); -+ tree ref_base_b = DR_REF (b); -+ -+ if (DR_STMT (b) == stmt) -+ continue; -+ -+ while (TREE_CODE (ref_base_a) == COMPONENT_REF -+ || TREE_CODE (ref_base_a) == IMAGPART_EXPR -+ || TREE_CODE (ref_base_a) == REALPART_EXPR) -+ ref_base_a = TREE_OPERAND (ref_base_a, 0); -+ -+ while (TREE_CODE (ref_base_b) == COMPONENT_REF -+ || TREE_CODE (ref_base_b) == IMAGPART_EXPR -+ || TREE_CODE (ref_base_b) == REALPART_EXPR) -+ ref_base_b = TREE_OPERAND (ref_base_b, 0); -+ -+ if (!operand_equal_p (ref_base_a, ref_base_b, 0)) -+ { -+ tree cb = bb_predicate (gimple_bb (DR_STMT (b))); -+ -+ if (DR_RW_UNCONDITIONALLY (b) == 1 -+ || is_true_predicate (cb) -+ || is_true_predicate (ca -+ = fold_or_predicates (EXPR_LOCATION (cb), ca, cb))) -+ { -+ DR_RW_UNCONDITIONALLY (a) = 1; -+ DR_RW_UNCONDITIONALLY (b) = 1; -+ found = true; -+ break; -+ } -+ } - } - - if (!found) ---- a/src/gcc/tree-inline.c -+++ b/src/gcc/tree-inline.c -@@ -3343,6 +3343,7 @@ - case DOT_PROD_EXPR: - case WIDEN_MULT_PLUS_EXPR: - case WIDEN_MULT_MINUS_EXPR: -+ case WIDEN_LSHIFT_EXPR: - - case VEC_WIDEN_MULT_HI_EXPR: - case VEC_WIDEN_MULT_LO_EXPR: -@@ -3357,6 +3358,8 @@ - case VEC_EXTRACT_ODD_EXPR: - case VEC_INTERLEAVE_HIGH_EXPR: - case VEC_INTERLEAVE_LOW_EXPR: -+ case VEC_WIDEN_LSHIFT_HI_EXPR: -+ case VEC_WIDEN_LSHIFT_LO_EXPR: - - return 1; - -@@ -3474,10 +3477,13 @@ - { - tree decl = gimple_call_fndecl (stmt); - tree addr = gimple_call_fn (stmt); -- tree funtype = TREE_TYPE (addr); -+ tree funtype = NULL_TREE; - bool stdarg = false; - -- if (POINTER_TYPE_P (funtype)) -+ if (addr) -+ funtype = TREE_TYPE (addr); -+ -+ if (funtype && POINTER_TYPE_P (funtype)) - funtype = TREE_TYPE (funtype); - - /* Do not special case builtins where we see the body. -@@ -3517,7 +3523,7 @@ - if (decl) - funtype = TREE_TYPE (decl); - -- if (!VOID_TYPE_P (TREE_TYPE (funtype))) -+ if (funtype && !VOID_TYPE_P (TREE_TYPE (funtype))) - cost += estimate_move_cost (TREE_TYPE (funtype)); - - if (funtype) ---- a/src/gcc/tree-loop-distribution.c -+++ b/src/gcc/tree-loop-distribution.c -@@ -267,7 +267,7 @@ - - DR_STMT (dr) = stmt; - DR_REF (dr) = op0; -- res = dr_analyze_innermost (dr); -+ res = dr_analyze_innermost (dr, loop_containing_stmt (stmt)); - gcc_assert (res && stride_of_unit_type_p (DR_STEP (dr), TREE_TYPE (op0))); - - nb_bytes = build_size_arg_loc (loc, nb_iter, op0, &stmt_list); ---- a/src/gcc/tree-object-size.c -+++ b/src/gcc/tree-object-size.c -@@ -175,7 +175,7 @@ - unsigned HOST_WIDE_INT sz; - - if (!osi || (object_size_type & 1) != 0 -- || TREE_CODE (pt_var) != SSA_NAME) -+ || TREE_CODE (TREE_OPERAND (pt_var, 0)) != SSA_NAME) - { - sz = compute_builtin_object_size (TREE_OPERAND (pt_var, 0), - object_size_type & ~1); ---- a/src/gcc/tree-predcom.c -+++ b/src/gcc/tree-predcom.c -@@ -1114,7 +1114,7 @@ - memset (&init_dr, 0, sizeof (struct data_reference)); - DR_REF (&init_dr) = init_ref; - DR_STMT (&init_dr) = phi; -- if (!dr_analyze_innermost (&init_dr)) -+ if (!dr_analyze_innermost (&init_dr, loop)) - return NULL; - - if (!valid_initializer_p (&init_dr, ref->distance + 1, root->ref)) ---- a/src/gcc/tree-pretty-print.c -+++ b/src/gcc/tree-pretty-print.c -@@ -1539,6 +1539,7 @@ - case RROTATE_EXPR: - case VEC_LSHIFT_EXPR: - case VEC_RSHIFT_EXPR: -+ case WIDEN_LSHIFT_EXPR: - case BIT_IOR_EXPR: - case BIT_XOR_EXPR: - case BIT_AND_EXPR: -@@ -2209,6 +2210,22 @@ - pp_string (buffer, " > "); - break; - -+ case VEC_WIDEN_LSHIFT_HI_EXPR: -+ pp_string (buffer, " VEC_WIDEN_LSHIFT_HI_EXPR < "); -+ dump_generic_node (buffer, TREE_OPERAND (node, 0), spc, flags, false); -+ pp_string (buffer, ", "); -+ dump_generic_node (buffer, TREE_OPERAND (node, 1), spc, flags, false); -+ pp_string (buffer, " > "); -+ break; -+ -+ case VEC_WIDEN_LSHIFT_LO_EXPR: -+ pp_string (buffer, " VEC_WIDEN_LSHIFT_HI_EXPR < "); -+ dump_generic_node (buffer, TREE_OPERAND (node, 0), spc, flags, false); -+ pp_string (buffer, ", "); -+ dump_generic_node (buffer, TREE_OPERAND (node, 1), spc, flags, false); -+ pp_string (buffer, " > "); -+ break; -+ - case VEC_UNPACK_HI_EXPR: - pp_string (buffer, " VEC_UNPACK_HI_EXPR < "); - dump_generic_node (buffer, TREE_OPERAND (node, 0), spc, flags, false); -@@ -2531,6 +2548,9 @@ - case RSHIFT_EXPR: - case LROTATE_EXPR: - case RROTATE_EXPR: -+ case VEC_WIDEN_LSHIFT_HI_EXPR: -+ case VEC_WIDEN_LSHIFT_LO_EXPR: -+ case WIDEN_LSHIFT_EXPR: - return 11; - - case WIDEN_SUM_EXPR: -@@ -2706,6 +2726,9 @@ - case VEC_RSHIFT_EXPR: - return "v>>"; - -+ case WIDEN_LSHIFT_EXPR: -+ return "w<<"; -+ - case POINTER_PLUS_EXPR: - return "+"; - ---- a/src/gcc/tree-ssa-ccp.c -+++ b/src/gcc/tree-ssa-ccp.c -@@ -522,10 +522,6 @@ - val = bit_value_binop (PLUS_EXPR, TREE_TYPE (expr), - TREE_OPERAND (base, 0), TREE_OPERAND (base, 1)); - else if (base -- /* ??? While function decls have DECL_ALIGN their addresses -- may encode extra information in the lower bits on some -- targets (PR47239). Simply punt for function decls for now. */ -- && TREE_CODE (base) != FUNCTION_DECL - && ((align = get_object_alignment (base, BIGGEST_ALIGNMENT)) - > BITS_PER_UNIT)) - { -@@ -1279,7 +1275,10 @@ - - case GIMPLE_CALL: - { -- tree fn = valueize_op (gimple_call_fn (stmt)); -+ tree fn = gimple_call_fn (stmt); -+ if (!fn) -+ return NULL_TREE; -+ fn = valueize_op (fn); - if (TREE_CODE (fn) == ADDR_EXPR - && TREE_CODE (TREE_OPERAND (fn, 0)) == FUNCTION_DECL - && DECL_BUILT_IN (TREE_OPERAND (fn, 0))) -@@ -2317,6 +2316,11 @@ - return true; - } - -+ /* Internal calls provide no argument types, so the extra laxity -+ for normal calls does not apply. */ -+ if (gimple_call_internal_p (stmt)) -+ return false; -+ - /* Propagate into the call arguments. Compared to replace_uses_in - this can use the argument slot types for type verification - instead of the current argument type. We also can safely ---- a/src/gcc/tree-ssa-dom.c -+++ b/src/gcc/tree-ssa-dom.c -@@ -64,7 +64,7 @@ - struct { enum tree_code op; tree opnd; } unary; - struct { enum tree_code op; tree opnd0, opnd1; } binary; - struct { enum tree_code op; tree opnd0, opnd1, opnd2; } ternary; -- struct { tree fn; bool pure; size_t nargs; tree *args; } call; -+ struct { gimple fn_from; bool pure; size_t nargs; tree *args; } call; - } ops; - }; - -@@ -257,7 +257,7 @@ - - expr->type = TREE_TYPE (gimple_call_lhs (stmt)); - expr->kind = EXPR_CALL; -- expr->ops.call.fn = gimple_call_fn (stmt); -+ expr->ops.call.fn_from = stmt; - - if (gimple_call_flags (stmt) & (ECF_CONST | ECF_PURE)) - expr->ops.call.pure = true; -@@ -421,8 +421,8 @@ - - /* If the calls are to different functions, then they - clearly cannot be equal. */ -- if (! operand_equal_p (expr0->ops.call.fn, -- expr1->ops.call.fn, 0)) -+ if (!gimple_call_same_target_p (expr0->ops.call.fn_from, -+ expr1->ops.call.fn_from)) - return false; - - if (! expr0->ops.call.pure) -@@ -502,9 +502,15 @@ - { - size_t i; - enum tree_code code = CALL_EXPR; -+ gimple fn_from; - - val = iterative_hash_object (code, val); -- val = iterative_hash_expr (expr->ops.call.fn, val); -+ fn_from = expr->ops.call.fn_from; -+ if (gimple_call_internal_p (fn_from)) -+ val = iterative_hash_hashval_t -+ ((hashval_t) gimple_call_internal_fn (fn_from), val); -+ else -+ val = iterative_hash_expr (gimple_call_fn (fn_from), val); - for (i = 0; i < expr->ops.call.nargs; i++) - val = iterative_hash_expr (expr->ops.call.args[i], val); - } -@@ -564,8 +570,14 @@ - { - size_t i; - size_t nargs = element->expr.ops.call.nargs; -+ gimple fn_from; - -- print_generic_expr (stream, element->expr.ops.call.fn, 0); -+ fn_from = element->expr.ops.call.fn_from; -+ if (gimple_call_internal_p (fn_from)) -+ fputs (internal_fn_name (gimple_call_internal_fn (fn_from)), -+ stream); -+ else -+ print_generic_expr (stream, gimple_call_fn (fn_from), 0); - fprintf (stream, " ("); - for (i = 0; i < nargs; i++) - { ---- a/src/gcc/tree-ssa-math-opts.c -+++ b/src/gcc/tree-ssa-math-opts.c -@@ -1266,39 +1266,67 @@ - } - }; - --/* Return true if RHS is a suitable operand for a widening multiplication. -+/* Build a gimple assignment to cast VAL to TARGET. Insert the statement -+ prior to GSI's current position, and return the fresh SSA name. */ -+ -+static tree -+build_and_insert_cast (gimple_stmt_iterator *gsi, location_t loc, -+ tree target, tree val) -+{ -+ tree result = make_ssa_name (target, NULL); -+ gimple stmt = gimple_build_assign_with_ops (CONVERT_EXPR, result, val, NULL); -+ gimple_set_location (stmt, loc); -+ gsi_insert_before (gsi, stmt, GSI_SAME_STMT); -+ return result; -+} -+ -+/* Return true if RHS is a suitable operand for a widening multiplication, -+ assuming a target type of TYPE. - There are two cases: - -- - RHS makes some value twice as wide. Store that value in *NEW_RHS_OUT -- if so, and store its type in *TYPE_OUT. -+ - RHS makes some value at least twice as wide. Store that value -+ in *NEW_RHS_OUT if so, and store its type in *TYPE_OUT. - - - RHS is an integer constant. Store that value in *NEW_RHS_OUT if so, - but leave *TYPE_OUT untouched. */ - - static bool --is_widening_mult_rhs_p (tree rhs, tree *type_out, tree *new_rhs_out) -+is_widening_mult_rhs_p (tree type, tree rhs, tree *type_out, -+ tree *new_rhs_out) - { - gimple stmt; -- tree type, type1, rhs1; -+ tree type1, rhs1; - enum tree_code rhs_code; - - if (TREE_CODE (rhs) == SSA_NAME) - { -- type = TREE_TYPE (rhs); - stmt = SSA_NAME_DEF_STMT (rhs); -- if (!is_gimple_assign (stmt)) -- return false; -+ if (is_gimple_assign (stmt)) -+ { -+ rhs_code = gimple_assign_rhs_code (stmt); -+ if (TREE_CODE (type) == INTEGER_TYPE -+ ? !CONVERT_EXPR_CODE_P (rhs_code) -+ : rhs_code != FIXED_CONVERT_EXPR) -+ rhs1 = rhs; -+ else -+ { -+ rhs1 = gimple_assign_rhs1 (stmt); - -- rhs_code = gimple_assign_rhs_code (stmt); -- if (TREE_CODE (type) == INTEGER_TYPE -- ? !CONVERT_EXPR_CODE_P (rhs_code) -- : rhs_code != FIXED_CONVERT_EXPR) -- return false; -+ if (TREE_CODE (rhs1) == INTEGER_CST) -+ { -+ *new_rhs_out = rhs1; -+ *type_out = NULL; -+ return true; -+ } -+ } -+ } -+ else -+ rhs1 = rhs; - -- rhs1 = gimple_assign_rhs1 (stmt); - type1 = TREE_TYPE (rhs1); -+ - if (TREE_CODE (type1) != TREE_CODE (type) -- || TYPE_PRECISION (type1) * 2 != TYPE_PRECISION (type)) -+ || TYPE_PRECISION (type1) * 2 > TYPE_PRECISION (type)) - return false; - - *new_rhs_out = rhs1; -@@ -1316,28 +1344,29 @@ - return false; - } - --/* Return true if STMT performs a widening multiplication. If so, -- store the unwidened types of the operands in *TYPE1_OUT and *TYPE2_OUT -- respectively. Also fill *RHS1_OUT and *RHS2_OUT such that converting -- those operands to types *TYPE1_OUT and *TYPE2_OUT would give the -- operands of the multiplication. */ -+/* Return true if STMT performs a widening multiplication, assuming the -+ output type is TYPE. If so, store the unwidened types of the operands -+ in *TYPE1_OUT and *TYPE2_OUT respectively. Also fill *RHS1_OUT and -+ *RHS2_OUT such that converting those operands to types *TYPE1_OUT -+ and *TYPE2_OUT would give the operands of the multiplication. */ - - static bool - is_widening_mult_p (gimple stmt, - tree *type1_out, tree *rhs1_out, - tree *type2_out, tree *rhs2_out) - { -- tree type; -+ tree type = TREE_TYPE (gimple_assign_lhs (stmt)); - -- type = TREE_TYPE (gimple_assign_lhs (stmt)); - if (TREE_CODE (type) != INTEGER_TYPE - && TREE_CODE (type) != FIXED_POINT_TYPE) - return false; - -- if (!is_widening_mult_rhs_p (gimple_assign_rhs1 (stmt), type1_out, rhs1_out)) -+ if (!is_widening_mult_rhs_p (type, gimple_assign_rhs1 (stmt), type1_out, -+ rhs1_out)) - return false; - -- if (!is_widening_mult_rhs_p (gimple_assign_rhs2 (stmt), type2_out, rhs2_out)) -+ if (!is_widening_mult_rhs_p (type, gimple_assign_rhs2 (stmt), type2_out, -+ rhs2_out)) - return false; - - if (*type1_out == NULL) -@@ -1354,6 +1383,18 @@ - *type2_out = *type1_out; - } - -+ /* Ensure that the larger of the two operands comes first. */ -+ if (TYPE_PRECISION (*type1_out) < TYPE_PRECISION (*type2_out)) -+ { -+ tree tmp; -+ tmp = *type1_out; -+ *type1_out = *type2_out; -+ *type2_out = tmp; -+ tmp = *rhs1_out; -+ *rhs1_out = *rhs2_out; -+ *rhs2_out = tmp; -+ } -+ - return true; - } - -@@ -1362,10 +1403,15 @@ - value is true iff we converted the statement. */ - - static bool --convert_mult_to_widen (gimple stmt) -+convert_mult_to_widen (gimple stmt, gimple_stmt_iterator *gsi) - { -- tree lhs, rhs1, rhs2, type, type1, type2; -+ tree lhs, rhs1, rhs2, type, type1, type2, tmp = NULL; - enum insn_code handler; -+ enum machine_mode to_mode, from_mode, actual_mode; -+ optab op; -+ int actual_precision; -+ location_t loc = gimple_location (stmt); -+ bool from_unsigned1, from_unsigned2; - - lhs = gimple_assign_lhs (stmt); - type = TREE_TYPE (lhs); -@@ -1375,18 +1421,82 @@ - if (!is_widening_mult_p (stmt, &type1, &rhs1, &type2, &rhs2)) - return false; - -- if (TYPE_UNSIGNED (type1) && TYPE_UNSIGNED (type2)) -- handler = optab_handler (umul_widen_optab, TYPE_MODE (type)); -- else if (!TYPE_UNSIGNED (type1) && !TYPE_UNSIGNED (type2)) -- handler = optab_handler (smul_widen_optab, TYPE_MODE (type)); -+ to_mode = TYPE_MODE (type); -+ from_mode = TYPE_MODE (type1); -+ from_unsigned1 = TYPE_UNSIGNED (type1); -+ from_unsigned2 = TYPE_UNSIGNED (type2); -+ -+ if (from_unsigned1 && from_unsigned2) -+ op = umul_widen_optab; -+ else if (!from_unsigned1 && !from_unsigned2) -+ op = smul_widen_optab; - else -- handler = optab_handler (usmul_widen_optab, TYPE_MODE (type)); -+ op = usmul_widen_optab; -+ -+ handler = find_widening_optab_handler_and_mode (op, to_mode, from_mode, -+ 0, &actual_mode); - - if (handler == CODE_FOR_nothing) -- return false; -+ { -+ if (op != smul_widen_optab) -+ { -+ /* We can use a signed multiply with unsigned types as long as -+ there is a wider mode to use, or it is the smaller of the two -+ types that is unsigned. Note that type1 >= type2, always. */ -+ if ((TYPE_UNSIGNED (type1) -+ && TYPE_PRECISION (type1) == GET_MODE_PRECISION (from_mode)) -+ || (TYPE_UNSIGNED (type2) -+ && TYPE_PRECISION (type2) == GET_MODE_PRECISION (from_mode))) -+ { -+ from_mode = GET_MODE_WIDER_MODE (from_mode); -+ if (GET_MODE_SIZE (to_mode) <= GET_MODE_SIZE (from_mode)) -+ return false; -+ } -+ -+ op = smul_widen_optab; -+ handler = find_widening_optab_handler_and_mode (op, to_mode, -+ from_mode, 0, -+ &actual_mode); -+ -+ if (handler == CODE_FOR_nothing) -+ return false; - -- gimple_assign_set_rhs1 (stmt, fold_convert (type1, rhs1)); -- gimple_assign_set_rhs2 (stmt, fold_convert (type2, rhs2)); -+ from_unsigned1 = from_unsigned2 = false; -+ } -+ else -+ return false; -+ } -+ -+ /* Ensure that the inputs to the handler are in the correct precison -+ for the opcode. This will be the full mode size. */ -+ actual_precision = GET_MODE_PRECISION (actual_mode); -+ if (actual_precision != TYPE_PRECISION (type1) -+ || from_unsigned1 != TYPE_UNSIGNED (type1)) -+ { -+ tmp = create_tmp_var (build_nonstandard_integer_type -+ (actual_precision, from_unsigned1), -+ NULL); -+ rhs1 = build_and_insert_cast (gsi, loc, tmp, rhs1); -+ } -+ if (actual_precision != TYPE_PRECISION (type2) -+ || from_unsigned2 != TYPE_UNSIGNED (type2)) -+ { -+ /* Reuse the same type info, if possible. */ -+ if (!tmp || from_unsigned1 != from_unsigned2) -+ tmp = create_tmp_var (build_nonstandard_integer_type -+ (actual_precision, from_unsigned2), -+ NULL); -+ rhs2 = build_and_insert_cast (gsi, loc, tmp, rhs2); -+ } -+ -+ /* Handle constants. */ -+ if (TREE_CODE (rhs1) == INTEGER_CST) -+ rhs1 = fold_convert (type1, rhs1); -+ if (TREE_CODE (rhs2) == INTEGER_CST) -+ rhs2 = fold_convert (type2, rhs2); -+ -+ gimple_assign_set_rhs1 (stmt, rhs1); -+ gimple_assign_set_rhs2 (stmt, rhs2); - gimple_assign_set_rhs_code (stmt, WIDEN_MULT_EXPR); - update_stmt (stmt); - return true; -@@ -1403,11 +1513,17 @@ - enum tree_code code) - { - gimple rhs1_stmt = NULL, rhs2_stmt = NULL; -- tree type, type1, type2; -+ gimple conv1_stmt = NULL, conv2_stmt = NULL, conv_stmt; -+ tree type, type1, type2, optype, tmp = NULL; - tree lhs, rhs1, rhs2, mult_rhs1, mult_rhs2, add_rhs; - enum tree_code rhs1_code = ERROR_MARK, rhs2_code = ERROR_MARK; - optab this_optab; - enum tree_code wmult_code; -+ enum insn_code handler; -+ enum machine_mode to_mode, from_mode, actual_mode; -+ location_t loc = gimple_location (stmt); -+ int actual_precision; -+ bool from_unsigned1, from_unsigned2; - - lhs = gimple_assign_lhs (stmt); - type = TREE_TYPE (lhs); -@@ -1429,8 +1545,6 @@ - if (is_gimple_assign (rhs1_stmt)) - rhs1_code = gimple_assign_rhs_code (rhs1_stmt); - } -- else -- return false; - - if (TREE_CODE (rhs2) == SSA_NAME) - { -@@ -1438,57 +1552,160 @@ - if (is_gimple_assign (rhs2_stmt)) - rhs2_code = gimple_assign_rhs_code (rhs2_stmt); - } -- else -- return false; - -- if (code == PLUS_EXPR && rhs1_code == MULT_EXPR) -+ /* Allow for one conversion statement between the multiply -+ and addition/subtraction statement. If there are more than -+ one conversions then we assume they would invalidate this -+ transformation. If that's not the case then they should have -+ been folded before now. */ -+ if (CONVERT_EXPR_CODE_P (rhs1_code)) -+ { -+ conv1_stmt = rhs1_stmt; -+ rhs1 = gimple_assign_rhs1 (rhs1_stmt); -+ if (TREE_CODE (rhs1) == SSA_NAME) -+ { -+ rhs1_stmt = SSA_NAME_DEF_STMT (rhs1); -+ if (is_gimple_assign (rhs1_stmt)) -+ rhs1_code = gimple_assign_rhs_code (rhs1_stmt); -+ } -+ else -+ return false; -+ } -+ if (CONVERT_EXPR_CODE_P (rhs2_code)) -+ { -+ conv2_stmt = rhs2_stmt; -+ rhs2 = gimple_assign_rhs1 (rhs2_stmt); -+ if (TREE_CODE (rhs2) == SSA_NAME) -+ { -+ rhs2_stmt = SSA_NAME_DEF_STMT (rhs2); -+ if (is_gimple_assign (rhs2_stmt)) -+ rhs2_code = gimple_assign_rhs_code (rhs2_stmt); -+ } -+ else -+ return false; -+ } -+ -+ /* If code is WIDEN_MULT_EXPR then it would seem unnecessary to call -+ is_widening_mult_p, but we still need the rhs returns. -+ -+ It might also appear that it would be sufficient to use the existing -+ operands of the widening multiply, but that would limit the choice of -+ multiply-and-accumulate instructions. */ -+ if (code == PLUS_EXPR -+ && (rhs1_code == MULT_EXPR || rhs1_code == WIDEN_MULT_EXPR)) - { - if (!is_widening_mult_p (rhs1_stmt, &type1, &mult_rhs1, - &type2, &mult_rhs2)) - return false; - add_rhs = rhs2; -+ conv_stmt = conv1_stmt; - } -- else if (rhs2_code == MULT_EXPR) -+ else if (rhs2_code == MULT_EXPR || rhs2_code == WIDEN_MULT_EXPR) - { - if (!is_widening_mult_p (rhs2_stmt, &type1, &mult_rhs1, - &type2, &mult_rhs2)) - return false; - add_rhs = rhs1; -- } -- else if (code == PLUS_EXPR && rhs1_code == WIDEN_MULT_EXPR) -- { -- mult_rhs1 = gimple_assign_rhs1 (rhs1_stmt); -- mult_rhs2 = gimple_assign_rhs2 (rhs1_stmt); -- type1 = TREE_TYPE (mult_rhs1); -- type2 = TREE_TYPE (mult_rhs2); -- add_rhs = rhs2; -- } -- else if (rhs2_code == WIDEN_MULT_EXPR) -- { -- mult_rhs1 = gimple_assign_rhs1 (rhs2_stmt); -- mult_rhs2 = gimple_assign_rhs2 (rhs2_stmt); -- type1 = TREE_TYPE (mult_rhs1); -- type2 = TREE_TYPE (mult_rhs2); -- add_rhs = rhs1; -+ conv_stmt = conv2_stmt; - } - else - return false; - -- if (TYPE_UNSIGNED (type1) != TYPE_UNSIGNED (type2)) -- return false; -+ to_mode = TYPE_MODE (type); -+ from_mode = TYPE_MODE (type1); -+ from_unsigned1 = TYPE_UNSIGNED (type1); -+ from_unsigned2 = TYPE_UNSIGNED (type2); -+ -+ /* There's no such thing as a mixed sign madd yet, so use a wider mode. */ -+ if (from_unsigned1 != from_unsigned2) -+ { -+ /* We can use a signed multiply with unsigned types as long as -+ there is a wider mode to use, or it is the smaller of the two -+ types that is unsigned. Note that type1 >= type2, always. */ -+ if ((from_unsigned1 -+ && TYPE_PRECISION (type1) == GET_MODE_PRECISION (from_mode)) -+ || (from_unsigned2 -+ && TYPE_PRECISION (type2) == GET_MODE_PRECISION (from_mode))) -+ { -+ from_mode = GET_MODE_WIDER_MODE (from_mode); -+ if (GET_MODE_SIZE (from_mode) >= GET_MODE_SIZE (to_mode)) -+ return false; -+ } -+ -+ from_unsigned1 = from_unsigned2 = false; -+ } -+ -+ /* If there was a conversion between the multiply and addition -+ then we need to make sure it fits a multiply-and-accumulate. -+ The should be a single mode change which does not change the -+ value. */ -+ if (conv_stmt) -+ { -+ /* We use the original, unmodified data types for this. */ -+ tree from_type = TREE_TYPE (gimple_assign_rhs1 (conv_stmt)); -+ tree to_type = TREE_TYPE (gimple_assign_lhs (conv_stmt)); -+ int data_size = TYPE_PRECISION (type1) + TYPE_PRECISION (type2); -+ bool is_unsigned = TYPE_UNSIGNED (type1) && TYPE_UNSIGNED (type2); -+ -+ if (TYPE_PRECISION (from_type) > TYPE_PRECISION (to_type)) -+ { -+ /* Conversion is a truncate. */ -+ if (TYPE_PRECISION (to_type) < data_size) -+ return false; -+ } -+ else if (TYPE_PRECISION (from_type) < TYPE_PRECISION (to_type)) -+ { -+ /* Conversion is an extend. Check it's the right sort. */ -+ if (TYPE_UNSIGNED (from_type) != is_unsigned -+ && !(is_unsigned && TYPE_PRECISION (from_type) > data_size)) -+ return false; -+ } -+ /* else convert is a no-op for our purposes. */ -+ } - - /* Verify that the machine can perform a widening multiply - accumulate in this mode/signedness combination, otherwise - this transformation is likely to pessimize code. */ -- this_optab = optab_for_tree_code (wmult_code, type1, optab_default); -- if (optab_handler (this_optab, TYPE_MODE (type)) == CODE_FOR_nothing) -+ optype = build_nonstandard_integer_type (from_mode, from_unsigned1); -+ this_optab = optab_for_tree_code (wmult_code, optype, optab_default); -+ handler = find_widening_optab_handler_and_mode (this_optab, to_mode, -+ from_mode, 0, &actual_mode); -+ -+ if (handler == CODE_FOR_nothing) - return false; - -- /* ??? May need some type verification here? */ -+ /* Ensure that the inputs to the handler are in the correct precison -+ for the opcode. This will be the full mode size. */ -+ actual_precision = GET_MODE_PRECISION (actual_mode); -+ if (actual_precision != TYPE_PRECISION (type1) -+ || from_unsigned1 != TYPE_UNSIGNED (type1)) -+ { -+ tmp = create_tmp_var (build_nonstandard_integer_type -+ (actual_precision, from_unsigned1), -+ NULL); -+ mult_rhs1 = build_and_insert_cast (gsi, loc, tmp, mult_rhs1); -+ } -+ if (actual_precision != TYPE_PRECISION (type2) -+ || from_unsigned2 != TYPE_UNSIGNED (type2)) -+ { -+ if (!tmp || from_unsigned1 != from_unsigned2) -+ tmp = create_tmp_var (build_nonstandard_integer_type -+ (actual_precision, from_unsigned2), -+ NULL); -+ mult_rhs2 = build_and_insert_cast (gsi, loc, tmp, mult_rhs2); -+ } -+ -+ if (!useless_type_conversion_p (type, TREE_TYPE (add_rhs))) -+ add_rhs = build_and_insert_cast (gsi, loc, create_tmp_var (type, NULL), -+ add_rhs); -+ -+ /* Handle constants. */ -+ if (TREE_CODE (mult_rhs1) == INTEGER_CST) -+ mult_rhs1 = fold_convert (type1, mult_rhs1); -+ if (TREE_CODE (mult_rhs2) == INTEGER_CST) -+ mult_rhs2 = fold_convert (type2, mult_rhs2); - -- gimple_assign_set_rhs_with_ops_1 (gsi, wmult_code, -- fold_convert (type1, mult_rhs1), -- fold_convert (type2, mult_rhs2), -+ gimple_assign_set_rhs_with_ops_1 (gsi, wmult_code, mult_rhs1, mult_rhs2, - add_rhs); - update_stmt (gsi_stmt (*gsi)); - return true; -@@ -1696,7 +1913,7 @@ - switch (code) - { - case MULT_EXPR: -- if (!convert_mult_to_widen (stmt) -+ if (!convert_mult_to_widen (stmt, &gsi) - && convert_mult_to_fma (stmt, - gimple_assign_rhs1 (stmt), - gimple_assign_rhs2 (stmt))) ---- a/src/gcc/tree-ssa-phiopt.c -+++ b/src/gcc/tree-ssa-phiopt.c -@@ -34,6 +34,8 @@ - #include "langhooks.h" - #include "pointer-set.h" - #include "domwalk.h" -+#include "cfgloop.h" -+#include "tree-data-ref.h" - - static unsigned int tree_ssa_phiopt (void); - static unsigned int tree_ssa_phiopt_worker (bool); -@@ -1292,35 +1294,18 @@ - return true; - } - --/* Do the main work of conditional store replacement. We already know -- that the recognized pattern looks like so: -- -- split: -- if (cond) goto THEN_BB; else goto ELSE_BB (edge E1) -- THEN_BB: -- X = Y; -- goto JOIN_BB; -- ELSE_BB: -- X = Z; -- fallthrough (edge E0) -- JOIN_BB: -- some more -- -- We check that THEN_BB and ELSE_BB contain only one store -- that the stores have a "simple" RHS. */ -+/* Do the main work of conditional store replacement. */ - - static bool --cond_if_else_store_replacement (basic_block then_bb, basic_block else_bb, -- basic_block join_bb) -+cond_if_else_store_replacement_1 (basic_block then_bb, basic_block else_bb, -+ basic_block join_bb, gimple then_assign, -+ gimple else_assign) - { -- gimple then_assign = last_and_only_stmt (then_bb); -- gimple else_assign = last_and_only_stmt (else_bb); - tree lhs_base, lhs, then_rhs, else_rhs; - source_location then_locus, else_locus; - gimple_stmt_iterator gsi; - gimple newphi, new_stmt; - -- /* Check if then_bb and else_bb contain only one store each. */ - if (then_assign == NULL - || !gimple_assign_single_p (then_assign) - || else_assign == NULL -@@ -1385,6 +1370,190 @@ - return true; - } - -+/* Conditional store replacement. We already know -+ that the recognized pattern looks like so: -+ -+ split: -+ if (cond) goto THEN_BB; else goto ELSE_BB (edge E1) -+ THEN_BB: -+ ... -+ X = Y; -+ ... -+ goto JOIN_BB; -+ ELSE_BB: -+ ... -+ X = Z; -+ ... -+ fallthrough (edge E0) -+ JOIN_BB: -+ some more -+ -+ We check that it is safe to sink the store to JOIN_BB by verifying that -+ there are no read-after-write or write-after-write dependencies in -+ THEN_BB and ELSE_BB. */ -+ -+static bool -+cond_if_else_store_replacement (basic_block then_bb, basic_block else_bb, -+ basic_block join_bb) -+{ -+ gimple then_assign = last_and_only_stmt (then_bb); -+ gimple else_assign = last_and_only_stmt (else_bb); -+ VEC (data_reference_p, heap) *then_datarefs, *else_datarefs; -+ VEC (ddr_p, heap) *then_ddrs, *else_ddrs; -+ gimple then_store, else_store; -+ bool found, ok = false, res; -+ struct data_dependence_relation *ddr; -+ data_reference_p then_dr, else_dr; -+ int i, j; -+ tree then_lhs, else_lhs; -+ VEC (gimple, heap) *then_stores, *else_stores; -+ basic_block blocks[3]; -+ -+ if (MAX_STORES_TO_SINK == 0) -+ return false; -+ -+ /* Handle the case with single statement in THEN_BB and ELSE_BB. */ -+ if (then_assign && else_assign) -+ return cond_if_else_store_replacement_1 (then_bb, else_bb, join_bb, -+ then_assign, else_assign); -+ -+ /* Find data references. */ -+ then_datarefs = VEC_alloc (data_reference_p, heap, 1); -+ else_datarefs = VEC_alloc (data_reference_p, heap, 1); -+ if ((find_data_references_in_bb (NULL, then_bb, &then_datarefs) -+ == chrec_dont_know) -+ || !VEC_length (data_reference_p, then_datarefs) -+ || (find_data_references_in_bb (NULL, else_bb, &else_datarefs) -+ == chrec_dont_know) -+ || !VEC_length (data_reference_p, else_datarefs)) -+ { -+ free_data_refs (then_datarefs); -+ free_data_refs (else_datarefs); -+ return false; -+ } -+ -+ /* Find pairs of stores with equal LHS. */ -+ then_stores = VEC_alloc (gimple, heap, 1); -+ else_stores = VEC_alloc (gimple, heap, 1); -+ FOR_EACH_VEC_ELT (data_reference_p, then_datarefs, i, then_dr) -+ { -+ if (DR_IS_READ (then_dr)) -+ continue; -+ -+ then_store = DR_STMT (then_dr); -+ then_lhs = gimple_assign_lhs (then_store); -+ found = false; -+ -+ FOR_EACH_VEC_ELT (data_reference_p, else_datarefs, j, else_dr) -+ { -+ if (DR_IS_READ (else_dr)) -+ continue; -+ -+ else_store = DR_STMT (else_dr); -+ else_lhs = gimple_assign_lhs (else_store); -+ -+ if (operand_equal_p (then_lhs, else_lhs, 0)) -+ { -+ found = true; -+ break; -+ } -+ } -+ -+ if (!found) -+ continue; -+ -+ VEC_safe_push (gimple, heap, then_stores, then_store); -+ VEC_safe_push (gimple, heap, else_stores, else_store); -+ } -+ -+ /* No pairs of stores found. */ -+ if (!VEC_length (gimple, then_stores) -+ || VEC_length (gimple, then_stores) > (unsigned) MAX_STORES_TO_SINK) -+ { -+ free_data_refs (then_datarefs); -+ free_data_refs (else_datarefs); -+ VEC_free (gimple, heap, then_stores); -+ VEC_free (gimple, heap, else_stores); -+ return false; -+ } -+ -+ /* Compute and check data dependencies in both basic blocks. */ -+ then_ddrs = VEC_alloc (ddr_p, heap, 1); -+ else_ddrs = VEC_alloc (ddr_p, heap, 1); -+ compute_all_dependences (then_datarefs, &then_ddrs, NULL, false); -+ compute_all_dependences (else_datarefs, &else_ddrs, NULL, false); -+ blocks[0] = then_bb; -+ blocks[1] = else_bb; -+ blocks[2] = join_bb; -+ renumber_gimple_stmt_uids_in_blocks (blocks, 3); -+ -+ /* Check that there are no read-after-write or write-after-write dependencies -+ in THEN_BB. */ -+ FOR_EACH_VEC_ELT (ddr_p, then_ddrs, i, ddr) -+ { -+ struct data_reference *dra = DDR_A (ddr); -+ struct data_reference *drb = DDR_B (ddr); -+ -+ if (DDR_ARE_DEPENDENT (ddr) != chrec_known -+ && ((DR_IS_READ (dra) && DR_IS_WRITE (drb) -+ && gimple_uid (DR_STMT (dra)) > gimple_uid (DR_STMT (drb))) -+ || (DR_IS_READ (drb) && DR_IS_WRITE (dra) -+ && gimple_uid (DR_STMT (drb)) > gimple_uid (DR_STMT (dra))) -+ || (DR_IS_WRITE (dra) && DR_IS_WRITE (drb)))) -+ { -+ free_dependence_relations (then_ddrs); -+ free_dependence_relations (else_ddrs); -+ free_data_refs (then_datarefs); -+ free_data_refs (else_datarefs); -+ VEC_free (gimple, heap, then_stores); -+ VEC_free (gimple, heap, else_stores); -+ return false; -+ } -+ } -+ -+ /* Check that there are no read-after-write or write-after-write dependencies -+ in ELSE_BB. */ -+ FOR_EACH_VEC_ELT (ddr_p, else_ddrs, i, ddr) -+ { -+ struct data_reference *dra = DDR_A (ddr); -+ struct data_reference *drb = DDR_B (ddr); -+ -+ if (DDR_ARE_DEPENDENT (ddr) != chrec_known -+ && ((DR_IS_READ (dra) && DR_IS_WRITE (drb) -+ && gimple_uid (DR_STMT (dra)) > gimple_uid (DR_STMT (drb))) -+ || (DR_IS_READ (drb) && DR_IS_WRITE (dra) -+ && gimple_uid (DR_STMT (drb)) > gimple_uid (DR_STMT (dra))) -+ || (DR_IS_WRITE (dra) && DR_IS_WRITE (drb)))) -+ { -+ free_dependence_relations (then_ddrs); -+ free_dependence_relations (else_ddrs); -+ free_data_refs (then_datarefs); -+ free_data_refs (else_datarefs); -+ VEC_free (gimple, heap, then_stores); -+ VEC_free (gimple, heap, else_stores); -+ return false; -+ } -+ } -+ -+ /* Sink stores with same LHS. */ -+ FOR_EACH_VEC_ELT (gimple, then_stores, i, then_store) -+ { -+ else_store = VEC_index (gimple, else_stores, i); -+ res = cond_if_else_store_replacement_1 (then_bb, else_bb, join_bb, -+ then_store, else_store); -+ ok = ok || res; -+ } -+ -+ free_dependence_relations (then_ddrs); -+ free_dependence_relations (else_ddrs); -+ free_data_refs (then_datarefs); -+ free_data_refs (else_datarefs); -+ VEC_free (gimple, heap, then_stores); -+ VEC_free (gimple, heap, else_stores); -+ -+ return ok; -+} -+ - /* Always do these optimizations if we have SSA - trees to work on. */ - static bool ---- a/src/gcc/tree-ssa-pre.c -+++ b/src/gcc/tree-ssa-pre.c -@@ -2657,11 +2657,13 @@ - } - - /* Return true if we can value number the call in STMT. This is true -- if we have a pure or constant call. */ -+ if we have a pure or constant call to a real function. */ - - static bool - can_value_number_call (gimple stmt) - { -+ if (gimple_call_internal_p (stmt)) -+ return false; - if (gimple_call_flags (stmt) & (ECF_PURE | ECF_CONST)) - return true; - return false; -@@ -4190,6 +4192,7 @@ - gimple_stmt_iterator gsi; - gimple stmt; - unsigned i; -+ tree fn; - - FOR_EACH_BB (b) - { -@@ -4381,9 +4384,10 @@ - /* Visit indirect calls and turn them into direct calls if - possible. */ - if (is_gimple_call (stmt) -- && TREE_CODE (gimple_call_fn (stmt)) == SSA_NAME) -+ && (fn = gimple_call_fn (stmt)) -+ && TREE_CODE (fn) == SSA_NAME) - { -- tree fn = VN_INFO (gimple_call_fn (stmt))->valnum; -+ fn = VN_INFO (fn)->valnum; - if (TREE_CODE (fn) == ADDR_EXPR - && TREE_CODE (TREE_OPERAND (fn, 0)) == FUNCTION_DECL) - { ---- a/src/gcc/tree-ssa-sccvn.c -+++ b/src/gcc/tree-ssa-sccvn.c -@@ -2982,7 +2982,8 @@ - /* ??? We should handle stores from calls. */ - else if (TREE_CODE (lhs) == SSA_NAME) - { -- if (gimple_call_flags (stmt) & (ECF_PURE | ECF_CONST)) -+ if (!gimple_call_internal_p (stmt) -+ && gimple_call_flags (stmt) & (ECF_PURE | ECF_CONST)) - changed = visit_reference_op_call (lhs, stmt); - else - changed = defs_to_varying (stmt); ---- a/src/gcc/tree-ssa-structalias.c -+++ b/src/gcc/tree-ssa-structalias.c -@@ -4328,6 +4328,7 @@ - /* Fallthru to general call handling. */; - } - if (!in_ipa_mode -+ || gimple_call_internal_p (t) - || (fndecl - && (!(fi = lookup_vi_for_tree (fndecl)) - || !fi->is_fn_info))) ---- a/src/gcc/tree-vect-data-refs.c -+++ b/src/gcc/tree-vect-data-refs.c -@@ -43,6 +43,45 @@ - #include "expr.h" - #include "optabs.h" - -+/* Return true if load- or store-lanes optab OPTAB is implemented for -+ COUNT vectors of type VECTYPE. NAME is the name of OPTAB. */ -+ -+static bool -+vect_lanes_optab_supported_p (const char *name, convert_optab optab, -+ tree vectype, unsigned HOST_WIDE_INT count) -+{ -+ enum machine_mode mode, array_mode; -+ bool limit_p; -+ -+ mode = TYPE_MODE (vectype); -+ limit_p = !targetm.array_mode_supported_p (mode, count); -+ array_mode = mode_for_size (count * GET_MODE_BITSIZE (mode), -+ MODE_INT, limit_p); -+ -+ if (array_mode == BLKmode) -+ { -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ fprintf (vect_dump, "no array mode for %s[" HOST_WIDE_INT_PRINT_DEC "]", -+ GET_MODE_NAME (mode), count); -+ return false; -+ } -+ -+ if (convert_optab_handler (optab, array_mode, mode) == CODE_FOR_nothing) -+ { -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ fprintf (vect_dump, "cannot use %s<%s><%s>", -+ name, GET_MODE_NAME (array_mode), GET_MODE_NAME (mode)); -+ return false; -+ } -+ -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ fprintf (vect_dump, "can use %s<%s><%s>", -+ name, GET_MODE_NAME (array_mode), GET_MODE_NAME (mode)); -+ -+ return true; -+} -+ -+ - /* Return the smallest scalar part of STMT. - This is used to determine the vectype of the stmt. We generally set the - vectype according to the type of the result (lhs). For stmts whose -@@ -289,39 +328,6 @@ - } - } - -- --/* Function vect_equal_offsets. -- -- Check if OFFSET1 and OFFSET2 are identical expressions. */ -- --static bool --vect_equal_offsets (tree offset1, tree offset2) --{ -- bool res; -- -- STRIP_NOPS (offset1); -- STRIP_NOPS (offset2); -- -- if (offset1 == offset2) -- return true; -- -- if (TREE_CODE (offset1) != TREE_CODE (offset2) -- || (!BINARY_CLASS_P (offset1) && !UNARY_CLASS_P (offset1))) -- return false; -- -- res = vect_equal_offsets (TREE_OPERAND (offset1, 0), -- TREE_OPERAND (offset2, 0)); -- -- if (!res || !BINARY_CLASS_P (offset1)) -- return res; -- -- res = vect_equal_offsets (TREE_OPERAND (offset1, 1), -- TREE_OPERAND (offset2, 1)); -- -- return res; --} -- -- - /* Check dependence between DRA and DRB for basic block vectorization. - If the accesses share same bases and offsets, we can compare their initial - constant offsets to decide whether they differ or not. In case of a read- -@@ -347,12 +353,8 @@ - - /* Check that the data-refs have same bases and offsets. If not, we can't - determine if they are dependent. */ -- if ((DR_BASE_ADDRESS (dra) != DR_BASE_ADDRESS (drb) -- && (TREE_CODE (DR_BASE_ADDRESS (dra)) != ADDR_EXPR -- || TREE_CODE (DR_BASE_ADDRESS (drb)) != ADDR_EXPR -- || TREE_OPERAND (DR_BASE_ADDRESS (dra), 0) -- != TREE_OPERAND (DR_BASE_ADDRESS (drb),0))) -- || !vect_equal_offsets (DR_OFFSET (dra), DR_OFFSET (drb))) -+ if (!operand_equal_p (DR_BASE_ADDRESS (dra), DR_BASE_ADDRESS (drb), 0) -+ || !dr_equal_offsets_p (dra, drb)) - return true; - - /* Check the types. */ -@@ -397,12 +399,8 @@ - - /* Check that the data-refs have same first location (except init) and they - are both either store or load (not load and store). */ -- if ((DR_BASE_ADDRESS (dra) != DR_BASE_ADDRESS (drb) -- && (TREE_CODE (DR_BASE_ADDRESS (dra)) != ADDR_EXPR -- || TREE_CODE (DR_BASE_ADDRESS (drb)) != ADDR_EXPR -- || TREE_OPERAND (DR_BASE_ADDRESS (dra), 0) -- != TREE_OPERAND (DR_BASE_ADDRESS (drb),0))) -- || !vect_equal_offsets (DR_OFFSET (dra), DR_OFFSET (drb)) -+ if (!operand_equal_p (DR_BASE_ADDRESS (dra), DR_BASE_ADDRESS (drb), 0) -+ || !dr_equal_offsets_p (dra, drb) - || !tree_int_cst_compare (DR_INIT (dra), DR_INIT (drb)) - || DR_IS_READ (dra) != DR_IS_READ (drb)) - return false; -@@ -609,6 +607,11 @@ - if (vect_check_interleaving (dra, drb)) - return false; - -+ /* Read-read is OK (we need this check here, after checking for -+ interleaving). */ -+ if (DR_IS_READ (dra) && DR_IS_READ (drb)) -+ return false; -+ - if (vect_print_dump_info (REPORT_DR_DETAILS)) - { - fprintf (vect_dump, "can't determine dependence between "); -@@ -1250,7 +1253,9 @@ - vect_peel_info elem = (vect_peel_info) *slot; - vect_peel_extended_info max = (vect_peel_extended_info) data; - -- if (elem->count > max->peel_info.count) -+ if (elem->count > max->peel_info.count -+ || (elem->count == max->peel_info.count -+ && max->peel_info.npeel > elem->npeel)) - { - max->peel_info.npeel = elem->npeel; - max->peel_info.count = elem->count; -@@ -2256,19 +2261,6 @@ - return false; - } - -- /* FORNOW: we handle only interleaving that is a power of 2. -- We don't fail here if it may be still possible to vectorize the -- group using SLP. If not, the size of the group will be checked in -- vect_analyze_operations, and the vectorization will fail. */ -- if (exact_log2 (stride) == -1) -- { -- if (vect_print_dump_info (REPORT_DETAILS)) -- fprintf (vect_dump, "interleaving is not a power of 2"); -- -- if (slp_impossible) -- return false; -- } -- - if (stride == 0) - stride = count; - -@@ -2983,31 +2975,33 @@ - - /* Function vect_create_data_ref_ptr. - -- Create a new pointer to vector type (vp), that points to the first location -- accessed in the loop by STMT, along with the def-use update chain to -- appropriately advance the pointer through the loop iterations. Also set -- aliasing information for the pointer. This vector pointer is used by the -- callers to this function to create a memory reference expression for vector -- load/store access. -+ Create a new pointer-to-AGGR_TYPE variable (ap), that points to the first -+ location accessed in the loop by STMT, along with the def-use update -+ chain to appropriately advance the pointer through the loop iterations. -+ Also set aliasing information for the pointer. This pointer is used by -+ the callers to this function to create a memory reference expression for -+ vector load/store access. - - Input: - 1. STMT: a stmt that references memory. Expected to be of the form - GIMPLE_ASSIGN <name, data-ref> or - GIMPLE_ASSIGN <data-ref, name>. -- 2. AT_LOOP: the loop where the vector memref is to be created. -- 3. OFFSET (optional): an offset to be added to the initial address accessed -+ 2. AGGR_TYPE: the type of the reference, which should be either a vector -+ or an array. -+ 3. AT_LOOP: the loop where the vector memref is to be created. -+ 4. OFFSET (optional): an offset to be added to the initial address accessed - by the data-ref in STMT. -- 4. ONLY_INIT: indicate if vp is to be updated in the loop, or remain -+ 5. ONLY_INIT: indicate if vp is to be updated in the loop, or remain - pointing to the initial address. -- 5. TYPE: if not NULL indicates the required type of the data-ref. -+ 6. TYPE: if not NULL indicates the required type of the data-ref. - - Output: - 1. Declare a new ptr to vector_type, and have it point to the base of the - data reference (initial addressed accessed by the data reference). - For example, for vector of type V8HI, the following code is generated: - -- v8hi *vp; -- vp = (v8hi *)initial_address; -+ v8hi *ap; -+ ap = (v8hi *)initial_address; - - if OFFSET is not supplied: - initial_address = &a[init]; -@@ -3027,7 +3021,7 @@ - 4. Return the pointer. */ - - tree --vect_create_data_ref_ptr (gimple stmt, struct loop *at_loop, -+vect_create_data_ref_ptr (gimple stmt, tree aggr_type, struct loop *at_loop, - tree offset, tree *initial_address, gimple *ptr_incr, - bool only_init, bool *inv_p) - { -@@ -3037,17 +3031,16 @@ - struct loop *loop = NULL; - bool nested_in_vect_loop = false; - struct loop *containing_loop = NULL; -- tree vectype = STMT_VINFO_VECTYPE (stmt_info); -- tree vect_ptr_type; -- tree vect_ptr; -+ tree aggr_ptr_type; -+ tree aggr_ptr; - tree new_temp; - gimple vec_stmt; - gimple_seq new_stmt_list = NULL; - edge pe = NULL; - basic_block new_bb; -- tree vect_ptr_init; -+ tree aggr_ptr_init; - struct data_reference *dr = STMT_VINFO_DATA_REF (stmt_info); -- tree vptr; -+ tree aptr; - gimple_stmt_iterator incr_gsi; - bool insert_after; - bool negative; -@@ -3058,6 +3051,9 @@ - gimple_stmt_iterator gsi = gsi_for_stmt (stmt); - tree base; - -+ gcc_assert (TREE_CODE (aggr_type) == ARRAY_TYPE -+ || TREE_CODE (aggr_type) == VECTOR_TYPE); -+ - if (loop_vinfo) - { - loop = LOOP_VINFO_LOOP (loop_vinfo); -@@ -3092,8 +3088,9 @@ - if (vect_print_dump_info (REPORT_DETAILS)) - { - tree data_ref_base = base_name; -- fprintf (vect_dump, "create vector-pointer variable to type: "); -- print_generic_expr (vect_dump, vectype, TDF_SLIM); -+ fprintf (vect_dump, "create %s-pointer variable to type: ", -+ tree_code_name[(int) TREE_CODE (aggr_type)]); -+ print_generic_expr (vect_dump, aggr_type, TDF_SLIM); - if (TREE_CODE (data_ref_base) == VAR_DECL - || TREE_CODE (data_ref_base) == ARRAY_REF) - fprintf (vect_dump, " vectorizing an array ref: "); -@@ -3104,27 +3101,28 @@ - print_generic_expr (vect_dump, base_name, TDF_SLIM); - } - -- /* (1) Create the new vector-pointer variable. */ -- vect_ptr_type = build_pointer_type (vectype); -+ /* (1) Create the new aggregate-pointer variable. */ -+ aggr_ptr_type = build_pointer_type (aggr_type); - base = get_base_address (DR_REF (dr)); - if (base - && TREE_CODE (base) == MEM_REF) -- vect_ptr_type -- = build_qualified_type (vect_ptr_type, -+ aggr_ptr_type -+ = build_qualified_type (aggr_ptr_type, - TYPE_QUALS (TREE_TYPE (TREE_OPERAND (base, 0)))); -- vect_ptr = vect_get_new_vect_var (vect_ptr_type, vect_pointer_var, -+ aggr_ptr = vect_get_new_vect_var (aggr_ptr_type, vect_pointer_var, - get_name (base_name)); - -- /* Vector types inherit the alias set of their component type by default so -- we need to use a ref-all pointer if the data reference does not conflict -- with the created vector data reference because it is not addressable. */ -- if (!alias_sets_conflict_p (get_deref_alias_set (vect_ptr), -+ /* Vector and array types inherit the alias set of their component -+ type by default so we need to use a ref-all pointer if the data -+ reference does not conflict with the created aggregated data -+ reference because it is not addressable. */ -+ if (!alias_sets_conflict_p (get_deref_alias_set (aggr_ptr), - get_alias_set (DR_REF (dr)))) - { -- vect_ptr_type -- = build_pointer_type_for_mode (vectype, -- TYPE_MODE (vect_ptr_type), true); -- vect_ptr = vect_get_new_vect_var (vect_ptr_type, vect_pointer_var, -+ aggr_ptr_type -+ = build_pointer_type_for_mode (aggr_type, -+ TYPE_MODE (aggr_ptr_type), true); -+ aggr_ptr = vect_get_new_vect_var (aggr_ptr_type, vect_pointer_var, - get_name (base_name)); - } - -@@ -3135,14 +3133,14 @@ - do - { - tree lhs = gimple_assign_lhs (orig_stmt); -- if (!alias_sets_conflict_p (get_deref_alias_set (vect_ptr), -+ if (!alias_sets_conflict_p (get_deref_alias_set (aggr_ptr), - get_alias_set (lhs))) - { -- vect_ptr_type -- = build_pointer_type_for_mode (vectype, -- TYPE_MODE (vect_ptr_type), true); -- vect_ptr -- = vect_get_new_vect_var (vect_ptr_type, vect_pointer_var, -+ aggr_ptr_type -+ = build_pointer_type_for_mode (aggr_type, -+ TYPE_MODE (aggr_ptr_type), true); -+ aggr_ptr -+ = vect_get_new_vect_var (aggr_ptr_type, vect_pointer_var, - get_name (base_name)); - break; - } -@@ -3152,7 +3150,7 @@ - while (orig_stmt); - } - -- add_referenced_var (vect_ptr); -+ add_referenced_var (aggr_ptr); - - /* Note: If the dataref is in an inner-loop nested in LOOP, and we are - vectorizing LOOP (i.e., outer-loop vectorization), we need to create two -@@ -3185,8 +3183,8 @@ - vp2 = vp1 + step - if () goto LOOP */ - -- /* (2) Calculate the initial address the vector-pointer, and set -- the vector-pointer to point to it before the loop. */ -+ /* (2) Calculate the initial address of the aggregate-pointer, and set -+ the aggregate-pointer to point to it before the loop. */ - - /* Create: (&(base[init_val+offset]) in the loop preheader. */ - -@@ -3205,17 +3203,17 @@ - - *initial_address = new_temp; - -- /* Create: p = (vectype *) initial_base */ -+ /* Create: p = (aggr_type *) initial_base */ - if (TREE_CODE (new_temp) != SSA_NAME -- || !useless_type_conversion_p (vect_ptr_type, TREE_TYPE (new_temp))) -+ || !useless_type_conversion_p (aggr_ptr_type, TREE_TYPE (new_temp))) - { -- vec_stmt = gimple_build_assign (vect_ptr, -- fold_convert (vect_ptr_type, new_temp)); -- vect_ptr_init = make_ssa_name (vect_ptr, vec_stmt); -+ vec_stmt = gimple_build_assign (aggr_ptr, -+ fold_convert (aggr_ptr_type, new_temp)); -+ aggr_ptr_init = make_ssa_name (aggr_ptr, vec_stmt); - /* Copy the points-to information if it exists. */ - if (DR_PTR_INFO (dr)) -- duplicate_ssa_name_ptr_info (vect_ptr_init, DR_PTR_INFO (dr)); -- gimple_assign_set_lhs (vec_stmt, vect_ptr_init); -+ duplicate_ssa_name_ptr_info (aggr_ptr_init, DR_PTR_INFO (dr)); -+ gimple_assign_set_lhs (vec_stmt, aggr_ptr_init); - if (pe) - { - new_bb = gsi_insert_on_edge_immediate (pe, vec_stmt); -@@ -3225,19 +3223,19 @@ - gsi_insert_before (&gsi, vec_stmt, GSI_SAME_STMT); - } - else -- vect_ptr_init = new_temp; -+ aggr_ptr_init = new_temp; - -- /* (3) Handle the updating of the vector-pointer inside the loop. -+ /* (3) Handle the updating of the aggregate-pointer inside the loop. - This is needed when ONLY_INIT is false, and also when AT_LOOP is the - inner-loop nested in LOOP (during outer-loop vectorization). */ - - /* No update in loop is required. */ - if (only_init && (!loop_vinfo || at_loop == loop)) -- vptr = vect_ptr_init; -+ aptr = aggr_ptr_init; - else - { -- /* The step of the vector pointer is the Vector Size. */ -- tree step = TYPE_SIZE_UNIT (vectype); -+ /* The step of the aggregate pointer is the type size. */ -+ tree step = TYPE_SIZE_UNIT (aggr_type); - /* One exception to the above is when the scalar step of the load in - LOOP is zero. In this case the step here is also zero. */ - if (*inv_p) -@@ -3247,9 +3245,9 @@ - - standard_iv_increment_position (loop, &incr_gsi, &insert_after); - -- create_iv (vect_ptr_init, -- fold_convert (vect_ptr_type, step), -- vect_ptr, loop, &incr_gsi, insert_after, -+ create_iv (aggr_ptr_init, -+ fold_convert (aggr_ptr_type, step), -+ aggr_ptr, loop, &incr_gsi, insert_after, - &indx_before_incr, &indx_after_incr); - incr = gsi_stmt (incr_gsi); - set_vinfo_for_stmt (incr, new_stmt_vec_info (incr, loop_vinfo, NULL)); -@@ -3263,14 +3261,14 @@ - if (ptr_incr) - *ptr_incr = incr; - -- vptr = indx_before_incr; -+ aptr = indx_before_incr; - } - - if (!nested_in_vect_loop || only_init) -- return vptr; -+ return aptr; - - -- /* (4) Handle the updating of the vector-pointer inside the inner-loop -+ /* (4) Handle the updating of the aggregate-pointer inside the inner-loop - nested in LOOP, if exists. */ - - gcc_assert (nested_in_vect_loop); -@@ -3278,7 +3276,7 @@ - { - standard_iv_increment_position (containing_loop, &incr_gsi, - &insert_after); -- create_iv (vptr, fold_convert (vect_ptr_type, DR_STEP (dr)), vect_ptr, -+ create_iv (aptr, fold_convert (aggr_ptr_type, DR_STEP (dr)), aggr_ptr, - containing_loop, &incr_gsi, insert_after, &indx_before_incr, - &indx_after_incr); - incr = gsi_stmt (incr_gsi); -@@ -3415,13 +3413,22 @@ - and FALSE otherwise. */ - - bool --vect_strided_store_supported (tree vectype) -+vect_strided_store_supported (tree vectype, unsigned HOST_WIDE_INT count) - { - optab interleave_high_optab, interleave_low_optab; - enum machine_mode mode; - - mode = TYPE_MODE (vectype); - -+ /* vect_permute_store_chain requires the group size to be a power of two. */ -+ if (exact_log2 (count) == -1) -+ { -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ fprintf (vect_dump, "the size of the group of strided accesses" -+ " is not a power of 2"); -+ return false; -+ } -+ - /* Check that the operation is supported. */ - interleave_high_optab = optab_for_tree_code (VEC_INTERLEAVE_HIGH_EXPR, - vectype, optab_default); -@@ -3446,6 +3453,18 @@ - } - - -+/* Return TRUE if vec_store_lanes is available for COUNT vectors of -+ type VECTYPE. */ -+ -+bool -+vect_store_lanes_supported (tree vectype, unsigned HOST_WIDE_INT count) -+{ -+ return vect_lanes_optab_supported_p ("vec_store_lanes", -+ vec_store_lanes_optab, -+ vectype, count); -+} -+ -+ - /* Function vect_permute_store_chain. - - Given a chain of interleaved stores in DR_CHAIN of LENGTH that must be -@@ -3507,7 +3526,7 @@ - I3: 4 12 20 28 5 13 21 30 - I4: 6 14 22 30 7 15 23 31. */ - --bool -+void - vect_permute_store_chain (VEC(tree,heap) *dr_chain, - unsigned int length, - gimple stmt, -@@ -3521,9 +3540,7 @@ - unsigned int j; - enum tree_code high_code, low_code; - -- /* Check that the operation is supported. */ -- if (!vect_strided_store_supported (vectype)) -- return false; -+ gcc_assert (vect_strided_store_supported (vectype, length)); - - *result_chain = VEC_copy (tree, heap, dr_chain); - -@@ -3576,7 +3593,6 @@ - } - dr_chain = VEC_copy (tree, heap, *result_chain); - } -- return true; - } - - /* Function vect_setup_realignment -@@ -3746,8 +3762,9 @@ - - gcc_assert (!compute_in_loop); - vec_dest = vect_create_destination_var (scalar_dest, vectype); -- ptr = vect_create_data_ref_ptr (stmt, loop_for_initial_load, NULL_TREE, -- &init_addr, &inc, true, &inv_p); -+ ptr = vect_create_data_ref_ptr (stmt, vectype, loop_for_initial_load, -+ NULL_TREE, &init_addr, &inc, -+ true, &inv_p); - new_stmt = gimple_build_assign_with_ops - (BIT_AND_EXPR, NULL_TREE, ptr, - build_int_cst (TREE_TYPE (ptr), -@@ -3852,13 +3869,22 @@ - and FALSE otherwise. */ - - bool --vect_strided_load_supported (tree vectype) -+vect_strided_load_supported (tree vectype, unsigned HOST_WIDE_INT count) - { - optab perm_even_optab, perm_odd_optab; - enum machine_mode mode; - - mode = TYPE_MODE (vectype); - -+ /* vect_permute_load_chain requires the group size to be a power of two. */ -+ if (exact_log2 (count) == -1) -+ { -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ fprintf (vect_dump, "the size of the group of strided accesses" -+ " is not a power of 2"); -+ return false; -+ } -+ - perm_even_optab = optab_for_tree_code (VEC_EXTRACT_EVEN_EXPR, vectype, - optab_default); - if (!perm_even_optab) -@@ -3893,6 +3919,16 @@ - return true; - } - -+/* Return TRUE if vec_load_lanes is available for COUNT vectors of -+ type VECTYPE. */ -+ -+bool -+vect_load_lanes_supported (tree vectype, unsigned HOST_WIDE_INT count) -+{ -+ return vect_lanes_optab_supported_p ("vec_load_lanes", -+ vec_load_lanes_optab, -+ vectype, count); -+} - - /* Function vect_permute_load_chain. - -@@ -3970,7 +4006,7 @@ - 3rd vec (E2): 2 6 10 14 18 22 26 30 - 4th vec (E4): 3 7 11 15 19 23 27 31. */ - --bool -+static void - vect_permute_load_chain (VEC(tree,heap) *dr_chain, - unsigned int length, - gimple stmt, -@@ -3983,9 +4019,7 @@ - int i; - unsigned int j; - -- /* Check that the operation is supported. */ -- if (!vect_strided_load_supported (vectype)) -- return false; -+ gcc_assert (vect_strided_load_supported (vectype, length)); - - *result_chain = VEC_copy (tree, heap, dr_chain); - for (i = 0; i < exact_log2 (length); i++) -@@ -4028,7 +4062,6 @@ - } - dr_chain = VEC_copy (tree, heap, *result_chain); - } -- return true; - } - - -@@ -4039,24 +4072,32 @@ - the scalar statements. - */ - --bool -+void - vect_transform_strided_load (gimple stmt, VEC(tree,heap) *dr_chain, int size, - gimple_stmt_iterator *gsi) - { -- stmt_vec_info stmt_info = vinfo_for_stmt (stmt); -- gimple first_stmt = DR_GROUP_FIRST_DR (stmt_info); -- gimple next_stmt, new_stmt; - VEC(tree,heap) *result_chain = NULL; -- unsigned int i, gap_count; -- tree tmp_data_ref; - - /* DR_CHAIN contains input data-refs that are a part of the interleaving. - RESULT_CHAIN is the output of vect_permute_load_chain, it contains permuted - vectors, that are ready for vector computation. */ - result_chain = VEC_alloc (tree, heap, size); -- /* Permute. */ -- if (!vect_permute_load_chain (dr_chain, size, stmt, gsi, &result_chain)) -- return false; -+ vect_permute_load_chain (dr_chain, size, stmt, gsi, &result_chain); -+ vect_record_strided_load_vectors (stmt, result_chain); -+ VEC_free (tree, heap, result_chain); -+} -+ -+/* RESULT_CHAIN contains the output of a group of strided loads that were -+ generated as part of the vectorization of STMT. Assign the statement -+ for each vector to the associated scalar statement. */ -+ -+void -+vect_record_strided_load_vectors (gimple stmt, VEC(tree,heap) *result_chain) -+{ -+ gimple first_stmt = DR_GROUP_FIRST_DR (vinfo_for_stmt (stmt)); -+ gimple next_stmt, new_stmt; -+ unsigned int i, gap_count; -+ tree tmp_data_ref; - - /* Put a permuted data-ref in the VECTORIZED_STMT field. - Since we scan the chain starting from it's first node, their order -@@ -4118,9 +4159,6 @@ - break; - } - } -- -- VEC_free (tree, heap, result_chain); -- return true; - } - - /* Function vect_force_dr_alignment_p. ---- a/src/gcc/tree-vect-generic.c -+++ b/src/gcc/tree-vect-generic.c -@@ -552,7 +552,9 @@ - || code == VEC_UNPACK_LO_EXPR - || code == VEC_PACK_TRUNC_EXPR - || code == VEC_PACK_SAT_EXPR -- || code == VEC_PACK_FIX_TRUNC_EXPR) -+ || code == VEC_PACK_FIX_TRUNC_EXPR -+ || code == VEC_WIDEN_LSHIFT_HI_EXPR -+ || code == VEC_WIDEN_LSHIFT_LO_EXPR) - type = TREE_TYPE (rhs1); - - /* Optabs will try converting a negation into a subtraction, so ---- a/src/gcc/tree-vect-loop-manip.c -+++ b/src/gcc/tree-vect-loop-manip.c -@@ -1105,35 +1105,6 @@ - first_niters = PHI_RESULT (newphi); - } - -- --/* Remove dead assignments from loop NEW_LOOP. */ -- --static void --remove_dead_stmts_from_loop (struct loop *new_loop) --{ -- basic_block *bbs = get_loop_body (new_loop); -- unsigned i; -- for (i = 0; i < new_loop->num_nodes; ++i) -- { -- gimple_stmt_iterator gsi; -- for (gsi = gsi_start_bb (bbs[i]); !gsi_end_p (gsi);) -- { -- gimple stmt = gsi_stmt (gsi); -- if (is_gimple_assign (stmt) -- && TREE_CODE (gimple_assign_lhs (stmt)) == SSA_NAME -- && has_zero_uses (gimple_assign_lhs (stmt))) -- { -- gsi_remove (&gsi, true); -- release_defs (stmt); -- } -- else -- gsi_next (&gsi); -- } -- } -- free (bbs); --} -- -- - /* Function slpeel_tree_peel_loop_to_edge. - - Peel the first (last) iterations of LOOP into a new prolog (epilog) loop -@@ -1445,13 +1416,6 @@ - BITMAP_FREE (definitions); - delete_update_ssa (); - -- /* Remove all pattern statements from the loop copy. They will confuse -- the expander if DCE is disabled. -- ??? The pattern recognizer should be split into an analysis and -- a transformation phase that is then run only on the loop that is -- going to be transformed. */ -- remove_dead_stmts_from_loop (new_loop); -- - adjust_vec_debug_stmts (); - - return new_loop; ---- a/src/gcc/tree-vect-loop.c -+++ b/src/gcc/tree-vect-loop.c -@@ -181,6 +181,8 @@ - stmt_vec_info stmt_info; - int i; - HOST_WIDE_INT dummy; -+ gimple stmt, pattern_stmt = NULL, pattern_def_stmt = NULL; -+ bool analyze_pattern_stmt = false, pattern_def = false; - - if (vect_print_dump_info (REPORT_DETAILS)) - fprintf (vect_dump, "=== vect_determine_vectorization_factor ==="); -@@ -241,12 +243,20 @@ - } - } - -- for (si = gsi_start_bb (bb); !gsi_end_p (si); gsi_next (&si)) -+ for (si = gsi_start_bb (bb); !gsi_end_p (si) || analyze_pattern_stmt;) - { -- tree vf_vectype; -- gimple stmt = gsi_stmt (si); -- stmt_info = vinfo_for_stmt (stmt); -+ tree vf_vectype; - -+ if (analyze_pattern_stmt) -+ { -+ stmt = pattern_stmt; -+ analyze_pattern_stmt = false; -+ } -+ else -+ stmt = gsi_stmt (si); -+ -+ stmt_info = vinfo_for_stmt (stmt); -+ - if (vect_print_dump_info (REPORT_DETAILS)) - { - fprintf (vect_dump, "==> examining statement: "); -@@ -259,11 +269,57 @@ - if (!STMT_VINFO_RELEVANT_P (stmt_info) - && !STMT_VINFO_LIVE_P (stmt_info)) - { -- if (vect_print_dump_info (REPORT_DETAILS)) -- fprintf (vect_dump, "skip."); -- continue; -+ if (STMT_VINFO_IN_PATTERN_P (stmt_info) -+ && (pattern_stmt = STMT_VINFO_RELATED_STMT (stmt_info)) -+ && (STMT_VINFO_RELEVANT_P (vinfo_for_stmt (pattern_stmt)) -+ || STMT_VINFO_LIVE_P (vinfo_for_stmt (pattern_stmt)))) -+ { -+ stmt = pattern_stmt; -+ stmt_info = vinfo_for_stmt (pattern_stmt); -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ { -+ fprintf (vect_dump, "==> examining pattern statement: "); -+ print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM); -+ } -+ } -+ else -+ { -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ fprintf (vect_dump, "skip."); -+ gsi_next (&si); -+ continue; -+ } - } - -+ else if (STMT_VINFO_IN_PATTERN_P (stmt_info) -+ && (pattern_stmt = STMT_VINFO_RELATED_STMT (stmt_info)) -+ && (STMT_VINFO_RELEVANT_P (vinfo_for_stmt (pattern_stmt)) -+ || STMT_VINFO_LIVE_P (vinfo_for_stmt (pattern_stmt)))) -+ analyze_pattern_stmt = true; -+ -+ /* If a pattern statement has a def stmt, analyze it too. */ -+ if (is_pattern_stmt_p (stmt_info) -+ && (pattern_def_stmt = STMT_VINFO_PATTERN_DEF_STMT (stmt_info)) -+ && (STMT_VINFO_RELEVANT_P (vinfo_for_stmt (pattern_def_stmt)) -+ || STMT_VINFO_LIVE_P (vinfo_for_stmt (pattern_def_stmt)))) -+ { -+ if (pattern_def) -+ pattern_def = false; -+ else -+ { -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ { -+ fprintf (vect_dump, "==> examining pattern def stmt: "); -+ print_gimple_stmt (vect_dump, pattern_def_stmt, 0, -+ TDF_SLIM); -+ } -+ -+ pattern_def = true; -+ stmt = pattern_def_stmt; -+ stmt_info = vinfo_for_stmt (stmt); -+ } -+ } -+ - if (gimple_get_lhs (stmt) == NULL_TREE) - { - if (vect_print_dump_info (REPORT_UNVECTORIZED_LOCATIONS)) -@@ -295,9 +351,7 @@ - } - else - { -- gcc_assert (!STMT_VINFO_DATA_REF (stmt_info) -- && !is_pattern_stmt_p (stmt_info)); -- -+ gcc_assert (!STMT_VINFO_DATA_REF (stmt_info)); - scalar_type = TREE_TYPE (gimple_get_lhs (stmt)); - if (vect_print_dump_info (REPORT_DETAILS)) - { -@@ -369,6 +423,9 @@ - if (!vectorization_factor - || (nunits > vectorization_factor)) - vectorization_factor = nunits; -+ -+ if (!analyze_pattern_stmt && !pattern_def) -+ gsi_next (&si); - } - } - -@@ -817,25 +874,17 @@ - - if (stmt_info) - { -- /* Check if this is a "pattern stmt" (introduced by the -- vectorizer during the pattern recognition pass). */ -- bool remove_stmt_p = false; -- gimple orig_stmt = STMT_VINFO_RELATED_STMT (stmt_info); -- if (orig_stmt) -- { -- stmt_vec_info orig_stmt_info = vinfo_for_stmt (orig_stmt); -- if (orig_stmt_info -- && STMT_VINFO_IN_PATTERN_P (orig_stmt_info)) -- remove_stmt_p = true; -- } -+ /* Check if this statement has a related "pattern stmt" -+ (introduced by the vectorizer during the pattern recognition -+ pass). Free pattern's stmt_vec_info. */ -+ if (STMT_VINFO_IN_PATTERN_P (stmt_info) -+ && vinfo_for_stmt (STMT_VINFO_RELATED_STMT (stmt_info))) -+ free_stmt_vec_info (STMT_VINFO_RELATED_STMT (stmt_info)); - - /* Free stmt_vec_info. */ - free_stmt_vec_info (stmt); -- -- /* Remove dead "pattern stmts". */ -- if (remove_stmt_p) -- gsi_remove (&si, true); - } -+ - gsi_next (&si); - } - } -@@ -1409,7 +1458,7 @@ - - vect_analyze_scalar_cycles (loop_vinfo); - -- vect_pattern_recog (loop_vinfo); -+ vect_pattern_recog (loop_vinfo, NULL); - - /* Data-flow analysis to detect stmts that do not need to be vectorized. */ - -@@ -3233,8 +3282,8 @@ - - /* Get the loop-entry arguments. */ - if (slp_node) -- vect_get_slp_defs (reduction_op, NULL_TREE, slp_node, &vec_initial_defs, -- NULL, reduc_index); -+ vect_get_vec_defs (reduction_op, NULL_TREE, stmt, &vec_initial_defs, -+ NULL, slp_node, reduc_index); - else - { - vec_initial_defs = VEC_alloc (tree, heap, 1); -@@ -3959,7 +4008,7 @@ - VEC (tree, heap) *vec_oprnds0 = NULL, *vec_oprnds1 = NULL, *vect_defs = NULL; - VEC (gimple, heap) *phis = NULL; - int vec_num; -- tree def0, def1, tem; -+ tree def0, def1, tem, op0, op1 = NULL_TREE; - - if (nested_in_vect_loop_p (loop, stmt)) - { -@@ -4038,6 +4087,9 @@ - gcc_unreachable (); - } - -+ if (code == COND_EXPR && slp_node) -+ return false; -+ - scalar_dest = gimple_assign_lhs (stmt); - scalar_type = TREE_TYPE (scalar_dest); - if (!POINTER_TYPE_P (scalar_type) && !INTEGRAL_TYPE_P (scalar_type) -@@ -4112,7 +4164,7 @@ - - if (code == COND_EXPR) - { -- if (!vectorizable_condition (stmt, gsi, NULL, ops[reduc_index], 0)) -+ if (!vectorizable_condition (stmt, gsi, NULL, ops[reduc_index], 0, NULL)) - { - if (vect_print_dump_info (REPORT_DETAILS)) - fprintf (vect_dump, "unsupported condition in reduction"); -@@ -4267,6 +4319,25 @@ - return false; - } - -+ /* In case of widenning multiplication by a constant, we update the type -+ of the constant to be the type of the other operand. We check that the -+ constant fits the type in the pattern recognition pass. */ -+ if (code == DOT_PROD_EXPR -+ && !types_compatible_p (TREE_TYPE (ops[0]), TREE_TYPE (ops[1]))) -+ { -+ if (TREE_CODE (ops[0]) == INTEGER_CST) -+ ops[0] = fold_convert (TREE_TYPE (ops[1]), ops[0]); -+ else if (TREE_CODE (ops[1]) == INTEGER_CST) -+ ops[1] = fold_convert (TREE_TYPE (ops[0]), ops[1]); -+ else -+ { -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ fprintf (vect_dump, "invalid types in dot-prod"); -+ -+ return false; -+ } -+ } -+ - if (!vec_stmt) /* transformation not required. */ - { - STMT_VINFO_TYPE (stmt_info) = reduc_vec_info_type; -@@ -4365,7 +4436,7 @@ - gcc_assert (!slp_node); - vectorizable_condition (stmt, gsi, vec_stmt, - PHI_RESULT (VEC_index (gimple, phis, 0)), -- reduc_index); -+ reduc_index, NULL); - /* Multiple types are not supported for condition. */ - break; - } -@@ -4373,8 +4444,6 @@ - /* Handle uses. */ - if (j == 0) - { -- tree op0, op1 = NULL_TREE; -- - op0 = ops[!reduc_index]; - if (op_type == ternary_op) - { -@@ -4385,8 +4454,8 @@ - } - - if (slp_node) -- vect_get_slp_defs (op0, op1, slp_node, &vec_oprnds0, &vec_oprnds1, -- -1); -+ vect_get_vec_defs (op0, op1, stmt, &vec_oprnds0, &vec_oprnds1, -+ slp_node, -1); - else - { - loop_vec_def0 = vect_get_vec_def_for_operand (ops[!reduc_index], -@@ -4404,11 +4473,19 @@ - { - if (!slp_node) - { -- enum vect_def_type dt = vect_unknown_def_type; /* Dummy */ -- loop_vec_def0 = vect_get_vec_def_for_stmt_copy (dt, loop_vec_def0); -+ enum vect_def_type dt; -+ gimple dummy_stmt; -+ tree dummy; -+ -+ vect_is_simple_use (ops[!reduc_index], loop_vinfo, NULL, -+ &dummy_stmt, &dummy, &dt); -+ loop_vec_def0 = vect_get_vec_def_for_stmt_copy (dt, -+ loop_vec_def0); - VEC_replace (tree, vec_oprnds0, 0, loop_vec_def0); - if (op_type == ternary_op) - { -+ vect_is_simple_use (op1, loop_vinfo, NULL, &dummy_stmt, -+ &dummy, &dt); - loop_vec_def1 = vect_get_vec_def_for_stmt_copy (dt, - loop_vec_def1); - VEC_replace (tree, vec_oprnds1, 0, loop_vec_def1); -@@ -4713,6 +4790,8 @@ - tree cond_expr = NULL_TREE; - gimple_seq cond_expr_stmt_list = NULL; - bool do_peeling_for_loop_bound; -+ gimple stmt, pattern_stmt, pattern_def_stmt; -+ bool transform_pattern_stmt = false, pattern_def = false; - - if (vect_print_dump_info (REPORT_DETAILS)) - fprintf (vect_dump, "=== vec_transform_loop ==="); -@@ -4800,11 +4879,19 @@ - } - } - -- for (si = gsi_start_bb (bb); !gsi_end_p (si);) -+ pattern_stmt = NULL; -+ for (si = gsi_start_bb (bb); !gsi_end_p (si) || transform_pattern_stmt;) - { -- gimple stmt = gsi_stmt (si); - bool is_store; - -+ if (transform_pattern_stmt) -+ { -+ stmt = pattern_stmt; -+ transform_pattern_stmt = false; -+ } -+ else -+ stmt = gsi_stmt (si); -+ - if (vect_print_dump_info (REPORT_DETAILS)) - { - fprintf (vect_dump, "------>vectorizing statement: "); -@@ -4827,14 +4914,54 @@ - - if (!STMT_VINFO_RELEVANT_P (stmt_info) - && !STMT_VINFO_LIVE_P (stmt_info)) -- { -- gsi_next (&si); -- continue; -+ { -+ if (STMT_VINFO_IN_PATTERN_P (stmt_info) -+ && (pattern_stmt = STMT_VINFO_RELATED_STMT (stmt_info)) -+ && (STMT_VINFO_RELEVANT_P (vinfo_for_stmt (pattern_stmt)) -+ || STMT_VINFO_LIVE_P (vinfo_for_stmt (pattern_stmt)))) -+ { -+ stmt = pattern_stmt; -+ stmt_info = vinfo_for_stmt (stmt); -+ } -+ else -+ { -+ gsi_next (&si); -+ continue; -+ } - } -+ else if (STMT_VINFO_IN_PATTERN_P (stmt_info) -+ && (pattern_stmt = STMT_VINFO_RELATED_STMT (stmt_info)) -+ && (STMT_VINFO_RELEVANT_P (vinfo_for_stmt (pattern_stmt)) -+ || STMT_VINFO_LIVE_P (vinfo_for_stmt (pattern_stmt)))) -+ transform_pattern_stmt = true; -+ -+ /* If pattern statement has a def stmt, vectorize it too. */ -+ if (is_pattern_stmt_p (stmt_info) -+ && (pattern_def_stmt = STMT_VINFO_PATTERN_DEF_STMT (stmt_info)) -+ && (STMT_VINFO_RELEVANT_P (vinfo_for_stmt (pattern_def_stmt)) -+ || STMT_VINFO_LIVE_P (vinfo_for_stmt (pattern_def_stmt)))) -+ { -+ if (pattern_def) -+ pattern_def = false; -+ else -+ { -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ { -+ fprintf (vect_dump, "==> vectorizing pattern def" -+ " stmt: "); -+ print_gimple_stmt (vect_dump, pattern_def_stmt, 0, -+ TDF_SLIM); -+ } -+ -+ pattern_def = true; -+ stmt = pattern_def_stmt; -+ stmt_info = vinfo_for_stmt (stmt); -+ } -+ } - - gcc_assert (STMT_VINFO_VECTYPE (stmt_info)); -- nunits = -- (unsigned int) TYPE_VECTOR_SUBPARTS (STMT_VINFO_VECTYPE (stmt_info)); -+ nunits = (unsigned int) TYPE_VECTOR_SUBPARTS ( -+ STMT_VINFO_VECTYPE (stmt_info)); - if (!STMT_SLP_TYPE (stmt_info) - && nunits != (unsigned int) vectorization_factor - && vect_print_dump_info (REPORT_DETAILS)) -@@ -4859,8 +4986,9 @@ - /* Hybrid SLP stmts must be vectorized in addition to SLP. */ - if (!vinfo_for_stmt (stmt) || PURE_SLP_STMT (stmt_info)) - { -- gsi_next (&si); -- continue; -+ if (!transform_pattern_stmt && !pattern_def) -+ gsi_next (&si); -+ continue; - } - } - -@@ -4879,7 +5007,7 @@ - the chain. */ - vect_remove_stores (DR_GROUP_FIRST_DR (stmt_info)); - gsi_remove (&si, true); -- continue; -+ continue; - } - else - { -@@ -4889,7 +5017,9 @@ - continue; - } - } -- gsi_next (&si); -+ -+ if (!transform_pattern_stmt && !pattern_def) -+ gsi_next (&si); - } /* stmts in BB */ - } /* BBs in loop */ - ---- a/src/gcc/tree-vect-patterns.c -+++ b/src/gcc/tree-vect-patterns.c -@@ -38,33 +38,40 @@ - #include "recog.h" - #include "diagnostic-core.h" - --/* Function prototypes */ --static void vect_pattern_recog_1 -- (gimple (* ) (gimple, tree *, tree *), gimple_stmt_iterator); --static bool widened_name_p (tree, gimple, tree *, gimple *); -- - /* Pattern recognition functions */ --static gimple vect_recog_widen_sum_pattern (gimple, tree *, tree *); --static gimple vect_recog_widen_mult_pattern (gimple, tree *, tree *); --static gimple vect_recog_dot_prod_pattern (gimple, tree *, tree *); --static gimple vect_recog_pow_pattern (gimple, tree *, tree *); -+static gimple vect_recog_widen_sum_pattern (VEC (gimple, heap) **, tree *, -+ tree *); -+static gimple vect_recog_widen_mult_pattern (VEC (gimple, heap) **, tree *, -+ tree *); -+static gimple vect_recog_dot_prod_pattern (VEC (gimple, heap) **, tree *, -+ tree *); -+static gimple vect_recog_pow_pattern (VEC (gimple, heap) **, tree *, tree *); -+static gimple vect_recog_over_widening_pattern (VEC (gimple, heap) **, tree *, -+ tree *); -+static gimple vect_recog_widen_shift_pattern (VEC (gimple, heap) **, -+ tree *, tree *); -+static gimple vect_recog_mixed_size_cond_pattern (VEC (gimple, heap) **, -+ tree *, tree *); - static vect_recog_func_ptr vect_vect_recog_func_ptrs[NUM_PATTERNS] = { - vect_recog_widen_mult_pattern, - vect_recog_widen_sum_pattern, - vect_recog_dot_prod_pattern, -- vect_recog_pow_pattern}; -- -+ vect_recog_pow_pattern, -+ vect_recog_over_widening_pattern, -+ vect_recog_widen_shift_pattern, -+ vect_recog_mixed_size_cond_pattern}; - --/* Function widened_name_p - -- Check whether NAME, an ssa-name used in USE_STMT, -- is a result of a type-promotion, such that: -- DEF_STMT: NAME = NOP (name0) -- where the type of name0 (HALF_TYPE) is smaller than the type of NAME. --*/ -+/* Check whether NAME, an ssa-name used in USE_STMT, -+ is a result of a type promotion or demotion, such that: -+ DEF_STMT: NAME = NOP (name0) -+ where the type of name0 (ORIG_TYPE) is smaller/bigger than the type of NAME. -+ If CHECK_SIGN is TRUE, check that either both types are signed or both are -+ unsigned. */ - - static bool --widened_name_p (tree name, gimple use_stmt, tree *half_type, gimple *def_stmt) -+type_conversion_p (tree name, gimple use_stmt, bool check_sign, -+ tree *orig_type, gimple *def_stmt, bool *promotion) - { - tree dummy; - gimple dummy_gimple; -@@ -74,35 +81,43 @@ - tree oprnd0; - enum vect_def_type dt; - tree def; -+ bb_vec_info bb_vinfo; - - stmt_vinfo = vinfo_for_stmt (use_stmt); - loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_vinfo); -+ bb_vinfo = STMT_VINFO_BB_VINFO (stmt_vinfo); - -- if (!vect_is_simple_use (name, loop_vinfo, NULL, def_stmt, &def, &dt)) -+ if (!vect_is_simple_use (name, loop_vinfo, bb_vinfo, def_stmt, &def, &dt)) - return false; - - if (dt != vect_internal_def - && dt != vect_external_def && dt != vect_constant_def) - return false; - -- if (! *def_stmt) -+ if (!*def_stmt) - return false; - - if (!is_gimple_assign (*def_stmt)) - return false; - -- if (gimple_assign_rhs_code (*def_stmt) != NOP_EXPR) -+ if (!CONVERT_EXPR_CODE_P (gimple_assign_rhs_code (*def_stmt))) - return false; - - oprnd0 = gimple_assign_rhs1 (*def_stmt); - -- *half_type = TREE_TYPE (oprnd0); -- if (!INTEGRAL_TYPE_P (type) || !INTEGRAL_TYPE_P (*half_type) -- || (TYPE_UNSIGNED (type) != TYPE_UNSIGNED (*half_type)) -- || (TYPE_PRECISION (type) < (TYPE_PRECISION (*half_type) * 2))) -+ *orig_type = TREE_TYPE (oprnd0); -+ if (!INTEGRAL_TYPE_P (type) || !INTEGRAL_TYPE_P (*orig_type) -+ || ((TYPE_UNSIGNED (type) != TYPE_UNSIGNED (*orig_type)) && check_sign)) -+ return false; -+ -+ if (TYPE_PRECISION (type) >= (TYPE_PRECISION (*orig_type) * 2)) -+ *promotion = true; -+ else if (TYPE_PRECISION (*orig_type) >= (TYPE_PRECISION (type) * 2)) -+ *promotion = false; -+ else - return false; - -- if (!vect_is_simple_use (oprnd0, loop_vinfo, NULL, &dummy_gimple, &dummy, -+ if (!vect_is_simple_use (oprnd0, loop_vinfo, bb_vinfo, &dummy_gimple, &dummy, - &dt)) - return false; - -@@ -145,9 +160,9 @@ - - Input: - -- * LAST_STMT: A stmt from which the pattern search begins. In the example, -- when this function is called with S7, the pattern {S3,S4,S5,S6,S7} will be -- detected. -+ * STMTS: Contains a stmt from which the pattern search begins. In the -+ example, when this function is called with S7, the pattern {S3,S4,S5,S6,S7} -+ will be detected. - - Output: - -@@ -168,9 +183,10 @@ - inner-loop nested in an outer-loop that us being vectorized). */ - - static gimple --vect_recog_dot_prod_pattern (gimple last_stmt, tree *type_in, tree *type_out) -+vect_recog_dot_prod_pattern (VEC (gimple, heap) **stmts, tree *type_in, -+ tree *type_out) - { -- gimple stmt; -+ gimple stmt, last_stmt = VEC_index (gimple, *stmts, 0); - tree oprnd0, oprnd1; - tree oprnd00, oprnd01; - stmt_vec_info stmt_vinfo = vinfo_for_stmt (last_stmt); -@@ -178,8 +194,14 @@ - gimple pattern_stmt; - tree prod_type; - loop_vec_info loop_info = STMT_VINFO_LOOP_VINFO (stmt_vinfo); -- struct loop *loop = LOOP_VINFO_LOOP (loop_info); -+ struct loop *loop; - tree var, rhs; -+ bool promotion; -+ -+ if (!loop_info) -+ return NULL; -+ -+ loop = LOOP_VINFO_LOOP (loop_info); - - if (!is_gimple_assign (last_stmt)) - return NULL; -@@ -238,7 +260,9 @@ - return NULL; - stmt = last_stmt; - -- if (widened_name_p (oprnd0, stmt, &half_type, &def_stmt)) -+ if (type_conversion_p (oprnd0, stmt, true, &half_type, &def_stmt, -+ &promotion) -+ && promotion) - { - stmt = def_stmt; - oprnd0 = gimple_assign_rhs1 (stmt); -@@ -293,10 +317,14 @@ - if (!types_compatible_p (TREE_TYPE (oprnd0), prod_type) - || !types_compatible_p (TREE_TYPE (oprnd1), prod_type)) - return NULL; -- if (!widened_name_p (oprnd0, stmt, &half_type0, &def_stmt)) -+ if (!type_conversion_p (oprnd0, stmt, true, &half_type0, &def_stmt, -+ &promotion) -+ || !promotion) - return NULL; - oprnd00 = gimple_assign_rhs1 (def_stmt); -- if (!widened_name_p (oprnd1, stmt, &half_type1, &def_stmt)) -+ if (!type_conversion_p (oprnd0, stmt, true, &half_type1, &def_stmt, -+ &promotion) -+ || !promotion) - return NULL; - oprnd01 = gimple_assign_rhs1 (def_stmt); - if (!types_compatible_p (half_type0, half_type1)) -@@ -327,6 +355,100 @@ - return pattern_stmt; - } - -+ -+/* Handle widening operation by a constant. At the moment we support MULT_EXPR -+ and LSHIFT_EXPR. -+ -+ For MULT_EXPR we check that CONST_OPRND fits HALF_TYPE, and for LSHIFT_EXPR -+ we check that CONST_OPRND is less or equal to the size of HALF_TYPE. -+ -+ Otherwise, if the type of the result (TYPE) is at least 4 times bigger than -+ HALF_TYPE, and there is an intermediate type (2 times smaller than TYPE) -+ that satisfies the above restrictions, we can perform a widening opeartion -+ from the intermediate type to TYPE and replace a_T = (TYPE) a_t; -+ with a_it = (interm_type) a_t; */ -+ -+static bool -+vect_handle_widen_op_by_const (gimple stmt, enum tree_code code, -+ tree const_oprnd, tree *oprnd, -+ VEC (gimple, heap) **stmts, tree type, -+ tree *half_type, gimple def_stmt) -+{ -+ tree new_type, new_oprnd, tmp; -+ gimple new_stmt; -+ loop_vec_info loop_vinfo; -+ struct loop *loop = NULL; -+ bb_vec_info bb_vinfo; -+ stmt_vec_info stmt_vinfo; -+ -+ stmt_vinfo = vinfo_for_stmt (stmt); -+ loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_vinfo); -+ bb_vinfo = STMT_VINFO_BB_VINFO (stmt_vinfo); -+ if (loop_vinfo) -+ loop = LOOP_VINFO_LOOP (loop_vinfo); -+ -+ if (code != MULT_EXPR && code != LSHIFT_EXPR) -+ return false; -+ -+ if (((code == MULT_EXPR && int_fits_type_p (const_oprnd, *half_type)) -+ || (code == LSHIFT_EXPR -+ && compare_tree_int (const_oprnd, TYPE_PRECISION (*half_type)) -+ != 1)) -+ && TYPE_PRECISION (type) == (TYPE_PRECISION (*half_type) * 2)) -+ { -+ /* CONST_OPRND is a constant of HALF_TYPE. */ -+ *oprnd = gimple_assign_rhs1 (def_stmt); -+ return true; -+ } -+ -+ if (TYPE_PRECISION (type) < (TYPE_PRECISION (*half_type) * 4) -+ || !gimple_bb (def_stmt) -+ || (loop && !flow_bb_inside_loop_p (loop, gimple_bb (def_stmt))) -+ || (!loop && gimple_bb (def_stmt) != BB_VINFO_BB (bb_vinfo) -+ && gimple_code (def_stmt) != GIMPLE_PHI) -+ || !vinfo_for_stmt (def_stmt)) -+ return false; -+ -+ /* TYPE is 4 times bigger than HALF_TYPE, try widening operation for -+ a type 2 times bigger than HALF_TYPE. */ -+ new_type = build_nonstandard_integer_type (TYPE_PRECISION (type) / 2, -+ TYPE_UNSIGNED (type)); -+ if ((code == MULT_EXPR && !int_fits_type_p (const_oprnd, new_type)) -+ || (code == LSHIFT_EXPR -+ && compare_tree_int (const_oprnd, TYPE_PRECISION (new_type)) == 1)) -+ return false; -+ -+ /* Use NEW_TYPE for widening operation. */ -+ if (STMT_VINFO_RELATED_STMT (vinfo_for_stmt (def_stmt))) -+ { -+ new_stmt = STMT_VINFO_RELATED_STMT (vinfo_for_stmt (def_stmt)); -+ /* Check if the already created pattern stmt is what we need. */ -+ if (!is_gimple_assign (new_stmt) -+ || gimple_assign_rhs_code (new_stmt) != NOP_EXPR -+ || TREE_TYPE (gimple_assign_lhs (new_stmt)) != new_type) -+ return false; -+ -+ VEC_safe_push (gimple, heap, *stmts, def_stmt); -+ *oprnd = gimple_assign_lhs (new_stmt); -+ } -+ else -+ { -+ /* Create a_T = (NEW_TYPE) a_t; */ -+ *oprnd = gimple_assign_rhs1 (def_stmt); -+ tmp = create_tmp_var (new_type, NULL); -+ add_referenced_var (tmp); -+ new_oprnd = make_ssa_name (tmp, NULL); -+ new_stmt = gimple_build_assign_with_ops (NOP_EXPR, new_oprnd, *oprnd, -+ NULL_TREE); -+ STMT_VINFO_RELATED_STMT (vinfo_for_stmt (def_stmt)) = new_stmt; -+ VEC_safe_push (gimple, heap, *stmts, def_stmt); -+ *oprnd = new_oprnd; -+ } -+ -+ *half_type = new_type; -+ return true; -+} -+ - /* Function vect_recog_widen_mult_pattern - - Try to find the following pattern: -@@ -342,37 +464,80 @@ - - where type 'TYPE' is at least double the size of type 'type'. - -- Input: -+ Also detect unsgigned cases: - -- * LAST_STMT: A stmt from which the pattern search begins. In the example, -- when this function is called with S5, the pattern {S3,S4,S5} is be detected. -+ unsigned type a_t, b_t; -+ unsigned TYPE u_prod_T; -+ TYPE a_T, b_T, prod_T; -+ -+ S1 a_t = ; -+ S2 b_t = ; -+ S3 a_T = (TYPE) a_t; -+ S4 b_T = (TYPE) b_t; -+ S5 prod_T = a_T * b_T; -+ S6 u_prod_T = (unsigned TYPE) prod_T; -+ -+ and multiplication by constants: -+ -+ type a_t; -+ TYPE a_T, prod_T; -+ -+ S1 a_t = ; -+ S3 a_T = (TYPE) a_t; -+ S5 prod_T = a_T * CONST; -+ -+ A special case of multiplication by constants is when 'TYPE' is 4 times -+ bigger than 'type', but CONST fits an intermediate type 2 times smaller -+ than 'TYPE'. In that case we create an additional pattern stmt for S3 -+ to create a variable of the intermediate type, and perform widen-mult -+ on the intermediate type as well: -+ -+ type a_t; -+ interm_type a_it; -+ TYPE a_T, prod_T, prod_T'; -+ -+ S1 a_t = ; -+ S3 a_T = (TYPE) a_t; -+ '--> a_it = (interm_type) a_t; -+ S5 prod_T = a_T * CONST; -+ '--> prod_T' = a_it w* CONST; -+ -+ Input/Output: -+ -+ * STMTS: Contains a stmt from which the pattern search begins. In the -+ example, when this function is called with S5, the pattern {S3,S4,S5,(S6)} -+ is detected. In case of unsigned widen-mult, the original stmt (S5) is -+ replaced with S6 in STMTS. In case of multiplication by a constant -+ of an intermediate type (the last case above), STMTS also contains S3 -+ (inserted before S5). - - Output: - - * TYPE_IN: The type of the input arguments to the pattern. - -- * TYPE_OUT: The type of the output of this pattern. -+ * TYPE_OUT: The type of the output of this pattern. - - * Return value: A new stmt that will be used to replace the sequence of -- stmts that constitute the pattern. In this case it will be: -+ stmts that constitute the pattern. In this case it will be: - WIDEN_MULT <a_t, b_t> - */ - - static gimple --vect_recog_widen_mult_pattern (gimple last_stmt, -- tree *type_in, -- tree *type_out) -+vect_recog_widen_mult_pattern (VEC (gimple, heap) **stmts, -+ tree *type_in, tree *type_out) - { -+ gimple last_stmt = VEC_pop (gimple, *stmts); - gimple def_stmt0, def_stmt1; - tree oprnd0, oprnd1; - tree type, half_type0, half_type1; - gimple pattern_stmt; -- tree vectype, vectype_out; -+ tree vectype, vectype_out = NULL_TREE; - tree dummy; - tree var; - enum tree_code dummy_code; - int dummy_int; - VEC (tree, heap) *dummy_vec; -+ bool op1_ok, promotion; - - if (!is_gimple_assign (last_stmt)) - return NULL; -@@ -391,15 +556,68 @@ - || !types_compatible_p (TREE_TYPE (oprnd1), type)) - return NULL; - -- /* Check argument 0 */ -- if (!widened_name_p (oprnd0, last_stmt, &half_type0, &def_stmt0)) -+ /* Check argument 0. */ -+ if (!type_conversion_p (oprnd0, last_stmt, false, &half_type0, &def_stmt0, -+ &promotion) -+ || !promotion) - return NULL; -- oprnd0 = gimple_assign_rhs1 (def_stmt0); -+ /* Check argument 1. */ -+ op1_ok = type_conversion_p (oprnd1, last_stmt, false, &half_type1, -+ &def_stmt1, &promotion); -+ if (op1_ok && promotion) -+ { -+ oprnd0 = gimple_assign_rhs1 (def_stmt0); -+ oprnd1 = gimple_assign_rhs1 (def_stmt1); -+ } -+ else -+ { -+ if (TREE_CODE (oprnd1) == INTEGER_CST -+ && TREE_CODE (half_type0) == INTEGER_TYPE -+ && vect_handle_widen_op_by_const (last_stmt, MULT_EXPR, oprnd1, -+ &oprnd0, stmts, type, -+ &half_type0, def_stmt0)) -+ half_type1 = half_type0; -+ else -+ return NULL; -+ } - -- /* Check argument 1 */ -- if (!widened_name_p (oprnd1, last_stmt, &half_type1, &def_stmt1)) -- return NULL; -- oprnd1 = gimple_assign_rhs1 (def_stmt1); -+ /* Handle unsigned case. Look for -+ S6 u_prod_T = (unsigned TYPE) prod_T; -+ Use unsigned TYPE as the type for WIDEN_MULT_EXPR. */ -+ if (TYPE_UNSIGNED (type) != TYPE_UNSIGNED (half_type0)) -+ { -+ tree lhs = gimple_assign_lhs (last_stmt), use_lhs; -+ imm_use_iterator imm_iter; -+ use_operand_p use_p; -+ int nuses = 0; -+ gimple use_stmt = NULL; -+ tree use_type; -+ -+ if (TYPE_UNSIGNED (type) == TYPE_UNSIGNED (half_type1)) -+ return NULL; -+ -+ FOR_EACH_IMM_USE_FAST (use_p, imm_iter, lhs) -+ { -+ if (is_gimple_debug (USE_STMT (use_p))) -+ continue; -+ use_stmt = USE_STMT (use_p); -+ nuses++; -+ } -+ -+ if (nuses != 1 || !is_gimple_assign (use_stmt) -+ || gimple_assign_rhs_code (use_stmt) != NOP_EXPR) -+ return NULL; -+ -+ use_lhs = gimple_assign_lhs (use_stmt); -+ use_type = TREE_TYPE (use_lhs); -+ if (!INTEGRAL_TYPE_P (use_type) -+ || (TYPE_UNSIGNED (type) == TYPE_UNSIGNED (use_type)) -+ || (TYPE_PRECISION (type) != TYPE_PRECISION (use_type))) -+ return NULL; -+ -+ type = use_type; -+ last_stmt = use_stmt; -+ } - - if (!types_compatible_p (half_type0, half_type1)) - return NULL; -@@ -431,6 +649,7 @@ - if (vect_print_dump_info (REPORT_DETAILS)) - print_gimple_stmt (vect_dump, pattern_stmt, 0, TDF_SLIM); - -+ VEC_safe_push (gimple, heap, *stmts, last_stmt); - return pattern_stmt; - } - -@@ -462,8 +681,9 @@ - */ - - static gimple --vect_recog_pow_pattern (gimple last_stmt, tree *type_in, tree *type_out) -+vect_recog_pow_pattern (VEC (gimple, heap) **stmts, tree *type_in, tree *type_out) - { -+ gimple last_stmt = VEC_index (gimple, *stmts, 0); - tree fn, base, exp = NULL; - gimple stmt; - tree var; -@@ -574,16 +794,24 @@ - inner-loop nested in an outer-loop that us being vectorized). */ - - static gimple --vect_recog_widen_sum_pattern (gimple last_stmt, tree *type_in, tree *type_out) -+vect_recog_widen_sum_pattern (VEC (gimple, heap) **stmts, tree *type_in, -+ tree *type_out) - { -+ gimple last_stmt = VEC_index (gimple, *stmts, 0); - gimple stmt; - tree oprnd0, oprnd1; - stmt_vec_info stmt_vinfo = vinfo_for_stmt (last_stmt); - tree type, half_type; - gimple pattern_stmt; - loop_vec_info loop_info = STMT_VINFO_LOOP_VINFO (stmt_vinfo); -- struct loop *loop = LOOP_VINFO_LOOP (loop_info); -+ struct loop *loop; - tree var; -+ bool promotion; -+ -+ if (!loop_info) -+ return NULL; -+ -+ loop = LOOP_VINFO_LOOP (loop_info); - - if (!is_gimple_assign (last_stmt)) - return NULL; -@@ -612,14 +840,16 @@ - || !types_compatible_p (TREE_TYPE (oprnd1), type)) - return NULL; - -- /* So far so good. Since last_stmt was detected as a (summation) reduction, -+ /* So far so good. Since last_stmt was detected as a (summation) reduction, - we know that oprnd1 is the reduction variable (defined by a loop-header - phi), and oprnd0 is an ssa-name defined by a stmt in the loop body. - Left to check that oprnd0 is defined by a cast from type 'type' to type - 'TYPE'. */ - -- if (!widened_name_p (oprnd0, last_stmt, &half_type, &stmt)) -- return NULL; -+ if (!type_conversion_p (oprnd0, last_stmt, true, &half_type, &stmt, -+ &promotion) -+ || !promotion) -+ return NULL; - - oprnd0 = gimple_assign_rhs1 (stmt); - *type_in = half_type; -@@ -641,9 +871,813 @@ - when doing outer-loop vectorization. */ - gcc_assert (!nested_in_vect_loop_p (loop, last_stmt)); - -+ VEC_safe_push (gimple, heap, *stmts, last_stmt); -+ return pattern_stmt; -+} -+ -+ -+/* Return TRUE if the operation in STMT can be performed on a smaller type. -+ -+ Input: -+ STMT - a statement to check. -+ DEF - we support operations with two operands, one of which is constant. -+ The other operand can be defined by a demotion operation, or by a -+ previous statement in a sequence of over-promoted operations. In the -+ later case DEF is used to replace that operand. (It is defined by a -+ pattern statement we created for the previous statement in the -+ sequence). -+ -+ Input/output: -+ NEW_TYPE - Output: a smaller type that we are trying to use. Input: if not -+ NULL, it's the type of DEF. -+ STMTS - additional pattern statements. If a pattern statement (type -+ conversion) is created in this function, its original statement is -+ added to STMTS. -+ -+ Output: -+ OP0, OP1 - if the operation fits a smaller type, OP0 and OP1 are the new -+ operands to use in the new pattern statement for STMT (will be created -+ in vect_recog_over_widening_pattern ()). -+ NEW_DEF_STMT - in case DEF has to be promoted, we create two pattern -+ statements for STMT: the first one is a type promotion and the second -+ one is the operation itself. We return the type promotion statement -+ in NEW_DEF_STMT and further store it in STMT_VINFO_PATTERN_DEF_STMT of -+ the second pattern statement. */ -+ -+static bool -+vect_operation_fits_smaller_type (gimple stmt, tree def, tree *new_type, -+ tree *op0, tree *op1, gimple *new_def_stmt, -+ VEC (gimple, heap) **stmts) -+{ -+ enum tree_code code; -+ tree const_oprnd, oprnd; -+ tree interm_type = NULL_TREE, half_type, tmp, new_oprnd, type; -+ gimple def_stmt, new_stmt; -+ bool first = false; -+ loop_vec_info loop_info = STMT_VINFO_LOOP_VINFO (vinfo_for_stmt (stmt)); -+ bool promotion; -+ bb_vec_info bb_info = STMT_VINFO_BB_VINFO (vinfo_for_stmt (stmt)); -+ struct loop *loop = NULL; -+ -+ if (loop_info) -+ loop = LOOP_VINFO_LOOP (loop_info); -+ -+ *new_def_stmt = NULL; -+ -+ if (!is_gimple_assign (stmt)) -+ return false; -+ -+ code = gimple_assign_rhs_code (stmt); -+ if (code != LSHIFT_EXPR && code != RSHIFT_EXPR -+ && code != BIT_IOR_EXPR && code != BIT_XOR_EXPR && code != BIT_AND_EXPR) -+ return false; -+ -+ oprnd = gimple_assign_rhs1 (stmt); -+ const_oprnd = gimple_assign_rhs2 (stmt); -+ type = gimple_expr_type (stmt); -+ -+ if (TREE_CODE (oprnd) != SSA_NAME -+ || TREE_CODE (const_oprnd) != INTEGER_CST) -+ return false; -+ -+ /* If we are in the middle of a sequence, we use DEF from a previous -+ statement. Otherwise, OPRND has to be a result of type promotion. */ -+ if (*new_type) -+ { -+ half_type = *new_type; -+ oprnd = def; -+ } -+ else -+ { -+ first = true; -+ if (!type_conversion_p (oprnd, stmt, false, &half_type, &def_stmt, -+ &promotion) -+ || !promotion -+ || !gimple_bb (def_stmt) -+ || (loop && !flow_bb_inside_loop_p (loop, gimple_bb (def_stmt))) -+ || (!loop && gimple_bb (def_stmt) != BB_VINFO_BB (bb_info) -+ && gimple_code (def_stmt) != GIMPLE_PHI) -+ || !vinfo_for_stmt (def_stmt)) -+ return false; -+ } -+ -+ /* Can we perform the operation on a smaller type? */ -+ switch (code) -+ { -+ case BIT_IOR_EXPR: -+ case BIT_XOR_EXPR: -+ case BIT_AND_EXPR: -+ if (!int_fits_type_p (const_oprnd, half_type)) -+ { -+ /* HALF_TYPE is not enough. Try a bigger type if possible. */ -+ if (TYPE_PRECISION (type) < (TYPE_PRECISION (half_type) * 4)) -+ return false; -+ -+ interm_type = build_nonstandard_integer_type ( -+ TYPE_PRECISION (half_type) * 2, TYPE_UNSIGNED (type)); -+ if (!int_fits_type_p (const_oprnd, interm_type)) -+ return false; -+ } -+ -+ break; -+ -+ case LSHIFT_EXPR: -+ /* Try intermediate type - HALF_TYPE is not enough for sure. */ -+ if (TYPE_PRECISION (type) < (TYPE_PRECISION (half_type) * 4)) -+ return false; -+ -+ /* Check that HALF_TYPE size + shift amount <= INTERM_TYPE size. -+ (e.g., if the original value was char, the shift amount is at most 8 -+ if we want to use short). */ -+ if (compare_tree_int (const_oprnd, TYPE_PRECISION (half_type)) == 1) -+ return false; -+ -+ interm_type = build_nonstandard_integer_type ( -+ TYPE_PRECISION (half_type) * 2, TYPE_UNSIGNED (type)); -+ -+ if (!vect_supportable_shift (code, interm_type)) -+ return false; -+ -+ break; -+ -+ case RSHIFT_EXPR: -+ if (vect_supportable_shift (code, half_type)) -+ break; -+ -+ /* Try intermediate type - HALF_TYPE is not supported. */ -+ if (TYPE_PRECISION (type) < (TYPE_PRECISION (half_type) * 4)) -+ return false; -+ -+ interm_type = build_nonstandard_integer_type ( -+ TYPE_PRECISION (half_type) * 2, TYPE_UNSIGNED (type)); -+ -+ if (!vect_supportable_shift (code, interm_type)) -+ return false; -+ -+ break; -+ -+ default: -+ gcc_unreachable (); -+ } -+ -+ /* There are four possible cases: -+ 1. OPRND is defined by a type promotion (in that case FIRST is TRUE, it's -+ the first statement in the sequence) -+ a. The original, HALF_TYPE, is not enough - we replace the promotion -+ from HALF_TYPE to TYPE with a promotion to INTERM_TYPE. -+ b. HALF_TYPE is sufficient, OPRND is set as the RHS of the original -+ promotion. -+ 2. OPRND is defined by a pattern statement we created. -+ a. Its type is not sufficient for the operation, we create a new stmt: -+ a type conversion for OPRND from HALF_TYPE to INTERM_TYPE. We store -+ this statement in NEW_DEF_STMT, and it is later put in -+ STMT_VINFO_PATTERN_DEF_STMT of the pattern statement for STMT. -+ b. OPRND is good to use in the new statement. */ -+ if (first) -+ { -+ if (interm_type) -+ { -+ /* Replace the original type conversion HALF_TYPE->TYPE with -+ HALF_TYPE->INTERM_TYPE. */ -+ if (STMT_VINFO_RELATED_STMT (vinfo_for_stmt (def_stmt))) -+ { -+ new_stmt = STMT_VINFO_RELATED_STMT (vinfo_for_stmt (def_stmt)); -+ /* Check if the already created pattern stmt is what we need. */ -+ if (!is_gimple_assign (new_stmt) -+ || gimple_assign_rhs_code (new_stmt) != NOP_EXPR -+ || TREE_TYPE (gimple_assign_lhs (new_stmt)) != interm_type) -+ return false; -+ -+ VEC_safe_push (gimple, heap, *stmts, def_stmt); -+ oprnd = gimple_assign_lhs (new_stmt); -+ } -+ else -+ { -+ /* Create NEW_OPRND = (INTERM_TYPE) OPRND. */ -+ oprnd = gimple_assign_rhs1 (def_stmt); -+ tmp = create_tmp_reg (interm_type, NULL); -+ add_referenced_var (tmp); -+ new_oprnd = make_ssa_name (tmp, NULL); -+ new_stmt = gimple_build_assign_with_ops (NOP_EXPR, new_oprnd, -+ oprnd, NULL_TREE); -+ SSA_NAME_DEF_STMT (new_oprnd) = new_stmt; -+ STMT_VINFO_RELATED_STMT (vinfo_for_stmt (def_stmt)) = new_stmt; -+ VEC_safe_push (gimple, heap, *stmts, def_stmt); -+ oprnd = new_oprnd; -+ } -+ } -+ else -+ { -+ /* Retrieve the operand before the type promotion. */ -+ oprnd = gimple_assign_rhs1 (def_stmt); -+ } -+ } -+ else -+ { -+ if (interm_type) -+ { -+ /* Create a type conversion HALF_TYPE->INTERM_TYPE. */ -+ tmp = create_tmp_reg (interm_type, NULL); -+ add_referenced_var (tmp); -+ new_oprnd = make_ssa_name (tmp, NULL); -+ new_stmt = gimple_build_assign_with_ops (NOP_EXPR, new_oprnd, -+ oprnd, NULL_TREE); -+ SSA_NAME_DEF_STMT (new_oprnd) = new_stmt; -+ oprnd = new_oprnd; -+ *new_def_stmt = new_stmt; -+ } -+ -+ /* Otherwise, OPRND is already set. */ -+ } -+ -+ if (interm_type) -+ *new_type = interm_type; -+ else -+ *new_type = half_type; -+ -+ *op0 = oprnd; -+ *op1 = fold_convert (*new_type, const_oprnd); -+ -+ return true; -+} -+ -+ -+/* Try to find a statement or a sequence of statements that can be performed -+ on a smaller type: -+ -+ type x_t; -+ TYPE x_T, res0_T, res1_T; -+ loop: -+ S1 x_t = *p; -+ S2 x_T = (TYPE) x_t; -+ S3 res0_T = op (x_T, C0); -+ S4 res1_T = op (res0_T, C1); -+ S5 ... = () res1_T; - type demotion -+ -+ where type 'TYPE' is at least double the size of type 'type', C0 and C1 are -+ constants. -+ Check if S3 and S4 can be done on a smaller type than 'TYPE', it can either -+ be 'type' or some intermediate type. For now, we expect S5 to be a type -+ demotion operation. We also check that S3 and S4 have only one use. -+. -+ -+*/ -+static gimple -+vect_recog_over_widening_pattern (VEC (gimple, heap) **stmts, -+ tree *type_in, tree *type_out) -+{ -+ gimple stmt = VEC_pop (gimple, *stmts); -+ gimple pattern_stmt = NULL, new_def_stmt, prev_stmt = NULL, use_stmt = NULL; -+ tree op0, op1, vectype = NULL_TREE, lhs, use_lhs, use_type; -+ imm_use_iterator imm_iter; -+ use_operand_p use_p; -+ int nuses = 0; -+ tree var = NULL_TREE, new_type = NULL_TREE, tmp, new_oprnd; -+ bool first; -+ loop_vec_info loop_vinfo; -+ struct loop *loop = NULL; -+ bb_vec_info bb_vinfo; -+ stmt_vec_info stmt_vinfo; -+ -+ stmt_vinfo = vinfo_for_stmt (stmt); -+ loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_vinfo); -+ bb_vinfo = STMT_VINFO_BB_VINFO (stmt_vinfo); -+ if (loop_vinfo) -+ loop = LOOP_VINFO_LOOP (loop_vinfo); -+ -+ first = true; -+ while (1) -+ { -+ if (!vinfo_for_stmt (stmt) -+ || STMT_VINFO_IN_PATTERN_P (vinfo_for_stmt (stmt))) -+ return NULL; -+ -+ new_def_stmt = NULL; -+ if (!vect_operation_fits_smaller_type (stmt, var, &new_type, -+ &op0, &op1, &new_def_stmt, -+ stmts)) -+ { -+ if (first) -+ return NULL; -+ else -+ break; -+ } -+ -+ /* STMT can be performed on a smaller type. Check its uses. */ -+ lhs = gimple_assign_lhs (stmt); -+ nuses = 0; -+ FOR_EACH_IMM_USE_FAST (use_p, imm_iter, lhs) -+ { -+ if (is_gimple_debug (USE_STMT (use_p))) -+ continue; -+ use_stmt = USE_STMT (use_p); -+ nuses++; -+ } -+ -+ if (nuses != 1 || !is_gimple_assign (use_stmt) -+ || !gimple_bb (use_stmt) -+ || (loop && !flow_bb_inside_loop_p (loop, gimple_bb (use_stmt))) -+ || (!loop && gimple_bb (use_stmt) != BB_VINFO_BB (bb_vinfo))) -+ return NULL; -+ -+ /* Create pattern statement for STMT. */ -+ vectype = get_vectype_for_scalar_type (new_type); -+ if (!vectype) -+ return NULL; -+ -+ /* We want to collect all the statements for which we create pattern -+ statetments, except for the case when the last statement in the -+ sequence doesn't have a corresponding pattern statement. In such -+ case we associate the last pattern statement with the last statement -+ in the sequence. Therefore, we only add the original statement to -+ the list if we know that it is not the last. */ -+ if (prev_stmt) -+ VEC_safe_push (gimple, heap, *stmts, prev_stmt); -+ -+ var = vect_recog_temp_ssa_var (new_type, NULL); -+ pattern_stmt = gimple_build_assign_with_ops ( -+ gimple_assign_rhs_code (stmt), var, op0, op1); -+ SSA_NAME_DEF_STMT (var) = pattern_stmt; -+ STMT_VINFO_RELATED_STMT (vinfo_for_stmt (stmt)) = pattern_stmt; -+ STMT_VINFO_PATTERN_DEF_STMT (vinfo_for_stmt (stmt)) = new_def_stmt; -+ -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ { -+ fprintf (vect_dump, "created pattern stmt: "); -+ print_gimple_stmt (vect_dump, pattern_stmt, 0, TDF_SLIM); -+ } -+ -+ prev_stmt = stmt; -+ stmt = use_stmt; -+ -+ first = false; -+ } -+ -+ /* We got a sequence. We expect it to end with a type demotion operation. -+ Otherwise, we quit (for now). There are three possible cases: the -+ conversion is to NEW_TYPE (we don't do anything), the conversion is to -+ a type bigger than NEW_TYPE and/or the signedness of USE_TYPE and -+ NEW_TYPE differs (we create a new conversion statement). */ -+ if (CONVERT_EXPR_CODE_P (gimple_assign_rhs_code (use_stmt))) -+ { -+ use_lhs = gimple_assign_lhs (use_stmt); -+ use_type = TREE_TYPE (use_lhs); -+ /* Support only type promotion or signedess change. */ -+ if (!INTEGRAL_TYPE_P (use_type) -+ || TYPE_PRECISION (new_type) > TYPE_PRECISION (use_type)) -+ return NULL; -+ -+ if (TYPE_UNSIGNED (new_type) != TYPE_UNSIGNED (use_type) -+ || TYPE_PRECISION (new_type) != TYPE_PRECISION (use_type)) -+ { -+ /* Create NEW_TYPE->USE_TYPE conversion. */ -+ tmp = create_tmp_reg (use_type, NULL); -+ add_referenced_var (tmp); -+ new_oprnd = make_ssa_name (tmp, NULL); -+ pattern_stmt = gimple_build_assign_with_ops (NOP_EXPR, new_oprnd, -+ var, NULL_TREE); -+ SSA_NAME_DEF_STMT (new_oprnd) = pattern_stmt; -+ STMT_VINFO_RELATED_STMT (vinfo_for_stmt (use_stmt)) = pattern_stmt; -+ -+ *type_in = get_vectype_for_scalar_type (new_type); -+ *type_out = get_vectype_for_scalar_type (use_type); -+ -+ /* We created a pattern statement for the last statement in the -+ sequence, so we don't need to associate it with the pattern -+ statement created for PREV_STMT. Therefore, we add PREV_STMT -+ to the list in order to mark it later in vect_pattern_recog_1. */ -+ if (prev_stmt) -+ VEC_safe_push (gimple, heap, *stmts, prev_stmt); -+ } -+ else -+ { -+ if (prev_stmt) -+ STMT_VINFO_PATTERN_DEF_STMT (vinfo_for_stmt (use_stmt)) -+ = STMT_VINFO_PATTERN_DEF_STMT (vinfo_for_stmt (prev_stmt)); -+ -+ *type_in = vectype; -+ *type_out = NULL_TREE; -+ } -+ -+ VEC_safe_push (gimple, heap, *stmts, use_stmt); -+ } -+ else -+ /* TODO: support general case, create a conversion to the correct type. */ -+ return NULL; -+ -+ /* Pattern detected. */ -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ { -+ fprintf (vect_dump, "vect_recog_over_widening_pattern: detected: "); -+ print_gimple_stmt (vect_dump, pattern_stmt, 0, TDF_SLIM); -+ } -+ -+ return pattern_stmt; -+} -+ -+ -+/* Detect widening shift pattern: -+ -+ type a_t; -+ TYPE a_T, res_T; -+ -+ S1 a_t = ; -+ S2 a_T = (TYPE) a_t; -+ S3 res_T = a_T << CONST; -+ -+ where type 'TYPE' is at least double the size of type 'type'. -+ -+ Also detect unsigned cases: -+ -+ unsigned type a_t; -+ unsigned TYPE u_res_T; -+ TYPE a_T, res_T; -+ -+ S1 a_t = ; -+ S2 a_T = (TYPE) a_t; -+ S3 res_T = a_T << CONST; -+ S4 u_res_T = (unsigned TYPE) res_T; -+ -+ And a case when 'TYPE' is 4 times bigger than 'type'. In that case we -+ create an additional pattern stmt for S2 to create a variable of an -+ intermediate type, and perform widen-shift on the intermediate type: -+ -+ type a_t; -+ interm_type a_it; -+ TYPE a_T, res_T, res_T'; -+ -+ S1 a_t = ; -+ S2 a_T = (TYPE) a_t; -+ '--> a_it = (interm_type) a_t; -+ S3 res_T = a_T << CONST; -+ '--> res_T' = a_it <<* CONST; -+ -+ Input/Output: -+ -+ * STMTS: Contains a stmt from which the pattern search begins. -+ In case of unsigned widen-shift, the original stmt (S3) is replaced with S4 -+ in STMTS. When an intermediate type is used and a pattern statement is -+ created for S2, we also put S2 here (before S3). -+ -+ Output: -+ -+ * TYPE_IN: The type of the input arguments to the pattern. -+ -+ * TYPE_OUT: The type of the output of this pattern. -+ -+ * Return value: A new stmt that will be used to replace the sequence of -+ stmts that constitute the pattern. In this case it will be: -+ WIDEN_LSHIFT_EXPR <a_t, CONST>. */ -+ -+static gimple -+vect_recog_widen_shift_pattern (VEC (gimple, heap) **stmts, -+ tree *type_in, tree *type_out) -+{ -+ gimple last_stmt = VEC_pop (gimple, *stmts); -+ gimple def_stmt0; -+ tree oprnd0, oprnd1; -+ tree type, half_type0; -+ gimple pattern_stmt, orig_stmt = NULL; -+ tree vectype, vectype_out = NULL_TREE; -+ tree dummy; -+ tree var; -+ enum tree_code dummy_code; -+ int dummy_int; -+ VEC (tree, heap) * dummy_vec; -+ gimple use_stmt = NULL; -+ bool over_widen = false; -+ bool promotion; -+ -+ if (!is_gimple_assign (last_stmt) || !vinfo_for_stmt (last_stmt)) -+ return NULL; -+ -+ orig_stmt = last_stmt; -+ if (STMT_VINFO_IN_PATTERN_P (vinfo_for_stmt (last_stmt))) -+ { -+ /* This statement was also detected as over-widening operation (it can't -+ be any other pattern, because only over-widening detects shifts). -+ LAST_STMT is the final type demotion statement, but its related -+ statement is shift. We analyze the related statement to catch cases: -+ -+ orig code: -+ type a_t; -+ itype res; -+ TYPE a_T, res_T; -+ -+ S1 a_T = (TYPE) a_t; -+ S2 res_T = a_T << CONST; -+ S3 res = (itype)res_T; -+ -+ (size of type * 2 <= size of itype -+ and size of itype * 2 <= size of TYPE) -+ -+ code after over-widening pattern detection: -+ -+ S1 a_T = (TYPE) a_t; -+ --> a_it = (itype) a_t; -+ S2 res_T = a_T << CONST; -+ S3 res = (itype)res_T; <--- LAST_STMT -+ --> res = a_it << CONST; -+ -+ after widen_shift: -+ -+ S1 a_T = (TYPE) a_t; -+ --> a_it = (itype) a_t; - redundant -+ S2 res_T = a_T << CONST; -+ S3 res = (itype)res_T; -+ --> res = a_t w<< CONST; -+ -+ i.e., we replace the three statements with res = a_t w<< CONST. */ -+ last_stmt = STMT_VINFO_RELATED_STMT (vinfo_for_stmt (last_stmt)); -+ over_widen = true; -+ } -+ -+ if (gimple_assign_rhs_code (last_stmt) != LSHIFT_EXPR) -+ return NULL; -+ -+ oprnd0 = gimple_assign_rhs1 (last_stmt); -+ oprnd1 = gimple_assign_rhs2 (last_stmt); -+ if (TREE_CODE (oprnd0) != SSA_NAME || TREE_CODE (oprnd1) != INTEGER_CST) -+ return NULL; -+ -+ /* Check operand 0: it has to be defined by a type promotion. */ -+ if (!type_conversion_p (oprnd0, last_stmt, false, &half_type0, &def_stmt0, -+ &promotion) -+ || !promotion) -+ return NULL; -+ -+ /* Check operand 1: has to be positive. We check that it fits the type -+ in vect_handle_widen_op_by_const (). */ -+ if (tree_int_cst_compare (oprnd1, size_zero_node) <= 0) -+ return NULL; -+ -+ oprnd0 = gimple_assign_rhs1 (def_stmt0); -+ type = gimple_expr_type (last_stmt); -+ -+ /* Check if this a widening operation. */ -+ if (!vect_handle_widen_op_by_const (last_stmt, LSHIFT_EXPR, oprnd1, -+ &oprnd0, stmts, -+ type, &half_type0, def_stmt0)) -+ return NULL; -+ -+ /* Handle unsigned case. Look for -+ S4 u_res_T = (unsigned TYPE) res_T; -+ Use unsigned TYPE as the type for WIDEN_LSHIFT_EXPR. */ -+ if (TYPE_UNSIGNED (type) != TYPE_UNSIGNED (half_type0)) -+ { -+ tree lhs = gimple_assign_lhs (last_stmt), use_lhs; -+ imm_use_iterator imm_iter; -+ use_operand_p use_p; -+ int nuses = 0; -+ tree use_type; -+ -+ if (over_widen) -+ { -+ /* In case of over-widening pattern, S4 should be ORIG_STMT itself. -+ We check here that TYPE is the correct type for the operation, -+ i.e., it's the type of the original result. */ -+ tree orig_type = gimple_expr_type (orig_stmt); -+ if ((TYPE_UNSIGNED (type) != TYPE_UNSIGNED (orig_type)) -+ || (TYPE_PRECISION (type) != TYPE_PRECISION (orig_type))) -+ return NULL; -+ } -+ else -+ { -+ FOR_EACH_IMM_USE_FAST (use_p, imm_iter, lhs) -+ { -+ if (is_gimple_debug (USE_STMT (use_p))) -+ continue; -+ use_stmt = USE_STMT (use_p); -+ nuses++; -+ } -+ -+ if (nuses != 1 || !is_gimple_assign (use_stmt) -+ || !CONVERT_EXPR_CODE_P (gimple_assign_rhs_code (use_stmt))) -+ return NULL; -+ -+ use_lhs = gimple_assign_lhs (use_stmt); -+ use_type = TREE_TYPE (use_lhs); -+ -+ if (!INTEGRAL_TYPE_P (use_type) -+ || (TYPE_UNSIGNED (type) == TYPE_UNSIGNED (use_type)) -+ || (TYPE_PRECISION (type) != TYPE_PRECISION (use_type))) -+ return NULL; -+ -+ type = use_type; -+ } -+ } -+ -+ /* Pattern detected. */ -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ fprintf (vect_dump, "vect_recog_widen_shift_pattern: detected: "); -+ -+ /* Check target support. */ -+ vectype = get_vectype_for_scalar_type (half_type0); -+ vectype_out = get_vectype_for_scalar_type (type); -+ -+ if (!vectype -+ || !vectype_out -+ || !supportable_widening_operation (WIDEN_LSHIFT_EXPR, last_stmt, -+ vectype_out, vectype, -+ &dummy, &dummy, &dummy_code, -+ &dummy_code, &dummy_int, -+ &dummy_vec)) -+ return NULL; -+ -+ *type_in = vectype; -+ *type_out = vectype_out; -+ -+ /* Pattern supported. Create a stmt to be used to replace the pattern. */ -+ var = vect_recog_temp_ssa_var (type, NULL); -+ pattern_stmt = -+ gimple_build_assign_with_ops (WIDEN_LSHIFT_EXPR, var, oprnd0, oprnd1); -+ -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ print_gimple_stmt (vect_dump, pattern_stmt, 0, TDF_SLIM); -+ -+ if (use_stmt) -+ last_stmt = use_stmt; -+ else -+ last_stmt = orig_stmt; -+ -+ VEC_safe_push (gimple, heap, *stmts, last_stmt); - return pattern_stmt; - } - -+/* Function vect_recog_mixed_size_cond_pattern -+ -+ Try to find the following pattern: -+ -+ type x_t, y_t; -+ TYPE a_T, b_T, c_T; -+ loop: -+ S1 a_T = x_t CMP y_t ? b_T : c_T; -+ -+ where type 'TYPE' is an integral type which has different size -+ from 'type'. b_T and c_T are either constants (and if 'TYPE' is wider -+ than 'type', the constants need to fit into an integer type -+ with the same width as 'type') or results of conversion from 'type'. -+ -+ Input: -+ -+ * LAST_STMT: A stmt from which the pattern search begins. -+ -+ Output: -+ -+ * TYPE_IN: The type of the input arguments to the pattern. -+ -+ * TYPE_OUT: The type of the output of this pattern. -+ -+ * Return value: A new stmt that will be used to replace the pattern. -+ Additionally a def_stmt is added. -+ -+ a_it = x_t CMP y_t ? b_it : c_it; -+ a_T = (TYPE) a_it; */ -+ -+static gimple -+vect_recog_mixed_size_cond_pattern (VEC (gimple, heap) **stmts, tree *type_in, -+ tree *type_out) -+{ -+ gimple last_stmt = VEC_index (gimple, *stmts, 0); -+ tree cond_expr, then_clause, else_clause; -+ stmt_vec_info stmt_vinfo = vinfo_for_stmt (last_stmt), def_stmt_info; -+ tree type, vectype, comp_vectype, comp_type, op, tmp; -+ enum machine_mode cmpmode; -+ gimple pattern_stmt, def_stmt; -+ loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_vinfo); -+ tree orig_type0 = NULL_TREE, orig_type1 = NULL_TREE; -+ gimple def_stmt0 = NULL, def_stmt1 = NULL; -+ bool promotion; -+ bb_vec_info bb_vinfo = STMT_VINFO_BB_VINFO (stmt_vinfo); -+ -+ if (!is_gimple_assign (last_stmt) -+ || gimple_assign_rhs_code (last_stmt) != COND_EXPR -+ || STMT_VINFO_DEF_TYPE (stmt_vinfo) != vect_internal_def) -+ return NULL; -+ -+ op = gimple_assign_rhs1 (last_stmt); -+ cond_expr = TREE_OPERAND (op, 0); -+ then_clause = TREE_OPERAND (op, 1); -+ else_clause = TREE_OPERAND (op, 2); -+ -+ if (!COMPARISON_CLASS_P (cond_expr)) -+ return NULL; -+ -+ type = gimple_expr_type (last_stmt); -+ comp_type = TREE_TYPE (TREE_OPERAND (cond_expr, 0)); -+ comp_vectype = get_vectype_for_scalar_type (comp_type); -+ if (comp_vectype == NULL_TREE) -+ return NULL; -+ -+ if (types_compatible_p (type, comp_type) -+ || !INTEGRAL_TYPE_P (comp_type) -+ || !INTEGRAL_TYPE_P (type)) -+ return NULL; -+ -+ if ((TREE_CODE (then_clause) != INTEGER_CST -+ && !type_conversion_p (then_clause, last_stmt, false, &orig_type0, -+ &def_stmt0, &promotion)) -+ || (TREE_CODE (else_clause) != INTEGER_CST -+ && !type_conversion_p (else_clause, last_stmt, false, &orig_type1, -+ &def_stmt1, &promotion))) -+ return NULL; -+ -+ if (orig_type0 && orig_type1 -+ && (!types_compatible_p (orig_type0, orig_type1) -+ || !types_compatible_p (orig_type0, comp_type))) -+ return NULL; -+ -+ if (orig_type0) -+ then_clause = gimple_assign_rhs1 (def_stmt0); -+ -+ if (orig_type1) -+ else_clause = gimple_assign_rhs1 (def_stmt1); -+ -+ cmpmode = GET_MODE_INNER (TYPE_MODE (comp_vectype)); -+ if (GET_MODE_BITSIZE (TYPE_MODE (type)) == GET_MODE_BITSIZE (cmpmode)) -+ return NULL; -+ -+ vectype = get_vectype_for_scalar_type (type); -+ if (vectype == NULL_TREE) -+ return NULL; -+ -+ if (!expand_vec_cond_expr_p (comp_vectype, TYPE_MODE (comp_vectype))) -+ return NULL; -+ -+ if (GET_MODE_BITSIZE (TYPE_MODE (type)) > GET_MODE_BITSIZE (cmpmode) -+ && ((TREE_CODE (then_clause) == INTEGER_CST -+ && !int_fits_type_p (then_clause, comp_type)) -+ || (TREE_CODE (else_clause) == INTEGER_CST -+ && !int_fits_type_p (else_clause, comp_type)))) -+ return NULL; -+ -+ tmp = build3 (COND_EXPR, comp_type, unshare_expr (cond_expr), -+ fold_convert (comp_type, then_clause), -+ fold_convert (comp_type, else_clause)); -+ def_stmt = gimple_build_assign (vect_recog_temp_ssa_var (comp_type, NULL), -+ tmp); -+ -+ pattern_stmt -+ = gimple_build_assign_with_ops (NOP_EXPR, -+ vect_recog_temp_ssa_var (type, NULL), -+ gimple_assign_lhs (def_stmt), NULL_TREE); -+ -+ STMT_VINFO_PATTERN_DEF_STMT (stmt_vinfo) = def_stmt; -+ def_stmt_info = new_stmt_vec_info (def_stmt, loop_vinfo, bb_vinfo); -+ set_vinfo_for_stmt (def_stmt, def_stmt_info); -+ STMT_VINFO_VECTYPE (def_stmt_info) = comp_vectype; -+ *type_in = vectype; -+ *type_out = vectype; -+ -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ fprintf (vect_dump, "vect_recog_mixed_size_cond_pattern: detected: "); -+ -+ return pattern_stmt; -+} -+ -+ -+/* Mark statements that are involved in a pattern. */ -+ -+static inline void -+vect_mark_pattern_stmts (gimple orig_stmt, gimple pattern_stmt, -+ tree pattern_vectype) -+{ -+ stmt_vec_info pattern_stmt_info, def_stmt_info; -+ stmt_vec_info orig_stmt_info = vinfo_for_stmt (orig_stmt); -+ loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (orig_stmt_info); -+ bb_vec_info bb_vinfo = STMT_VINFO_BB_VINFO (orig_stmt_info); -+ gimple def_stmt; -+ -+ set_vinfo_for_stmt (pattern_stmt, -+ new_stmt_vec_info (pattern_stmt, loop_vinfo, bb_vinfo)); -+ gimple_set_bb (pattern_stmt, gimple_bb (orig_stmt)); -+ pattern_stmt_info = vinfo_for_stmt (pattern_stmt); -+ -+ STMT_VINFO_RELATED_STMT (pattern_stmt_info) = orig_stmt; -+ STMT_VINFO_DEF_TYPE (pattern_stmt_info) -+ = STMT_VINFO_DEF_TYPE (orig_stmt_info); -+ STMT_VINFO_VECTYPE (pattern_stmt_info) = pattern_vectype; -+ STMT_VINFO_IN_PATTERN_P (orig_stmt_info) = true; -+ STMT_VINFO_RELATED_STMT (orig_stmt_info) = pattern_stmt; -+ STMT_VINFO_PATTERN_DEF_STMT (pattern_stmt_info) -+ = STMT_VINFO_PATTERN_DEF_STMT (orig_stmt_info); -+ if (STMT_VINFO_PATTERN_DEF_STMT (pattern_stmt_info)) -+ { -+ def_stmt = STMT_VINFO_PATTERN_DEF_STMT (pattern_stmt_info); -+ def_stmt_info = vinfo_for_stmt (def_stmt); -+ if (def_stmt_info == NULL) -+ { -+ def_stmt_info = new_stmt_vec_info (def_stmt, loop_vinfo, bb_vinfo); -+ set_vinfo_for_stmt (def_stmt, def_stmt_info); -+ } -+ gimple_set_bb (def_stmt, gimple_bb (orig_stmt)); -+ STMT_VINFO_RELATED_STMT (def_stmt_info) = orig_stmt; -+ STMT_VINFO_DEF_TYPE (def_stmt_info) -+ = STMT_VINFO_DEF_TYPE (orig_stmt_info); -+ if (STMT_VINFO_VECTYPE (def_stmt_info) == NULL_TREE) -+ STMT_VINFO_VECTYPE (def_stmt_info) = pattern_vectype; -+ } -+} - - /* Function vect_pattern_recog_1 - -@@ -669,29 +1703,33 @@ - - static void - vect_pattern_recog_1 ( -- gimple (* vect_recog_func) (gimple, tree *, tree *), -- gimple_stmt_iterator si) -+ gimple (* vect_recog_func) (VEC (gimple, heap) **, tree *, tree *), -+ gimple_stmt_iterator si, -+ VEC (gimple, heap) **stmts_to_replace) - { - gimple stmt = gsi_stmt (si), pattern_stmt; -- stmt_vec_info stmt_info = vinfo_for_stmt (stmt); -- stmt_vec_info pattern_stmt_info; -- loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_info); -+ stmt_vec_info stmt_info; -+ loop_vec_info loop_vinfo; - tree pattern_vectype; - tree type_in, type_out; - enum tree_code code; - int i; - gimple next; - -- pattern_stmt = (* vect_recog_func) (stmt, &type_in, &type_out); -+ VEC_truncate (gimple, *stmts_to_replace, 0); -+ VEC_quick_push (gimple, *stmts_to_replace, stmt); -+ pattern_stmt = (* vect_recog_func) (stmts_to_replace, &type_in, &type_out); - if (!pattern_stmt) - return; - -+ stmt = VEC_last (gimple, *stmts_to_replace); -+ stmt_info = vinfo_for_stmt (stmt); -+ loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_info); -+ - if (VECTOR_MODE_P (TYPE_MODE (type_in))) - { - /* No need to check target support (already checked by the pattern - recognition function). */ -- if (type_out) -- gcc_assert (VECTOR_MODE_P (TYPE_MODE (type_out))); - pattern_vectype = type_out ? type_out : type_in; - } - else -@@ -736,22 +1774,32 @@ - } - - /* Mark the stmts that are involved in the pattern. */ -- gsi_insert_before (&si, pattern_stmt, GSI_SAME_STMT); -- set_vinfo_for_stmt (pattern_stmt, -- new_stmt_vec_info (pattern_stmt, loop_vinfo, NULL)); -- pattern_stmt_info = vinfo_for_stmt (pattern_stmt); -- -- STMT_VINFO_RELATED_STMT (pattern_stmt_info) = stmt; -- STMT_VINFO_DEF_TYPE (pattern_stmt_info) = STMT_VINFO_DEF_TYPE (stmt_info); -- STMT_VINFO_VECTYPE (pattern_stmt_info) = pattern_vectype; -- STMT_VINFO_IN_PATTERN_P (stmt_info) = true; -- STMT_VINFO_RELATED_STMT (stmt_info) = pattern_stmt; -+ vect_mark_pattern_stmts (stmt, pattern_stmt, pattern_vectype); - - /* Patterns cannot be vectorized using SLP, because they change the order of - computation. */ -- FOR_EACH_VEC_ELT (gimple, LOOP_VINFO_REDUCTIONS (loop_vinfo), i, next) -- if (next == stmt) -- VEC_ordered_remove (gimple, LOOP_VINFO_REDUCTIONS (loop_vinfo), i); -+ if (loop_vinfo) -+ FOR_EACH_VEC_ELT (gimple, LOOP_VINFO_REDUCTIONS (loop_vinfo), i, next) -+ if (next == stmt) -+ VEC_ordered_remove (gimple, LOOP_VINFO_REDUCTIONS (loop_vinfo), i); -+ -+ /* It is possible that additional pattern stmts are created and inserted in -+ STMTS_TO_REPLACE. We create a stmt_info for each of them, and mark the -+ relevant statements. */ -+ for (i = 0; VEC_iterate (gimple, *stmts_to_replace, i, stmt) -+ && (unsigned) i < (VEC_length (gimple, *stmts_to_replace) - 1); -+ i++) -+ { -+ stmt_info = vinfo_for_stmt (stmt); -+ pattern_stmt = STMT_VINFO_RELATED_STMT (stmt_info); -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ { -+ fprintf (vect_dump, "additional pattern stmt: "); -+ print_gimple_stmt (vect_dump, pattern_stmt, 0, TDF_SLIM); -+ } -+ -+ vect_mark_pattern_stmts (stmt, pattern_stmt, NULL_TREE); -+ } - } - - -@@ -761,8 +1809,8 @@ - LOOP_VINFO - a struct_loop_info of a loop in which we want to look for - computation idioms. - -- Output - for each computation idiom that is detected we insert a new stmt -- that provides the same functionality and that can be vectorized. We -+ Output - for each computation idiom that is detected we create a new stmt -+ that provides the same functionality and that can be vectorized. We - also record some information in the struct_stmt_info of the relevant - stmts, as explained below: - -@@ -777,79 +1825,113 @@ - S5: ... = ..use(a_0).. - - - - - Say the sequence {S1,S2,S3,S4} was detected as a pattern that can be -- represented by a single stmt. We then: -- - create a new stmt S6 that will replace the pattern. -- - insert the new stmt S6 before the last stmt in the pattern -+ represented by a single stmt. We then: -+ - create a new stmt S6 equivalent to the pattern (the stmt is not -+ inserted into the code) - - fill in the STMT_VINFO fields as follows: - - in_pattern_p related_stmt vec_stmt - S1: a_i = .... - - - - S2: a_2 = ..use(a_i).. - - - - S3: a_1 = ..use(a_2).. - - - -- > S6: a_new = .... - S4 - - S4: a_0 = ..use(a_1).. true S6 - -+ '---> S6: a_new = .... - S4 - - S5: ... = ..use(a_0).. - - - - - (the last stmt in the pattern (S4) and the new pattern stmt (S6) point -- to each other through the RELATED_STMT field). -+ to each other through the RELATED_STMT field). - - S6 will be marked as relevant in vect_mark_stmts_to_be_vectorized instead - of S4 because it will replace all its uses. Stmts {S1,S2,S3} will - remain irrelevant unless used by stmts other than S4. - - If vectorization succeeds, vect_transform_stmt will skip over {S1,S2,S3} -- (because they are marked as irrelevant). It will vectorize S6, and record -- a pointer to the new vector stmt VS6 both from S6 (as usual), and also -- from S4. We do that so that when we get to vectorizing stmts that use the -- def of S4 (like S5 that uses a_0), we'll know where to take the relevant -- vector-def from. S4 will be skipped, and S5 will be vectorized as usual: -+ (because they are marked as irrelevant). It will vectorize S6, and record -+ a pointer to the new vector stmt VS6 from S6 (as usual). -+ S4 will be skipped, and S5 will be vectorized as usual: - - in_pattern_p related_stmt vec_stmt - S1: a_i = .... - - - - S2: a_2 = ..use(a_i).. - - - - S3: a_1 = ..use(a_2).. - - - - > VS6: va_new = .... - - - -- S6: a_new = .... - S4 VS6 - S4: a_0 = ..use(a_1).. true S6 VS6 -+ '---> S6: a_new = .... - S4 VS6 - > VS5: ... = ..vuse(va_new).. - - - - S5: ... = ..use(a_0).. - - - - -- DCE could then get rid of {S1,S2,S3,S4,S5,S6} (if their defs are not used -+ DCE could then get rid of {S1,S2,S3,S4,S5} (if their defs are not used - elsewhere), and we'll end up with: - - VS6: va_new = .... -- VS5: ... = ..vuse(va_new).. -+ VS5: ... = ..vuse(va_new).. - -- If vectorization does not succeed, DCE will clean S6 away (its def is -- not used), and we'll end up with the original sequence. --*/ -+ In case of more than one pattern statements, e.g., widen-mult with -+ intermediate type: -+ -+ S1 a_t = ; -+ S2 a_T = (TYPE) a_t; -+ '--> S3: a_it = (interm_type) a_t; -+ S4 prod_T = a_T * CONST; -+ '--> S5: prod_T' = a_it w* CONST; -+ -+ there may be other users of a_T outside the pattern. In that case S2 will -+ be marked as relevant (as well as S3), and both S2 and S3 will be analyzed -+ and vectorized. The vector stmt VS2 will be recorded in S2, and VS3 will -+ be recorded in S3. */ - - void --vect_pattern_recog (loop_vec_info loop_vinfo) -+vect_pattern_recog (loop_vec_info loop_vinfo, bb_vec_info bb_vinfo) - { -- struct loop *loop = LOOP_VINFO_LOOP (loop_vinfo); -- basic_block *bbs = LOOP_VINFO_BBS (loop_vinfo); -- unsigned int nbbs = loop->num_nodes; -+ struct loop *loop; -+ basic_block *bbs, bb; -+ unsigned int nbbs; - gimple_stmt_iterator si; - unsigned int i, j; -- gimple (* vect_recog_func_ptr) (gimple, tree *, tree *); -+ gimple (* vect_recog_func_ptr) (VEC (gimple, heap) **, tree *, tree *); -+ VEC (gimple, heap) *stmts_to_replace = VEC_alloc (gimple, heap, 1); -+ gimple stmt; - - if (vect_print_dump_info (REPORT_DETAILS)) - fprintf (vect_dump, "=== vect_pattern_recog ==="); - -- /* Scan through the loop stmts, applying the pattern recognition -+ if (loop_vinfo) -+ { -+ loop = LOOP_VINFO_LOOP (loop_vinfo); -+ bbs = LOOP_VINFO_BBS (loop_vinfo); -+ nbbs = loop->num_nodes; -+ } -+ else -+ { -+ bb = BB_VINFO_BB (bb_vinfo); -+ nbbs = 1; -+ bbs = XNEW (basic_block); -+ bbs[0] = bb; -+ } -+ -+ /* Scan through the stmts, applying the pattern recognition - functions starting at each stmt visited: */ - for (i = 0; i < nbbs; i++) - { - basic_block bb = bbs[i]; - for (si = gsi_start_bb (bb); !gsi_end_p (si); gsi_next (&si)) - { -+ if (bb_vinfo && (stmt = gsi_stmt (si)) -+ && vinfo_for_stmt (stmt) -+ && !STMT_VINFO_VECTORIZABLE (vinfo_for_stmt (stmt))) -+ continue; -+ - /* Scan over all generic vect_recog_xxx_pattern functions. */ - for (j = 0; j < NUM_PATTERNS; j++) - { - vect_recog_func_ptr = vect_vect_recog_func_ptrs[j]; -- vect_pattern_recog_1 (vect_recog_func_ptr, si); -+ vect_pattern_recog_1 (vect_recog_func_ptr, si, -+ &stmts_to_replace); - } - } - } -+ -+ VEC_free (gimple, heap, stmts_to_replace); -+ if (bb_vinfo) -+ free (bbs); - } ---- a/src/gcc/tree-vect-slp.c -+++ b/src/gcc/tree-vect-slp.c -@@ -67,15 +67,16 @@ - static void - vect_free_slp_tree (slp_tree node) - { -+ int i; -+ slp_void_p child; -+ - if (!node) - return; - -- if (SLP_TREE_LEFT (node)) -- vect_free_slp_tree (SLP_TREE_LEFT (node)); -- -- if (SLP_TREE_RIGHT (node)) -- vect_free_slp_tree (SLP_TREE_RIGHT (node)); -+ FOR_EACH_VEC_ELT (slp_void_p, SLP_TREE_CHILDREN (node), i, child) -+ vect_free_slp_tree ((slp_tree) child); - -+ VEC_free (slp_void_p, heap, SLP_TREE_CHILDREN (node)); - VEC_free (gimple, heap, SLP_TREE_SCALAR_STMTS (node)); - - if (SLP_TREE_VEC_STMTS (node)) -@@ -96,46 +97,151 @@ - } - - --/* Get the defs for the rhs of STMT (collect them in DEF_STMTS0/1), check that -- they are of a legal type and that they match the defs of the first stmt of -- the SLP group (stored in FIRST_STMT_...). */ -+/* Create an SLP node for SCALAR_STMTS. */ -+ -+static slp_tree -+vect_create_new_slp_node (VEC (gimple, heap) *scalar_stmts) -+{ -+ slp_tree node; -+ gimple stmt = VEC_index (gimple, scalar_stmts, 0); -+ unsigned int nops; -+ -+ if (is_gimple_call (stmt)) -+ nops = gimple_call_num_args (stmt); -+ else if (is_gimple_assign (stmt)) -+ { -+ nops = gimple_num_ops (stmt) - 1; -+ if (gimple_assign_rhs_code (stmt) == COND_EXPR) -+ nops = 4; -+ } -+ else -+ return NULL; -+ -+ node = XNEW (struct _slp_tree); -+ SLP_TREE_SCALAR_STMTS (node) = scalar_stmts; -+ SLP_TREE_VEC_STMTS (node) = NULL; -+ SLP_TREE_CHILDREN (node) = VEC_alloc (slp_void_p, heap, nops); -+ SLP_TREE_OUTSIDE_OF_LOOP_COST (node) = 0; -+ SLP_TREE_INSIDE_OF_LOOP_COST (node) = 0; -+ -+ return node; -+} -+ -+ -+/* Allocate operands info for NOPS operands, and GROUP_SIZE def-stmts for each -+ operand. */ -+static VEC (slp_oprnd_info, heap) * -+vect_create_oprnd_info (int nops, int group_size) -+{ -+ int i; -+ slp_oprnd_info oprnd_info; -+ VEC (slp_oprnd_info, heap) *oprnds_info; -+ -+ oprnds_info = VEC_alloc (slp_oprnd_info, heap, nops); -+ for (i = 0; i < nops; i++) -+ { -+ oprnd_info = XNEW (struct _slp_oprnd_info); -+ oprnd_info->def_stmts = VEC_alloc (gimple, heap, group_size); -+ oprnd_info->first_dt = vect_uninitialized_def; -+ oprnd_info->first_def_type = NULL_TREE; -+ oprnd_info->first_const_oprnd = NULL_TREE; -+ oprnd_info->first_pattern = false; -+ VEC_quick_push (slp_oprnd_info, oprnds_info, oprnd_info); -+ } -+ -+ return oprnds_info; -+} -+ -+ -+/* Free operands info. */ -+ -+static void -+vect_free_oprnd_info (VEC (slp_oprnd_info, heap) **oprnds_info) -+{ -+ int i; -+ slp_oprnd_info oprnd_info; -+ -+ FOR_EACH_VEC_ELT (slp_oprnd_info, *oprnds_info, i, oprnd_info) -+ { -+ VEC_free (gimple, heap, oprnd_info->def_stmts); -+ XDELETE (oprnd_info); -+ } -+ -+ VEC_free (slp_oprnd_info, heap, *oprnds_info); -+} -+ -+ -+/* Get the defs for the rhs of STMT (collect them in OPRNDS_INFO), check that -+ they are of a valid type and that they match the defs of the first stmt of -+ the SLP group (stored in OPRNDS_INFO). */ - - static bool - vect_get_and_check_slp_defs (loop_vec_info loop_vinfo, bb_vec_info bb_vinfo, - slp_tree slp_node, gimple stmt, -- VEC (gimple, heap) **def_stmts0, -- VEC (gimple, heap) **def_stmts1, -- enum vect_def_type *first_stmt_dt0, -- enum vect_def_type *first_stmt_dt1, -- tree *first_stmt_def0_type, -- tree *first_stmt_def1_type, -- tree *first_stmt_const_oprnd, -- int ncopies_for_cost, -- bool *pattern0, bool *pattern1) -+ int ncopies_for_cost, bool first, -+ VEC (slp_oprnd_info, heap) **oprnds_info) - { - tree oprnd; - unsigned int i, number_of_oprnds; -- tree def; -+ tree def, def_op0 = NULL_TREE; - gimple def_stmt; -- enum vect_def_type dt[2] = {vect_unknown_def_type, vect_unknown_def_type}; -- stmt_vec_info stmt_info = -- vinfo_for_stmt (VEC_index (gimple, SLP_TREE_SCALAR_STMTS (slp_node), 0)); -- enum gimple_rhs_class rhs_class; -+ enum vect_def_type dt = vect_uninitialized_def; -+ enum vect_def_type dt_op0 = vect_uninitialized_def; -+ stmt_vec_info stmt_info = vinfo_for_stmt (stmt); -+ tree lhs = gimple_get_lhs (stmt); - struct loop *loop = NULL; -+ enum tree_code rhs_code; -+ bool different_types = false; -+ bool pattern = false; -+ slp_oprnd_info oprnd_info, oprnd0_info, oprnd1_info; -+ int op_idx = 1; -+ tree compare_rhs = NULL_TREE, rhs = NULL_TREE; -+ int cond_idx = -1; - - if (loop_vinfo) - loop = LOOP_VINFO_LOOP (loop_vinfo); - -- rhs_class = get_gimple_rhs_class (gimple_assign_rhs_code (stmt)); -- number_of_oprnds = gimple_num_ops (stmt) - 1; /* RHS only */ -+ if (is_gimple_call (stmt)) -+ number_of_oprnds = gimple_call_num_args (stmt); -+ else if (is_gimple_assign (stmt)) -+ { -+ number_of_oprnds = gimple_num_ops (stmt) - 1; -+ if (gimple_assign_rhs_code (stmt) == COND_EXPR) -+ { -+ number_of_oprnds = 4; -+ cond_idx = 0; -+ rhs = gimple_assign_rhs1 (stmt); -+ } -+ } -+ else -+ return false; - - for (i = 0; i < number_of_oprnds; i++) - { -- oprnd = gimple_op (stmt, i + 1); -+ if (compare_rhs) -+ oprnd = compare_rhs; -+ else -+ oprnd = gimple_op (stmt, op_idx++); -+ -+ oprnd_info = VEC_index (slp_oprnd_info, *oprnds_info, i); -+ -+ if (-1 < cond_idx && cond_idx < 4) -+ { -+ if (compare_rhs) -+ compare_rhs = NULL_TREE; -+ else -+ oprnd = TREE_OPERAND (rhs, cond_idx++); -+ } -+ -+ if (COMPARISON_CLASS_P (oprnd)) -+ { -+ compare_rhs = TREE_OPERAND (oprnd, 1); -+ oprnd = TREE_OPERAND (oprnd, 0); -+ } - - if (!vect_is_simple_use (oprnd, loop_vinfo, bb_vinfo, &def_stmt, &def, -- &dt[i]) -- || (!def_stmt && dt[i] != vect_constant_def)) -+ &dt) -+ || (!def_stmt && dt != vect_constant_def)) - { - if (vect_print_dump_info (REPORT_SLP)) - { -@@ -149,34 +255,32 @@ - /* Check if DEF_STMT is a part of a pattern in LOOP and get the def stmt - from the pattern. Check that all the stmts of the node are in the - pattern. */ -- if (loop && def_stmt && gimple_bb (def_stmt) -- && flow_bb_inside_loop_p (loop, gimple_bb (def_stmt)) -+ if (def_stmt && gimple_bb (def_stmt) -+ && ((loop && flow_bb_inside_loop_p (loop, gimple_bb (def_stmt))) -+ || (!loop && gimple_bb (def_stmt) == BB_VINFO_BB (bb_vinfo) -+ && gimple_code (def_stmt) != GIMPLE_PHI)) - && vinfo_for_stmt (def_stmt) -- && STMT_VINFO_IN_PATTERN_P (vinfo_for_stmt (def_stmt))) -+ && STMT_VINFO_IN_PATTERN_P (vinfo_for_stmt (def_stmt)) -+ && !STMT_VINFO_RELEVANT (vinfo_for_stmt (def_stmt)) -+ && !STMT_VINFO_LIVE_P (vinfo_for_stmt (def_stmt))) - { -- if (!*first_stmt_dt0) -- *pattern0 = true; -- else -- { -- if (i == 1 && !*first_stmt_dt1) -- *pattern1 = true; -- else if ((i == 0 && !*pattern0) || (i == 1 && !*pattern1)) -- { -- if (vect_print_dump_info (REPORT_DETAILS)) -- { -- fprintf (vect_dump, "Build SLP failed: some of the stmts" -- " are in a pattern, and others are not "); -- print_generic_expr (vect_dump, oprnd, TDF_SLIM); -- } -+ pattern = true; -+ if (!first && !oprnd_info->first_pattern) -+ { -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ { -+ fprintf (vect_dump, "Build SLP failed: some of the stmts" -+ " are in a pattern, and others are not "); -+ print_generic_expr (vect_dump, oprnd, TDF_SLIM); -+ } - -- return false; -- } -+ return false; - } - - def_stmt = STMT_VINFO_RELATED_STMT (vinfo_for_stmt (def_stmt)); -- dt[i] = STMT_VINFO_DEF_TYPE (vinfo_for_stmt (def_stmt)); -+ dt = STMT_VINFO_DEF_TYPE (vinfo_for_stmt (def_stmt)); - -- if (*dt == vect_unknown_def_type) -+ if (dt == vect_unknown_def_type) - { - if (vect_print_dump_info (REPORT_DETAILS)) - fprintf (vect_dump, "Unsupported pattern."); -@@ -200,85 +304,125 @@ - } - } - -- if (!*first_stmt_dt0) -+ if (first) - { -- /* op0 of the first stmt of the group - store its info. */ -- *first_stmt_dt0 = dt[i]; -- if (def) -- *first_stmt_def0_type = TREE_TYPE (def); -- else -- *first_stmt_const_oprnd = oprnd; -+ oprnd_info->first_dt = dt; -+ oprnd_info->first_pattern = pattern; -+ if (def) -+ { -+ oprnd_info->first_def_type = TREE_TYPE (def); -+ oprnd_info->first_const_oprnd = NULL_TREE; -+ } -+ else -+ { -+ oprnd_info->first_def_type = NULL_TREE; -+ oprnd_info->first_const_oprnd = oprnd; -+ } - -- /* Analyze costs (for the first stmt of the group only). */ -- if (rhs_class != GIMPLE_SINGLE_RHS) -- /* Not memory operation (we don't call this functions for loads). */ -- vect_model_simple_cost (stmt_info, ncopies_for_cost, dt, slp_node); -- else -- /* Store. */ -- vect_model_store_cost (stmt_info, ncopies_for_cost, dt[0], slp_node); -+ if (i == 0) -+ { -+ def_op0 = def; -+ dt_op0 = dt; -+ /* Analyze costs (for the first stmt of the group only). */ -+ if (REFERENCE_CLASS_P (lhs)) -+ /* Store. */ -+ vect_model_store_cost (stmt_info, ncopies_for_cost, false, -+ dt, slp_node); -+ else -+ /* Not memory operation (we don't call this function for -+ loads). */ -+ vect_model_simple_cost (stmt_info, ncopies_for_cost, &dt, -+ slp_node); -+ } - } - - else - { -- if (!*first_stmt_dt1 && i == 1) -+ /* Not first stmt of the group, check that the def-stmt/s match -+ the def-stmt/s of the first stmt. Allow different definition -+ types for reduction chains: the first stmt must be a -+ vect_reduction_def (a phi node), and the rest -+ vect_internal_def. */ -+ if (((oprnd_info->first_dt != dt -+ && !(oprnd_info->first_dt == vect_reduction_def -+ && dt == vect_internal_def)) -+ || (oprnd_info->first_def_type != NULL_TREE -+ && def -+ && !types_compatible_p (oprnd_info->first_def_type, -+ TREE_TYPE (def)))) -+ || (!def -+ && !types_compatible_p (TREE_TYPE (oprnd_info->first_const_oprnd), -+ TREE_TYPE (oprnd))) -+ || different_types) - { -- /* op1 of the first stmt of the group - store its info. */ -- *first_stmt_dt1 = dt[i]; -- if (def) -- *first_stmt_def1_type = TREE_TYPE (def); -- else -+ if (number_of_oprnds != 2) - { -- /* We assume that the stmt contains only one constant -- operand. We fail otherwise, to be on the safe side. */ -- if (*first_stmt_const_oprnd) -- { -- if (vect_print_dump_info (REPORT_SLP)) -- fprintf (vect_dump, "Build SLP failed: two constant " -- "oprnds in stmt"); -- return false; -- } -- *first_stmt_const_oprnd = oprnd; -- } -- } -- else -- { -- /* Not first stmt of the group, check that the def-stmt/s match -- the def-stmt/s of the first stmt. */ -- if ((i == 0 -- && (*first_stmt_dt0 != dt[i] -- || (*first_stmt_def0_type && def -- && !types_compatible_p (*first_stmt_def0_type, -- TREE_TYPE (def))))) -- || (i == 1 -- && (*first_stmt_dt1 != dt[i] -- || (*first_stmt_def1_type && def -- && !types_compatible_p (*first_stmt_def1_type, -- TREE_TYPE (def))))) -- || (!def -- && !types_compatible_p (TREE_TYPE (*first_stmt_const_oprnd), -- TREE_TYPE (oprnd)))) -+ if (vect_print_dump_info (REPORT_SLP)) -+ fprintf (vect_dump, "Build SLP failed: different types "); -+ -+ return false; -+ } -+ -+ /* Try to swap operands in case of binary operation. */ -+ if (i == 0) -+ different_types = true; -+ else - { -- if (vect_print_dump_info (REPORT_SLP)) -- fprintf (vect_dump, "Build SLP failed: different types "); -+ oprnd0_info = VEC_index (slp_oprnd_info, *oprnds_info, 0); -+ if (is_gimple_assign (stmt) -+ && (rhs_code = gimple_assign_rhs_code (stmt)) -+ && TREE_CODE_CLASS (rhs_code) == tcc_binary -+ && commutative_tree_code (rhs_code) -+ && oprnd0_info->first_dt == dt -+ && oprnd_info->first_dt == dt_op0 -+ && def_op0 && def -+ && !(oprnd0_info->first_def_type -+ && !types_compatible_p (oprnd0_info->first_def_type, -+ TREE_TYPE (def))) -+ && !(oprnd_info->first_def_type -+ && !types_compatible_p (oprnd_info->first_def_type, -+ TREE_TYPE (def_op0)))) -+ { -+ if (vect_print_dump_info (REPORT_SLP)) -+ { -+ fprintf (vect_dump, "Swapping operands of "); -+ print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM); -+ } - -- return false; -+ swap_tree_operands (stmt, gimple_assign_rhs1_ptr (stmt), -+ gimple_assign_rhs2_ptr (stmt)); -+ } -+ else -+ { -+ if (vect_print_dump_info (REPORT_SLP)) -+ fprintf (vect_dump, "Build SLP failed: different types "); -+ -+ return false; -+ } - } - } - } - - /* Check the types of the definitions. */ -- switch (dt[i]) -+ switch (dt) - { - case vect_constant_def: - case vect_external_def: -+ case vect_reduction_def: - break; - - case vect_internal_def: -- case vect_reduction_def: -- if (i == 0) -- VEC_safe_push (gimple, heap, *def_stmts0, def_stmt); -+ if (different_types) -+ { -+ oprnd0_info = VEC_index (slp_oprnd_info, *oprnds_info, 0); -+ oprnd1_info = VEC_index (slp_oprnd_info, *oprnds_info, 0); -+ if (i == 0) -+ VEC_quick_push (gimple, oprnd1_info->def_stmts, def_stmt); -+ else -+ VEC_quick_push (gimple, oprnd0_info->def_stmts, def_stmt); -+ } - else -- VEC_safe_push (gimple, heap, *def_stmts1, def_stmt); -+ VEC_quick_push (gimple, oprnd_info->def_stmts, def_stmt); - break; - - default: -@@ -309,17 +453,13 @@ - int ncopies_for_cost, unsigned int *max_nunits, - VEC (int, heap) **load_permutation, - VEC (slp_tree, heap) **loads, -- unsigned int vectorization_factor) -+ unsigned int vectorization_factor, bool *loads_permuted) - { -- VEC (gimple, heap) *def_stmts0 = VEC_alloc (gimple, heap, group_size); -- VEC (gimple, heap) *def_stmts1 = VEC_alloc (gimple, heap, group_size); - unsigned int i; - VEC (gimple, heap) *stmts = SLP_TREE_SCALAR_STMTS (*node); - gimple stmt = VEC_index (gimple, stmts, 0); -- enum vect_def_type first_stmt_dt0 = vect_uninitialized_def; -- enum vect_def_type first_stmt_dt1 = vect_uninitialized_def; - enum tree_code first_stmt_code = ERROR_MARK, rhs_code = ERROR_MARK; -- tree first_stmt_def1_type = NULL_TREE, first_stmt_def0_type = NULL_TREE; -+ enum tree_code first_cond_code = ERROR_MARK; - tree lhs; - bool stop_recursion = false, need_same_oprnds = false; - tree vectype, scalar_type, first_op1 = NULL_TREE; -@@ -328,13 +468,28 @@ - int icode; - enum machine_mode optab_op2_mode; - enum machine_mode vec_mode; -- tree first_stmt_const_oprnd = NULL_TREE; - struct data_reference *first_dr; -- bool pattern0 = false, pattern1 = false; - HOST_WIDE_INT dummy; - bool permutation = false; - unsigned int load_place; - gimple first_load, prev_first_load = NULL; -+ VEC (slp_oprnd_info, heap) *oprnds_info; -+ unsigned int nops; -+ slp_oprnd_info oprnd_info; -+ tree cond; -+ -+ if (is_gimple_call (stmt)) -+ nops = gimple_call_num_args (stmt); -+ else if (is_gimple_assign (stmt)) -+ { -+ nops = gimple_num_ops (stmt) - 1; -+ if (gimple_assign_rhs_code (stmt) == COND_EXPR) -+ nops = 4; -+ } -+ else -+ return false; -+ -+ oprnds_info = vect_create_oprnd_info (nops, group_size); - - /* For every stmt in NODE find its def stmt/s. */ - FOR_EACH_VEC_ELT (gimple, stmts, i, stmt) -@@ -355,6 +510,7 @@ - print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM); - } - -+ vect_free_oprnd_info (&oprnds_info); - return false; - } - -@@ -364,13 +520,30 @@ - if (vect_print_dump_info (REPORT_SLP)) - { - fprintf (vect_dump, -- "Build SLP failed: not GIMPLE_ASSIGN nor GIMPLE_CALL"); -+ "Build SLP failed: not GIMPLE_ASSIGN nor GIMPLE_CALL "); - print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM); - } - -+ vect_free_oprnd_info (&oprnds_info); - return false; - } - -+ if (is_gimple_assign (stmt) -+ && gimple_assign_rhs_code (stmt) == COND_EXPR -+ && (cond = TREE_OPERAND (gimple_assign_rhs1 (stmt), 0)) -+ && !COMPARISON_CLASS_P (cond)) -+ { -+ if (vect_print_dump_info (REPORT_SLP)) -+ { -+ fprintf (vect_dump, -+ "Build SLP failed: condition is not comparison "); -+ print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM); -+ } -+ -+ vect_free_oprnd_info (&oprnds_info); -+ return false; -+ } -+ - scalar_type = vect_get_smallest_scalar_type (stmt, &dummy, &dummy); - vectype = get_vectype_for_scalar_type (scalar_type); - if (!vectype) -@@ -380,23 +553,20 @@ - fprintf (vect_dump, "Build SLP failed: unsupported data-type "); - print_generic_expr (vect_dump, scalar_type, TDF_SLIM); - } -+ -+ vect_free_oprnd_info (&oprnds_info); - return false; - } - -- ncopies = vectorization_factor / TYPE_VECTOR_SUBPARTS (vectype); -- if (ncopies != 1) -+ /* In case of multiple types we need to detect the smallest type. */ -+ if (*max_nunits < TYPE_VECTOR_SUBPARTS (vectype)) - { -- if (vect_print_dump_info (REPORT_SLP)) -- fprintf (vect_dump, "SLP with multiple types "); -- -- /* FORNOW: multiple types are unsupported in BB SLP. */ -- if (bb_vinfo) -- return false; -+ *max_nunits = TYPE_VECTOR_SUBPARTS (vectype); -+ if (bb_vinfo) -+ vectorization_factor = *max_nunits; - } - -- /* In case of multiple types we need to detect the smallest type. */ -- if (*max_nunits < TYPE_VECTOR_SUBPARTS (vectype)) -- *max_nunits = TYPE_VECTOR_SUBPARTS (vectype); -+ ncopies = vectorization_factor / TYPE_VECTOR_SUBPARTS (vectype); - - if (is_gimple_call (stmt)) - rhs_code = CALL_EXPR; -@@ -431,6 +601,7 @@ - { - if (vect_print_dump_info (REPORT_SLP)) - fprintf (vect_dump, "Build SLP failed: no optab."); -+ vect_free_oprnd_info (&oprnds_info); - return false; - } - icode = (int) optab_handler (optab, vec_mode); -@@ -439,6 +610,7 @@ - if (vect_print_dump_info (REPORT_SLP)) - fprintf (vect_dump, "Build SLP failed: " - "op not supported by target."); -+ vect_free_oprnd_info (&oprnds_info); - return false; - } - optab_op2_mode = insn_data[icode].operand[2].mode; -@@ -449,6 +621,11 @@ - } - } - } -+ else if (rhs_code == WIDEN_LSHIFT_EXPR) -+ { -+ need_same_oprnds = true; -+ first_op1 = gimple_assign_rhs2 (stmt); -+ } - } - else - { -@@ -470,6 +647,7 @@ - print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM); - } - -+ vect_free_oprnd_info (&oprnds_info); - return false; - } - -@@ -483,6 +661,7 @@ - print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM); - } - -+ vect_free_oprnd_info (&oprnds_info); - return false; - } - } -@@ -494,15 +673,12 @@ - { - /* Store. */ - if (!vect_get_and_check_slp_defs (loop_vinfo, bb_vinfo, *node, -- stmt, &def_stmts0, &def_stmts1, -- &first_stmt_dt0, -- &first_stmt_dt1, -- &first_stmt_def0_type, -- &first_stmt_def1_type, -- &first_stmt_const_oprnd, -- ncopies_for_cost, -- &pattern0, &pattern1)) -- return false; -+ stmt, ncopies_for_cost, -+ (i == 0), &oprnds_info)) -+ { -+ vect_free_oprnd_info (&oprnds_info); -+ return false; -+ } - } - else - { -@@ -520,12 +696,15 @@ - print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM); - } - -+ vect_free_oprnd_info (&oprnds_info); - return false; - } - - /* Check that the size of interleaved loads group is not - greater than the SLP group size. */ -- if (DR_GROUP_SIZE (vinfo_for_stmt (stmt)) > ncopies * group_size) -+ if (loop_vinfo -+ && DR_GROUP_SIZE (vinfo_for_stmt (stmt)) -+ > ncopies * group_size) - { - if (vect_print_dump_info (REPORT_SLP)) - { -@@ -535,6 +714,7 @@ - print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM); - } - -+ vect_free_oprnd_info (&oprnds_info); - return false; - } - -@@ -555,6 +735,7 @@ - print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM); - } - -+ vect_free_oprnd_info (&oprnds_info); - return false; - } - } -@@ -574,12 +755,13 @@ - print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM); - } - -+ vect_free_oprnd_info (&oprnds_info); - return false; - } - - /* Analyze costs (for the first stmt in the group). */ - vect_model_load_cost (vinfo_for_stmt (stmt), -- ncopies_for_cost, *node); -+ ncopies_for_cost, false, *node); - } - - /* Store the place of this load in the interleaving chain. In -@@ -601,7 +783,7 @@ - { - if (TREE_CODE_CLASS (rhs_code) == tcc_reference) - { -- /* Not strided load. */ -+ /* Not strided load. */ - if (vect_print_dump_info (REPORT_SLP)) - { - fprintf (vect_dump, "Build SLP failed: not strided load "); -@@ -609,12 +791,14 @@ - } - - /* FORNOW: Not strided loads are not supported. */ -+ vect_free_oprnd_info (&oprnds_info); - return false; - } - - /* Not memory operation. */ - if (TREE_CODE_CLASS (rhs_code) != tcc_binary -- && TREE_CODE_CLASS (rhs_code) != tcc_unary) -+ && TREE_CODE_CLASS (rhs_code) != tcc_unary -+ && rhs_code != COND_EXPR) - { - if (vect_print_dump_info (REPORT_SLP)) - { -@@ -623,19 +807,38 @@ - print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM); - } - -+ vect_free_oprnd_info (&oprnds_info); - return false; - } - -+ if (rhs_code == COND_EXPR) -+ { -+ tree cond_expr = TREE_OPERAND (gimple_assign_rhs1 (stmt), 0); -+ -+ if (i == 0) -+ first_cond_code = TREE_CODE (cond_expr); -+ else if (first_cond_code != TREE_CODE (cond_expr)) -+ { -+ if (vect_print_dump_info (REPORT_SLP)) -+ { -+ fprintf (vect_dump, "Build SLP failed: different" -+ " operation"); -+ print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM); -+ } -+ -+ vect_free_oprnd_info (&oprnds_info); -+ return false; -+ } -+ } -+ - /* Find the def-stmts. */ - if (!vect_get_and_check_slp_defs (loop_vinfo, bb_vinfo, *node, stmt, -- &def_stmts0, &def_stmts1, -- &first_stmt_dt0, &first_stmt_dt1, -- &first_stmt_def0_type, -- &first_stmt_def1_type, -- &first_stmt_const_oprnd, -- ncopies_for_cost, -- &pattern0, &pattern1)) -- return false; -+ ncopies_for_cost, (i == 0), -+ &oprnds_info)) -+ { -+ vect_free_oprnd_info (&oprnds_info); -+ return false; -+ } - } - } - -@@ -646,61 +849,55 @@ - /* Strided loads were reached - stop the recursion. */ - if (stop_recursion) - { -+ VEC_safe_push (slp_tree, heap, *loads, *node); - if (permutation) - { -- VEC_safe_push (slp_tree, heap, *loads, *node); -+ -+ *loads_permuted = true; - *inside_cost - += targetm.vectorize.builtin_vectorization_cost (vec_perm, NULL, 0) - * group_size; - } - else -- { -- /* We don't check here complex numbers chains, so we keep them in -- LOADS for further check in vect_supported_load_permutation_p. */ -+ { -+ /* We don't check here complex numbers chains, so we set -+ LOADS_PERMUTED for further check in -+ vect_supported_load_permutation_p. */ - if (rhs_code == REALPART_EXPR || rhs_code == IMAGPART_EXPR) -- VEC_safe_push (slp_tree, heap, *loads, *node); -+ *loads_permuted = true; - } - -+ vect_free_oprnd_info (&oprnds_info); - return true; - } - - /* Create SLP_TREE nodes for the definition node/s. */ -- if (first_stmt_dt0 == vect_internal_def) -+ FOR_EACH_VEC_ELT (slp_oprnd_info, oprnds_info, i, oprnd_info) - { -- slp_tree left_node = XNEW (struct _slp_tree); -- SLP_TREE_SCALAR_STMTS (left_node) = def_stmts0; -- SLP_TREE_VEC_STMTS (left_node) = NULL; -- SLP_TREE_LEFT (left_node) = NULL; -- SLP_TREE_RIGHT (left_node) = NULL; -- SLP_TREE_OUTSIDE_OF_LOOP_COST (left_node) = 0; -- SLP_TREE_INSIDE_OF_LOOP_COST (left_node) = 0; -- if (!vect_build_slp_tree (loop_vinfo, bb_vinfo, &left_node, group_size, -- inside_cost, outside_cost, ncopies_for_cost, -- max_nunits, load_permutation, loads, -- vectorization_factor)) -- return false; -+ slp_tree child; - -- SLP_TREE_LEFT (*node) = left_node; -- } -+ if (oprnd_info->first_dt != vect_internal_def) -+ continue; - -- if (first_stmt_dt1 == vect_internal_def) -- { -- slp_tree right_node = XNEW (struct _slp_tree); -- SLP_TREE_SCALAR_STMTS (right_node) = def_stmts1; -- SLP_TREE_VEC_STMTS (right_node) = NULL; -- SLP_TREE_LEFT (right_node) = NULL; -- SLP_TREE_RIGHT (right_node) = NULL; -- SLP_TREE_OUTSIDE_OF_LOOP_COST (right_node) = 0; -- SLP_TREE_INSIDE_OF_LOOP_COST (right_node) = 0; -- if (!vect_build_slp_tree (loop_vinfo, bb_vinfo, &right_node, group_size, -+ child = vect_create_new_slp_node (oprnd_info->def_stmts); -+ if (!child -+ || !vect_build_slp_tree (loop_vinfo, bb_vinfo, &child, group_size, - inside_cost, outside_cost, ncopies_for_cost, - max_nunits, load_permutation, loads, -- vectorization_factor)) -- return false; -+ vectorization_factor, loads_permuted)) -+ { -+ if (child) -+ oprnd_info->def_stmts = NULL; -+ vect_free_slp_tree (child); -+ vect_free_oprnd_info (&oprnds_info); -+ return false; -+ } - -- SLP_TREE_RIGHT (*node) = right_node; -+ oprnd_info->def_stmts = NULL; -+ VEC_quick_push (slp_void_p, SLP_TREE_CHILDREN (*node), child); - } - -+ vect_free_oprnd_info (&oprnds_info); - return true; - } - -@@ -710,6 +907,7 @@ - { - int i; - gimple stmt; -+ slp_void_p child; - - if (!node) - return; -@@ -722,8 +920,8 @@ - } - fprintf (vect_dump, "\n"); - -- vect_print_slp_tree (SLP_TREE_LEFT (node)); -- vect_print_slp_tree (SLP_TREE_RIGHT (node)); -+ FOR_EACH_VEC_ELT (slp_void_p, SLP_TREE_CHILDREN (node), i, child) -+ vect_print_slp_tree ((slp_tree) child); - } - - -@@ -737,6 +935,7 @@ - { - int i; - gimple stmt; -+ slp_void_p child; - - if (!node) - return; -@@ -745,8 +944,8 @@ - if (j < 0 || i == j) - STMT_SLP_TYPE (vinfo_for_stmt (stmt)) = mark; - -- vect_mark_slp_stmts (SLP_TREE_LEFT (node), mark, j); -- vect_mark_slp_stmts (SLP_TREE_RIGHT (node), mark, j); -+ FOR_EACH_VEC_ELT (slp_void_p, SLP_TREE_CHILDREN (node), i, child) -+ vect_mark_slp_stmts ((slp_tree) child, mark, j); - } - - -@@ -758,6 +957,7 @@ - int i; - gimple stmt; - stmt_vec_info stmt_info; -+ slp_void_p child; - - if (!node) - return; -@@ -770,8 +970,8 @@ - STMT_VINFO_RELEVANT (stmt_info) = vect_used_in_scope; - } - -- vect_mark_slp_stmts_relevant (SLP_TREE_LEFT (node)); -- vect_mark_slp_stmts_relevant (SLP_TREE_RIGHT (node)); -+ FOR_EACH_VEC_ELT (slp_void_p, SLP_TREE_CHILDREN (node), i, child) -+ vect_mark_slp_stmts_relevant ((slp_tree) child); - } - - -@@ -844,12 +1044,13 @@ - gimple stmt; - VEC (gimple, heap) *tmp_stmts; - unsigned int index, i; -+ slp_void_p child; - - if (!node) - return; - -- vect_slp_rearrange_stmts (SLP_TREE_LEFT (node), group_size, permutation); -- vect_slp_rearrange_stmts (SLP_TREE_RIGHT (node), group_size, permutation); -+ FOR_EACH_VEC_ELT (slp_void_p, SLP_TREE_CHILDREN (node), i, child) -+ vect_slp_rearrange_stmts ((slp_tree) child, group_size, permutation); - - gcc_assert (group_size == VEC_length (gimple, SLP_TREE_SCALAR_STMTS (node))); - tmp_stmts = VEC_alloc (gimple, heap, group_size); -@@ -881,8 +1082,10 @@ - bool supported, bad_permutation = false; - sbitmap load_index; - slp_tree node, other_complex_node; -- gimple stmt, first = NULL, other_node_first; -+ gimple stmt, first = NULL, other_node_first, load, next_load, first_load; - unsigned complex_numbers = 0; -+ struct data_reference *dr; -+ bb_vec_info bb_vinfo; - - /* FORNOW: permutations are only supported in SLP. */ - if (!slp_instn) -@@ -1042,6 +1245,76 @@ - } - } - -+ /* In basic block vectorization we allow any subchain of an interleaving -+ chain. -+ FORNOW: not supported in loop SLP because of realignment compications. */ -+ bb_vinfo = STMT_VINFO_BB_VINFO (vinfo_for_stmt (stmt)); -+ bad_permutation = false; -+ /* Check that for every node in the instance teh loads form a subchain. */ -+ if (bb_vinfo) -+ { -+ FOR_EACH_VEC_ELT (slp_tree, SLP_INSTANCE_LOADS (slp_instn), i, node) -+ { -+ next_load = NULL; -+ first_load = NULL; -+ FOR_EACH_VEC_ELT (gimple, SLP_TREE_SCALAR_STMTS (node), j, load) -+ { -+ if (!first_load) -+ first_load = DR_GROUP_FIRST_DR (vinfo_for_stmt (load)); -+ else if (first_load -+ != DR_GROUP_FIRST_DR (vinfo_for_stmt (load))) -+ { -+ bad_permutation = true; -+ break; -+ } -+ -+ if (j != 0 && next_load != load) -+ { -+ bad_permutation = true; -+ break; -+ } -+ -+ next_load = DR_GROUP_NEXT_DR (vinfo_for_stmt (load)); -+ } -+ -+ if (bad_permutation) -+ break; -+ } -+ -+ /* Check that the alignment of the first load in every subchain, i.e., -+ the first statement in every load node, is supported. */ -+ if (!bad_permutation) -+ { -+ FOR_EACH_VEC_ELT (slp_tree, SLP_INSTANCE_LOADS (slp_instn), i, node) -+ { -+ first_load = VEC_index (gimple, SLP_TREE_SCALAR_STMTS (node), 0); -+ if (first_load -+ != DR_GROUP_FIRST_DR (vinfo_for_stmt (first_load))) -+ { -+ dr = STMT_VINFO_DATA_REF (vinfo_for_stmt (first_load)); -+ if (vect_supportable_dr_alignment (dr, false) -+ == dr_unaligned_unsupported) -+ { -+ if (vect_print_dump_info (REPORT_SLP)) -+ { -+ fprintf (vect_dump, "unsupported unaligned load "); -+ print_gimple_stmt (vect_dump, first_load, 0, -+ TDF_SLIM); -+ } -+ bad_permutation = true; -+ break; -+ } -+ } -+ } -+ -+ if (!bad_permutation) -+ { -+ VEC_free (int, heap, SLP_INSTANCE_LOAD_PERMUTATION (slp_instn)); -+ return true; -+ } -+ } -+ } -+ - /* FORNOW: the only supported permutation is 0..01..1.. of length equal to - GROUP_SIZE and where each sequence of same drs is of GROUP_SIZE length as - well (unless it's reduction). */ -@@ -1140,7 +1413,7 @@ - gimple stmt) - { - slp_instance new_instance; -- slp_tree node = XNEW (struct _slp_tree); -+ slp_tree node; - unsigned int group_size = DR_GROUP_SIZE (vinfo_for_stmt (stmt)); - unsigned int unrolling_factor = 1, nunits; - tree vectype, scalar_type = NULL_TREE; -@@ -1151,6 +1424,8 @@ - VEC (int, heap) *load_permutation; - VEC (slp_tree, heap) *loads; - struct data_reference *dr = STMT_VINFO_DATA_REF (vinfo_for_stmt (stmt)); -+ bool loads_permuted = false; -+ VEC (gimple, heap) *scalar_stmts; - - if (dr) - { -@@ -1180,7 +1455,6 @@ - if (loop_vinfo) - vectorization_factor = LOOP_VINFO_VECT_FACTOR (loop_vinfo); - else -- /* No multitypes in BB SLP. */ - vectorization_factor = nunits; - - /* Calculate the unrolling factor. */ -@@ -1195,39 +1469,31 @@ - } - - /* Create a node (a root of the SLP tree) for the packed strided stores. */ -- SLP_TREE_SCALAR_STMTS (node) = VEC_alloc (gimple, heap, group_size); -+ scalar_stmts = VEC_alloc (gimple, heap, group_size); - next = stmt; - if (dr) - { - /* Collect the stores and store them in SLP_TREE_SCALAR_STMTS. */ - while (next) - { -- VEC_safe_push (gimple, heap, SLP_TREE_SCALAR_STMTS (node), next); -+ if (STMT_VINFO_IN_PATTERN_P (vinfo_for_stmt (next)) -+ && STMT_VINFO_RELATED_STMT (vinfo_for_stmt (next))) -+ VEC_safe_push (gimple, heap, scalar_stmts, -+ STMT_VINFO_RELATED_STMT (vinfo_for_stmt (next))); -+ else -+ VEC_safe_push (gimple, heap, scalar_stmts, next); - next = DR_GROUP_NEXT_DR (vinfo_for_stmt (next)); - } - } - else - { - /* Collect reduction statements. */ -- for (i = 0; VEC_iterate (gimple, LOOP_VINFO_REDUCTIONS (loop_vinfo), i, -- next); -- i++) -- { -- VEC_safe_push (gimple, heap, SLP_TREE_SCALAR_STMTS (node), next); -- if (vect_print_dump_info (REPORT_DETAILS)) -- { -- fprintf (vect_dump, "pushing reduction into node: "); -- print_gimple_stmt (vect_dump, next, 0, TDF_SLIM); -- } -- } -+ VEC (gimple, heap) *reductions = LOOP_VINFO_REDUCTIONS (loop_vinfo); -+ for (i = 0; VEC_iterate (gimple, reductions, i, next); i++) -+ VEC_safe_push (gimple, heap, scalar_stmts, next); - } - -- SLP_TREE_VEC_STMTS (node) = NULL; -- SLP_TREE_NUMBER_OF_VEC_STMTS (node) = 0; -- SLP_TREE_LEFT (node) = NULL; -- SLP_TREE_RIGHT (node) = NULL; -- SLP_TREE_OUTSIDE_OF_LOOP_COST (node) = 0; -- SLP_TREE_INSIDE_OF_LOOP_COST (node) = 0; -+ node = vect_create_new_slp_node (scalar_stmts); - - /* Calculate the number of vector stmts to create based on the unrolling - factor (number of vectors is 1 if NUNITS >= GROUP_SIZE, and is -@@ -1241,25 +1507,33 @@ - if (vect_build_slp_tree (loop_vinfo, bb_vinfo, &node, group_size, - &inside_cost, &outside_cost, ncopies_for_cost, - &max_nunits, &load_permutation, &loads, -- vectorization_factor)) -+ vectorization_factor, &loads_permuted)) - { -- /* Create a new SLP instance. */ -- new_instance = XNEW (struct _slp_instance); -- SLP_INSTANCE_TREE (new_instance) = node; -- SLP_INSTANCE_GROUP_SIZE (new_instance) = group_size; -- /* Calculate the unrolling factor based on the smallest type in the -- loop. */ -+ /* Calculate the unrolling factor based on the smallest type. */ - if (max_nunits > nunits) - unrolling_factor = least_common_multiple (max_nunits, group_size) - / group_size; - -+ if (unrolling_factor != 1 && !loop_vinfo) -+ { -+ if (vect_print_dump_info (REPORT_SLP)) -+ fprintf (vect_dump, "Build SLP failed: unrolling required in basic" -+ " block SLP"); -+ return false; -+ } -+ -+ /* Create a new SLP instance. */ -+ new_instance = XNEW (struct _slp_instance); -+ SLP_INSTANCE_TREE (new_instance) = node; -+ SLP_INSTANCE_GROUP_SIZE (new_instance) = group_size; - SLP_INSTANCE_UNROLLING_FACTOR (new_instance) = unrolling_factor; - SLP_INSTANCE_OUTSIDE_OF_LOOP_COST (new_instance) = outside_cost; - SLP_INSTANCE_INSIDE_OF_LOOP_COST (new_instance) = inside_cost; - SLP_INSTANCE_LOADS (new_instance) = loads; - SLP_INSTANCE_FIRST_LOAD_STMT (new_instance) = NULL; - SLP_INSTANCE_LOAD_PERMUTATION (new_instance) = load_permutation; -- if (VEC_length (slp_tree, loads)) -+ -+ if (loads_permuted) - { - if (!vect_supported_load_permutation_p (new_instance, group_size, - load_permutation)) -@@ -1396,6 +1670,7 @@ - imm_use_iterator imm_iter; - gimple use_stmt; - stmt_vec_info stmt_vinfo; -+ slp_void_p child; - - if (!node) - return; -@@ -1413,8 +1688,8 @@ - == vect_reduction_def)) - vect_mark_slp_stmts (node, hybrid, i); - -- vect_detect_hybrid_slp_stmts (SLP_TREE_LEFT (node)); -- vect_detect_hybrid_slp_stmts (SLP_TREE_RIGHT (node)); -+ FOR_EACH_VEC_ELT (slp_void_p, SLP_TREE_CHILDREN (node), i, child) -+ vect_detect_hybrid_slp_stmts ((slp_tree) child); - } - - -@@ -1504,13 +1779,14 @@ - bool dummy; - int i; - gimple stmt; -+ slp_void_p child; - - if (!node) - return true; - -- if (!vect_slp_analyze_node_operations (bb_vinfo, SLP_TREE_LEFT (node)) -- || !vect_slp_analyze_node_operations (bb_vinfo, SLP_TREE_RIGHT (node))) -- return false; -+ FOR_EACH_VEC_ELT (slp_void_p, SLP_TREE_CHILDREN (node), i, child) -+ if (!vect_slp_analyze_node_operations (bb_vinfo, (slp_tree) child)) -+ return false; - - FOR_EACH_VEC_ELT (gimple, SLP_TREE_SCALAR_STMTS (node), i, stmt) - { -@@ -1661,42 +1937,18 @@ - - /* Check if the basic block can be vectorized. */ - --bb_vec_info --vect_slp_analyze_bb (basic_block bb) -+static bb_vec_info -+vect_slp_analyze_bb_1 (basic_block bb) - { - bb_vec_info bb_vinfo; - VEC (ddr_p, heap) *ddrs; - VEC (slp_instance, heap) *slp_instances; - slp_instance instance; -- int i, insns = 0; -- gimple_stmt_iterator gsi; -+ int i; - int min_vf = 2; - int max_vf = MAX_VECTORIZATION_FACTOR; - bool data_dependence_in_bb = false; - -- current_vector_size = 0; -- -- if (vect_print_dump_info (REPORT_DETAILS)) -- fprintf (vect_dump, "===vect_slp_analyze_bb===\n"); -- -- for (gsi = gsi_start_bb (bb); !gsi_end_p (gsi); gsi_next (&gsi)) -- { -- gimple stmt = gsi_stmt (gsi); -- if (!is_gimple_debug (stmt) -- && !gimple_nop_p (stmt) -- && gimple_code (stmt) != GIMPLE_LABEL) -- insns++; -- } -- -- if (insns > PARAM_VALUE (PARAM_SLP_MAX_INSNS_IN_BB)) -- { -- if (vect_print_dump_info (REPORT_UNVECTORIZED_LOCATIONS)) -- fprintf (vect_dump, "not vectorized: too many instructions in basic " -- "block.\n"); -- -- return NULL; -- } -- - bb_vinfo = new_bb_vec_info (bb); - if (!bb_vinfo) - return NULL; -@@ -1722,6 +1974,8 @@ - return NULL; - } - -+ vect_pattern_recog (NULL, bb_vinfo); -+ - if (!vect_analyze_data_ref_dependences (NULL, bb_vinfo, &max_vf, - &data_dependence_in_bb) - || min_vf > max_vf -@@ -1816,6 +2070,61 @@ - } - - -+bb_vec_info -+vect_slp_analyze_bb (basic_block bb) -+{ -+ bb_vec_info bb_vinfo; -+ int insns = 0; -+ gimple_stmt_iterator gsi; -+ unsigned int vector_sizes; -+ -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ fprintf (vect_dump, "===vect_slp_analyze_bb===\n"); -+ -+ for (gsi = gsi_start_bb (bb); !gsi_end_p (gsi); gsi_next (&gsi)) -+ { -+ gimple stmt = gsi_stmt (gsi); -+ if (!is_gimple_debug (stmt) -+ && !gimple_nop_p (stmt) -+ && gimple_code (stmt) != GIMPLE_LABEL) -+ insns++; -+ } -+ -+ if (insns > PARAM_VALUE (PARAM_SLP_MAX_INSNS_IN_BB)) -+ { -+ if (vect_print_dump_info (REPORT_UNVECTORIZED_LOCATIONS)) -+ fprintf (vect_dump, "not vectorized: too many instructions in basic " -+ "block.\n"); -+ -+ return NULL; -+ } -+ -+ /* Autodetect first vector size we try. */ -+ current_vector_size = 0; -+ vector_sizes = targetm.vectorize.autovectorize_vector_sizes (); -+ -+ while (1) -+ { -+ bb_vinfo = vect_slp_analyze_bb_1 (bb); -+ if (bb_vinfo) -+ return bb_vinfo; -+ -+ destroy_bb_vec_info (bb_vinfo); -+ -+ vector_sizes &= ~current_vector_size; -+ if (vector_sizes == 0 -+ || current_vector_size == 0) -+ return NULL; -+ -+ /* Try the next biggest vector size. */ -+ current_vector_size = 1 << floor_log2 (vector_sizes); -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ fprintf (vect_dump, "***** Re-trying analysis with " -+ "vector size %d\n", current_vector_size); -+ } -+} -+ -+ - /* SLP costs are calculated according to SLP instance unrolling factor (i.e., - the number of created vector stmts depends on the unrolling factor). - However, the actual number of vector stmts for every SLP node depends on -@@ -1939,15 +2248,15 @@ - - For example, we have two scalar operands, s1 and s2 (e.g., group of - strided accesses of size two), while NUNITS is four (i.e., four scalars -- of this type can be packed in a vector). The output vector will contain -- two copies of each scalar operand: {s1, s2, s1, s2}. (NUMBER_OF_COPIES -+ of this type can be packed in a vector). The output vector will contain -+ two copies of each scalar operand: {s1, s2, s1, s2}. (NUMBER_OF_COPIES - will be 2). - - If GROUP_SIZE > NUNITS, the scalars will be split into several vectors - containing the operands. - - For example, NUNITS is four as before, and the group size is 8 -- (s1, s2, ..., s8). We will create two vectors {s1, s2, s3, s4} and -+ (s1, s2, ..., s8). We will create two vectors {s1, s2, s3, s4} and - {s5, s6, s7, s8}. */ - - number_of_copies = least_common_multiple (nunits, group_size) / group_size; -@@ -1959,8 +2268,18 @@ - { - if (is_store) - op = gimple_assign_rhs1 (stmt); -- else -+ else if (gimple_assign_rhs_code (stmt) != COND_EXPR) - op = gimple_op (stmt, op_num + 1); -+ else -+ { -+ if (op_num == 0 || op_num == 1) -+ { -+ tree cond = TREE_OPERAND (gimple_assign_rhs1 (stmt), 0); -+ op = TREE_OPERAND (cond, op_num); -+ } -+ else -+ op = TREE_OPERAND (gimple_assign_rhs1 (stmt), op_num - 1); -+ } - - if (reduc_index != -1) - { -@@ -2055,88 +2374,102 @@ - If the scalar definitions are loop invariants or constants, collect them and - call vect_get_constant_vectors() to create vector stmts. - Otherwise, the def-stmts must be already vectorized and the vectorized stmts -- must be stored in the LEFT/RIGHT node of SLP_NODE, and we call -- vect_get_slp_vect_defs() to retrieve them. -- If VEC_OPRNDS1 is NULL, don't get vector defs for the second operand (from -- the right node. This is used when the second operand must remain scalar. */ -+ must be stored in the corresponding child of SLP_NODE, and we call -+ vect_get_slp_vect_defs () to retrieve them. */ - - void --vect_get_slp_defs (tree op0, tree op1, slp_tree slp_node, -- VEC (tree,heap) **vec_oprnds0, -- VEC (tree,heap) **vec_oprnds1, int reduc_index) --{ -- gimple first_stmt; -- enum tree_code code; -- int number_of_vects; -+vect_get_slp_defs (VEC (tree, heap) *ops, slp_tree slp_node, -+ VEC (slp_void_p, heap) **vec_oprnds, int reduc_index) -+{ -+ gimple first_stmt, first_def; -+ int number_of_vects = 0, i; -+ unsigned int child_index = 0; - HOST_WIDE_INT lhs_size_unit, rhs_size_unit; -+ slp_tree child = NULL; -+ VEC (tree, heap) *vec_defs; -+ tree oprnd, def_lhs; -+ bool vectorized_defs; - - first_stmt = VEC_index (gimple, SLP_TREE_SCALAR_STMTS (slp_node), 0); -- /* The number of vector defs is determined by the number of vector statements -- in the node from which we get those statements. */ -- if (SLP_TREE_LEFT (slp_node)) -- number_of_vects = SLP_TREE_NUMBER_OF_VEC_STMTS (SLP_TREE_LEFT (slp_node)); -- else -- { -- number_of_vects = SLP_TREE_NUMBER_OF_VEC_STMTS (slp_node); -- /* Number of vector stmts was calculated according to LHS in -- vect_schedule_slp_instance(), fix it by replacing LHS with RHS, if -- necessary. See vect_get_smallest_scalar_type () for details. */ -- vect_get_smallest_scalar_type (first_stmt, &lhs_size_unit, -- &rhs_size_unit); -- if (rhs_size_unit != lhs_size_unit) -- { -- number_of_vects *= rhs_size_unit; -- number_of_vects /= lhs_size_unit; -- } -- } -+ FOR_EACH_VEC_ELT (tree, ops, i, oprnd) -+ { -+ /* For each operand we check if it has vectorized definitions in a child -+ node or we need to create them (for invariants and constants). We -+ check if the LHS of the first stmt of the next child matches OPRND. -+ If it does, we found the correct child. Otherwise, we call -+ vect_get_constant_vectors (), and not advance CHILD_INDEX in order -+ to check this child node for the next operand. */ -+ vectorized_defs = false; -+ if (VEC_length (slp_void_p, SLP_TREE_CHILDREN (slp_node)) > child_index) -+ { -+ child = (slp_tree) VEC_index (slp_void_p, -+ SLP_TREE_CHILDREN (slp_node), -+ child_index); -+ first_def = VEC_index (gimple, SLP_TREE_SCALAR_STMTS (child), 0); -+ -+ /* In the end of a pattern sequence we have a use of the original stmt, -+ so we need to compare OPRND with the original def. */ -+ if (is_pattern_stmt_p (vinfo_for_stmt (first_def)) -+ && !STMT_VINFO_IN_PATTERN_P (vinfo_for_stmt (first_stmt)) -+ && !is_pattern_stmt_p (vinfo_for_stmt (first_stmt))) -+ first_def = STMT_VINFO_RELATED_STMT (vinfo_for_stmt (first_def)); - -- /* Allocate memory for vectorized defs. */ -- *vec_oprnds0 = VEC_alloc (tree, heap, number_of_vects); -- -- /* SLP_NODE corresponds either to a group of stores or to a group of -- unary/binary operations. We don't call this function for loads. -- For reduction defs we call vect_get_constant_vectors(), since we are -- looking for initial loop invariant values. */ -- if (SLP_TREE_LEFT (slp_node) && reduc_index == -1) -- /* The defs are already vectorized. */ -- vect_get_slp_vect_defs (SLP_TREE_LEFT (slp_node), vec_oprnds0); -- else -- /* Build vectors from scalar defs. */ -- vect_get_constant_vectors (op0, slp_node, vec_oprnds0, 0, number_of_vects, -- reduc_index); -- -- if (STMT_VINFO_DATA_REF (vinfo_for_stmt (first_stmt))) -- /* Since we don't call this function with loads, this is a group of -- stores. */ -- return; -- -- /* For reductions, we only need initial values. */ -- if (reduc_index != -1) -- return; -+ if (is_gimple_call (first_def)) -+ def_lhs = gimple_call_lhs (first_def); -+ else -+ def_lhs = gimple_assign_lhs (first_def); - -- code = gimple_assign_rhs_code (first_stmt); -- if (get_gimple_rhs_class (code) != GIMPLE_BINARY_RHS || !vec_oprnds1) -- return; -+ if (operand_equal_p (oprnd, def_lhs, 0)) -+ { -+ /* The number of vector defs is determined by the number of -+ vector statements in the node from which we get those -+ statements. */ -+ number_of_vects = SLP_TREE_NUMBER_OF_VEC_STMTS (child); -+ vectorized_defs = true; -+ child_index++; -+ } -+ } - -- /* The number of vector defs is determined by the number of vector statements -- in the node from which we get those statements. */ -- if (SLP_TREE_RIGHT (slp_node)) -- number_of_vects = SLP_TREE_NUMBER_OF_VEC_STMTS (SLP_TREE_RIGHT (slp_node)); -- else -- number_of_vects = SLP_TREE_NUMBER_OF_VEC_STMTS (slp_node); -+ if (!vectorized_defs) -+ { -+ if (i == 0) -+ { -+ number_of_vects = SLP_TREE_NUMBER_OF_VEC_STMTS (slp_node); -+ /* Number of vector stmts was calculated according to LHS in -+ vect_schedule_slp_instance (), fix it by replacing LHS with -+ RHS, if necessary. See vect_get_smallest_scalar_type () for -+ details. */ -+ vect_get_smallest_scalar_type (first_stmt, &lhs_size_unit, -+ &rhs_size_unit); -+ if (rhs_size_unit != lhs_size_unit) -+ { -+ number_of_vects *= rhs_size_unit; -+ number_of_vects /= lhs_size_unit; -+ } -+ } -+ } - -- *vec_oprnds1 = VEC_alloc (tree, heap, number_of_vects); -+ /* Allocate memory for vectorized defs. */ -+ vec_defs = VEC_alloc (tree, heap, number_of_vects); - -- if (SLP_TREE_RIGHT (slp_node)) -- /* The defs are already vectorized. */ -- vect_get_slp_vect_defs (SLP_TREE_RIGHT (slp_node), vec_oprnds1); -- else -- /* Build vectors from scalar defs. */ -- vect_get_constant_vectors (op1, slp_node, vec_oprnds1, 1, number_of_vects, -- -1); -+ /* For reduction defs we call vect_get_constant_vectors (), since we are -+ looking for initial loop invariant values. */ -+ if (vectorized_defs && reduc_index == -1) -+ /* The defs are already vectorized. */ -+ vect_get_slp_vect_defs (child, &vec_defs); -+ else -+ /* Build vectors from scalar defs. */ -+ vect_get_constant_vectors (oprnd, slp_node, &vec_defs, i, -+ number_of_vects, reduc_index); -+ -+ VEC_quick_push (slp_void_p, *vec_oprnds, (slp_void_p) vec_defs); -+ -+ /* For reductions, we only need initial values. */ -+ if (reduc_index != -1) -+ return; -+ } - } - -- - /* Create NCOPIES permutation statements using the mask MASK_BYTES (by - building a vector of type MASK_TYPE from it) and two input vectors placed in - DR_CHAIN at FIRST_VEC_INDX and SECOND_VEC_INDX for the first copy and -@@ -2453,14 +2786,14 @@ - tree vectype; - int i; - slp_tree loads_node; -+ slp_void_p child; - - if (!node) - return false; - -- vect_schedule_slp_instance (SLP_TREE_LEFT (node), instance, -- vectorization_factor); -- vect_schedule_slp_instance (SLP_TREE_RIGHT (node), instance, -- vectorization_factor); -+ FOR_EACH_VEC_ELT (slp_void_p, SLP_TREE_CHILDREN (node), i, child) -+ vect_schedule_slp_instance ((slp_tree) child, instance, -+ vectorization_factor); - - stmt = VEC_index (gimple, SLP_TREE_SCALAR_STMTS (node), 0); - stmt_info = vinfo_for_stmt (stmt); -@@ -2507,8 +2840,11 @@ - /* Loads should be inserted before the first load. */ - if (SLP_INSTANCE_FIRST_LOAD_STMT (instance) - && STMT_VINFO_STRIDED_ACCESS (stmt_info) -- && !REFERENCE_CLASS_P (gimple_get_lhs (stmt))) -+ && !REFERENCE_CLASS_P (gimple_get_lhs (stmt)) -+ && SLP_INSTANCE_LOAD_PERMUTATION (instance)) - si = gsi_for_stmt (SLP_INSTANCE_FIRST_LOAD_STMT (instance)); -+ else if (is_pattern_stmt_p (stmt_info)) -+ si = gsi_for_stmt (STMT_VINFO_RELATED_STMT (stmt_info)); - else - si = gsi_for_stmt (stmt); - ---- a/src/gcc/tree-vect-stmts.c -+++ b/src/gcc/tree-vect-stmts.c -@@ -42,6 +42,82 @@ - #include "langhooks.h" - - -+/* Return a variable of type ELEM_TYPE[NELEMS]. */ -+ -+static tree -+create_vector_array (tree elem_type, unsigned HOST_WIDE_INT nelems) -+{ -+ return create_tmp_var (build_array_type_nelts (elem_type, nelems), -+ "vect_array"); -+} -+ -+/* ARRAY is an array of vectors created by create_vector_array. -+ Return an SSA_NAME for the vector in index N. The reference -+ is part of the vectorization of STMT and the vector is associated -+ with scalar destination SCALAR_DEST. */ -+ -+static tree -+read_vector_array (gimple stmt, gimple_stmt_iterator *gsi, tree scalar_dest, -+ tree array, unsigned HOST_WIDE_INT n) -+{ -+ tree vect_type, vect, vect_name, array_ref; -+ gimple new_stmt; -+ -+ gcc_assert (TREE_CODE (TREE_TYPE (array)) == ARRAY_TYPE); -+ vect_type = TREE_TYPE (TREE_TYPE (array)); -+ vect = vect_create_destination_var (scalar_dest, vect_type); -+ array_ref = build4 (ARRAY_REF, vect_type, array, -+ build_int_cst (size_type_node, n), -+ NULL_TREE, NULL_TREE); -+ -+ new_stmt = gimple_build_assign (vect, array_ref); -+ vect_name = make_ssa_name (vect, new_stmt); -+ gimple_assign_set_lhs (new_stmt, vect_name); -+ vect_finish_stmt_generation (stmt, new_stmt, gsi); -+ mark_symbols_for_renaming (new_stmt); -+ -+ return vect_name; -+} -+ -+/* ARRAY is an array of vectors created by create_vector_array. -+ Emit code to store SSA_NAME VECT in index N of the array. -+ The store is part of the vectorization of STMT. */ -+ -+static void -+write_vector_array (gimple stmt, gimple_stmt_iterator *gsi, tree vect, -+ tree array, unsigned HOST_WIDE_INT n) -+{ -+ tree array_ref; -+ gimple new_stmt; -+ -+ array_ref = build4 (ARRAY_REF, TREE_TYPE (vect), array, -+ build_int_cst (size_type_node, n), -+ NULL_TREE, NULL_TREE); -+ -+ new_stmt = gimple_build_assign (array_ref, vect); -+ vect_finish_stmt_generation (stmt, new_stmt, gsi); -+ mark_symbols_for_renaming (new_stmt); -+} -+ -+/* PTR is a pointer to an array of type TYPE. Return a representation -+ of *PTR. The memory reference replaces those in FIRST_DR -+ (and its group). */ -+ -+static tree -+create_array_ref (tree type, tree ptr, struct data_reference *first_dr) -+{ -+ struct ptr_info_def *pi; -+ tree mem_ref, alias_ptr_type; -+ -+ alias_ptr_type = reference_alias_ptr_type (DR_REF (first_dr)); -+ mem_ref = build2 (MEM_REF, type, ptr, build_int_cst (alias_ptr_type, 0)); -+ /* Arrays have the same alignment as their type. */ -+ pi = get_ptr_info (ptr); -+ pi->align = TYPE_ALIGN_UNIT (type); -+ pi->misalign = 0; -+ return mem_ref; -+} -+ - /* Utility functions used by vect_mark_stmts_to_be_vectorized. */ - - /* Function vect_mark_relevant. -@@ -50,33 +126,72 @@ - - static void - vect_mark_relevant (VEC(gimple,heap) **worklist, gimple stmt, -- enum vect_relevant relevant, bool live_p) -+ enum vect_relevant relevant, bool live_p, -+ bool used_in_pattern) - { - stmt_vec_info stmt_info = vinfo_for_stmt (stmt); - enum vect_relevant save_relevant = STMT_VINFO_RELEVANT (stmt_info); - bool save_live_p = STMT_VINFO_LIVE_P (stmt_info); -+ gimple pattern_stmt; - - if (vect_print_dump_info (REPORT_DETAILS)) - fprintf (vect_dump, "mark relevant %d, live %d.", relevant, live_p); - -+ /* If this stmt is an original stmt in a pattern, we might need to mark its -+ related pattern stmt instead of the original stmt. However, such stmts -+ may have their own uses that are not in any pattern, in such cases the -+ stmt itself should be marked. */ - if (STMT_VINFO_IN_PATTERN_P (stmt_info)) - { -- gimple pattern_stmt; -+ bool found = false; -+ if (!used_in_pattern) -+ { -+ imm_use_iterator imm_iter; -+ use_operand_p use_p; -+ gimple use_stmt; -+ tree lhs; -+ -+ if (is_gimple_assign (stmt)) -+ lhs = gimple_assign_lhs (stmt); -+ else -+ lhs = gimple_call_lhs (stmt); -+ -+ /* This use is out of pattern use, if LHS has other uses that are -+ pattern uses, we should mark the stmt itself, and not the pattern -+ stmt. */ -+ FOR_EACH_IMM_USE_FAST (use_p, imm_iter, lhs) -+ { -+ if (is_gimple_debug (USE_STMT (use_p))) -+ continue; -+ use_stmt = USE_STMT (use_p); -+ -+ if (vinfo_for_stmt (use_stmt) -+ && STMT_VINFO_IN_PATTERN_P (vinfo_for_stmt (use_stmt))) -+ { -+ found = true; -+ break; -+ } -+ } -+ } -+ -+ if (!found) -+ { -+ /* This is the last stmt in a sequence that was detected as a -+ pattern that can potentially be vectorized. Don't mark the stmt -+ as relevant/live because it's not going to be vectorized. -+ Instead mark the pattern-stmt that replaces it. */ -+ -+ pattern_stmt = STMT_VINFO_RELATED_STMT (stmt_info); - -- /* This is the last stmt in a sequence that was detected as a -- pattern that can potentially be vectorized. Don't mark the stmt -- as relevant/live because it's not going to be vectorized. -- Instead mark the pattern-stmt that replaces it. */ -- -- pattern_stmt = STMT_VINFO_RELATED_STMT (stmt_info); -- -- if (vect_print_dump_info (REPORT_DETAILS)) -- fprintf (vect_dump, "last stmt in pattern. don't mark relevant/live."); -- stmt_info = vinfo_for_stmt (pattern_stmt); -- gcc_assert (STMT_VINFO_RELATED_STMT (stmt_info) == stmt); -- save_relevant = STMT_VINFO_RELEVANT (stmt_info); -- save_live_p = STMT_VINFO_LIVE_P (stmt_info); -- stmt = pattern_stmt; -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ fprintf (vect_dump, "last stmt in pattern. don't mark" -+ " relevant/live."); -+ stmt_info = vinfo_for_stmt (pattern_stmt); -+ gcc_assert (STMT_VINFO_RELATED_STMT (stmt_info) == stmt); -+ save_relevant = STMT_VINFO_RELEVANT (stmt_info); -+ save_live_p = STMT_VINFO_LIVE_P (stmt_info); -+ stmt = pattern_stmt; -+ } - } - - STMT_VINFO_LIVE_P (stmt_info) |= live_p; -@@ -361,7 +476,8 @@ - } - } - -- vect_mark_relevant (worklist, def_stmt, relevant, live_p); -+ vect_mark_relevant (worklist, def_stmt, relevant, live_p, -+ is_pattern_stmt_p (stmt_vinfo)); - return true; - } - -@@ -418,7 +534,7 @@ - } - - if (vect_stmt_relevant_p (phi, loop_vinfo, &relevant, &live_p)) -- vect_mark_relevant (&worklist, phi, relevant, live_p); -+ vect_mark_relevant (&worklist, phi, relevant, live_p, false); - } - for (si = gsi_start_bb (bb); !gsi_end_p (si); gsi_next (&si)) - { -@@ -430,7 +546,7 @@ - } - - if (vect_stmt_relevant_p (stmt, loop_vinfo, &relevant, &live_p)) -- vect_mark_relevant (&worklist, stmt, relevant, live_p); -+ vect_mark_relevant (&worklist, stmt, relevant, live_p, false); - } - } - -@@ -529,15 +645,109 @@ - break; - } - -- FOR_EACH_PHI_OR_STMT_USE (use_p, stmt, iter, SSA_OP_USE) -- { -- tree op = USE_FROM_PTR (use_p); -- if (!process_use (stmt, op, loop_vinfo, live_p, relevant, &worklist)) -- { -- VEC_free (gimple, heap, worklist); -- return false; -- } -- } -+ if (is_pattern_stmt_p (vinfo_for_stmt (stmt))) -+ { -+ /* Pattern statements are not inserted into the code, so -+ FOR_EACH_PHI_OR_STMT_USE optimizes their operands out, and we -+ have to scan the RHS or function arguments instead. */ -+ if (is_gimple_assign (stmt)) -+ { -+ tree rhs = gimple_assign_rhs1 (stmt); -+ unsigned int op_num; -+ tree op; -+ enum tree_code rhs_code; -+ switch (get_gimple_rhs_class (gimple_assign_rhs_code (stmt))) -+ { -+ case GIMPLE_SINGLE_RHS: -+ op = gimple_assign_rhs1 (stmt); -+ rhs_code = gimple_assign_rhs_code (stmt); -+ i = 0; -+ if (rhs_code == COND_EXPR -+ && COMPARISON_CLASS_P (TREE_OPERAND (op, 0))) -+ { -+ op = TREE_OPERAND (op, 0); -+ if (!process_use (stmt, TREE_OPERAND (op, 0), -+ loop_vinfo, -+ live_p, relevant, &worklist) -+ || !process_use (stmt, TREE_OPERAND (op, 1), -+ loop_vinfo, -+ live_p, relevant, &worklist)) -+ { -+ VEC_free (gimple, heap, worklist); -+ return false; -+ } -+ i = 1; -+ } -+ op_num = TREE_OPERAND_LENGTH (gimple_assign_rhs1 (stmt)); -+ for (i; i < op_num; i++) -+ { -+ op = TREE_OPERAND (rhs, i); -+ if (!process_use (stmt, op, loop_vinfo, live_p, relevant, -+ &worklist)) -+ { -+ VEC_free (gimple, heap, worklist); -+ return false; -+ } -+ } -+ break; -+ -+ case GIMPLE_BINARY_RHS: -+ op = gimple_assign_rhs1 (stmt); -+ if (!process_use (stmt, op, loop_vinfo, live_p, relevant, -+ &worklist)) -+ { -+ VEC_free (gimple, heap, worklist); -+ return false; -+ } -+ op = gimple_assign_rhs2 (stmt); -+ if (!process_use (stmt, op, loop_vinfo, live_p, relevant, -+ &worklist)) -+ { -+ VEC_free (gimple, heap, worklist); -+ return false; -+ } -+ break; -+ -+ case GIMPLE_UNARY_RHS: -+ op = gimple_assign_rhs1 (stmt); -+ if (!process_use (stmt, op, loop_vinfo, live_p, relevant, -+ &worklist)) -+ { -+ VEC_free (gimple, heap, worklist); -+ return false; -+ } -+ -+ break; -+ -+ default: -+ return false; -+ } -+ } -+ else if (is_gimple_call (stmt)) -+ { -+ for (i = 0; i < gimple_call_num_args (stmt); i++) -+ { -+ tree arg = gimple_call_arg (stmt, i); -+ if (!process_use (stmt, arg, loop_vinfo, live_p, relevant, -+ &worklist)) -+ { -+ VEC_free (gimple, heap, worklist); -+ return false; -+ } -+ } -+ } -+ } -+ else -+ FOR_EACH_PHI_OR_STMT_USE (use_p, stmt, iter, SSA_OP_USE) -+ { -+ tree op = USE_FROM_PTR (use_p); -+ if (!process_use (stmt, op, loop_vinfo, live_p, relevant, -+ &worklist)) -+ { -+ VEC_free (gimple, heap, worklist); -+ return false; -+ } -+ } - } /* while worklist */ - - VEC_free (gimple, heap, worklist); -@@ -648,7 +858,8 @@ - - void - vect_model_store_cost (stmt_vec_info stmt_info, int ncopies, -- enum vect_def_type dt, slp_tree slp_node) -+ bool store_lanes_p, enum vect_def_type dt, -+ slp_tree slp_node) - { - int group_size; - unsigned int inside_cost = 0, outside_cost = 0; -@@ -685,9 +896,11 @@ - first_dr = STMT_VINFO_DATA_REF (stmt_info); - } - -- /* Is this an access in a group of stores, which provide strided access? -- If so, add in the cost of the permutes. */ -- if (group_size > 1) -+ /* We assume that the cost of a single store-lanes instruction is -+ equivalent to the cost of GROUP_SIZE separate stores. If a strided -+ access is instead being provided by a permute-and-store operation, -+ include the cost of the permutes. */ -+ if (!store_lanes_p && group_size > 1) - { - /* Uses a high and low interleave operation for each needed permute. */ - inside_cost = ncopies * exact_log2(group_size) * group_size -@@ -763,8 +976,8 @@ - access scheme chosen. */ - - void --vect_model_load_cost (stmt_vec_info stmt_info, int ncopies, slp_tree slp_node) -- -+vect_model_load_cost (stmt_vec_info stmt_info, int ncopies, bool load_lanes_p, -+ slp_tree slp_node) - { - int group_size; - gimple first_stmt; -@@ -789,9 +1002,11 @@ - first_dr = dr; - } - -- /* Is this an access in a group of loads providing strided access? -- If so, add in the cost of the permutes. */ -- if (group_size > 1) -+ /* We assume that the cost of a single load-lanes instruction is -+ equivalent to the cost of GROUP_SIZE separate loads. If a strided -+ access is instead being provided by a load-and-permute operation, -+ include the cost of the permutes. */ -+ if (!load_lanes_p && group_size > 1) - { - /* Uses an even and odd extract operations for each needed permute. */ - inside_cost = ncopies * exact_log2(group_size) * group_size -@@ -1068,7 +1283,14 @@ - - /* Get the def from the vectorized stmt. */ - def_stmt_info = vinfo_for_stmt (def_stmt); -+ - vec_stmt = STMT_VINFO_VEC_STMT (def_stmt_info); -+ /* Get vectorized pattern statement. */ -+ if (!vec_stmt -+ && STMT_VINFO_IN_PATTERN_P (def_stmt_info) -+ && !STMT_VINFO_RELEVANT (def_stmt_info)) -+ vec_stmt = STMT_VINFO_VEC_STMT (vinfo_for_stmt ( -+ STMT_VINFO_RELATED_STMT (def_stmt_info))); - gcc_assert (vec_stmt); - if (gimple_code (vec_stmt) == GIMPLE_PHI) - vec_oprnd = PHI_RESULT (vec_stmt); -@@ -1217,16 +1439,35 @@ - } - - --/* Get vectorized definitions for OP0 and OP1, or SLP_NODE if it is not -- NULL. */ -+/* Get vectorized definitions for OP0 and OP1. -+ REDUC_INDEX is the index of reduction operand in case of reduction, -+ and -1 otherwise. */ - --static void -+void - vect_get_vec_defs (tree op0, tree op1, gimple stmt, -- VEC(tree,heap) **vec_oprnds0, VEC(tree,heap) **vec_oprnds1, -- slp_tree slp_node) -+ VEC (tree, heap) **vec_oprnds0, -+ VEC (tree, heap) **vec_oprnds1, -+ slp_tree slp_node, int reduc_index) - { - if (slp_node) -- vect_get_slp_defs (op0, op1, slp_node, vec_oprnds0, vec_oprnds1, -1); -+ { -+ int nops = (op1 == NULL_TREE) ? 1 : 2; -+ VEC (tree, heap) *ops = VEC_alloc (tree, heap, nops); -+ VEC (slp_void_p, heap) *vec_defs = VEC_alloc (slp_void_p, heap, nops); -+ -+ VEC_quick_push (tree, ops, op0); -+ if (op1) -+ VEC_quick_push (tree, ops, op1); -+ -+ vect_get_slp_defs (ops, slp_node, &vec_defs, reduc_index); -+ -+ *vec_oprnds0 = (VEC (tree, heap) *) VEC_index (slp_void_p, vec_defs, 0); -+ if (op1) -+ *vec_oprnds1 = (VEC (tree, heap) *) VEC_index (slp_void_p, vec_defs, 1); -+ -+ VEC_free (tree, heap, ops); -+ VEC_free (slp_void_p, heap, vec_defs); -+ } - else - { - tree vec_oprnd; -@@ -1324,6 +1565,7 @@ - VEC(tree, heap) *vargs = NULL; - enum { NARROW, NONE, WIDEN } modifier; - size_t i, nargs; -+ tree lhs; - - /* FORNOW: unsupported in basic block SLP. */ - gcc_assert (loop_vinfo); -@@ -1461,7 +1703,7 @@ - /** Transform. **/ - - if (vect_print_dump_info (REPORT_DETAILS)) -- fprintf (vect_dump, "transform operation."); -+ fprintf (vect_dump, "transform call."); - - /* Handle def. */ - scalar_dest = gimple_call_lhs (stmt); -@@ -1580,8 +1822,11 @@ - rhs of the statement with something harmless. */ - - type = TREE_TYPE (scalar_dest); -- new_stmt = gimple_build_assign (gimple_call_lhs (stmt), -- build_zero_cst (type)); -+ if (is_pattern_stmt_p (stmt_info)) -+ lhs = gimple_call_lhs (STMT_VINFO_RELATED_STMT (stmt_info)); -+ else -+ lhs = gimple_call_lhs (stmt); -+ new_stmt = gimple_build_assign (lhs, build_zero_cst (type)); - set_vinfo_for_stmt (new_stmt, stmt_info); - /* For pattern statements make the related statement to point to - NEW_STMT in order to be able to retrieve the original statement -@@ -1810,7 +2055,8 @@ - for (j = 0; j < ncopies; j++) - { - if (j == 0) -- vect_get_vec_defs (op0, NULL, stmt, &vec_oprnds0, NULL, slp_node); -+ vect_get_vec_defs (op0, NULL, stmt, &vec_oprnds0, NULL, slp_node, -+ -1); - else - vect_get_vec_defs_for_stmt_copy (dt, &vec_oprnds0, NULL); - -@@ -2015,7 +2261,7 @@ - { - /* Handle uses. */ - if (j == 0) -- vect_get_vec_defs (op, NULL, stmt, &vec_oprnds, NULL, slp_node); -+ vect_get_vec_defs (op, NULL, stmt, &vec_oprnds, NULL, slp_node, -1); - else - vect_get_vec_defs_for_stmt_copy (dt, &vec_oprnds, NULL); - -@@ -2048,6 +2294,42 @@ - } - - -+/* Return TRUE if CODE (a shift operation) is supported for SCALAR_TYPE -+ either as shift by a scalar or by a vector. */ -+ -+bool -+vect_supportable_shift (enum tree_code code, tree scalar_type) -+{ -+ -+ enum machine_mode vec_mode; -+ optab optab; -+ int icode; -+ tree vectype; -+ -+ vectype = get_vectype_for_scalar_type (scalar_type); -+ if (!vectype) -+ return false; -+ -+ optab = optab_for_tree_code (code, vectype, optab_scalar); -+ if (!optab -+ || optab_handler (optab, TYPE_MODE (vectype)) == CODE_FOR_nothing) -+ { -+ optab = optab_for_tree_code (code, vectype, optab_vector); -+ if (!optab -+ || (optab_handler (optab, TYPE_MODE (vectype)) -+ == CODE_FOR_nothing)) -+ return false; -+ } -+ -+ vec_mode = TYPE_MODE (vectype); -+ icode = (int) optab_handler (optab, vec_mode); -+ if (icode == CODE_FOR_nothing) -+ return false; -+ -+ return true; -+} -+ -+ - /* Function vectorizable_shift. - - Check if STMT performs a shift operation that can be vectorized. -@@ -2334,10 +2616,10 @@ - operand 1 should be of a vector type (the usual case). */ - if (vec_oprnd1) - vect_get_vec_defs (op0, NULL_TREE, stmt, &vec_oprnds0, NULL, -- slp_node); -+ slp_node, -1); - else - vect_get_vec_defs (op0, op1, stmt, &vec_oprnds0, &vec_oprnds1, -- slp_node); -+ slp_node, -1); - } - else - vect_get_vec_defs_for_stmt_copy (dt, &vec_oprnds0, &vec_oprnds1); -@@ -2645,10 +2927,10 @@ - { - if (op_type == binary_op || op_type == ternary_op) - vect_get_vec_defs (op0, op1, stmt, &vec_oprnds0, &vec_oprnds1, -- slp_node); -+ slp_node, -1); - else - vect_get_vec_defs (op0, NULL_TREE, stmt, &vec_oprnds0, NULL, -- slp_node); -+ slp_node, -1); - if (op_type == ternary_op) - { - vec_oprnds2 = VEC_alloc (tree, heap, 1); -@@ -2839,11 +3121,9 @@ - VEC (tree, heap) *vec_oprnds0 = NULL; - VEC (tree, heap) *vec_dsts = NULL, *interm_types = NULL, *tmp_vec_dsts = NULL; - tree last_oprnd, intermediate_type; -+ bb_vec_info bb_vinfo = STMT_VINFO_BB_VINFO (stmt_info); - -- /* FORNOW: not supported by basic block SLP vectorization. */ -- gcc_assert (loop_vinfo); -- -- if (!STMT_VINFO_RELEVANT_P (stmt_info)) -+ if (!STMT_VINFO_RELEVANT_P (stmt_info) && !bb_vinfo) - return false; - - if (STMT_VINFO_DEF_TYPE (stmt_info) != vect_internal_def) -@@ -2871,7 +3151,7 @@ - && SCALAR_FLOAT_TYPE_P (TREE_TYPE (op0)) - && CONVERT_EXPR_CODE_P (code)))) - return false; -- if (!vect_is_simple_use_1 (op0, loop_vinfo, NULL, -+ if (!vect_is_simple_use_1 (op0, loop_vinfo, bb_vinfo, - &def_stmt, &def, &dt[0], &vectype_in)) - { - if (vect_print_dump_info (REPORT_DETAILS)) -@@ -2962,7 +3242,8 @@ - { - /* Handle uses. */ - if (slp_node) -- vect_get_slp_defs (op0, NULL_TREE, slp_node, &vec_oprnds0, NULL, -1); -+ vect_get_vec_defs (op0, NULL_TREE, stmt, &vec_oprnds0, NULL, -+ slp_node, -1); - else - { - VEC_free (tree, heap, vec_oprnds0); -@@ -3118,11 +3399,10 @@ - int multi_step_cvt = 0; - VEC (tree, heap) *vec_oprnds0 = NULL, *vec_oprnds1 = NULL; - VEC (tree, heap) *vec_dsts = NULL, *interm_types = NULL, *tmp_vec_dsts = NULL; -+ bb_vec_info bb_vinfo = STMT_VINFO_BB_VINFO (stmt_info); -+ unsigned int k; - -- /* FORNOW: not supported by basic block SLP vectorization. */ -- gcc_assert (loop_vinfo); -- -- if (!STMT_VINFO_RELEVANT_P (stmt_info)) -+ if (!STMT_VINFO_RELEVANT_P (stmt_info) && !bb_vinfo) - return false; - - if (STMT_VINFO_DEF_TYPE (stmt_info) != vect_internal_def) -@@ -3137,7 +3417,8 @@ - - code = gimple_assign_rhs_code (stmt); - if (!CONVERT_EXPR_CODE_P (code) -- && code != WIDEN_MULT_EXPR) -+ && code != WIDEN_MULT_EXPR -+ && code != WIDEN_LSHIFT_EXPR) - return false; - - scalar_dest = gimple_assign_lhs (stmt); -@@ -3151,13 +3432,40 @@ - && SCALAR_FLOAT_TYPE_P (TREE_TYPE (op0)) - && CONVERT_EXPR_CODE_P (code)))) - return false; -- if (!vect_is_simple_use_1 (op0, loop_vinfo, NULL, -+ if (!vect_is_simple_use_1 (op0, loop_vinfo, bb_vinfo, - &def_stmt, &def, &dt[0], &vectype_in)) - { - if (vect_print_dump_info (REPORT_DETAILS)) - fprintf (vect_dump, "use not simple."); - return false; - } -+ -+ op_type = TREE_CODE_LENGTH (code); -+ if (op_type == binary_op) -+ { -+ bool ok; -+ -+ op1 = gimple_assign_rhs2 (stmt); -+ if (code == WIDEN_MULT_EXPR || code == WIDEN_LSHIFT_EXPR) -+ { -+ /* For WIDEN_MULT_EXPR, if OP0 is a constant, use the type of -+ OP1. */ -+ if (CONSTANT_CLASS_P (op0)) -+ ok = vect_is_simple_use_1 (op1, loop_vinfo, bb_vinfo, -+ &def_stmt, &def, &dt[1], &vectype_in); -+ else -+ ok = vect_is_simple_use (op1, loop_vinfo, bb_vinfo, &def_stmt, -+ &def, &dt[1]); -+ -+ if (!ok) -+ { -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ fprintf (vect_dump, "use not simple."); -+ return false; -+ } -+ } -+ } -+ - /* If op0 is an external or constant def use a vector type with - the same size as the output vector type. */ - if (!vectype_in) -@@ -3190,18 +3498,6 @@ - - gcc_assert (ncopies >= 1); - -- op_type = TREE_CODE_LENGTH (code); -- if (op_type == binary_op) -- { -- op1 = gimple_assign_rhs2 (stmt); -- if (!vect_is_simple_use (op1, loop_vinfo, NULL, &def_stmt, &def, &dt[1])) -- { -- if (vect_print_dump_info (REPORT_DETAILS)) -- fprintf (vect_dump, "use not simple."); -- return false; -- } -- } -- - /* Supportable by target? */ - if (!supportable_widening_operation (code, stmt, vectype_out, vectype_in, - &decl1, &decl2, &code1, &code2, -@@ -3227,6 +3523,14 @@ - fprintf (vect_dump, "transform type promotion operation. ncopies = %d.", - ncopies); - -+ if (code == WIDEN_MULT_EXPR || code == WIDEN_LSHIFT_EXPR) -+ { -+ if (CONSTANT_CLASS_P (op0)) -+ op0 = fold_convert (TREE_TYPE (op1), op0); -+ else if (CONSTANT_CLASS_P (op1)) -+ op1 = fold_convert (TREE_TYPE (op0), op1); -+ } -+ - /* Handle def. */ - /* In case of multi-step promotion, we first generate promotion operations - to the intermediate types, and then from that types to the final one. -@@ -3260,6 +3564,8 @@ - if (op_type == binary_op) - vec_oprnds1 = VEC_alloc (tree, heap, 1); - } -+ else if (code == WIDEN_LSHIFT_EXPR) -+ vec_oprnds1 = VEC_alloc (tree, heap, slp_node->vec_stmts_size); - - /* In case the vectorization factor (VF) is bigger than the number - of elements that we can fit in a vectype (nunits), we have to generate -@@ -3273,15 +3579,33 @@ - if (j == 0) - { - if (slp_node) -- vect_get_slp_defs (op0, op1, slp_node, &vec_oprnds0, -- &vec_oprnds1, -1); -- else -+ { -+ if (code == WIDEN_LSHIFT_EXPR) -+ { -+ vec_oprnd1 = op1; -+ /* Store vec_oprnd1 for every vector stmt to be created -+ for SLP_NODE. We check during the analysis that all -+ the shift arguments are the same. */ -+ for (k = 0; k < slp_node->vec_stmts_size - 1; k++) -+ VEC_quick_push (tree, vec_oprnds1, vec_oprnd1); -+ -+ vect_get_vec_defs (op0, NULL_TREE, stmt, &vec_oprnds0, NULL, -+ slp_node, -1); -+ } -+ else -+ vect_get_vec_defs (op0, op1, stmt, &vec_oprnds0, -+ &vec_oprnds1, slp_node, -1); -+ } -+ else - { - vec_oprnd0 = vect_get_vec_def_for_operand (op0, stmt, NULL); - VEC_quick_push (tree, vec_oprnds0, vec_oprnd0); - if (op_type == binary_op) - { -- vec_oprnd1 = vect_get_vec_def_for_operand (op1, stmt, NULL); -+ if (code == WIDEN_LSHIFT_EXPR) -+ vec_oprnd1 = op1; -+ else -+ vec_oprnd1 = vect_get_vec_def_for_operand (op1, stmt, NULL); - VEC_quick_push (tree, vec_oprnds1, vec_oprnd1); - } - } -@@ -3292,7 +3616,10 @@ - VEC_replace (tree, vec_oprnds0, 0, vec_oprnd0); - if (op_type == binary_op) - { -- vec_oprnd1 = vect_get_vec_def_for_stmt_copy (dt[1], vec_oprnd1); -+ if (code == WIDEN_LSHIFT_EXPR) -+ vec_oprnd1 = op1; -+ else -+ vec_oprnd1 = vect_get_vec_def_for_stmt_copy (dt[1], vec_oprnd1); - VEC_replace (tree, vec_oprnds1, 0, vec_oprnd1); - } - } -@@ -3337,6 +3664,7 @@ - stmt_vec_info stmt_info = vinfo_for_stmt (stmt); - struct data_reference *dr = STMT_VINFO_DATA_REF (stmt_info), *first_dr = NULL; - tree vectype = STMT_VINFO_VECTYPE (stmt_info); -+ tree elem_type; - loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_info); - struct loop *loop = NULL; - enum machine_mode vec_mode; -@@ -3352,6 +3680,7 @@ - int j; - gimple next_stmt, first_stmt = NULL; - bool strided_store = false; -+ bool store_lanes_p = false; - unsigned int group_size, i; - VEC(tree,heap) *dr_chain = NULL, *oprnds = NULL, *result_chain = NULL; - bool inv_p; -@@ -3359,6 +3688,7 @@ - bool slp = (slp_node != NULL); - unsigned int vec_num; - bb_vec_info bb_vinfo = STMT_VINFO_BB_VINFO (stmt_info); -+ tree aggr_type; - - if (loop_vinfo) - loop = LOOP_VINFO_LOOP (loop_vinfo); -@@ -3412,7 +3742,8 @@ - - /* The scalar rhs type needs to be trivially convertible to the vector - component type. This should always be the case. */ -- if (!useless_type_conversion_p (TREE_TYPE (vectype), TREE_TYPE (op))) -+ elem_type = TREE_TYPE (vectype); -+ if (!useless_type_conversion_p (elem_type, TREE_TYPE (op))) - { - if (vect_print_dump_info (REPORT_DETAILS)) - fprintf (vect_dump, "??? operands of different types"); -@@ -3439,9 +3770,14 @@ - { - strided_store = true; - first_stmt = DR_GROUP_FIRST_DR (stmt_info); -- if (!vect_strided_store_supported (vectype) -- && !PURE_SLP_STMT (stmt_info) && !slp) -- return false; -+ if (!slp && !PURE_SLP_STMT (stmt_info)) -+ { -+ group_size = DR_GROUP_SIZE (vinfo_for_stmt (first_stmt)); -+ if (vect_store_lanes_supported (vectype, group_size)) -+ store_lanes_p = true; -+ else if (!vect_strided_store_supported (vectype, group_size)) -+ return false; -+ } - - if (first_stmt == stmt) - { -@@ -3467,7 +3803,7 @@ - if (!vec_stmt) /* transformation not required. */ - { - STMT_VINFO_TYPE (stmt_info) = store_vec_info_type; -- vect_model_store_cost (stmt_info, ncopies, dt, NULL); -+ vect_model_store_cost (stmt_info, ncopies, store_lanes_p, dt, NULL); - return true; - } - -@@ -3501,6 +3837,7 @@ - vec_num = SLP_TREE_NUMBER_OF_VEC_STMTS (slp_node); - first_stmt = VEC_index (gimple, SLP_TREE_SCALAR_STMTS (slp_node), 0); - first_dr = STMT_VINFO_DATA_REF (vinfo_for_stmt (first_stmt)); -+ op = gimple_assign_rhs1 (first_stmt); - } - else - /* VEC_NUM is the number of vect stmts to be created for this -@@ -3522,6 +3859,16 @@ - - alignment_support_scheme = vect_supportable_dr_alignment (first_dr, false); - gcc_assert (alignment_support_scheme); -+ /* Targets with store-lane instructions must not require explicit -+ realignment. */ -+ gcc_assert (!store_lanes_p -+ || alignment_support_scheme == dr_aligned -+ || alignment_support_scheme == dr_unaligned_supported); -+ -+ if (store_lanes_p) -+ aggr_type = build_array_type_nelts (elem_type, vec_num * nunits); -+ else -+ aggr_type = vectype; - - /* In case the vectorization factor (VF) is bigger than the number - of elements that we can fit in a vectype (nunits), we have to generate -@@ -3573,8 +3920,8 @@ - if (slp) - { - /* Get vectorized arguments for SLP_NODE. */ -- vect_get_slp_defs (NULL_TREE, NULL_TREE, slp_node, &vec_oprnds, -- NULL, -1); -+ vect_get_vec_defs (op, NULL_TREE, stmt, &vec_oprnds, -+ NULL, slp_node, -1); - - vec_oprnd = VEC_index (tree, vec_oprnds, 0); - } -@@ -3610,9 +3957,9 @@ - /* We should have catched mismatched types earlier. */ - gcc_assert (useless_type_conversion_p (vectype, - TREE_TYPE (vec_oprnd))); -- dataref_ptr = vect_create_data_ref_ptr (first_stmt, NULL, NULL_TREE, -- &dummy, &ptr_incr, false, -- &inv_p); -+ dataref_ptr = vect_create_data_ref_ptr (first_stmt, aggr_type, NULL, -+ NULL_TREE, &dummy, -+ &ptr_incr, false, &inv_p); - gcc_assert (bb_vinfo || !inv_p); - } - else -@@ -3633,76 +3980,101 @@ - VEC_replace(tree, dr_chain, i, vec_oprnd); - VEC_replace(tree, oprnds, i, vec_oprnd); - } -- dataref_ptr = -- bump_vector_ptr (dataref_ptr, ptr_incr, gsi, stmt, NULL_TREE); -- } -- -- if (strided_store) -- { -- result_chain = VEC_alloc (tree, heap, group_size); -- /* Permute. */ -- if (!vect_permute_store_chain (dr_chain, group_size, stmt, gsi, -- &result_chain)) -- return false; -+ dataref_ptr = bump_vector_ptr (dataref_ptr, ptr_incr, gsi, stmt, -+ TYPE_SIZE_UNIT (aggr_type)); - } - -- next_stmt = first_stmt; -- for (i = 0; i < vec_num; i++) -+ if (store_lanes_p) - { -- struct ptr_info_def *pi; -+ tree vec_array; - -- if (i > 0) -- /* Bump the vector pointer. */ -- dataref_ptr = bump_vector_ptr (dataref_ptr, ptr_incr, gsi, stmt, -- NULL_TREE); -- -- if (slp) -- vec_oprnd = VEC_index (tree, vec_oprnds, i); -- else if (strided_store) -- /* For strided stores vectorized defs are interleaved in -- vect_permute_store_chain(). */ -- vec_oprnd = VEC_index (tree, result_chain, i); -- -- data_ref = build2 (MEM_REF, TREE_TYPE (vec_oprnd), dataref_ptr, -- build_int_cst (reference_alias_ptr_type -- (DR_REF (first_dr)), 0)); -- pi = get_ptr_info (dataref_ptr); -- pi->align = TYPE_ALIGN_UNIT (vectype); -- if (aligned_access_p (first_dr)) -- pi->misalign = 0; -- else if (DR_MISALIGNMENT (first_dr) == -1) -+ /* Combine all the vectors into an array. */ -+ vec_array = create_vector_array (vectype, vec_num); -+ for (i = 0; i < vec_num; i++) - { -- TREE_TYPE (data_ref) -- = build_aligned_type (TREE_TYPE (data_ref), -- TYPE_ALIGN (TREE_TYPE (vectype))); -- pi->align = TYPE_ALIGN_UNIT (TREE_TYPE (vectype)); -- pi->misalign = 0; -- } -- else -- { -- TREE_TYPE (data_ref) -- = build_aligned_type (TREE_TYPE (data_ref), -- TYPE_ALIGN (TREE_TYPE (vectype))); -- pi->misalign = DR_MISALIGNMENT (first_dr); -+ vec_oprnd = VEC_index (tree, dr_chain, i); -+ write_vector_array (stmt, gsi, vec_oprnd, vec_array, i); - } - -- /* Arguments are ready. Create the new vector stmt. */ -- new_stmt = gimple_build_assign (data_ref, vec_oprnd); -+ /* Emit: -+ MEM_REF[...all elements...] = STORE_LANES (VEC_ARRAY). */ -+ data_ref = create_array_ref (aggr_type, dataref_ptr, first_dr); -+ new_stmt = gimple_build_call_internal (IFN_STORE_LANES, 1, vec_array); -+ gimple_call_set_lhs (new_stmt, data_ref); - vect_finish_stmt_generation (stmt, new_stmt, gsi); - mark_symbols_for_renaming (new_stmt); -+ } -+ else -+ { -+ new_stmt = NULL; -+ if (strided_store) -+ { -+ result_chain = VEC_alloc (tree, heap, group_size); -+ /* Permute. */ -+ vect_permute_store_chain (dr_chain, group_size, stmt, gsi, -+ &result_chain); -+ } - -- if (slp) -- continue; -+ next_stmt = first_stmt; -+ for (i = 0; i < vec_num; i++) -+ { -+ struct ptr_info_def *pi; -+ -+ if (i > 0) -+ /* Bump the vector pointer. */ -+ dataref_ptr = bump_vector_ptr (dataref_ptr, ptr_incr, gsi, -+ stmt, NULL_TREE); -+ -+ if (slp) -+ vec_oprnd = VEC_index (tree, vec_oprnds, i); -+ else if (strided_store) -+ /* For strided stores vectorized defs are interleaved in -+ vect_permute_store_chain(). */ -+ vec_oprnd = VEC_index (tree, result_chain, i); -+ -+ data_ref = build2 (MEM_REF, TREE_TYPE (vec_oprnd), dataref_ptr, -+ build_int_cst (reference_alias_ptr_type -+ (DR_REF (first_dr)), 0)); -+ pi = get_ptr_info (dataref_ptr); -+ pi->align = TYPE_ALIGN_UNIT (vectype); -+ if (aligned_access_p (first_dr)) -+ pi->misalign = 0; -+ else if (DR_MISALIGNMENT (first_dr) == -1) -+ { -+ TREE_TYPE (data_ref) -+ = build_aligned_type (TREE_TYPE (data_ref), -+ TYPE_ALIGN (elem_type)); -+ pi->align = TYPE_ALIGN_UNIT (elem_type); -+ pi->misalign = 0; -+ } -+ else -+ { -+ TREE_TYPE (data_ref) -+ = build_aligned_type (TREE_TYPE (data_ref), -+ TYPE_ALIGN (elem_type)); -+ pi->misalign = DR_MISALIGNMENT (first_dr); -+ } -+ -+ /* Arguments are ready. Create the new vector stmt. */ -+ new_stmt = gimple_build_assign (data_ref, vec_oprnd); -+ vect_finish_stmt_generation (stmt, new_stmt, gsi); -+ mark_symbols_for_renaming (new_stmt); -+ -+ if (slp) -+ continue; - -- if (j == 0) -- STMT_VINFO_VEC_STMT (stmt_info) = *vec_stmt = new_stmt; -+ next_stmt = DR_GROUP_NEXT_DR (vinfo_for_stmt (next_stmt)); -+ if (!next_stmt) -+ break; -+ } -+ } -+ if (!slp) -+ { -+ if (j == 0) -+ STMT_VINFO_VEC_STMT (stmt_info) = *vec_stmt = new_stmt; - else - STMT_VINFO_RELATED_STMT (prev_stmt_info) = new_stmt; -- - prev_stmt_info = vinfo_for_stmt (new_stmt); -- next_stmt = DR_GROUP_NEXT_DR (vinfo_for_stmt (next_stmt)); -- if (!next_stmt) -- break; - } - } - -@@ -3813,6 +4185,7 @@ - bool nested_in_vect_loop = false; - struct data_reference *dr = STMT_VINFO_DATA_REF (stmt_info), *first_dr; - tree vectype = STMT_VINFO_VECTYPE (stmt_info); -+ tree elem_type; - tree new_temp; - enum machine_mode mode; - gimple new_stmt = NULL; -@@ -3829,6 +4202,7 @@ - gimple phi = NULL; - VEC(tree,heap) *dr_chain = NULL; - bool strided_load = false; -+ bool load_lanes_p = false; - gimple first_stmt; - tree scalar_type; - bool inv_p; -@@ -3841,6 +4215,7 @@ - enum tree_code code; - bb_vec_info bb_vinfo = STMT_VINFO_BB_VINFO (stmt_info); - int vf; -+ tree aggr_type; - - if (loop_vinfo) - { -@@ -3917,7 +4292,8 @@ - - /* The vector component type needs to be trivially convertible to the - scalar lhs. This should always be the case. */ -- if (!useless_type_conversion_p (TREE_TYPE (scalar_dest), TREE_TYPE (vectype))) -+ elem_type = TREE_TYPE (vectype); -+ if (!useless_type_conversion_p (TREE_TYPE (scalar_dest), elem_type)) - { - if (vect_print_dump_info (REPORT_DETAILS)) - fprintf (vect_dump, "??? operands of different types"); -@@ -3931,10 +4307,15 @@ - /* FORNOW */ - gcc_assert (! nested_in_vect_loop); - -- /* Check if interleaving is supported. */ -- if (!vect_strided_load_supported (vectype) -- && !PURE_SLP_STMT (stmt_info) && !slp) -- return false; -+ first_stmt = DR_GROUP_FIRST_DR (stmt_info); -+ if (!slp && !PURE_SLP_STMT (stmt_info)) -+ { -+ group_size = DR_GROUP_SIZE (vinfo_for_stmt (first_stmt)); -+ if (vect_load_lanes_supported (vectype, group_size)) -+ load_lanes_p = true; -+ else if (!vect_strided_load_supported (vectype, group_size)) -+ return false; -+ } - } - - if (negative) -@@ -3959,18 +4340,23 @@ - if (!vec_stmt) /* transformation not required. */ - { - STMT_VINFO_TYPE (stmt_info) = load_vec_info_type; -- vect_model_load_cost (stmt_info, ncopies, NULL); -+ vect_model_load_cost (stmt_info, ncopies, load_lanes_p, NULL); - return true; - } - - if (vect_print_dump_info (REPORT_DETAILS)) -- fprintf (vect_dump, "transform load."); -+ fprintf (vect_dump, "transform load. ncopies = %d", ncopies); - - /** Transform. **/ - - if (strided_load) - { - first_stmt = DR_GROUP_FIRST_DR (stmt_info); -+ if (slp -+ && !SLP_INSTANCE_LOAD_PERMUTATION (slp_node_instance) -+ && first_stmt != VEC_index (gimple, SLP_TREE_SCALAR_STMTS (slp_node), 0)) -+ first_stmt = VEC_index (gimple, SLP_TREE_SCALAR_STMTS (slp_node), 0); -+ - /* Check if the chain of loads is already vectorized. */ - if (STMT_VINFO_VEC_STMT (vinfo_for_stmt (first_stmt))) - { -@@ -3990,8 +4376,6 @@ - } - else - vec_num = group_size; -- -- dr_chain = VEC_alloc (tree, heap, vec_num); - } - else - { -@@ -4002,6 +4386,11 @@ - - alignment_support_scheme = vect_supportable_dr_alignment (first_dr, false); - gcc_assert (alignment_support_scheme); -+ /* Targets with load-lane instructions must not require explicit -+ realignment. */ -+ gcc_assert (!load_lanes_p -+ || alignment_support_scheme == dr_aligned -+ || alignment_support_scheme == dr_unaligned_supported); - - /* In case the vectorization factor (VF) is bigger than the number - of elements that we can fit in a vectype (nunits), we have to generate -@@ -4133,208 +4522,252 @@ - if (negative) - offset = size_int (-TYPE_VECTOR_SUBPARTS (vectype) + 1); - -+ if (load_lanes_p) -+ aggr_type = build_array_type_nelts (elem_type, vec_num * nunits); -+ else -+ aggr_type = vectype; -+ - prev_stmt_info = NULL; - for (j = 0; j < ncopies; j++) - { - /* 1. Create the vector pointer update chain. */ - if (j == 0) -- dataref_ptr = vect_create_data_ref_ptr (first_stmt, -+ dataref_ptr = vect_create_data_ref_ptr (first_stmt, aggr_type, - at_loop, offset, - &dummy, &ptr_incr, false, - &inv_p); - else -- dataref_ptr = -- bump_vector_ptr (dataref_ptr, ptr_incr, gsi, stmt, NULL_TREE); -+ dataref_ptr = bump_vector_ptr (dataref_ptr, ptr_incr, gsi, stmt, -+ TYPE_SIZE_UNIT (aggr_type)); -+ -+ if (strided_load || slp_perm) -+ dr_chain = VEC_alloc (tree, heap, vec_num); - -- for (i = 0; i < vec_num; i++) -+ if (load_lanes_p) - { -- if (i > 0) -- dataref_ptr = bump_vector_ptr (dataref_ptr, ptr_incr, gsi, stmt, -- NULL_TREE); -+ tree vec_array; - -- /* 2. Create the vector-load in the loop. */ -- switch (alignment_support_scheme) -- { -- case dr_aligned: -- case dr_unaligned_supported: -- { -- struct ptr_info_def *pi; -- data_ref -- = build2 (MEM_REF, vectype, dataref_ptr, -- build_int_cst (reference_alias_ptr_type -- (DR_REF (first_dr)), 0)); -- pi = get_ptr_info (dataref_ptr); -- pi->align = TYPE_ALIGN_UNIT (vectype); -- if (alignment_support_scheme == dr_aligned) -- { -- gcc_assert (aligned_access_p (first_dr)); -- pi->misalign = 0; -- } -- else if (DR_MISALIGNMENT (first_dr) == -1) -- { -- TREE_TYPE (data_ref) -- = build_aligned_type (TREE_TYPE (data_ref), -- TYPE_ALIGN (TREE_TYPE (vectype))); -- pi->align = TYPE_ALIGN_UNIT (TREE_TYPE (vectype)); -- pi->misalign = 0; -- } -- else -- { -- TREE_TYPE (data_ref) -- = build_aligned_type (TREE_TYPE (data_ref), -- TYPE_ALIGN (TREE_TYPE (vectype))); -- pi->misalign = DR_MISALIGNMENT (first_dr); -- } -- break; -- } -- case dr_explicit_realign: -- { -- tree ptr, bump; -- tree vs_minus_1 = size_int (TYPE_VECTOR_SUBPARTS (vectype) - 1); -+ vec_array = create_vector_array (vectype, vec_num); - -- if (compute_in_loop) -- msq = vect_setup_realignment (first_stmt, gsi, -- &realignment_token, -- dr_explicit_realign, -- dataref_ptr, NULL); -- -- new_stmt = gimple_build_assign_with_ops -- (BIT_AND_EXPR, NULL_TREE, dataref_ptr, -- build_int_cst -- (TREE_TYPE (dataref_ptr), -- -(HOST_WIDE_INT)TYPE_ALIGN_UNIT (vectype))); -- ptr = make_ssa_name (SSA_NAME_VAR (dataref_ptr), new_stmt); -- gimple_assign_set_lhs (new_stmt, ptr); -- vect_finish_stmt_generation (stmt, new_stmt, gsi); -- data_ref -- = build2 (MEM_REF, vectype, ptr, -- build_int_cst (reference_alias_ptr_type -- (DR_REF (first_dr)), 0)); -- vec_dest = vect_create_destination_var (scalar_dest, vectype); -- new_stmt = gimple_build_assign (vec_dest, data_ref); -- new_temp = make_ssa_name (vec_dest, new_stmt); -- gimple_assign_set_lhs (new_stmt, new_temp); -- gimple_set_vdef (new_stmt, gimple_vdef (stmt)); -- gimple_set_vuse (new_stmt, gimple_vuse (stmt)); -- vect_finish_stmt_generation (stmt, new_stmt, gsi); -- msq = new_temp; -- -- bump = size_binop (MULT_EXPR, vs_minus_1, -- TYPE_SIZE_UNIT (scalar_type)); -- ptr = bump_vector_ptr (dataref_ptr, NULL, gsi, stmt, bump); -- new_stmt = gimple_build_assign_with_ops -- (BIT_AND_EXPR, NULL_TREE, ptr, -- build_int_cst -- (TREE_TYPE (ptr), -- -(HOST_WIDE_INT)TYPE_ALIGN_UNIT (vectype))); -- ptr = make_ssa_name (SSA_NAME_VAR (dataref_ptr), new_stmt); -- gimple_assign_set_lhs (new_stmt, ptr); -- vect_finish_stmt_generation (stmt, new_stmt, gsi); -- data_ref -- = build2 (MEM_REF, vectype, ptr, -- build_int_cst (reference_alias_ptr_type -- (DR_REF (first_dr)), 0)); -- break; -- } -- case dr_explicit_realign_optimized: -- new_stmt = gimple_build_assign_with_ops -- (BIT_AND_EXPR, NULL_TREE, dataref_ptr, -- build_int_cst -- (TREE_TYPE (dataref_ptr), -- -(HOST_WIDE_INT)TYPE_ALIGN_UNIT (vectype))); -- new_temp = make_ssa_name (SSA_NAME_VAR (dataref_ptr), new_stmt); -- gimple_assign_set_lhs (new_stmt, new_temp); -- vect_finish_stmt_generation (stmt, new_stmt, gsi); -- data_ref -- = build2 (MEM_REF, vectype, new_temp, -- build_int_cst (reference_alias_ptr_type -- (DR_REF (first_dr)), 0)); -- break; -- default: -- gcc_unreachable (); -- } -- vec_dest = vect_create_destination_var (scalar_dest, vectype); -- new_stmt = gimple_build_assign (vec_dest, data_ref); -- new_temp = make_ssa_name (vec_dest, new_stmt); -- gimple_assign_set_lhs (new_stmt, new_temp); -+ /* Emit: -+ VEC_ARRAY = LOAD_LANES (MEM_REF[...all elements...]). */ -+ data_ref = create_array_ref (aggr_type, dataref_ptr, first_dr); -+ new_stmt = gimple_build_call_internal (IFN_LOAD_LANES, 1, data_ref); -+ gimple_call_set_lhs (new_stmt, vec_array); - vect_finish_stmt_generation (stmt, new_stmt, gsi); - mark_symbols_for_renaming (new_stmt); - -- /* 3. Handle explicit realignment if necessary/supported. Create in -- loop: vec_dest = realign_load (msq, lsq, realignment_token) */ -- if (alignment_support_scheme == dr_explicit_realign_optimized -- || alignment_support_scheme == dr_explicit_realign) -+ /* Extract each vector into an SSA_NAME. */ -+ for (i = 0; i < vec_num; i++) -+ { -+ new_temp = read_vector_array (stmt, gsi, scalar_dest, -+ vec_array, i); -+ VEC_quick_push (tree, dr_chain, new_temp); -+ } -+ -+ /* Record the mapping between SSA_NAMEs and statements. */ -+ vect_record_strided_load_vectors (stmt, dr_chain); -+ } -+ else -+ { -+ for (i = 0; i < vec_num; i++) - { -- tree tmp; -+ if (i > 0) -+ dataref_ptr = bump_vector_ptr (dataref_ptr, ptr_incr, gsi, -+ stmt, NULL_TREE); - -- lsq = gimple_assign_lhs (new_stmt); -- if (!realignment_token) -- realignment_token = dataref_ptr; -+ /* 2. Create the vector-load in the loop. */ -+ switch (alignment_support_scheme) -+ { -+ case dr_aligned: -+ case dr_unaligned_supported: -+ { -+ struct ptr_info_def *pi; -+ data_ref -+ = build2 (MEM_REF, vectype, dataref_ptr, -+ build_int_cst (reference_alias_ptr_type -+ (DR_REF (first_dr)), 0)); -+ pi = get_ptr_info (dataref_ptr); -+ pi->align = TYPE_ALIGN_UNIT (vectype); -+ if (alignment_support_scheme == dr_aligned) -+ { -+ gcc_assert (aligned_access_p (first_dr)); -+ pi->misalign = 0; -+ } -+ else if (DR_MISALIGNMENT (first_dr) == -1) -+ { -+ TREE_TYPE (data_ref) -+ = build_aligned_type (TREE_TYPE (data_ref), -+ TYPE_ALIGN (elem_type)); -+ pi->align = TYPE_ALIGN_UNIT (elem_type); -+ pi->misalign = 0; -+ } -+ else -+ { -+ TREE_TYPE (data_ref) -+ = build_aligned_type (TREE_TYPE (data_ref), -+ TYPE_ALIGN (elem_type)); -+ pi->misalign = DR_MISALIGNMENT (first_dr); -+ } -+ break; -+ } -+ case dr_explicit_realign: -+ { -+ tree ptr, bump; -+ tree vs_minus_1 -+ = size_int (TYPE_VECTOR_SUBPARTS (vectype) - 1); -+ -+ if (compute_in_loop) -+ msq = vect_setup_realignment (first_stmt, gsi, -+ &realignment_token, -+ dr_explicit_realign, -+ dataref_ptr, NULL); -+ -+ new_stmt = gimple_build_assign_with_ops -+ (BIT_AND_EXPR, NULL_TREE, dataref_ptr, -+ build_int_cst -+ (TREE_TYPE (dataref_ptr), -+ -(HOST_WIDE_INT) -+ TYPE_ALIGN_UNIT (vectype))); -+ ptr = make_ssa_name (SSA_NAME_VAR (dataref_ptr), new_stmt); -+ gimple_assign_set_lhs (new_stmt, ptr); -+ vect_finish_stmt_generation (stmt, new_stmt, gsi); -+ data_ref -+ = build2 (MEM_REF, vectype, ptr, -+ build_int_cst (reference_alias_ptr_type -+ (DR_REF (first_dr)), 0)); -+ vec_dest = vect_create_destination_var (scalar_dest, -+ vectype); -+ new_stmt = gimple_build_assign (vec_dest, data_ref); -+ new_temp = make_ssa_name (vec_dest, new_stmt); -+ gimple_assign_set_lhs (new_stmt, new_temp); -+ gimple_set_vdef (new_stmt, gimple_vdef (stmt)); -+ gimple_set_vuse (new_stmt, gimple_vuse (stmt)); -+ vect_finish_stmt_generation (stmt, new_stmt, gsi); -+ msq = new_temp; -+ -+ bump = size_binop (MULT_EXPR, vs_minus_1, -+ TYPE_SIZE_UNIT (scalar_type)); -+ ptr = bump_vector_ptr (dataref_ptr, NULL, gsi, stmt, bump); -+ new_stmt = gimple_build_assign_with_ops -+ (BIT_AND_EXPR, NULL_TREE, ptr, -+ build_int_cst -+ (TREE_TYPE (ptr), -+ -(HOST_WIDE_INT) -+ TYPE_ALIGN_UNIT (vectype))); -+ ptr = make_ssa_name (SSA_NAME_VAR (dataref_ptr), new_stmt); -+ gimple_assign_set_lhs (new_stmt, ptr); -+ vect_finish_stmt_generation (stmt, new_stmt, gsi); -+ data_ref -+ = build2 (MEM_REF, vectype, ptr, -+ build_int_cst (reference_alias_ptr_type -+ (DR_REF (first_dr)), 0)); -+ break; -+ } -+ case dr_explicit_realign_optimized: -+ new_stmt = gimple_build_assign_with_ops -+ (BIT_AND_EXPR, NULL_TREE, dataref_ptr, -+ build_int_cst -+ (TREE_TYPE (dataref_ptr), -+ -(HOST_WIDE_INT)TYPE_ALIGN_UNIT (vectype))); -+ new_temp = make_ssa_name (SSA_NAME_VAR (dataref_ptr), -+ new_stmt); -+ gimple_assign_set_lhs (new_stmt, new_temp); -+ vect_finish_stmt_generation (stmt, new_stmt, gsi); -+ data_ref -+ = build2 (MEM_REF, vectype, new_temp, -+ build_int_cst (reference_alias_ptr_type -+ (DR_REF (first_dr)), 0)); -+ break; -+ default: -+ gcc_unreachable (); -+ } - vec_dest = vect_create_destination_var (scalar_dest, vectype); -- tmp = build3 (REALIGN_LOAD_EXPR, vectype, msq, lsq, -- realignment_token); -- new_stmt = gimple_build_assign (vec_dest, tmp); -+ new_stmt = gimple_build_assign (vec_dest, data_ref); - new_temp = make_ssa_name (vec_dest, new_stmt); - gimple_assign_set_lhs (new_stmt, new_temp); - vect_finish_stmt_generation (stmt, new_stmt, gsi); -+ mark_symbols_for_renaming (new_stmt); - -- if (alignment_support_scheme == dr_explicit_realign_optimized) -+ /* 3. Handle explicit realignment if necessary/supported. -+ Create in loop: -+ vec_dest = realign_load (msq, lsq, realignment_token) */ -+ if (alignment_support_scheme == dr_explicit_realign_optimized -+ || alignment_support_scheme == dr_explicit_realign) - { -- gcc_assert (phi); -- if (i == vec_num - 1 && j == ncopies - 1) -- add_phi_arg (phi, lsq, loop_latch_edge (containing_loop), -- UNKNOWN_LOCATION); -- msq = lsq; -- } -- } -+ tree tmp; - -- /* 4. Handle invariant-load. */ -- if (inv_p && !bb_vinfo) -- { -- gcc_assert (!strided_load); -- gcc_assert (nested_in_vect_loop_p (loop, stmt)); -- if (j == 0) -- { -- int k; -- tree t = NULL_TREE; -- tree vec_inv, bitpos, bitsize = TYPE_SIZE (scalar_type); -- -- /* CHECKME: bitpos depends on endianess? */ -- bitpos = bitsize_zero_node; -- vec_inv = build3 (BIT_FIELD_REF, scalar_type, new_temp, -- bitsize, bitpos); -- vec_dest = -- vect_create_destination_var (scalar_dest, NULL_TREE); -- new_stmt = gimple_build_assign (vec_dest, vec_inv); -- new_temp = make_ssa_name (vec_dest, new_stmt); -+ lsq = gimple_assign_lhs (new_stmt); -+ if (!realignment_token) -+ realignment_token = dataref_ptr; -+ vec_dest = vect_create_destination_var (scalar_dest, vectype); -+ tmp = build3 (REALIGN_LOAD_EXPR, vectype, msq, lsq, -+ realignment_token); -+ new_stmt = gimple_build_assign (vec_dest, tmp); -+ new_temp = make_ssa_name (vec_dest, new_stmt); - gimple_assign_set_lhs (new_stmt, new_temp); - vect_finish_stmt_generation (stmt, new_stmt, gsi); - -- for (k = nunits - 1; k >= 0; --k) -- t = tree_cons (NULL_TREE, new_temp, t); -- /* FIXME: use build_constructor directly. */ -- vec_inv = build_constructor_from_list (vectype, t); -- new_temp = vect_init_vector (stmt, vec_inv, vectype, gsi); -- new_stmt = SSA_NAME_DEF_STMT (new_temp); -+ if (alignment_support_scheme == dr_explicit_realign_optimized) -+ { -+ gcc_assert (phi); -+ if (i == vec_num - 1 && j == ncopies - 1) -+ add_phi_arg (phi, lsq, -+ loop_latch_edge (containing_loop), -+ UNKNOWN_LOCATION); -+ msq = lsq; -+ } - } -- else -- gcc_unreachable (); /* FORNOW. */ -- } - -- if (negative) -- { -- new_temp = reverse_vec_elements (new_temp, stmt, gsi); -- new_stmt = SSA_NAME_DEF_STMT (new_temp); -- } -+ /* 4. Handle invariant-load. */ -+ if (inv_p && !bb_vinfo) -+ { -+ gcc_assert (!strided_load); -+ gcc_assert (nested_in_vect_loop_p (loop, stmt)); -+ if (j == 0) -+ { -+ int k; -+ tree t = NULL_TREE; -+ tree vec_inv, bitpos, bitsize = TYPE_SIZE (scalar_type); -+ -+ /* CHECKME: bitpos depends on endianess? */ -+ bitpos = bitsize_zero_node; -+ vec_inv = build3 (BIT_FIELD_REF, scalar_type, new_temp, -+ bitsize, bitpos); -+ vec_dest = vect_create_destination_var (scalar_dest, -+ NULL_TREE); -+ new_stmt = gimple_build_assign (vec_dest, vec_inv); -+ new_temp = make_ssa_name (vec_dest, new_stmt); -+ gimple_assign_set_lhs (new_stmt, new_temp); -+ vect_finish_stmt_generation (stmt, new_stmt, gsi); -+ -+ for (k = nunits - 1; k >= 0; --k) -+ t = tree_cons (NULL_TREE, new_temp, t); -+ /* FIXME: use build_constructor directly. */ -+ vec_inv = build_constructor_from_list (vectype, t); -+ new_temp = vect_init_vector (stmt, vec_inv, vectype, gsi); -+ new_stmt = SSA_NAME_DEF_STMT (new_temp); -+ } -+ else -+ gcc_unreachable (); /* FORNOW. */ -+ } - -- /* Collect vector loads and later create their permutation in -- vect_transform_strided_load (). */ -- if (strided_load || slp_perm) -- VEC_quick_push (tree, dr_chain, new_temp); -+ if (negative) -+ { -+ new_temp = reverse_vec_elements (new_temp, stmt, gsi); -+ new_stmt = SSA_NAME_DEF_STMT (new_temp); -+ } - -- /* Store vector loads in the corresponding SLP_NODE. */ -- if (slp && !slp_perm) -- VEC_quick_push (gimple, SLP_TREE_VEC_STMTS (slp_node), new_stmt); -+ /* Collect vector loads and later create their permutation in -+ vect_transform_strided_load (). */ -+ if (strided_load || slp_perm) -+ VEC_quick_push (tree, dr_chain, new_temp); -+ -+ /* Store vector loads in the corresponding SLP_NODE. */ -+ if (slp && !slp_perm) -+ VEC_quick_push (gimple, SLP_TREE_VEC_STMTS (slp_node), -+ new_stmt); -+ } - } - - if (slp && !slp_perm) -@@ -4353,12 +4786,9 @@ - { - if (strided_load) - { -- if (!vect_transform_strided_load (stmt, dr_chain, group_size, gsi)) -- return false; -- -+ if (!load_lanes_p) -+ vect_transform_strided_load (stmt, dr_chain, group_size, gsi); - *vec_stmt = STMT_VINFO_VEC_STMT (stmt_info); -- VEC_free (tree, heap, dr_chain); -- dr_chain = VEC_alloc (tree, heap, group_size); - } - else - { -@@ -4369,11 +4799,10 @@ - prev_stmt_info = vinfo_for_stmt (new_stmt); - } - } -+ if (dr_chain) -+ VEC_free (tree, heap, dr_chain); - } - -- if (dr_chain) -- VEC_free (tree, heap, dr_chain); -- - return true; - } - -@@ -4387,7 +4816,7 @@ - condition operands are supportable using vec_is_simple_use. */ - - static bool --vect_is_simple_cond (tree cond, loop_vec_info loop_vinfo) -+vect_is_simple_cond (tree cond, loop_vec_info loop_vinfo, bb_vec_info bb_vinfo) - { - tree lhs, rhs; - tree def; -@@ -4402,7 +4831,7 @@ - if (TREE_CODE (lhs) == SSA_NAME) - { - gimple lhs_def_stmt = SSA_NAME_DEF_STMT (lhs); -- if (!vect_is_simple_use (lhs, loop_vinfo, NULL, &lhs_def_stmt, &def, -+ if (!vect_is_simple_use (lhs, loop_vinfo, bb_vinfo, &lhs_def_stmt, &def, - &dt)) - return false; - } -@@ -4413,7 +4842,7 @@ - if (TREE_CODE (rhs) == SSA_NAME) - { - gimple rhs_def_stmt = SSA_NAME_DEF_STMT (rhs); -- if (!vect_is_simple_use (rhs, loop_vinfo, NULL, &rhs_def_stmt, &def, -+ if (!vect_is_simple_use (rhs, loop_vinfo, bb_vinfo, &rhs_def_stmt, &def, - &dt)) - return false; - } -@@ -4439,7 +4868,8 @@ - - bool - vectorizable_condition (gimple stmt, gimple_stmt_iterator *gsi, -- gimple *vec_stmt, tree reduc_def, int reduc_index) -+ gimple *vec_stmt, tree reduc_def, int reduc_index, -+ slp_tree slp_node) - { - tree scalar_dest = NULL_TREE; - tree vec_dest = NULL_TREE; -@@ -4456,19 +4886,24 @@ - tree def; - enum vect_def_type dt, dts[4]; - int nunits = TYPE_VECTOR_SUBPARTS (vectype); -- int ncopies = LOOP_VINFO_VECT_FACTOR (loop_vinfo) / nunits; -+ int ncopies; - enum tree_code code; - stmt_vec_info prev_stmt_info = NULL; -- int j; -+ int i, j; -+ bb_vec_info bb_vinfo = STMT_VINFO_BB_VINFO (stmt_info); -+ VEC (tree, heap) *vec_oprnds0 = NULL, *vec_oprnds1 = NULL; -+ VEC (tree, heap) *vec_oprnds2 = NULL, *vec_oprnds3 = NULL; - -- /* FORNOW: unsupported in basic block SLP. */ -- gcc_assert (loop_vinfo); -+ if (slp_node || PURE_SLP_STMT (stmt_info)) -+ ncopies = 1; -+ else -+ ncopies = LOOP_VINFO_VECT_FACTOR (loop_vinfo) / nunits; - - gcc_assert (ncopies >= 1); -- if (reduc_index && ncopies > 1) -+ if (reduc_index && (ncopies > 1 || STMT_SLP_TYPE (stmt_info))) - return false; /* FORNOW */ - -- if (!STMT_VINFO_RELEVANT_P (stmt_info)) -+ if (!STMT_VINFO_RELEVANT_P (stmt_info) && !bb_vinfo) - return false; - - if (STMT_VINFO_DEF_TYPE (stmt_info) != vect_internal_def -@@ -4476,10 +4911,6 @@ - && reduc_def)) - return false; - -- /* FORNOW: SLP not supported. */ -- if (STMT_SLP_TYPE (stmt_info)) -- return false; -- - /* FORNOW: not yet supported. */ - if (STMT_VINFO_LIVE_P (stmt_info)) - { -@@ -4503,7 +4934,7 @@ - then_clause = TREE_OPERAND (op, 1); - else_clause = TREE_OPERAND (op, 2); - -- if (!vect_is_simple_cond (cond_expr, loop_vinfo)) -+ if (!vect_is_simple_cond (cond_expr, loop_vinfo, bb_vinfo)) - return false; - - /* We do not handle two different vector types for the condition -@@ -4515,7 +4946,7 @@ - if (TREE_CODE (then_clause) == SSA_NAME) - { - gimple then_def_stmt = SSA_NAME_DEF_STMT (then_clause); -- if (!vect_is_simple_use (then_clause, loop_vinfo, NULL, -+ if (!vect_is_simple_use (then_clause, loop_vinfo, bb_vinfo, - &then_def_stmt, &def, &dt)) - return false; - } -@@ -4527,7 +4958,7 @@ - if (TREE_CODE (else_clause) == SSA_NAME) - { - gimple else_def_stmt = SSA_NAME_DEF_STMT (else_clause); -- if (!vect_is_simple_use (else_clause, loop_vinfo, NULL, -+ if (!vect_is_simple_use (else_clause, loop_vinfo, bb_vinfo, - &else_def_stmt, &def, &dt)) - return false; - } -@@ -4545,7 +4976,15 @@ - return expand_vec_cond_expr_p (TREE_TYPE (op), vec_mode); - } - -- /* Transform */ -+ /* Transform. */ -+ -+ if (!slp_node) -+ { -+ vec_oprnds0 = VEC_alloc (tree, heap, 1); -+ vec_oprnds1 = VEC_alloc (tree, heap, 1); -+ vec_oprnds2 = VEC_alloc (tree, heap, 1); -+ vec_oprnds3 = VEC_alloc (tree, heap, 1); -+ } - - /* Handle def. */ - scalar_dest = gimple_assign_lhs (stmt); -@@ -4554,67 +4993,118 @@ - /* Handle cond expr. */ - for (j = 0; j < ncopies; j++) - { -- gimple new_stmt; -+ gimple new_stmt = NULL; - if (j == 0) - { -- gimple gtemp; -- vec_cond_lhs = -+ if (slp_node) -+ { -+ VEC (tree, heap) *ops = VEC_alloc (tree, heap, 4); -+ VEC (slp_void_p, heap) *vec_defs; -+ -+ vec_defs = VEC_alloc (slp_void_p, heap, 4); -+ VEC_safe_push (tree, heap, ops, TREE_OPERAND (cond_expr, 0)); -+ VEC_safe_push (tree, heap, ops, TREE_OPERAND (cond_expr, 1)); -+ VEC_safe_push (tree, heap, ops, then_clause); -+ VEC_safe_push (tree, heap, ops, else_clause); -+ vect_get_slp_defs (ops, slp_node, &vec_defs, -1); -+ vec_oprnds3 = (VEC (tree, heap) *) VEC_pop (slp_void_p, vec_defs); -+ vec_oprnds2 = (VEC (tree, heap) *) VEC_pop (slp_void_p, vec_defs); -+ vec_oprnds1 = (VEC (tree, heap) *) VEC_pop (slp_void_p, vec_defs); -+ vec_oprnds0 = (VEC (tree, heap) *) VEC_pop (slp_void_p, vec_defs); -+ -+ VEC_free (tree, heap, ops); -+ VEC_free (slp_void_p, heap, vec_defs); -+ } -+ else -+ { -+ gimple gtemp; -+ vec_cond_lhs = - vect_get_vec_def_for_operand (TREE_OPERAND (cond_expr, 0), - stmt, NULL); -- vect_is_simple_use (TREE_OPERAND (cond_expr, 0), loop_vinfo, -+ vect_is_simple_use (TREE_OPERAND (cond_expr, 0), loop_vinfo, - NULL, >emp, &def, &dts[0]); -- vec_cond_rhs = -- vect_get_vec_def_for_operand (TREE_OPERAND (cond_expr, 1), -- stmt, NULL); -- vect_is_simple_use (TREE_OPERAND (cond_expr, 1), loop_vinfo, -- NULL, >emp, &def, &dts[1]); -- if (reduc_index == 1) -- vec_then_clause = reduc_def; -- else -- { -- vec_then_clause = vect_get_vec_def_for_operand (then_clause, -- stmt, NULL); -- vect_is_simple_use (then_clause, loop_vinfo, -- NULL, >emp, &def, &dts[2]); -- } -- if (reduc_index == 2) -- vec_else_clause = reduc_def; -- else -- { -- vec_else_clause = vect_get_vec_def_for_operand (else_clause, -+ -+ vec_cond_rhs = -+ vect_get_vec_def_for_operand (TREE_OPERAND (cond_expr, 1), -+ stmt, NULL); -+ vect_is_simple_use (TREE_OPERAND (cond_expr, 1), loop_vinfo, -+ NULL, >emp, &def, &dts[1]); -+ if (reduc_index == 1) -+ vec_then_clause = reduc_def; -+ else -+ { -+ vec_then_clause = vect_get_vec_def_for_operand (then_clause, -+ stmt, NULL); -+ vect_is_simple_use (then_clause, loop_vinfo, -+ NULL, >emp, &def, &dts[2]); -+ } -+ if (reduc_index == 2) -+ vec_else_clause = reduc_def; -+ else -+ { -+ vec_else_clause = vect_get_vec_def_for_operand (else_clause, - stmt, NULL); -- vect_is_simple_use (else_clause, loop_vinfo, -+ vect_is_simple_use (else_clause, loop_vinfo, - NULL, >emp, &def, &dts[3]); -+ } - } - } - else - { -- vec_cond_lhs = vect_get_vec_def_for_stmt_copy (dts[0], vec_cond_lhs); -- vec_cond_rhs = vect_get_vec_def_for_stmt_copy (dts[1], vec_cond_rhs); -+ vec_cond_lhs = vect_get_vec_def_for_stmt_copy (dts[0], -+ VEC_pop (tree, vec_oprnds0)); -+ vec_cond_rhs = vect_get_vec_def_for_stmt_copy (dts[1], -+ VEC_pop (tree, vec_oprnds1)); - vec_then_clause = vect_get_vec_def_for_stmt_copy (dts[2], -- vec_then_clause); -+ VEC_pop (tree, vec_oprnds2)); - vec_else_clause = vect_get_vec_def_for_stmt_copy (dts[3], -- vec_else_clause); -+ VEC_pop (tree, vec_oprnds3)); -+ } -+ -+ if (!slp_node) -+ { -+ VEC_quick_push (tree, vec_oprnds0, vec_cond_lhs); -+ VEC_quick_push (tree, vec_oprnds1, vec_cond_rhs); -+ VEC_quick_push (tree, vec_oprnds2, vec_then_clause); -+ VEC_quick_push (tree, vec_oprnds3, vec_else_clause); - } - - /* Arguments are ready. Create the new vector stmt. */ -- vec_compare = build2 (TREE_CODE (cond_expr), vectype, -- vec_cond_lhs, vec_cond_rhs); -- vec_cond_expr = build3 (VEC_COND_EXPR, vectype, -- vec_compare, vec_then_clause, vec_else_clause); -+ FOR_EACH_VEC_ELT (tree, vec_oprnds0, i, vec_cond_lhs) -+ { -+ vec_cond_rhs = VEC_index (tree, vec_oprnds1, i); -+ vec_then_clause = VEC_index (tree, vec_oprnds2, i); -+ vec_else_clause = VEC_index (tree, vec_oprnds3, i); -+ -+ vec_compare = build2 (TREE_CODE (cond_expr), vectype, -+ vec_cond_lhs, vec_cond_rhs); -+ vec_cond_expr = build3 (VEC_COND_EXPR, vectype, -+ vec_compare, vec_then_clause, vec_else_clause); - -- new_stmt = gimple_build_assign (vec_dest, vec_cond_expr); -- new_temp = make_ssa_name (vec_dest, new_stmt); -- gimple_assign_set_lhs (new_stmt, new_temp); -- vect_finish_stmt_generation (stmt, new_stmt, gsi); -- if (j == 0) -- STMT_VINFO_VEC_STMT (stmt_info) = *vec_stmt = new_stmt; -- else -- STMT_VINFO_RELATED_STMT (prev_stmt_info) = new_stmt; -+ new_stmt = gimple_build_assign (vec_dest, vec_cond_expr); -+ new_temp = make_ssa_name (vec_dest, new_stmt); -+ gimple_assign_set_lhs (new_stmt, new_temp); -+ vect_finish_stmt_generation (stmt, new_stmt, gsi); -+ if (slp_node) -+ VEC_quick_push (gimple, SLP_TREE_VEC_STMTS (slp_node), new_stmt); -+ } - -- prev_stmt_info = vinfo_for_stmt (new_stmt); -+ if (slp_node) -+ continue; -+ -+ if (j == 0) -+ STMT_VINFO_VEC_STMT (stmt_info) = *vec_stmt = new_stmt; -+ else -+ STMT_VINFO_RELATED_STMT (prev_stmt_info) = new_stmt; -+ -+ prev_stmt_info = vinfo_for_stmt (new_stmt); - } - -+ VEC_free (tree, heap, vec_oprnds0); -+ VEC_free (tree, heap, vec_oprnds1); -+ VEC_free (tree, heap, vec_oprnds2); -+ VEC_free (tree, heap, vec_oprnds3); -+ - return true; - } - -@@ -4629,6 +5119,7 @@ - enum vect_relevant relevance = STMT_VINFO_RELEVANT (stmt_info); - bool ok; - tree scalar_type, vectype; -+ gimple pattern_stmt, pattern_def_stmt; - - if (vect_print_dump_info (REPORT_DETAILS)) - { -@@ -4650,16 +5141,70 @@ - - any LABEL_EXPRs in the loop - - computations that are used only for array indexing or loop control. - In basic blocks we only analyze statements that are a part of some SLP -- instance, therefore, all the statements are relevant. */ -+ instance, therefore, all the statements are relevant. - -+ Pattern statement needs to be analyzed instead of the original statement -+ if the original statement is not relevant. Otherwise, we analyze both -+ statements. */ -+ -+ pattern_stmt = STMT_VINFO_RELATED_STMT (stmt_info); - if (!STMT_VINFO_RELEVANT_P (stmt_info) - && !STMT_VINFO_LIVE_P (stmt_info)) - { -- if (vect_print_dump_info (REPORT_DETAILS)) -- fprintf (vect_dump, "irrelevant."); -+ if (STMT_VINFO_IN_PATTERN_P (stmt_info) -+ && pattern_stmt -+ && (STMT_VINFO_RELEVANT_P (vinfo_for_stmt (pattern_stmt)) -+ || STMT_VINFO_LIVE_P (vinfo_for_stmt (pattern_stmt)))) -+ { -+ /* Analyze PATTERN_STMT instead of the original stmt. */ -+ stmt = pattern_stmt; -+ stmt_info = vinfo_for_stmt (pattern_stmt); -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ { -+ fprintf (vect_dump, "==> examining pattern statement: "); -+ print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM); -+ } -+ } -+ else -+ { -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ fprintf (vect_dump, "irrelevant."); - -- return true; -+ return true; -+ } - } -+ else if (STMT_VINFO_IN_PATTERN_P (stmt_info) -+ && pattern_stmt -+ && (STMT_VINFO_RELEVANT_P (vinfo_for_stmt (pattern_stmt)) -+ || STMT_VINFO_LIVE_P (vinfo_for_stmt (pattern_stmt)))) -+ { -+ /* Analyze PATTERN_STMT too. */ -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ { -+ fprintf (vect_dump, "==> examining pattern statement: "); -+ print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM); -+ } -+ -+ if (!vect_analyze_stmt (pattern_stmt, need_to_vectorize, node)) -+ return false; -+ } -+ -+ if (is_pattern_stmt_p (stmt_info) -+ && (pattern_def_stmt = STMT_VINFO_PATTERN_DEF_STMT (stmt_info)) -+ && (STMT_VINFO_RELEVANT_P (vinfo_for_stmt (pattern_def_stmt)) -+ || STMT_VINFO_LIVE_P (vinfo_for_stmt (pattern_def_stmt)))) -+ { -+ /* Analyze def stmt of STMT if it's a pattern stmt. */ -+ if (vect_print_dump_info (REPORT_DETAILS)) -+ { -+ fprintf (vect_dump, "==> examining pattern def statement: "); -+ print_gimple_stmt (vect_dump, pattern_def_stmt, 0, TDF_SLIM); -+ } -+ -+ if (!vect_analyze_stmt (pattern_def_stmt, need_to_vectorize, node)) -+ return false; -+ } -+ - - switch (STMT_VINFO_DEF_TYPE (stmt_info)) - { -@@ -4733,15 +5278,18 @@ - || vectorizable_call (stmt, NULL, NULL) - || vectorizable_store (stmt, NULL, NULL, NULL) - || vectorizable_reduction (stmt, NULL, NULL, NULL) -- || vectorizable_condition (stmt, NULL, NULL, NULL, 0)); -+ || vectorizable_condition (stmt, NULL, NULL, NULL, 0, NULL)); - else - { - if (bb_vinfo) -- ok = (vectorizable_shift (stmt, NULL, NULL, node) -+ ok = (vectorizable_type_promotion (stmt, NULL, NULL, node) -+ || vectorizable_type_demotion (stmt, NULL, NULL, node) -+ || vectorizable_shift (stmt, NULL, NULL, node) - || vectorizable_operation (stmt, NULL, NULL, node) - || vectorizable_assignment (stmt, NULL, NULL, node) - || vectorizable_load (stmt, NULL, NULL, node, NULL) -- || vectorizable_store (stmt, NULL, NULL, node)); -+ || vectorizable_store (stmt, NULL, NULL, node) -+ || vectorizable_condition (stmt, NULL, NULL, NULL, 0, node)); - } - - if (!ok) -@@ -4777,27 +5325,6 @@ - return false; - } - -- if (!PURE_SLP_STMT (stmt_info)) -- { -- /* Groups of strided accesses whose size is not a power of 2 are not -- vectorizable yet using loop-vectorization. Therefore, if this stmt -- feeds non-SLP-able stmts (i.e., this stmt has to be both SLPed and -- loop-based vectorized), the loop cannot be vectorized. */ -- if (STMT_VINFO_STRIDED_ACCESS (stmt_info) -- && exact_log2 (DR_GROUP_SIZE (vinfo_for_stmt ( -- DR_GROUP_FIRST_DR (stmt_info)))) == -1) -- { -- if (vect_print_dump_info (REPORT_DETAILS)) -- { -- fprintf (vect_dump, "not vectorized: the size of group " -- "of strided accesses is not a power of 2"); -- print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM); -- } -- -- return false; -- } -- } -- - return true; - } - -@@ -4814,7 +5341,6 @@ - bool is_store = false; - gimple vec_stmt = NULL; - stmt_vec_info stmt_info = vinfo_for_stmt (stmt); -- gimple orig_stmt_in_pattern; - bool done; - - switch (STMT_VINFO_TYPE (stmt_info)) -@@ -4879,8 +5405,7 @@ - break; - - case condition_vec_info_type: -- gcc_assert (!slp_node); -- done = vectorizable_condition (stmt, gsi, &vec_stmt, NULL, 0); -+ done = vectorizable_condition (stmt, gsi, &vec_stmt, NULL, 0, slp_node); - gcc_assert (done); - break; - -@@ -4953,21 +5478,7 @@ - } - - if (vec_stmt) -- { -- STMT_VINFO_VEC_STMT (stmt_info) = vec_stmt; -- orig_stmt_in_pattern = STMT_VINFO_RELATED_STMT (stmt_info); -- if (orig_stmt_in_pattern) -- { -- stmt_vec_info stmt_vinfo = vinfo_for_stmt (orig_stmt_in_pattern); -- /* STMT was inserted by the vectorizer to replace a computation idiom. -- ORIG_STMT_IN_PATTERN is a stmt in the original sequence that -- computed this idiom. We need to record a pointer to VEC_STMT in -- the stmt_info of ORIG_STMT_IN_PATTERN. See more details in the -- documentation of vect_pattern_recog. */ -- if (STMT_VINFO_IN_PATTERN_P (stmt_vinfo)) -- STMT_VINFO_VEC_STMT (stmt_vinfo) = vec_stmt; -- } -- } -+ STMT_VINFO_VEC_STMT (stmt_info) = vec_stmt; - - return is_store; - } -@@ -5017,6 +5528,7 @@ - STMT_VINFO_VECTORIZABLE (res) = true; - STMT_VINFO_IN_PATTERN_P (res) = false; - STMT_VINFO_RELATED_STMT (res) = NULL; -+ STMT_VINFO_PATTERN_DEF_STMT (res) = NULL; - STMT_VINFO_DATA_REF (res) = NULL; - - STMT_VINFO_DR_BASE_ADDRESS (res) = NULL; -@@ -5345,8 +5857,12 @@ - || *dt == vect_nested_cycle) - { - stmt_vec_info stmt_info = vinfo_for_stmt (*def_stmt); -- if (STMT_VINFO_IN_PATTERN_P (stmt_info)) -+ -+ if (STMT_VINFO_IN_PATTERN_P (stmt_info) -+ && !STMT_VINFO_RELEVANT (stmt_info) -+ && !STMT_VINFO_LIVE_P (stmt_info)) - stmt_info = vinfo_for_stmt (STMT_VINFO_RELATED_STMT (stmt_info)); -+ - *vectype = STMT_VINFO_VECTYPE (stmt_info); - gcc_assert (*vectype != NULL_TREE); - } -@@ -5395,7 +5911,7 @@ - { - stmt_vec_info stmt_info = vinfo_for_stmt (stmt); - loop_vec_info loop_info = STMT_VINFO_LOOP_VINFO (stmt_info); -- struct loop *vect_loop = LOOP_VINFO_LOOP (loop_info); -+ struct loop *vect_loop = NULL; - bool ordered_p; - enum machine_mode vec_mode; - enum insn_code icode1, icode2; -@@ -5404,6 +5920,9 @@ - tree wide_vectype = vectype_out; - enum tree_code c1, c2; - -+ if (loop_info) -+ vect_loop = LOOP_VINFO_LOOP (loop_info); -+ - /* The result of a vectorized widening operation usually requires two vectors - (because the widened results do not fit int one vector). The generated - vector results would normally be expected to be generated in the same -@@ -5424,7 +5943,8 @@ - iterations in parallel). We therefore don't allow to change the order - of the computation in the inner-loop during outer-loop vectorization. */ - -- if (STMT_VINFO_RELEVANT (stmt_info) == vect_used_by_reduction -+ if (vect_loop -+ && STMT_VINFO_RELEVANT (stmt_info) == vect_used_by_reduction - && !nested_in_vect_loop_p (vect_loop, stmt)) - ordered_p = false; - else -@@ -5461,6 +5981,19 @@ - } - break; - -+ case WIDEN_LSHIFT_EXPR: -+ if (BYTES_BIG_ENDIAN) -+ { -+ c1 = VEC_WIDEN_LSHIFT_HI_EXPR; -+ c2 = VEC_WIDEN_LSHIFT_LO_EXPR; -+ } -+ else -+ { -+ c2 = VEC_WIDEN_LSHIFT_HI_EXPR; -+ c1 = VEC_WIDEN_LSHIFT_LO_EXPR; -+ } -+ break; -+ - CASE_CONVERT: - if (BYTES_BIG_ENDIAN) - { ---- a/src/gcc/tree-vectorizer.h -+++ b/src/gcc/tree-vectorizer.h -@@ -73,15 +73,15 @@ - /************************************************************************ - SLP - ************************************************************************/ -+typedef void *slp_void_p; -+DEF_VEC_P (slp_void_p); -+DEF_VEC_ALLOC_P (slp_void_p, heap); - --/* A computation tree of an SLP instance. Each node corresponds to a group of -+/* A computation tree of an SLP instance. Each node corresponds to a group of - stmts to be packed in a SIMD stmt. */ - typedef struct _slp_tree { -- /* Only binary and unary operations are supported. LEFT child corresponds to -- the first operand and RIGHT child to the second if the operation is -- binary. */ -- struct _slp_tree *left; -- struct _slp_tree *right; -+ /* Nodes that contain def-stmts of this node statements operands. */ -+ VEC (slp_void_p, heap) *children; - /* A group of scalar stmts to be vectorized together. */ - VEC (gimple, heap) *stmts; - /* Vectorized stmt/s. */ -@@ -146,14 +146,32 @@ - #define SLP_INSTANCE_LOADS(S) (S)->loads - #define SLP_INSTANCE_FIRST_LOAD_STMT(S) (S)->first_load - --#define SLP_TREE_LEFT(S) (S)->left --#define SLP_TREE_RIGHT(S) (S)->right -+#define SLP_TREE_CHILDREN(S) (S)->children - #define SLP_TREE_SCALAR_STMTS(S) (S)->stmts - #define SLP_TREE_VEC_STMTS(S) (S)->vec_stmts - #define SLP_TREE_NUMBER_OF_VEC_STMTS(S) (S)->vec_stmts_size - #define SLP_TREE_OUTSIDE_OF_LOOP_COST(S) (S)->cost.outside_of_loop - #define SLP_TREE_INSIDE_OF_LOOP_COST(S) (S)->cost.inside_of_loop - -+/* This structure is used in creation of an SLP tree. Each instance -+ corresponds to the same operand in a group of scalar stmts in an SLP -+ node. */ -+typedef struct _slp_oprnd_info -+{ -+ /* Def-stmts for the operands. */ -+ VEC (gimple, heap) *def_stmts; -+ /* Information about the first statement, its vector def-type, type, the -+ operand itself in case it's constant, and an indication if it's a pattern -+ stmt. */ -+ enum vect_def_type first_dt; -+ tree first_def_type; -+ tree first_const_oprnd; -+ bool first_pattern; -+} *slp_oprnd_info; -+ -+DEF_VEC_P(slp_oprnd_info); -+DEF_VEC_ALLOC_P(slp_oprnd_info, heap); -+ - - typedef struct _vect_peel_info - { -@@ -464,6 +482,9 @@ - pattern). */ - gimple related_stmt; - -+ /* Used to keep a def stmt of a pattern stmt if such exists. */ -+ gimple pattern_def_stmt; -+ - /* List of datarefs that are known to have the same alignment as the dataref - of this stmt. */ - VEC(dr_p,heap) *same_align_refs; -@@ -531,6 +552,7 @@ - - #define STMT_VINFO_IN_PATTERN_P(S) (S)->in_pattern_p - #define STMT_VINFO_RELATED_STMT(S) (S)->related_stmt -+#define STMT_VINFO_PATTERN_DEF_STMT(S) (S)->pattern_def_stmt - #define STMT_VINFO_SAME_ALIGN_REFS(S) (S)->same_align_refs - #define STMT_VINFO_DEF_TYPE(S) (S)->def_type - #define STMT_VINFO_DR_GROUP_FIRST_DR(S) (S)->first_dr -@@ -794,9 +816,9 @@ - extern tree vectorizable_function (gimple, tree, tree); - extern void vect_model_simple_cost (stmt_vec_info, int, enum vect_def_type *, - slp_tree); --extern void vect_model_store_cost (stmt_vec_info, int, enum vect_def_type, -- slp_tree); --extern void vect_model_load_cost (stmt_vec_info, int, slp_tree); -+extern void vect_model_store_cost (stmt_vec_info, int, bool, -+ enum vect_def_type, slp_tree); -+extern void vect_model_load_cost (stmt_vec_info, int, bool, slp_tree); - extern void vect_finish_stmt_generation (gimple, gimple, - gimple_stmt_iterator *); - extern bool vect_mark_stmts_to_be_vectorized (loop_vec_info); -@@ -810,10 +832,13 @@ - extern void vect_remove_stores (gimple); - extern bool vect_analyze_stmt (gimple, bool *, slp_tree); - extern bool vectorizable_condition (gimple, gimple_stmt_iterator *, gimple *, -- tree, int); -+ tree, int, slp_tree); - extern void vect_get_load_cost (struct data_reference *, int, bool, - unsigned int *, unsigned int *); - extern void vect_get_store_cost (struct data_reference *, int, unsigned int *); -+extern bool vect_supportable_shift (enum tree_code, tree); -+extern void vect_get_vec_defs (tree, tree, gimple, VEC (tree, heap) **, -+ VEC (tree, heap) **, slp_tree, int); - - /* In tree-vect-data-refs.c. */ - extern bool vect_can_force_dr_alignment_p (const_tree, unsigned int); -@@ -829,21 +854,22 @@ - extern bool vect_analyze_data_ref_accesses (loop_vec_info, bb_vec_info); - extern bool vect_prune_runtime_alias_test_list (loop_vec_info); - extern bool vect_analyze_data_refs (loop_vec_info, bb_vec_info, int *); --extern tree vect_create_data_ref_ptr (gimple, struct loop *, tree, tree *, -- gimple *, bool, bool *); -+extern tree vect_create_data_ref_ptr (gimple, tree, struct loop *, tree, -+ tree *, gimple *, bool, bool *); - extern tree bump_vector_ptr (tree, gimple, gimple_stmt_iterator *, gimple, tree); - extern tree vect_create_destination_var (tree, tree); --extern bool vect_strided_store_supported (tree); --extern bool vect_strided_load_supported (tree); --extern bool vect_permute_store_chain (VEC(tree,heap) *,unsigned int, gimple, -+extern bool vect_strided_store_supported (tree, unsigned HOST_WIDE_INT); -+extern bool vect_store_lanes_supported (tree, unsigned HOST_WIDE_INT); -+extern bool vect_strided_load_supported (tree, unsigned HOST_WIDE_INT); -+extern bool vect_load_lanes_supported (tree, unsigned HOST_WIDE_INT); -+extern void vect_permute_store_chain (VEC(tree,heap) *,unsigned int, gimple, - gimple_stmt_iterator *, VEC(tree,heap) **); - extern tree vect_setup_realignment (gimple, gimple_stmt_iterator *, tree *, - enum dr_alignment_support, tree, - struct loop **); --extern bool vect_permute_load_chain (VEC(tree,heap) *,unsigned int, gimple, -- gimple_stmt_iterator *, VEC(tree,heap) **); --extern bool vect_transform_strided_load (gimple, VEC(tree,heap) *, int, -+extern void vect_transform_strided_load (gimple, VEC(tree,heap) *, int, - gimple_stmt_iterator *); -+extern void vect_record_strided_load_vectors (gimple, VEC(tree,heap) *); - extern int vect_get_place_in_interleaving_chain (gimple, gimple); - extern tree vect_get_new_vect_var (tree, enum vect_var_kind, const char *); - extern tree vect_create_addr_base_for_vector_ref (gimple, gimple_seq *, -@@ -879,8 +905,9 @@ - extern bool vect_analyze_slp (loop_vec_info, bb_vec_info); - extern void vect_make_slp_decision (loop_vec_info); - extern void vect_detect_hybrid_slp (loop_vec_info); --extern void vect_get_slp_defs (tree, tree, slp_tree, VEC (tree,heap) **, -- VEC (tree,heap) **, int); -+extern void vect_get_slp_defs (VEC (tree, heap) *, slp_tree, -+ VEC (slp_void_p, heap) **, int); -+ - extern LOC find_bb_location (basic_block); - extern bb_vec_info vect_slp_analyze_bb (basic_block); - extern void vect_slp_transform_bb (basic_block); -@@ -889,9 +916,9 @@ - /* Pattern recognition functions. - Additional pattern recognition functions can (and will) be added - in the future. */ --typedef gimple (* vect_recog_func_ptr) (gimple, tree *, tree *); --#define NUM_PATTERNS 4 --void vect_pattern_recog (loop_vec_info); -+typedef gimple (* vect_recog_func_ptr) (VEC (gimple, heap) **, tree *, tree *); -+#define NUM_PATTERNS 7 -+void vect_pattern_recog (loop_vec_info, bb_vec_info); - - /* In tree-vectorizer.c. */ - unsigned vectorize_loops (void); ---- a/src/gcc/tree.c -+++ b/src/gcc/tree.c -@@ -7321,6 +7321,15 @@ - return build_array_type_1 (elt_type, index_type, false); - } - -+/* Return a representation of ELT_TYPE[NELTS], using indices of type -+ sizetype. */ -+ -+tree -+build_array_type_nelts (tree elt_type, unsigned HOST_WIDE_INT nelts) -+{ -+ return build_array_type (elt_type, build_index_type (size_int (nelts - 1))); -+} -+ - /* Recursively examines the array elements of TYPE, until a non-array - element type is found. */ - ---- a/src/gcc/tree.def -+++ b/src/gcc/tree.def -@@ -1092,6 +1092,19 @@ - is subtracted from t3. */ - DEFTREECODE (WIDEN_MULT_MINUS_EXPR, "widen_mult_minus_expr", tcc_expression, 3) - -+/* Widening shift left. -+ The first operand is of type t1. -+ The second operand is the number of bits to shift by; it need not be the -+ same type as the first operand and result. -+ Note that the result is undefined if the second operand is larger -+ than or equal to the first operand's type size. -+ The type of the entire expression is t2, such that t2 is at least twice -+ the size of t1. -+ WIDEN_LSHIFT_EXPR is equivalent to first widening (promoting) -+ the first argument from type t1 to type t2, and then shifting it -+ by the second argument. */ -+DEFTREECODE (WIDEN_LSHIFT_EXPR, "widen_lshift_expr", tcc_binary, 2) -+ - /* Fused multiply-add. - All operands and the result are of the same type. No intermediate - rounding is performed after multiplying operand one with operand two -@@ -1147,6 +1160,16 @@ - DEFTREECODE (VEC_INTERLEAVE_HIGH_EXPR, "vec_interleavehigh_expr", tcc_binary, 2) - DEFTREECODE (VEC_INTERLEAVE_LOW_EXPR, "vec_interleavelow_expr", tcc_binary, 2) - -+/* Widening vector shift left in bits. -+ Operand 0 is a vector to be shifted with N elements of size S. -+ Operand 1 is an integer shift amount in bits. -+ The result of the operation is N elements of size 2*S. -+ VEC_WIDEN_LSHIFT_HI_EXPR computes the N/2 high results. -+ VEC_WIDEN_LSHIFT_LO_EXPR computes the N/2 low results. -+ */ -+DEFTREECODE (VEC_WIDEN_LSHIFT_HI_EXPR, "widen_lshift_hi_expr", tcc_binary, 2) -+DEFTREECODE (VEC_WIDEN_LSHIFT_LO_EXPR, "widen_lshift_lo_expr", tcc_binary, 2) -+ - /* PREDICT_EXPR. Specify hint for branch prediction. The - PREDICT_EXPR_PREDICTOR specify predictor and PREDICT_EXPR_OUTCOME the - outcome (0 for not taken and 1 for taken). Once the profile is guessed ---- a/src/gcc/tree.h -+++ b/src/gcc/tree.h -@@ -4197,6 +4197,7 @@ - extern tree build_index_type (tree); - extern tree build_array_type (tree, tree); - extern tree build_nonshared_array_type (tree, tree); -+extern tree build_array_type_nelts (tree, unsigned HOST_WIDE_INT); - extern tree build_function_type (tree, tree); - extern tree build_function_type_list (tree, ...); - extern tree build_function_type_skip_args (tree, bitmap); -@@ -4626,21 +4627,10 @@ - - extern VEC(tree,gc) *ctor_to_vec (tree); - --/* Examine CTOR to discover: -- * how many scalar fields are set to nonzero values, -- and place it in *P_NZ_ELTS; -- * how many scalar fields in total are in CTOR, -- and place it in *P_ELT_COUNT. -- * if a type is a union, and the initializer from the constructor -- is not the largest element in the union, then set *p_must_clear. -+extern bool categorize_ctor_elements (const_tree, HOST_WIDE_INT *, -+ HOST_WIDE_INT *, bool *); - -- Return whether or not CTOR is a valid static constant initializer, the same -- as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */ -- --extern bool categorize_ctor_elements (const_tree, HOST_WIDE_INT *, HOST_WIDE_INT *, -- bool *); -- --extern HOST_WIDE_INT count_type_elements (const_tree, bool); -+extern bool complete_ctor_at_level_p (const_tree, HOST_WIDE_INT, const_tree); - - /* integer_zerop (tree x) is nonzero if X is an integer constant of value 0. */ - ---- a/src/gcc/value-prof.c -+++ b/src/gcc/value-prof.c -@@ -1252,6 +1252,9 @@ - if (TREE_CODE (callee) == FUNCTION_DECL) - return false; - -+ if (gimple_call_internal_p (stmt)) -+ return false; -+ - histogram = gimple_histogram_value_of_type (cfun, stmt, HIST_TYPE_INDIR_CALL); - if (!histogram) - return false; -@@ -1640,6 +1643,7 @@ - tree callee; - - if (gimple_code (stmt) != GIMPLE_CALL -+ || gimple_call_internal_p (stmt) - || gimple_call_fndecl (stmt) != NULL_TREE) - return; - ---- a/src/libada/ChangeLog -+++ b/src/libada/ChangeLog -@@ -1,3 +1,9 @@ -+2011-11-13 Iain Sandoe <iains@gcc.gnu.org> -+ -+ Backport from mainline r181319 -+ Makefile.in: Change dependency on oscons to depend on the generator -+ tool. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/libada/Makefile.in -+++ b/src/libada/Makefile.in -@@ -70,6 +70,7 @@ - version := $(shell cat $(srcdir)/../gcc/BASE-VER) - libsubdir := $(libdir)/gcc/$(target_noncanonical)/$(version)$(MULTISUBDIR) - ADA_RTS_DIR=$(GCC_DIR)/ada/rts$(subst /,_,$(MULTISUBDIR)) -+ADA_RTS_SUBDIR=./rts$(subst /,_,$(MULTISUBDIR)) - - # exeext should not be used because it's the *host* exeext. We're building - # a *target* library, aren't we?!? Likewise for CC. Still, provide bogus -@@ -96,10 +97,10 @@ - "CFLAGS=$(CFLAGS) $(WARN_CFLAGS)" - - # Rules to build gnatlib. --.PHONY: gnatlib gnatlib-plain gnatlib-sjlj gnatlib-zcx gnatlib-shared oscons -+.PHONY: gnatlib gnatlib-plain gnatlib-sjlj gnatlib-zcx gnatlib-shared osconstool - gnatlib: @default_gnatlib_target@ - --gnatlib-plain: oscons $(GCC_DIR)/ada/Makefile -+gnatlib-plain: osconstool $(GCC_DIR)/ada/Makefile - test -f stamp-libada || \ - $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) gnatlib \ - && touch stamp-libada -@@ -108,7 +109,7 @@ - $(LN_S) $(ADA_RTS_DIR) adainclude - $(LN_S) $(ADA_RTS_DIR) adalib - --gnatlib-sjlj gnatlib-zcx gnatlib-shared: oscons $(GCC_DIR)/ada/Makefile -+gnatlib-sjlj gnatlib-zcx gnatlib-shared: osconstool $(GCC_DIR)/ada/Makefile - test -f stamp-libada || \ - $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) $@ \ - && touch stamp-libada -@@ -117,8 +118,8 @@ - $(LN_S) $(ADA_RTS_DIR) adainclude - $(LN_S) $(ADA_RTS_DIR) adalib - --oscons: -- $(MAKE) -C $(GCC_DIR) $(LIBADA_FLAGS_TO_PASS) ada/s-oscons.ads -+osconstool: -+ $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) ./bldtools/oscons/xoscons - - install-gnatlib: $(GCC_DIR)/ada/Makefile - $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) install-gnatlib ---- a/src/libffi/ChangeLog -+++ b/src/libffi/ChangeLog -@@ -1,3 +1,7 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/libffi/configure -+++ b/src/libffi/configure -@@ -9001,7 +9001,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -9914,7 +9914,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -9932,7 +9932,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) ---- a/src/libgcc/ChangeLog -+++ b/src/libgcc/ChangeLog -@@ -1,3 +1,8 @@ -+2011-11-23 Gerald Pfeifer <gerald@pfeifer.com> -+ -+ * config.host (*-*-freebsd[12], *-*-freebsd[12].*, -+ *-*-freebsd*aout*): Remove. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/libgcc/config.host -+++ b/src/libgcc/config.host -@@ -145,15 +145,6 @@ - asm_hidden_op=.private_extern - tmake_file="t-darwin ${cpu_type}/t-darwin t-slibgcc-darwin" - ;; --*-*-freebsd[12] | *-*-freebsd[12].* | *-*-freebsd*aout*) -- # This is the place-holder for the generic a.out configuration -- # of FreeBSD. No actual configuration resides here since -- # there was only ever a bare-bones ix86 configuration for -- # a.out and it exists solely in the machine-specific section. -- # This place-holder must exist to avoid dropping into -- # the generic ELF configuration of FreeBSD (i.e. it must be -- # ordered before that section). -- ;; - *-*-freebsd*) - # This is the generic ELF configuration of FreeBSD. Later - # machine-specific sections may refine and add to this ---- a/src/libgfortran/ChangeLog -+++ b/src/libgfortran/ChangeLog -@@ -1,3 +1,7 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/libgfortran/configure -+++ b/src/libgfortran/configure -@@ -10326,7 +10326,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -11242,7 +11242,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -11260,7 +11260,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -@@ -14162,7 +14162,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds_FC='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct_FC=yes - hardcode_minus_L_FC=yes -@@ -14870,7 +14870,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -14888,7 +14888,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) ---- a/src/libgomp/ChangeLog -+++ b/src/libgomp/ChangeLog -@@ -1,3 +1,7 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/libgomp/configure -+++ b/src/libgomp/configure -@@ -9317,7 +9317,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -10230,7 +10230,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -10248,7 +10248,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -@@ -13164,7 +13164,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds_FC='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct_FC=yes - hardcode_minus_L_FC=yes -@@ -13869,7 +13869,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -13887,7 +13887,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) ---- a/src/libiberty/ChangeLog -+++ b/src/libiberty/ChangeLog -@@ -1,3 +1,17 @@ -+2011-11-13 Iain Sandoe <iains@gcc.gnu.org> -+ -+ PR target/48108 -+ Backport from mainline r180523 -+ * simple-object-mach-o.c (GNU_WRAPPER_SECTS, GNU_WRAPPER_INDEX, -+ GNU_WRAPPER_NAMES): New macros. -+ (simple_object_mach_o_segment): Handle wrapper scheme. -+ (simple_object_mach_o_write_section_header): Allow the segment name -+ to be supplied. -+ (simple_object_mach_o_write_segment): Handle wrapper scheme. Ensure -+ that the top-level segment name in the load command is empty. -+ (simple_object_mach_o_write_to_file): Determine the number of -+ sections during segment output, use that in writing the header. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/libiberty/simple-object-mach-o.c -+++ b/src/libiberty/simple-object-mach-o.c -@@ -1,5 +1,5 @@ - /* simple-object-mach-o.c -- routines to manipulate Mach-O object files. -- Copyright 2010 Free Software Foundation, Inc. -+ Copyright 2010, 2011 Free Software Foundation, Inc. - Written by Ian Lance Taylor, Google. - - This program is free software; you can redistribute it and/or modify it -@@ -174,6 +174,15 @@ - - #define GNU_SECTION_NAMES "__section_names" - -+/* A GNU-specific extension to wrap multiple sections using three -+ mach-o sections within a given segment. The section '__wrapper_sects' -+ is subdivided according to the index '__wrapper_index' and each sub -+ sect is named according to the names supplied in '__wrapper_names'. */ -+ -+#define GNU_WRAPPER_SECTS "__wrapper_sects" -+#define GNU_WRAPPER_INDEX "__wrapper_index" -+#define GNU_WRAPPER_NAMES "__wrapper_names" -+ - /* Private data for an simple_object_read. */ - - struct simple_object_mach_o_read -@@ -214,7 +223,18 @@ - unsigned int reserved; - }; - --/* See if we have a Mach-O file. */ -+/* See if we have a Mach-O MH_OBJECT file: -+ -+ A standard MH_OBJECT (from as) will have three load commands: -+ 0 - LC_SEGMENT/LC_SEGMENT64 -+ 1 - LC_SYMTAB -+ 2 - LC_DYSYMTAB -+ -+ The LC_SEGMENT/LC_SEGMENT64 will introduce a single anonymous segment -+ containing all the sections. -+ -+ Files written by simple-object will have only the segment command -+ (no symbol tables). */ - - static void * - simple_object_mach_o_match ( -@@ -356,8 +376,29 @@ - } - } - --/* Handle a segment in a Mach-O file. Return 1 if we should continue, -- 0 if the caller should return. */ -+/* Handle a segment in a Mach-O Object file. -+ -+ This will callback to the function pfn for each "section found" the meaning -+ of which depends on gnu extensions to mach-o: -+ -+ If we find mach-o sections (with the segment name as specified) which also -+ contain: a 'sects' wrapper, an index, and a name table, we expand this into -+ as many sections as are specified in the index. In this case, there will -+ be a callback for each of these. -+ -+ We will also allow an extension that permits long names (more than 16 -+ characters) to be used with mach-o. In this case, the section name has -+ a specific format embedding an index into a name table, and the file must -+ contain such name table. -+ -+ Return 1 if we should continue, 0 if the caller should return. */ -+ -+#define SOMO_SECTS_PRESENT 0x01 -+#define SOMO_INDEX_PRESENT 0x02 -+#define SOMO_NAMES_PRESENT 0x04 -+#define SOMO_LONGN_PRESENT 0x08 -+#define SOMO_WRAPPING (SOMO_SECTS_PRESENT | SOMO_INDEX_PRESENT \ -+ | SOMO_NAMES_PRESENT) - - static int - simple_object_mach_o_segment (simple_object_read *sobj, off_t offset, -@@ -378,9 +419,20 @@ - unsigned int nsects; - unsigned char *secdata; - unsigned int i; -+ unsigned int gnu_sections_found; - unsigned int strtab_index; -+ unsigned int index_index; -+ unsigned int nametab_index; -+ unsigned int sections_index; - char *strtab; -+ char *nametab; -+ unsigned char *index; - size_t strtab_size; -+ size_t nametab_size; -+ size_t index_size; -+ unsigned int n_wrapped_sects; -+ size_t wrapper_sect_size; -+ off_t wrapper_sect_offset; - - fetch_32 = (omr->is_big_endian - ? simple_object_fetch_big_32 -@@ -409,6 +461,8 @@ - nsects)); - } - -+ /* Fetch the section headers from the segment command. */ -+ - secdata = XNEWVEC (unsigned char, nsects * sechdrsize); - if (!simple_object_internal_read (sobj->descriptor, offset + seghdrsize, - secdata, nsects * sechdrsize, errmsg, err)) -@@ -417,9 +471,13 @@ - return 0; - } - -- /* Scan for a __section_names section. This is in effect a GNU -- extension that permits section names longer than 16 chars. */ -+ /* Scan for special sections that signal GNU extensions to the format. */ - -+ gnu_sections_found = 0; -+ index_index = nsects; -+ sections_index = nsects; -+ strtab_index = nsects; -+ nametab_index = nsects; - for (i = 0; i < nsects; ++i) - { - size_t nameoff; -@@ -427,19 +485,104 @@ - nameoff = i * sechdrsize + segname_offset; - if (strcmp ((char *) secdata + nameoff, omr->segment_name) != 0) - continue; -+ - nameoff = i * sechdrsize + sectname_offset; -- if (strcmp ((char *) secdata + nameoff, GNU_SECTION_NAMES) == 0) -- break; -+ if (strcmp ((char *) secdata + nameoff, GNU_WRAPPER_NAMES) == 0) -+ { -+ nametab_index = i; -+ gnu_sections_found |= SOMO_NAMES_PRESENT; -+ } -+ else if (strcmp ((char *) secdata + nameoff, GNU_WRAPPER_INDEX) == 0) -+ { -+ index_index = i; -+ gnu_sections_found |= SOMO_INDEX_PRESENT; -+ } -+ else if (strcmp ((char *) secdata + nameoff, GNU_WRAPPER_SECTS) == 0) -+ { -+ sections_index = i; -+ gnu_sections_found |= SOMO_SECTS_PRESENT; -+ } -+ else if (strcmp ((char *) secdata + nameoff, GNU_SECTION_NAMES) == 0) -+ { -+ strtab_index = i; -+ gnu_sections_found |= SOMO_LONGN_PRESENT; -+ } - } - -- strtab_index = i; -- if (strtab_index >= nsects) -+ /* If any of the special wrapper section components is present, then -+ they all should be. */ -+ -+ if ((gnu_sections_found & SOMO_WRAPPING) != 0) - { -- strtab = NULL; -- strtab_size = 0; -+ off_t nametab_offset; -+ off_t index_offset; -+ -+ if ((gnu_sections_found & SOMO_WRAPPING) != SOMO_WRAPPING) -+ { -+ *errmsg = "GNU Mach-o section wrapper: required section missing"; -+ *err = 0; /* No useful errno. */ -+ XDELETEVEC (secdata); -+ return 0; -+ } -+ -+ /* Fetch the name table. */ -+ -+ simple_object_mach_o_section_info (omr->is_big_endian, is_32, -+ secdata + nametab_index * sechdrsize, -+ &nametab_offset, &nametab_size); -+ nametab = XNEWVEC (char, nametab_size); -+ if (!simple_object_internal_read (sobj->descriptor, -+ sobj->offset + nametab_offset, -+ (unsigned char *) nametab, nametab_size, -+ errmsg, err)) -+ { -+ XDELETEVEC (nametab); -+ XDELETEVEC (secdata); -+ return 0; -+ } -+ -+ /* Fetch the index. */ -+ -+ simple_object_mach_o_section_info (omr->is_big_endian, is_32, -+ secdata + index_index * sechdrsize, -+ &index_offset, &index_size); -+ index = XNEWVEC (unsigned char, index_size); -+ if (!simple_object_internal_read (sobj->descriptor, -+ sobj->offset + index_offset, -+ index, index_size, -+ errmsg, err)) -+ { -+ XDELETEVEC (index); -+ XDELETEVEC (nametab); -+ XDELETEVEC (secdata); -+ return 0; -+ } -+ -+ /* The index contains 4 unsigned ints per sub-section: -+ sub-section offset/length, sub-section name/length. -+ We fix this for both 32 and 64 bit mach-o for now, since -+ other fields limit the maximum size of an object to 4G. */ -+ n_wrapped_sects = index_size / 16; -+ -+ /* Get the parameters for the wrapper too. */ -+ simple_object_mach_o_section_info (omr->is_big_endian, is_32, -+ secdata + sections_index * sechdrsize, -+ &wrapper_sect_offset, -+ &wrapper_sect_size); - } - else - { -+ index = NULL; -+ index_size = 0; -+ nametab = NULL; -+ nametab_size = 0; -+ n_wrapped_sects = 0; -+ } -+ -+ /* If we have a long names section, fetch it. */ -+ -+ if ((gnu_sections_found & SOMO_LONGN_PRESENT) != 0) -+ { - off_t strtab_offset; - - simple_object_mach_o_section_info (omr->is_big_endian, is_32, -@@ -452,52 +595,120 @@ - errmsg, err)) - { - XDELETEVEC (strtab); -+ XDELETEVEC (index); -+ XDELETEVEC (nametab); - XDELETEVEC (secdata); - return 0; - } - } -+ else -+ { -+ strtab = NULL; -+ strtab_size = 0; -+ strtab_index = nsects; -+ } - - /* Process the sections. */ - - for (i = 0; i < nsects; ++i) - { - const unsigned char *sechdr; -- char namebuf[MACH_O_NAME_LEN + 1]; -+ char namebuf[MACH_O_NAME_LEN * 2 + 2]; - char *name; - off_t secoffset; - size_t secsize; -+ int l; -+ -+ sechdr = secdata + i * sechdrsize; -+ -+ /* We've already processed the long section names. */ - -- if (i == strtab_index) -+ if ((gnu_sections_found & SOMO_LONGN_PRESENT) != 0 -+ && i == strtab_index) - continue; - -- sechdr = secdata + i * sechdrsize; -+ /* We only act on the segment named. */ - - if (strcmp ((char *) sechdr + segname_offset, omr->segment_name) != 0) - continue; - -- memcpy (namebuf, sechdr + sectname_offset, MACH_O_NAME_LEN); -- namebuf[MACH_O_NAME_LEN] = '\0'; -+ /* Process sections associated with the wrapper. */ - -- name = &namebuf[0]; -- if (strtab != NULL && name[0] == '_' && name[1] == '_') -+ if ((gnu_sections_found & SOMO_WRAPPING) != 0) - { -- unsigned long stringoffset; -+ if (i == nametab_index || i == index_index) -+ continue; - -- if (sscanf (name + 2, "%08lX", &stringoffset) == 1) -+ if (i == sections_index) - { -- if (stringoffset >= strtab_size) -+ unsigned int j; -+ for (j = 0; j < n_wrapped_sects; ++j) - { -- *errmsg = "section name offset out of range"; -- *err = 0; -- XDELETEVEC (strtab); -- XDELETEVEC (secdata); -- return 0; -+ unsigned int subsect_offset, subsect_length, name_offset; -+ subsect_offset = (*fetch_32) (index + 16 * j); -+ subsect_length = (*fetch_32) (index + 16 * j + 4); -+ name_offset = (*fetch_32) (index + 16 * j + 8); -+ /* We don't need the name_length yet. */ -+ -+ secoffset = wrapper_sect_offset + subsect_offset; -+ secsize = subsect_length; -+ name = nametab + name_offset; -+ -+ if (!(*pfn) (data, name, secoffset, secsize)) -+ { -+ *errmsg = NULL; -+ *err = 0; -+ XDELETEVEC (index); -+ XDELETEVEC (nametab); -+ XDELETEVEC (strtab); -+ XDELETEVEC (secdata); -+ return 0; -+ } - } -- -- name = strtab + stringoffset; -+ continue; - } - } - -+ if ((gnu_sections_found & SOMO_LONGN_PRESENT) != 0) -+ { -+ memcpy (namebuf, sechdr + sectname_offset, MACH_O_NAME_LEN); -+ namebuf[MACH_O_NAME_LEN] = '\0'; -+ -+ name = &namebuf[0]; -+ if (strtab != NULL && name[0] == '_' && name[1] == '_') -+ { -+ unsigned long stringoffset; -+ -+ if (sscanf (name + 2, "%08lX", &stringoffset) == 1) -+ { -+ if (stringoffset >= strtab_size) -+ { -+ *errmsg = "section name offset out of range"; -+ *err = 0; -+ XDELETEVEC (index); -+ XDELETEVEC (nametab); -+ XDELETEVEC (strtab); -+ XDELETEVEC (secdata); -+ return 0; -+ } -+ -+ name = strtab + stringoffset; -+ } -+ } -+ } -+ else -+ { -+ /* Otherwise, make a name like __segment,__section as per the -+ convention in mach-o asm. */ -+ name = &namebuf[0]; -+ memset (namebuf, 0, MACH_O_NAME_LEN * 2 + 2); -+ memcpy (namebuf, (char *) sechdr + segname_offset, MACH_O_NAME_LEN); -+ l = strlen (namebuf); -+ namebuf[l] = ','; -+ memcpy (namebuf + l + 1, (char *) sechdr + sectname_offset, -+ MACH_O_NAME_LEN); -+ } -+ - simple_object_mach_o_section_info (omr->is_big_endian, is_32, sechdr, - &secoffset, &secsize); - -@@ -505,12 +716,16 @@ - { - *errmsg = NULL; - *err = 0; -+ XDELETEVEC (index); -+ XDELETEVEC (nametab); - XDELETEVEC (strtab); - XDELETEVEC (secdata); - return 0; - } - } - -+ XDELETEVEC (index); -+ XDELETEVEC (nametab); - XDELETEVEC (strtab); - XDELETEVEC (secdata); - -@@ -724,9 +939,9 @@ - simple_object_mach_o_write_section_header (simple_object_write *sobj, - int descriptor, - size_t sechdr_offset, -- const char *name, size_t secaddr, -- size_t secsize, size_t offset, -- unsigned int align, -+ const char *name, const char *segn, -+ size_t secaddr, size_t secsize, -+ size_t offset, unsigned int align, - const char **errmsg, int *err) - { - struct simple_object_mach_o_attributes *attrs = -@@ -748,7 +963,7 @@ - strncpy ((char *) hdr + offsetof (struct mach_o_section_32, sectname), - name, MACH_O_NAME_LEN); - strncpy ((char *) hdr + offsetof (struct mach_o_section_32, segname), -- sobj->segment_name, MACH_O_NAME_LEN); -+ segn, MACH_O_NAME_LEN); - set_32 (hdr + offsetof (struct mach_o_section_32, addr), secaddr); - set_32 (hdr + offsetof (struct mach_o_section_32, size), secsize); - set_32 (hdr + offsetof (struct mach_o_section_32, offset), offset); -@@ -773,7 +988,7 @@ - strncpy ((char *) hdr + offsetof (struct mach_o_section_64, sectname), - name, MACH_O_NAME_LEN); - strncpy ((char *) hdr + offsetof (struct mach_o_section_64, segname), -- sobj->segment_name, MACH_O_NAME_LEN); -+ segn, MACH_O_NAME_LEN); - set_64 (hdr + offsetof (struct mach_o_section_64, addr), secaddr); - set_64 (hdr + offsetof (struct mach_o_section_64, size), secsize); - set_32 (hdr + offsetof (struct mach_o_section_64, offset), offset); -@@ -793,11 +1008,25 @@ - sechdrsize, errmsg, err); - } - --/* Write out the single segment and the sections of a Mach-O file. */ -+/* Write out the single (anonymous) segment containing the sections of a Mach-O -+ Object file. -+ -+ As a GNU extension to mach-o, when the caller specifies a segment name in -+ sobj->segment_name, all the sections passed will be output under a single -+ mach-o section header. The caller's sections are indexed within this -+ 'wrapper' section by a table stored in a second mach-o section. Finally, -+ arbitrary length section names are permitted by the extension and these are -+ stored in a table in a third mach-o section. -+ -+ Note that this is only likely to make any sense for the __GNU_LTO segment -+ at present. -+ -+ If the wrapper extension is not in force, we assume that the section name -+ is in the form __SEGMENT_NAME,__section_name as per Mach-O asm. */ - - static int - simple_object_mach_o_write_segment (simple_object_write *sobj, int descriptor, -- size_t nsects, const char **errmsg, -+ size_t *nsects, const char **errmsg, - int *err) - { - struct simple_object_mach_o_attributes *attrs = -@@ -814,6 +1043,10 @@ - simple_object_write_section *section; - unsigned char hdrbuf[sizeof (struct mach_o_segment_command_64)]; - unsigned char *hdr; -+ size_t nsects_in; -+ unsigned int *index; -+ char *snames; -+ unsigned int sect; - - set_32 = (attrs->is_big_endian - ? simple_object_set_big_32 -@@ -834,19 +1067,62 @@ - sechdrsize = sizeof (struct mach_o_section_64); - } - -+ name_offset = 0; -+ *nsects = nsects_in = 0; -+ -+ /* Count the number of sections we start with. */ -+ -+ for (section = sobj->sections; section != NULL; section = section->next) -+ nsects_in++; -+ -+ if (sobj->segment_name != NULL) -+ { -+ /* We will only write 3 sections: wrapped data, index and names. */ -+ -+ *nsects = 3; -+ -+ /* The index has four entries per wrapped section: -+ Section Offset, length, Name offset, length. -+ Where the offsets are based at the start of the wrapper and name -+ sections respectively. -+ The values are stored as 32 bit int for both 32 and 64 bit mach-o -+ since the size of a mach-o MH_OBJECT cannot exceed 4G owing to -+ other constraints. */ -+ -+ index = XNEWVEC (unsigned int, nsects_in * 4); -+ -+ /* We now need to figure out the size of the names section. This just -+ stores the names as null-terminated c strings, packed without any -+ alignment padding. */ -+ -+ for (section = sobj->sections, sect = 0; section != NULL; -+ section = section->next, sect++) -+ { -+ index[sect*4+2] = name_offset; -+ index[sect*4+3] = strlen (section->name) + 1; -+ name_offset += strlen (section->name) + 1; -+ } -+ snames = XNEWVEC (char, name_offset); -+ } -+ else -+ { -+ *nsects = nsects_in; -+ index = NULL; -+ snames = NULL; -+ } -+ - sechdr_offset = hdrsize + seghdrsize; -- cmdsize = seghdrsize + nsects * sechdrsize; -+ cmdsize = seghdrsize + *nsects * sechdrsize; - offset = hdrsize + cmdsize; -- name_offset = 0; - secaddr = 0; - -- for (section = sobj->sections; section != NULL; section = section->next) -+ for (section = sobj->sections, sect = 0; -+ section != NULL; section = section->next, sect++) - { - size_t mask; - size_t new_offset; - size_t secsize; - struct simple_object_write_section_buffer *buffer; -- char namebuf[MACH_O_NAME_LEN + 1]; - - mask = (1U << section->align) - 1; - new_offset = offset + mask; -@@ -877,39 +1153,126 @@ - secsize += buffer->size; - } - -- snprintf (namebuf, sizeof namebuf, "__%08X", name_offset); -+ if (sobj->segment_name != NULL) -+ { -+ index[sect*4+0] = (unsigned int) offset; -+ index[sect*4+1] = secsize; -+ /* Stash the section name in our table. */ -+ memcpy (snames + index[sect * 4 + 2], section->name, -+ index[sect * 4 + 3]); -+ } -+ else -+ { -+ char namebuf[MACH_O_NAME_LEN + 1]; -+ char segnbuf[MACH_O_NAME_LEN + 1]; -+ char *comma; -+ -+ /* Try to extract segment,section from the input name. */ -+ -+ memset (namebuf, 0, sizeof namebuf); -+ memset (segnbuf, 0, sizeof segnbuf); -+ comma = strchr (section->name, ','); -+ if (comma != NULL) -+ { -+ int len = comma - section->name; -+ len = len > MACH_O_NAME_LEN ? MACH_O_NAME_LEN : len; -+ strncpy (namebuf, section->name, len); -+ strncpy (segnbuf, comma + 1, MACH_O_NAME_LEN); -+ } -+ else /* just try to copy the name, leave segment blank. */ -+ strncpy (namebuf, section->name, MACH_O_NAME_LEN); -+ -+ if (!simple_object_mach_o_write_section_header (sobj, descriptor, -+ sechdr_offset, -+ namebuf, segnbuf, -+ secaddr, secsize, -+ offset, -+ section->align, -+ errmsg, err)) -+ return 0; -+ sechdr_offset += sechdrsize; -+ } -+ -+ offset += secsize; -+ secaddr += secsize; -+ } -+ -+ if (sobj->segment_name != NULL) -+ { -+ size_t secsize; -+ unsigned int i; -+ -+ /* Write the section header for the wrapper. */ -+ /* Account for any initial aligment - which becomes the alignment for this -+ created section. */ -+ -+ secsize = (offset - index[0]); - if (!simple_object_mach_o_write_section_header (sobj, descriptor, -- sechdr_offset, namebuf, -- secaddr, secsize, offset, -- section->align, -+ sechdr_offset, -+ GNU_WRAPPER_SECTS, -+ sobj->segment_name, -+ 0 /*secaddr*/, -+ secsize, index[0], -+ sobj->sections->align, - errmsg, err)) - return 0; - -+ /* Subtract the wrapper section start from the begining of each sub -+ section. */ -+ -+ for (i = 1; i < nsects_in; ++i) -+ index[4 * i] -= index[0]; -+ index[0] = 0; -+ - sechdr_offset += sechdrsize; -- offset += secsize; -- name_offset += strlen (section->name) + 1; -- secaddr += secsize; -- } - -- /* Write out the section names. */ -+ /* Write out the section names. -+ ... the header ... -+ name_offset contains the length of the section. It is not aligned. */ - -- if (!simple_object_mach_o_write_section_header (sobj, descriptor, -- sechdr_offset, -- GNU_SECTION_NAMES, secaddr, -- name_offset, offset, 0, -- errmsg, err)) -- return 0; -+ if (!simple_object_mach_o_write_section_header (sobj, descriptor, -+ sechdr_offset, -+ GNU_WRAPPER_NAMES, -+ sobj->segment_name, -+ 0 /*secaddr*/, -+ name_offset, -+ offset, -+ 0, errmsg, err)) -+ return 0; - -- for (section = sobj->sections; section != NULL; section = section->next) -- { -- size_t namelen; -+ /* ... and the content.. */ -+ if (!simple_object_internal_write (descriptor, offset, -+ (const unsigned char *) snames, -+ name_offset, errmsg, err)) -+ return 0; -+ -+ sechdr_offset += sechdrsize; -+ secaddr += name_offset; -+ offset += name_offset; -+ -+ /* Now do the index, we'll align this to 4 bytes although the read code -+ will handle unaligned. */ -+ -+ offset += 3; -+ offset &= ~0x03; -+ if (!simple_object_mach_o_write_section_header (sobj, descriptor, -+ sechdr_offset, -+ GNU_WRAPPER_INDEX, -+ sobj->segment_name, -+ 0 /*secaddr*/, -+ nsects_in * 16, -+ offset, -+ 2, errmsg, err)) -+ return 0; - -- namelen = strlen (section->name) + 1; -+ /* ... and the content.. */ - if (!simple_object_internal_write (descriptor, offset, -- (const unsigned char *) section->name, -- namelen, errmsg, err)) -+ (const unsigned char *) index, -+ nsects_in*16, errmsg, err)) - return 0; -- offset += namelen; -+ -+ XDELETEVEC (index); -+ XDELETEVEC (snames); - } - - /* Write out the segment header. */ -@@ -923,9 +1286,8 @@ - MACH_O_LC_SEGMENT); - set_32 (hdr + offsetof (struct mach_o_segment_command_32, cmdsize), - cmdsize); -- strncpy (((char *) hdr -- + offsetof (struct mach_o_segment_command_32, segname)), -- sobj->segment_name, MACH_O_NAME_LEN); -+ /* MH_OBJECTS have a single, anonymous, segment - so the segment name -+ is left empty. */ - /* vmaddr left as zero. */ - /* vmsize left as zero. */ - set_32 (hdr + offsetof (struct mach_o_segment_command_32, fileoff), -@@ -935,7 +1297,7 @@ - /* maxprot left as zero. */ - /* initprot left as zero. */ - set_32 (hdr + offsetof (struct mach_o_segment_command_32, nsects), -- nsects); -+ *nsects); - /* flags left as zero. */ - } - else -@@ -951,9 +1313,8 @@ - MACH_O_LC_SEGMENT); - set_32 (hdr + offsetof (struct mach_o_segment_command_64, cmdsize), - cmdsize); -- strncpy (((char *) hdr -- + offsetof (struct mach_o_segment_command_64, segname)), -- sobj->segment_name, MACH_O_NAME_LEN); -+ /* MH_OBJECTS have a single, anonymous, segment - so the segment name -+ is left empty. */ - /* vmaddr left as zero. */ - /* vmsize left as zero. */ - set_64 (hdr + offsetof (struct mach_o_segment_command_64, fileoff), -@@ -963,7 +1324,7 @@ - /* maxprot left as zero. */ - /* initprot left as zero. */ - set_32 (hdr + offsetof (struct mach_o_segment_command_64, nsects), -- nsects); -+ *nsects); - /* flags left as zero. */ - #endif - } -@@ -978,23 +1339,17 @@ - simple_object_mach_o_write_to_file (simple_object_write *sobj, int descriptor, - int *err) - { -- size_t nsects; -- simple_object_write_section *section; -+ size_t nsects = 0; - const char *errmsg; - -- /* Start at 1 for symbol_names section. */ -- nsects = 1; -- for (section = sobj->sections; section != NULL; section = section->next) -- ++nsects; -+ if (!simple_object_mach_o_write_segment (sobj, descriptor, &nsects, -+ &errmsg, err)) -+ return errmsg; - - if (!simple_object_mach_o_write_header (sobj, descriptor, nsects, - &errmsg, err)) - return errmsg; - -- if (!simple_object_mach_o_write_segment (sobj, descriptor, nsects, -- &errmsg, err)) -- return errmsg; -- - return NULL; - } - ---- a/src/libjava/ChangeLog -+++ b/src/libjava/ChangeLog -@@ -1,3 +1,16 @@ -+2011-11-24 Jakub Jelinek <jakub@redhat.com> -+ -+ PR bootstrap/50888 -+ * prims.cc: Don't include ctype.h. -+ (c_isspace): Define. -+ (next_property_key, next_property_value): Use it instead -+ of isspace. -+ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure.ac: Fix FreeBSD 10 detection. -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/libjava/classpath/ChangeLog.gcj -+++ b/src/libjava/classpath/ChangeLog.gcj -@@ -1,3 +1,9 @@ -+2011-11-29 Andreas Tobler <andreast@fgznet.ch> -+ -+ * config.rpath (ld_shlibs): Fix detection of FreeBSD-10 and up. -+ (libname_spec): Likewise. -+ * configure: Regenerate with autoconf -I ../../. -+ - 2011-02-13 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> - - * config.rpath, ltcf-c.sh, ltcf-gcj.sh, ltconfig: Remove ---- a/src/libjava/classpath/config.rpath -+++ b/src/libjava/classpath/config.rpath -@@ -361,7 +361,7 @@ - hardcode_libdir_flag_spec='-R$libdir' - hardcode_direct=yes - ;; -- freebsd2*) -+ freebsd2.*) - hardcode_direct=yes - hardcode_minus_L=yes - ;; -@@ -533,7 +533,7 @@ - ;; - freebsd* | dragonfly*) - case "$host_os" in -- freebsd[123]*) -+ freebsd[23].*) - library_names_spec='$libname$shrext$versuffix' ;; - *) - library_names_spec='$libname$shrext' ;; ---- a/src/libjava/classpath/configure -+++ b/src/libjava/classpath/configure -@@ -10025,7 +10025,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -10941,7 +10941,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -10959,7 +10959,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -@@ -14225,7 +14225,7 @@ - esac - ;; - -- freebsd[12]*) -+ freebsd2.*) - # C++ shared libraries reported to be fairly broken before - # switch to ELF - ld_shlibs_CXX=no -@@ -16000,7 +16000,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -16018,7 +16018,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) ---- a/src/libjava/configure -+++ b/src/libjava/configure -@@ -11560,7 +11560,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -12476,7 +12476,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -12494,7 +12494,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -@@ -14384,7 +14384,7 @@ - esac - ;; - -- freebsd[12]*) -+ freebsd2.*) - # C++ shared libraries reported to be fairly broken before - # switch to ELF - ld_shlibs_CXX=no -@@ -16159,7 +16159,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -16177,7 +16177,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -@@ -18520,7 +18520,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds_GCJ='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct_GCJ=yes - hardcode_minus_L_GCJ=yes -@@ -20715,7 +20715,7 @@ - *-*-cygwin*) - # Don't set THREADLIBS here. Cygwin doesn't have -lpthread. - ;; -- *-*-freebsd[1234]*) -+ *-*-freebsd[34].*) - # Before FreeBSD 5, it didn't have -lpthread (or any library which - # merely adds pthread_* functions) but it does have a -pthread switch - # which is required at link-time to select -lc_r *instead* of -lc. ---- a/src/libjava/configure.ac -+++ b/src/libjava/configure.ac -@@ -1060,7 +1060,7 @@ - *-*-cygwin*) - # Don't set THREADLIBS here. Cygwin doesn't have -lpthread. - ;; -- *-*-freebsd[[1234]]*) -+ *-*-freebsd[[34]].*) - # Before FreeBSD 5, it didn't have -lpthread (or any library which - # merely adds pthread_* functions) but it does have a -pthread switch - # which is required at link-time to select -lc_r *instead* of -lc. ---- a/src/libjava/libltdl/ChangeLog -+++ b/src/libjava/libltdl/ChangeLog -@@ -1,3 +1,8 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * acinclude.m4: Additional FreeBSD 10 fixes. -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/libjava/libltdl/acinclude.m4 -+++ b/src/libjava/libltdl/acinclude.m4 -@@ -1377,7 +1377,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[[01]]* | freebsdelf3.[[01]]*) -@@ -3035,7 +3035,7 @@ - ;; - esac - ;; -- freebsd[[12]]*) -+ freebsd2.*) - # C++ shared libraries reported to be fairly broken before switch to ELF - _LT_AC_TAGVAR(ld_shlibs, $1)=no - ;; -@@ -5669,7 +5669,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - _LT_AC_TAGVAR(archive_cmds, $1)='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - _LT_AC_TAGVAR(hardcode_direct, $1)=yes - _LT_AC_TAGVAR(hardcode_minus_L, $1)=yes ---- a/src/libjava/libltdl/configure -+++ b/src/libjava/libltdl/configure -@@ -7355,7 +7355,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -7968,7 +7968,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) ---- a/src/libjava/prims.cc -+++ b/src/libjava/prims.cc -@@ -38,7 +38,6 @@ - #endif - - #ifndef DISABLE_GETENV_PROPERTIES --#include <ctype.h> - #include <java-props.h> - #define PROCESS_GCJ_PROPERTIES process_gcj_properties() - #else -@@ -985,6 +984,8 @@ - - #ifndef DISABLE_GETENV_PROPERTIES - -+#define c_isspace(c) (memchr (" \t\n\r\v\f", c, 6) != NULL) -+ - static char * - next_property_key (char *s, size_t *length) - { -@@ -993,7 +994,7 @@ - JvAssert (s); - - // Skip over whitespace -- while (isspace (*s)) -+ while (c_isspace (*s)) - s++; - - // If we've reached the end, return NULL. Also return NULL if for -@@ -1005,7 +1006,7 @@ - - // Determine the length of the property key. - while (s[l] != 0 -- && ! isspace (s[l]) -+ && ! c_isspace (s[l]) - && s[l] != ':' - && s[l] != '=') - { -@@ -1027,19 +1028,19 @@ - - JvAssert (s); - -- while (isspace (*s)) -+ while (c_isspace (*s)) - s++; - - if (*s == ':' - || *s == '=') - s++; - -- while (isspace (*s)) -+ while (c_isspace (*s)) - s++; - - // Determine the length of the property value. - while (s[l] != 0 -- && ! isspace (s[l]) -+ && ! c_isspace (s[l]) - && s[l] != ':' - && s[l] != '=') - { ---- a/src/libmudflap/ChangeLog -+++ b/src/libmudflap/ChangeLog -@@ -1,3 +1,7 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/libmudflap/configure -+++ b/src/libmudflap/configure -@@ -8818,7 +8818,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -9731,7 +9731,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -9749,7 +9749,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) ---- a/src/libobjc/ChangeLog -+++ b/src/libobjc/ChangeLog -@@ -1,3 +1,7 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/libobjc/configure -+++ b/src/libobjc/configure -@@ -8797,7 +8797,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -9713,7 +9713,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -9731,7 +9731,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) ---- a/src/libquadmath/ChangeLog -+++ b/src/libquadmath/ChangeLog -@@ -1,3 +1,7 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/libquadmath/configure -+++ b/src/libquadmath/configure -@@ -8727,7 +8727,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -9643,7 +9643,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -9661,7 +9661,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) ---- a/src/libssp/ChangeLog -+++ b/src/libssp/ChangeLog -@@ -1,3 +1,7 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/libssp/configure -+++ b/src/libssp/configure -@@ -8864,7 +8864,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -9780,7 +9780,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -9798,7 +9798,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) ---- a/src/libstdc++-v3/ChangeLog -+++ b/src/libstdc++-v3/ChangeLog -@@ -1,3 +1,55 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ -+2011-11-16 Paolo Carlini <paolo.carlini@oracle.com> -+ -+ PR libstdc++/51142 -+ * include/debug/unordered_map (unordered_map<>::erase(iterator), -+ unordered_multimap<>::erase(iterator)): Add, consistently with -+ LWG 2059. -+ * include/debug/unordered_set (unordered_set<>::erase(iterator), -+ unordered_multiset<>::erase(iterator)): Likewise. -+ * include/debug/map.h (map<>::erase(iterator)): Likewise. -+ * include/debug/multimap.h (multimap<>::erase(iterator)): Likewise. -+ * include/profile/map.h (map<>::erase(iterator)): Likewise. -+ * include/profile/multimap.h (multimap<>::erase(iterator)): Likewise. -+ * include/bits/hashtable.h (_Hashtable<>::erase(iterator)): Likewise. -+ * include/bits/stl_map.h (map<>::erase(iterator)): Likewise. -+ * include/bits/stl_multimap.h (multimap<>::erase(iterator)): Likewise. -+ * include/bits/stl_tree.h (_Rb_tree<>::erase(iterator)): Likewise. -+ * testsuite/23_containers/unordered_map/erase/51142.cc: New. -+ * testsuite/23_containers/multimap/modifiers/erase/51142.cc: Likewise. -+ * testsuite/23_containers/set/modifiers/erase/51142.cc: Likewise. -+ * testsuite/23_containers/unordered_multimap/erase/51142.cc: Likewise. -+ * testsuite/23_containers/unordered_set/erase/51142.cc: Likewise. -+ * testsuite/23_containers/multiset/modifiers/erase/51142.cc: Likewise. -+ * testsuite/23_containers/unordered_multiset/erase/51142.cc: Likewise. -+ * testsuite/23_containers/map/modifiers/erase/51142.cc: Likewise. -+ -+2011-11-15 Jason Dick <dickphd@gmail.com> -+ -+ PR libstdc++/51133 -+ * include/tr1/poly_hermite.tcc (__poly_hermite_recursion): Fix -+ wrong sign in recursion relation. -+ -+2011-11-02 Richard B. Kreckel <kreckel@ginac.de> -+ Paolo Carlini <paolo.carlini@oracle.com> -+ -+ PR libstdc++/50880 -+ * include/std/complex (__complex_acosh): Fix in a better way, -+ use Kahan's formula. -+ * include/tr1/complex (__complex_acosh): Likewise. -+ -+2011-11-02 Richard B. Kreckel <kreckel@ginac.de> -+ Paolo Carlini <paolo.carlini@oracle.com> -+ -+ PR libstdc++/50880 -+ * include/std/complex (__complex_acosh): Fix for __z.real() < 0. -+ * include/tr1/complex (__complex_acosh): Likewise. -+ * testsuite/26_numerics/complex/50880.cc: New. -+ * testsuite/tr1/8_c_compatibility/complex/50880.cc: Likewise. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/libstdc++-v3/configure -+++ b/src/libstdc++-v3/configure -@@ -9698,7 +9698,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -10614,7 +10614,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -10632,7 +10632,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -@@ -12522,7 +12522,7 @@ - esac - ;; - -- freebsd[12]*) -+ freebsd2.*) - # C++ shared libraries reported to be fairly broken before - # switch to ELF - ld_shlibs_CXX=no -@@ -14297,7 +14297,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -14315,7 +14315,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) ---- a/src/libstdc++-v3/include/bits/hashtable.h -+++ b/src/libstdc++-v3/include/bits/hashtable.h -@@ -440,6 +440,11 @@ - iterator - erase(const_iterator); - -+ // LWG 2059. -+ iterator -+ erase(iterator __it) -+ { return erase(const_iterator(__it)); } -+ - size_type - erase(const key_type&); - ---- a/src/libstdc++-v3/include/bits/stl_map.h -+++ b/src/libstdc++-v3/include/bits/stl_map.h -@@ -612,6 +612,11 @@ - iterator - erase(const_iterator __position) - { return _M_t.erase(__position); } -+ -+ // LWG 2059. -+ iterator -+ erase(iterator __position) -+ { return _M_t.erase(__position); } - #else - /** - * @brief Erases an element from a %map. ---- a/src/libstdc++-v3/include/bits/stl_multimap.h -+++ b/src/libstdc++-v3/include/bits/stl_multimap.h -@@ -533,6 +533,11 @@ - iterator - erase(const_iterator __position) - { return _M_t.erase(__position); } -+ -+ // LWG 2059. -+ iterator -+ erase(iterator __position) -+ { return _M_t.erase(__position); } - #else - /** - * @brief Erases an element from a %multimap. ---- a/src/libstdc++-v3/include/bits/stl_tree.h -+++ b/src/libstdc++-v3/include/bits/stl_tree.h -@@ -760,6 +760,16 @@ - _M_erase_aux(__position); - return __result._M_const_cast(); - } -+ -+ // LWG 2059. -+ iterator -+ erase(iterator __position) -+ { -+ iterator __result = __position; -+ ++__result; -+ _M_erase_aux(__position); -+ return __result; -+ } - #else - void - erase(iterator __position) ---- a/src/libstdc++-v3/include/debug/map.h -+++ b/src/libstdc++-v3/include/debug/map.h -@@ -273,6 +273,10 @@ - this->_M_invalidate_if(_Equal(__position.base())); - return iterator(_Base::erase(__position.base()), this); - } -+ -+ iterator -+ erase(iterator __position) -+ { return erase(const_iterator(__position)); } - #else - void - erase(iterator __position) ---- a/src/libstdc++-v3/include/debug/multimap.h -+++ b/src/libstdc++-v3/include/debug/multimap.h -@@ -254,6 +254,10 @@ - this->_M_invalidate_if(_Equal(__position.base())); - return iterator(_Base::erase(__position.base()), this); - } -+ -+ iterator -+ erase(iterator __position) -+ { return erase(const_iterator(__position)); } - #else - void - erase(iterator __position) ---- a/src/libstdc++-v3/include/debug/unordered_map -+++ b/src/libstdc++-v3/include/debug/unordered_map -@@ -276,6 +276,10 @@ - } - - iterator -+ erase(iterator __it) -+ { return erase(const_iterator(__it)); } -+ -+ iterator - erase(const_iterator __first, const_iterator __last) - { - __glibcxx_check_erase_range(__first, __last); -@@ -558,6 +562,10 @@ - } - - iterator -+ erase(iterator __it) -+ { return erase(const_iterator(__it)); } -+ -+ iterator - erase(const_iterator __first, const_iterator __last) - { - __glibcxx_check_erase_range(__first, __last); ---- a/src/libstdc++-v3/include/debug/unordered_set -+++ b/src/libstdc++-v3/include/debug/unordered_set -@@ -269,6 +269,10 @@ - } - - iterator -+ erase(iterator __it) -+ { return erase(const_iterator(__it)); } -+ -+ iterator - erase(const_iterator __first, const_iterator __last) - { - __glibcxx_check_erase_range(__first, __last); -@@ -539,6 +543,10 @@ - } - - iterator -+ erase(iterator __it) -+ { return erase(const_iterator(__it)); } -+ -+ iterator - erase(const_iterator __first, const_iterator __last) - { - __glibcxx_check_erase_range(__first, __last); ---- a/src/libstdc++-v3/include/profile/map.h -+++ b/src/libstdc++-v3/include/profile/map.h -@@ -326,6 +326,10 @@ - __profcxx_map_to_unordered_map_erase(this, size(), 1); - return __i; - } -+ -+ iterator -+ erase(iterator __position) -+ { return erase(const_iterator(__position)); } - #else - void - erase(iterator __position) ---- a/src/libstdc++-v3/include/profile/multimap.h -+++ b/src/libstdc++-v3/include/profile/multimap.h -@@ -225,6 +225,10 @@ - iterator - erase(const_iterator __position) - { return iterator(_Base::erase(__position)); } -+ -+ iterator -+ erase(iterator __position) -+ { return iterator(_Base::erase(__position)); } - #else - void - erase(iterator __position) ---- a/src/libstdc++-v3/include/std/complex -+++ b/src/libstdc++-v3/include/std/complex -@@ -1,7 +1,7 @@ - // The template and inlines for the -*- C++ -*- complex number classes. - - // Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, --// 2006, 2007, 2008, 2009, 2010 -+// 2006, 2007, 2008, 2009, 2010, 2011 - // Free Software Foundation, Inc. - // - // This file is part of the GNU ISO C++ Library. This library is free -@@ -1695,12 +1695,9 @@ - std::complex<_Tp> - __complex_acosh(const std::complex<_Tp>& __z) - { -- std::complex<_Tp> __t((__z.real() - __z.imag()) -- * (__z.real() + __z.imag()) - _Tp(1.0), -- _Tp(2.0) * __z.real() * __z.imag()); -- __t = std::sqrt(__t); -- -- return std::log(__t + __z); -+ // Kahan's formula. -+ return _Tp(2.0) * std::log(std::sqrt(_Tp(0.5) * (__z + _Tp(1.0))) -+ + std::sqrt(_Tp(0.5) * (__z - _Tp(1.0)))); - } - - #if _GLIBCXX_USE_C99_COMPLEX_TR1 ---- a/src/libstdc++-v3/include/tr1/complex -+++ b/src/libstdc++-v3/include/tr1/complex -@@ -185,12 +185,9 @@ - std::complex<_Tp> - __complex_acosh(const std::complex<_Tp>& __z) - { -- std::complex<_Tp> __t((__z.real() - __z.imag()) -- * (__z.real() + __z.imag()) - _Tp(1.0), -- _Tp(2.0) * __z.real() * __z.imag()); -- __t = std::sqrt(__t); -- -- return std::log(__t + __z); -+ // Kahan's formula. -+ return _Tp(2.0) * std::log(std::sqrt(_Tp(0.5) * (__z + _Tp(1.0))) -+ + std::sqrt(_Tp(0.5) * (__z - _Tp(1.0)))); - } - - #if _GLIBCXX_USE_C99_COMPLEX_TR1 ---- a/src/libstdc++-v3/include/tr1/poly_hermite.tcc -+++ b/src/libstdc++-v3/include/tr1/poly_hermite.tcc -@@ -1,6 +1,6 @@ - // Special functions -*- C++ -*- - --// Copyright (C) 2006, 2007, 2008, 2009, 2010 -+// Copyright (C) 2006, 2007, 2008, 2009, 2010, 2011 - // Free Software Foundation, Inc. - // - // This file is part of the GNU ISO C++ Library. This library is free -@@ -84,7 +84,7 @@ - unsigned int __i; - for (__H_nm2 = __H_0, __H_nm1 = __H_1, __i = 2; __i <= __n; ++__i) - { -- __H_n = 2 * (__x * __H_nm1 + (__i - 1) * __H_nm2); -+ __H_n = 2 * (__x * __H_nm1 - (__i - 1) * __H_nm2); - __H_nm2 = __H_nm1; - __H_nm1 = __H_n; - } ---- a/src/libstdc++-v3/libsupc++/eh_arm.cc -+++ b/src/libstdc++-v3/libsupc++/eh_arm.cc -@@ -30,10 +30,11 @@ - using namespace __cxxabiv1; - - --// Given the thrown type THROW_TYPE, pointer to a variable containing a --// pointer to the exception object THROWN_PTR_P and a type CATCH_TYPE to --// compare against, return whether or not there is a match and if so, --// update *THROWN_PTR_P. -+// Given the thrown type THROW_TYPE, exception object UE_HEADER and a -+// type CATCH_TYPE to compare against, return whether or not there is -+// a match and if so, update *THROWN_PTR_P to point to either the -+// type-matched object, or in the case of a pointer type, the object -+// pointed to by the pointer. - - extern "C" __cxa_type_match_result - __cxa_type_match(_Unwind_Exception* ue_header, -@@ -41,51 +42,51 @@ - bool is_reference __attribute__((__unused__)), - void** thrown_ptr_p) - { -- bool forced_unwind = __is_gxx_forced_unwind_class(ue_header->exception_class); -- bool foreign_exception = !forced_unwind && !__is_gxx_exception_class(ue_header->exception_class); -- bool dependent_exception = -- __is_dependent_exception(ue_header->exception_class); -+ bool forced_unwind -+ = __is_gxx_forced_unwind_class(ue_header->exception_class); -+ bool foreign_exception -+ = !forced_unwind && !__is_gxx_exception_class(ue_header->exception_class); -+ bool dependent_exception -+ = __is_dependent_exception(ue_header->exception_class); - __cxa_exception* xh = __get_exception_header_from_ue(ue_header); - __cxa_dependent_exception *dx = __get_dependent_exception_from_ue(ue_header); - const std::type_info* throw_type; -+ void *thrown_ptr = 0; - - if (forced_unwind) - throw_type = &typeid(abi::__forced_unwind); - else if (foreign_exception) - throw_type = &typeid(abi::__foreign_exception); -- else if (dependent_exception) -- throw_type = __get_exception_header_from_obj -- (dx->primaryException)->exceptionType; - else -- throw_type = xh->exceptionType; -- -- void* thrown_ptr = *thrown_ptr_p; -+ { -+ if (dependent_exception) -+ xh = __get_exception_header_from_obj (dx->primaryException); -+ throw_type = xh->exceptionType; -+ // We used to require the caller set the target of thrown_ptr_p, -+ // but that's incorrect -- the EHABI makes no such requirement -+ // -- and not all callers will set it. Fortunately callers that -+ // do initialize will always pass us the value we calculate -+ // here, so there's no backwards compatibility problem. -+ thrown_ptr = __get_object_from_ue (ue_header); -+ } -+ -+ __cxa_type_match_result result = ctm_succeeded; - - // Pointer types need to adjust the actual pointer, not - // the pointer to pointer that is the exception object. - // This also has the effect of passing pointer types - // "by value" through the __cxa_begin_catch return value. - if (throw_type->__is_pointer_p()) -- thrown_ptr = *(void**) thrown_ptr; -+ { -+ thrown_ptr = *(void**) thrown_ptr; -+ // We need to indicate the indirection to our caller. -+ result = ctm_succeeded_with_ptr_to_base; -+ } - - if (catch_type->__do_catch(throw_type, &thrown_ptr, 1)) - { - *thrown_ptr_p = thrown_ptr; -- -- if (typeid(*catch_type) == typeid (typeid(void*))) -- { -- const __pointer_type_info *catch_pointer_type = -- static_cast<const __pointer_type_info *> (catch_type); -- const __pointer_type_info *throw_pointer_type = -- static_cast<const __pointer_type_info *> (throw_type); -- -- if (typeid (*catch_pointer_type->__pointee) != typeid (void) -- && (*catch_pointer_type->__pointee != -- *throw_pointer_type->__pointee)) -- return ctm_succeeded_with_ptr_to_base; -- } -- -- return ctm_succeeded; -+ return result; - } - - return ctm_failed; ---- a/src/libstdc++-v3/testsuite/23_containers/map/modifiers/erase/51142.cc -+++ b/src/libstdc++-v3/testsuite/23_containers/map/modifiers/erase/51142.cc -@@ -0,0 +1,38 @@ -+// Copyright (C) 2011 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+// -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without even the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+// -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// <http://www.gnu.org/licenses/>. -+// -+ -+// { dg-do compile } -+// { dg-options "-std=gnu++0x" } -+ -+#include <map> -+ -+struct X -+{ -+ template<typename T> -+ X(T&) {} -+}; -+ -+bool operator<(const X&, const X&) { return false; } -+ -+// LWG 2059. -+void erasor(std::map<X, int>& s, X x) -+{ -+ std::map<X, int>::iterator it = s.find(x); -+ if (it != s.end()) -+ s.erase(it); -+} ---- a/src/libstdc++-v3/testsuite/23_containers/multimap/modifiers/erase/51142.cc -+++ b/src/libstdc++-v3/testsuite/23_containers/multimap/modifiers/erase/51142.cc -@@ -0,0 +1,38 @@ -+// Copyright (C) 2011 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+// -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without even the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+// -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// <http://www.gnu.org/licenses/>. -+// -+ -+// { dg-do compile } -+// { dg-options "-std=gnu++0x" } -+ -+#include <map> -+ -+struct X -+{ -+ template<typename T> -+ X(T&) {} -+}; -+ -+bool operator<(const X&, const X&) { return false; } -+ -+// LWG 2059. -+void erasor(std::multimap<X, int>& s, X x) -+{ -+ std::multimap<X, int>::iterator it = s.find(x); -+ if (it != s.end()) -+ s.erase(it); -+} ---- a/src/libstdc++-v3/testsuite/23_containers/multiset/modifiers/erase/51142.cc -+++ b/src/libstdc++-v3/testsuite/23_containers/multiset/modifiers/erase/51142.cc -@@ -0,0 +1,38 @@ -+// Copyright (C) 2011 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+// -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without even the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+// -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// <http://www.gnu.org/licenses/>. -+// -+ -+// { dg-do compile } -+// { dg-options "-std=gnu++0x" } -+ -+#include <set> -+ -+struct X -+{ -+ template<typename T> -+ X(T&) {} -+}; -+ -+bool operator<(const X&, const X&) { return false; } -+ -+// LWG 2059. -+void erasor(std::multiset<X>& s, X x) -+{ -+ std::multiset<X>::iterator it = s.find(x); -+ if (it != s.end()) -+ s.erase(it); -+} ---- a/src/libstdc++-v3/testsuite/23_containers/set/modifiers/erase/51142.cc -+++ b/src/libstdc++-v3/testsuite/23_containers/set/modifiers/erase/51142.cc -@@ -0,0 +1,38 @@ -+// Copyright (C) 2011 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+// -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without even the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+// -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// <http://www.gnu.org/licenses/>. -+// -+ -+// { dg-do compile } -+// { dg-options "-std=gnu++0x" } -+ -+#include <set> -+ -+struct X -+{ -+ template<typename T> -+ X(T&) {} -+}; -+ -+bool operator<(const X&, const X&) { return false; } -+ -+// LWG 2059. -+void erasor(std::set<X>& s, X x) -+{ -+ std::set<X>::iterator it = s.find(x); -+ if (it != s.end()) -+ s.erase(it); -+} ---- a/src/libstdc++-v3/testsuite/23_containers/unordered_map/erase/51142.cc -+++ b/src/libstdc++-v3/testsuite/23_containers/unordered_map/erase/51142.cc -@@ -0,0 +1,38 @@ -+// Copyright (C) 2011 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+// -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without even the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+// -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// <http://www.gnu.org/licenses/>. -+// -+ -+// { dg-do compile } -+// { dg-options "-std=gnu++0x" } -+ -+#include <unordered_map> -+ -+struct X -+{ -+ template<typename T> -+ X(T&) {} -+}; -+ -+bool operator==(const X&, const X&) { return false; } -+ -+// LWG 2059. -+void erasor(std::unordered_map<X, int>& s, X x) -+{ -+ std::unordered_map<X, int>::iterator it = s.find(x); -+ if (it != s.end()) -+ s.erase(it); -+} ---- a/src/libstdc++-v3/testsuite/23_containers/unordered_multimap/erase/51142.cc -+++ b/src/libstdc++-v3/testsuite/23_containers/unordered_multimap/erase/51142.cc -@@ -0,0 +1,38 @@ -+// Copyright (C) 2011 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+// -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without even the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+// -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// <http://www.gnu.org/licenses/>. -+// -+ -+// { dg-do compile } -+// { dg-options "-std=gnu++0x" } -+ -+#include <unordered_map> -+ -+struct X -+{ -+ template<typename T> -+ X(T&) {} -+}; -+ -+bool operator==(const X&, const X&) { return false; } -+ -+// LWG 2059. -+void erasor(std::unordered_multimap<X, int>& s, X x) -+{ -+ std::unordered_multimap<X, int>::iterator it = s.find(x); -+ if (it != s.end()) -+ s.erase(it); -+} ---- a/src/libstdc++-v3/testsuite/23_containers/unordered_multiset/erase/51142.cc -+++ b/src/libstdc++-v3/testsuite/23_containers/unordered_multiset/erase/51142.cc -@@ -0,0 +1,38 @@ -+// Copyright (C) 2011 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+// -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without even the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+// -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// <http://www.gnu.org/licenses/>. -+// -+ -+// { dg-do compile } -+// { dg-options "-std=gnu++0x" } -+ -+#include <unordered_set> -+ -+struct X -+{ -+ template<typename T> -+ X(T&) {} -+}; -+ -+bool operator==(const X&, const X&) { return false; } -+ -+// LWG 2059. -+void erasor(std::unordered_multiset<X>& s, X x) -+{ -+ std::unordered_multiset<X>::iterator it = s.find(x); -+ if (it != s.end()) -+ s.erase(it); -+} ---- a/src/libstdc++-v3/testsuite/23_containers/unordered_set/erase/51142.cc -+++ b/src/libstdc++-v3/testsuite/23_containers/unordered_set/erase/51142.cc -@@ -0,0 +1,38 @@ -+// Copyright (C) 2011 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+// -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without even the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+// -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// <http://www.gnu.org/licenses/>. -+// -+ -+// { dg-do compile } -+// { dg-options "-std=gnu++0x" } -+ -+#include <unordered_set> -+ -+struct X -+{ -+ template<typename T> -+ X(T&) {} -+}; -+ -+bool operator==(const X&, const X&) { return false; } -+ -+// LWG 2059. -+void erasor(std::unordered_set<X>& s, X x) -+{ -+ std::unordered_set<X>::iterator it = s.find(x); -+ if (it != s.end()) -+ s.erase(it); -+} ---- a/src/libstdc++-v3/testsuite/26_numerics/complex/50880.cc -+++ b/src/libstdc++-v3/testsuite/26_numerics/complex/50880.cc -@@ -0,0 +1,53 @@ -+// { dg-options "-std=gnu++0x" } -+// -+// Copyright (C) 2011 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+// -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without even the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+// -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// <http://www.gnu.org/licenses/>. -+ -+#include <complex> -+#include <testsuite_hooks.h> -+ -+template<typename T> -+ void test01_do() -+ { -+ bool test __attribute__((unused)) = true; -+ -+ const std::complex<T> ca(T(-2), T(2)); -+ const std::complex<T> cb(T(-2), T(0)); -+ const std::complex<T> cc(T(-2), T(-2)); -+ -+ std::complex<T> cra = std::acosh(ca); -+ std::complex<T> crb = std::acosh(cb); -+ std::complex<T> crc = std::acosh(cc); -+ -+ VERIFY( cra.real() > T(0) ); -+ VERIFY( crb.real() > T(0) ); -+ VERIFY( crc.real() > T(0) ); -+ } -+ -+// libstdc++/50880 -+void test01() -+{ -+ test01_do<float>(); -+ test01_do<double>(); -+ test01_do<long double>(); -+} -+ -+int main() -+{ -+ test01(); -+ return 0; -+} ---- a/src/libstdc++-v3/testsuite/tr1/8_c_compatibility/complex/50880.cc -+++ b/src/libstdc++-v3/testsuite/tr1/8_c_compatibility/complex/50880.cc -@@ -0,0 +1,51 @@ -+// Copyright (C) 2011 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+// -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without even the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+// -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// <http://www.gnu.org/licenses/>. -+ -+#include <tr1/complex> -+#include <testsuite_hooks.h> -+ -+template<typename T> -+ void test01_do() -+ { -+ bool test __attribute__((unused)) = true; -+ -+ const std::complex<T> ca(T(-2), T(2)); -+ const std::complex<T> cb(T(-2), T(0)); -+ const std::complex<T> cc(T(-2), T(-2)); -+ -+ std::complex<T> cra = std::tr1::acosh(ca); -+ std::complex<T> crb = std::tr1::acosh(cb); -+ std::complex<T> crc = std::tr1::acosh(cc); -+ -+ VERIFY( cra.real() > T(0) ); -+ VERIFY( crb.real() > T(0) ); -+ VERIFY( crc.real() > T(0) ); -+ } -+ -+// libstdc++/50880 -+void test01() -+{ -+ test01_do<float>(); -+ test01_do<double>(); -+ test01_do<long double>(); -+} -+ -+int main() -+{ -+ test01(); -+ return 0; -+} ---- a/src/libtool.m4 -+++ b/src/libtool.m4 -@@ -2273,7 +2273,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[[123]]*) objformat=aout ;; -+ freebsd[[23]].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -2291,7 +2291,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[[01]]* | freebsdelf3.[[01]]*) -@@ -4804,7 +4804,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - _LT_TAGVAR(archive_cmds, $1)='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - _LT_TAGVAR(hardcode_direct, $1)=yes - _LT_TAGVAR(hardcode_minus_L, $1)=yes -@@ -5751,7 +5751,7 @@ - esac - ;; - -- freebsd[[12]]*) -+ freebsd2.*) - # C++ shared libraries reported to be fairly broken before - # switch to ELF - _LT_TAGVAR(ld_shlibs, $1)=no ---- a/src/lto-plugin/ChangeLog -+++ b/src/lto-plugin/ChangeLog -@@ -1,3 +1,7 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/lto-plugin/configure -+++ b/src/lto-plugin/configure -@@ -8733,7 +8733,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -9646,7 +9646,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -9664,7 +9664,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) ---- a/src/maintainer-scripts/ChangeLog -+++ b/src/maintainer-scripts/ChangeLog -@@ -1,3 +1,8 @@ -+2011-11-23 Gerald Pfeifer <gerald@pfeifer.com> -+ -+ * update_web_docs_svn: Make $DOCSDIR group writable after -+ creating it. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/maintainer-scripts/update_web_docs_svn -+++ b/src/maintainer-scripts/update_web_docs_svn -@@ -93,6 +93,7 @@ - - if [ ! -d $DOCSDIR ]; then - mkdir $DOCSDIR -+ chmod g+w $DOCSDIR - fi - - if [ -z "$RELEASE" ]; then ---- a/src/zlib/ChangeLog -+++ b/src/zlib/ChangeLog -@@ -1,3 +1,7 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. ---- a/src/zlib/configure -+++ b/src/zlib/configure -@@ -8600,7 +8600,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -9516,7 +9516,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -9534,7 +9534,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) diff --git a/debian/patches/gcc-multiarch-doc.diff b/debian/patches/gcc-multiarch-doc.diff index b86378c..ddbe784 100644 --- a/debian/patches/gcc-multiarch-doc.diff +++ b/debian/patches/gcc-multiarch-doc.diff @@ -1,8 +1,44 @@ # DP: Document -print-multiarch option +--- a/src/gcc/doc/fragments.texi ++++ b/src/gcc/doc/fragments.texi +@@ -129,6 +129,33 @@ + of options to be used for all builds. If you set this, you should + probably set @code{CRTSTUFF_T_CFLAGS} to a dash followed by it. + ++@findex MULTILIB_OSDIRNAMES ++@item MULTILIB_OSDIRNAMES ++If @code{MULTILIB_OPTIONS} is used, this variable specifies the list ++of OS subdirectory names. The format is either the same as of ++@code{MULTILIB_DIRNAMES}, or a set of mappings. When it is the same ++as @code{MULTILIB_DIRNAMES}, it describes the multilib directories ++using OS conventions, rather than GCC conventions. When it is a set ++of mappings of the form @var{gccdir}=@var{osdir}, the left side gives ++the GCC convention and the right gives the equivalent OS defined ++location. If the @var{osdir} part begins with a @samp{!}, the os ++directory names are used exclusively. Use the mapping when there is ++no one-to-one equivalence between GCC levels and the OS. ++ ++For multilib enabled configurations (see @code{MULTIARCH_DIRNAME}) ++below), the multilib name is appended to each directory name, separated ++by a colon (e.g. @samp{../lib:x86_64-linux-gnu}). ++ ++@findex MULTIARCH_DIRNAME ++@item MULTIARCH_DIRNAME ++If @code{MULTIARCH_DIRNAME} is used, this variable specifies the ++multiarch name for this configuration. For multiarch enabled ++configurations it is used to search libraries and crt files in ++@file{/lib/@var{multiarch}} and @file{/usr/lib/@var{multiarch}}, and ++system header files in @file{/usr/include/@var{multiarch}}. ++@code{MULTIARCH_DIRNAME} is not used for multilib enabled ++configurations, but encoded in @code{MULTILIB_OSDIRNAMES} instead. ++ + @findex SPECS + @item SPECS + Unfortunately, setting @code{MULTILIB_EXTRA_OPTS} is not enough, since --- a/src/gcc/doc/invoke.texi +++ b/src/gcc/doc/invoke.texi -@@ -5937,6 +5937,11 @@ +@@ -6011,6 +6011,11 @@ @file{../lib32}, or if OS libraries are present in @file{lib/@var{subdir}} subdirectories it prints e.g.@: @file{amd64}, @file{sparcv9} or @file{ev6}. @@ -14,3 +50,17 @@ @item -print-prog-name=@var{program} @opindex print-prog-name Like @option{-print-file-name}, but searches for a program such as @samp{cpp}. +--- a/src/gcc/doc/install.texi ++++ b/src/gcc/doc/install.texi +@@ -1036,6 +1036,11 @@ + conventions, etc.@: should not be built. The default is to build a + predefined set of them. + ++@item --enable-multiarch ++Specify wether to enable or disable multiarch support. The default is ++to detect for glibc start files in a multiarch location, and enable it ++if the files are found. ++ + Some targets provide finer-grained control over which multilibs are built + (e.g., @option{--disable-softfloat}): + @table @code diff --git a/debian/patches/gcc-multiarch.diff b/debian/patches/gcc-multiarch.diff index d2a05ac..4580f60 100644 --- a/debian/patches/gcc-multiarch.diff +++ b/debian/patches/gcc-multiarch.diff @@ -39,12 +39,10 @@ * config/ia64/t-glibc: Define MULTIARCH_DIRNAME for linux target. -Index: b/src/gcc/incpath.c -=================================================================== ---- a/src/gcc/incpath.c -+++ b/src/gcc/incpath.c +--- a/src/gcc/incpath.c (revision 182390) ++++ b/src/gcc/incpath.c (working copy) @@ -150,8 +150,14 @@ - if (!strncmp (p->fname, cpp_GCC_INCLUDE_DIR, len)) + if (!filename_ncmp (p->fname, cpp_GCC_INCLUDE_DIR, len)) { char *str = concat (iprefix, p->fname + len, NULL); - if (p->multilib && imultilib) @@ -75,11 +73,9 @@ Index: b/src/gcc/incpath.c add_path (str, SYSTEM, p->cxx_aware, false); } -Index: b/src/gcc/gcc.c -=================================================================== ---- a/src/gcc/gcc.c -+++ b/src/gcc/gcc.c -@@ -1135,6 +1135,11 @@ +--- a/src/gcc/gcc.c (revision 182390) ++++ b/src/gcc/gcc.c (working copy) +@@ -1147,6 +1147,11 @@ set_multilib_dir based on the compilation options. */ static const char *multilib_os_dir; @@ -90,8 +86,8 @@ Index: b/src/gcc/gcc.c +static const char *multiarch_dir; /* Structure to keep track of the specs that have been defined so far. - These are accessed using %(specname) or %[specname] in a compiler -@@ -2048,6 +2053,7 @@ + These are accessed using %(specname) in a compiler or link +@@ -2072,6 +2077,7 @@ struct prefix_list *pl; const char *multi_dir = NULL; const char *multi_os_dir = NULL; @@ -99,7 +95,7 @@ Index: b/src/gcc/gcc.c const char *multi_suffix; const char *just_multi_suffix; char *path = NULL; -@@ -2065,11 +2071,14 @@ +@@ -2089,11 +2095,14 @@ } if (do_multi && multilib_os_dir && strcmp (multilib_os_dir, ".") != 0) multi_os_dir = concat (multilib_os_dir, dir_separator_str, NULL); @@ -134,7 +130,7 @@ Index: b/src/gcc/gcc.c path = XNEWVEC (char, len); } -@@ -2116,6 +2127,16 @@ +@@ -2140,6 +2148,16 @@ break; } @@ -151,7 +147,7 @@ Index: b/src/gcc/gcc.c /* Now try the base path. */ if (!pl->require_machine_suffix && !(pl->os_multilib ? skip_multi_os_dir : skip_multi_dir)) -@@ -3217,6 +3238,7 @@ +@@ -3228,6 +3246,7 @@ case OPT_print_multi_directory: case OPT_print_sysroot: case OPT_print_multi_os_directory: @@ -159,7 +155,7 @@ Index: b/src/gcc/gcc.c case OPT_print_sysroot_headers_suffix: case OPT_time: case OPT_wrapper: -@@ -4867,6 +4889,15 @@ +@@ -4880,6 +4899,15 @@ do_spec_1 (" ", 0, NULL); } @@ -175,7 +171,7 @@ Index: b/src/gcc/gcc.c if (gcc_exec_prefix) { do_spec_1 ("-iprefix", 1, NULL); -@@ -6812,6 +6843,15 @@ +@@ -6497,6 +6525,15 @@ return (0); } @@ -191,7 +187,7 @@ Index: b/src/gcc/gcc.c if (print_sysroot) { if (target_system_root) -@@ -7787,10 +7827,26 @@ +@@ -7472,10 +7509,26 @@ q++; if (q < end) { @@ -206,7 +202,8 @@ Index: b/src/gcc/gcc.c + new_multilib_os_dir = XNEWVEC (char, end - q); memcpy (new_multilib_os_dir, q + 1, end - q - 1); new_multilib_os_dir[end - q - 1] = '\0'; - multilib_os_dir = new_multilib_os_dir; +- multilib_os_dir = new_multilib_os_dir; ++ multilib_os_dir = *new_multilib_os_dir ? new_multilib_os_dir : "."; + + end = this_path + this_path_len; + if (q2 < end && *q2 == ':') @@ -219,19 +216,17 @@ Index: b/src/gcc/gcc.c break; } } -@@ -7852,7 +7908,7 @@ +@@ -7537,7 +7590,7 @@ /* When --disable-multilib was used but target defines MULTILIB_OSDIRNAMES, entries starting with .: are there just to find multilib_os_dir, so skip them from output. */ - if (this_path[0] == '.' && this_path[1] == ':') -+ if (this_path[0] == '.' && this_path[1] == ':' && this_path[2] != '.' && this_path[3] != ':') ++ if (this_path[0] == '.' && this_path[1] == ':' && this_path[2] != ':') skip = 1; /* Check for matches with the multilib_exclusions. We don't bother -Index: b/src/gcc/genmultilib -=================================================================== ---- a/src/gcc/genmultilib -+++ b/src/gcc/genmultilib +--- a/src/gcc/genmultilib (revision 182390) ++++ b/src/gcc/genmultilib (working copy) @@ -73,6 +73,8 @@ # the os directory names are used exclusively. Use the mapping when # there is no one-to-one equivalence between GCC levels and the OS. @@ -256,7 +251,7 @@ Index: b/src/gcc/genmultilib toosdirnames= defaultosdirname= +if [ -n "${multiarch}" ]; then -+ defaultosdirname=:.:${multiarch} ++ defaultosdirname=::${multiarch} +fi if [ -n "${osdirnames}" ]; then set x ${osdirnames} @@ -287,11 +282,33 @@ Index: b/src/gcc/genmultilib if [ "x${enable_multilib}" != xyes ]; then dirout=".:${osdirout}" disable_multilib=yes -Index: b/src/gcc/cppdefault.c -=================================================================== ---- a/src/gcc/cppdefault.c -+++ b/src/gcc/cppdefault.c -@@ -64,6 +64,7 @@ +--- a/src/gcc/configure.ac (revision 182390) ++++ b/src/gcc/configure.ac (working copy) +@@ -620,6 +620,21 @@ + [], [enable_multilib=yes]) + AC_SUBST(enable_multilib) + ++# Determine whether or not multiarch is enabled. ++AC_ARG_ENABLE(multiarch, ++[AS_HELP_STRING([--enable-multiarch], ++ [enable support for multiarch paths])], ++[case "${withval}" in ++yes|no|auto-detect) enable_multiarch=$withval;; ++*) AC_MSG_ERROR(bad value ${withval} given for --enable-multiarch option) ;; ++esac], [enable_multiarch=auto-detect]) ++AC_MSG_CHECKING(for multiarch configuration) ++AC_SUBST(enable_multiarch) ++AC_MSG_RESULT($enable_multiarch) ++ ++# needed for setting the multiarch name on ARM ++AC_SUBST(with_float) ++ + # Enable __cxa_atexit for C++. + AC_ARG_ENABLE(__cxa_atexit, + [AS_HELP_STRING([--enable-__cxa_atexit], [enable __cxa_atexit for C++])], +--- a/src/gcc/cppdefault.c (revision 182390) ++++ b/src/gcc/cppdefault.c (working copy) +@@ -60,6 +60,7 @@ #endif #ifdef LOCAL_INCLUDE_DIR /* /usr/local/include comes before the fixincluded header files. */ @@ -299,18 +316,16 @@ Index: b/src/gcc/cppdefault.c { LOCAL_INCLUDE_DIR, 0, 0, 1, 1, 0 }, #endif #ifdef PREFIX_INCLUDE_DIR -@@ -95,6 +96,7 @@ +@@ -87,6 +88,7 @@ #endif - #ifdef STANDARD_INCLUDE_DIR + #ifdef NATIVE_SYSTEM_HEADER_DIR /* /usr/include comes dead last. */ -+ { STANDARD_INCLUDE_DIR, STANDARD_INCLUDE_COMPONENT, 0, 0, 1, 2 }, - { STANDARD_INCLUDE_DIR, STANDARD_INCLUDE_COMPONENT, 0, 0, 1, 0 }, ++ { NATIVE_SYSTEM_HEADER_DIR, NATIVE_SYSTEM_HEADER_COMPONENT, 0, 0, 1, 2 }, + { NATIVE_SYSTEM_HEADER_DIR, NATIVE_SYSTEM_HEADER_COMPONENT, 0, 0, 1, 0 }, #endif { 0, 0, 0, 0, 0, 0 } -Index: b/src/gcc/cppdefault.h -=================================================================== ---- a/src/gcc/cppdefault.h -+++ b/src/gcc/cppdefault.h +--- a/src/gcc/cppdefault.h (revision 182390) ++++ b/src/gcc/cppdefault.h (working copy) @@ -43,9 +43,11 @@ C++. */ const char add_sysroot; /* FNAME should be prefixed by @@ -326,11 +341,9 @@ Index: b/src/gcc/cppdefault.h }; extern const struct default_include cpp_include_defaults[]; -Index: b/src/gcc/common.opt -=================================================================== ---- a/src/gcc/common.opt -+++ b/src/gcc/common.opt -@@ -334,6 +334,9 @@ +--- a/src/gcc/common.opt (revision 182390) ++++ b/src/gcc/common.opt (working copy) +@@ -345,6 +345,9 @@ -print-multi-os-directory Driver Alias(print-multi-os-directory) @@ -340,7 +353,7 @@ Index: b/src/gcc/common.opt -print-prog-name Driver Separate Alias(print-prog-name=) -@@ -2190,6 +2193,10 @@ +@@ -2268,6 +2271,10 @@ Common Joined Var(plugindir_string) Init(0) -iplugindir=<dir> Set <dir> to be the default plugin directory @@ -351,7 +364,7 @@ Index: b/src/gcc/common.opt l Driver Joined Separate -@@ -2247,6 +2254,9 @@ +@@ -2325,6 +2332,9 @@ print-multi-os-directory Driver Var(print_multi_os_directory) @@ -361,20 +374,55 @@ Index: b/src/gcc/common.opt print-prog-name= Driver JoinedOrMissing Var(print_prog_name) -Index: b/src/gcc/Makefile.in -=================================================================== ---- a/src/gcc/Makefile.in -+++ b/src/gcc/Makefile.in -@@ -338,6 +338,8 @@ +--- a/src/gcc/config.gcc (revision 182390) ++++ b/src/gcc/config.gcc (working copy) +@@ -2012,6 +2012,7 @@ + ;; + *) + tm_file="${tm_file} rs6000/linux.h glibc-stdint.h" ++ tmake_file="$tmake_file rs6000/t-linux" + ;; + esac + case ${target} in +@@ -3467,10 +3468,14 @@ + + i[34567]86-*-darwin* | x86_64-*-darwin*) + ;; +- i[34567]86-*-linux* | x86_64-*-linux* | \ +- i[34567]86-*-kfreebsd*-gnu | x86_64-*-kfreebsd*-gnu | \ +- i[34567]86-*-gnu*) ++ i[34567]86-*-linux* | x86_64-*-linux*) + ;; ++ i[34567]86-*-kfreebsd*-gnu | x86_64-*-kfreebsd*-gnu) ++ tmake_file="${tmake_file} i386/t-linux i386/t-kfreebsd" ++ ;; ++ i[34567]86-*-gnu*) ++ tmake_file="${tmake_file} i386/t-linux i386/t-gnu" ++ ;; + i[34567]86-*-solaris2* | x86_64-*-solaris2.1[0-9]*) + ;; + i[34567]86-*-cygwin* | i[34567]86-*-mingw* | x86_64-*-mingw*) +--- a/src/gcc/Makefile.in (revision 182390) ++++ b/src/gcc/Makefile.in (working copy) +@@ -352,6 +352,17 @@ enable_plugin = @enable_plugin@ ++# Multiarch support ++enable_multiarch = @enable_multiarch@ +with_float = @with_float@ ++ifeq ($(enable_multiarch),yes) ++ if_multiarch = $(1) ++else ifeq ($(enable_multiarch),auto-detect) ++ if_multiarch = $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib/*/crti.o),$(1)) ++else ++ if_multiarch = ++endif + CPPLIB = ../libcpp/libcpp.a CPPINC = -I$(srcdir)/../libcpp/include -@@ -1943,10 +1945,11 @@ +@@ -1832,10 +1843,11 @@ "$(MULTILIB_EXTRA_OPTS)" \ "$(MULTILIB_EXCLUSIONS)" \ "$(MULTILIB_OSDIRNAMES)" \ @@ -387,250 +435,123 @@ Index: b/src/gcc/Makefile.in > tmp-mlib.h; \ fi $(SHELL) $(srcdir)/../move-if-change tmp-mlib.h multilib.h -Index: b/src/gcc/config/alpha/t-linux -=================================================================== ---- a/src/gcc/config/alpha/t-linux -+++ b/src/gcc/config/alpha/t-linux -@@ -1 +1,3 @@ - SHLIB_MAPFILES += $(srcdir)/config/alpha/libgcc-alpha-ldbl.ver -+ -+MULTIARCH_DIRNAME = alpha-linux-gnu -Index: b/src/gcc/config/s390/t-linux64 -=================================================================== ---- a/src/gcc/config/s390/t-linux64 -+++ b/src/gcc/config/s390/t-linux64 -@@ -7,4 +7,4 @@ +--- a/src/gcc/config/alpha/t-linux (revision 0) ++++ b/src/gcc/config/alpha/t-linux (revision 0) +@@ -0,0 +1 @@ ++MULTIARCH_DIRNAME = $(call if_multiarch,alpha-linux-gnu) +--- a/src/gcc/config/s390/t-linux64 (revision 182390) ++++ b/src/gcc/config/s390/t-linux64 (working copy) +@@ -7,4 +7,5 @@ MULTILIB_OPTIONS = m64/m31 MULTILIB_DIRNAMES = 64 32 -MULTILIB_OSDIRNAMES = ../lib64 $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib) -+MULTILIB_OSDIRNAMES = ../lib64:s390x-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):s390-linux-gnu -Index: b/src/gcc/config/sparc/t-linux64 -=================================================================== ---- a/src/gcc/config/sparc/t-linux64 -+++ b/src/gcc/config/sparc/t-linux64 -@@ -26,7 +26,7 @@ ++MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:s390x-linux-gnu) ++MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:s390-linux-gnu) +--- a/src/gcc/config/sparc/t-linux64 (revision 182390) ++++ b/src/gcc/config/sparc/t-linux64 (working copy) +@@ -26,4 +26,5 @@ MULTILIB_OPTIONS = m64/m32 MULTILIB_DIRNAMES = 64 32 -MULTILIB_OSDIRNAMES = ../lib64 $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib) -+MULTILIB_OSDIRNAMES = ../lib64:sparc64-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):sparc-linux-gnu - - LIBGCC = stmp-multilib - INSTALL_LIBGCC = install-multilib -Index: b/src/gcc/config/sparc/t-linux -=================================================================== ---- a/src/gcc/config/sparc/t-linux -+++ b/src/gcc/config/sparc/t-linux -@@ -3,3 +3,5 @@ - # Avoid the t-linux version file. - SHLIB_MAPFILES = $(srcdir)/libgcc-std.ver \ - $(srcdir)/config/sparc/libgcc-sparc-glibc.ver -+ -+MULTIARCH_DIRNAME = sparc-linux-gnu -Index: b/src/gcc/config/i386/t-linux -=================================================================== ---- a/src/gcc/config/i386/t-linux -+++ b/src/gcc/config/i386/t-linux -@@ -3,3 +3,5 @@ - # t-slibgcc-elf-ver and t-linux - SHLIB_MAPFILES = $(srcdir)/libgcc-std.ver \ - $(srcdir)/config/i386/libgcc-glibc.ver -+ -+MULTIARCH_DIRNAME = i386-linux-gnu -Index: b/src/gcc/config/i386/t-linux64 -=================================================================== ---- a/src/gcc/config/i386/t-linux64 -+++ b/src/gcc/config/i386/t-linux64 -@@ -25,7 +25,11 @@ - - MULTILIB_OPTIONS = m64/m32 - MULTILIB_DIRNAMES = 64 32 --MULTILIB_OSDIRNAMES = ../lib64 $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib) -+MULTILIB_OSDIRNAMES = ../lib64:x86_64-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):i386-linux-gnu -+ -+ifneq (,$(findstring kfreebsd, $(target))) -+ MULTILIB_OSDIRNAMES := $(subst linux,kfreebsd,$(MULTILIB_OSDIRNAMES)) -+endif - - LIBGCC = stmp-multilib - INSTALL_LIBGCC = install-multilib -Index: b/src/gcc/config/ia64/t-glibc -=================================================================== ---- a/src/gcc/config/ia64/t-glibc -+++ b/src/gcc/config/ia64/t-glibc -@@ -3,3 +3,7 @@ - $(srcdir)/unwind-compat.c - - SHLIB_MAPFILES += $(srcdir)/config/ia64/libgcc-glibc.ver ++MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:sparc64-linux-gnu) ++MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:sparc-linux-gnu) +--- a/src/gcc/config/sparc/t-linux (revision 0) ++++ b/src/gcc/config/sparc/t-linux (revision 0) +@@ -0,0 +1 @@ ++MULTIARCH_DIRNAME = $(call if_multiarch,sparc-linux-gnu) +--- a/src/gcc/config/i386/t-kfreebsd (revision 0) ++++ b/src/gcc/config/i386/t-kfreebsd (revision 0) +@@ -0,0 +1,5 @@ ++MULTIARCH_DIRNAME = $(call if_multiarch,i386-kfreebsd-gnu) + ++# MULTILIB_OSDIRNAMES are set in t-linux64. ++KFREEBSD_OS = $(filter kfreebsd%, $(word 3, $(subst -, ,$(target)))) ++MULTILIB_OSDIRNAMES := $(subst linux,$(KFREEBSD_OS),$(MULTILIB_OSDIRNAMES)) +--- a/src/gcc/config/i386/t-gnu (revision 0) ++++ b/src/gcc/config/i386/t-gnu (revision 0) +@@ -0,0 +1 @@ ++MULTIARCH_DIRNAME = $(call if_multiarch,i386-gnu) +--- a/src/gcc/config/i386/t-linux (revision 0) ++++ b/src/gcc/config/i386/t-linux (revision 0) +@@ -0,0 +1 @@ ++MULTIARCH_DIRNAME = $(call if_multiarch,i386-linux-gnu) +--- a/src/gcc/config/i386/t-linux64 (revision 182390) ++++ b/src/gcc/config/i386/t-linux64 (working copy) +@@ -34,6 +34,6 @@ + comma=, + MULTILIB_OPTIONS = $(subst $(comma),/,$(TM_MULTILIB_CONFIG)) + MULTILIB_DIRNAMES = $(patsubst m%, %, $(subst /, ,$(MULTILIB_OPTIONS))) +-MULTILIB_OSDIRNAMES = m64=../lib64 +-MULTILIB_OSDIRNAMES+= m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib) ++MULTILIB_OSDIRNAMES = m64=../lib64$(call if_multiarch,:x86_64-linux-gnu) ++MULTILIB_OSDIRNAMES+= m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:i386-linux-gnu) + MULTILIB_OSDIRNAMES+= mx32=../libx32 +--- a/src/gcc/config/ia64/t-glibc (revision 0) ++++ b/src/gcc/config/ia64/t-glibc (revision 0) +@@ -0,0 +1,3 @@ +ifneq (,$(findstring linux, $(target))) -+MULTIARCH_DIRNAME = ia64-linux-gnu ++MULTIARCH_DIRNAME = $(call if_multiarch,ia64-linux-gnu) +endif -Index: b/src/gcc/config/m68k/t-linux -=================================================================== ---- a/src/gcc/config/m68k/t-linux -+++ b/src/gcc/config/m68k/t-linux -@@ -21,6 +21,9 @@ - # Only include multilibs for 680x0 CPUs with an MMU. - M68K_MLIB_CPU += && (CPU ~ "^m680") && (FLAGS ~ "FL_MMU") +--- a/src/gcc/config/m68k/t-linux (revision 182390) ++++ b/src/gcc/config/m68k/t-linux (working copy) +@@ -19,6 +19,8 @@ + # Only include multilibs for 680x0 and ColdFire CPUs with an MMU. + M68K_MLIB_CPU += && ((CPU ~ "^m680") || (CPU ~ "^mcf")) && (FLAGS ~ "FL_MMU") -+MULTILIB_OSDIRNAMES = m68k-linux-gnu:m68k-linux-gnu -+MULTIARCH_DIRNAME = m68k-linux-gnu ++MULTIARCH_DIRNAME = $(call if_multiarch,m68k-linux-gnu) + # This rule uses MULTILIB_MATCHES to generate a definition of # SYSROOT_SUFFIX_SPEC. sysroot-suffix.h: $(srcdir)/config/m68k/print-sysroot-suffix.sh -Index: b/src/gcc/config/rs6000/t-linux64 -=================================================================== ---- a/src/gcc/config/rs6000/t-linux64 -+++ b/src/gcc/config/rs6000/t-linux64 -@@ -36,7 +36,7 @@ +--- a/src/gcc/config/rs6000/t-spe (revision 182390) ++++ b/src/gcc/config/rs6000/t-spe (working copy) +@@ -71,3 +71,6 @@ + mabi=altivec/mlittle \ + maltivec/mlittle \ + maltivec/mabi=altivec/mlittle ++ ++MULTIARCH_DIRNAME = powerpc-linux-gnuspe$(if $(findstring rs6000/e500-double.h, $(tm_file)),,v1) ++ +--- a/src/gcc/config/rs6000/t-linux64 (revision 182390) ++++ b/src/gcc/config/rs6000/t-linux64 (working copy) +@@ -31,5 +31,7 @@ MULTILIB_EXTRA_OPTS = fPIC mstrict-align MULTILIB_EXCEPTIONS = m64/msoft-float MULTILIB_EXCLUSIONS = m64/!m32/msoft-float -MULTILIB_OSDIRNAMES = ../lib64 $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib) nof -+MULTILIB_OSDIRNAMES = ../lib64:powerpc64-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):powerpc-linux-gnu nof ++MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:powerpc64-linux-gnu) ++MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:powerpc-linux-gnu) ++MULTILIB_OSDIRNAMES += nof MULTILIB_MATCHES = $(MULTILIB_MATCHES_FLOAT) - - softfp_wrap_start := '\#ifndef __powerpc64__' -Index: b/src/gcc/config/pa/t-linux -=================================================================== ---- a/src/gcc/config/pa/t-linux -+++ b/src/gcc/config/pa/t-linux -@@ -35,3 +35,5 @@ - - # Compile crtbeginS.o and crtendS.o as PIC. - CRTSTUFF_T_CFLAGS_S = -fPIC +--- a/src/gcc/config/rs6000/t-linux (revision 0) ++++ b/src/gcc/config/rs6000/t-linux (revision 0) +@@ -0,0 +1 @@ ++MULTIARCH_DIRNAME = powerpc-linux-gnu +--- a/src/gcc/config/arm/t-linux-eabi (revision 182390) ++++ b/src/gcc/config/arm/t-linux-eabi (working copy) +@@ -24,3 +24,6 @@ + #MULTILIB_OPTIONS += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te + #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te + #MULTILIB_EXCEPTIONS += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te* + -+MULTIARCH_DIRNAME = hppa-linux-gnu -Index: b/src/gcc/config/mips/t-linux64 -=================================================================== ---- a/src/gcc/config/mips/t-linux64 -+++ b/src/gcc/config/mips/t-linux64 -@@ -18,7 +18,11 @@ ++ARM_EB = $(if $(findstring TARGET_BIG_ENDIAN_DEFAULT=1, $(tm_defines)),eb) ++MULTIARCH_DIRNAME = $(call if_multiarch,arm$(ARM_EB)-linux-gnueabi$(if $(filter hard,$(with_float)),hf)) +--- a/src/gcc/config/pa/t-linux (revision 0) ++++ b/src/gcc/config/pa/t-linux (revision 0) +@@ -0,0 +1 @@ ++MULTIARCH_DIRNAME = $(call if_multiarch,hppa-linux-gnu) +--- a/src/gcc/config/mips/t-linux64 (revision 182390) ++++ b/src/gcc/config/mips/t-linux64 (working copy) +@@ -18,4 +18,9 @@ MULTILIB_OPTIONS = mabi=n32/mabi=32/mabi=64 MULTILIB_DIRNAMES = n32 32 64 -MULTILIB_OSDIRNAMES = ../lib32 ../lib ../lib64 +MIPS_EL = $(if $(filter %el, $(firstword $(subst -, ,$(target)))),el) ++MIPS_SOFT = $(if $(filter MASK_SOFT_FLOAT_ABI, $(target_cpu_default)),soft) +MULTILIB_OSDIRNAMES = \ -+ ../lib32:mips64$(MIPS_EL)-linux-gnuabin32 \ -+ ../lib:mips$(MIPS_EL)-linux-gnu \ -+ ../lib64:mips64$(MIPS_EL)-linux-gnuabi64 - - EXTRA_MULTILIB_PARTS=crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o - -Index: b/src/gcc/config.gcc -=================================================================== ---- a/src/gcc/config.gcc -+++ b/src/gcc/config.gcc -@@ -2180,6 +2180,7 @@ - ;; - *) - tm_file="${tm_file} rs6000/linux.h glibc-stdint.h" -+ tmake_file="$tmake_file rs6000/t-linux" - ;; - esac - tmake_file="${tmake_file} t-slibgcc-libgcc rs6000/t-fprules-softfp soft-fp/t-softfp" -@@ -2311,6 +2312,8 @@ - tm_file="s390/s390.h dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h s390/linux.h" - if test x$enable_targets = xall; then - tmake_file="${tmake_file} s390/t-linux64" -+ else -+ tmake_file="${tmake_file} s390/t-linux" - fi - ;; - s390x-*-linux*) -@@ -3674,6 +3677,14 @@ - i[34567]86-*-kfreebsd*-gnu | x86_64-*-kfreebsd*-gnu | \ - i[34567]86-*-gnu*) - tmake_file="${tmake_file} i386/t-fprules-softfp soft-fp/t-softfp i386/t-linux" -+ case ${target} in -+ i[34567]86-*-linux* | x86_64-*-linux*) -+ ;; -+ i[34567]86-*-kfreebsd*-gnu | x86_64-*-kfreebsd*-gnu) -+ tmake_file="${tmake_file} i386/t-kfreebsd";; -+ i[34567]86-*-gnu*) -+ tmake_file="${tmake_file} i386/t-gnu";; -+ esac - ;; - i[34567]86-*-solaris2*) - tmake_file="${tmake_file} i386/t-fprules-softfp soft-fp/t-softfp" -Index: b/src/gcc/config/i386/t-gnu -=================================================================== ---- /dev/null -+++ b/src/gcc/config/i386/t-gnu -@@ -0,0 +1 @@ -+MULTIARCH_DIRNAME = i386-gnu -Index: b/src/gcc/config/i386/t-kfreebsd -=================================================================== ---- /dev/null -+++ b/src/gcc/config/i386/t-kfreebsd -@@ -0,0 +1 @@ -+MULTIARCH_DIRNAME = i386-kfreebsd-gnu -Index: b/src/gcc/config/arm/t-linux-eabi -=================================================================== ---- a/src/gcc/config/arm/t-linux-eabi -+++ b/src/gcc/config/arm/t-linux-eabi -@@ -42,6 +42,8 @@ - #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te - #MULTILIB_EXCEPTIONS += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te* - -+MULTIARCH_DIRNAME = arm-linux-gnueabi$(if $(filter hard,$(with_float)),hf) -+ - # Use a version of div0 which raises SIGFPE, and a special __clear_cache. - LIB1ASMFUNCS := $(filter-out _dvmd_tls,$(LIB1ASMFUNCS)) _dvmd_lnx _clear_cache - -Index: b/src/gcc/config/sh/t-linux -=================================================================== ---- a/src/gcc/config/sh/t-linux -+++ b/src/gcc/config/sh/t-linux -@@ -6,3 +6,5 @@ - MULTILIB_MATCHES = - - EXTRA_MULTILIB_PARTS= crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o -+ -+MULTILIB_OSDIRNAMES = sh4-linux-gnu:sh4-linux-gnu sh4_nofpu-linux-gnu:sh4-linux-gnu -Index: b/src/gcc/configure.ac -=================================================================== ---- a/src/gcc/configure.ac -+++ b/src/gcc/configure.ac -@@ -606,6 +606,9 @@ - [], [enable_multilib=yes]) - AC_SUBST(enable_multilib) - -+# needed for ARM multiarch name -+AC_SUBST(with_float) -+ - # Enable __cxa_atexit for C++. - AC_ARG_ENABLE(__cxa_atexit, - [ --enable-__cxa_atexit enable __cxa_atexit for C++], -Index: b/src/gcc/config/rs6000/t-linux -=================================================================== ---- /dev/null -+++ b/src/gcc/config/rs6000/t-linux -@@ -0,0 +1 @@ -+MULTIARCH_DIRNAME = powerpc-linux-gnu -Index: b/src/gcc/config/s390/t-linux -=================================================================== ---- /dev/null -+++ b/src/gcc/config/s390/t-linux -@@ -0,0 +1 @@ -+MULTIARCH_DIRNAME = s390-linux-gnu ---- a/src/gcc/config.gcc -+++ b/src/gcc/config.gcc -@@ -2188,7 +2188,8 @@ - powerpc*-*-linux*altivec*) - tm_file="${tm_file} rs6000/linuxaltivec.h" ;; - powerpc*-*-linux*spe*) -- tm_file="${tm_file} rs6000/linuxspe.h rs6000/e500.h" ;; -+ tm_file="${tm_file} rs6000/linuxspe.h rs6000/e500.h" -+ tmake_file="${tmake_file} rs6000/t-linux-spe" ;; - powerpc*-*-linux*paired*) - tm_file="${tm_file} rs6000/750cl.h" ;; - esac ---- a/src/gcc/config/rs6000/t-linux-spe -+++ b/src/gcc/config/rs6000/t-linux-spe -@@ -0,0 +1 @@ -+MULTIARCH_DIRNAME = powerpc-linux-gnuspe ++ ../lib32$(call if_multiarch,:mips64$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT)) \ ++ ../lib$(call if_multiarch,:mips$(MIPS_EL)-linux-gnu$(MIPS_SOFT)) \ ++ ../lib64$(call if_multiarch,:mips64$(MIPS_EL)-linux-gnuabi64$(MIPS_SOFT)) diff --git a/debian/patches/gcc-multilib64-multiarch-trunk.diff b/debian/patches/gcc-multilib64-multiarch-trunk.diff deleted file mode 100644 index 88d9ac0..0000000 --- a/debian/patches/gcc-multilib64-multiarch-trunk.diff +++ /dev/null @@ -1,44 +0,0 @@ -# DP: Use lib instead of lib64 as the 64bit system dir on biarch -# DP: architectures defaulting to 64bit. - ---- a/src/gcc/config/s390/t-linux64 -+++ b/src/gcc/config/s390/t-linux64 -@@ -7,5 +7,5 @@ - - MULTILIB_OPTIONS = m64/m31 - MULTILIB_DIRNAMES = 64 32 --MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:s390x-linux-gnu) -+MULTILIB_OSDIRNAMES = ../lib$(call if_multiarch,:s390x-linux-gnu) - MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:s390-linux-gnu) ---- a/src/gcc/config/rs6000/t-linux64 -+++ b/src/gcc/config/rs6000/t-linux64 -@@ -33,6 +33,6 @@ - MULTILIB_EXTRA_OPTS = fPIC mstrict-align - MULTILIB_EXCEPTIONS = - MULTILIB_EXCLUSIONS = --MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:powerpc64-linux-gnu) -+MULTILIB_OSDIRNAMES = ../lib$(call if_multiarch,:powerpc64-linux-gnu) - MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:powerpc-linux-gnu) - MULTILIB_MATCHES = ---- a/src/gcc/config/sparc/t-linux64 -+++ b/src/gcc/config/sparc/t-linux64 -@@ -26,7 +26,7 @@ - - MULTILIB_OPTIONS = m64/m32 - MULTILIB_DIRNAMES = 64 32 --MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:sparc64-linux-gnu) -+MULTILIB_OSDIRNAMES = ../lib$(call if_multiarch,:sparc64-linux-gnu) - MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:sparc-linux-gnu) - - LIBGCC = stmp-multilib ---- a/src/gcc/config/i386/t-linux64 -+++ b/src/gcc/config/i386/t-linux64 -@@ -34,7 +34,7 @@ - comma=, - MULTILIB_OPTIONS = $(subst $(comma),/,$(TM_MULTILIB_CONFIG)) - MULTILIB_DIRNAMES = $(patsubst m%, %, $(subst /, ,$(MULTILIB_OPTIONS))) --MULTILIB_OSDIRNAMES = m64=../lib64$(call if_multiarch,:x86_64-linux-gnu) -+MULTILIB_OSDIRNAMES = m64=../lib$(call if_multiarch,:x86_64-linux-gnu) - MULTILIB_OSDIRNAMES+= m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:i386-linux-gnu) - MULTILIB_OSDIRNAMES+= mx32=../libx32 - diff --git a/debian/patches/gcc-multilib64-multiarch.diff b/debian/patches/gcc-multilib64-multiarch.diff index dfe9f1a..88d9ac0 100644 --- a/debian/patches/gcc-multilib64-multiarch.diff +++ b/debian/patches/gcc-multilib64-multiarch.diff @@ -1,52 +1,44 @@ # DP: Use lib instead of lib64 as the 64bit system dir on biarch # DP: architectures defaulting to 64bit. -Index: gcc-4.6-4.6.1/src/gcc/config/s390/t-linux64 -=================================================================== ---- gcc-4.6-4.6.1.orig/src/gcc/config/s390/t-linux64 2011-08-20 16:05:05.000000000 +0000 -+++ gcc-4.6-4.6.1/src/gcc/config/s390/t-linux64 2011-08-20 16:08:42.440221785 +0000 -@@ -7,4 +7,4 @@ +--- a/src/gcc/config/s390/t-linux64 ++++ b/src/gcc/config/s390/t-linux64 +@@ -7,5 +7,5 @@ MULTILIB_OPTIONS = m64/m31 MULTILIB_DIRNAMES = 64 32 --MULTILIB_OSDIRNAMES = ../lib64:s390x-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):s390-linux-gnu -+MULTILIB_OSDIRNAMES = ../lib:s390x-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):s390-linux-gnu -Index: gcc-4.6-4.6.1/src/gcc/config/rs6000/t-linux64 -=================================================================== ---- gcc-4.6-4.6.1.orig/src/gcc/config/rs6000/t-linux64 2011-08-20 16:08:08.000000000 +0000 -+++ gcc-4.6-4.6.1/src/gcc/config/rs6000/t-linux64 2011-08-20 16:09:43.770311733 +0000 -@@ -34,7 +34,7 @@ - MULTILIB_OPTIONS = m64/m32 - MULTILIB_DIRNAMES = 64 32 +-MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:s390x-linux-gnu) ++MULTILIB_OSDIRNAMES = ../lib$(call if_multiarch,:s390x-linux-gnu) + MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:s390-linux-gnu) +--- a/src/gcc/config/rs6000/t-linux64 ++++ b/src/gcc/config/rs6000/t-linux64 +@@ -33,6 +33,6 @@ MULTILIB_EXTRA_OPTS = fPIC mstrict-align --MULTILIB_OSDIRNAMES = ../lib64:powerpc64-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):powerpc-linux-gnu -+MULTILIB_OSDIRNAMES = ../lib:powerpc64-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):powerpc-linux-gnu - - softfp_wrap_start := '\#ifndef __powerpc64__' - softfp_wrap_end := '\#endif' -Index: gcc-4.6-4.6.1/src/gcc/config/sparc/t-linux64 -=================================================================== ---- gcc-4.6-4.6.1.orig/src/gcc/config/sparc/t-linux64 2011-08-20 16:05:05.000000000 +0000 -+++ gcc-4.6-4.6.1/src/gcc/config/sparc/t-linux64 2011-08-20 16:08:42.440221785 +0000 + MULTILIB_EXCEPTIONS = + MULTILIB_EXCLUSIONS = +-MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:powerpc64-linux-gnu) ++MULTILIB_OSDIRNAMES = ../lib$(call if_multiarch,:powerpc64-linux-gnu) + MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:powerpc-linux-gnu) + MULTILIB_MATCHES = +--- a/src/gcc/config/sparc/t-linux64 ++++ b/src/gcc/config/sparc/t-linux64 @@ -26,7 +26,7 @@ MULTILIB_OPTIONS = m64/m32 MULTILIB_DIRNAMES = 64 32 --MULTILIB_OSDIRNAMES = ../lib64:sparc64-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):sparc-linux-gnu -+MULTILIB_OSDIRNAMES = ../lib:sparc64-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):sparc-linux-gnu +-MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:sparc64-linux-gnu) ++MULTILIB_OSDIRNAMES = ../lib$(call if_multiarch,:sparc64-linux-gnu) + MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:sparc-linux-gnu) LIBGCC = stmp-multilib - INSTALL_LIBGCC = install-multilib -Index: gcc-4.6-4.6.1/src/gcc/config/i386/t-linux64 -=================================================================== ---- gcc-4.6-4.6.1.orig/src/gcc/config/i386/t-linux64 2011-08-20 16:06:59.000000000 +0000 -+++ gcc-4.6-4.6.1/src/gcc/config/i386/t-linux64 2011-08-20 16:08:42.440221785 +0000 -@@ -25,7 +25,7 @@ - - MULTILIB_OPTIONS = m64/m32 - MULTILIB_DIRNAMES = 64 32 --MULTILIB_OSDIRNAMES = ../lib64:x86_64-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):i386-linux-gnu -+MULTILIB_OSDIRNAMES = ../lib:x86_64-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):i386-linux-gnu +--- a/src/gcc/config/i386/t-linux64 ++++ b/src/gcc/config/i386/t-linux64 +@@ -34,7 +34,7 @@ + comma=, + MULTILIB_OPTIONS = $(subst $(comma),/,$(TM_MULTILIB_CONFIG)) + MULTILIB_DIRNAMES = $(patsubst m%, %, $(subst /, ,$(MULTILIB_OPTIONS))) +-MULTILIB_OSDIRNAMES = m64=../lib64$(call if_multiarch,:x86_64-linux-gnu) ++MULTILIB_OSDIRNAMES = m64=../lib$(call if_multiarch,:x86_64-linux-gnu) + MULTILIB_OSDIRNAMES+= m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:i386-linux-gnu) + MULTILIB_OSDIRNAMES+= mx32=../libx32 - ifneq (,$(findstring kfreebsd, $(target))) - MULTILIB_OSDIRNAMES := $(subst linux,kfreebsd,$(MULTILIB_OSDIRNAMES)) diff --git a/debian/patches/gcc-powerpc-nof-trunk.diff b/debian/patches/gcc-powerpc-nof-trunk.diff deleted file mode 100644 index 3696085..0000000 --- a/debian/patches/gcc-powerpc-nof-trunk.diff +++ /dev/null @@ -1,22 +0,0 @@ -# DP: Don't build nof multlib on powerpc. - ---- a/src/gcc/config/rs6000/t-linux64 -+++ b/src/gcc/config/rs6000/t-linux64 -@@ -28,12 +28,11 @@ - # it doesn't tell anything about the 32bit libraries on those systems. Set - # MULTILIB_OSDIRNAMES according to what is found on the target. - --MULTILIB_OPTIONS = m64/m32 msoft-float --MULTILIB_DIRNAMES = 64 32 nof -+MULTILIB_OPTIONS = m64/m32 -+MULTILIB_DIRNAMES = 64 32 - MULTILIB_EXTRA_OPTS = fPIC mstrict-align --MULTILIB_EXCEPTIONS = m64/msoft-float --MULTILIB_EXCLUSIONS = m64/!m32/msoft-float -+MULTILIB_EXCEPTIONS = -+MULTILIB_EXCLUSIONS = - MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:powerpc64-linux-gnu) - MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:powerpc-linux-gnu) --MULTILIB_OSDIRNAMES += nof --MULTILIB_MATCHES = $(MULTILIB_MATCHES_FLOAT) -+MULTILIB_MATCHES = diff --git a/debian/patches/gcc-powerpc-nof.diff b/debian/patches/gcc-powerpc-nof.diff index 437671b..3696085 100644 --- a/debian/patches/gcc-powerpc-nof.diff +++ b/debian/patches/gcc-powerpc-nof.diff @@ -1,10 +1,8 @@ # DP: Don't build nof multlib on powerpc. -Index: gcc-4.6-4.6.1/src/gcc/config/rs6000/t-linux64 -=================================================================== ---- gcc-4.6-4.6.1.orig/src/gcc/config/rs6000/t-linux64 2011-08-20 16:05:05.000000000 +0000 -+++ gcc-4.6-4.6.1/src/gcc/config/rs6000/t-linux64 2011-08-20 16:08:08.900172593 +0000 -@@ -31,13 +31,10 @@ +--- a/src/gcc/config/rs6000/t-linux64 ++++ b/src/gcc/config/rs6000/t-linux64 +@@ -28,12 +28,11 @@ # it doesn't tell anything about the 32bit libraries on those systems. Set # MULTILIB_OSDIRNAMES according to what is found on the target. @@ -15,9 +13,10 @@ Index: gcc-4.6-4.6.1/src/gcc/config/rs6000/t-linux64 MULTILIB_EXTRA_OPTS = fPIC mstrict-align -MULTILIB_EXCEPTIONS = m64/msoft-float -MULTILIB_EXCLUSIONS = m64/!m32/msoft-float --MULTILIB_OSDIRNAMES = ../lib64:powerpc64-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):powerpc-linux-gnu nof ++MULTILIB_EXCEPTIONS = ++MULTILIB_EXCLUSIONS = + MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:powerpc64-linux-gnu) + MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:powerpc-linux-gnu) +-MULTILIB_OSDIRNAMES += nof -MULTILIB_MATCHES = $(MULTILIB_MATCHES_FLOAT) -+MULTILIB_OSDIRNAMES = ../lib64:powerpc64-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):powerpc-linux-gnu - - softfp_wrap_start := '\#ifndef __powerpc64__' - softfp_wrap_end := '\#endif' ++MULTILIB_MATCHES = diff --git a/debian/patches/gcc-textdomain.diff b/debian/patches/gcc-textdomain.diff index f42d6fb..ec8d32f 100644 --- a/debian/patches/gcc-textdomain.diff +++ b/debian/patches/gcc-textdomain.diff @@ -1,5 +1,7 @@ # DP: Set gettext's domain and textdomain to the versioned package name. +Index: b/src/gcc/intl.c +=================================================================== --- a/src/gcc/intl.c +++ b/src/gcc/intl.c @@ -56,8 +56,8 @@ @@ -8,27 +10,31 @@ - (void) bindtextdomain ("gcc", LOCALEDIR); - (void) textdomain ("gcc"); -+ (void) bindtextdomain ("gcc-4.6", LOCALEDIR); -+ (void) textdomain ("gcc-4.6"); ++ (void) bindtextdomain ("gcc-4.7", LOCALEDIR); ++ (void) textdomain ("gcc-4.7"); /* Opening quotation mark. */ open_quote = _("`"); +Index: b/src/gcc/Makefile.in +=================================================================== --- a/src/gcc/Makefile.in +++ b/src/gcc/Makefile.in -@@ -5216,8 +5216,8 @@ +@@ -5228,8 +5228,8 @@ dir=$(localedir)/$$lang/LC_MESSAGES; \ echo $(mkinstalldirs) $(DESTDIR)$$dir; \ $(mkinstalldirs) $(DESTDIR)$$dir || exit 1; \ - echo $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/gcc.mo; \ - $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/gcc.mo; \ -+ echo $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/gcc-4.6.mo; \ -+ $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/gcc-4.6.mo; \ ++ echo $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/gcc-4.7.mo; \ ++ $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/gcc-4.7.mo; \ done # Rule for regenerating the message template (gcc.pot). +Index: b/src/libcpp/init.c +=================================================================== --- a/src/libcpp/init.c +++ b/src/libcpp/init.c -@@ -135,7 +135,7 @@ +@@ -142,7 +142,7 @@ init_trigraph_map (); #ifdef ENABLE_NLS @@ -37,9 +43,11 @@ #endif } } +Index: b/src/libcpp/system.h +=================================================================== --- a/src/libcpp/system.h +++ b/src/libcpp/system.h -@@ -265,7 +265,7 @@ +@@ -273,7 +273,7 @@ #endif #ifndef _ @@ -48,30 +56,33 @@ #endif #ifndef N_ +Index: b/src/libcpp/Makefile.in +=================================================================== --- a/src/libcpp/Makefile.in +++ b/src/libcpp/Makefile.in @@ -49,6 +49,7 @@ LIBICONV = @LIBICONV@ LIBINTL = @LIBINTL@ PACKAGE = @PACKAGE@ -+PACKAGE_SUFFIX = -4.6 ++PACKAGE_SUFFIX = -4.7 RANLIB = @RANLIB@ SHELL = @SHELL@ USED_CATALOGS = @USED_CATALOGS@ -@@ -70,9 +71,10 @@ +@@ -71,10 +72,11 @@ INCLUDES = -I$(srcdir) -I. -I$(srcdir)/../include @INCINTL@ \ -I$(srcdir)/include +DEBCPPFLAGS += -DPACKAGE_SUFFIX=\"$(strip $(PACKAGE_SUFFIX))\" -ALL_CFLAGS = $(CFLAGS) $(WARN_CFLAGS) $(INCLUDES) $(CPPFLAGS) --ALL_CXXFLAGS = $(CXXFLAGS) $(WARN_CXXFLAGS) $(INCLUDES) $(CPPFLAGS) +ALL_CFLAGS = $(CFLAGS) $(WARN_CFLAGS) $(INCLUDES) $(CPPFLAGS) $(DEBCPPFLAGS) -+ALL_CXXFLAGS = $(CXXFLAGS) $(WARN_CXXFLAGS) $(INCLUDES) $(CPPFLAGS) $(DEBCPPFLAGS) + ALL_CXXFLAGS = $(CXXFLAGS) $(WARN_CXXFLAGS) $(NOEXCEPTION_FLAGS) $(INCLUDES) \ +- $(CPPFLAGS) ++ $(CPPFLAGS) $(DEBCPPFLAGS) # The name of the compiler to use. ENABLE_BUILD_WITH_CXX = @ENABLE_BUILD_WITH_CXX@ -@@ -168,8 +170,8 @@ +@@ -170,8 +172,8 @@ else continue; \ fi; \ dir=$(localedir)/$$lang/LC_MESSAGES; \ diff --git a/debian/patches/gccgo-version.diff b/debian/patches/gccgo-version.diff index 0285cc6..2b8433c 100644 --- a/debian/patches/gccgo-version.diff +++ b/debian/patches/gccgo-version.diff @@ -1,27 +1,25 @@ # DP: Omit the subminor number from the go libdir +Index: b/src/gcc/go/Make-lang.in +=================================================================== --- a/src/gcc/go/Make-lang.in +++ b/src/gcc/go/Make-lang.in -@@ -223,13 +223,15 @@ - go/go-backend.o: go/go-backend.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ - $(TM_H) $(RTL_H) $(TREE_H) $(TM_P_H) $(TARGET_H) +@@ -234,7 +234,9 @@ + $(TM_H) $(RTL_H) $(TREE_H) $(TM_P_H) output.h $(TARGET_H) \ + $(COMMON_TARGET_H) +-CFLAGS-go/go-lang.o += -DDEFAULT_TARGET_VERSION=\"$(version)\" \ +short_version := $(shell echo $(version) | sed -r 's/([0-9]+\.[0-9]+).*/\1/') + ++CFLAGS-go/go-lang.o += -DDEFAULT_TARGET_VERSION=\"$(short_version)\" \ + -DDEFAULT_TARGET_MACHINE=\"$(target_noncanonical)\" go/go-lang.o: go/go-lang.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(OPTS_H) \ $(TREE_H) $(GIMPLE_H) $(GGC_H) $(TOPLEV_H) debug.h options.h \ - $(FLAGS_H) convert.h $(DIAGNOSTIC_H) langhooks.h \ - $(LANGHOOKS_DEF_H) $(EXCEPT_H) $(TARGET_H) $(GO_C_H) \ - gt-go-go-lang.h gtype-go.h - $(COMPILER) $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) \ -- -DDEFAULT_TARGET_VERSION=\"$(version)\" \ -+ -DDEFAULT_TARGET_VERSION=\"$(short_version)\" \ - -DDEFAULT_TARGET_MACHINE=\"$(target_noncanonical)\" \ - -c $< $(OUTPUT_OPTION) - +Index: b/src/libgo/Makefile.in +=================================================================== --- a/src/libgo/Makefile.in +++ b/src/libgo/Makefile.in -@@ -471,7 +471,7 @@ +@@ -496,7 +496,7 @@ SUFFIXES = .c .go .gox .o .obj .lo .a @LIBGO_IS_RTEMS_TRUE@subdirs = testsuite SUBDIRS = ${subdirs} @@ -30,15 +28,17 @@ MAINT_CHARSET = latin1 mkinstalldirs = $(SHELL) $(toplevel_srcdir)/mkinstalldirs PWD_COMMAND = $${PWDCMD-pwd} -@@ -541,7 +541,7 @@ +@@ -566,7 +566,7 @@ FLAGS_TO_PASS = $(AM_MAKEFLAGS) toolexeclib_LTLIBRARIES = libgo.la toolexeclib_LIBRARIES = libgobegin.a -toolexeclibgodir = $(toolexeclibdir)/go/$(gcc_version)/$(target_alias) +toolexeclibgodir = $(toolexeclibdir)/go/$(short_version) toolexeclibgo_DATA = \ - asn1.gox \ - big.gox \ + bufio.gox \ + bytes.gox \ +Index: b/src/libgo/Makefile.am +=================================================================== --- a/src/libgo/Makefile.am +++ b/src/libgo/Makefile.am @@ -15,7 +15,7 @@ @@ -58,4 +58,4 @@ +toolexeclibgodir = $(toolexeclibdir)/go/$(short_version) toolexeclibgo_DATA = \ - asn1.gox \ + bufio.gox \ diff --git a/debian/patches/ibm-branch.diff b/debian/patches/ibm-branch.diff index 34055ea..1b84a9e 100644 --- a/debian/patches/ibm-branch.diff +++ b/debian/patches/ibm-branch.diff @@ -1,2525 +1,6 @@ -# DP: updates from the ibm/4.6 branch upto 20110707 (r175989). +# DP: updates from the ibm/4.7 branch upto 2012xxxx (r175989). -svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_6-branch@175885 svn://gcc.gnu.org/svn/gcc/branches/ibm/gcc-4_6-branch \ +svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_7-branch@175885 svn://gcc.gnu.org/svn/gcc/branches/ibm/gcc-4_6-branch \ | sed -r 's,^--- (\S+)\t(\S+)(.*)$,--- a/src/\1\t\2,;s,^\+\+\+ (\S+)\t(\S+)(.*)$,+++ b/src/\1\t\2,' \ | awk '/^Index:.*\.(class|texi)/ {skip=1; next} /^Index:/ { skip=0 } skip==0' -Index: gcc/testsuite/gcc.target/powerpc/pr48053-3.c -=================================================================== ---- a/src/gcc/testsuite/gcc.target/powerpc/pr48053-3.c (.../gcc-4_6-branch) -+++ b/src/gcc/testsuite/gcc.target/powerpc/pr48053-3.c (.../ibm/gcc-4_6-branch) -@@ -0,0 +1,41 @@ -+/* { dg-do compile } */ -+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -+/* { dg-require-effective-target powerpc_vsx_ok } */ -+/* { dg-options "-O3 -mcpu=power7" } */ -+ -+/* Cut down example from s_scalbnl that aborted on 32-bit when the fix for -+ 48053 went in to allow creating DImode 0's in VSX registers. */ -+ -+typedef union -+{ -+ long double value; -+ struct -+ { -+ unsigned long long msw; -+ unsigned long long lsw; -+ } parts64; -+ struct -+ { -+ unsigned int w0, w1, w2, w3; -+ } parts32; -+} ieee854_long_double_shape_type; -+ -+static const long double twolm54 = 5.55111512312578270212e-17; -+ -+long double foo (long double x, int n) -+{ -+ long long k, hx, lx; -+ ieee854_long_double_shape_type qw_u; -+ -+ qw_u.value = x; -+ hx = qw_u.parts64.msw; -+ lx = qw_u.parts64.lsw; -+ -+ k = ((hx >> 52) & 0x7ff) + n + 54; -+ -+ qw_u.parts64.msw = ((hx & 0x800fffffffffffffULL) | (k << 52)); -+ qw_u.parts64.lsw = lx; -+ x = qw_u.value; -+ -+ return x*twolm54; -+} -Index: gcc/testsuite/gcc.target/powerpc/no-r11-1.c -=================================================================== ---- a/src/gcc/testsuite/gcc.target/powerpc/no-r11-1.c (.../gcc-4_6-branch) -+++ b/src/gcc/testsuite/gcc.target/powerpc/no-r11-1.c (.../ibm/gcc-4_6-branch) -@@ -0,0 +1,11 @@ -+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -+/* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */ -+/* { dg-options "-O2 -mno-r11" } */ -+ -+int -+call_ptr (int (func) (void)) -+{ -+ return func () + 1; -+} -+ -+/* { dg-final { scan-assembler-not "ld 11,16(3)" } } */ -Index: gcc/testsuite/gcc.target/powerpc/no-r11-2.c -=================================================================== ---- a/src/gcc/testsuite/gcc.target/powerpc/no-r11-2.c (.../gcc-4_6-branch) -+++ b/src/gcc/testsuite/gcc.target/powerpc/no-r11-2.c (.../ibm/gcc-4_6-branch) -@@ -0,0 +1,11 @@ -+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -+/* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */ -+/* { dg-options "-O2 -mr11" } */ -+ -+int -+call_ptr (int (func) (void)) -+{ -+ return func () + 1; -+} -+ -+/* { dg-final { scan-assembler "ld 11,16" } } */ -Index: gcc/testsuite/gcc.target/powerpc/no-r11-3.c -=================================================================== ---- a/src/gcc/testsuite/gcc.target/powerpc/no-r11-3.c (.../gcc-4_6-branch) -+++ b/src/gcc/testsuite/gcc.target/powerpc/no-r11-3.c (.../ibm/gcc-4_6-branch) -@@ -0,0 +1,20 @@ -+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -+/* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */ -+/* { dg-options "-O2 -mno-r11" } */ -+ -+extern void ext_call (int (func) (void)); -+ -+int -+outer_func (int init) /* { dg-error "-mno-r11 must not be used if you have trampolines" "" } */ -+{ -+ int value = init; -+ -+ int inner (void) -+ { -+ return ++value; -+ } -+ -+ ext_call (inner); -+ return value; -+} -+ -Index: gcc/testsuite/gcc.target/powerpc/ppc-switch-1.c -=================================================================== ---- a/src/gcc/testsuite/gcc.target/powerpc/ppc-switch-1.c (.../gcc-4_6-branch) -+++ b/src/gcc/testsuite/gcc.target/powerpc/ppc-switch-1.c (.../ibm/gcc-4_6-branch) -@@ -0,0 +1,26 @@ -+/* { dg-do compile { target { powerpc*-*-* } } } */ -+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -+/* { dg-options "-O2 --param case-values-threshold=2" } */ -+/* { dg-final { scan-assembler "mtctr" } } */ -+/* { dg-final { scan-assembler "bctr" } } */ -+ -+/* Force using a dispatch table even though by default we would generate -+ ifs. */ -+ -+extern long call (long); -+ -+long -+test_switch (long a, long b) -+{ -+ long c; -+ -+ switch (a) -+ { -+ case 0: c = -b; break; -+ case 1: c = ~b; break; -+ case 2: c = b+1; break; -+ default: c = b & 9; break; -+ } -+ -+ return call (c) + 1; -+} -Index: gcc/testsuite/gcc.target/powerpc/ppc-switch-2.c -=================================================================== ---- a/src/gcc/testsuite/gcc.target/powerpc/ppc-switch-2.c (.../gcc-4_6-branch) -+++ b/src/gcc/testsuite/gcc.target/powerpc/ppc-switch-2.c (.../ibm/gcc-4_6-branch) -@@ -0,0 +1,32 @@ -+/* { dg-do compile { target { powerpc*-*-* } } } */ -+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -+/* { dg-options "-O2 --param case-values-threshold=20" } */ -+/* { dg-final { scan-assembler-not "mtctr" } } */ -+/* { dg-final { scan-assembler-not "bctr" } } */ -+ -+/* Force using if tests, instead of a dispatch table. */ -+ -+extern long call (long); -+ -+long -+test_switch (long a, long b) -+{ -+ long c; -+ -+ switch (a) -+ { -+ case 0: c = -b; break; -+ case 1: c = ~b; break; -+ case 2: c = b+1; break; -+ case 3: c = b-2; break; -+ case 4: c = b*3; break; -+ case 5: c = b/4; break; -+ case 6: c = b<<5; break; -+ case 7: c = b>>6; break; -+ case 8: c = b|7; break; -+ case 9: c = b^8; break; -+ default: c = b&9; break; -+ } -+ -+ return call (c) + 1; -+} -Index: gcc/testsuite/gcc.target/powerpc/pr48258-1.c -=================================================================== ---- a/src/gcc/testsuite/gcc.target/powerpc/pr48258-1.c (.../gcc-4_6-branch) -+++ b/src/gcc/testsuite/gcc.target/powerpc/pr48258-1.c (.../ibm/gcc-4_6-branch) -@@ -0,0 +1,57 @@ -+/* { dg-do compile } */ -+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -+/* { dg-require-effective-target powerpc_vsx_ok } */ -+/* { dg-options "-O3 -mcpu=power7 -mabi=altivec -ffast-math -fno-unroll-loops" } */ -+/* { dg-final { scan-assembler-times "xvaddsp" 3 } } */ -+/* { dg-final { scan-assembler-times "xvminsp" 3 } } */ -+/* { dg-final { scan-assembler-times "xvmaxsp" 3 } } */ -+/* { dg-final { scan-assembler-times "xxsldwi" 6 } } */ -+/* { dg-final { scan-assembler-times "xscvspdp" 3 } } */ -+/* { dg-final { scan-assembler-not "stvewx" } } */ -+/* { dg-final { scan-assembler-not "stvx" } } */ -+/* { dg-final { scan-assembler-not "stxvd2x" } } */ -+/* { dg-final { scan-assembler-not "stxvw4x" } } */ -+ -+#include <stddef.h> -+ -+#ifndef SIZE -+#define SIZE 1024 -+#endif -+ -+float values[SIZE] __attribute__((__aligned__(32))); -+ -+float -+vector_sum (void) -+{ -+ size_t i; -+ float sum = 0.0f; -+ -+ for (i = 0; i < SIZE; i++) -+ sum += values[i]; -+ -+ return sum; -+} -+ -+float -+vector_min (void) -+{ -+ size_t i; -+ float min = values[0]; -+ -+ for (i = 0; i < SIZE; i++) -+ min = __builtin_fminf (min, values[i]); -+ -+ return min; -+} -+ -+float -+vector_max (void) -+{ -+ size_t i; -+ float max = values[0]; -+ -+ for (i = 0; i < SIZE; i++) -+ max = __builtin_fmaxf (max, values[i]); -+ -+ return max; -+} -Index: gcc/testsuite/gcc.target/powerpc/pr48258-2.c -=================================================================== ---- a/src/gcc/testsuite/gcc.target/powerpc/pr48258-2.c (.../gcc-4_6-branch) -+++ b/src/gcc/testsuite/gcc.target/powerpc/pr48258-2.c (.../ibm/gcc-4_6-branch) -@@ -0,0 +1,58 @@ -+/* { dg-do compile } */ -+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -+/* { dg-require-effective-target powerpc_vsx_ok } */ -+/* { dg-options "-O3 -mcpu=power7 -mabi=altivec -ffast-math -fno-unroll-loops" } */ -+/* { dg-final { scan-assembler-times "xvadddp" 1 } } */ -+/* { dg-final { scan-assembler-times "xvmindp" 1 } } */ -+/* { dg-final { scan-assembler-times "xvmaxdp" 1 } } */ -+/* { dg-final { scan-assembler-times "xsadddp" 1 } } */ -+/* { dg-final { scan-assembler-times "xsmindp" 1 } } */ -+/* { dg-final { scan-assembler-times "xsmaxdp" 1 } } */ -+/* { dg-final { scan-assembler-not "xxsldwi" } } */ -+/* { dg-final { scan-assembler-not "stvx" } } */ -+/* { dg-final { scan-assembler-not "stxvd2x" } } */ -+/* { dg-final { scan-assembler-not "stxvw4x" } } */ -+ -+#include <stddef.h> -+ -+#ifndef SIZE -+#define SIZE 1024 -+#endif -+ -+double values[SIZE] __attribute__((__aligned__(32))); -+ -+double -+vector_sum (void) -+{ -+ size_t i; -+ double sum = 0.0; -+ -+ for (i = 0; i < SIZE; i++) -+ sum += values[i]; -+ -+ return sum; -+} -+ -+double -+vector_min (void) -+{ -+ size_t i; -+ double min = values[0]; -+ -+ for (i = 0; i < SIZE; i++) -+ min = __builtin_fmin (min, values[i]); -+ -+ return min; -+} -+ -+double -+vector_max (void) -+{ -+ size_t i; -+ double max = values[0]; -+ -+ for (i = 0; i < SIZE; i++) -+ max = __builtin_fmax (max, values[i]); -+ -+ return max; -+} -Index: gcc/testsuite/ChangeLog.ibm -=================================================================== ---- a/src/gcc/testsuite/ChangeLog.ibm (.../gcc-4_6-branch) -+++ b/src/gcc/testsuite/ChangeLog.ibm (.../ibm/gcc-4_6-branch) -@@ -0,0 +1,37 @@ -+2011-07-06 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Backport from mainline -+ 2011-07-06 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ * gcc.target/powerpc/no-r11-1.c: New test for -mr11, -mno-r11. -+ * gcc.target/powerpc/no-r11-2.c: Ditto. -+ * gcc.target/powerpc/no-r11-3.c: Ditto. -+ -+2011-07-05 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Merge up to 175885. -+ -+ Backport from mainline -+ 2011-07-05 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ * gcc.target/powerpc/ppc-switch-1.c: New test for -+ --param case-values-threshold. -+ * gcc.target/powerpc/ppc-switch-2.c: Ditto. -+ -+2011-04-28 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Merge up to 173137. -+ -+2011-04-26 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Backport from mainline -+ 2011-03-23 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ PR target/48258 -+ * gcc.target/powerpc/pr48258-1.c: New file. -+ * gcc.target/powerpc/pr48258-2.c: Ditto. -+ -+2011-03-28 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Branch from gcc-4_6-branch, subversion id 171614. -+ -Index: gcc/ChangeLog.ibm -=================================================================== ---- a/src/gcc/ChangeLog.ibm (.../gcc-4_6-branch) -+++ b/src/gcc/ChangeLog.ibm (.../ibm/gcc-4_6-branch) -@@ -0,0 +1,248 @@ -+2011-07-06 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Backport from mainline -+ 2011-07-06 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ * config/rs6000/rs6000-protos.h (rs6000_call_indirect_aix): New -+ declaration. -+ (rs6000_save_toc_in_prologue_p): Ditto. -+ -+ * config/rs6000/rs6000.opt (-mr11): New switch to disable loading -+ up the static chain (r11) during indirect function calls. -+ (-msave-toc-indirect): New undocumented debug switch. -+ -+ * config/rs6000/rs6000.c (struct machine_function): Add -+ save_toc_in_prologue field to note whether the prologue needs to -+ save the TOC value in the reserved stack location. -+ (rs6000_emit_prologue): Use TOC_REGNUM instead of 2. If we need -+ to save the TOC in the prologue, do so. -+ (rs6000_trampoline_init): Don't allow creating AIX style -+ trampolines if -mno-r11 is in effect. -+ (rs6000_call_indirect_aix): New function to create AIX style -+ indirect calls, adding support for -mno-r11 to suppress loading -+ the static chain, and saving the TOC in the prologue instead of -+ the call body. -+ (rs6000_save_toc_in_prologue_p): Return true if we are saving the -+ TOC in the prologue. -+ -+ * config/rs6000/rs6000.md (STACK_POINTER_REGNUM): Add more fixed -+ register numbers. -+ (TOC_REGNUM): Ditto. -+ (STATIC_CHAIN_REGNUM): Ditto. -+ (ARG_POINTER_REGNUM): Ditto. -+ (SFP_REGNO): Delete, unused. -+ (TOC_SAVE_OFFSET_32BIT): Add constants for AIX TOC save and -+ function descriptor offsets. -+ (TOC_SAVE_OFFSET_64BIT): Ditto. -+ (AIX_FUNC_DESC_TOC_32BIT): Ditto. -+ (AIX_FUNC_DESC_TOC_64BIT): Ditto. -+ (AIX_FUNC_DESC_SC_32BIT): Ditto. -+ (AIX_FUNC_DESC_SC_64BIT): Ditto. -+ (ptrload): New mode attribute for the appropriate load of a -+ pointer. -+ (call_indirect_aix32): Delete, rewrite AIX indirect function -+ calls. -+ (call_indirect_aix64): Ditto. -+ (call_value_indirect_aix32): Ditto. -+ (call_value_indirect_aix64): Ditto. -+ (call_indirect_nonlocal_aix32_internal): Ditto. -+ (call_indirect_nonlocal_aix32): Ditto. -+ (call_indirect_nonlocal_aix64_internal): Ditto. -+ (call_indirect_nonlocal_aix64): Ditto. -+ (call): Rewrite AIX indirect function calls. Add support for -+ eliminating the static chain, and for moving the save of the TOC -+ to the function prologue. -+ (call_value): Ditto. -+ (call_indirect_aix<ptrsize>): Ditto. -+ (call_indirect_aix<ptrsize>_internal): Ditto. -+ (call_indirect_aix<ptrsize>_internal2): Ditto. -+ (call_indirect_aix<ptrsize>_nor11): Ditto. -+ (call_value_indirect_aix<ptrsize>): Ditto. -+ (call_value_indirect_aix<ptrsize>_internal): Ditto. -+ (call_value_indirect_aix<ptrsize>_internal2): Ditto. -+ (call_value_indirect_aix<ptrsize>_nor11): Ditto. -+ (call_nonlocal_aix32): Relocate in the rs6000.md file. -+ (call_nonlocal_aix64): Ditto. -+ -+ * doc/invoke.texi (RS/6000 and PowerPC Options): Add -mr11 and -+ -mno-r11 documentation. -+ -+2011-07-05 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Merge up to 175885. -+ * REVISION: Update subversion id. -+ -+ Backport from the mainline: -+ 2011-07-05 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ * params.def (PARAM_CASE_VALUES_THRESHOLD): New parameter to -+ override CASE_VALUES_THRESHOLD. -+ -+ * stmt.c (toplevel): Include params.h. -+ (case_values_threshold): Use the --param case-values-threshold -+ value if non-zero, otherwise use machine dependent value. -+ (expand_case): Use case_values_threshold. -+ -+ * Makefile.in (stmt.o): Add $(PARAMS_H) dependency. -+ -+ * doc/invoke.texi (--param case-values-threshold): Document. -+ -+2011-07-01 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Merge up to 175762. -+ * REVISION: Update subversion id. -+ -+2011-06-06 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Merge up to 174573. -+ * REVISION: Update subversion id. -+ -+2011-06-02 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Merge up to 174572. -+ * REVISION: Update subversion id. -+ -+2011-05-27 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Merge up to 174363. -+ * REVISION: Update subversion id. -+ -+2011-05-26 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Merge up to 174299. -+ * REVISION: Update subversion id. -+ -+2011-05-19 Peter Bergner <bergner@vnet.ibm.com> -+ -+ * config/rs6000/t-linux64 (MULTILIB_OPTIONS): Remove soft-float support. -+ (MULTILIB_DIRNAMES): Likewise. -+ (MULTILIB_EXCEPTIONS): Likewise. -+ (MULTILIB_EXCLUSIONS): Likewise. -+ (MULTILIB_OSDIRNAMES): Likewise. -+ (MULTILIB_MATCHES): Likewise. -+ -+2011-05-10 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Merge up to 173634 (fix PR 48857). -+ * REVISION: Update subversion id. -+ -+2011-04-28 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Merge up to 173137. -+ * REVISION: Update subversion id. -+ -+ Backport from mainline -+ 2011-03-26 Alan Modra <amodra@gmail.com> -+ -+ * config/rs6000/predicates.md (word_offset_memref_op): Handle -+ cmodel medium addresses. -+ * config/rs6000/rs6000.c (rs6000_secondary_reload): Handle misaligned -+ 64-bit gpr loads and stores. -+ (rs6000_secondary_reload_ppc64): New function. -+ * config/rs6000/rs6000-protos.h: Declare it. -+ * config/rs6000/rs6000.md (reload_di_store, reload_di_load): New. -+ -+2011-04-27 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Merge up to 173048. -+ * REVISION: Update subversion id. -+ -+2011-04-26 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Backport from mainline -+ 2011-04-26 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ PR target/48258 -+ * config/rs6000/vector.md (UNSPEC_REDUC): New unspec for vector -+ reduction. -+ (VEC_reduc): New code iterator and splitters for vector reduction. -+ (VEC_reduc_name): Ditto. -+ (VEC_reduc_rtx): Ditto. -+ (reduc_<VEC_reduc_name>_v2df): Vector reduction expanders for VSX. -+ (reduc_<VEC_reduc_name>_v4sf): Ditto. -+ -+ * config/rs6000/rs6000.c (rs6000_expand_vector_extract): Add -+ support for extracting SF on VSX. -+ -+ * config/rs6000/vsx.md (vsx_xscvspdp_scalar2): New insn for -+ generating xscvspdp. -+ (vsx_extract_v4sf): New insn to extract SF from V4SF vector. -+ (vsx_reduc_<VEC_reduc_name>_v2df): New insns and splitters for -+ double add, minimum, maximum vector reduction. -+ (vsx_reduc_<VEC_reduc_name>_v4sf): Ditto. -+ (vsx_reduc_<VEC_reduc_name>_v2df2_scalar): New combiner insn to -+ optimize double vector reduction. -+ (vsx_reduc_<VEC_reduc_name>_v4sf_scalar): Ditto. -+ -+2011-04-19 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Merge up to 172725. -+ * REVISION: Update subversion id. -+ -+2011-04-15 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Merge up to 172515. -+ * REVISION: Update subversion id. -+ -+2011-04-11 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Merge up to 172266. -+ * REVISION: Update subversion id. -+ -+2011-04-08 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Merge up to 172195. -+ * REVISION: Update subversion id. -+ -+2011-04-06 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Merge up to 172055. -+ * REVISION: Update subversion id. -+ -+2011-03-29 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Merge up to 171704. -+ * REVISION: Update subersion id. -+ -+2011-03-28 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Backport from mainline -+ 2011-03-21 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ * config/rs6000/rs6000.md (UNSPEC_*, UNSPECV_*): Redefine all -+ UNSPEC constants to be in the unspec enumeration, and redefine -+ all UNSPECV constants to be in the unspecv enumeration, so that -+ dumps print which unspec/unspec_volatile this is. -+ * config/rs6000/vector.md (UNSPEC_*): Ditto. -+ * config/rs6000/paired.md (UNSPEC_*): Ditto. -+ * config/rs6000/vsx.md (UNSPEC_*): Ditto. -+ * config/rs6000/altivec.md (UNSPEC_*, UNSPECV_*): Ditto. -+ * config/rs6000/dfp.md (UNSPEC_*): Ditto. -+ -+ * config/rs6000/rs6000.md (UNSPECV_ISYNC, UNSPECV_LWSYNC): Rename -+ UNSPEC_ISYNC and UNSPEC_HWSYNC to UNSPECV_ISYNC and -+ UNSPECV_LWSYNC, since these are used as unspec_volatile. -+ * config/rs6000/sync.md (isync, lwsync): Ditto. -+ -+ Backport from mainline -+ 2011-03-21 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ PR target/48226 -+ * config/rs6000/rs6000-c.c (rs6000_macro_to_expand): If we see a -+ vector when peeking at the next token for vector, don't expand the -+ keywords. -+ -+ Backport from mainline -+ 2011-03-16 Alan Modra <amodra@gmail.com> -+ -+ PR target/45844 -+ * config/rs6000/rs6000.c (rs6000_legitimize_reload_address): Don't -+ create invalid offset address for vsx splat insn. -+ * config/rs6000/predicates.md (splat_input_operand): New. -+ * config/rs6000/vsx.md (vsx_splat_*): Use it. -+ -+2011-03-28 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Branch from gcc-4_6-branch, subversion id 171614. -+ * REVISION: New file. -+ -Index: gcc/REVISION -=================================================================== ---- a/src/gcc/REVISION (.../gcc-4_6-branch) -+++ b/src/gcc/REVISION (.../ibm/gcc-4_6-branch) -@@ -0,0 +1 @@ -+Advance Toolchain 5.xx [merged from gcc-4_6-branch, 175885] -Index: gcc/Makefile.in -=================================================================== ---- a/src/gcc/Makefile.in (.../gcc-4_6-branch) -+++ b/src/gcc/Makefile.in (.../ibm/gcc-4_6-branch) -@@ -2876,7 +2876,7 @@ - $(LIBFUNCS_H) $(EXCEPT_H) $(RECOG_H) $(DIAGNOSTIC_CORE_H) \ - output.h $(GGC_H) $(TM_P_H) langhooks.h $(PREDICT_H) $(OPTABS_H) \ - $(TARGET_H) $(GIMPLE_H) $(MACHMODE_H) $(REGS_H) alloc-pool.h \ -- $(PRETTY_PRINT_H) $(BITMAP_H) -+ $(PRETTY_PRINT_H) $(BITMAP_H) $(PARAMS_H) - except.o : except.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(RTL_H) \ - $(TREE_H) $(FLAGS_H) $(EXCEPT_H) $(FUNCTION_H) $(EXPR_H) $(LIBFUNCS_H) \ - langhooks.h insn-config.h hard-reg-set.h $(BASIC_BLOCK_H) output.h \ -Index: gcc/config/rs6000/vector.md -=================================================================== ---- a/src/gcc/config/rs6000/vector.md (.../gcc-4_6-branch) -+++ b/src/gcc/config/rs6000/vector.md (.../ibm/gcc-4_6-branch) -@@ -74,9 +74,20 @@ - (V2DF "V2DI")]) - - ;; constants for unspec --(define_constants -- [(UNSPEC_PREDICATE 400)]) -+(define_c_enum "unspec" [UNSPEC_PREDICATE -+ UNSPEC_REDUC]) - -+;; Vector reduction code iterators -+(define_code_iterator VEC_reduc [plus smin smax]) -+ -+(define_code_attr VEC_reduc_name [(plus "splus") -+ (smin "smin") -+ (smax "smax")]) -+ -+(define_code_attr VEC_reduc_rtx [(plus "add") -+ (smin "smin") -+ (smax "smax")]) -+ - - ;; Vector move instructions. - (define_expand "mov<mode>" -@@ -992,6 +1003,41 @@ - "TARGET_ALTIVEC" - "") - -+;; Vector reduction expanders for VSX -+ -+(define_expand "reduc_<VEC_reduc_name>_v2df" -+ [(parallel [(set (match_operand:V2DF 0 "vfloat_operand" "") -+ (VEC_reduc:V2DF -+ (vec_concat:V2DF -+ (vec_select:DF -+ (match_operand:V2DF 1 "vfloat_operand" "") -+ (parallel [(const_int 1)])) -+ (vec_select:DF -+ (match_dup 1) -+ (parallel [(const_int 0)]))) -+ (match_dup 1))) -+ (clobber (match_scratch:V2DF 2 ""))])] -+ "VECTOR_UNIT_VSX_P (V2DFmode)" -+ "") -+ -+; The (VEC_reduc:V4SF -+; (op1) -+; (unspec:V4SF [(const_int 0)] UNSPEC_REDUC)) -+; -+; is to allow us to use a code iterator, but not completely list all of the -+; vector rotates, etc. to prevent canonicalization -+ -+(define_expand "reduc_<VEC_reduc_name>_v4sf" -+ [(parallel [(set (match_operand:V4SF 0 "vfloat_operand" "") -+ (VEC_reduc:V4SF -+ (unspec:V4SF [(const_int 0)] UNSPEC_REDUC) -+ (match_operand:V4SF 1 "vfloat_operand" ""))) -+ (clobber (match_scratch:V4SF 2 "")) -+ (clobber (match_scratch:V4SF 3 ""))])] -+ "VECTOR_UNIT_VSX_P (V4SFmode)" -+ "") -+ -+ - ;;; Expanders for vector insn patterns shared between the SPE and TARGET_PAIRED systems. - - (define_expand "absv2sf2" -Index: gcc/config/rs6000/predicates.md -=================================================================== ---- a/src/gcc/config/rs6000/predicates.md (.../gcc-4_6-branch) -+++ b/src/gcc/config/rs6000/predicates.md (.../ibm/gcc-4_6-branch) -@@ -1,5 +1,5 @@ - ;; Predicate definitions for POWER and PowerPC. --;; Copyright (C) 2005, 2006, 2007, 2008, 2009, 2010 -+;; Copyright (C) 2005, 2006, 2007, 2008, 2009, 2010, 2011 - ;; Free Software Foundation, Inc. - ;; - ;; This file is part of GCC. -@@ -435,9 +435,12 @@ - op = XEXP (op, 0); - else if (GET_CODE (op) == PRE_MODIFY) - op = XEXP (op, 1); -+ else if (GET_CODE (op) == LO_SUM -+ && GET_CODE (XEXP (op, 0)) == REG -+ && GET_CODE (XEXP (op, 1)) == CONST) -+ op = XEXP (XEXP (op, 1), 0); - - return (GET_CODE (op) != PLUS -- || ! REG_P (XEXP (op, 0)) - || GET_CODE (XEXP (op, 1)) != CONST_INT - || INTVAL (XEXP (op, 1)) % 4 == 0); - }) -@@ -871,6 +874,23 @@ - return 0; - }) - -+;; Return 1 if this operand is a valid input for a vsx_splat insn. -+(define_predicate "splat_input_operand" -+ (match_code "label_ref,symbol_ref,const,high,reg,subreg,mem, -+ const_double,const_vector,const_int,plus") -+{ -+ if (MEM_P (op)) -+ { -+ if (mode == DFmode) -+ mode = V2DFmode; -+ else if (mode == DImode) -+ mode = V2DImode; -+ else -+ gcc_unreachable (); -+ } -+ return input_operand (op, mode); -+}) -+ - ;; Return true if OP is an invalid SUBREG operation on the e500. - (define_predicate "rs6000_nonimmediate_operand" - (match_code "reg,subreg,mem") -Index: gcc/config/rs6000/paired.md -=================================================================== ---- a/src/gcc/config/rs6000/paired.md (.../gcc-4_6-branch) -+++ b/src/gcc/config/rs6000/paired.md (.../ibm/gcc-4_6-branch) -@@ -1,5 +1,5 @@ - ;; PowerPC paired single and double hummer description --;; Copyright (C) 2007, 2009, 2010 -+;; Copyright (C) 2007, 2009, 2010, 2011 - ;; Free Software Foundation, Inc. - ;; Contributed by David Edelsohn <edelsohn@gnu.org> and Revital Eres - ;; <eres@il.ibm.com> -@@ -20,12 +20,12 @@ - ;; along with this program; see the file COPYING3. If not see - ;; <http://www.gnu.org/licenses/>. - --(define_constants --[(UNSPEC_INTERHI_V2SF 330) -- (UNSPEC_INTERLO_V2SF 331) -- (UNSPEC_EXTEVEN_V2SF 332) -- (UNSPEC_EXTODD_V2SF 333) --]) -+(define_c_enum "unspec" -+ [UNSPEC_INTERHI_V2SF -+ UNSPEC_INTERLO_V2SF -+ UNSPEC_EXTEVEN_V2SF -+ UNSPEC_EXTODD_V2SF -+ ]) - - (define_insn "paired_negv2sf2" - [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") -Index: gcc/config/rs6000/rs6000-protos.h -=================================================================== ---- a/src/gcc/config/rs6000/rs6000-protos.h (.../gcc-4_6-branch) -+++ b/src/gcc/config/rs6000/rs6000-protos.h (.../ibm/gcc-4_6-branch) -@@ -79,6 +79,7 @@ - enum machine_mode, - enum reg_class); - extern void rs6000_secondary_reload_inner (rtx, rtx, rtx, bool); -+extern void rs6000_secondary_reload_ppc64 (rtx, rtx, rtx, bool); - extern int paired_emit_vector_cond_expr (rtx, rtx, rtx, - rtx, rtx, rtx); - extern void paired_expand_vector_move (rtx operands[]); -@@ -170,6 +171,8 @@ - extern void rs6000_emit_epilogue (int); - extern void rs6000_emit_eh_reg_restore (rtx, rtx); - extern const char * output_isel (rtx *); -+extern void rs6000_call_indirect_aix (rtx, rtx, rtx); -+extern bool rs6000_save_toc_in_prologue_p (void); - extern bool rs6000_tls_referenced_p (rtx); - - extern void rs6000_aix_asm_output_dwarf_table_ref (char *); -Index: gcc/config/rs6000/rs6000.opt -=================================================================== ---- a/src/gcc/config/rs6000/rs6000.opt (.../gcc-4_6-branch) -+++ b/src/gcc/config/rs6000/rs6000.opt (.../ibm/gcc-4_6-branch) -@@ -461,4 +461,10 @@ - Target Var(rs6000_xilinx_fpu) Save - Specify Xilinx FPU. - -+mr11 -+Target Report Var(TARGET_R11) Init(1) Save -+Use/do not use r11 to hold the static link in calls. - -+msave-toc-indirect -+Target Undocumented Var(TARGET_SAVE_TOC_INDIRECT) Save Init(1) -+; Control whether we save the TOC in the prologue for indirect calls or generate the save inline -Index: gcc/config/rs6000/rs6000.c -=================================================================== ---- a/src/gcc/config/rs6000/rs6000.c (.../gcc-4_6-branch) -+++ b/src/gcc/config/rs6000/rs6000.c (.../ibm/gcc-4_6-branch) -@@ -128,6 +128,9 @@ - int ra_need_lr; - /* Cache lr_save_p after expansion of builtin_eh_return. */ - int lr_save_state; -+ /* Whether we need to save the TOC to the reserved stack location in the -+ function prologue. */ -+ bool save_toc_in_prologue; - /* Offset from virtual_stack_vars_rtx to the start of the ABI_V4 - varargs save area. */ - HOST_WIDE_INT varargs_save_offset; -@@ -5488,12 +5491,22 @@ - enum machine_mode inner_mode = GET_MODE_INNER (mode); - rtx mem; - -- if (VECTOR_MEM_VSX_P (mode) && (mode == V2DFmode || mode == V2DImode)) -+ if (VECTOR_MEM_VSX_P (mode)) - { -- rtx (*extract_func) (rtx, rtx, rtx) -- = ((mode == V2DFmode) ? gen_vsx_extract_v2df : gen_vsx_extract_v2di); -- emit_insn (extract_func (target, vec, GEN_INT (elt))); -- return; -+ switch (mode) -+ { -+ default: -+ break; -+ case V2DFmode: -+ emit_insn (gen_vsx_extract_v2df (target, vec, GEN_INT (elt))); -+ return; -+ case V2DImode: -+ emit_insn (gen_vsx_extract_v2di (target, vec, GEN_INT (elt))); -+ return; -+ case V4SFmode: -+ emit_insn (gen_vsx_extract_v4sf (target, vec, GEN_INT (elt))); -+ return; -+ } - } - - /* Allocate mode-sized buffer. */ -@@ -6694,6 +6707,14 @@ - { - bool reg_offset_p = reg_offset_addressing_ok_p (mode); - -+ /* Nasty hack for vsx_splat_V2DF/V2DI load from mem, which takes a -+ DFmode/DImode MEM. */ -+ if (reg_offset_p -+ && opnum == 1 -+ && ((mode == DFmode && recog_data.operand_mode[0] == V2DFmode) -+ || (mode == DImode && recog_data.operand_mode[0] == V2DImode))) -+ reg_offset_p = false; -+ - /* We must recognize output that we have already generated ourselves. */ - if (GET_CODE (x) == PLUS - && GET_CODE (XEXP (x, 0)) == PLUS -@@ -14811,8 +14832,11 @@ - needed for the immediate register. - - For VSX and Altivec, we may need a register to convert sp+offset into -- reg+sp. */ -+ reg+sp. - -+ For misaligned 64-bit gpr loads and stores we need a register to -+ convert an offset address to indirect. */ -+ - static reg_class_t - rs6000_secondary_reload (bool in_p, - rtx x, -@@ -14914,6 +14938,34 @@ - else - default_p = true; - } -+ else if (TARGET_POWERPC64 -+ && rs6000_reload_register_type (rclass) == GPR_REGISTER_TYPE -+ && MEM_P (x) -+ && GET_MODE_SIZE (GET_MODE (x)) >= UNITS_PER_WORD) -+ { -+ rtx addr = XEXP (x, 0); -+ -+ if (GET_CODE (addr) == PRE_MODIFY) -+ addr = XEXP (addr, 1); -+ else if (GET_CODE (addr) == LO_SUM -+ && GET_CODE (XEXP (addr, 0)) == REG -+ && GET_CODE (XEXP (addr, 1)) == CONST) -+ addr = XEXP (XEXP (addr, 1), 0); -+ -+ if (GET_CODE (addr) == PLUS -+ && GET_CODE (XEXP (addr, 1)) == CONST_INT -+ && (INTVAL (XEXP (addr, 1)) & 3) != 0) -+ { -+ if (in_p) -+ sri->icode = CODE_FOR_reload_di_load; -+ else -+ sri->icode = CODE_FOR_reload_di_store; -+ sri->extra_cost = 2; -+ ret = NO_REGS; -+ } -+ else -+ default_p = true; -+ } - else - default_p = true; - -@@ -15202,6 +15254,56 @@ - return; - } - -+/* Convert reloads involving 64-bit gprs and misaligned offset -+ addressing to use indirect addressing. */ -+ -+void -+rs6000_secondary_reload_ppc64 (rtx reg, rtx mem, rtx scratch, bool store_p) -+{ -+ int regno = true_regnum (reg); -+ enum reg_class rclass; -+ rtx addr; -+ rtx scratch_or_premodify = scratch; -+ -+ if (TARGET_DEBUG_ADDR) -+ { -+ fprintf (stderr, "\nrs6000_secondary_reload_ppc64, type = %s\n", -+ store_p ? "store" : "load"); -+ fprintf (stderr, "reg:\n"); -+ debug_rtx (reg); -+ fprintf (stderr, "mem:\n"); -+ debug_rtx (mem); -+ fprintf (stderr, "scratch:\n"); -+ debug_rtx (scratch); -+ } -+ -+ gcc_assert (regno >= 0 && regno < FIRST_PSEUDO_REGISTER); -+ gcc_assert (GET_CODE (mem) == MEM); -+ rclass = REGNO_REG_CLASS (regno); -+ gcc_assert (rclass == GENERAL_REGS || rclass == BASE_REGS); -+ addr = XEXP (mem, 0); -+ -+ if (GET_CODE (addr) == PRE_MODIFY) -+ { -+ scratch_or_premodify = XEXP (addr, 0); -+ gcc_assert (REG_P (scratch_or_premodify)); -+ addr = XEXP (addr, 1); -+ } -+ gcc_assert (GET_CODE (addr) == PLUS || GET_CODE (addr) == LO_SUM); -+ -+ rs6000_emit_move (scratch_or_premodify, addr, Pmode); -+ -+ mem = replace_equiv_address_nv (mem, scratch_or_premodify); -+ -+ /* Now create the move. */ -+ if (store_p) -+ emit_insn (gen_rtx_SET (VOIDmode, mem, reg)); -+ else -+ emit_insn (gen_rtx_SET (VOIDmode, reg, mem)); -+ -+ return; -+} -+ - /* Target hook to return the cover classes for Integrated Register Allocator. - Cover classes is a set of non-intersected register classes covering all hard - registers used for register allocation purpose. Any move between two -@@ -20859,7 +20961,7 @@ - JUMP_LABEL (jump) = toc_save_done; - LABEL_NUSES (toc_save_done) += 1; - -- emit_frame_save (frame_reg_rtx, frame_ptr_rtx, reg_mode, 2, -+ emit_frame_save (frame_reg_rtx, frame_ptr_rtx, reg_mode, TOC_REGNUM, - sp_offset + 5 * reg_size, info->total_size); - emit_label (toc_save_done); - if (using_static_chain_p) -@@ -21050,6 +21152,11 @@ - emit_move_insn (lr, gen_rtx_REG (Pmode, 0)); - } - #endif -+ -+ /* If we need to, save the TOC register after doing the stack setup. */ -+ if (rs6000_save_toc_in_prologue_p ()) -+ emit_frame_save (sp_reg_rtx, sp_reg_rtx, reg_mode, TOC_REGNUM, -+ 5 * reg_size, info->total_size); - } - - /* Write function prologue. */ -@@ -25002,10 +25109,15 @@ - /* Under AIX, just build the 3 word function descriptor */ - case ABI_AIX: - { -- rtx fnmem = gen_const_mem (Pmode, force_reg (Pmode, fnaddr)); -- rtx fn_reg = gen_reg_rtx (Pmode); -- rtx toc_reg = gen_reg_rtx (Pmode); -+ rtx fnmem, fn_reg, toc_reg; - -+ if (!TARGET_R11) -+ error ("-mno-r11 must not be used if you have trampolines"); -+ -+ fnmem = gen_const_mem (Pmode, force_reg (Pmode, fnaddr)); -+ fn_reg = gen_reg_rtx (Pmode); -+ toc_reg = gen_reg_rtx (Pmode); -+ - /* Macro to shorten the code expansions below. */ - # define MEM_PLUS(MEM, OFFSET) adjust_address (MEM, Pmode, OFFSET) - -@@ -28257,5 +28369,132 @@ - return x; - } - -+ -+/* A function pointer under AIX is a pointer to a data area whose first word -+ contains the actual address of the function, whose second word contains a -+ pointer to its TOC, and whose third word contains a value to place in the -+ static chain register (r11). Note that if we load the static chain, our -+ "trampoline" need not have any executable code. */ - -+void -+rs6000_call_indirect_aix (rtx value, rtx func_desc, rtx flag) -+{ -+ rtx func_addr; -+ rtx toc_reg; -+ rtx sc_reg; -+ rtx stack_ptr; -+ rtx stack_toc_offset; -+ rtx stack_toc_mem; -+ rtx func_toc_offset; -+ rtx func_toc_mem; -+ rtx func_sc_offset; -+ rtx func_sc_mem; -+ rtx insn; -+ rtx (*call_func) (rtx, rtx, rtx, rtx); -+ rtx (*call_value_func) (rtx, rtx, rtx, rtx, rtx); -+ -+ stack_ptr = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM); -+ toc_reg = gen_rtx_REG (Pmode, TOC_REGNUM); -+ -+ /* Load up address of the actual function. */ -+ func_desc = force_reg (Pmode, func_desc); -+ func_addr = gen_reg_rtx (Pmode); -+ emit_move_insn (func_addr, gen_rtx_MEM (Pmode, func_desc)); -+ -+ if (TARGET_32BIT) -+ { -+ -+ stack_toc_offset = GEN_INT (TOC_SAVE_OFFSET_32BIT); -+ func_toc_offset = GEN_INT (AIX_FUNC_DESC_TOC_32BIT); -+ func_sc_offset = GEN_INT (AIX_FUNC_DESC_SC_32BIT); -+ if (TARGET_R11) -+ { -+ call_func = gen_call_indirect_aix32bit; -+ call_value_func = gen_call_value_indirect_aix32bit; -+ } -+ else -+ { -+ call_func = gen_call_indirect_aix32bit_nor11; -+ call_value_func = gen_call_value_indirect_aix32bit_nor11; -+ } -+ } -+ else -+ { -+ stack_toc_offset = GEN_INT (TOC_SAVE_OFFSET_64BIT); -+ func_toc_offset = GEN_INT (AIX_FUNC_DESC_TOC_64BIT); -+ func_sc_offset = GEN_INT (AIX_FUNC_DESC_SC_64BIT); -+ if (TARGET_R11) -+ { -+ call_func = gen_call_indirect_aix64bit; -+ call_value_func = gen_call_value_indirect_aix64bit; -+ } -+ else -+ { -+ call_func = gen_call_indirect_aix64bit_nor11; -+ call_value_func = gen_call_value_indirect_aix64bit_nor11; -+ } -+ } -+ -+ /* Reserved spot to store the TOC. */ -+ stack_toc_mem = gen_frame_mem (Pmode, -+ gen_rtx_PLUS (Pmode, -+ stack_ptr, -+ stack_toc_offset)); -+ -+ gcc_assert (cfun); -+ gcc_assert (cfun->machine); -+ -+ /* Can we optimize saving the TOC in the prologue or do we need to do it at -+ every call? */ -+ if (TARGET_SAVE_TOC_INDIRECT && !cfun->calls_alloca -+ && !cfun->calls_setjmp && !cfun->has_nonlocal_label -+ && !cfun->can_throw_non_call_exceptions -+ && ((flags_from_decl_or_type (cfun->decl) & ECF_NOTHROW) == ECF_NOTHROW)) -+ cfun->machine->save_toc_in_prologue = true; -+ -+ else -+ { -+ MEM_VOLATILE_P (stack_toc_mem) = 1; -+ emit_move_insn (stack_toc_mem, toc_reg); -+ } -+ -+ /* Calculate the address to load the TOC of the called function. We don't -+ actually load this until the split after reload. */ -+ func_toc_mem = gen_rtx_MEM (Pmode, -+ gen_rtx_PLUS (Pmode, -+ func_desc, -+ func_toc_offset)); -+ -+ /* If we have a static chain, load it up. */ -+ if (TARGET_R11) -+ { -+ func_sc_mem = gen_rtx_MEM (Pmode, -+ gen_rtx_PLUS (Pmode, -+ func_desc, -+ func_sc_offset)); -+ -+ sc_reg = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM); -+ emit_move_insn (sc_reg, func_sc_mem); -+ } -+ -+ /* Create the call. */ -+ if (value) -+ insn = call_value_func (value, func_addr, flag, func_toc_mem, -+ stack_toc_mem); -+ else -+ insn = call_func (func_addr, flag, func_toc_mem, stack_toc_mem); -+ -+ emit_call_insn (insn); -+ return; -+} -+ -+/* Return whether we need to always update the saved TOC pointer when we update -+ the stack pointer. */ -+ -+bool -+rs6000_save_toc_in_prologue_p (void) -+{ -+ return (cfun && cfun->machine && cfun->machine->save_toc_in_prologue); -+} -+ - #include "gt-rs6000.h" - -Property changes on: gcc/config/rs6000/rs6000.c -___________________________________________________________________ -Modified: svn:mergeinfo - Merged /branches/gcc-4_6-branch/gcc/config/rs6000/rs6000.c:r171610-175885 - -Index: gcc/config/rs6000/vsx.md -=================================================================== ---- a/src/gcc/config/rs6000/vsx.md (.../gcc-4_6-branch) -+++ b/src/gcc/config/rs6000/vsx.md (.../ibm/gcc-4_6-branch) -@@ -183,25 +183,25 @@ - (V16QI "QI")]) - - ;; Constants for creating unspecs --(define_constants -- [(UNSPEC_VSX_CONCAT 500) -- (UNSPEC_VSX_CVDPSXWS 501) -- (UNSPEC_VSX_CVDPUXWS 502) -- (UNSPEC_VSX_CVSPDP 503) -- (UNSPEC_VSX_CVSXWDP 504) -- (UNSPEC_VSX_CVUXWDP 505) -- (UNSPEC_VSX_CVSXDSP 506) -- (UNSPEC_VSX_CVUXDSP 507) -- (UNSPEC_VSX_CVSPSXDS 508) -- (UNSPEC_VSX_CVSPUXDS 509) -- ;; 510-514 deleted -- (UNSPEC_VSX_TDIV 515) -- (UNSPEC_VSX_TSQRT 516) -- (UNSPEC_VSX_XXPERMDI 517) -- (UNSPEC_VSX_SET 518) -- (UNSPEC_VSX_ROUND_I 519) -- (UNSPEC_VSX_ROUND_IC 520) -- (UNSPEC_VSX_SLDWI 521)]) -+(define_c_enum "unspec" -+ [UNSPEC_VSX_CONCAT -+ UNSPEC_VSX_CVDPSXWS -+ UNSPEC_VSX_CVDPUXWS -+ UNSPEC_VSX_CVSPDP -+ UNSPEC_VSX_CVSXWDP -+ UNSPEC_VSX_CVUXWDP -+ UNSPEC_VSX_CVSXDSP -+ UNSPEC_VSX_CVUXDSP -+ UNSPEC_VSX_CVSPSXDS -+ UNSPEC_VSX_CVSPUXDS -+ UNSPEC_VSX_TDIV -+ UNSPEC_VSX_TSQRT -+ UNSPEC_VSX_XXPERMDI -+ UNSPEC_VSX_SET -+ UNSPEC_VSX_ROUND_I -+ UNSPEC_VSX_ROUND_IC -+ UNSPEC_VSX_SLDWI -+ ]) - - ;; VSX moves - (define_insn "*vsx_mov<mode>" -@@ -829,6 +829,15 @@ - "xscvdpsp %x0,%x1" - [(set_attr "type" "fp")]) - -+;; Same as vsx_xscvspdp, but use SF as the type -+(define_insn "vsx_xscvspdp_scalar2" -+ [(set (match_operand:SF 0 "vsx_register_operand" "=f") -+ (unspec:SF [(match_operand:V4SF 1 "vsx_register_operand" "wa")] -+ UNSPEC_VSX_CVSPDP))] -+ "VECTOR_UNIT_VSX_P (DFmode)" -+ "xscvspdp %x0,%x1" -+ [(set_attr "type" "fp")]) -+ - ;; Convert from 64-bit to 32-bit types - ;; Note, favor the Altivec registers since the usual use of these instructions - ;; is in vector converts and we need to use the Altivec vperm instruction. -@@ -1039,6 +1048,43 @@ - [(set_attr "type" "fpload") - (set_attr "length" "4")]) - -+;; Extract a SF element from V4SF -+(define_insn_and_split "vsx_extract_v4sf" -+ [(set (match_operand:SF 0 "vsx_register_operand" "=f,f") -+ (vec_select:SF -+ (match_operand:V4SF 1 "vsx_register_operand" "wa,wa") -+ (parallel [(match_operand:QI 2 "u5bit_cint_operand" "O,i")]))) -+ (clobber (match_scratch:V4SF 3 "=X,0"))] -+ "VECTOR_UNIT_VSX_P (V4SFmode)" -+ "@ -+ xscvspdp %x0,%x1 -+ #" -+ "" -+ [(const_int 0)] -+ " -+{ -+ rtx op0 = operands[0]; -+ rtx op1 = operands[1]; -+ rtx op2 = operands[2]; -+ rtx op3 = operands[3]; -+ rtx tmp; -+ HOST_WIDE_INT ele = INTVAL (op2); -+ -+ if (ele == 0) -+ tmp = op1; -+ else -+ { -+ if (GET_CODE (op3) == SCRATCH) -+ op3 = gen_reg_rtx (V4SFmode); -+ emit_insn (gen_vsx_xxsldwi_v4sf (op3, op1, op1, op2)); -+ tmp = op3; -+ } -+ emit_insn (gen_vsx_xscvspdp_scalar2 (op0, tmp)); -+ DONE; -+}" -+ [(set_attr "length" "4,8") -+ (set_attr "type" "fp")]) -+ - ;; General double word oriented permute, allow the other vector types for - ;; optimizing the permute instruction. - (define_insn "vsx_xxpermdi_<mode>" -@@ -1076,7 +1122,7 @@ - (define_insn "vsx_splat_<mode>" - [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wd,wd,wd,?wa,?wa,?wa") - (vec_duplicate:VSX_D -- (match_operand:<VS_scalar> 1 "input_operand" "ws,f,Z,wa,wa,Z")))] -+ (match_operand:<VS_scalar> 1 "splat_input_operand" "ws,f,Z,wa,wa,Z")))] - "VECTOR_MEM_VSX_P (<MODE>mode)" - "@ - xxpermdi %x0,%x1,%x1,0 -@@ -1150,3 +1196,153 @@ - "VECTOR_MEM_VSX_P (<MODE>mode)" - "xxsldwi %x0,%x1,%x2,%3" - [(set_attr "type" "vecperm")]) -+ -+ -+;; Vector reduction insns and splitters -+ -+(define_insn_and_split "*vsx_reduc_<VEC_reduc_name>_v2df" -+ [(set (match_operand:V2DF 0 "vfloat_operand" "=&wd,&?wa,wd,?wa") -+ (VEC_reduc:V2DF -+ (vec_concat:V2DF -+ (vec_select:DF -+ (match_operand:V2DF 1 "vfloat_operand" "wd,wa,wd,wa") -+ (parallel [(const_int 1)])) -+ (vec_select:DF -+ (match_dup 1) -+ (parallel [(const_int 0)]))) -+ (match_dup 1))) -+ (clobber (match_scratch:V2DF 2 "=0,0,&wd,&wa"))] -+ "VECTOR_UNIT_VSX_P (V2DFmode)" -+ "#" -+ "" -+ [(const_int 0)] -+ " -+{ -+ rtx tmp = (GET_CODE (operands[2]) == SCRATCH) -+ ? gen_reg_rtx (V2DFmode) -+ : operands[2]; -+ emit_insn (gen_vsx_xxsldwi_v2df (tmp, operands[1], operands[1], const2_rtx)); -+ emit_insn (gen_<VEC_reduc_rtx>v2df3 (operands[0], tmp, operands[1])); -+ DONE; -+}" -+ [(set_attr "length" "8") -+ (set_attr "type" "veccomplex")]) -+ -+(define_insn_and_split "*vsx_reduc_<VEC_reduc_name>_v4sf" -+ [(set (match_operand:V4SF 0 "vfloat_operand" "=wf,?wa") -+ (VEC_reduc:V4SF -+ (unspec:V4SF [(const_int 0)] UNSPEC_REDUC) -+ (match_operand:V4SF 1 "vfloat_operand" "wf,wa"))) -+ (clobber (match_scratch:V4SF 2 "=&wf,&wa")) -+ (clobber (match_scratch:V4SF 3 "=&wf,&wa"))] -+ "VECTOR_UNIT_VSX_P (V4SFmode)" -+ "#" -+ "" -+ [(const_int 0)] -+ " -+{ -+ rtx op0 = operands[0]; -+ rtx op1 = operands[1]; -+ rtx tmp2, tmp3, tmp4; -+ -+ if (can_create_pseudo_p ()) -+ { -+ tmp2 = gen_reg_rtx (V4SFmode); -+ tmp3 = gen_reg_rtx (V4SFmode); -+ tmp4 = gen_reg_rtx (V4SFmode); -+ } -+ else -+ { -+ tmp2 = operands[2]; -+ tmp3 = operands[3]; -+ tmp4 = tmp2; -+ } -+ -+ emit_insn (gen_vsx_xxsldwi_v4sf (tmp2, op1, op1, const2_rtx)); -+ emit_insn (gen_<VEC_reduc_rtx>v4sf3 (tmp3, tmp2, op1)); -+ emit_insn (gen_vsx_xxsldwi_v4sf (tmp4, tmp3, tmp3, GEN_INT (3))); -+ emit_insn (gen_<VEC_reduc_rtx>v4sf3 (op0, tmp4, tmp3)); -+ DONE; -+}" -+ [(set_attr "length" "16") -+ (set_attr "type" "veccomplex")]) -+ -+;; Combiner patterns with the vector reduction patterns that knows we can get -+;; to the top element of the V2DF array without doing an extract. -+ -+(define_insn_and_split "*vsx_reduc_<VEC_reduc_name>_v2df_scalar" -+ [(set (match_operand:DF 0 "vfloat_operand" "=&ws,&?wa,ws,?wa") -+ (vec_select:DF -+ (VEC_reduc:V2DF -+ (vec_concat:V2DF -+ (vec_select:DF -+ (match_operand:V2DF 1 "vfloat_operand" "wd,wa,wd,wa") -+ (parallel [(const_int 1)])) -+ (vec_select:DF -+ (match_dup 1) -+ (parallel [(const_int 0)]))) -+ (match_dup 1)) -+ (parallel [(const_int 1)]))) -+ (clobber (match_scratch:DF 2 "=0,0,&wd,&wa"))] -+ "VECTOR_UNIT_VSX_P (V2DFmode)" -+ "#" -+ "" -+ [(const_int 0)] -+ " -+{ -+ rtx hi = gen_highpart (DFmode, operands[1]); -+ rtx lo = (GET_CODE (operands[2]) == SCRATCH) -+ ? gen_reg_rtx (DFmode) -+ : operands[2]; -+ -+ emit_insn (gen_vsx_extract_v2df (lo, operands[1], const1_rtx)); -+ emit_insn (gen_<VEC_reduc_rtx>df3 (operands[0], hi, lo)); -+ DONE; -+}" -+ [(set_attr "length" "8") -+ (set_attr "type" "veccomplex")]) -+ -+(define_insn_and_split "*vsx_reduc_<VEC_reduc_name>_v4sf_scalar" -+ [(set (match_operand:SF 0 "vfloat_operand" "=f,?f") -+ (vec_select:SF -+ (VEC_reduc:V4SF -+ (unspec:V4SF [(const_int 0)] UNSPEC_REDUC) -+ (match_operand:V4SF 1 "vfloat_operand" "wf,wa")) -+ (parallel [(const_int 3)]))) -+ (clobber (match_scratch:V4SF 2 "=&wf,&wa")) -+ (clobber (match_scratch:V4SF 3 "=&wf,&wa")) -+ (clobber (match_scratch:V4SF 4 "=0,0"))] -+ "VECTOR_UNIT_VSX_P (V4SFmode)" -+ "#" -+ "" -+ [(const_int 0)] -+ " -+{ -+ rtx op0 = operands[0]; -+ rtx op1 = operands[1]; -+ rtx tmp2, tmp3, tmp4, tmp5; -+ -+ if (can_create_pseudo_p ()) -+ { -+ tmp2 = gen_reg_rtx (V4SFmode); -+ tmp3 = gen_reg_rtx (V4SFmode); -+ tmp4 = gen_reg_rtx (V4SFmode); -+ tmp5 = gen_reg_rtx (V4SFmode); -+ } -+ else -+ { -+ tmp2 = operands[2]; -+ tmp3 = operands[3]; -+ tmp4 = tmp2; -+ tmp5 = operands[4]; -+ } -+ -+ emit_insn (gen_vsx_xxsldwi_v4sf (tmp2, op1, op1, const2_rtx)); -+ emit_insn (gen_<VEC_reduc_rtx>v4sf3 (tmp3, tmp2, op1)); -+ emit_insn (gen_vsx_xxsldwi_v4sf (tmp4, tmp3, tmp3, GEN_INT (3))); -+ emit_insn (gen_<VEC_reduc_rtx>v4sf3 (tmp5, tmp4, tmp3)); -+ emit_insn (gen_vsx_xscvspdp_scalar2 (op0, tmp5)); -+ DONE; -+}" -+ [(set_attr "length" "20") -+ (set_attr "type" "veccomplex")]) - -Property changes on: gcc/config/rs6000/rs6000.h -___________________________________________________________________ -Modified: svn:mergeinfo - Merged /branches/gcc-4_6-branch/gcc/config/rs6000/rs6000.h:r171610-175885 - -Index: gcc/config/rs6000/altivec.md -=================================================================== ---- a/src/gcc/config/rs6000/altivec.md (.../gcc-4_6-branch) -+++ b/src/gcc/config/rs6000/altivec.md (.../ibm/gcc-4_6-branch) -@@ -19,138 +19,130 @@ - ;; along with GCC; see the file COPYING3. If not see - ;; <http://www.gnu.org/licenses/>. - --(define_constants -- ;; 51-62 deleted -- [(UNSPEC_VCMPBFP 64) -- (UNSPEC_VMSUMU 65) -- (UNSPEC_VMSUMM 66) -- (UNSPEC_VMSUMSHM 68) -- (UNSPEC_VMSUMUHS 69) -- (UNSPEC_VMSUMSHS 70) -- (UNSPEC_VMHADDSHS 71) -- (UNSPEC_VMHRADDSHS 72) -- (UNSPEC_VMLADDUHM 73) -- (UNSPEC_VADDCUW 75) -- (UNSPEC_VADDU 76) -- (UNSPEC_VADDS 77) -- (UNSPEC_VAVGU 80) -- (UNSPEC_VAVGS 81) -- (UNSPEC_VMULEUB 83) -- (UNSPEC_VMULESB 84) -- (UNSPEC_VMULEUH 85) -- (UNSPEC_VMULESH 86) -- (UNSPEC_VMULOUB 87) -- (UNSPEC_VMULOSB 88) -- (UNSPEC_VMULOUH 89) -- (UNSPEC_VMULOSH 90) -- (UNSPEC_VPKUHUM 93) -- (UNSPEC_VPKUWUM 94) -- (UNSPEC_VPKPX 95) -- (UNSPEC_VPKSHSS 97) -- (UNSPEC_VPKSWSS 99) -- (UNSPEC_VPKUHUS 100) -- (UNSPEC_VPKSHUS 101) -- (UNSPEC_VPKUWUS 102) -- (UNSPEC_VPKSWUS 103) -- ;; 104 deleted -- (UNSPEC_VSLV4SI 110) -- (UNSPEC_VSLO 111) -- (UNSPEC_VSR 118) -- (UNSPEC_VSRO 119) -- (UNSPEC_VSUBCUW 124) -- (UNSPEC_VSUBU 125) -- (UNSPEC_VSUBS 126) -- (UNSPEC_VSUM4UBS 131) -- (UNSPEC_VSUM4S 132) -- (UNSPEC_VSUM2SWS 134) -- (UNSPEC_VSUMSWS 135) -- (UNSPEC_VPERM 144) -- (UNSPEC_VPERM_UNS 145) -- ;; 148 deleted -- (UNSPEC_VRFIN 149) -- ;; 150 deleted -- (UNSPEC_VCFUX 151) -- (UNSPEC_VCFSX 152) -- (UNSPEC_VCTUXS 153) -- (UNSPEC_VCTSXS 154) -- (UNSPEC_VLOGEFP 155) -- (UNSPEC_VEXPTEFP 156) -- ;; 157-162 deleted -- (UNSPEC_VLSDOI 163) -- (UNSPEC_VUPKHSB 167) -- (UNSPEC_VUPKHPX 168) -- (UNSPEC_VUPKHSH 169) -- (UNSPEC_VUPKLSB 170) -- (UNSPEC_VUPKLPX 171) -- (UNSPEC_VUPKLSH 172) -- ;; 173 deleted -- (UNSPEC_DST 190) -- (UNSPEC_DSTT 191) -- (UNSPEC_DSTST 192) -- (UNSPEC_DSTSTT 193) -- (UNSPEC_LVSL 194) -- (UNSPEC_LVSR 195) -- (UNSPEC_LVE 196) -- (UNSPEC_STVX 201) -- (UNSPEC_STVXL 202) -- (UNSPEC_STVE 203) -- (UNSPEC_SET_VSCR 213) -- (UNSPEC_GET_VRSAVE 214) -- (UNSPEC_LVX 215) -- (UNSPEC_REDUC_PLUS 217) -- (UNSPEC_VECSH 219) -- (UNSPEC_EXTEVEN_V4SI 220) -- (UNSPEC_EXTEVEN_V8HI 221) -- (UNSPEC_EXTEVEN_V16QI 222) -- (UNSPEC_EXTEVEN_V4SF 223) -- (UNSPEC_EXTODD_V4SI 224) -- (UNSPEC_EXTODD_V8HI 225) -- (UNSPEC_EXTODD_V16QI 226) -- (UNSPEC_EXTODD_V4SF 227) -- (UNSPEC_INTERHI_V4SI 228) -- (UNSPEC_INTERHI_V8HI 229) -- (UNSPEC_INTERHI_V16QI 230) -- ;; delete 231 -- (UNSPEC_INTERLO_V4SI 232) -- (UNSPEC_INTERLO_V8HI 233) -- (UNSPEC_INTERLO_V16QI 234) -- ;; delete 235 -- (UNSPEC_LVLX 236) -- (UNSPEC_LVLXL 237) -- (UNSPEC_LVRX 238) -- (UNSPEC_LVRXL 239) -- (UNSPEC_STVLX 240) -- (UNSPEC_STVLXL 241) -- (UNSPEC_STVRX 242) -- (UNSPEC_STVRXL 243) -- (UNSPEC_VMULWHUB 308) -- (UNSPEC_VMULWLUB 309) -- (UNSPEC_VMULWHSB 310) -- (UNSPEC_VMULWLSB 311) -- (UNSPEC_VMULWHUH 312) -- (UNSPEC_VMULWLUH 313) -- (UNSPEC_VMULWHSH 314) -- (UNSPEC_VMULWLSH 315) -- (UNSPEC_VUPKHUB 316) -- (UNSPEC_VUPKHUH 317) -- (UNSPEC_VUPKLUB 318) -- (UNSPEC_VUPKLUH 319) -- (UNSPEC_VPERMSI 320) -- (UNSPEC_VPERMHI 321) -- (UNSPEC_INTERHI 322) -- (UNSPEC_INTERLO 323) -- (UNSPEC_VUPKHS_V4SF 324) -- (UNSPEC_VUPKLS_V4SF 325) -- (UNSPEC_VUPKHU_V4SF 326) -- (UNSPEC_VUPKLU_V4SF 327) -+(define_c_enum "unspec" -+ [UNSPEC_VCMPBFP -+ UNSPEC_VMSUMU -+ UNSPEC_VMSUMM -+ UNSPEC_VMSUMSHM -+ UNSPEC_VMSUMUHS -+ UNSPEC_VMSUMSHS -+ UNSPEC_VMHADDSHS -+ UNSPEC_VMHRADDSHS -+ UNSPEC_VMLADDUHM -+ UNSPEC_VADDCUW -+ UNSPEC_VADDU -+ UNSPEC_VADDS -+ UNSPEC_VAVGU -+ UNSPEC_VAVGS -+ UNSPEC_VMULEUB -+ UNSPEC_VMULESB -+ UNSPEC_VMULEUH -+ UNSPEC_VMULESH -+ UNSPEC_VMULOUB -+ UNSPEC_VMULOSB -+ UNSPEC_VMULOUH -+ UNSPEC_VMULOSH -+ UNSPEC_VPKUHUM -+ UNSPEC_VPKUWUM -+ UNSPEC_VPKPX -+ UNSPEC_VPKSHSS -+ UNSPEC_VPKSWSS -+ UNSPEC_VPKUHUS -+ UNSPEC_VPKSHUS -+ UNSPEC_VPKUWUS -+ UNSPEC_VPKSWUS -+ UNSPEC_VSLV4SI -+ UNSPEC_VSLO -+ UNSPEC_VSR -+ UNSPEC_VSRO -+ UNSPEC_VSUBCUW -+ UNSPEC_VSUBU -+ UNSPEC_VSUBS -+ UNSPEC_VSUM4UBS -+ UNSPEC_VSUM4S -+ UNSPEC_VSUM2SWS -+ UNSPEC_VSUMSWS -+ UNSPEC_VPERM -+ UNSPEC_VPERM_UNS -+ UNSPEC_VRFIN -+ UNSPEC_VCFUX -+ UNSPEC_VCFSX -+ UNSPEC_VCTUXS -+ UNSPEC_VCTSXS -+ UNSPEC_VLOGEFP -+ UNSPEC_VEXPTEFP -+ UNSPEC_VLSDOI -+ UNSPEC_VUPKHSB -+ UNSPEC_VUPKHPX -+ UNSPEC_VUPKHSH -+ UNSPEC_VUPKLSB -+ UNSPEC_VUPKLPX -+ UNSPEC_VUPKLSH -+ UNSPEC_DST -+ UNSPEC_DSTT -+ UNSPEC_DSTST -+ UNSPEC_DSTSTT -+ UNSPEC_LVSL -+ UNSPEC_LVSR -+ UNSPEC_LVE -+ UNSPEC_STVX -+ UNSPEC_STVXL -+ UNSPEC_STVE -+ UNSPEC_SET_VSCR -+ UNSPEC_GET_VRSAVE -+ UNSPEC_LVX -+ UNSPEC_REDUC_PLUS -+ UNSPEC_VECSH -+ UNSPEC_EXTEVEN_V4SI -+ UNSPEC_EXTEVEN_V8HI -+ UNSPEC_EXTEVEN_V16QI -+ UNSPEC_EXTEVEN_V4SF -+ UNSPEC_EXTODD_V4SI -+ UNSPEC_EXTODD_V8HI -+ UNSPEC_EXTODD_V16QI -+ UNSPEC_EXTODD_V4SF -+ UNSPEC_INTERHI_V4SI -+ UNSPEC_INTERHI_V8HI -+ UNSPEC_INTERHI_V16QI -+ UNSPEC_INTERLO_V4SI -+ UNSPEC_INTERLO_V8HI -+ UNSPEC_INTERLO_V16QI -+ UNSPEC_LVLX -+ UNSPEC_LVLXL -+ UNSPEC_LVRX -+ UNSPEC_LVRXL -+ UNSPEC_STVLX -+ UNSPEC_STVLXL -+ UNSPEC_STVRX -+ UNSPEC_STVRXL -+ UNSPEC_VMULWHUB -+ UNSPEC_VMULWLUB -+ UNSPEC_VMULWHSB -+ UNSPEC_VMULWLSB -+ UNSPEC_VMULWHUH -+ UNSPEC_VMULWLUH -+ UNSPEC_VMULWHSH -+ UNSPEC_VMULWLSH -+ UNSPEC_VUPKHUB -+ UNSPEC_VUPKHUH -+ UNSPEC_VUPKLUB -+ UNSPEC_VUPKLUH -+ UNSPEC_VPERMSI -+ UNSPEC_VPERMHI -+ UNSPEC_INTERHI -+ UNSPEC_INTERLO -+ UNSPEC_VUPKHS_V4SF -+ UNSPEC_VUPKLS_V4SF -+ UNSPEC_VUPKHU_V4SF -+ UNSPEC_VUPKLU_V4SF - ]) - --(define_constants -- [(UNSPECV_SET_VRSAVE 30) -- (UNSPECV_MTVSCR 186) -- (UNSPECV_MFVSCR 187) -- (UNSPECV_DSSALL 188) -- (UNSPECV_DSS 189) -+(define_c_enum "unspecv" -+ [UNSPECV_SET_VRSAVE -+ UNSPECV_MTVSCR -+ UNSPECV_MFVSCR -+ UNSPECV_DSSALL -+ UNSPECV_DSS - ]) - - ;; Vec int modes -Index: gcc/config/rs6000/dfp.md -=================================================================== ---- a/src/gcc/config/rs6000/dfp.md (.../gcc-4_6-branch) -+++ b/src/gcc/config/rs6000/dfp.md (.../ibm/gcc-4_6-branch) -@@ -1,5 +1,5 @@ - ;; Decimal Floating Point (DFP) patterns. --;; Copyright (C) 2007, 2008, 2010 -+;; Copyright (C) 2007, 2008, 2010, 2011 - ;; Free Software Foundation, Inc. - ;; Contributed by Ben Elliston (bje@au.ibm.com) and Peter Bergner - ;; (bergner@vnet.ibm.com). -@@ -24,9 +24,9 @@ - ;; UNSPEC usage - ;; - --(define_constants -- [(UNSPEC_MOVSD_LOAD 400) -- (UNSPEC_MOVSD_STORE 401) -+(define_c_enum "unspec" -+ [UNSPEC_MOVSD_LOAD -+ UNSPEC_MOVSD_STORE - ]) - - -Index: gcc/config/rs6000/sync.md -=================================================================== ---- a/src/gcc/config/rs6000/sync.md (.../gcc-4_6-branch) -+++ b/src/gcc/config/rs6000/sync.md (.../ibm/gcc-4_6-branch) -@@ -1,5 +1,6 @@ - ;; Machine description for PowerPC synchronization instructions. --;; Copyright (C) 2005, 2007, 2008, 2009 Free Software Foundation, Inc. -+;; Copyright (C) 2005, 2007, 2008, 2009, 2011 -+;; Free Software Foundation, Inc. - ;; Contributed by Geoffrey Keating. - - ;; This file is part of GCC. -@@ -591,7 +592,7 @@ - - (define_insn "isync" - [(set (mem:BLK (match_scratch 0 "X")) -- (unspec_volatile:BLK [(mem:BLK (match_scratch 1 "X"))] UNSPEC_ISYNC))] -+ (unspec_volatile:BLK [(mem:BLK (match_scratch 1 "X"))] UNSPECV_ISYNC))] - "" - "{ics|isync}" - [(set_attr "type" "isync")]) -@@ -610,7 +611,7 @@ - ; Some AIX assemblers don't accept lwsync, so we use a .long. - (define_insn "lwsync" - [(set (mem:BLK (match_scratch 0 "X")) -- (unspec_volatile:BLK [(mem:BLK (match_scratch 1 "X"))] UNSPEC_LWSYNC))] -+ (unspec_volatile:BLK [(mem:BLK (match_scratch 1 "X"))] UNSPECV_LWSYNC))] - "" - { - if (TARGET_NO_LWSYNC) -Index: gcc/config/rs6000/rs6000.md -=================================================================== ---- a/src/gcc/config/rs6000/rs6000.md (.../gcc-4_6-branch) -+++ b/src/gcc/config/rs6000/rs6000.md (.../ibm/gcc-4_6-branch) -@@ -1,6 +1,6 @@ - ;; Machine description for IBM RISC System 6000 (POWER) for GNU C compiler - ;; Copyright (C) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, --;; 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 -+;; 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 - ;; Free Software Foundation, Inc. - ;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) - -@@ -27,9 +27,14 @@ - ;; - - (define_constants -- [(MQ_REGNO 64) -+ [(STACK_POINTER_REGNUM 1) -+ (TOC_REGNUM 2) -+ (STATIC_CHAIN_REGNUM 11) -+ (HARD_FRAME_POINTER_REGNUM 31) -+ (MQ_REGNO 64) - (LR_REGNO 65) - (CTR_REGNO 66) -+ (ARG_POINTER_REGNUM 67) - (CR0_REGNO 68) - (CR1_REGNO 69) - (CR2_REGNO 70) -@@ -46,83 +51,96 @@ - (VSCR_REGNO 110) - (SPE_ACC_REGNO 111) - (SPEFSCR_REGNO 112) -- (SFP_REGNO 113) -+ (FRAME_POINTER_REGNUM 113) -+ -+ ; ABI defined stack offsets for storing the TOC pointer with AIX calls. -+ (TOC_SAVE_OFFSET_32BIT 20) -+ (TOC_SAVE_OFFSET_64BIT 40) -+ -+ ; Function TOC offset in the AIX function descriptor. -+ (AIX_FUNC_DESC_TOC_32BIT 4) -+ (AIX_FUNC_DESC_TOC_64BIT 8) -+ -+ ; Static chain offset in the AIX function descriptor. -+ (AIX_FUNC_DESC_SC_32BIT 8) -+ (AIX_FUNC_DESC_SC_64BIT 16) - ]) - - ;; - ;; UNSPEC usage - ;; - --(define_constants -- [(UNSPEC_FRSP 0) ; frsp for POWER machines -- (UNSPEC_PROBE_STACK 4) ; probe stack memory reference -- (UNSPEC_TIE 5) ; tie stack contents and stack pointer -- (UNSPEC_TOCPTR 6) ; address of a word pointing to the TOC -- (UNSPEC_TOC 7) ; address of the TOC (more-or-less) -- (UNSPEC_MOVSI_GOT 8) -- (UNSPEC_MV_CR_OV 9) ; move_from_CR_ov_bit -- (UNSPEC_FCTIWZ 10) -- (UNSPEC_FRIM 11) -- (UNSPEC_FRIN 12) -- (UNSPEC_FRIP 13) -- (UNSPEC_FRIZ 14) -- (UNSPEC_LD_MPIC 15) ; load_macho_picbase -- (UNSPEC_MPIC_CORRECT 16) ; macho_correct_pic -- (UNSPEC_TLSGD 17) -- (UNSPEC_TLSLD 18) -- (UNSPEC_MOVESI_FROM_CR 19) -- (UNSPEC_MOVESI_TO_CR 20) -- (UNSPEC_TLSDTPREL 21) -- (UNSPEC_TLSDTPRELHA 22) -- (UNSPEC_TLSDTPRELLO 23) -- (UNSPEC_TLSGOTDTPREL 24) -- (UNSPEC_TLSTPREL 25) -- (UNSPEC_TLSTPRELHA 26) -- (UNSPEC_TLSTPRELLO 27) -- (UNSPEC_TLSGOTTPREL 28) -- (UNSPEC_TLSTLS 29) -- (UNSPEC_FIX_TRUNC_TF 30) ; fadd, rounding towards zero -- (UNSPEC_MV_CR_GT 31) ; move_from_CR_gt_bit -- (UNSPEC_STFIWX 32) -- (UNSPEC_POPCNTB 33) -- (UNSPEC_FRES 34) -- (UNSPEC_SP_SET 35) -- (UNSPEC_SP_TEST 36) -- (UNSPEC_SYNC 37) -- (UNSPEC_LWSYNC 38) -- (UNSPEC_ISYNC 39) -- (UNSPEC_SYNC_OP 40) -- (UNSPEC_ATOMIC 41) -- (UNSPEC_CMPXCHG 42) -- (UNSPEC_XCHG 43) -- (UNSPEC_AND 44) -- (UNSPEC_DLMZB 45) -- (UNSPEC_DLMZB_CR 46) -- (UNSPEC_DLMZB_STRLEN 47) -- (UNSPEC_RSQRT 48) -- (UNSPEC_TOCREL 49) -- (UNSPEC_MACHOPIC_OFFSET 50) -- (UNSPEC_BPERM 51) -- (UNSPEC_COPYSIGN 52) -- (UNSPEC_PARITY 53) -- (UNSPEC_FCTIW 54) -- (UNSPEC_FCTID 55) -- (UNSPEC_LFIWAX 56) -- (UNSPEC_LFIWZX 57) -- (UNSPEC_FCTIWUZ 58) -+(define_c_enum "unspec" -+ [UNSPEC_FRSP ; frsp for POWER machines -+ UNSPEC_PROBE_STACK ; probe stack memory reference -+ UNSPEC_TIE ; tie stack contents and stack pointer -+ UNSPEC_TOCPTR ; address of a word pointing to the TOC -+ UNSPEC_TOC ; address of the TOC (more-or-less) -+ UNSPEC_MOVSI_GOT -+ UNSPEC_MV_CR_OV ; move_from_CR_ov_bit -+ UNSPEC_FCTIWZ -+ UNSPEC_FRIM -+ UNSPEC_FRIN -+ UNSPEC_FRIP -+ UNSPEC_FRIZ -+ UNSPEC_LD_MPIC ; load_macho_picbase -+ UNSPEC_MPIC_CORRECT ; macho_correct_pic -+ UNSPEC_TLSGD -+ UNSPEC_TLSLD -+ UNSPEC_MOVESI_FROM_CR -+ UNSPEC_MOVESI_TO_CR -+ UNSPEC_TLSDTPREL -+ UNSPEC_TLSDTPRELHA -+ UNSPEC_TLSDTPRELLO -+ UNSPEC_TLSGOTDTPREL -+ UNSPEC_TLSTPREL -+ UNSPEC_TLSTPRELHA -+ UNSPEC_TLSTPRELLO -+ UNSPEC_TLSGOTTPREL -+ UNSPEC_TLSTLS -+ UNSPEC_FIX_TRUNC_TF ; fadd, rounding towards zero -+ UNSPEC_MV_CR_GT ; move_from_CR_gt_bit -+ UNSPEC_STFIWX -+ UNSPEC_POPCNTB -+ UNSPEC_FRES -+ UNSPEC_SP_SET -+ UNSPEC_SP_TEST -+ UNSPEC_SYNC -+ UNSPEC_SYNC_OP -+ UNSPEC_ATOMIC -+ UNSPEC_CMPXCHG -+ UNSPEC_XCHG -+ UNSPEC_AND -+ UNSPEC_DLMZB -+ UNSPEC_DLMZB_CR -+ UNSPEC_DLMZB_STRLEN -+ UNSPEC_RSQRT -+ UNSPEC_TOCREL -+ UNSPEC_MACHOPIC_OFFSET -+ UNSPEC_BPERM -+ UNSPEC_COPYSIGN -+ UNSPEC_PARITY -+ UNSPEC_FCTIW -+ UNSPEC_FCTID -+ UNSPEC_LFIWAX -+ UNSPEC_LFIWZX -+ UNSPEC_FCTIWUZ - ]) - - ;; - ;; UNSPEC_VOLATILE usage - ;; - --(define_constants -- [(UNSPECV_BLOCK 0) -- (UNSPECV_LL 1) ; load-locked -- (UNSPECV_SC 2) ; store-conditional -- (UNSPECV_PROBE_STACK_RANGE 3) ; probe range of stack addresses -- (UNSPECV_EH_RR 9) ; eh_reg_restore -+(define_c_enum "unspecv" -+ [UNSPECV_BLOCK -+ UNSPECV_LL ; load-locked -+ UNSPECV_SC ; store-conditional -+ UNSPECV_PROBE_STACK_RANGE ; probe range of stack addresses -+ UNSPECV_EH_RR ; eh_reg_restore -+ UNSPECV_ISYNC ; isync instruction -+ UNSPECV_LWSYNC ; lwsync - ]) -+ - - ;; Define an insn type attribute. This is used in function unit delay - ;; computations. -@@ -266,6 +284,9 @@ - (define_mode_attr mptrsize [(SI "si") - (DI "di")]) - -+(define_mode_attr ptrload [(SI "{l|lwz}") -+ (DI "ld")]) -+ - (define_mode_attr rreg [(SF "f") - (DF "ws") - (V4SF "wf") -@@ -9644,6 +9665,27 @@ - [(set_attr "type" "two,load,store,*,*,*") - (set_attr "length" "8,8,8,8,12,16")]) - -+;; Reload patterns to support gpr load/store with misaligned mem. -+(define_expand "reload_di_store" -+ [(parallel [(match_operand 0 "memory_operand" "=m") -+ (match_operand 1 "gpc_reg_operand" "r") -+ (match_operand:DI 2 "register_operand" "=&b")])] -+ "TARGET_POWERPC64" -+{ -+ rs6000_secondary_reload_ppc64 (operands[1], operands[0], operands[2], true); -+ DONE; -+}) -+ -+(define_expand "reload_di_load" -+ [(parallel [(match_operand 0 "gpc_reg_operand" "=r") -+ (match_operand 1 "memory_operand" "m") -+ (match_operand:DI 2 "register_operand" "=b")])] -+ "TARGET_POWERPC64" -+{ -+ rs6000_secondary_reload_ppc64 (operands[0], operands[1], operands[2], false); -+ DONE; -+}) -+ - ; ld/std require word-aligned displacements -> 'Y' constraint. - ; List Y->r and r->Y before r->r for reload. - (define_insn "*movdf_hardfloat64_mfpgpr" -@@ -12156,87 +12198,7 @@ - "TARGET_ELF && TARGET_CMODEL != CMODEL_SMALL" - "{cal %0,%2@l(%1)|addi %0,%1,%2@l}") - --;; A function pointer under AIX is a pointer to a data area whose first word --;; contains the actual address of the function, whose second word contains a --;; pointer to its TOC, and whose third word contains a value to place in the --;; static chain register (r11). Note that if we load the static chain, our --;; "trampoline" need not have any executable code. -- --(define_expand "call_indirect_aix32" -- [(set (match_dup 2) -- (mem:SI (match_operand:SI 0 "gpc_reg_operand" ""))) -- (set (mem:SI (plus:SI (reg:SI 1) (const_int 20))) -- (reg:SI 2)) -- (set (reg:SI 11) -- (mem:SI (plus:SI (match_dup 0) -- (const_int 8)))) -- (parallel [(call (mem:SI (match_dup 2)) -- (match_operand 1 "" "")) -- (use (mem:SI (plus:SI (match_dup 0) (const_int 4)))) -- (use (reg:SI 11)) -- (use (mem:SI (plus:SI (reg:SI 1) (const_int 20)))) -- (clobber (reg:SI LR_REGNO))])] -- "TARGET_32BIT" -- " --{ operands[2] = gen_reg_rtx (SImode); }") -- --(define_expand "call_indirect_aix64" -- [(set (match_dup 2) -- (mem:DI (match_operand:DI 0 "gpc_reg_operand" ""))) -- (set (mem:DI (plus:DI (reg:DI 1) (const_int 40))) -- (reg:DI 2)) -- (set (reg:DI 11) -- (mem:DI (plus:DI (match_dup 0) -- (const_int 16)))) -- (parallel [(call (mem:SI (match_dup 2)) -- (match_operand 1 "" "")) -- (use (mem:DI (plus:DI (match_dup 0) (const_int 8)))) -- (use (reg:DI 11)) -- (use (mem:DI (plus:DI (reg:DI 1) (const_int 40)))) -- (clobber (reg:SI LR_REGNO))])] -- "TARGET_64BIT" -- " --{ operands[2] = gen_reg_rtx (DImode); }") -- --(define_expand "call_value_indirect_aix32" -- [(set (match_dup 3) -- (mem:SI (match_operand:SI 1 "gpc_reg_operand" ""))) -- (set (mem:SI (plus:SI (reg:SI 1) (const_int 20))) -- (reg:SI 2)) -- (set (reg:SI 11) -- (mem:SI (plus:SI (match_dup 1) -- (const_int 8)))) -- (parallel [(set (match_operand 0 "" "") -- (call (mem:SI (match_dup 3)) -- (match_operand 2 "" ""))) -- (use (mem:SI (plus:SI (match_dup 1) (const_int 4)))) -- (use (reg:SI 11)) -- (use (mem:SI (plus:SI (reg:SI 1) (const_int 20)))) -- (clobber (reg:SI LR_REGNO))])] -- "TARGET_32BIT" -- " --{ operands[3] = gen_reg_rtx (SImode); }") -- --(define_expand "call_value_indirect_aix64" -- [(set (match_dup 3) -- (mem:DI (match_operand:DI 1 "gpc_reg_operand" ""))) -- (set (mem:DI (plus:DI (reg:DI 1) (const_int 40))) -- (reg:DI 2)) -- (set (reg:DI 11) -- (mem:DI (plus:DI (match_dup 1) -- (const_int 16)))) -- (parallel [(set (match_operand 0 "" "") -- (call (mem:SI (match_dup 3)) -- (match_operand 2 "" ""))) -- (use (mem:DI (plus:DI (match_dup 1) (const_int 8)))) -- (use (reg:DI 11)) -- (use (mem:DI (plus:DI (reg:DI 1) (const_int 40)))) -- (clobber (reg:SI LR_REGNO))])] -- "TARGET_64BIT" -- " --{ operands[3] = gen_reg_rtx (DImode); }") -- --;; Now the definitions for the call and call_value insns -+;; Call and call_value insns - (define_expand "call" - [(parallel [(call (mem:SI (match_operand 0 "address_operand" "")) - (match_operand 1 "" "")) -@@ -12272,13 +12234,7 @@ - case ABI_AIX: - /* AIX function pointers are really pointers to a three word - area. */ -- emit_call_insn (TARGET_32BIT -- ? gen_call_indirect_aix32 (force_reg (SImode, -- operands[0]), -- operands[1]) -- : gen_call_indirect_aix64 (force_reg (DImode, -- operands[0]), -- operands[1])); -+ rs6000_call_indirect_aix (NULL_RTX, operands[0], operands[1]); - DONE; - - default: -@@ -12323,15 +12279,7 @@ - case ABI_AIX: - /* AIX function pointers are really pointers to a three word - area. */ -- emit_call_insn (TARGET_32BIT -- ? gen_call_value_indirect_aix32 (operands[0], -- force_reg (SImode, -- operands[1]), -- operands[2]) -- : gen_call_value_indirect_aix64 (operands[0], -- force_reg (DImode, -- operands[1]), -- operands[2])); -+ rs6000_call_indirect_aix (operands[0], operands[1], operands[2]); - DONE; - - default: -@@ -12425,149 +12373,202 @@ - [(set_attr "type" "branch") - (set_attr "length" "4,8")]) - --;; Call to function which may be in another module. Restore the TOC --;; pointer (r2) after the call unless this is System V. --;; Operand2 is nonzero if we are using the V.4 calling sequence and --;; either the function was not prototyped, or it was prototyped as a --;; variable argument function. It is > 0 if FP registers were passed --;; and < 0 if they were not. -+;; Call to indirect functions with the AIX abi using a 3 word descriptor. -+;; Operand0 is the addresss of the function to call -+;; Operand1 is the flag for System V.4 for unprototyped or FP registers -+;; Operand2 is the location in the function descriptor to load r2 from -+;; Operand3 is the stack location to hold the current TOC pointer - --(define_insn_and_split "*call_indirect_nonlocal_aix32_internal" -- [(call (mem:SI (match_operand:SI 0 "register_operand" "c,*l")) -- (match_operand 1 "" "g,g")) -- (use (mem:SI (plus:SI (match_operand:SI 2 "register_operand" "b,b") (const_int 4)))) -- (use (reg:SI 11)) -- (use (mem:SI (plus:SI (reg:SI 1) (const_int 20)))) -- (clobber (reg:SI LR_REGNO))] -- "TARGET_32BIT && DEFAULT_ABI == ABI_AIX" -+(define_insn_and_split "call_indirect_aix<ptrsize>" -+ [(call (mem:SI (match_operand:P 0 "register_operand" "c,*l")) -+ (match_operand 1 "" "g,g")) -+ (use (match_operand:P 2 "memory_operand" "m,m")) -+ (use (match_operand:P 3 "memory_operand" "m,m")) -+ (use (reg:P STATIC_CHAIN_REGNUM)) -+ (clobber (reg:P LR_REGNO))] -+ "DEFAULT_ABI == ABI_AIX && TARGET_R11" - "#" - "&& reload_completed" -- [(set (reg:SI 2) -- (mem:SI (plus:SI (match_dup 2) (const_int 4)))) -+ [(set (reg:P TOC_REGNUM) (match_dup 2)) - (parallel [(call (mem:SI (match_dup 0)) - (match_dup 1)) -- (use (reg:SI 2)) -- (use (reg:SI 11)) -- (set (reg:SI 2) -- (mem:SI (plus:SI (reg:SI 1) (const_int 20)))) -- (clobber (reg:SI LR_REGNO))])] -+ (use (reg:P TOC_REGNUM)) -+ (use (reg:P STATIC_CHAIN_REGNUM)) -+ (use (match_dup 3)) -+ (set (reg:P TOC_REGNUM) (match_dup 3)) -+ (clobber (reg:P LR_REGNO))])] - "" - [(set_attr "type" "jmpreg") - (set_attr "length" "12")]) - --(define_insn "*call_indirect_nonlocal_aix32" -- [(call (mem:SI (match_operand:SI 0 "register_operand" "c,*l")) -+(define_insn "*call_indirect_aix<ptrsize>_internal" -+ [(call (mem:SI (match_operand:P 0 "register_operand" "c,*l")) - (match_operand 1 "" "g,g")) -- (use (reg:SI 2)) -- (use (reg:SI 11)) -- (set (reg:SI 2) -- (mem:SI (plus:SI (reg:SI 1) (const_int 20)))) -- (clobber (reg:SI LR_REGNO))] -- "TARGET_32BIT && DEFAULT_ABI == ABI_AIX && reload_completed" -- "b%T0l\;{l|lwz} 2,20(1)" -+ (use (reg:P TOC_REGNUM)) -+ (use (reg:P STATIC_CHAIN_REGNUM)) -+ (use (match_operand:P 2 "memory_operand" "m,m")) -+ (set (reg:P TOC_REGNUM) (match_dup 2)) -+ (clobber (reg:P LR_REGNO))] -+ "DEFAULT_ABI == ABI_AIX && reload_completed && TARGET_R11" -+ "b%T0l\;<ptrload> 2,%2" - [(set_attr "type" "jmpreg") - (set_attr "length" "8")]) - --(define_insn "*call_nonlocal_aix32" -- [(call (mem:SI (match_operand:SI 0 "symbol_ref_operand" "s")) -- (match_operand 1 "" "g")) -- (use (match_operand:SI 2 "immediate_operand" "O")) -- (clobber (reg:SI LR_REGNO))] -- "TARGET_32BIT -- && DEFAULT_ABI == ABI_AIX -- && (INTVAL (operands[2]) & CALL_LONG) == 0" -- "bl %z0\;%." -- [(set_attr "type" "branch") -- (set_attr "length" "8")]) -- --(define_insn_and_split "*call_indirect_nonlocal_aix64_internal" -- [(call (mem:SI (match_operand:DI 0 "register_operand" "c,*l")) -- (match_operand 1 "" "g,g")) -- (use (mem:DI (plus:DI (match_operand:DI 2 "register_operand" "b,b") -- (const_int 8)))) -- (use (reg:DI 11)) -- (use (mem:DI (plus:DI (reg:DI 1) (const_int 40)))) -- (clobber (reg:SI LR_REGNO))] -- "TARGET_64BIT && DEFAULT_ABI == ABI_AIX" -+;; Like call_indirect_aix<ptrsize>, except don't load the static chain -+;; Operand0 is the addresss of the function to call -+;; Operand1 is the flag for System V.4 for unprototyped or FP registers -+;; Operand2 is the location in the function descriptor to load r2 from -+;; Operand3 is the stack location to hold the current TOC pointer -+ -+(define_insn_and_split "call_indirect_aix<ptrsize>_nor11" -+ [(call (mem:SI (match_operand:P 0 "register_operand" "c,*l")) -+ (match_operand 1 "" "g,g")) -+ (use (match_operand:P 2 "memory_operand" "m,m")) -+ (use (match_operand:P 3 "memory_operand" "m,m")) -+ (clobber (reg:P LR_REGNO))] -+ "DEFAULT_ABI == ABI_AIX && !TARGET_R11" - "#" - "&& reload_completed" -- [(set (reg:DI 2) -- (mem:DI (plus:DI (match_dup 2) (const_int 8)))) -+ [(set (reg:P TOC_REGNUM) (match_dup 2)) - (parallel [(call (mem:SI (match_dup 0)) - (match_dup 1)) -- (use (reg:DI 2)) -- (use (reg:DI 11)) -- (set (reg:DI 2) -- (mem:DI (plus:DI (reg:DI 1) (const_int 40)))) -- (clobber (reg:SI LR_REGNO))])] -+ (use (reg:P TOC_REGNUM)) -+ (use (match_dup 3)) -+ (set (reg:P TOC_REGNUM) (match_dup 3)) -+ (clobber (reg:P LR_REGNO))])] - "" - [(set_attr "type" "jmpreg") - (set_attr "length" "12")]) - --(define_insn "*call_indirect_nonlocal_aix64" -- [(call (mem:SI (match_operand:DI 0 "register_operand" "c,*l")) -+(define_insn "*call_indirect_aix<ptrsize>_internal2" -+ [(call (mem:SI (match_operand:P 0 "register_operand" "c,*l")) - (match_operand 1 "" "g,g")) -- (use (reg:DI 2)) -- (use (reg:DI 11)) -- (set (reg:DI 2) -- (mem:DI (plus:DI (reg:DI 1) (const_int 40)))) -- (clobber (reg:SI LR_REGNO))] -- "TARGET_64BIT && DEFAULT_ABI == ABI_AIX && reload_completed" -- "b%T0l\;ld 2,40(1)" -+ (use (reg:P TOC_REGNUM)) -+ (use (match_operand:P 2 "memory_operand" "m,m")) -+ (set (reg:P TOC_REGNUM) (match_dup 2)) -+ (clobber (reg:P LR_REGNO))] -+ "DEFAULT_ABI == ABI_AIX && reload_completed && !TARGET_R11" -+ "b%T0l\;<ptrload> 2,%2" - [(set_attr "type" "jmpreg") - (set_attr "length" "8")]) - --(define_insn "*call_nonlocal_aix64" -- [(call (mem:SI (match_operand:DI 0 "symbol_ref_operand" "s")) -- (match_operand 1 "" "g")) -- (use (match_operand:SI 2 "immediate_operand" "O")) -- (clobber (reg:SI LR_REGNO))] -- "TARGET_64BIT -- && DEFAULT_ABI == ABI_AIX -- && (INTVAL (operands[2]) & CALL_LONG) == 0" -- "bl %z0\;%." -- [(set_attr "type" "branch") -+;; Operand0 is the return result of the function -+;; Operand1 is the addresss of the function to call -+;; Operand2 is the flag for System V.4 for unprototyped or FP registers -+;; Operand3 is the location in the function descriptor to load r2 from -+;; Operand4 is the stack location to hold the current TOC pointer -+ -+(define_insn_and_split "call_value_indirect_aix<ptrsize>" -+ [(set (match_operand 0 "" "") -+ (call (mem:SI (match_operand:P 1 "register_operand" "c,*l")) -+ (match_operand 2 "" "g,g"))) -+ (use (match_operand:P 3 "memory_operand" "m,m")) -+ (use (match_operand:P 4 "memory_operand" "m,m")) -+ (use (reg:P STATIC_CHAIN_REGNUM)) -+ (clobber (reg:P LR_REGNO))] -+ "DEFAULT_ABI == ABI_AIX && TARGET_R11" -+ "#" -+ "&& reload_completed" -+ [(set (reg:P TOC_REGNUM) (match_dup 3)) -+ (parallel [(set (match_dup 0) -+ (call (mem:SI (match_dup 1)) -+ (match_dup 2))) -+ (use (reg:P TOC_REGNUM)) -+ (use (reg:P STATIC_CHAIN_REGNUM)) -+ (use (match_dup 4)) -+ (set (reg:P TOC_REGNUM) (match_dup 4)) -+ (clobber (reg:P LR_REGNO))])] -+ "" -+ [(set_attr "type" "jmpreg") -+ (set_attr "length" "12")]) -+ -+(define_insn "*call_value_indirect_aix<ptrsize>_internal" -+ [(set (match_operand 0 "" "") -+ (call (mem:SI (match_operand:P 1 "register_operand" "c,*l")) -+ (match_operand 2 "" "g,g"))) -+ (use (reg:P TOC_REGNUM)) -+ (use (reg:P STATIC_CHAIN_REGNUM)) -+ (use (match_operand:P 3 "memory_operand" "m,m")) -+ (set (reg:P TOC_REGNUM) (match_dup 3)) -+ (clobber (reg:P LR_REGNO))] -+ "DEFAULT_ABI == ABI_AIX && reload_completed && TARGET_R11" -+ "b%T1l\;<ptrload> 2,%3" -+ [(set_attr "type" "jmpreg") - (set_attr "length" "8")]) - --(define_insn_and_split "*call_value_indirect_nonlocal_aix32_internal" -+;; Like call_value_indirect_aix<ptrsize>, but don't load the static chain -+;; Operand0 is the return result of the function -+;; Operand1 is the addresss of the function to call -+;; Operand2 is the flag for System V.4 for unprototyped or FP registers -+;; Operand3 is the location in the function descriptor to load r2 from -+;; Operand4 is the stack location to hold the current TOC pointer -+ -+(define_insn_and_split "call_value_indirect_aix<ptrsize>_nor11" - [(set (match_operand 0 "" "") -- (call (mem:SI (match_operand:SI 1 "register_operand" "c,*l")) -- (match_operand 2 "" "g,g"))) -- (use (mem:SI (plus:SI (match_operand:SI 3 "register_operand" "b,b") -- (const_int 4)))) -- (use (reg:SI 11)) -- (use (mem:SI (plus:SI (reg:SI 1) (const_int 20)))) -- (clobber (reg:SI LR_REGNO))] -- "TARGET_32BIT && DEFAULT_ABI == ABI_AIX" -+ (call (mem:SI (match_operand:P 1 "register_operand" "c,*l")) -+ (match_operand 2 "" "g,g"))) -+ (use (match_operand:P 3 "memory_operand" "m,m")) -+ (use (match_operand:P 4 "memory_operand" "m,m")) -+ (clobber (reg:P LR_REGNO))] -+ "DEFAULT_ABI == ABI_AIX && !TARGET_R11" - "#" - "&& reload_completed" -- [(set (reg:SI 2) -- (mem:SI (plus:SI (match_dup 3) (const_int 4)))) -- (parallel [(set (match_dup 0) (call (mem:SI (match_dup 1)) -- (match_dup 2))) -- (use (reg:SI 2)) -- (use (reg:SI 11)) -- (set (reg:SI 2) -- (mem:SI (plus:SI (reg:SI 1) (const_int 20)))) -- (clobber (reg:SI LR_REGNO))])] -+ [(set (reg:P TOC_REGNUM) (match_dup 3)) -+ (parallel [(set (match_dup 0) -+ (call (mem:SI (match_dup 1)) -+ (match_dup 2))) -+ (use (reg:P TOC_REGNUM)) -+ (use (match_dup 4)) -+ (set (reg:P TOC_REGNUM) (match_dup 4)) -+ (clobber (reg:P LR_REGNO))])] - "" - [(set_attr "type" "jmpreg") - (set_attr "length" "12")]) - --(define_insn "*call_value_indirect_nonlocal_aix32" -+(define_insn "*call_value_indirect_aix<ptrsize>_internal2" - [(set (match_operand 0 "" "") -- (call (mem:SI (match_operand:SI 1 "register_operand" "c,*l")) -+ (call (mem:SI (match_operand:P 1 "register_operand" "c,*l")) - (match_operand 2 "" "g,g"))) -- (use (reg:SI 2)) -- (use (reg:SI 11)) -- (set (reg:SI 2) -- (mem:SI (plus:SI (reg:SI 1) (const_int 20)))) -- (clobber (reg:SI LR_REGNO))] -- "TARGET_32BIT && DEFAULT_ABI == ABI_AIX && reload_completed" -- "b%T1l\;{l|lwz} 2,20(1)" -+ (use (reg:P TOC_REGNUM)) -+ (use (match_operand:P 3 "memory_operand" "m,m")) -+ (set (reg:P TOC_REGNUM) (match_dup 3)) -+ (clobber (reg:P LR_REGNO))] -+ "DEFAULT_ABI == ABI_AIX && reload_completed && !TARGET_R11" -+ "b%T1l\;<ptrload> 2,%3" - [(set_attr "type" "jmpreg") - (set_attr "length" "8")]) - -+;; Call to function which may be in another module. Restore the TOC -+;; pointer (r2) after the call unless this is System V. -+;; Operand2 is nonzero if we are using the V.4 calling sequence and -+;; either the function was not prototyped, or it was prototyped as a -+;; variable argument function. It is > 0 if FP registers were passed -+;; and < 0 if they were not. -+ -+(define_insn "*call_nonlocal_aix32" -+ [(call (mem:SI (match_operand:SI 0 "symbol_ref_operand" "s")) -+ (match_operand 1 "" "g")) -+ (use (match_operand:SI 2 "immediate_operand" "O")) -+ (clobber (reg:SI LR_REGNO))] -+ "TARGET_32BIT -+ && DEFAULT_ABI == ABI_AIX -+ && (INTVAL (operands[2]) & CALL_LONG) == 0" -+ "bl %z0\;%." -+ [(set_attr "type" "branch") -+ (set_attr "length" "8")]) -+ -+(define_insn "*call_nonlocal_aix64" -+ [(call (mem:SI (match_operand:DI 0 "symbol_ref_operand" "s")) -+ (match_operand 1 "" "g")) -+ (use (match_operand:SI 2 "immediate_operand" "O")) -+ (clobber (reg:SI LR_REGNO))] -+ "TARGET_64BIT -+ && DEFAULT_ABI == ABI_AIX -+ && (INTVAL (operands[2]) & CALL_LONG) == 0" -+ "bl %z0\;%." -+ [(set_attr "type" "branch") -+ (set_attr "length" "8")]) -+ - (define_insn "*call_value_nonlocal_aix32" - [(set (match_operand 0 "" "") - (call (mem:SI (match_operand:SI 1 "symbol_ref_operand" "s")) -@@ -12581,45 +12582,6 @@ - [(set_attr "type" "branch") - (set_attr "length" "8")]) - --(define_insn_and_split "*call_value_indirect_nonlocal_aix64_internal" -- [(set (match_operand 0 "" "") -- (call (mem:SI (match_operand:DI 1 "register_operand" "c,*l")) -- (match_operand 2 "" "g,g"))) -- (use (mem:DI (plus:DI (match_operand:DI 3 "register_operand" "b,b") -- (const_int 8)))) -- (use (reg:DI 11)) -- (use (mem:DI (plus:DI (reg:DI 1) (const_int 40)))) -- (clobber (reg:SI LR_REGNO))] -- "TARGET_64BIT && DEFAULT_ABI == ABI_AIX" -- "#" -- "&& reload_completed" -- [(set (reg:DI 2) -- (mem:DI (plus:DI (match_dup 3) (const_int 8)))) -- (parallel [(set (match_dup 0) (call (mem:SI (match_dup 1)) -- (match_dup 2))) -- (use (reg:DI 2)) -- (use (reg:DI 11)) -- (set (reg:DI 2) -- (mem:DI (plus:DI (reg:DI 1) (const_int 40)))) -- (clobber (reg:SI LR_REGNO))])] -- "" -- [(set_attr "type" "jmpreg") -- (set_attr "length" "12")]) -- --(define_insn "*call_value_indirect_nonlocal_aix64" -- [(set (match_operand 0 "" "") -- (call (mem:SI (match_operand:DI 1 "register_operand" "c,*l")) -- (match_operand 2 "" "g,g"))) -- (use (reg:DI 2)) -- (use (reg:DI 11)) -- (set (reg:DI 2) -- (mem:DI (plus:DI (reg:DI 1) (const_int 40)))) -- (clobber (reg:SI LR_REGNO))] -- "TARGET_64BIT && DEFAULT_ABI == ABI_AIX && reload_completed" -- "b%T1l\;ld 2,40(1)" -- [(set_attr "type" "jmpreg") -- (set_attr "length" "8")]) -- - (define_insn "*call_value_nonlocal_aix64" - [(set (match_operand 0 "" "") - (call (mem:SI (match_operand:DI 1 "symbol_ref_operand" "s")) -Index: gcc/stmt.c -=================================================================== ---- a/src/gcc/stmt.c (.../gcc-4_6-branch) -+++ b/src/gcc/stmt.c (.../ibm/gcc-4_6-branch) -@@ -53,6 +53,7 @@ - #include "alloc-pool.h" - #include "pretty-print.h" - #include "bitmap.h" -+#include "params.h" - - - /* Functions and data structures for expanding case statements. */ -@@ -2270,6 +2271,20 @@ - || (uniq == 3 && count >= 6))); - } - -+/* Return the smallest number of different values for which it is best to use a -+ jump-table instead of a tree of conditional branches. */ -+ -+static unsigned int -+case_values_threshold (void) -+{ -+ unsigned int threshold = PARAM_VALUE (PARAM_CASE_VALUES_THRESHOLD); -+ -+ if (threshold == 0) -+ threshold = targetm.case_values_threshold (); -+ -+ return threshold; -+} -+ - /* Terminate a case (Pascal/Ada) or switch (C) statement - in which ORIG_INDEX is the expression to be tested. - If ORIG_TYPE is not NULL, it is the original ORIG_INDEX -@@ -2424,7 +2439,7 @@ - If the switch-index is a constant, do it this way - because we can optimize it. */ - -- else if (count < targetm.case_values_threshold () -+ else if (count < case_values_threshold () - || compare_tree_int (range, - (optimize_insn_for_size_p () ? 3 : 10) * count) > 0 - /* RANGE may be signed, and really large ranges will show up -Index: gcc/params.def -=================================================================== ---- a/src/gcc/params.def (.../gcc-4_6-branch) -+++ b/src/gcc/params.def (.../ibm/gcc-4_6-branch) -@@ -883,6 +883,16 @@ - "name lookup fails", - 1000, 0, 0) - -+/* Override CASE_VALUES_THRESHOLD of when to switch from doing switch -+ statements via if statements to using a table jump operation. If the value -+ is 0, the default CASE_VALUES_THRESHOLD will be used. */ -+DEFPARAM (PARAM_CASE_VALUES_THRESHOLD, -+ "case-values-threshold", -+ "The smallest number of different values for which it is best to " -+ "use a jump-table instead of a tree of conditional branches, " -+ "if 0, use the default for the machine", -+ 0, 0, 0) -+ - /* - Local variables: - mode:c -Index: libcpp/ChangeLog.ibm -=================================================================== ---- a/src/libcpp/ChangeLog.ibm (.../gcc-4_6-branch) -+++ b/src/libcpp/ChangeLog.ibm (.../ibm/gcc-4_6-branch) -@@ -0,0 +1,10 @@ -+2011-04-28 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Merge up to 173137. -+ -+2011-03-28 Michael Meissner <meissner@linux.vnet.ibm.com> -+ -+ Branch from gcc-4_6-branch, subversion id 171614. -+ -+ -+ - -Property changes on: . -___________________________________________________________________ -Modified: svn:mergeinfo - Merged /branches/gcc-4_6-branch:r171610-175885 -Added: svnmerge-integrated - + /branches/gcc-4_6-branch:1-175885 - diff --git a/debian/patches/libjava-disable-static.diff b/debian/patches/libjava-disable-static.diff deleted file mode 100644 index 325cb87..0000000 --- a/debian/patches/libjava-disable-static.diff +++ /dev/null @@ -1,26 +0,0 @@ -# DP: Disable building the static libjava. - ---- - Makefile.in | 4 ++-- - 1 files changed, 2 insertions(+), 2 deletions(-) - ---- a/src/Makefile.in -+++ b/src/Makefile.in -@@ -54431,7 +54431,7 @@ - rm -f no-such-file || : ; \ - CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ - $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ -- --target=${target_alias} $${srcdiroption} \ -+ --target=${target_alias} --disable-static $${srcdiroption} \ - || exit 1 - @endif target-libjava - -@@ -55345,7 +55345,7 @@ - rm -f no-such-file || : ; \ - CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ - $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ -- --target=${target_alias} $${srcdiroption} \ -+ --target=${target_alias} --disable-static $${srcdiroption} \ - || exit 1 - @endif target-boehm-gc - diff --git a/debian/patches/libjava-multiarch.diff b/debian/patches/libjava-multiarch.diff index 9719e00..e777bf7 100644 --- a/debian/patches/libjava-multiarch.diff +++ b/debian/patches/libjava-multiarch.diff @@ -31,7 +31,7 @@ -DPATH_SEPARATOR="\"$(CLASSPATH_SEPARATOR)\"" \ -DECJ_JAR_FILE="\"$(ECJ_JAR)\"" \ - -DLIBGCJ_DEFAULT_DATABASE="\"$(dbexecdir)/$(db_name)\"" \ -+ -DLIBGCJ_DEFAULT_DATABASE="\"/var/lib/$(MULTIARCH_DIR)/gcj-4.6/$(db_name)\"" \ ++ -DLIBGCJ_DEFAULT_DATABASE="\"/var/lib/$(MULTIARCH_DIR)/gcj-4.7/$(db_name)\"" \ -DLIBGCJ_DEFAULT_DATABASE_PATH_TAIL="\"$(db_pathtail)\"" AM_GCJFLAGS = \ @@ -42,7 +42,7 @@ -DPATH_SEPARATOR="\"$(CLASSPATH_SEPARATOR)\"" \ -DECJ_JAR_FILE="\"$(ECJ_JAR)\"" \ - -DLIBGCJ_DEFAULT_DATABASE="\"$(dbexecdir)/$(db_name)\"" \ -+ -DLIBGCJ_DEFAULT_DATABASE="\"/var/lib/$(MULTIARCH_DIR)/gcj-4.6/$(db_name)\"" \ ++ -DLIBGCJ_DEFAULT_DATABASE="\"/var/lib/$(MULTIARCH_DIR)/gcj-4.7/$(db_name)\"" \ -DLIBGCJ_DEFAULT_DATABASE_PATH_TAIL="\"$(db_pathtail)\"" AM_GCJFLAGS = \ diff --git a/debian/patches/libstdc++-man-3cxx.diff b/debian/patches/libstdc++-man-3cxx.diff index 56ba16e..6d6ceaf 100644 --- a/debian/patches/libstdc++-man-3cxx.diff +++ b/debian/patches/libstdc++-man-3cxx.diff @@ -1,8 +1,10 @@ # DP: Install libstdc++ man pages with suffix .3cxx instead of .3 +Index: b/src/libstdc++-v3/doc/doxygen/user.cfg.in +=================================================================== --- a/src/libstdc++-v3/doc/doxygen/user.cfg.in +++ b/src/libstdc++-v3/doc/doxygen/user.cfg.in -@@ -1388,7 +1388,7 @@ +@@ -1478,7 +1478,7 @@ # The MAN_EXTENSION tag determines the extension that is added to # the generated man pages (default is the subroutine's section .3) @@ -11,6 +13,8 @@ # If the MAN_LINKS tag is set to YES and Doxygen generates man output, # then it will generate one additional man file for each entity +Index: b/src/libstdc++-v3/scripts/run_doxygen +=================================================================== --- a/src/libstdc++-v3/scripts/run_doxygen +++ b/src/libstdc++-v3/scripts/run_doxygen @@ -235,6 +235,7 @@ @@ -32,10 +36,10 @@ oldh=`sed -n '/fC#include </s/.*<\(.*\)>.*/\1/p' $f` @@ -269,7 +270,7 @@ # Some of the pages for generated modules have text that confuses certain - # implementations of man(1), e.g., Linux's. We need to have another top-level - # *roff tag to /stop/ the .SH NAME entry. + # implementations of man(1), e.g. on GNU/Linux. We need to have another + # top-level *roff tag to /stop/ the .SH NAME entry. -problematic=`egrep --files-without-match '^\.SH SYNOPSIS' [A-Z]*.3` -+problematic=`egrep --files-without-match '^\.SH SYNOPSIS' [A-Z]*.3 [A-Z]*.3cxx` ++problematic=`egrep --files-without-match '^\.SH SYNOPSIS' [A-Z]*.3cxx` #problematic='Containers.3 Sequences.3 Assoc_containers.3 Iterator_types.3' for f in $problematic; do @@ -48,7 +52,7 @@ for f in $problematic; do sed 's/Definition at line/\ .PP\ -@@ -388,8 +389,8 @@ +@@ -383,8 +384,8 @@ istringstream ostringstream stringstream filebuf ifstream \ ofstream fstream string; do diff --git a/debian/patches/mudflap-varargs.diff b/debian/patches/mudflap-varargs.diff deleted file mode 100644 index ef6386e..0000000 --- a/debian/patches/mudflap-varargs.diff +++ /dev/null @@ -1,21 +0,0 @@ -# DP: Add mudflap support for varargs - -From: Michael Matz <matz@suse.de> -Subject: Fix pass49-frag (mudflap support for varargs) - - * builtins.c (build_va_arg_indirect_ref): Use - build_simple_mem_ref_loc. - -Index: builtins.c -=================================================================== ---- a/src/gcc/builtins.c (revision 171675) -+++ b/src/gcc/builtins.c (working copy) -@@ -4748,7 +4748,7 @@ std_gimplify_va_arg_expr (tree valist, t - tree - build_va_arg_indirect_ref (tree addr) - { -- addr = build_fold_indirect_ref_loc (EXPR_LOCATION (addr), addr); -+ addr = build_simple_mem_ref_loc (EXPR_LOCATION (addr), addr); - - if (flag_mudflap) /* Don't instrument va_arg INDIRECT_REF. */ - mf_mark (addr); diff --git a/debian/patches/no_fpr_in_libgcc.diff b/debian/patches/no_fpr_in_libgcc.diff deleted file mode 100644 index f88cdb9..0000000 --- a/debian/patches/no_fpr_in_libgcc.diff +++ /dev/null @@ -1,49 +0,0 @@ -# DP: It does not really harm by including them since nobody should use them -# DP: but gas does not wont to assmebly hard float since they are not -# DP: available on this cpu. Upstream did not respond. - ---- a/src/gcc/config/rs6000/crtresfpr.asm -+++ b/src/gcc/config/rs6000/crtresfpr.asm -@@ -33,6 +33,7 @@ - - /* On PowerPC64 Linux, these functions are provided by the linker. */ - #ifndef __powerpc64__ -+#ifndef __NO_FPRS__ - - /* Routines for restoring floating point registers, called by the compiler. */ - /* Called with r11 pointing to the stack header word of the caller of the */ -@@ -79,3 +80,4 @@ - CFI_ENDPROC - - #endif -+#endif ---- a/src/gcc/config/rs6000/crtresxfpr.asm -+++ b/src/gcc/config/rs6000/crtresxfpr.asm -@@ -33,6 +33,7 @@ - - /* On PowerPC64 Linux, these functions are provided by the linker. */ - #ifndef __powerpc64__ -+#ifndef __NO_FPRS__ - - /* Routines for restoring floating point registers, called by the compiler. */ - /* Called with r11 pointing to the stack header word of the caller of the */ -@@ -124,3 +125,4 @@ - CFI_ENDPROC - - #endif -+#endif ---- a/src/gcc/config/rs6000/crtsavfpr.asm -+++ b/src/gcc/config/rs6000/crtsavfpr.asm -@@ -33,6 +33,7 @@ - - /* On PowerPC64 Linux, these functions are provided by the linker. */ - #ifndef __powerpc64__ -+#ifndef __NO_FPRS__ - - /* Routines for saving floating point registers, called by the compiler. */ - /* Called with r11 pointing to the stack header word of the caller of the */ -@@ -79,3 +80,4 @@ - CFI_ENDPROC - - #endif -+#endif diff --git a/debian/patches/note-gnu-stack.diff b/debian/patches/note-gnu-stack.diff index 4b87f46..6acf220 100644 --- a/debian/patches/note-gnu-stack.diff +++ b/debian/patches/note-gnu-stack.diff @@ -96,67 +96,6 @@ libffi/ +#ifdef __linux__ + .section .note.GNU-stack,"",@progbits +#endif ---- a/src/gcc/config/ia64/crtbegin.asm -+++ b/src/gcc/config/ia64/crtbegin.asm -@@ -252,3 +252,7 @@ - .weak __cxa_finalize - #endif - .weak _Jv_RegisterClasses -+ -+#ifdef __linux__ -+.section .note.GNU-stack; .previous -+#endif ---- a/src/gcc/config/ia64/crtend.asm -+++ b/src/gcc/config/ia64/crtend.asm -@@ -119,3 +119,7 @@ - - br.ret.sptk.many rp - .endp __do_global_ctors_aux -+ -+#ifdef __linux__ -+.section .note.GNU-stack; .previous -+#endif ---- a/src/gcc/config/ia64/crti.asm -+++ b/src/gcc/config/ia64/crti.asm -@@ -51,3 +51,7 @@ - .body - - # end of crti.asm -+ -+#ifdef __linux__ -+.section .note.GNU-stack; .previous -+#endif ---- a/src/gcc/config/ia64/crtn.asm -+++ b/src/gcc/config/ia64/crtn.asm -@@ -41,3 +41,7 @@ - br.ret.sptk.many b0 - - # end of crtn.asm -+ -+#ifdef __linux__ -+.section .note.GNU-stack; .previous -+#endif ---- a/src/gcc/config/ia64/lib1funcs.asm -+++ b/src/gcc/config/ia64/lib1funcs.asm -@@ -793,3 +793,7 @@ - .endp __floattitf - #endif - #endif -+ -+#ifdef __linux__ -+.section .note.GNU-stack; .previous -+#endif ---- a/src/gcc/config/ia64/linux.h -+++ b/src/gcc/config/ia64/linux.h -@@ -29,6 +29,8 @@ - - #define TARGET_VERSION fprintf (stderr, " (IA-64) Linux"); - -+#define TARGET_ASM_FILE_END file_end_indicate_exec_stack -+ - /* This is for -profile to use -lc_p instead of -lc. */ - #undef CC1_SPEC - #define CC1_SPEC "%{profile:-p} %{G*}" --- a/src/gcc/config/rs6000/ppc-asm.h +++ b/src/gcc/config/rs6000/ppc-asm.h @@ -352,7 +352,7 @@ diff --git a/debian/patches/pr43804.diff b/debian/patches/pr43804.diff deleted file mode 100644 index 8cf514c..0000000 --- a/debian/patches/pr43804.diff +++ /dev/null @@ -1,22 +0,0 @@ -# DP: Fix for PR target/43804 backported from SVN - -2011-04-24 Richard Sandiford <richard.sandiford@linaro.org> - - PR target/43804 - * config/m68k/constraints.md (T): Allow PIC operands that satisfy - LEGITIMATE_PIC_OPERAND_P. - -Index: gcc/config/m68k/constraints.md -=================================================================== ---- a/src/gcc/config/m68k/constraints.md (revision 172919) -+++ b/src/gcc/config/m68k/constraints.md (revision 172920) -@@ -94,7 +94,8 @@ - (define_constraint "T" - "Used for operands that satisfy 's' when -mpcrel is not in effect." - (and (match_code "symbol_ref,label_ref,const") -- (match_test "!flag_pic"))) -+ (match_test "!TARGET_PCREL") -+ (match_test "!flag_pic || LEGITIMATE_PIC_OPERAND_P (op)"))) - - (define_memory_constraint "Q" - "Means address register indirect addressing mode." diff --git a/debian/patches/pr45078.diff b/debian/patches/pr45078.diff index 752494f..bdf80f1 100644 --- a/debian/patches/pr45078.diff +++ b/debian/patches/pr45078.diff @@ -8,28 +8,23 @@ * config.gcc: Add vxworks-dummy.h to tm_file for arm, mips, sh and sparc targets. +Index: b/src/gcc/Makefile.in +=================================================================== --- a/src/gcc/Makefile.in +++ b/src/gcc/Makefile.in -@@ -4503,6 +4503,7 @@ - $(EXCEPT_H) tree-ssa-sccvn.h real.h output.h $(IPA_UTILS_H) \ +@@ -4547,6 +4547,7 @@ $(C_PRAGMA_H) $(CPPLIB_H) $(FUNCTION_H) \ cppdefault.h flags.h $(MD5_H) params.def params.h prefix.h tree-inline.h \ + gimple-pretty-print.h tree-pretty-print.h realmpfr.h \ + config/arm/arm-cores.def \ $(IPA_PROP_H) $(RTL_H) $(TM_P_H) $(CFGLOOP_H) $(EMIT_RTL_H) version.h # generate the 'build fragment' b-header-vars -@@ -4527,7 +4528,7 @@ - else continue; \ - fi; \ - case $$path in \ -- "$(srcdir)"/config/* | "$(srcdir)"/*.def ) \ -+ "$(srcdir)"/config/* | "$(srcdir)"/c-family/* | "$(srcdir)"/*.def ) \ - base=`echo "$$path" | sed -e "s|$$srcdirstrip/||"`;; \ - *) base=`basename $$path` ;; \ - esac; \ +Index: b/src/gcc/config.gcc +=================================================================== --- a/src/gcc/config.gcc +++ b/src/gcc/config.gcc -@@ -467,6 +467,9 @@ +@@ -486,6 +486,9 @@ fi tm_file="vxworks-dummy.h ${tm_file}" ;; diff --git a/debian/patches/pr45979.diff b/debian/patches/pr45979.diff deleted file mode 100644 index 93f28c8..0000000 --- a/debian/patches/pr45979.diff +++ /dev/null @@ -1,11 +0,0 @@ ---- a/src/gcc/config/host-linux.c -+++ b/src/gcc/config/host-linux.c -@@ -84,6 +84,8 @@ - # define TRY_EMPTY_VM_SPACE 0x60000000 - #elif defined(__mc68000__) - # define TRY_EMPTY_VM_SPACE 0x40000000 -+#elif defined(__ARM_EABI__) -+# define TRY_EMPTY_VM_SPACE 0x60000000 - #else - # define TRY_EMPTY_VM_SPACE 0 - #endif diff --git a/debian/patches/pr47487.diff b/debian/patches/pr47487.diff deleted file mode 100644 index 03b4c5a..0000000 --- a/debian/patches/pr47487.diff +++ /dev/null @@ -1,27 +0,0 @@ -# DP: Fix PR target/47487 powerpc64 ICE building libgo - - - PR target/47487 - * config/rs6000/rs6000.c (rs6000_output_function_epilogue): Support - GNU Go in traceback table. - -Index: gcc/config/rs6000/rs6000.c -=================================================================== ---- a/src/gcc/config/rs6000/rs6000.c (revision 171446) -+++ b/src/gcc/config/rs6000/rs6000.c (working copy) -@@ -22061,10 +22150,11 @@ rs6000_output_function_epilogue (FILE *f - use language_string. - C is 0. Fortran is 1. Pascal is 2. Ada is 3. C++ is 9. - Java is 13. Objective-C is 14. Objective-C++ isn't assigned -- a number, so for now use 9. LTO isn't assigned a number either, -- so for now use 0. */ -+ a number, so for now use 9. LTO and Go aren't assigned numbers -+ either, so for now use 0. */ - if (! strcmp (language_string, "GNU C") -- || ! strcmp (language_string, "GNU GIMPLE")) -+ || ! strcmp (language_string, "GNU GIMPLE") -+ || ! strcmp (language_string, "GNU Go")) - i = 0; - else if (! strcmp (language_string, "GNU F77") - || ! strcmp (language_string, "GNU Fortran")) - diff --git a/debian/patches/pr48226.diff b/debian/patches/pr48226.diff deleted file mode 100644 index 139e0b8..0000000 --- a/debian/patches/pr48226.diff +++ /dev/null @@ -1,33 +0,0 @@ -# DP: Fix PR target/48226, Allow Iterator::vector vector on powerpc with VSX. - ---- a/src/gcc/testsuite/gcc.target/powerpc/pr48226.c (revision 0) -+++ b/src/gcc/testsuite/gcc.target/powerpc/pr48226.c (revision 0) -@@ -0,0 +1,14 @@ -+/* { dg-do compile } */ -+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -+/* { dg-require-effective-target powerpc_vsx_ok } */ -+/* { dg-options "-O3 -mcpu=power7" } */ -+ -+/* The bug shows up if you compile with -maltivec or -mcpu=power7, due to one -+ of the vector's being eliminated due to rs6000_macro_to_expand being called -+ recursively. */ -+ -+struct vector { -+ float v[4]; -+}; -+ -+struct vector vector = { 1.0, 2.0, 3.0, 4.0 }; ---- a/src/gcc/config/rs6000/rs6000-c.c (revision 171246) -+++ b/src/gcc/config/rs6000/rs6000-c.c (working copy) -@@ -182,7 +182,10 @@ rs6000_macro_to_expand (cpp_reader *pfil - expand_this = C_CPP_HASHNODE (__vector_keyword); - expand_bool_pixel = __bool_keyword; - } -- else if (ident) -+ /* The boost libraries have code with Iterator::vector vector in it. If -+ we allow the normal handling, this module will be called recursively, -+ and the vector will be skipped.; */ -+ else if (ident && (ident != C_CPP_HASHNODE (__vector_keyword))) - { - enum rid rid_code = (enum rid)(ident->rid_code); - if (ident->type == NT_MACRO) diff --git a/debian/patches/pr48830.diff b/debian/patches/pr48830.diff deleted file mode 100644 index bc47ecd..0000000 --- a/debian/patches/pr48830.diff +++ /dev/null @@ -1,226 +0,0 @@ -# DP: Fix for PR rtl-optimization/{48830,48808,48792}, taken from the trunk. - -ChangeLog.linaro - -2011-07-13 Michael Hope <michael.hope@linaro.org> - - Backport from mainline r174540 - LP: #807573 - - gcc/ - 2011-06-01 Richard Sandiford <rdsandiford@googlemail.com> - - PR rtl-optimization/48830 - PR rtl-optimization/48808 - PR rtl-optimization/48792 - * reload.c (push_reload): Check contains_reg_of_mode. - * reload1.c (strip_paradoxical_subreg): New function. - (gen_reload_chain_without_interm_reg_p): Use it to handle - paradoxical subregs. - (emit_output_reload_insns, gen_reload): Likewise. - - gcc/testsuite/ - 2011-06-01 Eric Botcazou <ebotcazou@adacore.com> - Hans-Peter Nilsson <hp@axis.com> - - PR rtl-optimization/48830 - * gcc.target/sparc/ultrasp12.c: New test. - ---- a/src/gcc/reload.c -+++ b/src/gcc/reload.c -@@ -1017,6 +1017,7 @@ - #ifdef CANNOT_CHANGE_MODE_CLASS - && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, rclass) - #endif -+ && contains_reg_of_mode[(int) rclass][(int) GET_MODE (SUBREG_REG (in))] - && (CONSTANT_P (SUBREG_REG (in)) - || GET_CODE (SUBREG_REG (in)) == PLUS - || strict_low -@@ -1123,6 +1124,7 @@ - #ifdef CANNOT_CHANGE_MODE_CLASS - && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, rclass) - #endif -+ && contains_reg_of_mode[(int) rclass][(int) GET_MODE (SUBREG_REG (out))] - && (CONSTANT_P (SUBREG_REG (out)) - || strict_low - || (((REG_P (SUBREG_REG (out)) - ---- a/src/gcc/reload1.c -+++ b/src/gcc/reload1.c -@@ -4476,6 +4476,43 @@ - } - } - } -+ -+/* *OP_PTR and *OTHER_PTR are two operands to a conceptual reload. -+ If *OP_PTR is a paradoxical subreg, try to remove that subreg -+ and apply the corresponding narrowing subreg to *OTHER_PTR. -+ Return true if the operands were changed, false otherwise. */ -+ -+static bool -+strip_paradoxical_subreg (rtx *op_ptr, rtx *other_ptr) -+{ -+ rtx op, inner, other, tem; -+ -+ op = *op_ptr; -+ if (GET_CODE (op) != SUBREG) -+ return false; -+ -+ inner = SUBREG_REG (op); -+ if (GET_MODE_SIZE (GET_MODE (op)) <= GET_MODE_SIZE (GET_MODE (inner))) -+ return false; -+ -+ other = *other_ptr; -+ tem = gen_lowpart_common (GET_MODE (inner), other); -+ if (!tem) -+ return false; -+ -+ /* If the lowpart operation turned a hard register into a subreg, -+ rather than simplifying it to another hard register, then the -+ mode change cannot be properly represented. For example, OTHER -+ might be valid in its current mode, but not in the new one. */ -+ if (GET_CODE (tem) == SUBREG -+ && REG_P (other) -+ && HARD_REGISTER_P (other)) -+ return false; -+ -+ *op_ptr = inner; -+ *other_ptr = tem; -+ return true; -+} - - /* A subroutine of reload_as_needed. If INSN has a REG_EH_REGION note, - examine all of the reload insns between PREV and NEXT exclusive, and -@@ -5556,7 +5593,7 @@ - chain reloads or do need an intermediate hard registers. */ - bool result = true; - int regno, n, code; -- rtx out, in, tem, insn; -+ rtx out, in, insn; - rtx last = get_last_insn (); - - /* Make r2 a component of r1. */ -@@ -5575,11 +5612,7 @@ - - /* If IN is a paradoxical SUBREG, remove it and try to put the - opposite SUBREG on OUT. Likewise for a paradoxical SUBREG on OUT. */ -- if (GET_CODE (in) == SUBREG -- && (GET_MODE_SIZE (GET_MODE (in)) -- > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) -- && (tem = gen_lowpart_common (GET_MODE (SUBREG_REG (in)), out)) != 0) -- in = SUBREG_REG (in), out = tem; -+ strip_paradoxical_subreg (&in, &out); - - if (GET_CODE (in) == PLUS - && (REG_P (XEXP (in, 0)) -@@ -7581,7 +7614,6 @@ - if (tertiary_icode != CODE_FOR_nothing) - { - rtx third_reloadreg = rld[tertiary_reload].reg_rtx; -- rtx tem; - - /* Copy primary reload reg to secondary reload reg. - (Note that these have been swapped above, then -@@ -7590,13 +7622,7 @@ - /* If REAL_OLD is a paradoxical SUBREG, remove it - and try to put the opposite SUBREG on - RELOADREG. */ -- if (GET_CODE (real_old) == SUBREG -- && (GET_MODE_SIZE (GET_MODE (real_old)) -- > GET_MODE_SIZE (GET_MODE (SUBREG_REG (real_old)))) -- && 0 != (tem = gen_lowpart_common -- (GET_MODE (SUBREG_REG (real_old)), -- reloadreg))) -- real_old = SUBREG_REG (real_old), reloadreg = tem; -+ strip_paradoxical_subreg (&real_old, &reloadreg); - - gen_reload (reloadreg, second_reloadreg, - rl->opnum, rl->when_needed); -@@ -8412,16 +8438,8 @@ - - /* If IN is a paradoxical SUBREG, remove it and try to put the - opposite SUBREG on OUT. Likewise for a paradoxical SUBREG on OUT. */ -- if (GET_CODE (in) == SUBREG -- && (GET_MODE_SIZE (GET_MODE (in)) -- > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) -- && (tem = gen_lowpart_common (GET_MODE (SUBREG_REG (in)), out)) != 0) -- in = SUBREG_REG (in), out = tem; -- else if (GET_CODE (out) == SUBREG -- && (GET_MODE_SIZE (GET_MODE (out)) -- > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))) -- && (tem = gen_lowpart_common (GET_MODE (SUBREG_REG (out)), in)) != 0) -- out = SUBREG_REG (out), in = tem; -+ if (!strip_paradoxical_subreg (&in, &out)) -+ strip_paradoxical_subreg (&out, &in); - - /* How to do this reload can get quite tricky. Normally, we are being - asked to reload a simple operand, such as a MEM, a constant, or a pseudo - ---- a/src/gcc/testsuite/gcc.target/sparc/ultrasp12.c -+++ b/src/gcc/testsuite/gcc.target/sparc/ultrasp12.c -@@ -0,0 +1,64 @@ -+/* PR rtl-optimization/48830 */ -+/* Testcase by Hans-Peter Nilsson <hp@gcc.gnu.org> */ -+ -+/* { dg-do compile } */ -+/* { dg-require-effective-target lp64 } */ -+/* { dg-options "-O2 -mcpu=ultrasparc -mvis" } */ -+ -+typedef unsigned char uint8_t; -+typedef unsigned int uint32_t; -+typedef unsigned long int uint64_t; -+typedef unsigned long int uintmax_t; -+typedef unsigned char rc_vec_t __attribute__((__vector_size__(8))); -+typedef short rc_svec_type_ __attribute__((__vector_size__(8))); -+typedef unsigned char rc_vec4_type_ __attribute__((__vector_size__(4))); -+ -+void -+rc_stat_xsum_acc(const uint8_t *__restrict src1, int src1_dim, -+ const uint8_t *__restrict src2, int src2_dim, -+ int len, int height, uintmax_t sum[5]) -+{ -+ uint32_t s1 = 0; -+ uint32_t s2 = 0; -+ uintmax_t s11 = 0; -+ uintmax_t s22 = 0; -+ uintmax_t s12 = 0; -+ int full = len / ((1024) < (1024) ? (1024) : (1024)); -+ int rem = len % ((1024) < (1024) ? (1024) : (1024)); -+ int rem1 = rem / 1; -+ int y; -+ unsigned int rc_gsr_scale_ __attribute__ ((__unused__)) = 7; unsigned int rc_gsr_align_ __attribute__ ((__unused__)) = 4; unsigned int rc_gsr_set_ __attribute__ ((__unused__)) = 0; register unsigned int rc_gsr_fakedep_ __attribute__ ((__unused__)) = 0; unsigned int rc_gsr_ldinit_ __attribute__ ((__unused__)) = 0; -+ for (y = 0; y < height; y++) { -+ rc_vec_t a1, a2, a11, a22, a12; -+ int i1 = (y)*(src1_dim); -+ int i2 = (y)*(src2_dim); -+ int x; -+ ((a1) = ((rc_vec_t) {0})); -+ ((a2) = ((rc_vec_t) {0})); -+ ((a11) = ((rc_vec_t) {0})); -+ ((a22) = ((rc_vec_t) {0})); -+ ((a12) = ((rc_vec_t) {0})); -+ for (x = 0; x < full; x++) { -+ int k; -+ for (k = 0; k < ((1024) < (1024) ? (1024) : (1024)) / -+ 1; k++) -+ { -+ do { rc_vec_t v1, v2; ((v1) = *(const rc_vec_t*)(&(src1)[i1])); ((v2) = *(const rc_vec_t*)(&(src2)[i2])); ((a1) = (((union { rc_vec_t v; uint64_t i; })(uint64_t)(__builtin_vis_pdist (v1, ((rc_vec_t) {0}), (((union { rc_vec_t v; uint64_t i; })(uint64_t)(a1)).i)))).v)); ((a2) = (((union { rc_vec_t v; uint64_t i; })(uint64_t)(__builtin_vis_pdist (v2, ((rc_vec_t) {0}), (((union { rc_vec_t v; uint64_t i; })(uint64_t)(a2)).i)))).v)); do { rc_vec_t s1_ = (v1); rc_vec_t s2_ = (v1); rc_vec_t accvin_ = (a11); rc_vec_t s1lo7_, s1msb_, accvout_; uint32_t maclo_, machi_; rc_svec_type_ masklow_ = (rc_svec_type_){(255), (255), (255), (255)}; rc_svec_type_ s1msbhi_, s1msblo_, s1lo7hi_, s1lo7lo_; rc_svec_type_ s1msbdiv2hi_, s1msbdiv2lo_; rc_vec4_type_ s1lo7hi4_, s1lo7lo4_, s1msbhi4_, s1msblo4_; rc_vec4_type_ s1msbdiv2hi4_, s1msbdiv2lo4_, s2hi4_, s2lo4_; rc_vec4_type_ accvhi4_, accvlo4_; rc_svec_type_ mulhilo7_, mullolo7_, mulhimsbdiv2_, mullomsbdiv2_; rc_svec_type_ mulhi_, mullo_, mulhihi_, mullohi_; rc_svec_type_ mulhilo_, mullolo_; rc_vec4_type_ zero4_ = (((union { rc_vec4_type_ v; uint64_t i; })(uint64_t)(0)).v); rc_vec_t msb_ = (rc_vec_t){(0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80)}; ((s1msb_) = (s1_) & (msb_)); ((s1lo7_) = (s1_) & (~msb_)); do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_) : "0" (s1msb_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1msb_); (s1msbhi4_) = hl_.hilo_.hi_; (s1msblo4_) = hl_.hilo_.lo_; } while (0); s1msbhi_ = __builtin_vis_fexpand(s1msbhi4_); s1msblo_ = __builtin_vis_fexpand(s1msblo4_); s1msbdiv2hi4_ = __builtin_vis_fpack16(s1msbhi_); s1msbdiv2lo4_ = __builtin_vis_fpack16(s1msblo_); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s2_); (s2hi4_) = hl_.hilo_.hi_; (s2lo4_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1lo7_); (s1lo7hi4_) = hl_.hilo_.hi_; (s1lo7lo4_) = hl_.hilo_.lo_; } while (0); s1msbdiv2hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2hi4_, zero4_); s1msbdiv2lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2lo4_, zero4_); s1lo7hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7hi4_, zero4_); s1lo7lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7lo4_, zero4_); mulhilo7_ = __builtin_vis_fmul8x16(s2hi4_, s1lo7hi_); mullolo7_ = __builtin_vis_fmul8x16(s2lo4_, s1lo7lo_); mulhimsbdiv2_ = __builtin_vis_fmul8x16(s2hi4_, s1msbdiv2hi_); mullomsbdiv2_ = __builtin_vis_fmul8x16(s2lo4_, s1msbdiv2lo_); mulhi_ = mulhilo7_ + mulhimsbdiv2_ + mulhimsbdiv2_; mullo_ = mullolo7_ + mullomsbdiv2_ + mullomsbdiv2_; mulhihi_ = mulhi_ & ~masklow_; mulhilo_ = mulhi_ & masklow_; mullohi_ = mullo_ & ~masklow_; mullolo_ = mullo_ & masklow_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (accvin_); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); maclo_ = __builtin_vis_pdist ((rc_vec_t)mullolo_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i)); maclo_ = __builtin_vis_pdist ((rc_vec_t)mulhilo_, ((rc_vec_t) {0}), maclo_); machi_ = __builtin_vis_pdist ((rc_vec_t)mullohi_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i)); machi_ = __builtin_vis_pdist ((rc_vec_t)mulhihi_, ((rc_vec_t) {0}), machi_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)machi_)).v)), ((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)maclo_)).v))}}; (accvout_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (accvout_), "0" (rc_gsr_fakedep_)); (a11) = accvout_; } while (0); do { rc_vec_t s1_ = (v2); rc_vec_t s2_ = (v2); rc_vec_t accvin_ = (a22); rc_vec_t s1lo7_, s1msb_, accvout_; uint32_t maclo_, machi_; rc_svec_type_ masklow_ = (rc_svec_type_){(255), (255), (255), (255)}; rc_svec_type_ s1msbhi_, s1msblo_, s1lo7hi_, s1lo7lo_; rc_svec_type_ s1msbdiv2hi_, s1msbdiv2lo_; rc_vec4_type_ s1lo7hi4_, s1lo7lo4_, s1msbhi4_, s1msblo4_; rc_vec4_type_ s1msbdiv2hi4_, s1msbdiv2lo4_, s2hi4_, s2lo4_; rc_vec4_type_ accvhi4_, accvlo4_; rc_svec_type_ mulhilo7_, mullolo7_, mulhimsbdiv2_, mullomsbdiv2_; rc_svec_type_ mulhi_, mullo_, mulhihi_, mullohi_; rc_svec_type_ mulhilo_, mullolo_; rc_vec4_type_ zero4_ = (((union { rc_vec4_type_ v; uint64_t i; })(uint64_t)(0)).v); rc_vec_t msb_ = (rc_vec_t){(0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80)}; ((s1msb_) = (s1_) & (msb_)); ((s1lo7_) = (s1_) & (~msb_)); do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_) : "0" (s1msb_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1msb_); (s1msbhi4_) = hl_.hilo_.hi_; (s1msblo4_) = hl_.hilo_.lo_; } while (0); s1msbhi_ = __builtin_vis_fexpand(s1msbhi4_); s1msblo_ = __builtin_vis_fexpand(s1msblo4_); s1msbdiv2hi4_ = __builtin_vis_fpack16(s1msbhi_); s1msbdiv2lo4_ = __builtin_vis_fpack16(s1msblo_); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s2_); (s2hi4_) = hl_.hilo_.hi_; (s2lo4_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1lo7_); (s1lo7hi4_) = hl_.hilo_.hi_; (s1lo7lo4_) = hl_.hilo_.lo_; } while (0); s1msbdiv2hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2hi4_, zero4_); s1msbdiv2lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2lo4_, zero4_); s1lo7hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7hi4_, zero4_); s1lo7lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7lo4_, zero4_); mulhilo7_ = __builtin_vis_fmul8x16(s2hi4_, s1lo7hi_); mullolo7_ = __builtin_vis_fmul8x16(s2lo4_, s1lo7lo_); mulhimsbdiv2_ = __builtin_vis_fmul8x16(s2hi4_, s1msbdiv2hi_); mullomsbdiv2_ = __builtin_vis_fmul8x16(s2lo4_, s1msbdiv2lo_); mulhi_ = mulhilo7_ + mulhimsbdiv2_ + mulhimsbdiv2_; mullo_ = mullolo7_ + mullomsbdiv2_ + mullomsbdiv2_; mulhihi_ = mulhi_ & ~masklow_; mulhilo_ = mulhi_ & masklow_; mullohi_ = mullo_ & ~masklow_; mullolo_ = mullo_ & masklow_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (accvin_); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); maclo_ = __builtin_vis_pdist ((rc_vec_t)mullolo_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i)); maclo_ = __builtin_vis_pdist ((rc_vec_t)mulhilo_, ((rc_vec_t) {0}), maclo_); machi_ = __builtin_vis_pdist ((rc_vec_t)mullohi_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i)); machi_ = __builtin_vis_pdist ((rc_vec_t)mulhihi_, ((rc_vec_t) {0}), machi_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)machi_)).v)), ((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)maclo_)).v))}}; (accvout_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (accvout_), "0" (rc_gsr_fakedep_)); (a22) = accvout_; } while (0); do { rc_vec_t s1_ = (v1); rc_vec_t s2_ = (v2); rc_vec_t accvin_ = (a12); rc_vec_t s1lo7_, s1msb_, accvout_; uint32_t maclo_, machi_; rc_svec_type_ masklow_ = (rc_svec_type_){(255), (255), (255), (255)}; rc_svec_type_ s1msbhi_, s1msblo_, s1lo7hi_, s1lo7lo_; rc_svec_type_ s1msbdiv2hi_, s1msbdiv2lo_; rc_vec4_type_ s1lo7hi4_, s1lo7lo4_, s1msbhi4_, s1msblo4_; rc_vec4_type_ s1msbdiv2hi4_, s1msbdiv2lo4_, s2hi4_, s2lo4_; rc_vec4_type_ accvhi4_, accvlo4_; rc_svec_type_ mulhilo7_, mullolo7_, mulhimsbdiv2_, mullomsbdiv2_; rc_svec_type_ mulhi_, mullo_, mulhihi_, mullohi_; rc_svec_type_ mulhilo_, mullolo_; rc_vec4_type_ zero4_ = (((union { rc_vec4_type_ v; uint64_t i; })(uint64_t)(0)).v); rc_vec_t msb_ = (rc_vec_t){(0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80)}; ((s1msb_) = (s1_) & (msb_)); ((s1lo7_) = (s1_) & (~msb_)); do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_) : "0" (s1msb_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1msb_); (s1msbhi4_) = hl_.hilo_.hi_; (s1msblo4_) = hl_.hilo_.lo_; } while (0); s1msbhi_ = __builtin_vis_fexpand(s1msbhi4_); s1msblo_ = __builtin_vis_fexpand(s1msblo4_); s1msbdiv2hi4_ = __builtin_vis_fpack16(s1msbhi_); s1msbdiv2lo4_ = __builtin_vis_fpack16(s1msblo_); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s2_); (s2hi4_) = hl_.hilo_.hi_; (s2lo4_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1lo7_); (s1lo7hi4_) = hl_.hilo_.hi_; (s1lo7lo4_) = hl_.hilo_.lo_; } while (0); s1msbdiv2hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2hi4_, zero4_); s1msbdiv2lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2lo4_, zero4_); s1lo7hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7hi4_, zero4_); s1lo7lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7lo4_, zero4_); mulhilo7_ = __builtin_vis_fmul8x16(s2hi4_, s1lo7hi_); mullolo7_ = __builtin_vis_fmul8x16(s2lo4_, s1lo7lo_); mulhimsbdiv2_ = __builtin_vis_fmul8x16(s2hi4_, s1msbdiv2hi_); mullomsbdiv2_ = __builtin_vis_fmul8x16(s2lo4_, s1msbdiv2lo_); mulhi_ = mulhilo7_ + mulhimsbdiv2_ + mulhimsbdiv2_; mullo_ = mullolo7_ + mullomsbdiv2_ + mullomsbdiv2_; mulhihi_ = mulhi_ & ~masklow_; mulhilo_ = mulhi_ & masklow_; mullohi_ = mullo_ & ~masklow_; mullolo_ = mullo_ & masklow_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (accvin_); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); maclo_ = __builtin_vis_pdist ((rc_vec_t)mullolo_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i)); maclo_ = __builtin_vis_pdist ((rc_vec_t)mulhilo_, ((rc_vec_t) {0}), maclo_); machi_ = __builtin_vis_pdist ((rc_vec_t)mullohi_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i)); machi_ = __builtin_vis_pdist ((rc_vec_t)mulhihi_, ((rc_vec_t) {0}), machi_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)machi_)).v)), ((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)maclo_)).v))}}; (accvout_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (accvout_), "0" (rc_gsr_fakedep_)); (a12) = accvout_; } while (0); (i1) += 8; (i2) += 8; } while (0); -+ -+ } -+ do { uint32_t t1, t2, t11, t22, t12; ((t1) = (((union { rc_vec_t v; uint64_t i; })(uint64_t)(a1)).i)); ((t2) = (((union { rc_vec_t v; uint64_t i; })(uint64_t)(a2)).i)); do { rc_vec4_type_ accvhi4_, accvlo4_; uint64_t machi_, maclo_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (a11); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); machi_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i); maclo_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i); (t11) = maclo_ + machi_ * 256; } while (0); do { rc_vec4_type_ accvhi4_, accvlo4_; uint64_t machi_, maclo_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (a22); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); machi_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i); maclo_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i); (t22) = maclo_ + machi_ * 256; } while (0); do { rc_vec4_type_ accvhi4_, accvlo4_; uint64_t machi_, maclo_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (a12); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); machi_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i); maclo_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i); (t12) = maclo_ + machi_ * 256; } while (0); ((a1) = ((rc_vec_t) {0})); ((a2) = ((rc_vec_t) {0})); ((a11) = ((rc_vec_t) {0})); ((a22) = ((rc_vec_t) {0})); ((a12) = ((rc_vec_t) {0})); (s1) += t1; (s2) += t2; (s11) += t11; (s22) += t22; (s12) += t12; } while (0); -+ } -+ for (x = 0; x < rem1; x++) { -+ do { rc_vec_t v1, v2; ((v1) = *(const rc_vec_t*)(&(src1)[i1])); ((v2) = *(const rc_vec_t*)(&(src2)[i2])); ((a1) = (((union { rc_vec_t v; uint64_t i; })(uint64_t)(__builtin_vis_pdist (v1, ((rc_vec_t) {0}), (((union { rc_vec_t v; uint64_t i; })(uint64_t)(a1)).i)))).v)); ((a2) = (((union { rc_vec_t v; uint64_t i; })(uint64_t)(__builtin_vis_pdist (v2, ((rc_vec_t) {0}), (((union { rc_vec_t v; uint64_t i; })(uint64_t)(a2)).i)))).v)); do { rc_vec_t s1_ = (v1); rc_vec_t s2_ = (v1); rc_vec_t accvin_ = (a11); rc_vec_t s1lo7_, s1msb_, accvout_; uint32_t maclo_, machi_; rc_svec_type_ masklow_ = (rc_svec_type_){(255), (255), (255), (255)}; rc_svec_type_ s1msbhi_, s1msblo_, s1lo7hi_, s1lo7lo_; rc_svec_type_ s1msbdiv2hi_, s1msbdiv2lo_; rc_vec4_type_ s1lo7hi4_, s1lo7lo4_, s1msbhi4_, s1msblo4_; rc_vec4_type_ s1msbdiv2hi4_, s1msbdiv2lo4_, s2hi4_, s2lo4_; rc_vec4_type_ accvhi4_, accvlo4_; rc_svec_type_ mulhilo7_, mullolo7_, mulhimsbdiv2_, mullomsbdiv2_; rc_svec_type_ mulhi_, mullo_, mulhihi_, mullohi_; rc_svec_type_ mulhilo_, mullolo_; rc_vec4_type_ zero4_ = (((union { rc_vec4_type_ v; uint64_t i; })(uint64_t)(0)).v); rc_vec_t msb_ = (rc_vec_t){(0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80)}; ((s1msb_) = (s1_) & (msb_)); ((s1lo7_) = (s1_) & (~msb_)); do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_) : "0" (s1msb_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1msb_); (s1msbhi4_) = hl_.hilo_.hi_; (s1msblo4_) = hl_.hilo_.lo_; } while (0); s1msbhi_ = __builtin_vis_fexpand(s1msbhi4_); s1msblo_ = __builtin_vis_fexpand(s1msblo4_); s1msbdiv2hi4_ = __builtin_vis_fpack16(s1msbhi_); s1msbdiv2lo4_ = __builtin_vis_fpack16(s1msblo_); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s2_); (s2hi4_) = hl_.hilo_.hi_; (s2lo4_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1lo7_); (s1lo7hi4_) = hl_.hilo_.hi_; (s1lo7lo4_) = hl_.hilo_.lo_; } while (0); s1msbdiv2hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2hi4_, zero4_); s1msbdiv2lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2lo4_, zero4_); s1lo7hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7hi4_, zero4_); s1lo7lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7lo4_, zero4_); mulhilo7_ = __builtin_vis_fmul8x16(s2hi4_, s1lo7hi_); mullolo7_ = __builtin_vis_fmul8x16(s2lo4_, s1lo7lo_); mulhimsbdiv2_ = __builtin_vis_fmul8x16(s2hi4_, s1msbdiv2hi_); mullomsbdiv2_ = __builtin_vis_fmul8x16(s2lo4_, s1msbdiv2lo_); mulhi_ = mulhilo7_ + mulhimsbdiv2_ + mulhimsbdiv2_; mullo_ = mullolo7_ + mullomsbdiv2_ + mullomsbdiv2_; mulhihi_ = mulhi_ & ~masklow_; mulhilo_ = mulhi_ & masklow_; mullohi_ = mullo_ & ~masklow_; mullolo_ = mullo_ & masklow_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (accvin_); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); maclo_ = __builtin_vis_pdist ((rc_vec_t)mullolo_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i)); maclo_ = __builtin_vis_pdist ((rc_vec_t)mulhilo_, ((rc_vec_t) {0}), maclo_); machi_ = __builtin_vis_pdist ((rc_vec_t)mullohi_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i)); machi_ = __builtin_vis_pdist ((rc_vec_t)mulhihi_, ((rc_vec_t) {0}), machi_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)machi_)).v)), ((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)maclo_)).v))}}; (accvout_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (accvout_), "0" (rc_gsr_fakedep_)); (a11) = accvout_; } while (0); do { rc_vec_t s1_ = (v2); rc_vec_t s2_ = (v2); rc_vec_t accvin_ = (a22); rc_vec_t s1lo7_, s1msb_, accvout_; uint32_t maclo_, machi_; rc_svec_type_ masklow_ = (rc_svec_type_){(255), (255), (255), (255)}; rc_svec_type_ s1msbhi_, s1msblo_, s1lo7hi_, s1lo7lo_; rc_svec_type_ s1msbdiv2hi_, s1msbdiv2lo_; rc_vec4_type_ s1lo7hi4_, s1lo7lo4_, s1msbhi4_, s1msblo4_; rc_vec4_type_ s1msbdiv2hi4_, s1msbdiv2lo4_, s2hi4_, s2lo4_; rc_vec4_type_ accvhi4_, accvlo4_; rc_svec_type_ mulhilo7_, mullolo7_, mulhimsbdiv2_, mullomsbdiv2_; rc_svec_type_ mulhi_, mullo_, mulhihi_, mullohi_; rc_svec_type_ mulhilo_, mullolo_; rc_vec4_type_ zero4_ = (((union { rc_vec4_type_ v; uint64_t i; })(uint64_t)(0)).v); rc_vec_t msb_ = (rc_vec_t){(0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80)}; ((s1msb_) = (s1_) & (msb_)); ((s1lo7_) = (s1_) & (~msb_)); do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_) : "0" (s1msb_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1msb_); (s1msbhi4_) = hl_.hilo_.hi_; (s1msblo4_) = hl_.hilo_.lo_; } while (0); s1msbhi_ = __builtin_vis_fexpand(s1msbhi4_); s1msblo_ = __builtin_vis_fexpand(s1msblo4_); s1msbdiv2hi4_ = __builtin_vis_fpack16(s1msbhi_); s1msbdiv2lo4_ = __builtin_vis_fpack16(s1msblo_); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s2_); (s2hi4_) = hl_.hilo_.hi_; (s2lo4_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1lo7_); (s1lo7hi4_) = hl_.hilo_.hi_; (s1lo7lo4_) = hl_.hilo_.lo_; } while (0); s1msbdiv2hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2hi4_, zero4_); s1msbdiv2lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2lo4_, zero4_); s1lo7hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7hi4_, zero4_); s1lo7lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7lo4_, zero4_); mulhilo7_ = __builtin_vis_fmul8x16(s2hi4_, s1lo7hi_); mullolo7_ = __builtin_vis_fmul8x16(s2lo4_, s1lo7lo_); mulhimsbdiv2_ = __builtin_vis_fmul8x16(s2hi4_, s1msbdiv2hi_); mullomsbdiv2_ = __builtin_vis_fmul8x16(s2lo4_, s1msbdiv2lo_); mulhi_ = mulhilo7_ + mulhimsbdiv2_ + mulhimsbdiv2_; mullo_ = mullolo7_ + mullomsbdiv2_ + mullomsbdiv2_; mulhihi_ = mulhi_ & ~masklow_; mulhilo_ = mulhi_ & masklow_; mullohi_ = mullo_ & ~masklow_; mullolo_ = mullo_ & masklow_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (accvin_); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); maclo_ = __builtin_vis_pdist ((rc_vec_t)mullolo_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i)); maclo_ = __builtin_vis_pdist ((rc_vec_t)mulhilo_, ((rc_vec_t) {0}), maclo_); machi_ = __builtin_vis_pdist ((rc_vec_t)mullohi_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i)); machi_ = __builtin_vis_pdist ((rc_vec_t)mulhihi_, ((rc_vec_t) {0}), machi_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)machi_)).v)), ((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)maclo_)).v))}}; (accvout_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (accvout_), "0" (rc_gsr_fakedep_)); (a22) = accvout_; } while (0); do { rc_vec_t s1_ = (v1); rc_vec_t s2_ = (v2); rc_vec_t accvin_ = (a12); rc_vec_t s1lo7_, s1msb_, accvout_; uint32_t maclo_, machi_; rc_svec_type_ masklow_ = (rc_svec_type_){(255), (255), (255), (255)}; rc_svec_type_ s1msbhi_, s1msblo_, s1lo7hi_, s1lo7lo_; rc_svec_type_ s1msbdiv2hi_, s1msbdiv2lo_; rc_vec4_type_ s1lo7hi4_, s1lo7lo4_, s1msbhi4_, s1msblo4_; rc_vec4_type_ s1msbdiv2hi4_, s1msbdiv2lo4_, s2hi4_, s2lo4_; rc_vec4_type_ accvhi4_, accvlo4_; rc_svec_type_ mulhilo7_, mullolo7_, mulhimsbdiv2_, mullomsbdiv2_; rc_svec_type_ mulhi_, mullo_, mulhihi_, mullohi_; rc_svec_type_ mulhilo_, mullolo_; rc_vec4_type_ zero4_ = (((union { rc_vec4_type_ v; uint64_t i; })(uint64_t)(0)).v); rc_vec_t msb_ = (rc_vec_t){(0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80), (0x80)}; ((s1msb_) = (s1_) & (msb_)); ((s1lo7_) = (s1_) & (~msb_)); do { if (rc_gsr_ldinit_) { extern void rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(void); rc_mixing_GSR_setting_with_RC_VEC_LDINIT_(); } if (!__builtin_constant_p(rc_gsr_align_) || !__builtin_constant_p(2) || !rc_gsr_set_ || (unsigned) (rc_gsr_align_) != rc_gsr_align_ || (unsigned) (2) != rc_gsr_scale_) { rc_gsr_set_ = 1; rc_gsr_align_ = (rc_gsr_align_); rc_gsr_scale_ = (2); unsigned int val_ = (rc_gsr_scale_ << 3) | rc_gsr_align_; if (__builtin_constant_p (val_)) { __asm__("wr %%g0,%[gsrval],%%gsr\n" ";# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "i" (val_), "1" (rc_gsr_fakedep_)); } else { __asm__("wr %[gsrval],0,%%gsr" "\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_), [fakegsr] "=rm" (rc_gsr_fakedep_) : "0" (s1msb_), [gsrval] "r" (val_), "1" (rc_gsr_fakedep_)); } } else { __asm__("\n;# dep %[depvec] on fake GSR %[fakegsr]" : [depvec] "=brm" (s1msb_) : "0" (s1msb_), [fakegsr] "g" (rc_gsr_fakedep_)); } } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1msb_); (s1msbhi4_) = hl_.hilo_.hi_; (s1msblo4_) = hl_.hilo_.lo_; } while (0); s1msbhi_ = __builtin_vis_fexpand(s1msbhi4_); s1msblo_ = __builtin_vis_fexpand(s1msblo4_); s1msbdiv2hi4_ = __builtin_vis_fpack16(s1msbhi_); s1msbdiv2lo4_ = __builtin_vis_fpack16(s1msblo_); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s2_); (s2hi4_) = hl_.hilo_.hi_; (s2lo4_) = hl_.hilo_.lo_; } while (0); do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (s1lo7_); (s1lo7hi4_) = hl_.hilo_.hi_; (s1lo7lo4_) = hl_.hilo_.lo_; } while (0); s1msbdiv2hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2hi4_, zero4_); s1msbdiv2lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1msbdiv2lo4_, zero4_); s1lo7hi_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7hi4_, zero4_); s1lo7lo_ = (rc_svec_type_)__builtin_vis_fpmerge(s1lo7lo4_, zero4_); mulhilo7_ = __builtin_vis_fmul8x16(s2hi4_, s1lo7hi_); mullolo7_ = __builtin_vis_fmul8x16(s2lo4_, s1lo7lo_); mulhimsbdiv2_ = __builtin_vis_fmul8x16(s2hi4_, s1msbdiv2hi_); mullomsbdiv2_ = __builtin_vis_fmul8x16(s2lo4_, s1msbdiv2lo_); mulhi_ = mulhilo7_ + mulhimsbdiv2_ + mulhimsbdiv2_; mullo_ = mullolo7_ + mullomsbdiv2_ + mullomsbdiv2_; mulhihi_ = mulhi_ & ~masklow_; mulhilo_ = mulhi_ & masklow_; mullohi_ = mullo_ & ~masklow_; mullolo_ = mullo_ & masklow_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (accvin_); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); maclo_ = __builtin_vis_pdist ((rc_vec_t)mullolo_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i)); maclo_ = __builtin_vis_pdist ((rc_vec_t)mulhilo_, ((rc_vec_t) {0}), maclo_); machi_ = __builtin_vis_pdist ((rc_vec_t)mullohi_, ((rc_vec_t) {0}), (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i)); machi_ = __builtin_vis_pdist ((rc_vec_t)mulhihi_, ((rc_vec_t) {0}), machi_); do { typedef union { struct { rc_vec4_type_ hi_, lo_; } hilo_; rc_vec_t v_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) {{((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)machi_)).v)), ((((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)((uint32_t)maclo_)).v))}}; (accvout_) = hl_.v_; } while (0); __asm__("\n;# dep fake GSR %[fakegsr] on %[xdep]" : [fakegsr] "=brm" (rc_gsr_fakedep_) : [xdep] "brm" (accvout_), "0" (rc_gsr_fakedep_)); (a12) = accvout_; } while (0); (i1) += 8; (i2) += 8; } while (0); -+ } -+ do { uint32_t t1, t2, t11, t22, t12; ((t1) = (((union { rc_vec_t v; uint64_t i; })(uint64_t)(a1)).i)); ((t2) = (((union { rc_vec_t v; uint64_t i; })(uint64_t)(a2)).i)); do { rc_vec4_type_ accvhi4_, accvlo4_; uint64_t machi_, maclo_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (a11); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); machi_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i); maclo_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i); (t11) = maclo_ + machi_ * 256; } while (0); do { rc_vec4_type_ accvhi4_, accvlo4_; uint64_t machi_, maclo_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (a22); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); machi_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i); maclo_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i); (t22) = maclo_ + machi_ * 256; } while (0); do { rc_vec4_type_ accvhi4_, accvlo4_; uint64_t machi_, maclo_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (a12); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); machi_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i); maclo_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i); (t12) = maclo_ + machi_ * 256; } while (0); ((a1) = ((rc_vec_t) {0})); ((a2) = ((rc_vec_t) {0})); ((a11) = ((rc_vec_t) {0})); ((a22) = ((rc_vec_t) {0})); ((a12) = ((rc_vec_t) {0})); (s1) += t1; (s2) += t2; (s11) += t11; (s22) += t22; (s12) += t12; } while (0); -+ -+ do { uint32_t t1, t2, t11, t22, t12; ((t1) = (((union { rc_vec_t v; uint64_t i; })(uint64_t)(a1)).i)); ((t2) = (((union { rc_vec_t v; uint64_t i; })(uint64_t)(a2)).i)); do { rc_vec4_type_ accvhi4_, accvlo4_; uint64_t machi_, maclo_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (a11); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); machi_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i); maclo_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i); (t11) = maclo_ + machi_ * 256; } while (0); do { rc_vec4_type_ accvhi4_, accvlo4_; uint64_t machi_, maclo_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (a22); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); machi_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i); maclo_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i); (t22) = maclo_ + machi_ * 256; } while (0); do { rc_vec4_type_ accvhi4_, accvlo4_; uint64_t machi_, maclo_; do { typedef union { rc_vec_t v_; struct { rc_vec4_type_ hi_, lo_; } hilo_; } RC_hl_type_; RC_hl_type_ hl_ = (RC_hl_type_) (a12); (accvhi4_) = hl_.hilo_.hi_; (accvlo4_) = hl_.hilo_.lo_; } while (0); machi_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvhi4_)).i); maclo_ = (((union { rc_vec4_type_ v; uint32_t i; })(uint32_t)(accvlo4_)).i); (t12) = maclo_ + machi_ * 256; } while (0); ((a1) = ((rc_vec_t) {0})); ((a2) = ((rc_vec_t) {0})); ((a11) = ((rc_vec_t) {0})); ((a22) = ((rc_vec_t) {0})); ((a12) = ((rc_vec_t) {0})); (s1) += t1; (s2) += t2; (s11) += t11; (s22) += t22; (s12) += t12; } while (0); -+ } -+ sum[0] = s1; -+ sum[1] = s2; -+ sum[2] = s11; -+ sum[3] = s22; -+ sum[4] = s12; -+ ; -+} - diff --git a/debian/patches/pr49030.diff b/debian/patches/pr49030.diff deleted file mode 100644 index d8ad45a..0000000 --- a/debian/patches/pr49030.diff +++ /dev/null @@ -1,438 +0,0 @@ -# DP: Fix PR target/49030 (ARM), taken from Linaro - -2011-10-03 Richard Sandiford <richard.sandiford@linaro.org> - - gcc/ - Backport from mainline: - - 2011-09-22 Richard Sandiford <richard.sandiford@linaro.org> - - * config/arm/predicates.md (expandable_comparison_operator): New - predicate, extracted from... - (arm_comparison_operator): ...here. - * config/arm/arm.md (cbranchsi4, cbranchsf4, cbranchdf4, cbranchdi4) - (cstoresi4, cstoresf4, cstoredf4, cstoredi4, movsicc, movsfcc) - (movdfcc): Use expandable_comparison_operator. - - gcc/testsuite/ - Backport from mainline: - - 2011-09-22 Richard Sandiford <richard.sandiford@linaro.org> - - * gcc.target/arm/cmp-1.c: New test. - * gcc.target/arm/cmp-2.c: Likewise. - -2011-10-03 Richard Sandiford <richard.sandiford@linaro.org> - - gcc/ - Backport from mainline: - - 2011-09-07 Richard Sandiford <richard.sandiford@linaro.org> - - PR target/49030 - * config/arm/arm-protos.h (maybe_get_arm_condition_code): Declare. - * config/arm/arm.c (maybe_get_arm_condition_code): New function, - reusing the old code from get_arm_condition_code. Return ARM_NV - for invalid comparison codes. - (get_arm_condition_code): Redefine in terms of - maybe_get_arm_condition_code. - * config/arm/predicates.md (arm_comparison_operator): Use - maybe_get_arm_condition_code. - - gcc/testsuite/ - Backport from mainline: - - 2011-09-07 Richard Sandiford <richard.sandiford@linaro.org> - - PR target/49030 - * gcc.dg/torture/pr49030.c: New test. - -=== modified file 'gcc/config/arm/arm-protos.h' ---- a/src/gcc/config/arm/arm-protos.h 2011-09-15 09:45:31 +0000 -+++ b/src/gcc/config/arm/arm-protos.h 2011-10-03 09:46:40 +0000 -@@ -180,6 +180,7 @@ - #endif - extern int thumb_shiftable_const (unsigned HOST_WIDE_INT); - #ifdef RTX_CODE -+extern enum arm_cond_code maybe_get_arm_condition_code (rtx); - extern void thumb1_final_prescan_insn (rtx); - extern void thumb2_final_prescan_insn (rtx); - extern const char *thumb_load_double_from_address (rtx *); - -=== modified file 'gcc/config/arm/arm.c' ---- a/src/gcc/config/arm/arm.c 2011-09-19 07:44:24 +0000 -+++ b/src/gcc/config/arm/arm.c 2011-10-03 09:46:40 +0000 -@@ -17494,10 +17494,10 @@ - decremented/zeroed by arm_asm_output_opcode as the insns are output. */ - - /* Returns the index of the ARM condition code string in -- `arm_condition_codes'. COMPARISON should be an rtx like -- `(eq (...) (...))'. */ --static enum arm_cond_code --get_arm_condition_code (rtx comparison) -+ `arm_condition_codes', or ARM_NV if the comparison is invalid. -+ COMPARISON should be an rtx like `(eq (...) (...))'. */ -+enum arm_cond_code -+maybe_get_arm_condition_code (rtx comparison) - { - enum machine_mode mode = GET_MODE (XEXP (comparison, 0)); - enum arm_cond_code code; -@@ -17521,11 +17521,11 @@ - case CC_DLTUmode: code = ARM_CC; - - dominance: -- gcc_assert (comp_code == EQ || comp_code == NE); -- - if (comp_code == EQ) - return ARM_INVERSE_CONDITION_CODE (code); -- return code; -+ if (comp_code == NE) -+ return code; -+ return ARM_NV; - - case CC_NOOVmode: - switch (comp_code) -@@ -17534,7 +17534,7 @@ - case EQ: return ARM_EQ; - case GE: return ARM_PL; - case LT: return ARM_MI; -- default: gcc_unreachable (); -+ default: return ARM_NV; - } - - case CC_Zmode: -@@ -17542,7 +17542,7 @@ - { - case NE: return ARM_NE; - case EQ: return ARM_EQ; -- default: gcc_unreachable (); -+ default: return ARM_NV; - } - - case CC_Nmode: -@@ -17550,7 +17550,7 @@ - { - case NE: return ARM_MI; - case EQ: return ARM_PL; -- default: gcc_unreachable (); -+ default: return ARM_NV; - } - - case CCFPEmode: -@@ -17575,7 +17575,7 @@ - /* UNEQ and LTGT do not have a representation. */ - case UNEQ: /* Fall through. */ - case LTGT: /* Fall through. */ -- default: gcc_unreachable (); -+ default: return ARM_NV; - } - - case CC_SWPmode: -@@ -17591,7 +17591,7 @@ - case GTU: return ARM_CC; - case LEU: return ARM_CS; - case LTU: return ARM_HI; -- default: gcc_unreachable (); -+ default: return ARM_NV; - } - - case CC_Cmode: -@@ -17599,7 +17599,7 @@ - { - case LTU: return ARM_CS; - case GEU: return ARM_CC; -- default: gcc_unreachable (); -+ default: return ARM_NV; - } - - case CC_CZmode: -@@ -17611,7 +17611,7 @@ - case GTU: return ARM_HI; - case LEU: return ARM_LS; - case LTU: return ARM_CC; -- default: gcc_unreachable (); -+ default: return ARM_NV; - } - - case CC_NCVmode: -@@ -17621,7 +17621,7 @@ - case LT: return ARM_LT; - case GEU: return ARM_CS; - case LTU: return ARM_CC; -- default: gcc_unreachable (); -+ default: return ARM_NV; - } - - case CCmode: -@@ -17637,13 +17637,22 @@ - case GTU: return ARM_HI; - case LEU: return ARM_LS; - case LTU: return ARM_CC; -- default: gcc_unreachable (); -+ default: return ARM_NV; - } - - default: gcc_unreachable (); - } - } - -+/* Like maybe_get_arm_condition_code, but never return ARM_NV. */ -+static enum arm_cond_code -+get_arm_condition_code (rtx comparison) -+{ -+ enum arm_cond_code code = maybe_get_arm_condition_code (comparison); -+ gcc_assert (code != ARM_NV); -+ return code; -+} -+ - /* Tell arm_asm_output_opcode to output IT blocks for conditionally executed - instructions. */ - void - -=== modified file 'gcc/config/arm/arm.md' ---- a/src/gcc/config/arm/arm.md 2011-09-12 14:14:00 +0000 -+++ b/src/gcc/config/arm/arm.md 2011-10-03 09:47:33 +0000 -@@ -6543,7 +6543,7 @@ - - (define_expand "cbranchsi4" - [(set (pc) (if_then_else -- (match_operator 0 "arm_comparison_operator" -+ (match_operator 0 "expandable_comparison_operator" - [(match_operand:SI 1 "s_register_operand" "") - (match_operand:SI 2 "nonmemory_operand" "")]) - (label_ref (match_operand 3 "" "")) -@@ -6594,7 +6594,7 @@ - - (define_expand "cbranchsf4" - [(set (pc) (if_then_else -- (match_operator 0 "arm_comparison_operator" -+ (match_operator 0 "expandable_comparison_operator" - [(match_operand:SF 1 "s_register_operand" "") - (match_operand:SF 2 "arm_float_compare_operand" "")]) - (label_ref (match_operand 3 "" "")) -@@ -6606,7 +6606,7 @@ - - (define_expand "cbranchdf4" - [(set (pc) (if_then_else -- (match_operator 0 "arm_comparison_operator" -+ (match_operator 0 "expandable_comparison_operator" - [(match_operand:DF 1 "s_register_operand" "") - (match_operand:DF 2 "arm_float_compare_operand" "")]) - (label_ref (match_operand 3 "" "")) -@@ -6618,7 +6618,7 @@ - - (define_expand "cbranchdi4" - [(set (pc) (if_then_else -- (match_operator 0 "arm_comparison_operator" -+ (match_operator 0 "expandable_comparison_operator" - [(match_operand:DI 1 "cmpdi_operand" "") - (match_operand:DI 2 "cmpdi_operand" "")]) - (label_ref (match_operand 3 "" "")) -@@ -7473,7 +7473,7 @@ - - (define_expand "cstoresi4" - [(set (match_operand:SI 0 "s_register_operand" "") -- (match_operator:SI 1 "arm_comparison_operator" -+ (match_operator:SI 1 "expandable_comparison_operator" - [(match_operand:SI 2 "s_register_operand" "") - (match_operand:SI 3 "reg_or_int_operand" "")]))] - "TARGET_32BIT || TARGET_THUMB1" -@@ -7609,7 +7609,7 @@ - - (define_expand "cstoresf4" - [(set (match_operand:SI 0 "s_register_operand" "") -- (match_operator:SI 1 "arm_comparison_operator" -+ (match_operator:SI 1 "expandable_comparison_operator" - [(match_operand:SF 2 "s_register_operand" "") - (match_operand:SF 3 "arm_float_compare_operand" "")]))] - "TARGET_32BIT && TARGET_HARD_FLOAT" -@@ -7619,7 +7619,7 @@ - - (define_expand "cstoredf4" - [(set (match_operand:SI 0 "s_register_operand" "") -- (match_operator:SI 1 "arm_comparison_operator" -+ (match_operator:SI 1 "expandable_comparison_operator" - [(match_operand:DF 2 "s_register_operand" "") - (match_operand:DF 3 "arm_float_compare_operand" "")]))] - "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE" -@@ -7629,7 +7629,7 @@ - - (define_expand "cstoredi4" - [(set (match_operand:SI 0 "s_register_operand" "") -- (match_operator:SI 1 "arm_comparison_operator" -+ (match_operator:SI 1 "expandable_comparison_operator" - [(match_operand:DI 2 "cmpdi_operand" "") - (match_operand:DI 3 "cmpdi_operand" "")]))] - "TARGET_32BIT" -@@ -7749,7 +7749,7 @@ - - (define_expand "movsicc" - [(set (match_operand:SI 0 "s_register_operand" "") -- (if_then_else:SI (match_operand 1 "arm_comparison_operator" "") -+ (if_then_else:SI (match_operand 1 "expandable_comparison_operator" "") - (match_operand:SI 2 "arm_not_operand" "") - (match_operand:SI 3 "arm_not_operand" "")))] - "TARGET_32BIT" -@@ -7769,7 +7769,7 @@ - - (define_expand "movsfcc" - [(set (match_operand:SF 0 "s_register_operand" "") -- (if_then_else:SF (match_operand 1 "arm_comparison_operator" "") -+ (if_then_else:SF (match_operand 1 "expandable_comparison_operator" "") - (match_operand:SF 2 "s_register_operand" "") - (match_operand:SF 3 "nonmemory_operand" "")))] - "TARGET_32BIT && TARGET_HARD_FLOAT" -@@ -7795,7 +7795,7 @@ - - (define_expand "movdfcc" - [(set (match_operand:DF 0 "s_register_operand" "") -- (if_then_else:DF (match_operand 1 "arm_comparison_operator" "") -+ (if_then_else:DF (match_operand 1 "expandable_comparison_operator" "") - (match_operand:DF 2 "s_register_operand" "") - (match_operand:DF 3 "arm_float_add_operand" "")))] - "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP_DOUBLE)" - -=== modified file 'gcc/config/arm/predicates.md' ---- a/src/gcc/config/arm/predicates.md 2011-09-15 09:45:31 +0000 -+++ b/src/gcc/config/arm/predicates.md 2011-10-03 09:47:33 +0000 -@@ -242,11 +242,15 @@ - - ;; True for integer comparisons and, if FP is active, for comparisons - ;; other than LTGT or UNEQ. -+(define_special_predicate "expandable_comparison_operator" -+ (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu, -+ unordered,ordered,unlt,unle,unge,ungt")) -+ -+;; Likewise, but only accept comparisons that are directly supported -+;; by ARM condition codes. - (define_special_predicate "arm_comparison_operator" -- (ior (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu") -- (and (match_test "TARGET_32BIT && TARGET_HARD_FLOAT -- && (TARGET_FPA || TARGET_VFP)") -- (match_code "unordered,ordered,unlt,unle,unge,ungt")))) -+ (and (match_operand 0 "expandable_comparison_operator") -+ (match_test "maybe_get_arm_condition_code (op) != ARM_NV"))) - - (define_special_predicate "lt_ge_comparison_operator" - (match_code "lt,ge")) - -=== added file 'gcc/testsuite/gcc.dg/torture/pr49030.c' ---- a/src/gcc/testsuite/gcc.dg/torture/pr49030.c 1970-01-01 00:00:00 +0000 -+++ b/src/gcc/testsuite/gcc.dg/torture/pr49030.c 2011-10-03 09:46:40 +0000 -@@ -0,0 +1,19 @@ -+void -+sample_move_d32u24_sS (char *dst, float *src, unsigned long nsamples, -+ unsigned long dst_skip) -+{ -+ long long y; -+ while (nsamples--) -+ { -+ y = (long long) (*src * 8388608.0f) << 8; -+ if (y > 2147483647) { -+ *(int *) dst = 2147483647; -+ } else if (y < -2147483647 - 1) { -+ *(int *) dst = -2147483647 - 1; -+ } else { -+ *(int *) dst = (int) y; -+ } -+ dst += dst_skip; -+ src++; -+ } -+} - -=== added file 'gcc/testsuite/gcc.target/arm/cmp-1.c' ---- a/src/gcc/testsuite/gcc.target/arm/cmp-1.c 1970-01-01 00:00:00 +0000 -+++ b/src/gcc/testsuite/gcc.target/arm/cmp-1.c 2011-10-03 09:47:33 +0000 -@@ -0,0 +1,37 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O" } */ -+/* { dg-final { scan-assembler-not "\tbl\t" } } */ -+/* { dg-final { scan-assembler-not "__aeabi" } } */ -+int x, y; -+ -+#define TEST_EXPR(NAME, ARGS, EXPR) \ -+ int NAME##1 ARGS { return (EXPR); } \ -+ int NAME##2 ARGS { return !(EXPR); } \ -+ int NAME##3 ARGS { return (EXPR) ? x : y; } \ -+ void NAME##4 ARGS { if (EXPR) x++; } \ -+ void NAME##5 ARGS { if (!(EXPR)) x++; } -+ -+#define TEST(NAME, TYPE, OPERATOR) \ -+ TEST_EXPR (NAME##_rr, (TYPE a1, TYPE a2), a1 OPERATOR a2) \ -+ TEST_EXPR (NAME##_rm, (TYPE a1, TYPE *a2), a1 OPERATOR *a2) \ -+ TEST_EXPR (NAME##_mr, (TYPE *a1, TYPE a2), *a1 OPERATOR a2) \ -+ TEST_EXPR (NAME##_mm, (TYPE *a1, TYPE *a2), *a1 OPERATOR *a2) \ -+ TEST_EXPR (NAME##_rc, (TYPE a1), a1 OPERATOR 100) \ -+ TEST_EXPR (NAME##_cr, (TYPE a1), 100 OPERATOR a1) -+ -+#define TEST_OP(NAME, OPERATOR) \ -+ TEST (sc_##NAME, signed char, OPERATOR) \ -+ TEST (uc_##NAME, unsigned char, OPERATOR) \ -+ TEST (ss_##NAME, short, OPERATOR) \ -+ TEST (us_##NAME, unsigned short, OPERATOR) \ -+ TEST (si_##NAME, int, OPERATOR) \ -+ TEST (ui_##NAME, unsigned int, OPERATOR) \ -+ TEST (sll_##NAME, long long, OPERATOR) \ -+ TEST (ull_##NAME, unsigned long long, OPERATOR) -+ -+TEST_OP (eq, ==) -+TEST_OP (ne, !=) -+TEST_OP (lt, <) -+TEST_OP (gt, >) -+TEST_OP (le, <=) -+TEST_OP (ge, >=) - -=== added file 'gcc/testsuite/gcc.target/arm/cmp-2.c' ---- a/src/gcc/testsuite/gcc.target/arm/cmp-2.c 1970-01-01 00:00:00 +0000 -+++ b/src/gcc/testsuite/gcc.target/arm/cmp-2.c 2011-10-03 09:47:33 +0000 -@@ -0,0 +1,49 @@ -+/* { dg-do compile } */ -+/* { dg-require-effective-target arm_vfp_ok } */ -+/* { dg-skip-if "need fp instructions" { *-*-* } { "-mfloat-abi=soft" } { "" } } */ -+/* { dg-options "-O -mfpu=vfp -mfloat-abi=softfp" } */ -+/* { dg-final { scan-assembler-not "\tbl\t" } } */ -+/* { dg-final { scan-assembler-not "__aeabi" } } */ -+int x, y; -+ -+#define EQ(X, Y) ((X) == (Y)) -+#define NE(X, Y) ((X) != (Y)) -+#define LT(X, Y) ((X) < (Y)) -+#define GT(X, Y) ((X) > (Y)) -+#define LE(X, Y) ((X) <= (Y)) -+#define GE(X, Y) ((X) >= (Y)) -+ -+#define TEST_EXPR(NAME, ARGS, EXPR) \ -+ int NAME##1 ARGS { return (EXPR); } \ -+ int NAME##2 ARGS { return !(EXPR); } \ -+ int NAME##3 ARGS { return (EXPR) ? x : y; } \ -+ void NAME##4 ARGS { if (EXPR) x++; } \ -+ void NAME##5 ARGS { if (!(EXPR)) x++; } -+ -+#define TEST(NAME, TYPE, OPERATOR) \ -+ TEST_EXPR (NAME##_rr, (TYPE a1, TYPE a2), OPERATOR (a1, a2)) \ -+ TEST_EXPR (NAME##_rm, (TYPE a1, TYPE *a2), OPERATOR (a1, *a2)) \ -+ TEST_EXPR (NAME##_mr, (TYPE *a1, TYPE a2), OPERATOR (*a1, a2)) \ -+ TEST_EXPR (NAME##_mm, (TYPE *a1, TYPE *a2), OPERATOR (*a1, *a2)) \ -+ TEST_EXPR (NAME##_rc, (TYPE a1), OPERATOR (a1, 100)) \ -+ TEST_EXPR (NAME##_cr, (TYPE a1), OPERATOR (100, a1)) -+ -+#define TEST_OP(NAME, OPERATOR) \ -+ TEST (f_##NAME, float, OPERATOR) \ -+ TEST (d_##NAME, double, OPERATOR) \ -+ TEST (ld_##NAME, long double, OPERATOR) -+ -+TEST_OP (eq, EQ) -+TEST_OP (ne, NE) -+TEST_OP (lt, LT) -+TEST_OP (gt, GT) -+TEST_OP (le, LE) -+TEST_OP (ge, GE) -+TEST_OP (blt, __builtin_isless) -+TEST_OP (bgt, __builtin_isgreater) -+TEST_OP (ble, __builtin_islessequal) -+TEST_OP (bge, __builtin_isgreaterequal) -+/* This one should be expanded into separate ordered and equality -+ comparisons. */ -+TEST_OP (blg, __builtin_islessgreater) -+TEST_OP (bun, __builtin_isunordered) - diff --git a/debian/patches/pr49169.diff b/debian/patches/pr49169.diff deleted file mode 100644 index 0f808dc..0000000 --- a/debian/patches/pr49169.diff +++ /dev/null @@ -1,186 +0,0 @@ -# DP: * Fix PR tree-optimization/49169, optimisations strip the Thumb/ARM mode bit -# DP: off function pointers (Richard Sandiford). - -2011-07-07 Richard Sandiford <richard.sandiford@linaro.org> - - gcc/ - * builtins.c (get_object_alignment): Fix comment. - * fold-const.c (get_pointer_modulus_and_residue): Remove - allow_func_align. Use get_object_alignment. - (fold_binary_loc): Update caller. - -2011-07-07 Richard Sandiford <richard.sandiford@linaro.org> - - gcc/ - Backport from mainline: - - 2011-06-29 Richard Sandiford <richard.sandiford@linaro.org> - - PR tree-optimization/49545 - * builtins.c (get_object_alignment_1): Update function comment. - Do not use DECL_ALIGN for functions, but test - TARGET_PTRMEMFUNC_VBIT_LOCATION instead. - * fold-const.c (get_pointer_modulus_and_residue): Don't check - for functions here. - * tree-ssa-ccp.c (get_value_from_alignment): Likewise. - - gcc/testsuite/ - Backport from mainline: - - 2011-06-29 Richard Sandiford <richard.sandiford@linaro.org> - - * gcc.dg/torture/pr49169.c: Restrict to ARM and MIPS targets. - -2011-07-07 Richard Sandiford <richard.sandiford@linaro.org> - - gcc/ - Backport from mainline: - - 2011-07-27 Richard Guenther <rguenther@suse.de> - - PR tree-optimization/49169 - * fold-const.c (get_pointer_modulus_and_residue): Don't rely on - the alignment of function decls. - - gcc/testsuite/ - Backport from mainline: - - 2011-07-27 Michael Hope <michael.hope@linaro.org> - Richard Sandiford <richard.sandiford@linaro.org> - - PR tree-optimization/49169 - * gcc.dg/torture/pr49169.c: New test. - - -=== modified file 'gcc/builtins.c' ---- a/src/gcc/builtins.c 2011-03-03 21:56:58 +0000 -+++ b/src/gcc/builtins.c 2011-07-04 09:52:27 +0000 -@@ -264,7 +264,14 @@ - } - - /* Return the alignment in bits of EXP, an object. -- Don't return more than MAX_ALIGN no matter what. */ -+ Don't return more than MAX_ALIGN no matter what. -+ -+ Note that the address (and thus the alignment) computed here is based -+ on the address to which a symbol resolves, whereas DECL_ALIGN is based -+ on the address at which an object is actually located. These two -+ addresses are not always the same. For example, on ARM targets, -+ the address &foo of a Thumb function foo() has the lowest bit set, -+ whereas foo() itself starts on an even address. */ - - unsigned int - get_object_alignment (tree exp, unsigned int max_align) -@@ -286,7 +293,21 @@ - exp = DECL_INITIAL (exp); - if (DECL_P (exp) - && TREE_CODE (exp) != LABEL_DECL) -- align = DECL_ALIGN (exp); -+ { -+ if (TREE_CODE (exp) == FUNCTION_DECL) -+ { -+ /* Function addresses can encode extra information besides their -+ alignment. However, if TARGET_PTRMEMFUNC_VBIT_LOCATION -+ allows the low bit to be used as a virtual bit, we know -+ that the address itself must be 2-byte aligned. */ -+ if (TARGET_PTRMEMFUNC_VBIT_LOCATION == ptrmemfunc_vbit_in_pfn) -+ align = 2 * BITS_PER_UNIT; -+ else -+ align = BITS_PER_UNIT; -+ } -+ else -+ align = DECL_ALIGN (exp); -+ } - else if (CONSTANT_CLASS_P (exp)) - { - align = TYPE_ALIGN (TREE_TYPE (exp)); - -=== modified file 'gcc/fold-const.c' ---- a/src/gcc/fold-const.c 2011-05-23 20:37:18 +0000 -+++ b/src/gcc/fold-const.c 2011-07-04 09:52:27 +0000 -@@ -9232,15 +9232,10 @@ - 0 <= N < M as is common. In general, the precise value of P is unknown. - M is chosen as large as possible such that constant N can be determined. - -- Returns M and sets *RESIDUE to N. -- -- If ALLOW_FUNC_ALIGN is true, do take functions' DECL_ALIGN_UNIT into -- account. This is not always possible due to PR 35705. -- */ -+ Returns M and sets *RESIDUE to N. */ - - static unsigned HOST_WIDE_INT --get_pointer_modulus_and_residue (tree expr, unsigned HOST_WIDE_INT *residue, -- bool allow_func_align) -+get_pointer_modulus_and_residue (tree expr, unsigned HOST_WIDE_INT *residue) - { - enum tree_code code; - -@@ -9270,9 +9265,8 @@ - } - } - -- if (DECL_P (expr) -- && (allow_func_align || TREE_CODE (expr) != FUNCTION_DECL)) -- return DECL_ALIGN_UNIT (expr); -+ if (DECL_P (expr)) -+ return get_object_alignment (expr, ~0U) / BITS_PER_UNIT; - } - else if (code == POINTER_PLUS_EXPR) - { -@@ -9282,8 +9276,7 @@ - - op0 = TREE_OPERAND (expr, 0); - STRIP_NOPS (op0); -- modulus = get_pointer_modulus_and_residue (op0, residue, -- allow_func_align); -+ modulus = get_pointer_modulus_and_residue (op0, residue); - - op1 = TREE_OPERAND (expr, 1); - STRIP_NOPS (op1); -@@ -11163,8 +11156,7 @@ - unsigned HOST_WIDE_INT modulus, residue; - unsigned HOST_WIDE_INT low = TREE_INT_CST_LOW (arg1); - -- modulus = get_pointer_modulus_and_residue (arg0, &residue, -- integer_onep (arg1)); -+ modulus = get_pointer_modulus_and_residue (arg0, &residue); - - /* This works because modulus is a power of 2. If this weren't the - case, we'd have to replace it by its greatest power-of-2 - -=== added file 'gcc/testsuite/gcc.dg/torture/pr49169.c' ---- a/src/gcc/testsuite/gcc.dg/torture/pr49169.c 1970-01-01 00:00:00 +0000 -+++ b/src/gcc/testsuite/gcc.dg/torture/pr49169.c 2011-06-29 09:46:06 +0000 -@@ -0,0 +1,15 @@ -+/* { dg-do compile { target { arm*-*-* || mips*-*-* } } } */ -+ -+#include <stdlib.h> -+#include <stdint.h> -+ -+int -+main (void) -+{ -+ void *p = main; -+ if ((intptr_t) p & 1) -+ abort (); -+ return 0; -+} -+ -+/* { dg-final { scan-assembler "abort" } } */ - -=== modified file 'gcc/tree-ssa-ccp.c' ---- a/src/gcc/tree-ssa-ccp.c 2011-05-05 15:42:22 +0000 -+++ b/src/gcc/tree-ssa-ccp.c 2011-06-29 09:46:06 +0000 -@@ -522,10 +522,6 @@ - val = bit_value_binop (PLUS_EXPR, TREE_TYPE (expr), - TREE_OPERAND (base, 0), TREE_OPERAND (base, 1)); - else if (base -- /* ??? While function decls have DECL_ALIGN their addresses -- may encode extra information in the lower bits on some -- targets (PR47239). Simply punt for function decls for now. */ -- && TREE_CODE (base) != FUNCTION_DECL - && ((align = get_object_alignment (base, BIGGEST_ALIGNMENT)) - > BITS_PER_UNIT)) - { - diff --git a/debian/patches/pr49696.diff b/debian/patches/pr49696.diff deleted file mode 100644 index 8a9b57b..0000000 --- a/debian/patches/pr49696.diff +++ /dev/null @@ -1,74 +0,0 @@ -2011-10-02 Richard Sandiford <rdsandiford@googlemail.com> - - PR target/49696 - * config/mips/sync.md (sync_<optab>_12): Allow zero operands. - (sync_old_<optab>_12, sync_new_<optab>_12, sync_nand_12): Likewise. - (sync_old_nand_12, sync_new_nand_12, test_and_set_12): Likewise. - -Index: gcc/config/mips/sync.md -=================================================================== ---- a/src/gcc/config/mips/sync.md (revision 179430) -+++ b/src/gcc/config/mips/sync.md (revision 179431) -@@ -136,7 +136,7 @@ - [(match_operand:SI 1 "register_operand" "d") - (match_operand:SI 2 "register_operand" "d") - (atomic_hiqi_op:SI (match_dup 0) -- (match_operand:SI 3 "register_operand" "dJ"))] -+ (match_operand:SI 3 "reg_or_0_operand" "dJ"))] - UNSPEC_SYNC_OLD_OP_12)) - (clobber (match_scratch:SI 4 "=&d"))] - "GENERATE_LL_SC" -@@ -177,7 +177,7 @@ - [(match_operand:SI 2 "register_operand" "d") - (match_operand:SI 3 "register_operand" "d") - (atomic_hiqi_op:SI (match_dup 0) -- (match_operand:SI 4 "register_operand" "dJ"))] -+ (match_operand:SI 4 "reg_or_0_operand" "dJ"))] - UNSPEC_SYNC_OLD_OP_12)) - (clobber (match_scratch:SI 5 "=&d"))] - "GENERATE_LL_SC" -@@ -218,7 +218,7 @@ - (match_operand:SI 2 "register_operand" "d") - (match_operand:SI 3 "register_operand" "d") - (atomic_hiqi_op:SI (match_dup 0) -- (match_operand:SI 4 "register_operand" "dJ"))] -+ (match_operand:SI 4 "reg_or_0_operand" "dJ"))] - UNSPEC_SYNC_NEW_OP_12)) - (set (match_dup 1) - (unspec_volatile:SI -@@ -259,7 +259,7 @@ - [(match_operand:SI 1 "register_operand" "d") - (match_operand:SI 2 "register_operand" "d") - (match_dup 0) -- (match_operand:SI 3 "register_operand" "dJ")] -+ (match_operand:SI 3 "reg_or_0_operand" "dJ")] - UNSPEC_SYNC_OLD_OP_12)) - (clobber (match_scratch:SI 4 "=&d"))] - "GENERATE_LL_SC" -@@ -298,7 +298,7 @@ - (unspec_volatile:SI - [(match_operand:SI 2 "register_operand" "d") - (match_operand:SI 3 "register_operand" "d") -- (match_operand:SI 4 "register_operand" "dJ")] -+ (match_operand:SI 4 "reg_or_0_operand" "dJ")] - UNSPEC_SYNC_OLD_OP_12)) - (clobber (match_scratch:SI 5 "=&d"))] - "GENERATE_LL_SC" -@@ -337,7 +337,7 @@ - [(match_operand:SI 1 "memory_operand" "+R") - (match_operand:SI 2 "register_operand" "d") - (match_operand:SI 3 "register_operand" "d") -- (match_operand:SI 4 "register_operand" "dJ")] -+ (match_operand:SI 4 "reg_or_0_operand" "dJ")] - UNSPEC_SYNC_NEW_OP_12)) - (set (match_dup 1) - (unspec_volatile:SI -@@ -546,7 +546,7 @@ - (set (match_dup 1) - (unspec_volatile:SI [(match_operand:SI 2 "register_operand" "d") - (match_operand:SI 3 "register_operand" "d") -- (match_operand:SI 4 "arith_operand" "dJ")] -+ (match_operand:SI 4 "reg_or_0_operand" "dJ")] - UNSPEC_SYNC_EXCHANGE_12))] - "GENERATE_LL_SC" - { return mips_output_sync_loop (insn, operands); } diff --git a/debian/patches/pr49756.diff b/debian/patches/pr49756.diff deleted file mode 100644 index 67d892b..0000000 --- a/debian/patches/pr49756.diff +++ /dev/null @@ -1,261 +0,0 @@ -# DP: Fix PR c++/49756, backport from trunk - -gcc/ - -2011-07-22 Jakub Jelinek <jakub@redhat.com> - - PR c++/49756 - * gcc.c (main): Call stack_limit_increase (64MB). - * toplev.c (toplev_main): Likewise. - -include/ - -2011-07-22 Jakub Jelinek <jakub@redhat.com> - - PR c++/49756 - * libiberty.h (stack_limit_increase): New prototype. - -libiberty/ - -2011-07-22 Jakub Jelinek <jakub@redhat.com> - - PR c++/49756 - * stack-limit.c: New file. - * Makefile.in: Regenerate deps. - (CFILES): Add stack-limit.c. - (REQUIRED_OFILES): Add ./stack-limit.$(objext). - * configure.ac (checkfuncs): Add getrlimit and setrlimit. - (AC_CHECK_FUNCS): Likewise. - * configure: Regenerated. - * config.in: Regenerated. - -Index: gcc/gcc.c -=================================================================== ---- a/src/gcc/gcc.c (revision 176616) -+++ b/src/gcc/gcc.c (revision 176617) -@@ -6156,6 +6156,10 @@ - signal (SIGCHLD, SIG_DFL); - #endif - -+ /* Parsing and gimplification sometimes need quite large stack. -+ Increase stack size limits if possible. */ -+ stack_limit_increase (64 * 1024 * 1024); -+ - /* Allocate the argument vector. */ - alloc_args (); - -Index: gcc/toplev.c -=================================================================== ---- a/src/gcc/toplev.c (revision 176616) -+++ b/src/gcc/toplev.c (revision 176617) -@@ -1911,6 +1911,10 @@ - int - toplev_main (int argc, char **argv) - { -+ /* Parsing and gimplification sometimes need quite large stack. -+ Increase stack size limits if possible. */ -+ stack_limit_increase (64 * 1024 * 1024); -+ - expandargv (&argc, &argv); - - /* Initialization of GCC's environment, and diagnostics. */ -Index: include/libiberty.h -=================================================================== ---- a/src/include/libiberty.h (revision 176616) -+++ b/src/include/libiberty.h (revision 176617) -@@ -1,7 +1,7 @@ - /* Function declarations for libiberty. - - Copyright 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, -- 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. -+ 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. - - Note - certain prototypes declared in this header file are for - functions whoes implementation copyright does not belong to the -@@ -637,6 +637,9 @@ - /* Set the title of a process */ - extern void setproctitle (const char *name, ...); - -+/* Increase stack limit if possible. */ -+extern void stack_limit_increase (unsigned long); -+ - #define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0])) - - /* Drastically simplified alloca configurator. If we're using GCC, -Index: libiberty/configure.ac -=================================================================== ---- a/src/libiberty/configure.ac (revision 176616) -+++ b/src/libiberty/configure.ac (revision 176617) -@@ -358,10 +358,10 @@ - - vars="sys_errlist sys_nerr sys_siglist" - --checkfuncs="__fsetlocking canonicalize_file_name dup3 getrusage getsysinfo \ -- gettimeofday on_exit psignal pstat_getdynamic pstat_getstatic realpath \ -- sbrk spawnve spawnvpe strerror strsignal sysconf sysctl sysmp table \ -- times wait3 wait4" -+checkfuncs="__fsetlocking canonicalize_file_name dup3 getrlimit getrusage \ -+ getsysinfo gettimeofday on_exit psignal pstat_getdynamic pstat_getstatic \ -+ realpath setrlimit sbrk spawnve spawnvpe strerror strsignal sysconf sysctl \ -+ sysmp table times wait3 wait4" - - # These are neither executed nor required, but they help keep - # autoheader happy without adding a bunch of text to acconfig.h. -@@ -371,13 +371,13 @@ - calloc canonicalize_file_name clock \ - dup3 \ - ffs __fsetlocking \ -- getcwd getpagesize getrusage getsysinfo gettimeofday \ -+ getcwd getpagesize getrlimit getrusage getsysinfo gettimeofday \ - index insque \ - memchr memcmp memcpy memmem memmove memset mkstemps \ - on_exit \ - psignal pstat_getdynamic pstat_getstatic putenv \ - random realpath rename rindex \ -- sbrk setenv setproctitle sigsetmask snprintf spawnve spawnvpe \ -+ sbrk setenv setproctitle setrlimit sigsetmask snprintf spawnve spawnvpe \ - stpcpy stpncpy strcasecmp strchr strdup \ - strerror strncasecmp strndup strrchr strsignal strstr strtod strtol \ - strtoul strverscmp sysconf sysctl sysmp \ -Index: libiberty/Makefile.in -=================================================================== ---- a/src/libiberty/Makefile.in (revision 176616) -+++ b/src/libiberty/Makefile.in (revision 176617) -@@ -2,7 +2,7 @@ - # Originally written by K. Richard Pixley <rich@cygnus.com>. - # - # Copyright (C) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, --# 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 -+# 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 - # Free Software Foundation - # - # This file is part of the libiberty library. -@@ -148,10 +148,10 @@ - simple-object.c simple-object-coff.c simple-object-elf.c \ - simple-object-mach-o.c \ - snprintf.c sort.c \ -- spaces.c splay-tree.c stpcpy.c stpncpy.c strcasecmp.c \ -- strchr.c strdup.c strerror.c strncasecmp.c strncmp.c \ -- strrchr.c strsignal.c strstr.c strtod.c strtol.c strtoul.c \ -- strndup.c strverscmp.c \ -+ spaces.c splay-tree.c stack-limit.c stpcpy.c stpncpy.c \ -+ strcasecmp.c strchr.c strdup.c strerror.c strncasecmp.c \ -+ strncmp.c strrchr.c strsignal.c strstr.c strtod.c strtol.c \ -+ strtoul.c strndup.c strverscmp.c \ - tmpnam.c \ - unlink-if-ordinary.c \ - vasprintf.c vfork.c vfprintf.c vprintf.c vsnprintf.c vsprintf.c \ -@@ -183,7 +183,8 @@ - ./simple-object.$(objext) ./simple-object-coff.$(objext) \ - ./simple-object-elf.$(objext) ./simple-object-mach-o.$(objext) \ - ./sort.$(objext) ./spaces.$(objext) \ -- ./splay-tree.$(objext) ./strerror.$(objext) \ -+ ./splay-tree.$(objext) ./stack-limit.$(objext) \ -+ ./strerror.$(objext) \ - ./strsignal.$(objext) ./unlink-if-ordinary.$(objext) \ - ./xatexit.$(objext) ./xexit.$(objext) ./xmalloc.$(objext) \ - ./xmemdup.$(objext) ./xstrdup.$(objext) ./xstrerror.$(objext) \ -@@ -1033,6 +1034,12 @@ - else true; fi - $(COMPILE.c) $(srcdir)/splay-tree.c $(OUTPUT_OPTION) - -+./stack-limit.$(objext): $(srcdir)/stack-limit.c config.h -+ if [ x"$(PICFLAG)" != x ]; then \ -+ $(COMPILE.c) $(PICFLAG) $(srcdir)/stack-limit.c -o pic/$@; \ -+ else true; fi -+ $(COMPILE.c) $(srcdir)/stack-limit.c $(OUTPUT_OPTION) -+ - ./stpcpy.$(objext): $(srcdir)/stpcpy.c $(INCDIR)/ansidecl.h - if [ x"$(PICFLAG)" != x ]; then \ - $(COMPILE.c) $(PICFLAG) $(srcdir)/stpcpy.c -o pic/$@; \ -Index: libiberty/config.in -=================================================================== ---- a/src/libiberty/config.in (revision 176616) -+++ a/src/libiberty/config.in (revision 176617) -@@ -109,6 +109,9 @@ - /* Define to 1 if you have the `getpagesize' function. */ - #undef HAVE_GETPAGESIZE - -+/* Define to 1 if you have the `getrlimit' function. */ -+#undef HAVE_GETRLIMIT -+ - /* Define to 1 if you have the `getrusage' function. */ - #undef HAVE_GETRUSAGE - -@@ -205,6 +208,9 @@ - /* Define to 1 if you have the `setproctitle' function. */ - #undef HAVE_SETPROCTITLE - -+/* Define to 1 if you have the `setrlimit' function. */ -+#undef HAVE_SETRLIMIT -+ - /* Define to 1 if you have the `sigsetmask' function. */ - #undef HAVE_SIGSETMASK - -Index: libiberty/stack-limit.c -=================================================================== ---- a/src/libiberty/stack-limit.c (revision 0) -+++ b/src/libiberty/stack-limit.c (revision 176622) -@@ -0,0 +1,62 @@ -+/* Increase stack size limit if possible. -+ Copyright (C) 2011 Free Software Foundation, Inc. -+ -+This file is part of the libiberty library. This library is free -+software; you can redistribute it and/or modify it under the -+terms of the GNU General Public License as published by the -+Free Software Foundation; either version 2, or (at your option) -+any later version. -+ -+This library is distributed in the hope that it will be useful, -+but WITHOUT ANY WARRANTY; without even the implied warranty of -+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+GNU General Public License for more details. -+ -+You should have received a copy of the GNU General Public License -+along with GNU CC; see the file COPYING. If not, write to -+the Free Software Foundation, 51 Franklin Street - Fifth Floor, -+Boston, MA 02110-1301, USA. -+ -+As a special exception, if you link this library with files -+compiled with a GNU compiler to produce an executable, this does not cause -+the resulting executable to be covered by the GNU General Public License. -+This exception does not however invalidate any other reasons why -+the executable file might be covered by the GNU General Public License. */ -+ -+/* -+ -+@deftypefn Extension void stack_limit_increase (unsigned long @var{pref}) -+ -+Attempt to increase stack size limit to @var{pref} bytes if possible. -+ -+@end deftypefn -+ -+*/ -+ -+#include "config.h" -+ -+#ifdef HAVE_STDINT_H -+#include <stdint.h> -+#endif -+#ifdef HAVE_SYS_RESOURCE_H -+#include <sys/resource.h> -+#endif -+ -+void -+stack_limit_increase (unsigned long pref) -+{ -+#if defined(HAVE_SETRLIMIT) && defined(HAVE_GETRLIMIT) \ -+ && defined(RLIMIT_STACK) && defined(RLIM_INFINITY) -+ struct rlimit rlim; -+ if (getrlimit (RLIMIT_STACK, &rlim) == 0 -+ && rlim.rlim_cur != RLIM_INFINITY -+ && rlim.rlim_cur < pref -+ && (rlim.rlim_max == RLIM_INFINITY || rlim.rlim_cur < rlim.rlim_max)) -+ { -+ rlim.rlim_cur = pref; -+ if (rlim.rlim_max != RLIM_INFINITY && rlim.rlim_cur > rlim.rlim_max) -+ rlim.rlim_cur = rlim.rlim_max; -+ setrlimit (RLIMIT_STACK, &rlim); -+ } -+#endif -+} diff --git a/debian/patches/pr49944.diff b/debian/patches/pr49944.diff index e0475f9..de41501 100644 --- a/debian/patches/pr49944.diff +++ b/debian/patches/pr49944.diff @@ -183,7 +183,7 @@ Index: b/src/gcc/ada/gcc-interface/Makefile.in =================================================================== --- a/src/gcc/ada/gcc-interface/Makefile.in +++ b/src/gcc/ada/gcc-interface/Makefile.in -@@ -1125,9 +1125,7 @@ +@@ -1145,9 +1145,7 @@ s-osinte.adb<s-osinte-posix.adb \ s-osinte.ads<s-osinte-kfreebsd-gnu.ads \ s-osprim.adb<s-osprim-posix.adb \ @@ -193,8 +193,8 @@ Index: b/src/gcc/ada/gcc-interface/Makefile.in + s-taprop.adb<s-taprop-posix.adb \ s-taspri.ads<s-taspri-posix.ads \ s-tpopsp.adb<s-tpopsp-posix-foreign.adb \ - system.ads<system-freebsd-x86.ads -@@ -1153,9 +1151,7 @@ + $(ATOMICS_TARGET_PAIRS) \ +@@ -1176,9 +1174,7 @@ s-osinte.adb<s-osinte-posix.adb \ s-osinte.ads<s-osinte-kfreebsd-gnu.ads \ s-osprim.adb<s-osprim-posix.adb \ @@ -205,46 +205,3 @@ Index: b/src/gcc/ada/gcc-interface/Makefile.in s-taspri.ads<s-taspri-posix.ads \ s-tpopsp.adb<s-tpopsp-posix-foreign.adb \ system.ads<system-freebsd-x86_64.ads -Index: b/src/gcc/ada/s-osinte-freebsd.ads -=================================================================== ---- a/src/gcc/ada/s-osinte-freebsd.ads -+++ b/src/gcc/ada/s-osinte-freebsd.ads -@@ -7,7 +7,7 @@ - -- S p e c -- - -- -- - -- Copyright (C) 1991-1994, Florida State University -- ---- Copyright (C) 1995-2009, Free Software Foundation, Inc. -- -+-- Copyright (C) 1995-2011, Free Software Foundation, Inc. -- - -- -- - -- GNARL is free software; you can redistribute it and/or modify it under -- - -- terms of the GNU General Public License as published by the Free Soft- -- -@@ -33,7 +33,7 @@ - -- -- - ------------------------------------------------------------------------------ - ---- This is the FreeBSD PTHREADS version of this package -+-- This is the FreeBSD (POSIX Threads) version of this package - - -- This package encapsulates all direct interfaces to OS services - -- that are needed by the tasking run-time (libgnarl). -@@ -199,7 +199,7 @@ - - type timespec is private; - -- function nanosleep (rqtp, rmtp : access timespec) return int; -+ function nanosleep (rqtp, rmtp : access timespec) return int; - pragma Import (C, nanosleep, "nanosleep"); - - type clockid_t is private; -@@ -313,10 +313,7 @@ - -- No alternate signal stack is used on this platform - - Stack_Base_Available : constant Boolean := False; -- -- Indicates whether the stack base is available on this target. This -- -- allows us to share s-osinte.adb between all the FSU run time. Note that -- -- this value can only be true if pthread_t has a complete definition that -- -- corresponds exactly to the C header files. -+ -- Indicates whether the stack base is available on this target - - function Get_Stack_Base (thread : pthread_t) return Address; - pragma Inline (Get_Stack_Base); diff --git a/debian/patches/pr50114.diff b/debian/patches/pr50114.diff deleted file mode 100644 index 18db684..0000000 --- a/debian/patches/pr50114.diff +++ /dev/null @@ -1,59 +0,0 @@ -# DP: Fix PR c++/50114, backport from trunk. - -gcc/testsuite/ - -2011-08-30 Jason Merrill <jason@redhat.com> - - PR c++/50114 - * g++.dg/cpp0x/lambda/lambda-for.C: New. - -cp/ - -2011-08-30 Jason Merrill <jason@redhat.com> - - PR c++/50114 - * decl.c (poplevel): Disable for scope compatibility hack - in C++11 mode. - -Index: gcc/testsuite/g++.dg/ext/forscope2.C -=================================================================== ---- a/src/gcc/testsuite/g++.dg/ext/forscope2.C (revision 178337) -+++ b/src/gcc/testsuite/g++.dg/ext/forscope2.C (revision 178338) -@@ -1,5 +1,5 @@ - // { dg-do compile } --// { dg-options -fpermissive } -+// { dg-options "-fpermissive -std=c++98" } - - // Copyright (C) 2001 Free Software Foundation, Inc. - // Contributed by Nathan Sidwell 4 Sept 2001 <nathan@codesourcery.com> -Index: gcc/testsuite/g++.dg/cpp0x/lambda/lambda-for.C -=================================================================== ---- a/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-for.C (revision 0) -+++ b/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-for.C (revision 178338) -@@ -0,0 +1,12 @@ -+// PR c++/50114 -+// { dg-options "-std=c++0x -w" } -+ -+int open() -+{ -+ int *x2feed_i = 0; -+ auto insert_feed = [&](unsigned char venue, int* newfeed) -+ { -+ for(int x2feed_i = 1; 0; ) ; -+ x2feed_i = newfeed; -+ }; -+} -Index: gcc/cp/decl.c -=================================================================== ---- a/src/gcc/cp/decl.c (revision 178337) -+++ b/src/gcc/cp/decl.c (revision 178338) -@@ -643,6 +643,9 @@ - for (link = decls; link; link = TREE_CHAIN (link)) - { - if (leaving_for_scope && TREE_CODE (link) == VAR_DECL -+ /* It's hard to make this ARM compatibility hack play nicely with -+ lambdas, and it really isn't necessary in C++11 mode. */ -+ && cxx_dialect < cxx0x - && DECL_NAME (link)) - { - tree name = DECL_NAME (link); diff --git a/debian/patches/pr50193.diff b/debian/patches/pr50193.diff deleted file mode 100644 index aefa529..0000000 --- a/debian/patches/pr50193.diff +++ /dev/null @@ -1,112 +0,0 @@ -# DP: Fix PR target/50193 (ARM), taken from Linaro. - -2011-10-13 Andrew Stubbs <ams@codesourcery.com> - - Backport from mainline: - - 2011-10-07 Andrew Stubbs <ams@codesourcery.com> - - gcc/ - * config/arm/predicates.md (shift_amount_operand): Remove constant - range check. - (shift_operator): Check range of constants for all shift operators. - - gcc/testsuite/ - * gcc.dg/pr50193-1.c: New file. - * gcc.target/arm/shiftable.c: New file. - - -=== modified file 'gcc/config/arm/predicates.md' ---- a/src/gcc/config/arm/predicates.md 2011-10-03 09:47:33 +0000 -+++ b/src/gcc/config/arm/predicates.md 2011-10-10 11:43:28 +0000 -@@ -219,13 +220,20 @@ - (match_test "mode == GET_MODE (op)"))) - - ;; True for shift operators. -+;; Notes: -+;; * mult is only permitted with a constant shift amount -+;; * patterns that permit register shift amounts only in ARM mode use -+;; shift_amount_operand, patterns that always allow registers do not, -+;; so we don't have to worry about that sort of thing here. - (define_special_predicate "shift_operator" - (and (ior (ior (and (match_code "mult") - (match_test "power_of_two_operand (XEXP (op, 1), mode)")) - (and (match_code "rotate") - (match_test "GET_CODE (XEXP (op, 1)) == CONST_INT - && ((unsigned HOST_WIDE_INT) INTVAL (XEXP (op, 1))) < 32"))) -- (match_code "ashift,ashiftrt,lshiftrt,rotatert")) -+ (and (match_code "ashift,ashiftrt,lshiftrt,rotatert") -+ (match_test "GET_CODE (XEXP (op, 1)) != CONST_INT -+ || ((unsigned HOST_WIDE_INT) INTVAL (XEXP (op, 1))) < 32"))) - (match_test "mode == GET_MODE (op)"))) - - ;; True for MULT, to identify which variant of shift_operator is in use. - -=== added file 'gcc/testsuite/gcc.target/arm/shiftable.c' ---- a/src/gcc/testsuite/gcc.target/arm/shiftable.c 1970-01-01 00:00:00 +0000 -+++ b/src/gcc/testsuite/gcc.target/arm/shiftable.c 2011-10-10 11:43:28 +0000 -@@ -0,0 +1,63 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O2" } */ -+/* { dg-require-effective-target arm32 } */ -+ -+/* ARM has shift-and-alu insns. Depending on the ALU op GCC represents some -+ of these as a left shift, others as a multiply. Check that we match the -+ right one. */ -+ -+int -+plus (int a, int b) -+{ -+ return (a * 64) + b; -+} -+ -+/* { dg-final { scan-assembler "add.*\[al]sl #6" } } */ -+ -+int -+minus (int a, int b) -+{ -+ return a - (b * 64); -+} -+ -+/* { dg-final { scan-assembler "sub.*\[al]sl #6" } } */ -+ -+int -+ior (int a, int b) -+{ -+ return (a * 64) | b; -+} -+ -+/* { dg-final { scan-assembler "orr.*\[al]sl #6" } } */ -+ -+int -+xor (int a, int b) -+{ -+ return (a * 64) ^ b; -+} -+ -+/* { dg-final { scan-assembler "eor.*\[al]sl #6" } } */ -+ -+int -+and (int a, int b) -+{ -+ return (a * 64) & b; -+} -+ -+/* { dg-final { scan-assembler "and.*\[al]sl #6" } } */ -+ -+int -+rsb (int a, int b) -+{ -+ return (a * 64) - b; -+} -+ -+/* { dg-final { scan-assembler "rsb.*\[al]sl #6" } } */ -+ -+int -+mvn (int a, int b) -+{ -+ return ~(a * 64); -+} -+ -+/* { dg-final { scan-assembler "mvn.*\[al]sl #6" } } */ - diff --git a/debian/patches/rename-info-files.diff b/debian/patches/rename-info-files.diff index c8f8252..d713917 100644 --- a/debian/patches/rename-info-files.diff +++ b/debian/patches/rename-info-files.diff @@ -87,7 +87,7 @@ gcc/java/ChangeLog: # Clean hooks: --- a/src/gcc/Makefile.in +++ b/src/gcc/Makefile.in -@@ -4184,8 +4184,27 @@ +@@ -4195,8 +4195,27 @@ doc: $(BUILD_INFO) $(GENERATED_MANPAGES) @@ -117,7 +117,7 @@ gcc/java/ChangeLog: info: $(INFOFILES) lang.info @GENINSRC@ srcinfo lang.srcinfo -@@ -4239,21 +4258,41 @@ +@@ -4250,21 +4269,41 @@ # patterns. To use them, put each of the specific targets with its # specific dependencies but no build commands. @@ -166,7 +166,7 @@ gcc/java/ChangeLog: -I $(gcc_docdir)/include -o $@ $<; \ fi -@@ -4607,11 +4646,11 @@ +@@ -4625,11 +4664,11 @@ # $(INSTALL_DATA) might be a relative pathname, so we can't cd into srcdir # to do the install. install-info:: doc installdirs \ @@ -183,7 +183,7 @@ gcc/java/ChangeLog: lang.install-info $(DESTDIR)$(infodir)/%.info: doc/%.info installdirs -@@ -4803,8 +4842,11 @@ +@@ -4838,8 +4877,11 @@ -rm -rf $(DESTDIR)$(bindir)/$(GCOV_INSTALL_NAME)$(exeext) -rm -rf $(DESTDIR)$(man1dir)/$(GCC_INSTALL_NAME)$(man1ext) -rm -rf $(DESTDIR)$(man1dir)/cpp$(man1ext) @@ -194,9 +194,9 @@ gcc/java/ChangeLog: + -rm -f $(DESTDIR)$(infodir)/$(INFO_CPPINT_NAME).info* + -rm -f $(DESTDIR)$(infodir)/$(INFO_GCCINT_NAME).info* + -rm -f $(DESTDIR)$(infodir)/$(INFO_GCCINSTALL_NAME).info* - # - # These targets are for the dejagnu testsuites. The file site.exp - # contains global variables that all the testsuites will use. + for i in ar nm ranlib ; do \ + install_name=`echo gcc-$$i|sed '$(program_transform_name)'`$(exeext) ;\ + target_install_name=$(target_noncanonical)-`echo gcc-$$i|sed '$(program_transform_name)'`$(exeext) ; \ --- a/src/gcc/java/gcj.texi +++ b/src/gcc/java/gcj.texi @@ -55,25 +55,25 @@ @@ -287,7 +287,7 @@ gcc/java/ChangeLog: @dircategory Software development @direntry -* gnat-style: (gnat-style). GNAT Coding Style -+* gnat-style: (gnat-style-4.6). GNAT Coding Style ++* gnat-style: (gnat-style-4.7). GNAT Coding Style @end direntry @macro syntax{element} @@ -298,7 +298,7 @@ gcc/java/ChangeLog: @dircategory GNU Ada tools @direntry -* GNAT Reference Manual: (gnat_rm). Reference Manual for GNU Ada tools. -+* GNAT Reference Manual: (gnat_rm-4.6). Reference Manual for GNU Ada tools. ++* GNAT Reference Manual: (gnat_rm-4.7). Reference Manual for GNU Ada tools. @end direntry @titlepage @@ -544,3 +544,62 @@ gcc/java/ChangeLog: -CLEANFILES = $(STAMP_GENINSRC) $(STAMP_BUILD_INFO) libgomp.info +CLEANFILES = $(STAMP_GENINSRC) $(STAMP_BUILD_INFO) $(INFO_LIBGOMP_NAME).info MAINTAINERCLEANFILES = $(srcdir)/libgomp.info +--- a/src/libitm/libitm.texi ++++ b/src/libitm/libitm.texi +@@ -20,7 +20,7 @@ + @ifinfo + @dircategory GNU Libraries + @direntry +-* libitm: (libitm). GNU Transactional Memory Library ++* @value{fnlibitm}: (@value{fnlibitm}). GNU Transactional Memory Library + @end direntry + + This manual documents the GNU Transactional Memory Library. +--- a/src/libitm/Makefile.am ++++ b/src/libitm/Makefile.am +@@ -105,14 +105,17 @@ + + all-local: $(STAMP_GENINSRC) + +-stamp-geninsrc: libitm.info +- cp -p $(top_builddir)/libitm.info $(srcdir)/libitm.info ++INFO_LIBITM_NAME = $(shell echo libitm|sed '$(program_transform_name)') ++stamp-geninsrc: $(INFO_LIBITM_NAME).info ++ cp -p $(top_builddir)/$(INFO_LIBITM_NAME).info $(srcdir)/libitm.info + @touch $@ + +-libitm.info: $(STAMP_BUILD_INFO) ++libitm.info: $(INFO_LIBITM_NAME).info ++ cp $(INFO_LIBITM_NAME).info libitm.info ++$(INFO_LIBITM_NAME).info: $(STAMP_BUILD_INFO) + + stamp-build-info: libitm.texi +- $(MAKEINFO) $(AM_MAKEINFOFLAGS) $(MAKEINFOFLAGS) -I $(srcdir) -o libitm.info $(srcdir)/libitm.texi ++ $(MAKEINFO) $(AM_MAKEINFOFLAGS) $(MAKEINFOFLAGS) -I $(srcdir) -D 'fnlibitm $(INFO_LIBITM_NAME)'-o $(INFO_LIBITM_NAME).info $(srcdir)/libitm.texi + @touch $@ + + +--- a/src/libitm/Makefile.in ++++ b/src/libitm/Makefile.in +@@ -105,14 +105,17 @@ + + all-local: $(STAMP_GENINSRC) + +-stamp-geninsrc: libitm.info +- cp -p $(top_builddir)/libitm.info $(srcdir)/libitm.info ++INFO_LIBITM_NAME = $(shell echo libitm|sed '$(program_transform_name)') ++stamp-geninsrc: $(INFO_LIBITM_NAME).info ++ cp -p $(top_builddir)/$(INFO_LIBITM_NAME).info $(srcdir)/libitm.info + @touch $@ + +-libitm.info: $(STAMP_BUILD_INFO) ++libitm.info: $(INFO_LIBITM_NAME).info ++ cp $(INFO_LIBITM_NAME).info libitm.info ++$(INFO_LIBITM_NAME).info: $(STAMP_BUILD_INFO) + + stamp-build-info: libitm.texi +- $(MAKEINFO) $(AM_MAKEINFOFLAGS) $(MAKEINFOFLAGS) -I $(srcdir) -o libitm.info $(srcdir)/libitm.texi ++ $(MAKEINFO) $(AM_MAKEINFOFLAGS) $(MAKEINFOFLAGS) -I $(srcdir) -D 'fnlibitm $(INFO_LIBITM_NAME)' -o $(INFO_LIBITM_NAME).info $(srcdir)/libitm.texi + @touch $@ + + diff --git a/debian/patches/svn-class-updates.diff b/debian/patches/svn-class-updates.diff index 3fa6978..00fd2df 100644 --- a/debian/patches/svn-class-updates.diff +++ b/debian/patches/svn-class-updates.diff @@ -1,9 +1,9 @@ -# DP: updated class files from the 4.6 branch upto yyyymmdd. +# DP: updated class files from the 4.7 branch upto yyyymmdd. -dir=gcc-4_6-branch -dir=/scratch/packages/gcc/svn/gcc-4_6-branch -tag=gcc_4_6_0_release -branch=gcc-4_6-branch +dir=gcc-4_7-branch +dir=/scratch/packages/gcc/svn/gcc-4_7-branch +tag=gcc_4_7_0_release +branch=gcc-4_7-branch tmplist=files$$ diff --git a/debian/patches/svn-doc-updates.diff b/debian/patches/svn-doc-updates.diff index 9caef4a..8f1001b 100644 --- a/debian/patches/svn-doc-updates.diff +++ b/debian/patches/svn-doc-updates.diff @@ -1,105 +1,6 @@ -# DP: updates from the 4.6 branch upto 20110816 (documentation). +# DP: updates from the 4.7 branch upto 2012xxxx (documentation). -svn diff svn://gcc.gnu.org/svn/gcc/tags/gcc_4_6_1_release svn://gcc.gnu.org/svn/gcc/branches/gcc-4_6-branch \ +svn diff svn://gcc.gnu.org/svn/gcc/tags/gcc_4_7_0_release svn://gcc.gnu.org/svn/gcc/branches/gcc-4_7-branch \ | sed -r 's,^--- (\S+)\t(\S+)(.*)$,--- a/src/\1\t\2,;s,^\+\+\+ (\S+)\t(\S+)(.*)$,+++ b/src/\1\t\2,' \ | awk '/^Index:.*\.texi/ {skip=0; print; next} /^Index:/ {skip=1; next} skip==0' -Index: gcc/doc/invoke.texi -=================================================================== ---- a/src/gcc/doc/invoke.texi (.../tags/gcc_4_6_1_release) -+++ b/src/gcc/doc/invoke.texi (.../branches/gcc-4_6-branch) -@@ -611,7 +611,8 @@ - -momit-leaf-frame-pointer -mno-red-zone -mno-tls-direct-seg-refs @gol - -mcmodel=@var{code-model} -mabi=@var{name} @gol - -m32 -m64 -mlarge-data-threshold=@var{num} @gol ---msse2avx -mfentry -m8bit-idiv} -+-msse2avx -mfentry -m8bit-idiv @gol -+-mavx256-split-unaligned-load -mavx256-split-unaligned-store} - - @emph{i386 and x86-64 Windows Options} - @gccoptlist{-mconsole -mcygwin -mno-cygwin -mdll -@@ -12172,6 +12173,10 @@ - @item corei7-avx - Intel Core i7 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, - SSE4.1, SSE4.2, AVX, AES and PCLMUL instruction set support. -+@item core-avx-i -+Intel Core CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, -+SSE4.1, SSE4.2, AVX, AES, PCLMUL, FSGSBASE, RDRND and F16C instruction -+set support. - @item atom - Intel Atom CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and SSSE3 - instruction set support. -@@ -12769,6 +12774,12 @@ - to 255, 8bit unsigned integer divide will be used instead of - 32bit/64bit integer divide. - -+@item -mavx256-split-unaligned-load -+@item -mavx256-split-unaligned-store -+@opindex avx256-split-unaligned-load -+@opindex avx256-split-unaligned-store -+Split 32-byte AVX unaligned load and store. -+ - @end table - - These @samp{-m} switches are supported in addition to the above -Index: gcc/doc/md.texi -=================================================================== ---- a/src/gcc/doc/md.texi (.../tags/gcc_4_6_1_release) -+++ b/src/gcc/doc/md.texi (.../branches/gcc-4_6-branch) -@@ -4641,8 +4641,9 @@ - string. The instruction is not allowed to prefetch more than one byte - at a time since either string may end in the first byte and reading past - that may access an invalid page or segment and cause a fault. The --effect of the instruction is to store a value in operand 0 whose sign --indicates the result of the comparison. -+comparison terminates early if the fetched bytes are different or if -+they are equal to zero. The effect of the instruction is to store a -+value in operand 0 whose sign indicates the result of the comparison. - - @cindex @code{cmpstr@var{m}} instruction pattern - @item @samp{cmpstr@var{m}} -@@ -4660,8 +4661,10 @@ - order starting at the beginning of each string. The instruction is not allowed - to prefetch more than one byte at a time since either string may end in the - first byte and reading past that may access an invalid page or segment and --cause a fault. The effect of the instruction is to store a value in operand 0 --whose sign indicates the result of the comparison. -+cause a fault. The comparison will terminate when the fetched bytes -+are different or if they are equal to zero. The effect of the -+instruction is to store a value in operand 0 whose sign indicates the -+result of the comparison. - - @cindex @code{cmpmem@var{m}} instruction pattern - @item @samp{cmpmem@var{m}} -@@ -4669,9 +4672,10 @@ - of @samp{cmpstr@var{m}}. The two memory blocks specified are compared - byte by byte in lexicographic order starting at the beginning of each - block. Unlike @samp{cmpstr@var{m}} the instruction can prefetch --any bytes in the two memory blocks. The effect of the instruction is --to store a value in operand 0 whose sign indicates the result of the --comparison. -+any bytes in the two memory blocks. Also unlike @samp{cmpstr@var{m}} -+the comparison will not stop if both bytes are zero. The effect of -+the instruction is to store a value in operand 0 whose sign indicates -+the result of the comparison. - - @cindex @code{strlen@var{m}} instruction pattern - @item @samp{strlen@var{m}} -@@ -5510,7 +5514,7 @@ - @cindex @code{stack_protect_set} instruction pattern - @item @samp{stack_protect_set} - --This pattern, if defined, moves a @code{Pmode} value from the memory -+This pattern, if defined, moves a @code{ptr_mode} value from the memory - in operand 1 to the memory in operand 0 without leaving the value in - a register afterward. This is to avoid leaking the value some place - that an attacker might use to rewrite the stack guard slot after -@@ -5521,7 +5525,7 @@ - @cindex @code{stack_protect_test} instruction pattern - @item @samp{stack_protect_test} - --This pattern, if defined, compares a @code{Pmode} value from the -+This pattern, if defined, compares a @code{ptr_mode} value from the - memory in operand 1 with the memory in operand 0 without leaving the - value in a register afterward and branches to operand 2 if the values - weren't equal. diff --git a/debian/patches/svn-updates-linaro.diff b/debian/patches/svn-updates-linaro.diff index fcfbf7c..0a86c52 100644 --- a/debian/patches/svn-updates-linaro.diff +++ b/debian/patches/svn-updates-linaro.diff @@ -1,4 +1,4 @@ -# DP: updates from the 4.6 branch upto 20111215 (r182348). +# DP: updates from the 4.7 branch upto 2012xxxx (r182348). last_updated() { @@ -8,2739 +8,7 @@ Thu Dec 15 00:05:16 UTC 2011 (revision 182348) EOF } -svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_6-branch@181866 svn://gcc.gnu.org/svn/gcc/branches/gcc-4_6-branch \ +svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_7-branch@181866 svn://gcc.gnu.org/svn/gcc/branches/gcc-4_7-branch \ | sed -r 's,^--- (\S+)\t(\S+)(.*)$,--- a/src/\1\t\2,;s,^\+\+\+ (\S+)\t(\S+)(.*)$,+++ b/src/\1\t\2,' \ | awk '/^Index:.*\.(class|texi)/ {skip=1; next} /^Index:/ { skip=0 } skip==0' -Index: gcc/DATESTAMP -=================================================================== ---- a/src/gcc/DATESTAMP (revision -+++ b/src/gcc/DATESTAMP (revision -@@ -1 +1 @@ --20111201 -+20111214 -Index: gcc/ChangeLog -=================================================================== ---- a/src/gcc/ChangeLog (revision -+++ b/src/gcc/ChangeLog (revision -@@ -1,3 +1,185 @@ -+2011-12-13 Eric Botcazou <ebotcazou@adacore.com> -+ -+ * lto-streamer-out.c (write_symbol): Use proper 64-bit host type. -+ * lto-cgraph.c (input_cgraph_opt_section): Use 'int' for offsets. -+ * lto-streamer-in.c (lto_read_body): Likewise. -+ (lto_input_toplevel_asms): Likewise. -+ * lto-section-in.c (lto_create_simple_input_block): Likewise. -+ * lto-opts.c (lto_read_file_options): Likewise. -+ * ipa-prop.c (ipa_prop_read_section): Likewise. -+ -+ * df.h (DF_NOTE): Fix typo in comment. -+ -+2011-12-13 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> -+ -+ * regmove.c (fixup_match_2): Only access call_used_regs with hard -+ regs. -+ -+2011-12-12 Jakub Jelinek <jakub@redhat.com> -+ -+ PR middle-end/51510 -+ * calls.c (internal_arg_pointer_based_exp_scan): Don't use -+ VEC_safe_grow_cleared if idx is smaller than VEC_length. -+ -+ Backported from mainline -+ 2011-12-11 Jakub Jelinek <jakub@redhat.com> -+ -+ PR tree-optimization/51485 -+ * tree-vect-data-refs.c (vect_analyze_data_refs): Give up on -+ DRs in call stmts. -+ -+2011-12-12 Eric Botcazou <ebotcazou@adacore.com> -+ -+ PR tree-optimization/50569 -+ * tree-sra.c (build_ref_for_model): Replicate a chain of COMPONENT_REFs -+ in the expression of MODEL instead of just the last one. -+ -+2011-12-09 Michael Meissner <meissner@the-meissners.org> -+ -+ Backport from mainline -+ 2011-12-09 Michael Meissner <meissner@the-meissners.org> -+ -+ PR rtl-optimization/51469 -+ * varasm.c (default_binds_local_p_1): If the symbol is a gnu -+ indirect function, mark the symbol as non-local. -+ -+2011-12-09 Jakub Jelinek <jakub@redhat.com> -+ -+ Backport from mainline -+ 2011-12-08 Jakub Jelinek <jakub@redhat.com> -+ -+ PR tree-optimization/51466 -+ * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Also copy -+ TREE_SIDE_EFFECTS. -+ -+ 2011-11-28 Jakub Jelinek <jakub@redhat.com> -+ -+ PR tree-optimization/50078 -+ * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Copy over -+ TREE_THIS_VOLATILE also from the old to new lhs resp. rhs. -+ -+2011-12-09 Kazu Hirata <kazu@codesourcery.com> -+ -+ Backport from mainline: -+ -+ 2011-12-05 Kazu Hirata <kazu@codesourcery.com> -+ -+ PR target/51408 -+ * config/arm/arm.md (*minmax_arithsi): Always require the else -+ clause in the MINUS case. -+ -+2011-12-08 Teresa Johnson <tejohnson@google.com> -+ -+ Backport from mainline: -+ -+ 2011-08-05 Uros Bizjak <ubizjak@gmail.com> -+ -+ * config/i386/i386.md (*movdi_internal_rex64): Use "!o" constraint -+ instead of "!m" for operand 0, alternative 4. -+ (*movdf_internal_rex64): Ditto for operand 0, alernative 6. -+ -+2011-12-08 Jakub Jelinek <jakub@redhat.com> -+ -+ Backport from mainline -+ 2011-12-05 Jakub Jelinek <jakub@redhat.com> -+ -+ PR debug/51410 -+ * c-decl.c (pop_scope): Don't add DECL_EXTERNAL decls -+ for debug info if scope is file_scope. -+ -+ PR c/51339 -+ * c-decl.c (c_finish_incomplete_decl, finish_decl): Call -+ relayout_decl instead of layout_decl. -+ -+ 2011-12-05 Jakub Jelinek <jakub@redhat.com> -+ Eric Botcazou <ebotcazou@adacore.com> -+ -+ PR middle-end/51323 -+ PR middle-end/50074 -+ * calls.c (internal_arg_pointer_exp_state): New variable. -+ (internal_arg_pointer_based_exp_1, -+ internal_arg_pointer_exp_scan): New functions. -+ (internal_arg_pointer_based_exp): New function. -+ (mem_overlaps_already_clobbered_arg_p): Use it. -+ (expand_call): Free internal_arg_pointer_exp_state.cache vector -+ and clear internal_arg_pointer_exp_state.scan_start. -+ -+ 2011-11-30 Jakub Jelinek <jakub@redhat.com> -+ -+ PR rtl-optimization/48721 -+ * sched-deps.c (sched_analyze_insn): For SIBLING_CALL_P set -+ reg_pending_barrier to TRUE_BARRIER. -+ -+ 2011-11-26 Joern Rennecke <joern.rennecke@embecosm.com> -+ -+ PR middle-end/50074 -+ * calls.c (mem_overlaps_already_clobbered_arg_p): -+ Return false if no outgoing arguments have been stored so far. -+ -+2011-12-08 Eric Botcazou <ebotcazou@adacore.com> -+ -+ PR tree-optimization/51315 -+ * tree-sra.c (tree_non_mode_aligned_mem_p): Rename to... -+ (tree_non_aligned_mem_p): ...this. Add ALIGN parameter. Look into -+ MEM_REFs and use get_object_or_type_alignment for them. -+ (build_accesses_from_assign): Adjust for above change. -+ (access_precludes_ipa_sra_p): Likewise. -+ -+2011-12-06 Martin Jambor <mjambor@suse.cz> -+ -+ Backport from mainline: -+ -+ 2011-12-02 Martin Jambor <mjambor@suse.cz> -+ -+ PR tree-optimization/50622 -+ * tree-sra.c (load_assign_lhs_subreplacements): Force gimple operand -+ if both lacc and racc are grp_partial_lhs. -+ -+2011-12-06 Iain Sandoe <iains@gcc.gnu.org> -+ -+ * config/rs6000/rs6000.c (darwin_rs6000_override_options): Initialize -+ rs6000_current_abi. -+ -+2011-12-06 Alan Modra <amodra@gmail.com> -+ -+ PR target/50906 -+ * config/rs6000/rs6000.c (rs6000_emit_prologue <TARGET_SPE_ABI>): -+ Do not mark r11 setup as frame-related. Pass correct offset to -+ rs6000_emit_savres_rtx. Correct out-of-line rs6000_frame_related -+ arguments. Correct sp_offset. Remove "offset" fudge from -+ in-line rs6000_frame_related call. Rename misleading variable. -+ Fix comments and whitespace. Tidy some expressions. -+ (rs6000_emit_epilogue <TARGET_SPE_ABI>): Always set frame_reg_rtx -+ to r11 in out-of-line case. Correct sp_offset. Pass correct -+ offset to rs6000_emit_savres_rtx. Rename misleading variable. -+ Fix comments and whitespace. Tidy some expressions. -+ (rs6000_emit_epilogue <non-TARGET_SPE_ABI>): Add sp_offset -+ adjustment when !saving_GPRs_inline. Correct register mode -+ used in address calcs. -+ (rs6000_emit_epilogue <non-TARGET_SPE_ABI>): Similarly when -+ !restoring_GPRs_inline. -+ -+2011-12-04 Jérémie Detrey <Jeremie.Detrey@loria.fr> -+ -+ PR target/51393 -+ * config/i386/avxintrin.h (_mm256_insert_epi64): Declare second -+ parameter as long long. -+ -+2011-12-02 Georg-Johann Lay <avr@gjlay.de> -+ -+ PR target/51002 -+ PR target/51345 -+ * config/avr/libgcc.S (__prologue_saves__, __epilogue_restores__): -+ Enclose parts using __SP_H__ in !defined (__AVR_HAVE_8BIT_SP__). -+ Add FIXME comments. -+ * config/avr/avr.md (movhi_sp_r_irq_off, movhi_sp_r_irq_on): Set -+ insn condition to !AVR_HAVE_8BIT_SP. -+ * config/avr/avr.c (output_movhi): "clr%B0" instead of "in -+ %B0,__SP_H__" if AVR_HAVE_8BIT_SP. -+ (avr_file_start): Only print "__SP_H__ = 0x3e" if !AVR_HAVE_8BIT_SP. -+ * config/avr/avr-devices.c (avr_mcu_types): ATtiny4313 and -+ AT86RF401 have a 16-bit SP (their manual is bogus). -+ - 2011-11-25 Richard Sandiford <richard.sandiford@linaro.org> - - Backport from mainline: -@@ -415,7 +597,7 @@ - * config/rs6000/rs6000.md (probe_stack): Use explicit operand. - * config/rs6000/rs6000.c (output_probe_stack_range): Likewise. - --2011-09-14 Diego Novillo <dnovillo@google.com> -+2011-09-14 Diego Novillo <dnovillo@google.com> - - * tree-vect-stmts.c (vect_transform_stmt): Remove unused - local variable ORIG_SCALAR_STMT. -Index: gcc/testsuite/gcc.target/i386/pr51393.c -=================================================================== ---- a/src/gcc/testsuite/gcc.target/i386/pr51393.c (revision -+++ b/src/gcc/testsuite/gcc.target/i386/pr51393.c (revision -@@ -0,0 +1,22 @@ -+/* { dg-do run } */ -+/* { dg-require-effective-target avx } */ -+/* { dg-require-effective-target lp64 } */ -+/* { dg-options "-O -mavx" } */ -+ -+#include "avx-check.h" -+#include <immintrin.h> -+ -+static void -+__attribute__((noinline)) -+avx_test (void) -+{ -+ long long in = 0x800000000ll; -+ long long out; -+ -+ __m256i zero = _mm256_setzero_si256(); -+ __m256i tmp = _mm256_insert_epi64 (zero, in, 0); -+ out = _mm256_extract_epi64(tmp, 0); -+ -+ if (in != out) -+ abort (); -+} -Index: gcc/testsuite/gcc.target/i386/pr48721.c -=================================================================== ---- a/src/gcc/testsuite/gcc.target/i386/pr48721.c (revision -+++ b/src/gcc/testsuite/gcc.target/i386/pr48721.c (revision -@@ -0,0 +1,51 @@ -+/* PR rtl-optimization/48721 */ -+/* { dg-do compile } */ -+/* { dg-options "-O -foptimize-sibling-calls -fsched2-use-superblocks -fschedule-insns2 -mtune=core2" } */ -+ -+extern unsigned char a[]; -+extern int b[], d[], e[], f[], g[], *h[], m[], *n[], o[]; -+extern char c[]; -+ -+struct S -+{ -+ unsigned char s1; -+ int s2, s3, s4, s5, s6, s7, s8; -+}; -+ -+__attribute__((noinline, noclone)) int -+foo (int x) -+{ -+ return 0; -+} -+ -+int -+bar (int x, struct S *y) -+{ -+ int z; -+ switch (x) -+ { -+ case 1: -+ case 2: -+ { -+ int t2, t4, t5, t6, t7, t8; -+ z = o[y->s8 * 6]; -+ t8 = *n[m[x] * 5]; -+ t4 = *h[y->s7]; -+ t7 = z; -+ z = g[f[x] + y->s6]; -+ t6 = e[y->s5]; -+ t5 = d[c[x] + y->s3 * 17]; -+ if (z) -+ t2 = b[z]; -+ if (a[z] != y->s1) -+ return foo (x); -+ y->s8 = t8; -+ y->s4 = t4; -+ y->s7 = t7; -+ y->s6 = t6; -+ y->s5 = t5; -+ y->s2 = t2; -+ } -+ } -+ return 0; -+} -Index: gcc/testsuite/gcc.target/i386/movdi-rex64.c -=================================================================== ---- a/src/gcc/testsuite/gcc.target/i386/movdi-rex64.c (revision -+++ b/src/gcc/testsuite/gcc.target/i386/movdi-rex64.c (revision -@@ -0,0 +1,11 @@ -+/* { dg-do compile { target *-*-linux* } } */ -+/* { dg-options "-fPIE" } */ -+ -+char *strcpy (char *dest, const char *src); -+ -+static __thread char buffer[25]; -+const char * error_message (void) -+{ -+ strcpy (buffer, "Unknown code "); -+ return 0; -+} -Index: gcc/testsuite/gfortran.dg/move_alloc_8.f90 -=================================================================== ---- a/src/gcc/testsuite/gfortran.dg/move_alloc_8.f90 (revision -+++ b/src/gcc/testsuite/gfortran.dg/move_alloc_8.f90 (revision -@@ -0,0 +1,106 @@ -+! { dg-do compile } -+! -+! PR fortran/50684 -+! -+! Module "bug" contributed by Martin Steghöfer. -+! -+ -+MODULE BUG -+ TYPE MY_TYPE -+ INTEGER, ALLOCATABLE :: VALUE -+ END TYPE -+CONTAINS -+ SUBROUTINE POINTER_INTENT_IN_BUG_WORKING(POINTER_INTENT_IN_VARIABLE) -+ TYPE(MY_TYPE), POINTER, INTENT(IN) :: POINTER_INTENT_IN_VARIABLE -+ TYPE(MY_TYPE), POINTER :: POINTER_VARIABLE_LOCAL -+ INTEGER, ALLOCATABLE :: LOCAL_VALUE -+ -+ POINTER_VARIABLE_LOCAL=>POINTER_INTENT_IN_VARIABLE -+ CALL MOVE_ALLOC(POINTER_VARIABLE_LOCAL%VALUE, LOCAL_VALUE) -+ -+ RETURN -+ END SUBROUTINE POINTER_INTENT_IN_BUG_WORKING -+ -+ SUBROUTINE POINTER_INTENT_IN_BUG_FAILING(POINTER_INTENT_IN_VARIABLE) -+ TYPE(MY_TYPE), POINTER, INTENT(IN) :: POINTER_INTENT_IN_VARIABLE -+ INTEGER, ALLOCATABLE :: LOCAL_VALUE -+ -+ CALL MOVE_ALLOC(POINTER_INTENT_IN_VARIABLE%VALUE, LOCAL_VALUE) -+ -+ RETURN -+ END SUBROUTINE POINTER_INTENT_IN_BUG_FAILING -+end module bug -+ -+subroutine test1() -+ TYPE MY_TYPE -+ INTEGER, ALLOCATABLE :: VALUE -+ END TYPE -+CONTAINS -+ SUBROUTINE sub (dt) -+ type(MY_TYPE), intent(in) :: dt -+ INTEGER, ALLOCATABLE :: lv -+ call move_alloc(dt%VALUE, lv) ! { dg-error "cannot be INTENT.IN." } -+ END SUBROUTINE -+end subroutine test1 -+ -+subroutine test2 (x, px) -+ implicit none -+ type t -+ integer, allocatable :: a -+ end type t -+ -+ type t2 -+ type(t), pointer :: ptr -+ integer, allocatable :: a -+ end type t2 -+ -+ type(t2), intent(in) :: x -+ type(t2), pointer, intent(in) :: px -+ -+ integer, allocatable :: a -+ type(t2), pointer :: ta -+ -+ call move_alloc (px, ta) ! { dg-error "cannot be INTENT.IN." } -+ call move_alloc (x%a, a) ! { dg-error "cannot be INTENT.IN." } -+ call move_alloc (x%ptr%a, a) ! OK (3) -+ call move_alloc (px%a, a) ! OK (4) -+ call move_alloc (px%ptr%a, a) ! OK (5) -+end subroutine test2 -+ -+subroutine test3 (x, px) -+ implicit none -+ type t -+ integer, allocatable :: a -+ end type t -+ -+ type t2 -+ class(t), pointer :: ptr -+ integer, allocatable :: a -+ end type t2 -+ -+ type(t2), intent(in) :: x -+ class(t2), pointer, intent(in) :: px -+ -+ integer, allocatable :: a -+ class(t2), pointer :: ta -+ -+ call move_alloc (px, ta) ! { dg-error "cannot be INTENT.IN." } -+ call move_alloc (x%a, a) ! { dg-error "cannot be INTENT.IN." } -+ call move_alloc (x%ptr%a, a) ! OK (6) -+ call move_alloc (px%a, a) ! OK (7) -+ call move_alloc (px%ptr%a, a) ! OK (8) -+end subroutine test3 -+ -+subroutine test4() -+ TYPE MY_TYPE -+ INTEGER, ALLOCATABLE :: VALUE -+ END TYPE -+CONTAINS -+ SUBROUTINE sub (dt) -+ CLASS(MY_TYPE), intent(in) :: dt -+ INTEGER, ALLOCATABLE :: lv -+ call move_alloc(dt%VALUE, lv) ! { dg-error "cannot be INTENT.IN." } -+ END SUBROUTINE -+end subroutine test4 -+ -+! { dg-final { cleanup-modules "bug" } } -Index: gcc/testsuite/gfortran.dg/realloc_on_assign_8.f90 -=================================================================== ---- a/src/gcc/testsuite/gfortran.dg/realloc_on_assign_8.f90 (revision -+++ b/src/gcc/testsuite/gfortran.dg/realloc_on_assign_8.f90 (revision -@@ -0,0 +1,17 @@ -+! { dg-do compile } -+! -+! PR fortran/51448 -+! -+! Contribued by François Willot -+! -+ PROGRAM MAIN -+ IMPLICIT NONE -+ TYPE mytype -+ REAL b(2) -+ END TYPE mytype -+ TYPE(mytype) a -+ DOUBLE PRECISION, ALLOCATABLE :: x(:) -+ ALLOCATE(x(2)) -+ a%b=0.0E0 -+ x=a%b -+ END -Index: gcc/testsuite/gfortran.dg/default_initialization_5.f90 -=================================================================== ---- a/src/gcc/testsuite/gfortran.dg/default_initialization_5.f90 (revision -+++ b/src/gcc/testsuite/gfortran.dg/default_initialization_5.f90 (revision -@@ -0,0 +1,66 @@ -+! { dg-do run } -+! { dg-options "-fdump-tree-original" } -+! -+! PR fortran/51435 -+! -+! Contributed by darmar.xxl@gmail.com -+! -+module arr_m -+ type arr_t -+ real(8), dimension(:), allocatable :: rsk -+ end type -+ type arr_t2 -+ integer :: a = 77 -+ end type -+end module arr_m -+!********************* -+module list_m -+ use arr_m -+ implicit none -+ -+ type(arr_t2), target :: tgt -+ -+ type my_list -+ type(arr_t), pointer :: head => null() -+ end type my_list -+ type my_list2 -+ type(arr_t2), pointer :: head => tgt -+ end type my_list2 -+end module list_m -+!*********************** -+module worker_mod -+ use list_m -+ implicit none -+ -+ type data_all_t -+ type(my_list) :: my_data -+ end type data_all_t -+ type data_all_t2 -+ type(my_list2) :: my_data -+ end type data_all_t2 -+contains -+ subroutine do_job() -+ type(data_all_t) :: dum -+ type(data_all_t2) :: dum2 -+ -+ if (associated(dum%my_data%head)) then -+ call abort() -+ else -+ print *, 'OK: do_job my_data%head is NOT associated' -+ end if -+ -+ if (dum2%my_data%head%a /= 77) & -+ call abort() -+ end subroutine -+end module -+!*************** -+program hello -+ use worker_mod -+ implicit none -+ call do_job() -+end program -+ -+! { dg-final { scan-tree-dump-times "my_data.head = 0B" 1 "original" } } -+! { dg-final { scan-tree-dump-times "my_data.head = &tgt" 1 "original" } } -+! { dg-final { cleanup-tree-dump "original" } } -+! { dg-final { cleanup-modules "arr_m list_m worker_mod" } } -Index: gcc/testsuite/gfortran.dg/warn_function_without_result_2.f90 -=================================================================== ---- a/src/gcc/testsuite/gfortran.dg/warn_function_without_result_2.f90 (revision -+++ b/src/gcc/testsuite/gfortran.dg/warn_function_without_result_2.f90 (revision -@@ -0,0 +1,19 @@ -+! { dg-do compile } -+! { dg-options "-Wall" } -+! -+! PR fortran/50923 -+! -+module m -+contains -+ integer pure function f() ! { dg-warning "Return value of function 'f' at .1. not set" } -+ end function f -+ integer pure function g() result(h) ! { dg-warning "Return value 'h' of function 'g' declared at .1. not set" } -+ end function g -+ integer pure function i() -+ i = 7 -+ end function i -+ integer pure function j() result(k) -+ k = 8 -+ end function j -+end module m -+! { dg-final { cleanup-modules "mod" } } -Index: gcc/testsuite/gcc.c-torture/execute/pr51466.c -=================================================================== ---- a/src/gcc/testsuite/gcc.c-torture/execute/pr51466.c (revision -+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr51466.c (revision -@@ -0,0 +1,43 @@ -+/* PR tree-optimization/51466 */ -+ -+extern void abort (void); -+ -+__attribute__((noinline, noclone)) int -+foo (int i) -+{ -+ volatile int v[4]; -+ int *p; -+ v[i] = 6; -+ p = (int *) &v[i]; -+ return *p; -+} -+ -+__attribute__((noinline, noclone)) int -+bar (int i) -+{ -+ volatile int v[4]; -+ int *p; -+ v[i] = 6; -+ p = (int *) &v[i]; -+ *p = 8; -+ return v[i]; -+} -+ -+__attribute__((noinline, noclone)) int -+baz (int i) -+{ -+ volatile int v[4]; -+ int *p; -+ v[i] = 6; -+ p = (int *) &v[0]; -+ *p = 8; -+ return v[i]; -+} -+ -+int -+main () -+{ -+ if (foo (3) != 6 || bar (2) != 8 || baz (0) != 8 || baz (1) != 6) -+ abort (); -+ return 0; -+} -Index: gcc/testsuite/gcc.c-torture/execute/20111212-1.c -=================================================================== ---- a/src/gcc/testsuite/gcc.c-torture/execute/20111212-1.c (revision -+++ b/src/gcc/testsuite/gcc.c-torture/execute/20111212-1.c (revision -@@ -0,0 +1,34 @@ -+/* PR tree-optimization/50569 */ -+/* Reported by Paul Koning <pkoning@gcc.gnu.org> */ -+/* Reduced testcase by Mikael Pettersson <mikpe@it.uu.se> */ -+ -+struct event { -+ struct { -+ unsigned int sec; -+ } sent __attribute__((packed)); -+}; -+ -+void __attribute__((noinline,noclone)) frob_entry(char *buf) -+{ -+ struct event event; -+ -+ __builtin_memcpy(&event, buf, sizeof(event)); -+ if (event.sent.sec < 64) { -+ event.sent.sec = -1U; -+ __builtin_memcpy(buf, &event, sizeof(event)); -+ } -+} -+ -+int main(void) -+{ -+ union { -+ char buf[1 + sizeof(struct event)]; -+ int align; -+ } u; -+ -+ __builtin_memset(&u, 0, sizeof u); -+ -+ frob_entry(&u.buf[1]); -+ -+ return 0; -+} -Index: gcc/testsuite/gcc.c-torture/execute/pr51323.c -=================================================================== ---- a/src/gcc/testsuite/gcc.c-torture/execute/pr51323.c (revision -+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr51323.c (revision -@@ -0,0 +1,35 @@ -+/* PR middle-end/51323 */ -+ -+extern void abort (void); -+struct S { int a, b, c; }; -+int v; -+ -+__attribute__((noinline, noclone)) void -+foo (int x, int y, int z) -+{ -+ if (x != v || y != 0 || z != 9) -+ abort (); -+} -+ -+static inline int -+baz (const struct S *p) -+{ -+ return p->b; -+} -+ -+__attribute__((noinline, noclone)) void -+bar (int x, struct S y) -+{ -+ foo (baz (&y), 0, x); -+} -+ -+int -+main () -+{ -+ struct S s; -+ v = 3; s.a = v - 1; s.b = v; s.c = v + 1; -+ bar (9, s); -+ v = 17; s.a = v - 1; s.b = v; s.c = v + 1; -+ bar (9, s); -+ return 0; -+} -Index: gcc/testsuite/gcc.c-torture/execute/20111208-1.c -=================================================================== ---- a/src/gcc/testsuite/gcc.c-torture/execute/20111208-1.c (revision -+++ b/src/gcc/testsuite/gcc.c-torture/execute/20111208-1.c (revision -@@ -0,0 +1,94 @@ -+/* PR tree-optimization/51315 */ -+/* Reported by Jurij Smakov <jurij@wooyd.org> */ -+ -+typedef unsigned int size_t; -+ -+extern void *memcpy (void *__restrict __dest, -+ __const void *__restrict __src, size_t __n) -+ __attribute__ ((__nothrow__)) __attribute__ ((__nonnull__ (1, 2))); -+ -+extern size_t strlen (__const char *__s) -+ __attribute__ ((__nothrow__)) __attribute__ ((__pure__)) __attribute__ ((__nonnull__ (1))); -+ -+typedef short int int16_t; -+typedef int int32_t; -+ -+extern void abort (void); -+ -+int a; -+ -+static void __attribute__ ((noinline,noclone)) -+do_something (int item) -+{ -+ a = item; -+} -+ -+int -+pack_unpack (char *s, char *p) -+{ -+ char *send, *pend; -+ char type; -+ int integer_size; -+ -+ send = s + strlen (s); -+ pend = p + strlen (p); -+ -+ while (p < pend) -+ { -+ type = *p++; -+ -+ switch (type) -+ { -+ case 's': -+ integer_size = 2; -+ goto unpack_integer; -+ -+ case 'l': -+ integer_size = 4; -+ goto unpack_integer; -+ -+ unpack_integer: -+ switch (integer_size) -+ { -+ case 2: -+ { -+ union -+ { -+ int16_t i; -+ char a[sizeof (int16_t)]; -+ } -+ v; -+ memcpy (v.a, s, sizeof (int16_t)); -+ s += sizeof (int16_t); -+ do_something (v.i); -+ } -+ break; -+ -+ case 4: -+ { -+ union -+ { -+ int32_t i; -+ char a[sizeof (int32_t)]; -+ } -+ v; -+ memcpy (v.a, s, sizeof (int32_t)); -+ s += sizeof (int32_t); -+ do_something (v.i); -+ } -+ break; -+ } -+ break; -+ } -+ } -+ return (int) *s; -+} -+ -+int -+main (void) -+{ -+ int n = pack_unpack ("\200\001\377\376\035\300", "sl"); -+ if (n != 0) -+ abort (); -+ return 0; -+} -Index: gcc/testsuite/gnat.dg/frame_overflow.adb -=================================================================== ---- a/src/gcc/testsuite/gnat.dg/frame_overflow.adb (revision -+++ b/src/gcc/testsuite/gnat.dg/frame_overflow.adb (revision -@@ -1,27 +1,20 @@ - -- { dg-do compile } - --with System; -+package body Frame_Overflow is - --procedure frame_overflow is -- -- type Bitpos_Range_T is range 1..2**(System.Word_Size-1)-1; -- type Bitmap_Array_T is array (Bitpos_Range_T) of Boolean; -- -- type Bitmap_T is record -- Bits : Bitmap_Array_T := (others => False); -- end record; -- -- function -+ function -- { dg-error "too large" } - Set_In (Bitmap : Bitmap_T; Bitpos : Bitpos_Range_T) return Bitmap_T - is -- Result: Bitmap_T := Bitmap; -- { dg-error "Storage_Error" } -+ Result: Bitmap_T := Bitmap; - begin - Result.Bits (Bitpos) := True; - return Result; - end; - -- function Negate (Bitmap : Bitmap_T) return Bitmap_T is -- Result: Bitmap_T; -- { dg-error "Storage_Error" } -+ function -- { dg-error "too large" } -+ Negate (Bitmap : Bitmap_T) return Bitmap_T -+ is -+ Result: Bitmap_T; - begin - for E in Bitpos_Range_T loop - Result.Bits (E) := not Bitmap.Bits (E); -@@ -29,6 +22,4 @@ - return Result; - end; - --begin -- null; --end; -+end Frame_Overflow; -Index: gcc/testsuite/gnat.dg/frame_overflow.ads -=================================================================== ---- a/src/gcc/testsuite/gnat.dg/frame_overflow.ads (revision -+++ b/src/gcc/testsuite/gnat.dg/frame_overflow.ads (revision -@@ -0,0 +1,17 @@ -+with System; -+ -+package Frame_Overflow is -+ -+ type Bitpos_Range_T is range 1..2**(System.Word_Size-1)-1; -+ type Bitmap_Array_T is array (Bitpos_Range_T) of Boolean; -+ -+ type Bitmap_T is record -+ Bits : Bitmap_Array_T := (others => False); -+ end record; -+ -+ function -+ Set_In (Bitmap : Bitmap_T; Bitpos : Bitpos_Range_T) return Bitmap_T; -+ -+ function Negate (Bitmap : Bitmap_T) return Bitmap_T; -+ -+end Frame_Overflow; -Index: gcc/testsuite/gnat.dg/specs/addr1.ads -=================================================================== ---- a/src/gcc/testsuite/gnat.dg/specs/addr1.ads (revision -+++ b/src/gcc/testsuite/gnat.dg/specs/addr1.ads (revision -@@ -15,7 +15,7 @@ - end record; - for Rec2'Size use 64; - -- A: Arr (1 .. 12); -+ A: Arr (1 .. 4); - - Obj1: Rec1; - for Obj1'Address use A'Address; -- { dg-bogus "alignment" } -Index: gcc/testsuite/gcc.dg/pr45819.c -=================================================================== ---- a/src/gcc/testsuite/gcc.dg/pr45819.c (revision -+++ b/src/gcc/testsuite/gcc.dg/pr45819.c (revision -@@ -1,5 +1,5 @@ - /* { dg-do compile } */ --/* { dg-options "-O2 -fdump-tree-optimized" } */ -+/* { dg-options "-O2 -fdump-tree-optimized -w" } */ - - struct ehci_regs { - char x; -Index: gcc/testsuite/gcc.dg/gomp/pr51339.c -=================================================================== ---- a/src/gcc/testsuite/gcc.dg/gomp/pr51339.c (revision -+++ b/src/gcc/testsuite/gcc.dg/gomp/pr51339.c (revision -@@ -0,0 +1,15 @@ -+/* PR c/51339 */ -+/* { dg-do compile } */ -+/* { dg-options "-fopenmp" } */ -+ -+char g[] = "g"; -+ -+void -+foo (void) -+{ -+#pragma omp parallel sections firstprivate (g) lastprivate (g) -+ { -+ #pragma omp section -+ g[0] = 'h'; -+ } -+} -Index: gcc/testsuite/gcc.dg/pr50078.c -=================================================================== ---- a/src/gcc/testsuite/gcc.dg/pr50078.c (revision -+++ b/src/gcc/testsuite/gcc.dg/pr50078.c (revision -@@ -0,0 +1,14 @@ -+/* PR tree-optimization/50078 */ -+/* { dg-do compile } */ -+/* { dg-options "-O2" } */ -+ -+unsigned nonvolvar[2]; -+ -+void -+test (int arg) -+{ -+ unsigned v = *(volatile unsigned *) (&nonvolvar[arg]); -+ *(volatile unsigned *) (&nonvolvar[arg]) = v; -+} -+ -+/* { dg-final { scan-assembler-times "movl\[^\n\r\]*nonvolvar" 2 { target { { i?86-*-* x86_64-*-* } && nonpic } } } } */ -Index: gcc/testsuite/gcc.dg/debug/dwarf2/pr51410.c -=================================================================== ---- a/src/gcc/testsuite/gcc.dg/debug/dwarf2/pr51410.c (revision -+++ b/src/gcc/testsuite/gcc.dg/debug/dwarf2/pr51410.c (revision -@@ -0,0 +1,13 @@ -+/* PR debug/51410 */ -+/* { dg-do compile } */ -+/* { dg-options "-O0 -gdwarf-2 -dA -fno-merge-debug-strings" } */ -+ -+int x; -+ -+int -+foo (void) -+{ -+ return x; -+} -+ -+/* { dg-final { scan-assembler-times "\\(DIE\[^\\r\\n\]*DW_TAG_variable\\)" 1 } } */ -Index: gcc/testsuite/gcc.dg/pr51408.c -=================================================================== ---- a/src/gcc/testsuite/gcc.dg/pr51408.c (revision -+++ b/src/gcc/testsuite/gcc.dg/pr51408.c (revision -@@ -0,0 +1,22 @@ -+/* This testcase used to fail because of a bug in -+ arm.md:*minmax_arithsi. */ -+ -+/* { dg-do run } */ -+/* { dg-options "-O1" } */ -+ -+extern void abort (void); -+ -+int __attribute__((noinline)) -+foo (int a, int b) -+{ -+ int max = (b > 0) ? b : 0; -+ return max - a; -+} -+ -+int -+main (void) -+{ -+ if (foo (3, -1) != -3) -+ abort (); -+ return 0; -+} -Index: gcc/testsuite/ChangeLog -=================================================================== ---- a/src/gcc/testsuite/ChangeLog (revision -+++ b/src/gcc/testsuite/ChangeLog (revision -@@ -1,3 +1,137 @@ -+2011-12-14 Jason Merrill <jason@redhat.com> -+ -+ PR c++/51248 -+ * g++.dg/other/enum2.C: New. -+ -+2011-12-13 Jason Merrill <jason@redhat.com> -+ -+ PR c++/51406 -+ PR c++/51161 -+ * g++.dg/cpp0x/rv-cast3.C: New. -+ * g++.dg/cpp0x/rv-cast4.C: New. -+ -+2011-12-12 Jakub Jelinek <jakub@redhat.com> -+ -+ PR testsuite/51511 -+ * gcc.dg/pr45819.c: Add -w to dg-options. -+ -+ Backported from mainline -+ 2011-12-11 Jakub Jelinek <jakub@redhat.com> -+ -+ PR tree-optimization/51485 -+ * g++.dg/vect/pr51485.cc: New test. -+ -+2011-12-12 Eric Botcazou <ebotcazou@adacore.com> -+ -+ * gcc.c-torture/execute/20111212-1.c: New test. -+ -+2011-12-11 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/50923 -+ * gfortran.dg/warn_function_without_result_2.f90: New. -+ -+2011-12-11 Thomas Koenig <tkoenig@gcc.gnu.org> -+ -+ PR fortran/51338 -+ Backport from trunk -+ * gfortran.dg/assumed_charlen_substring_1.f90: New test. -+ -+2011-12-09 Jakub Jelinek <jakub@redhat.com> -+ -+ Backport from mainline -+ 2011-12-08 Jakub Jelinek <jakub@redhat.com> -+ -+ PR tree-optimization/51466 -+ * gcc.c-torture/execute/pr51466.c: New test. -+ -+ 2011-11-28 Jakub Jelinek <jakub@redhat.com> -+ -+ PR tree-optimization/50078 -+ * gcc.dg/pr50078.c: New test. -+ -+2011-12-09 Kazu Hirata <kazu@codesourcery.com> -+ -+ Backport from mainline: -+ -+ 2011-12-05 Kazu Hirata <kazu@codesourcery.com> -+ -+ PR target/51408 -+ * gcc.dg/pr51408.c: New. -+ -+2011-12-08 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/51448 -+ * gfortran.dg/realloc_on_assign_8.f90: New. -+ -+2011-12-08 Teresa Johnson <tejohnson@google.com> -+ -+ * gcc.target/i386/movdi-rex64.c: Remove unnecessary -+ unused label. -+ -+2011-12-08 Teresa Johnson <tejohnson@google.com> -+ -+ * gcc.target/i386/movdi-rex64.c: Remove unnecessary -+ -Wwrite-strings option. -+ -+2011-12-08 Teresa Johnson <tejohnson@google.com> -+ -+ * gcc.target/i386/movdi-rex64.c: New. -+ -+2011-12-08 Jakub Jelinek <jakub@redhat.com> -+ -+ Backport from mainline -+ 2011-12-05 Jakub Jelinek <jakub@redhat.com> -+ -+ PR debug/51410 -+ * gcc.dg/debug/dwarf2/pr51410.c: New test. -+ -+ PR c/51339 -+ * gcc.dg/gomp/pr51339.c: New test. -+ -+ 2011-12-05 Jakub Jelinek <jakub@redhat.com> -+ Eric Botcazou <ebotcazou@adacore.com> -+ -+ PR middle-end/51323 -+ PR middle-end/50074 -+ * gcc.c-torture/execute/pr51323.c: New test. -+ -+ 2011-11-30 Jakub Jelinek <jakub@redhat.com> -+ -+ PR rtl-optimization/48721 -+ * gcc.target/i386/pr48721.c: New test. -+ -+2011-12-08 Eric Botcazou <ebotcazou@adacore.com> -+ -+ * gcc.c-torture/execute/20111208-1.c: New test. -+ -+ Backport from mainline -+ 2011-09-25 Eric Botcazou <ebotcazou@adacore.com> -+ -+ * gnat.dg/frame_overflow.ads: New. -+ * gnat.dg/frame_overflow.adb: Adjust. -+ * gnat.dg/specs/addr1.ads: Likewise. -+ -+2011-12-06 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/51435 -+ * gfortran.dg/default_initialization_5.f90: New. -+ -+2011-12-06 Martin Jambor <mjambor@suse.cz> -+ -+ PR tree-optimization/50622 -+ * g++.dg/tree-ssa/pr50622.C: New test. -+ -+2011-12-04 Uros Bizjak <ubizjak@gmail.com> -+ Jérémie Detrey <Jeremie.Detrey@loria.fr> -+ -+ PR target/51393 -+ * gcc.target/i386/pr51393.c: New test. -+ -+2011-12-03 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/50684 -+ * gfortran.dg/move_alloc_8.f90: New. -+ - 2011-11-25 Tobias Burnus <burnus@net-b.de> - - PR fortran/50408 -@@ -75,9 +209,9 @@ - - 2011-10-20 Uros Bizjak <ubizjak@gmail.com> - -- * gcc.dg/ipa/ipa-sra-2.c: Add dg-require-effective-target -- non_strict_align. -- * gcc.dg/ipa/ipa-sra-6.c: Ditto. -+ * gcc.dg/ipa/ipa-sra-2.c: Add dg-require-effective-target -+ non_strict_align. -+ * gcc.dg/ipa/ipa-sra-6.c: Ditto. - - 2011-10-19 Jason Merrill <jason@redhat.com> - -Index: gcc/testsuite/g++.dg/vect/pr51485.cc -=================================================================== ---- a/src/gcc/testsuite/g++.dg/vect/pr51485.cc (revision -+++ b/src/gcc/testsuite/g++.dg/vect/pr51485.cc (revision -@@ -0,0 +1,14 @@ -+/* { dg-do compile } */ -+ -+struct A { A (); unsigned int a; }; -+double bar (A a) throw () __attribute__((pure)); -+ -+void -+foo (unsigned int x, double *y, A *z) -+{ -+ unsigned int i; -+ for (i = 0; i < x; i++) -+ y[i] = bar (z[i]); -+} -+ -+/* { dg-final { cleanup-tree-dump "vect" } } */ -Index: gcc/testsuite/g++.dg/other/enum2.C -=================================================================== ---- a/src/gcc/testsuite/g++.dg/other/enum2.C (revision -+++ b/src/gcc/testsuite/g++.dg/other/enum2.C (revision -@@ -0,0 +1,3 @@ -+// PR c++/51248 -+ -+enum E { e = sizeof(const E*) }; -Index: gcc/testsuite/g++.dg/tree-ssa/pr50622.C -=================================================================== ---- a/src/gcc/testsuite/g++.dg/tree-ssa/pr50622.C (revision -+++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr50622.C (revision -@@ -0,0 +1,30 @@ -+// { dg-do compile } -+// { dg-options "-O2" } -+ -+typedef __complex__ double Value; -+struct LorentzVector -+{ -+ LorentzVector & operator+=(const LorentzVector & a) { -+ theX += a.theX; -+ theY += a.theY; -+ theZ += a.theZ; -+ theT += a.theT; -+ return *this; -+ } -+ -+ Value theX; -+ Value theY; -+ Value theZ; -+ Value theT; -+}; -+ -+inline LorentzVector -+operator+(LorentzVector a, const LorentzVector & b) { -+ return a += b; -+} -+ -+Value ex, et; -+LorentzVector sum() { -+ LorentzVector v1; v1.theX =ex; v1.theY =ex+et; v1.theZ =ex-et; v1.theT =et; -+ return v1+v1; -+} -Index: gcc/testsuite/g++.dg/cpp0x/rv-cast3.C -=================================================================== ---- a/src/gcc/testsuite/g++.dg/cpp0x/rv-cast3.C (revision -+++ b/src/gcc/testsuite/g++.dg/cpp0x/rv-cast3.C (revision -@@ -0,0 +1,17 @@ -+// PR c++/51406 -+// { dg-do run { target c++11 } } -+ -+extern "C" int printf(const char *,...); -+extern "C" void abort(); -+ -+struct A { int a; A() : a(1) {} }; -+struct B { int b; B() : b(2) {} }; -+struct X : A, B {}; -+ -+int main() { -+ X x; -+ int a=static_cast<A&&>(x).a; -+ int b=static_cast<B&&>(x).b; -+ // printf ("%d %d\n", a, b); -+ if (a!=1 || b!=2) abort(); -+} -Index: gcc/testsuite/g++.dg/cpp0x/rv-cast4.C -=================================================================== ---- a/src/gcc/testsuite/g++.dg/cpp0x/rv-cast4.C (revision -+++ b/src/gcc/testsuite/g++.dg/cpp0x/rv-cast4.C (revision -@@ -0,0 +1,13 @@ -+// PR c++/51161 -+// { dg-do compile { target c++11 } } -+ -+struct A{}; -+struct B : A{}; -+struct C : A{}; -+struct D : B, C{}; -+ -+int main() -+{ -+ D d; -+ static_cast<A &&>(d); // { dg-error "ambiguous" } -+} -Index: gcc/cp/typeck.c -=================================================================== ---- a/src/gcc/cp/typeck.c (revision -+++ b/src/gcc/cp/typeck.c (revision -@@ -5770,8 +5770,18 @@ - && reference_related_p (TREE_TYPE (type), intype) - && (c_cast_p || at_least_as_qualified_p (TREE_TYPE (type), intype))) - { -- expr = build_typed_address (expr, type); -- return convert_from_reference (expr); -+ /* Handle the lvalue case here by casting to lvalue reference and -+ then changing it to an rvalue reference. Casting an xvalue to -+ rvalue reference will be handled by the main code path. */ -+ tree lref = cp_build_reference_type (TREE_TYPE (type), false); -+ result = (perform_direct_initialization_if_possible -+ (lref, expr, c_cast_p, complain)); -+ result = cp_fold_convert (type, result); -+ /* Make sure we don't fold back down to a named rvalue reference, -+ because that would be an lvalue. */ -+ if (DECL_P (result)) -+ result = build1 (NON_LVALUE_EXPR, type, result); -+ return convert_from_reference (result); - } - - /* Resolve overloaded address here rather than once in -Index: gcc/cp/decl.c -=================================================================== ---- a/src/gcc/cp/decl.c (revision -+++ b/src/gcc/cp/decl.c (revision -@@ -11540,15 +11540,19 @@ - static void - copy_type_enum (tree dst, tree src) - { -- TYPE_MIN_VALUE (dst) = TYPE_MIN_VALUE (src); -- TYPE_MAX_VALUE (dst) = TYPE_MAX_VALUE (src); -- TYPE_SIZE (dst) = TYPE_SIZE (src); -- TYPE_SIZE_UNIT (dst) = TYPE_SIZE_UNIT (src); -- SET_TYPE_MODE (dst, TYPE_MODE (src)); -- TYPE_PRECISION (dst) = TYPE_PRECISION (src); -- TYPE_ALIGN (dst) = TYPE_ALIGN (src); -- TYPE_USER_ALIGN (dst) = TYPE_USER_ALIGN (src); -- TYPE_UNSIGNED (dst) = TYPE_UNSIGNED (src); -+ tree t; -+ for (t = dst; t; t = TYPE_NEXT_VARIANT (t)) -+ { -+ TYPE_MIN_VALUE (t) = TYPE_MIN_VALUE (src); -+ TYPE_MAX_VALUE (t) = TYPE_MAX_VALUE (src); -+ TYPE_SIZE (t) = TYPE_SIZE (src); -+ TYPE_SIZE_UNIT (t) = TYPE_SIZE_UNIT (src); -+ SET_TYPE_MODE (dst, TYPE_MODE (src)); -+ TYPE_PRECISION (t) = TYPE_PRECISION (src); -+ TYPE_ALIGN (t) = TYPE_ALIGN (src); -+ TYPE_USER_ALIGN (t) = TYPE_USER_ALIGN (src); -+ TYPE_UNSIGNED (t) = TYPE_UNSIGNED (src); -+ } - } - - /* Begin compiling the definition of an enumeration type. -@@ -11903,9 +11907,12 @@ - return; - } - -- /* Here there should not be any variants of this type. */ -+ /* If this is a forward declaration, there should not be any variants, -+ though we can get a variant in the middle of an enum-specifier with -+ wacky code like 'enum E { e = sizeof(const E*) };' */ - gcc_assert (enumtype == TYPE_MAIN_VARIANT (enumtype) -- && !TYPE_NEXT_VARIANT (enumtype)); -+ && (TYPE_VALUES (enumtype) -+ || !TYPE_NEXT_VARIANT (enumtype))); - } - - /* Build and install a CONST_DECL for an enumeration constant of the -Index: gcc/cp/ChangeLog -=================================================================== ---- a/src/gcc/cp/ChangeLog (revision -+++ b/src/gcc/cp/ChangeLog (revision -@@ -1,3 +1,16 @@ -+2011-12-14 Jason Merrill <jason@redhat.com> -+ -+ PR c++/51248 -+ * decl.c (copy_type_enum): Also update variants. -+ (finish_enum): Allow variants of complete enums. -+ -+2011-12-13 Jason Merrill <jason@redhat.com> -+ -+ PR c++/51406 -+ PR c++/51161 -+ * typeck.c (build_static_cast_1): Fix cast of lvalue to -+ base rvalue reference. -+ - 2011-11-22 Paolo Carlini <paolo.carlini@oracle.com> - - PR c++/51265 -Index: gcc/lto-cgraph.c -=================================================================== ---- a/src/gcc/lto-cgraph.c (revision -+++ b/src/gcc/lto-cgraph.c (revision -@@ -1792,9 +1792,9 @@ - { - const struct lto_function_header *header = - (const struct lto_function_header *) data; -- const int32_t cfg_offset = sizeof (struct lto_function_header); -- const int32_t main_offset = cfg_offset + header->cfg_size; -- const int32_t string_offset = main_offset + header->main_size; -+ const int cfg_offset = sizeof (struct lto_function_header); -+ const int main_offset = cfg_offset + header->cfg_size; -+ const int string_offset = main_offset + header->main_size; - struct data_in *data_in; - struct lto_input_block ib_main; - unsigned int i; -Index: gcc/lto-streamer-out.c -=================================================================== ---- a/src/gcc/lto-streamer-out.c (revision -+++ b/src/gcc/lto-streamer-out.c (revision -@@ -2408,7 +2408,7 @@ - enum gcc_plugin_symbol_kind kind; - enum gcc_plugin_symbol_visibility visibility; - int slot_num; -- uint64_t size; -+ unsigned HOST_WIDEST_INT size; - const char *comdat; - unsigned char c; - -@@ -2466,7 +2466,7 @@ - when symbol has attribute (visibility("hidden")) specified. - targetm.binds_local_p check DECL_VISIBILITY_SPECIFIED and gets this - right. */ -- -+ - if (DECL_EXTERNAL (t) - && !targetm.binds_local_p (t)) - visibility = GCCPV_DEFAULT; -@@ -2488,14 +2488,9 @@ - } - - if (kind == GCCPK_COMMON -- && DECL_SIZE (t) -- && TREE_CODE (DECL_SIZE (t)) == INTEGER_CST) -- { -- size = (HOST_BITS_PER_WIDE_INT >= 64) -- ? (uint64_t) int_size_in_bytes (TREE_TYPE (t)) -- : (((uint64_t) TREE_INT_CST_HIGH (DECL_SIZE_UNIT (t))) << 32) -- | TREE_INT_CST_LOW (DECL_SIZE_UNIT (t)); -- } -+ && DECL_SIZE_UNIT (t) -+ && TREE_CODE (DECL_SIZE_UNIT (t)) == INTEGER_CST) -+ size = TREE_INT_CST_LOW (DECL_SIZE_UNIT (t)); - else - size = 0; - -Index: gcc/ada/ChangeLog -=================================================================== ---- a/src/gcc/ada/ChangeLog (revision -+++ b/src/gcc/ada/ChangeLog (revision -@@ -1,3 +1,12 @@ -+2011-12-08 Eric Botcazou <ebotcazou@adacore.com> -+ -+ PR tree-optimization/51315 -+ Backport from mainline -+ 2011-09-25 Eric Botcazou <ebotcazou@adacore.com> -+ -+ * gcc-interface/decl.c (gnat_to_gnu_entity) <object>: Do not promote -+ the alignment if this doesn't prevent BLKmode access to the object. -+ - 2011-11-13 Iain Sandoe <iains@gcc.gnu.org> - - Backport from mainline r181474 -Index: gcc/ada/gcc-interface/decl.c -=================================================================== ---- a/src/gcc/ada/gcc-interface/decl.c (revision -+++ b/src/gcc/ada/gcc-interface/decl.c (revision -@@ -808,16 +808,30 @@ - && No (Address_Clause (gnat_entity)))) - && TREE_CODE (TYPE_SIZE (gnu_type)) == INTEGER_CST) - { -- /* No point in jumping through all the hoops needed in order -+ unsigned int size_cap, align_cap; -+ -+ /* No point in promoting the alignment if this doesn't prevent -+ BLKmode access to the object, in particular block copy, as -+ this will for example disable the NRV optimization for it. -+ No point in jumping through all the hoops needed in order - to support BIGGEST_ALIGNMENT if we don't really have to. - So we cap to the smallest alignment that corresponds to - a known efficient memory access pattern of the target. */ -- unsigned int align_cap = Is_Atomic (gnat_entity) -- ? BIGGEST_ALIGNMENT -- : get_mode_alignment (ptr_mode); -+ if (Is_Atomic (gnat_entity)) -+ { -+ size_cap = UINT_MAX; -+ align_cap = BIGGEST_ALIGNMENT; -+ } -+ else -+ { -+ size_cap = MAX_FIXED_MODE_SIZE; -+ align_cap = get_mode_alignment (ptr_mode); -+ } - - if (!host_integerp (TYPE_SIZE (gnu_type), 1) -- || compare_tree_int (TYPE_SIZE (gnu_type), align_cap) >= 0) -+ || compare_tree_int (TYPE_SIZE (gnu_type), size_cap) > 0) -+ align = 0; -+ else if (compare_tree_int (TYPE_SIZE (gnu_type), align_cap) > 0) - align = align_cap; - else - align = ceil_alignment (tree_low_cst (TYPE_SIZE (gnu_type), 1)); -Index: gcc/lto-streamer-in.c -=================================================================== ---- a/src/gcc/lto-streamer-in.c (revision -+++ b/src/gcc/lto-streamer-in.c (revision -@@ -1366,9 +1366,9 @@ - { - const struct lto_function_header *header; - struct data_in *data_in; -- int32_t cfg_offset; -- int32_t main_offset; -- int32_t string_offset; -+ int cfg_offset; -+ int main_offset; -+ int string_offset; - struct lto_input_block ib_cfg; - struct lto_input_block ib_main; - -Index: gcc/c-decl.c -=================================================================== ---- a/src/gcc/c-decl.c (revision -+++ b/src/gcc/c-decl.c (revision -@@ -721,7 +721,7 @@ - - complete_array_type (&TREE_TYPE (decl), NULL_TREE, true); - -- layout_decl (decl, 0); -+ relayout_decl (decl); - } - } - } -@@ -1200,7 +1200,7 @@ - DECL_CHAIN (p) = BLOCK_VARS (block); - BLOCK_VARS (block) = p; - } -- else if (VAR_OR_FUNCTION_DECL_P (p)) -+ else if (VAR_OR_FUNCTION_DECL_P (p) && scope != file_scope) - { - /* For block local externs add a special - DECL_EXTERNAL decl for debug info generation. */ -@@ -4261,7 +4261,7 @@ - if (DECL_INITIAL (decl)) - TREE_TYPE (DECL_INITIAL (decl)) = type; - -- layout_decl (decl, 0); -+ relayout_decl (decl); - } - - if (TREE_CODE (decl) == VAR_DECL) -Index: gcc/fortran/trans-array.c -=================================================================== ---- a/src/gcc/fortran/trans-array.c (revision -+++ b/src/gcc/fortran/trans-array.c (revision -@@ -6772,8 +6772,17 @@ - gfc_array_index_type, cond, - lbound, gfc_index_one_node); - } -- else if (expr->expr_type == EXPR_VARIABLE) -+ -+ if (expr->expr_type == EXPR_FUNCTION) - { -+ /* A conversion function, so use the argument. */ -+ gcc_assert (expr->value.function.isym -+ && expr->value.function.isym->conversion); -+ expr = expr->value.function.actual->expr; -+ } -+ -+ if (expr->expr_type == EXPR_VARIABLE) -+ { - tmp = TREE_TYPE (expr->symtree->n.sym->backend_decl); - for (ref = expr->ref; ref; ref = ref->next) - { -@@ -6785,15 +6794,6 @@ - } - return GFC_TYPE_ARRAY_LBOUND(tmp, dim); - } -- else if (expr->expr_type == EXPR_FUNCTION) -- { -- /* A conversion function, so use the argument. */ -- expr = expr->value.function.actual->expr; -- if (expr->expr_type != EXPR_VARIABLE) -- return gfc_index_one_node; -- desc = TREE_TYPE (expr->symtree->n.sym->backend_decl); -- return get_std_lbound (expr, desc, dim, assumed_size); -- } - - return gfc_index_one_node; - } -Index: gcc/fortran/ChangeLog -=================================================================== ---- a/src/gcc/fortran/ChangeLog (revision -+++ b/src/gcc/fortran/ChangeLog (revision -@@ -1,3 +1,40 @@ -+2011-12-11 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/50923 -+ * trans-decl.c (generate_local_decl): Set TREE_NO_WARNING only -+ if the front end has printed a warning. -+ (gfc_generate_function_code): Fix unset-result warning. -+ -+2011-12-11 Thomas Koenig <tkoenig@gcc.gnu.org> -+ -+ PR fortran/51338 -+ Backport from trunk -+ * dependency.c (are_identical_variables): Handle case where -+ end fields of substring references are NULL. -+ -+2011-12-08 Toon Moene <toon@moene.org> -+ -+ PR fortran/51310 -+ * invoke.texi: Itemize the cases for which -+ -finit-<type>=<constant> doesn't work. -+ -+2011-12-08 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/51448 -+ * fortran/trans-array.c (get_std_lbound): Fix handling of -+ conversion functions. -+ -+2011-12-06 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/51435 -+ * expr.c (gfc_has_default_initializer): Fix handling of -+ DT with initialized pointer components. -+ -+2011-12-03 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/50684 -+ * check.c (variable_check): Fix intent(in) check. -+ - 2011-11-25 Tobias Burnus <burnus@net-b.de> - - PR fortran/50408 -Index: gcc/fortran/expr.c -=================================================================== ---- a/src/gcc/fortran/expr.c (revision -+++ b/src/gcc/fortran/expr.c (revision -@@ -3679,6 +3679,8 @@ - if (!c->attr.pointer - && gfc_has_default_initializer (c->ts.u.derived)) - return true; -+ if (c->attr.pointer && c->initializer) -+ return true; - } - else - { -@@ -3689,6 +3691,7 @@ - return false; - } - -+ - /* Get an expression for a default initializer. */ - - gfc_expr * -Index: gcc/fortran/trans-decl.c -=================================================================== ---- a/src/gcc/fortran/trans-decl.c (revision -+++ b/src/gcc/fortran/trans-decl.c (revision -@@ -4184,10 +4184,16 @@ - "declared INTENT(OUT) but was not set and " - "does not have a default initializer", - sym->name, &sym->declared_at); -+ if (sym->backend_decl != NULL_TREE) -+ TREE_NO_WARNING(sym->backend_decl) = 1; - } - else if (gfc_option.warn_unused_dummy_argument) -- gfc_warning ("Unused dummy argument '%s' at %L", sym->name, -+ { -+ gfc_warning ("Unused dummy argument '%s' at %L", sym->name, - &sym->declared_at); -+ if (sym->backend_decl != NULL_TREE) -+ TREE_NO_WARNING(sym->backend_decl) = 1; -+ } - } - - /* Warn for unused variables, but not if they're inside a common -@@ -4232,11 +4238,6 @@ - mark the symbol now, as well as in traverse_ns, to prevent - getting stuck in a circular dependency. */ - sym->mark = 1; -- -- /* We do not want the middle-end to warn about unused parameters -- as this was already done above. */ -- if (sym->attr.dummy && sym->backend_decl != NULL_TREE) -- TREE_NO_WARNING(sym->backend_decl) = 1; - } - else if (sym->attr.flavor == FL_PARAMETER) - { -@@ -4851,11 +4852,11 @@ - if (result == NULL_TREE) - { - /* TODO: move to the appropriate place in resolve.c. */ -- if (warn_return_type && !sym->attr.referenced && sym == sym->result) -+ if (warn_return_type && sym == sym->result) - gfc_warning ("Return value of function '%s' at %L not set", - sym->name, &sym->declared_at); -- -- TREE_NO_WARNING(sym->backend_decl) = 1; -+ if (warn_return_type) -+ TREE_NO_WARNING(sym->backend_decl) = 1; - } - else - gfc_add_expr_to_block (&body, gfc_generate_return ()); -Index: gcc/fortran/check.c -=================================================================== ---- a/src/gcc/fortran/check.c (revision -+++ b/src/gcc/fortran/check.c (revision -@@ -485,10 +485,31 @@ - && (gfc_current_intrinsic_arg[n]->intent == INTENT_OUT - || gfc_current_intrinsic_arg[n]->intent == INTENT_INOUT)) - { -- gfc_error ("'%s' argument of '%s' intrinsic at %L cannot be INTENT(IN)", -- gfc_current_intrinsic_arg[n]->name, gfc_current_intrinsic, -- &e->where); -- return FAILURE; -+ gfc_ref *ref; -+ bool pointer = e->symtree->n.sym->ts.type == BT_CLASS -+ && CLASS_DATA (e->symtree->n.sym) -+ ? CLASS_DATA (e->symtree->n.sym)->attr.class_pointer -+ : e->symtree->n.sym->attr.pointer; -+ -+ for (ref = e->ref; ref; ref = ref->next) -+ { -+ if (pointer && ref->type == REF_COMPONENT) -+ break; -+ if (ref->type == REF_COMPONENT -+ && ((ref->u.c.component->ts.type == BT_CLASS -+ && CLASS_DATA (ref->u.c.component)->attr.class_pointer) -+ || (ref->u.c.component->ts.type != BT_CLASS -+ && ref->u.c.component->attr.pointer))) -+ break; -+ } -+ -+ if (!ref) -+ { -+ gfc_error ("'%s' argument of '%s' intrinsic at %L cannot be " -+ "INTENT(IN)", gfc_current_intrinsic_arg[n]->name, -+ gfc_current_intrinsic, &e->where); -+ return FAILURE; -+ } - } - - if (e->expr_type == EXPR_VARIABLE -Index: gcc/fortran/dependency.c -=================================================================== ---- a/src/gcc/fortran/dependency.c (revision -+++ b/src/gcc/fortran/dependency.c (revision -@@ -163,9 +163,19 @@ - break; - - case REF_SUBSTRING: -- if (gfc_dep_compare_expr (r1->u.ss.start, r2->u.ss.start) != 0 -- || gfc_dep_compare_expr (r1->u.ss.end, r2->u.ss.end) != 0) -+ if (gfc_dep_compare_expr (r1->u.ss.start, r2->u.ss.start) != 0) - return false; -+ -+ /* If both are NULL, the end length compares equal, because we -+ are looking at the same variable. This can only happen for -+ assumed- or deferred-length character arguments. */ -+ -+ if (r1->u.ss.end == NULL && r2->u.ss.end == NULL) -+ break; -+ -+ if (gfc_dep_compare_expr (r1->u.ss.end, r2->u.ss.end) != 0) -+ return false; -+ - break; - - default: -Index: gcc/regmove.c -=================================================================== ---- a/src/gcc/regmove.c (revision -+++ b/src/gcc/regmove.c (revision -@@ -860,7 +860,7 @@ - if (REG_N_CALLS_CROSSED (REGNO (src)) == 0) - break; - -- if (call_used_regs [REGNO (dst)] -+ if ((HARD_REGISTER_P (dst) && call_used_regs [REGNO (dst)]) - || find_reg_fusage (p, CLOBBER, dst)) - break; - } -Index: gcc/df.h -=================================================================== ---- a/src/gcc/df.h (revision -+++ b/src/gcc/df.h (revision -@@ -53,7 +53,7 @@ - #define DF_RD 3 /* Reaching Defs. */ - #define DF_CHAIN 4 /* Def-Use and/or Use-Def Chains. */ - #define DF_WORD_LR 5 /* Subreg tracking lr. */ --#define DF_NOTE 6 /* REG_DEF and REG_UNUSED notes. */ -+#define DF_NOTE 6 /* REG_DEAD and REG_UNUSED notes. */ - #define DF_MD 7 /* Multiple Definitions. */ - - #define DF_LAST_PROBLEM_PLUS1 (DF_MD + 1) -Index: gcc/lto-section-in.c -=================================================================== ---- a/src/gcc/lto-section-in.c (revision -+++ b/src/gcc/lto-section-in.c (revision -@@ -296,7 +296,7 @@ - = (const struct lto_simple_header *) data; - - struct lto_input_block* ib_main; -- int32_t main_offset = sizeof (struct lto_simple_header); -+ int main_offset = sizeof (struct lto_simple_header); - - if (!data) - return NULL; -Index: gcc/tree-vect-data-refs.c -=================================================================== ---- a/src/gcc/tree-vect-data-refs.c (revision -+++ b/src/gcc/tree-vect-data-refs.c (revision -@@ -2631,6 +2631,16 @@ - return false; - } - -+ if (is_gimple_call (stmt)) -+ { -+ if (vect_print_dump_info (REPORT_UNVECTORIZED_LOCATIONS)) -+ { -+ fprintf (vect_dump, "not vectorized: dr in a call "); -+ print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM); -+ } -+ return false; -+ } -+ - /* Update DR field in stmt_vec_info struct. */ - - /* If the dataref is in an inner-loop of the loop that is considered for -Index: gcc/calls.c -=================================================================== ---- a/src/gcc/calls.c (revision -+++ b/src/gcc/calls.c (revision -@@ -1548,6 +1548,131 @@ - return funexp; - } - -+/* Internal state for internal_arg_pointer_based_exp and its helpers. */ -+static struct -+{ -+ /* Last insn that has been scanned by internal_arg_pointer_based_exp_scan, -+ or NULL_RTX if none has been scanned yet. */ -+ rtx scan_start; -+ /* Vector indexed by REGNO - FIRST_PSEUDO_REGISTER, recording if a pseudo is -+ based on crtl->args.internal_arg_pointer. The element is NULL_RTX if the -+ pseudo isn't based on it, a CONST_INT offset if the pseudo is based on it -+ with fixed offset, or PC if this is with variable or unknown offset. */ -+ VEC(rtx, heap) *cache; -+} internal_arg_pointer_exp_state; -+ -+static rtx internal_arg_pointer_based_exp (rtx, bool); -+ -+/* Helper function for internal_arg_pointer_based_exp. Scan insns in -+ the tail call sequence, starting with first insn that hasn't been -+ scanned yet, and note for each pseudo on the LHS whether it is based -+ on crtl->args.internal_arg_pointer or not, and what offset from that -+ that pointer it has. */ -+ -+static void -+internal_arg_pointer_based_exp_scan (void) -+{ -+ rtx insn, scan_start = internal_arg_pointer_exp_state.scan_start; -+ -+ if (scan_start == NULL_RTX) -+ insn = get_insns (); -+ else -+ insn = NEXT_INSN (scan_start); -+ -+ while (insn) -+ { -+ rtx set = single_set (insn); -+ if (set && REG_P (SET_DEST (set)) && !HARD_REGISTER_P (SET_DEST (set))) -+ { -+ rtx val = NULL_RTX; -+ unsigned int idx = REGNO (SET_DEST (set)) - FIRST_PSEUDO_REGISTER; -+ /* Punt on pseudos set multiple times. */ -+ if (idx < VEC_length (rtx, internal_arg_pointer_exp_state.cache) -+ && (VEC_index (rtx, internal_arg_pointer_exp_state.cache, idx) -+ != NULL_RTX)) -+ val = pc_rtx; -+ else -+ val = internal_arg_pointer_based_exp (SET_SRC (set), false); -+ if (val != NULL_RTX) -+ { -+ if (idx -+ >= VEC_length (rtx, internal_arg_pointer_exp_state.cache)) -+ VEC_safe_grow_cleared (rtx, heap, -+ internal_arg_pointer_exp_state.cache, -+ idx + 1); -+ VEC_replace (rtx, internal_arg_pointer_exp_state.cache, -+ idx, val); -+ } -+ } -+ if (NEXT_INSN (insn) == NULL_RTX) -+ scan_start = insn; -+ insn = NEXT_INSN (insn); -+ } -+ -+ internal_arg_pointer_exp_state.scan_start = scan_start; -+} -+ -+/* Helper function for internal_arg_pointer_based_exp, called through -+ for_each_rtx. Return 1 if *LOC is a register based on -+ crtl->args.internal_arg_pointer. Return -1 if *LOC is not based on it -+ and the subexpressions need not be examined. Otherwise return 0. */ -+ -+static int -+internal_arg_pointer_based_exp_1 (rtx *loc, void *data ATTRIBUTE_UNUSED) -+{ -+ if (REG_P (*loc) && internal_arg_pointer_based_exp (*loc, false) != NULL_RTX) -+ return 1; -+ if (MEM_P (*loc)) -+ return -1; -+ return 0; -+} -+ -+/* Compute whether RTL is based on crtl->args.internal_arg_pointer. Return -+ NULL_RTX if RTL isn't based on it, a CONST_INT offset if RTL is based on -+ it with fixed offset, or PC if this is with variable or unknown offset. -+ TOPLEVEL is true if the function is invoked at the topmost level. */ -+ -+static rtx -+internal_arg_pointer_based_exp (rtx rtl, bool toplevel) -+{ -+ if (CONSTANT_P (rtl)) -+ return NULL_RTX; -+ -+ if (rtl == crtl->args.internal_arg_pointer) -+ return const0_rtx; -+ -+ if (REG_P (rtl) && HARD_REGISTER_P (rtl)) -+ return NULL_RTX; -+ -+ if (GET_CODE (rtl) == PLUS && CONST_INT_P (XEXP (rtl, 1))) -+ { -+ rtx val = internal_arg_pointer_based_exp (XEXP (rtl, 0), toplevel); -+ if (val == NULL_RTX || val == pc_rtx) -+ return val; -+ return plus_constant (val, INTVAL (XEXP (rtl, 1))); -+ } -+ -+ /* When called at the topmost level, scan pseudo assignments in between the -+ last scanned instruction in the tail call sequence and the latest insn -+ in that sequence. */ -+ if (toplevel) -+ internal_arg_pointer_based_exp_scan (); -+ -+ if (REG_P (rtl)) -+ { -+ unsigned int idx = REGNO (rtl) - FIRST_PSEUDO_REGISTER; -+ if (idx < VEC_length (rtx, internal_arg_pointer_exp_state.cache)) -+ return VEC_index (rtx, internal_arg_pointer_exp_state.cache, idx); -+ -+ return NULL_RTX; -+ } -+ -+ if (for_each_rtx (&rtl, internal_arg_pointer_based_exp_1, NULL)) -+ return pc_rtx; -+ -+ return NULL_RTX; -+} -+ - /* Return true if and only if SIZE storage units (usually bytes) - starting from address ADDR overlap with already clobbered argument - area. This function is used to determine if we should give up a -@@ -1557,20 +1682,17 @@ - mem_overlaps_already_clobbered_arg_p (rtx addr, unsigned HOST_WIDE_INT size) - { - HOST_WIDE_INT i; -+ rtx val; - -- if (addr == crtl->args.internal_arg_pointer) -- i = 0; -- else if (GET_CODE (addr) == PLUS -- && XEXP (addr, 0) == crtl->args.internal_arg_pointer -- && CONST_INT_P (XEXP (addr, 1))) -- i = INTVAL (XEXP (addr, 1)); -- /* Return true for arg pointer based indexed addressing. */ -- else if (GET_CODE (addr) == PLUS -- && (XEXP (addr, 0) == crtl->args.internal_arg_pointer -- || XEXP (addr, 1) == crtl->args.internal_arg_pointer)) -+ if (sbitmap_empty_p (stored_args_map)) -+ return false; -+ val = internal_arg_pointer_based_exp (addr, true); -+ if (val == NULL_RTX) -+ return false; -+ else if (val == pc_rtx) - return true; - else -- return false; -+ i = INTVAL (val); - - #ifdef ARGS_GROW_DOWNWARD - i = -i - size; -@@ -3175,6 +3297,8 @@ - } - - sbitmap_free (stored_args_map); -+ internal_arg_pointer_exp_state.scan_start = NULL_RTX; -+ VEC_free (rtx, heap, internal_arg_pointer_exp_state.cache); - } - else - { -Index: gcc/tree-sra.c -=================================================================== ---- a/src/gcc/tree-sra.c (revision -+++ b/src/gcc/tree-sra.c (revision -@@ -1020,26 +1020,28 @@ - return false; - } - --/* Return true iff type of EXP is not sufficiently aligned. */ -+/* Return true if EXP is a memory reference less aligned than ALIGN. This is -+ invoked only on strict-alignment targets. */ - - static bool --tree_non_mode_aligned_mem_p (tree exp) -+tree_non_aligned_mem_p (tree exp, unsigned int align) - { -- enum machine_mode mode = TYPE_MODE (TREE_TYPE (exp)); -- unsigned int align; -+ unsigned int exp_align; - - if (TREE_CODE (exp) == VIEW_CONVERT_EXPR) - exp = TREE_OPERAND (exp, 0); - -- if (TREE_CODE (exp) == SSA_NAME -- || TREE_CODE (exp) == MEM_REF -- || mode == BLKmode -- || is_gimple_min_invariant (exp) -- || !STRICT_ALIGNMENT) -+ if (TREE_CODE (exp) == SSA_NAME || is_gimple_min_invariant (exp)) - return false; - -- align = get_object_alignment (exp, BIGGEST_ALIGNMENT); -- if (GET_MODE_ALIGNMENT (mode) > align) -+ /* get_object_alignment will fall back to BITS_PER_UNIT if it cannot -+ compute an explicit alignment. Pretend that dereferenced pointers -+ are always aligned on strict-alignment targets. */ -+ exp_align = get_object_alignment (exp, BIGGEST_ALIGNMENT); -+ if (TREE_CODE (exp) == MEM_REF || TREE_CODE (exp) == TARGET_MEM_REF) -+ exp_align = MAX (TYPE_ALIGN (TREE_TYPE (exp)), exp_align); -+ -+ if (exp_align < align) - return true; - - return false; -@@ -1071,7 +1073,11 @@ - if (lacc) - { - lacc->grp_assignment_write = 1; -- lacc->grp_unscalarizable_region |= tree_non_mode_aligned_mem_p (rhs); -+ if (STRICT_ALIGNMENT -+ && tree_non_aligned_mem_p (rhs, -+ get_object_alignment (lhs, -+ BIGGEST_ALIGNMENT))) -+ lacc->grp_unscalarizable_region = 1; - } - - if (racc) -@@ -1080,7 +1086,11 @@ - if (should_scalarize_away_bitmap && !gimple_has_volatile_ops (stmt) - && !is_gimple_reg_type (racc->type)) - bitmap_set_bit (should_scalarize_away_bitmap, DECL_UID (racc->base)); -- racc->grp_unscalarizable_region |= tree_non_mode_aligned_mem_p (lhs); -+ if (STRICT_ALIGNMENT -+ && tree_non_aligned_mem_p (lhs, -+ get_object_alignment (rhs, -+ BIGGEST_ALIGNMENT))) -+ racc->grp_unscalarizable_region = 1; - } - - if (lacc && racc -@@ -1435,29 +1445,61 @@ - return fold_build2_loc (loc, MEM_REF, exp_type, base, off); - } - -+DEF_VEC_ALLOC_P_STACK (tree); -+#define VEC_tree_stack_alloc(alloc) VEC_stack_alloc (tree, alloc) -+ - /* Construct a memory reference to a part of an aggregate BASE at the given -- OFFSET and of the same type as MODEL. In case this is a reference to a -- component, the function will replicate the last COMPONENT_REF of model's -- expr to access it. GSI and INSERT_AFTER have the same meaning as in -- build_ref_for_offset. */ -+ OFFSET and of the type of MODEL. In case this is a chain of references -+ to component, the function will replicate the chain of COMPONENT_REFs of -+ the expression of MODEL to access it. GSI and INSERT_AFTER have the same -+ meaning as in build_ref_for_offset. */ - - static tree - build_ref_for_model (location_t loc, tree base, HOST_WIDE_INT offset, - struct access *model, gimple_stmt_iterator *gsi, - bool insert_after) - { -+ tree type = model->type, t; -+ VEC(tree,stack) *cr_stack = NULL; -+ - if (TREE_CODE (model->expr) == COMPONENT_REF) - { -- tree t, exp_type, fld = TREE_OPERAND (model->expr, 1); -- offset -= int_bit_position (fld); -- exp_type = TREE_TYPE (TREE_OPERAND (model->expr, 0)); -- t = build_ref_for_offset (loc, base, offset, exp_type, gsi, insert_after); -- return fold_build3_loc (loc, COMPONENT_REF, TREE_TYPE (fld), t, fld, -- NULL_TREE); -+ tree expr = model->expr; -+ -+ /* Create a stack of the COMPONENT_REFs so later we can walk them in -+ order from inner to outer. */ -+ cr_stack = VEC_alloc (tree, stack, 6); -+ -+ do { -+ tree field = TREE_OPERAND (expr, 1); -+ offset -= int_bit_position (field); -+ -+ VEC_safe_push (tree, stack, cr_stack, expr); -+ -+ expr = TREE_OPERAND (expr, 0); -+ type = TREE_TYPE (expr); -+ } while (TREE_CODE (expr) == COMPONENT_REF); - } -- else -- return build_ref_for_offset (loc, base, offset, model->type, -- gsi, insert_after); -+ -+ t = build_ref_for_offset (loc, base, offset, type, gsi, insert_after); -+ -+ if (TREE_CODE (model->expr) == COMPONENT_REF) -+ { -+ unsigned i; -+ tree expr; -+ -+ /* Now replicate the chain of COMPONENT_REFs from inner to outer. */ -+ FOR_EACH_VEC_ELT_REVERSE (tree, cr_stack, i, expr) -+ { -+ tree field = TREE_OPERAND (expr, 1); -+ t = fold_build3_loc (loc, COMPONENT_REF, TREE_TYPE (field), t, field, -+ NULL_TREE); -+ } -+ -+ VEC_free (tree, stack, cr_stack); -+ } -+ -+ return t; - } - - /* Construct a memory reference consisting of component_refs and array_refs to -@@ -2594,6 +2636,10 @@ - rhs = get_access_replacement (racc); - if (!useless_type_conversion_p (lacc->type, racc->type)) - rhs = fold_build1_loc (loc, VIEW_CONVERT_EXPR, lacc->type, rhs); -+ -+ if (racc->grp_partial_lhs && lacc->grp_partial_lhs) -+ rhs = force_gimple_operand_gsi (old_gsi, rhs, true, NULL_TREE, -+ true, GSI_SAME_STMT); - } - else - { -@@ -3604,7 +3650,8 @@ - || gimple_code (access->stmt) == GIMPLE_ASM)) - return true; - -- if (tree_non_mode_aligned_mem_p (access->expr)) -+ if (STRICT_ALIGNMENT -+ && tree_non_aligned_mem_p (access->expr, TYPE_ALIGN (access->type))) - return true; - - return false; -Index: gcc/lto/lto.c -=================================================================== ---- a/src/gcc/lto/lto.c (revision -+++ b/src/gcc/lto/lto.c (revision -@@ -198,7 +198,7 @@ - uint32_t ix; - tree decl; - uint32_t i, j; -- -+ - ix = *data++; - decl = lto_streamer_cache_get (data_in->reader_cache, (int) ix); - if (TREE_CODE (decl) != FUNCTION_DECL) -@@ -241,9 +241,9 @@ - VEC(ld_plugin_symbol_resolution_t,heap) *resolutions) - { - const struct lto_decl_header *header = (const struct lto_decl_header *) data; -- const int32_t decl_offset = sizeof (struct lto_decl_header); -- const int32_t main_offset = decl_offset + header->decl_state_size; -- const int32_t string_offset = main_offset + header->main_size; -+ const int decl_offset = sizeof (struct lto_decl_header); -+ const int main_offset = decl_offset + header->decl_state_size; -+ const int string_offset = main_offset + header->main_size; - struct lto_input_block ib_main; - struct data_in *data_in; - unsigned int i; -@@ -291,17 +291,20 @@ - - if (data_ptr != data_end) - internal_error ("bytecode stream: garbage at the end of symbols section"); -- -+ - /* Set the current decl state to be the global state. */ - decl_data->current_decl_state = decl_data->global_decl_state; - - lto_data_in_delete (data_in); - } - --/* strtoll is not portable. */ --int64_t --lto_parse_hex (const char *p) { -- uint64_t ret = 0; -+/* Custom version of strtoll, which is not portable. */ -+ -+static HOST_WIDEST_INT -+lto_parse_hex (const char *p) -+{ -+ HOST_WIDEST_INT ret = 0; -+ - for (; *p != '\0'; ++p) - { - char c = *p; -@@ -317,6 +320,7 @@ - internal_error ("could not parse hex number"); - ret |= part; - } -+ - return ret; - } - -@@ -352,7 +356,7 @@ - { - int t; - char offset_p[17]; -- int64_t offset; -+ HOST_WIDEST_INT offset; - t = fscanf (resolution, "@0x%16s", offset_p); - if (t != 1) - internal_error ("could not parse file offset"); -Index: gcc/lto/lto.h -=================================================================== ---- a/src/gcc/lto/lto.h (revision -+++ b/src/gcc/lto/lto.h (revision -@@ -60,6 +60,4 @@ - size_t len; - }; - --int64_t lto_parse_hex (const char *p); -- - #endif /* LTO_H */ -Index: gcc/lto/ChangeLog -=================================================================== ---- a/src/gcc/lto/ChangeLog (revision -+++ b/src/gcc/lto/ChangeLog (revision -@@ -1,3 +1,10 @@ -+2011-12-13 Eric Botcazou <ebotcazou@adacore.com> -+ -+ * lto.h (lto_parse_hex): Delete. -+ * lto.c (lto_read_decls): Use 'int' for offsets. -+ (lto_parse_hex): Make static and return proper 64-bit host type. -+ (lto_resolution_read): Use proper 64-bit host type. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: gcc/ipa-prop.c -=================================================================== ---- a/src/gcc/ipa-prop.c (revision -+++ b/src/gcc/ipa-prop.c (revision -@@ -2868,9 +2868,9 @@ - { - const struct lto_function_header *header = - (const struct lto_function_header *) data; -- const int32_t cfg_offset = sizeof (struct lto_function_header); -- const int32_t main_offset = cfg_offset + header->cfg_size; -- const int32_t string_offset = main_offset + header->main_size; -+ const int cfg_offset = sizeof (struct lto_function_header); -+ const int main_offset = cfg_offset + header->cfg_size; -+ const int string_offset = main_offset + header->main_size; - struct data_in *data_in; - struct lto_input_block ib_main; - unsigned int i; -Index: gcc/tree-ssa-forwprop.c -=================================================================== ---- a/src/gcc/tree-ssa-forwprop.c (revision -+++ b/src/gcc/tree-ssa-forwprop.c (revision -@@ -872,7 +872,7 @@ - TREE_TYPE (gimple_assign_rhs1 (use_stmt)))) - { - tree *def_rhs_basep = &TREE_OPERAND (def_rhs, 0); -- tree new_offset, new_base, saved; -+ tree new_offset, new_base, saved, new_lhs; - while (handled_component_p (*def_rhs_basep)) - def_rhs_basep = &TREE_OPERAND (*def_rhs_basep, 0); - saved = *def_rhs_basep; -@@ -891,9 +891,12 @@ - *def_rhs_basep = build2 (MEM_REF, TREE_TYPE (*def_rhs_basep), - new_base, new_offset); - TREE_THIS_VOLATILE (*def_rhs_basep) = TREE_THIS_VOLATILE (lhs); -+ TREE_SIDE_EFFECTS (*def_rhs_basep) = TREE_SIDE_EFFECTS (lhs); - TREE_THIS_NOTRAP (*def_rhs_basep) = TREE_THIS_NOTRAP (lhs); -- gimple_assign_set_lhs (use_stmt, -- unshare_expr (TREE_OPERAND (def_rhs, 0))); -+ new_lhs = unshare_expr (TREE_OPERAND (def_rhs, 0)); -+ gimple_assign_set_lhs (use_stmt, new_lhs); -+ TREE_THIS_VOLATILE (new_lhs) = TREE_THIS_VOLATILE (lhs); -+ TREE_SIDE_EFFECTS (new_lhs) = TREE_SIDE_EFFECTS (lhs); - *def_rhs_basep = saved; - tidy_after_forward_propagate_addr (use_stmt); - /* Continue propagating into the RHS if this was not the -@@ -953,7 +956,7 @@ - TREE_TYPE (TREE_OPERAND (def_rhs, 0)))) - { - tree *def_rhs_basep = &TREE_OPERAND (def_rhs, 0); -- tree new_offset, new_base, saved; -+ tree new_offset, new_base, saved, new_rhs; - while (handled_component_p (*def_rhs_basep)) - def_rhs_basep = &TREE_OPERAND (*def_rhs_basep, 0); - saved = *def_rhs_basep; -@@ -972,9 +975,12 @@ - *def_rhs_basep = build2 (MEM_REF, TREE_TYPE (*def_rhs_basep), - new_base, new_offset); - TREE_THIS_VOLATILE (*def_rhs_basep) = TREE_THIS_VOLATILE (rhs); -+ TREE_SIDE_EFFECTS (*def_rhs_basep) = TREE_SIDE_EFFECTS (rhs); - TREE_THIS_NOTRAP (*def_rhs_basep) = TREE_THIS_NOTRAP (rhs); -- gimple_assign_set_rhs1 (use_stmt, -- unshare_expr (TREE_OPERAND (def_rhs, 0))); -+ new_rhs = unshare_expr (TREE_OPERAND (def_rhs, 0)); -+ gimple_assign_set_rhs1 (use_stmt, new_rhs); -+ TREE_THIS_VOLATILE (new_rhs) = TREE_THIS_VOLATILE (rhs); -+ TREE_SIDE_EFFECTS (new_rhs) = TREE_SIDE_EFFECTS (rhs); - *def_rhs_basep = saved; - fold_stmt_inplace (use_stmt); - tidy_after_forward_propagate_addr (use_stmt); -Index: gcc/varasm.c -=================================================================== ---- a/src/gcc/varasm.c (revision -+++ b/src/gcc/varasm.c (revision -@@ -6751,11 +6751,14 @@ - /* A non-decl is an entry in the constant pool. */ - if (!DECL_P (exp)) - local_p = true; -- /* Weakrefs may not bind locally, even though the weakref itself is -- always static and therefore local. -- FIXME: We can resolve this more curefuly by looking at the weakref -- alias. */ -- else if (lookup_attribute ("weakref", DECL_ATTRIBUTES (exp))) -+ /* Weakrefs may not bind locally, even though the weakref itself is always -+ static and therefore local. Similarly, the resolver for ifunc functions -+ might resolve to a non-local function. -+ FIXME: We can resolve the weakref case more curefuly by looking at the -+ weakref alias. */ -+ else if (lookup_attribute ("weakref", DECL_ATTRIBUTES (exp)) -+ || (TREE_CODE (exp) == FUNCTION_DECL -+ && lookup_attribute ("ifunc", DECL_ATTRIBUTES (exp)))) - local_p = false; - /* Static variables are always local. */ - else if (! TREE_PUBLIC (exp)) -Index: gcc/sched-deps.c -=================================================================== ---- a/src/gcc/sched-deps.c (revision -+++ b/src/gcc/sched-deps.c (revision -@@ -2687,7 +2687,11 @@ - else - sched_analyze_2 (deps, XEXP (link, 0), insn); - } -- if (find_reg_note (insn, REG_SETJMP, NULL)) -+ /* Don't schedule anything after a tail call, tail call needs -+ to use at least all call-saved registers. */ -+ if (SIBLING_CALL_P (insn)) -+ reg_pending_barrier = TRUE_BARRIER; -+ else if (find_reg_note (insn, REG_SETJMP, NULL)) - reg_pending_barrier = MOVE_BARRIER; - } - -Index: gcc/lto-opts.c -=================================================================== ---- a/src/gcc/lto-opts.c (revision -+++ b/src/gcc/lto-opts.c (revision -@@ -358,7 +358,7 @@ - size_t len, l, skip; - const char *data, *p; - const struct lto_simple_header *header; -- int32_t opts_offset; -+ int opts_offset; - struct lto_input_block ib; - - data = lto_get_section_data (file_data, LTO_section_opts, NULL, &len); -@@ -379,10 +379,10 @@ - - lto_check_version (header->lto_header.major_version, - header->lto_header.minor_version); -- -+ - LTO_INIT_INPUT_BLOCK (ib, p + opts_offset, 0, header->main_size); - input_options (&ib); -- -+ - skip = header->main_size + opts_offset; - l -= skip; - p += skip; -Index: gcc/config/i386/i386.md -=================================================================== ---- a/src/gcc/config/i386/i386.md (revision -+++ b/src/gcc/config/i386/i386.md (revision -@@ -1960,7 +1960,7 @@ - - (define_insn "*movdi_internal_rex64" - [(set (match_operand:DI 0 "nonimmediate_operand" -- "=r,r ,r,m ,!m,*y,*y,?r ,m ,?*Ym,?*y,*x,*x,?r ,m,?*Yi,*x,?*x,?*Ym") -+ "=r,r ,r,m ,!o,*y,*y,?r ,m ,?*Ym,?*y,*x,*x,?r ,m,?*Yi,*x,?*x,?*Ym") - (match_operand:DI 1 "general_operand" - "Z ,rem,i,re,n ,C ,*y,*Ym,*y,r ,m ,C ,*x,*Yi,*x,r ,m ,*Ym,*x"))] - "TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1]))" -@@ -2905,7 +2905,7 @@ - - (define_insn "*movdf_internal_rex64" - [(set (match_operand:DF 0 "nonimmediate_operand" -- "=f,m,f,r ,m,!r,!m,Y2*x,Y2*x,Y2*x,m ,Yi,r ") -+ "=f,m,f,r ,m,!r,!o,Y2*x,Y2*x,Y2*x,m ,Yi,r ") - (match_operand:DF 1 "general_operand" - "fm,f,G,rm,r,F ,F ,C ,Y2*x,m ,Y2*x,r ,Yi"))] - "TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1])) -Index: gcc/config/i386/avxintrin.h -=================================================================== ---- a/src/gcc/config/i386/avxintrin.h (revision -+++ b/src/gcc/config/i386/avxintrin.h (revision -@@ -759,7 +759,7 @@ - - #ifdef __x86_64__ - extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) --_mm256_insert_epi64 (__m256i __X, int __D, int const __N) -+_mm256_insert_epi64 (__m256i __X, long long __D, int const __N) - { - __m128i __Y = _mm256_extractf128_si256 (__X, __N >> 1); - __Y = _mm_insert_epi64 (__Y, __D, __N % 2); -Index: gcc/config/avr/libgcc.S -=================================================================== ---- a/src/gcc/config/avr/libgcc.S (revision -+++ b/src/gcc/config/avr/libgcc.S (revision -@@ -582,7 +582,16 @@ - push r17 - push r28 - push r29 -+#if defined (__AVR_HAVE_8BIT_SP__) -+;; FIXME: __AVR_HAVE_8BIT_SP__ is set on device level, not on core level -+;; so this lines are dead code. To make it work, devices without -+;; SP_H must get their own multilib(s), see PR51345. - in r28,__SP_L__ -+ sub r28,r26 -+ clr r29 -+ out __SP_L__,r28 -+#else -+ in r28,__SP_L__ - in r29,__SP_H__ - sub r28,r26 - sbc r29,r27 -@@ -591,6 +600,7 @@ - out __SP_H__,r29 - out __SREG__,__tmp_reg__ - out __SP_L__,r28 -+#endif - #if defined (__AVR_HAVE_EIJMP_EICALL__) - eijmp - #else -@@ -625,6 +635,15 @@ - ldd r16,Y+4 - ldd r17,Y+3 - ldd r26,Y+2 -+#if defined (__AVR_HAVE_8BIT_SP__) -+;; FIXME: __AVR_HAVE_8BIT_SP__ is set on device level, not on core level -+;; so this lines are dead code. To make it work, devices without -+;; SP_H must get their own multilib(s). -+ ldd r29,Y+1 -+ add r28,r30 -+ out __SP_L__,r28 -+ mov r28, r26 -+#else - ldd r27,Y+1 - add r28,r30 - adc r29,__zero_reg__ -@@ -635,6 +654,7 @@ - out __SP_L__,r28 - mov_l r28, r26 - mov_h r29, r27 -+#endif - ret - .endfunc - #endif /* defined (L_epilogue) */ -Index: gcc/config/avr/avr.md -=================================================================== ---- a/src/gcc/config/avr/avr.md (revision -+++ b/src/gcc/config/avr/avr.md (revision -@@ -299,7 +299,7 @@ - [(set (match_operand:HI 0 "stack_register_operand" "=q") - (unspec_volatile:HI [(match_operand:HI 1 "register_operand" "r")] - UNSPECV_WRITE_SP_IRQ_OFF))] -- "" -+ "!AVR_HAVE_8BIT_SP" - "out __SP_H__, %B1 - out __SP_L__, %A1" - [(set_attr "length" "2") -@@ -309,7 +309,7 @@ - [(set (match_operand:HI 0 "stack_register_operand" "=q") - (unspec_volatile:HI [(match_operand:HI 1 "register_operand" "r")] - UNSPECV_WRITE_SP_IRQ_ON))] -- "" -+ "!AVR_HAVE_8BIT_SP" - "cli - out __SP_H__, %B1 - sei -Index: gcc/config/avr/avr-devices.c -=================================================================== ---- a/src/gcc/config/avr/avr-devices.c (revision -+++ b/src/gcc/config/avr/avr-devices.c (revision -@@ -70,7 +70,7 @@ - { "attiny2313a", ARCH_AVR25, "__AVR_ATtiny2313A__", 1, 0x0060, "tn2313a" }, - { "attiny24", ARCH_AVR25, "__AVR_ATtiny24__", 1, 0x0060, "tn24" }, - { "attiny24a", ARCH_AVR25, "__AVR_ATtiny24A__", 1, 0x0060, "tn24a" }, -- { "attiny4313", ARCH_AVR25, "__AVR_ATtiny4313__", 1, 0x0060, "tn4313" }, -+ { "attiny4313", ARCH_AVR25, "__AVR_ATtiny4313__", 0, 0x0060, "tn4313" }, - { "attiny44", ARCH_AVR25, "__AVR_ATtiny44__", 0, 0x0060, "tn44" }, - { "attiny44a", ARCH_AVR25, "__AVR_ATtiny44A__", 0, 0x0060, "tn44a" }, - { "attiny84", ARCH_AVR25, "__AVR_ATtiny84__", 0, 0x0060, "tn84" }, -@@ -88,7 +88,7 @@ - { "attiny87", ARCH_AVR25, "__AVR_ATtiny87__", 0, 0x0100, "tn87" }, - { "attiny48", ARCH_AVR25, "__AVR_ATtiny48__", 0, 0x0100, "tn48" }, - { "attiny88", ARCH_AVR25, "__AVR_ATtiny88__", 0, 0x0100, "tn88" }, -- { "at86rf401", ARCH_AVR25, "__AVR_AT86RF401__", 1, 0x0060, "86401" }, -+ { "at86rf401", ARCH_AVR25, "__AVR_AT86RF401__", 0, 0x0060, "86401" }, - /* Classic, > 8K, <= 64K. */ - { "avr3", ARCH_AVR3, NULL, 0, 0x0060, "43355" }, - { "at43usb355", ARCH_AVR3, "__AVR_AT43USB355__", 0, 0x0060, "43355" }, -Index: gcc/config/avr/avr.c -=================================================================== ---- a/src/gcc/config/avr/avr.c (revision -+++ b/src/gcc/config/avr/avr.c (revision -@@ -1879,9 +1879,12 @@ - } - else if (test_hard_reg_class (STACK_REG, src)) - { -- *l = 2; -- return (AS2 (in,%A0,__SP_L__) CR_TAB -- AS2 (in,%B0,__SP_H__)); -+ *l = 2; -+ return AVR_HAVE_8BIT_SP -+ ? (AS2 (in,%A0,__SP_L__) CR_TAB -+ AS1 (clr,%B0)) -+ : (AS2 (in,%A0,__SP_L__) CR_TAB -+ AS2 (in,%B0,__SP_H__)); - } - - if (AVR_HAVE_MOVW) -@@ -5173,10 +5176,10 @@ - - default_file_start (); - --/* fprintf (asm_out_file, "\t.arch %s\n", avr_mcu_name);*/ -- fputs ("__SREG__ = 0x3f\n" -- "__SP_H__ = 0x3e\n" -- "__SP_L__ = 0x3d\n", asm_out_file); -+ fputs ("__SREG__ = 0x3f\n", asm_out_file); -+ if (!AVR_HAVE_8BIT_SP) -+ fputs ("__SP_H__ = 0x3e\n", asm_out_file); -+ fputs ("__SP_L__ = 0x3d\n", asm_out_file); - - fputs ("__tmp_reg__ = 0\n" - "__zero_reg__ = 1\n", asm_out_file); -Index: gcc/config/rs6000/rs6000.c -=================================================================== ---- a/src/gcc/config/rs6000/rs6000.c (revision -+++ b/src/gcc/config/rs6000/rs6000.c (revision -@@ -2612,6 +2612,7 @@ - off. */ - rs6000_altivec_abi = 1; - TARGET_ALTIVEC_VRSAVE = 1; -+ rs6000_current_abi = ABI_DARWIN; - - if (DEFAULT_ABI == ABI_DARWIN - && TARGET_64BIT) -@@ -20645,56 +20646,52 @@ - { - int i; - rtx spe_save_area_ptr; -- -+ int save_ptr_to_sp; -+ int ool_adjust = 0; -+ - /* Determine whether we can address all of the registers that need -- to be saved with an offset from the stack pointer that fits in -+ to be saved with an offset from frame_reg_rtx that fits in - the small const field for SPE memory instructions. */ -- int spe_regs_addressable_via_sp -- = (SPE_CONST_OFFSET_OK(info->spe_gp_save_offset + sp_offset -- + (32 - info->first_gp_reg_save - 1) * reg_size) -+ int spe_regs_addressable -+ = (SPE_CONST_OFFSET_OK (info->spe_gp_save_offset + sp_offset -+ + reg_size * (32 - info->first_gp_reg_save - 1)) - && saving_GPRs_inline); - int spe_offset; -- -- if (spe_regs_addressable_via_sp) -+ -+ if (spe_regs_addressable) - { - spe_save_area_ptr = frame_reg_rtx; -+ save_ptr_to_sp = info->total_size - sp_offset; - spe_offset = info->spe_gp_save_offset + sp_offset; - } - else - { - /* Make r11 point to the start of the SPE save area. We need - to be careful here if r11 is holding the static chain. If -- it is, then temporarily save it in r0. We would use r0 as -- our base register here, but using r0 as a base register in -- loads and stores means something different from what we -- would like. */ -- int ool_adjust = (saving_GPRs_inline -- ? 0 -- : (info->first_gp_reg_save -- - (FIRST_SAVRES_REGISTER+1))*8); -- HOST_WIDE_INT offset = (info->spe_gp_save_offset -- + sp_offset - ool_adjust); -+ it is, then temporarily save it in r0. */ -+ int offset; - -+ if (!saving_GPRs_inline) -+ ool_adjust = 8 * (info->first_gp_reg_save -+ - (FIRST_SAVRES_REGISTER + 1)); -+ offset = info->spe_gp_save_offset + sp_offset - ool_adjust; -+ spe_save_area_ptr = gen_rtx_REG (Pmode, 11); -+ save_ptr_to_sp = info->total_size - sp_offset + offset; -+ spe_offset = 0; -+ - if (using_static_chain_p) - { - rtx r0 = gen_rtx_REG (Pmode, 0); - gcc_assert (info->first_gp_reg_save > 11); -- -- emit_move_insn (r0, gen_rtx_REG (Pmode, 11)); -+ -+ emit_move_insn (r0, spe_save_area_ptr); - } -- -- spe_save_area_ptr = gen_rtx_REG (Pmode, 11); -- insn = emit_insn (gen_addsi3 (spe_save_area_ptr, -- frame_reg_rtx, -- GEN_INT (offset))); -- /* We need to make sure the move to r11 gets noted for -- properly outputting unwind information. */ -- if (!saving_GPRs_inline) -- rs6000_frame_related (insn, frame_reg_rtx, offset, -- NULL_RTX, NULL_RTX); -- spe_offset = 0; -+ emit_insn (gen_addsi3 (spe_save_area_ptr, -+ frame_reg_rtx, GEN_INT (offset))); -+ if (REGNO (frame_reg_rtx) == 11) -+ sp_offset = -info->spe_gp_save_offset + ool_adjust; - } -- -+ - if (saving_GPRs_inline) - { - for (i = 0; i < 32 - info->first_gp_reg_save; i++) -@@ -20706,36 +20703,34 @@ - /* We're doing all this to ensure that the offset fits into - the immediate offset of 'evstdd'. */ - gcc_assert (SPE_CONST_OFFSET_OK (reg_size * i + spe_offset)); -- -+ - offset = GEN_INT (reg_size * i + spe_offset); - addr = gen_rtx_PLUS (Pmode, spe_save_area_ptr, offset); - mem = gen_rtx_MEM (V2SImode, addr); -- -+ - insn = emit_move_insn (mem, reg); -- -- rs6000_frame_related (insn, spe_save_area_ptr, -- info->spe_gp_save_offset -- + sp_offset + reg_size * i, -- offset, const0_rtx); -+ -+ rs6000_frame_related (insn, -+ spe_save_area_ptr, save_ptr_to_sp, -+ NULL_RTX, NULL_RTX); - } - } - else - { - rtx par; - -- par = rs6000_make_savres_rtx (info, gen_rtx_REG (Pmode, 11), -- 0, reg_mode, -+ par = rs6000_make_savres_rtx (info, spe_save_area_ptr, -+ ool_adjust, reg_mode, - /*savep=*/true, /*gpr=*/true, - /*lr=*/false); - insn = emit_insn (par); -- rs6000_frame_related (insn, frame_ptr_rtx, info->total_size, -+ rs6000_frame_related (insn, spe_save_area_ptr, save_ptr_to_sp, - NULL_RTX, NULL_RTX); - } -- -- -+ - /* Move the static chain pointer back. */ -- if (using_static_chain_p && !spe_regs_addressable_via_sp) -- emit_move_insn (gen_rtx_REG (Pmode, 11), gen_rtx_REG (Pmode, 0)); -+ if (using_static_chain_p && !spe_regs_addressable) -+ emit_move_insn (spe_save_area_ptr, gen_rtx_REG (Pmode, 0)); - } - else if (!WORLD_SAVE_P (info) && !saving_GPRs_inline) - { -@@ -20744,10 +20739,12 @@ - /* Need to adjust r11 (r12) if we saved any FPRs. */ - if (info->first_fp_reg_save != 64) - { -- rtx dest_reg = gen_rtx_REG (reg_mode, DEFAULT_ABI == ABI_AIX -- ? 12 : 11); -- rtx offset = GEN_INT (sp_offset -- + (-8 * (64-info->first_fp_reg_save))); -+ rtx dest_reg = gen_rtx_REG (Pmode, DEFAULT_ABI == ABI_AIX ? 12 : 11); -+ int save_off = 8 * (64 - info->first_fp_reg_save); -+ rtx offset = GEN_INT (sp_offset - save_off); -+ -+ if (REGNO (dest_reg) == REGNO (frame_reg_rtx)) -+ sp_offset = save_off; - emit_insn (gen_add3_insn (dest_reg, frame_reg_rtx, offset)); - } - -@@ -21623,40 +21620,39 @@ - && info->first_gp_reg_save != 32) - { - /* Determine whether we can address all of the registers that need -- to be saved with an offset from the stack pointer that fits in -- the small const field for SPE memory instructions. */ -- int spe_regs_addressable_via_sp -- = (SPE_CONST_OFFSET_OK(info->spe_gp_save_offset + sp_offset -- + (32 - info->first_gp_reg_save - 1) * reg_size) -+ to be saved with an offset from frame_reg_rtx that fits in -+ the small const field for SPE memory instructions. */ -+ int spe_regs_addressable -+ = (SPE_CONST_OFFSET_OK (info->spe_gp_save_offset + sp_offset -+ + reg_size * (32 - info->first_gp_reg_save - 1)) - && restoring_GPRs_inline); - int spe_offset; -+ int ool_adjust = 0; - -- if (spe_regs_addressable_via_sp) -+ if (spe_regs_addressable) - spe_offset = info->spe_gp_save_offset + sp_offset; - else -- { -+ { - rtx old_frame_reg_rtx = frame_reg_rtx; -- /* Make r11 point to the start of the SPE save area. We worried about -- not clobbering it when we were saving registers in the prologue. -- There's no need to worry here because the static chain is passed -- anew to every function. */ -- int ool_adjust = (restoring_GPRs_inline -- ? 0 -- : (info->first_gp_reg_save -- - (FIRST_SAVRES_REGISTER+1))*8); -+ /* Make r11 point to the start of the SPE save area. We worried about -+ not clobbering it when we were saving registers in the prologue. -+ There's no need to worry here because the static chain is passed -+ anew to every function. */ - -- if (frame_reg_rtx == sp_reg_rtx) -- frame_reg_rtx = gen_rtx_REG (Pmode, 11); -- emit_insn (gen_addsi3 (frame_reg_rtx, old_frame_reg_rtx, -+ if (!restoring_GPRs_inline) -+ ool_adjust = 8 * (info->first_gp_reg_save -+ - (FIRST_SAVRES_REGISTER + 1)); -+ frame_reg_rtx = gen_rtx_REG (Pmode, 11); -+ emit_insn (gen_addsi3 (frame_reg_rtx, old_frame_reg_rtx, - GEN_INT (info->spe_gp_save_offset - + sp_offset - - ool_adjust))); - /* Keep the invariant that frame_reg_rtx + sp_offset points - at the top of the stack frame. */ -- sp_offset = -info->spe_gp_save_offset; -+ sp_offset = -info->spe_gp_save_offset + ool_adjust; - -- spe_offset = 0; -- } -+ spe_offset = 0; -+ } - - if (restoring_GPRs_inline) - { -@@ -21696,8 +21692,8 @@ - { - rtx par; - -- par = rs6000_make_savres_rtx (info, gen_rtx_REG (Pmode, 11), -- 0, reg_mode, -+ par = rs6000_make_savres_rtx (info, frame_reg_rtx, -+ ool_adjust, reg_mode, - /*savep=*/false, /*gpr=*/true, - /*lr=*/true); - emit_jump_insn (par); -@@ -21718,12 +21714,12 @@ - sp_offset, can_use_exit); - else - { -- emit_insn (gen_add3_insn (gen_rtx_REG (Pmode, DEFAULT_ABI == ABI_AIX -- ? 12 : 11), -- frame_reg_rtx, -+ rtx src_reg = gen_rtx_REG (Pmode, DEFAULT_ABI == ABI_AIX ? 12 : 11); -+ -+ emit_insn (gen_add3_insn (src_reg, frame_reg_rtx, - GEN_INT (sp_offset - info->fp_size))); -- if (REGNO (frame_reg_rtx) == 11) -- sp_offset += info->fp_size; -+ if (REGNO (frame_reg_rtx) == REGNO (src_reg)) -+ sp_offset = info->fp_size; - } - - par = rs6000_make_savres_rtx (info, frame_reg_rtx, -Index: gcc/config/arm/arm.md -=================================================================== ---- a/src/gcc/config/arm/arm.md (revision -+++ b/src/gcc/config/arm/arm.md (revision -@@ -3272,7 +3272,7 @@ - bool need_else; - - if (which_alternative != 0 || operands[3] != const0_rtx -- || (code != PLUS && code != MINUS && code != IOR && code != XOR)) -+ || (code != PLUS && code != IOR && code != XOR)) - need_else = true; - else - need_else = false; diff --git a/debian/patches/svn-updates.diff b/debian/patches/svn-updates.diff index f0056fa..78c261d 100644 --- a/debian/patches/svn-updates.diff +++ b/debian/patches/svn-updates.diff @@ -1,4 +1,4 @@ -# DP: updates from the 4.6 branch upto 20111215 (r182348). +# DP: updates from the 4.7 branch upto 2012xxxx (r182348). last_updated() { @@ -8,9559 +8,7 @@ Thu Dec 15 00:05:16 UTC 2011 (revision 182348) EOF } -svn diff svn://gcc.gnu.org/svn/gcc/tags/gcc_4_6_2_release svn://gcc.gnu.org/svn/gcc/branches/gcc-4_6-branch \ +svn diff svn://gcc.gnu.org/svn/gcc/tags/gcc_4_7_0_release svn://gcc.gnu.org/svn/gcc/branches/gcc-4_7-branch \ | sed -r 's,^--- (\S+)\t(\S+)(.*)$,--- a/src/\1\t\2,;s,^\+\+\+ (\S+)\t(\S+)(.*)$,+++ b/src/\1\t\2,' \ | awk '/^Index:.*\.(class|texi)/ {skip=1; next} /^Index:/ { skip=0 } skip==0' -Index: configure -=================================================================== ---- a/src/configure (.../tags/gcc_4_6_2_release) -+++ b/src/configure (.../branches/gcc-4_6-branch) -@@ -6944,10 +6944,6 @@ - extra_arflags_for_target=" -X32_64" - extra_nmflags_for_target=" -B -X32_64" - ;; -- *-*-darwin[3-9]*) -- # ranlib before Darwin10 requires the -c flag to look at common symbols. -- extra_ranlibflags_for_target=" -c" -- ;; - mips*-*-pe | sh*-*-pe | *arm-wince-pe) - target_makefile_frag="config/mt-wince" - ;; -Index: libgcc/config.host -=================================================================== ---- a/src/libgcc/config.host (.../tags/gcc_4_6_2_release) -+++ b/src/libgcc/config.host (.../branches/gcc-4_6-branch) -@@ -145,15 +145,6 @@ - asm_hidden_op=.private_extern - tmake_file="t-darwin ${cpu_type}/t-darwin t-slibgcc-darwin" - ;; --*-*-freebsd[12] | *-*-freebsd[12].* | *-*-freebsd*aout*) -- # This is the place-holder for the generic a.out configuration -- # of FreeBSD. No actual configuration resides here since -- # there was only ever a bare-bones ix86 configuration for -- # a.out and it exists solely in the machine-specific section. -- # This place-holder must exist to avoid dropping into -- # the generic ELF configuration of FreeBSD (i.e. it must be -- # ordered before that section). -- ;; - *-*-freebsd*) - # This is the generic ELF configuration of FreeBSD. Later - # machine-specific sections may refine and add to this -Index: libgcc/ChangeLog -=================================================================== ---- a/src/libgcc/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/libgcc/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,8 @@ -+2011-11-23 Gerald Pfeifer <gerald@pfeifer.com> -+ -+ * config.host (*-*-freebsd[12], *-*-freebsd[12].*, -+ *-*-freebsd*aout*): Remove. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: libtool.m4 -=================================================================== ---- a/src/libtool.m4 (.../tags/gcc_4_6_2_release) -+++ b/src/libtool.m4 (.../branches/gcc-4_6-branch) -@@ -2273,7 +2273,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[[123]]*) objformat=aout ;; -+ freebsd[[23]].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -2291,7 +2291,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[[01]]* | freebsdelf3.[[01]]*) -@@ -4804,7 +4804,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - _LT_TAGVAR(archive_cmds, $1)='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - _LT_TAGVAR(hardcode_direct, $1)=yes - _LT_TAGVAR(hardcode_minus_L, $1)=yes -@@ -5751,7 +5751,7 @@ - esac - ;; - -- freebsd[[12]]*) -+ freebsd2.*) - # C++ shared libraries reported to be fairly broken before - # switch to ELF - _LT_TAGVAR(ld_shlibs, $1)=no -Index: libgomp/configure -=================================================================== ---- a/src/libgomp/configure (.../tags/gcc_4_6_2_release) -+++ b/src/libgomp/configure (.../branches/gcc-4_6-branch) -@@ -9317,7 +9317,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -10230,7 +10230,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -10248,7 +10248,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -@@ -13164,7 +13164,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds_FC='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct_FC=yes - hardcode_minus_L_FC=yes -@@ -13869,7 +13869,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -13887,7 +13887,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -Index: libgomp/ChangeLog -=================================================================== ---- a/src/libgomp/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/libgomp/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,7 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: libquadmath/configure -=================================================================== ---- a/src/libquadmath/configure (.../tags/gcc_4_6_2_release) -+++ b/src/libquadmath/configure (.../branches/gcc-4_6-branch) -@@ -8727,7 +8727,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -9643,7 +9643,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -9661,7 +9661,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -Index: libquadmath/ChangeLog -=================================================================== ---- a/src/libquadmath/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/libquadmath/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,7 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: gcc/c-family/ChangeLog -=================================================================== ---- a/src/gcc/c-family/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/c-family/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,15 @@ -+2011-11-04 Eric Botcazou <ebotcazou@adacore.com> -+ -+ PR c++/50608 -+ * c-common.c (c_fully_fold_internal) <ADDR_EXPR>: Call fold_offsetof_1. -+ (fold_offsetof_1): Make global. Remove STOP_REF argument and adjust. -+ <INDIRECT_REF>: Return the argument. -+ <ARRAY_REF>: Remove special code for negative offset. -+ Call fold_build_pointer_plus instead of size_binop. -+ (fold_offsetof): Remove STOP_REF argument and adjust. -+ * c-common.h (fold_offsetof_1): Declare. -+ (fold_offsetof): Remove STOP_REF argument. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: gcc/c-family/c-common.c -=================================================================== ---- a/src/gcc/c-family/c-common.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/c-family/c-common.c (.../branches/gcc-4_6-branch) -@@ -1236,13 +1236,7 @@ - && (op1 = get_base_address (op0)) != NULL_TREE - && TREE_CODE (op1) == INDIRECT_REF - && TREE_CONSTANT (TREE_OPERAND (op1, 0))) -- { -- tree offset = fold_offsetof (op0, op1); -- op1 -- = fold_convert_loc (loc, TREE_TYPE (expr), TREE_OPERAND (op1, 0)); -- ret = fold_build2_loc (loc, POINTER_PLUS_EXPR, TREE_TYPE (expr), op1, -- offset); -- } -+ ret = fold_convert_loc (loc, TREE_TYPE (expr), fold_offsetof_1 (op0)); - else if (op0 != orig_op0 || in_init) - ret = in_init - ? fold_build1_initializer_loc (loc, code, TREE_TYPE (expr), op0) -@@ -8459,20 +8453,15 @@ - return uc; - } - --/* Build the result of __builtin_offsetof. EXPR is a nested sequence of -- component references, with STOP_REF, or alternatively an INDIRECT_REF of -- NULL, at the bottom; much like the traditional rendering of offsetof as a -- macro. Returns the folded and properly cast result. */ -+/* Fold an offsetof-like expression. EXPR is a nested sequence of component -+ references with an INDIRECT_REF of a constant at the bottom; much like the -+ traditional rendering of offsetof as a macro. Return the folded result. */ - --static tree --fold_offsetof_1 (tree expr, tree stop_ref) -+tree -+fold_offsetof_1 (tree expr) - { -- enum tree_code code = PLUS_EXPR; - tree base, off, t; - -- if (expr == stop_ref && TREE_CODE (expr) != ERROR_MARK) -- return size_zero_node; -- - switch (TREE_CODE (expr)) - { - case ERROR_MARK: -@@ -8489,15 +8478,15 @@ - - case NOP_EXPR: - case INDIRECT_REF: -- if (!integer_zerop (TREE_OPERAND (expr, 0))) -+ if (!TREE_CONSTANT (TREE_OPERAND (expr, 0))) - { - error ("cannot apply %<offsetof%> to a non constant address"); - return error_mark_node; - } -- return size_zero_node; -+ return TREE_OPERAND (expr, 0); - - case COMPONENT_REF: -- base = fold_offsetof_1 (TREE_OPERAND (expr, 0), stop_ref); -+ base = fold_offsetof_1 (TREE_OPERAND (expr, 0)); - if (base == error_mark_node) - return base; - -@@ -8515,21 +8504,14 @@ - break; - - case ARRAY_REF: -- base = fold_offsetof_1 (TREE_OPERAND (expr, 0), stop_ref); -+ base = fold_offsetof_1 (TREE_OPERAND (expr, 0)); - if (base == error_mark_node) - return base; - - t = TREE_OPERAND (expr, 1); -- if (TREE_CODE (t) == INTEGER_CST && tree_int_cst_sgn (t) < 0) -- { -- code = MINUS_EXPR; -- t = fold_build1_loc (input_location, NEGATE_EXPR, TREE_TYPE (t), t); -- } -- t = convert (sizetype, t); -- off = size_binop (MULT_EXPR, TYPE_SIZE_UNIT (TREE_TYPE (expr)), t); - - /* Check if the offset goes beyond the upper bound of the array. */ -- if (code == PLUS_EXPR && TREE_CODE (t) == INTEGER_CST) -+ if (TREE_CODE (t) == INTEGER_CST && tree_int_cst_sgn (t) >= 0) - { - tree upbound = array_ref_up_bound (expr); - if (upbound != NULL_TREE -@@ -8569,26 +8551,30 @@ - } - } - } -+ -+ t = convert (sizetype, t); -+ off = size_binop (MULT_EXPR, TYPE_SIZE_UNIT (TREE_TYPE (expr)), t); - break; - - case COMPOUND_EXPR: - /* Handle static members of volatile structs. */ - t = TREE_OPERAND (expr, 1); - gcc_assert (TREE_CODE (t) == VAR_DECL); -- return fold_offsetof_1 (t, stop_ref); -+ return fold_offsetof_1 (t); - - default: - gcc_unreachable (); - } - -- return size_binop (code, base, off); -+ return fold_build2 (POINTER_PLUS_EXPR, TREE_TYPE (base), base, off); - } - -+/* Likewise, but convert it to the return type of offsetof. */ -+ - tree --fold_offsetof (tree expr, tree stop_ref) -+fold_offsetof (tree expr) - { -- /* Convert back from the internal sizetype to size_t. */ -- return convert (size_type_node, fold_offsetof_1 (expr, stop_ref)); -+ return convert (size_type_node, fold_offsetof_1 (expr)); - } - - /* Warn for A ?: C expressions (with B omitted) where A is a boolean -Index: gcc/c-family/c-common.h -=================================================================== ---- a/src/gcc/c-family/c-common.h (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/c-family/c-common.h (.../branches/gcc-4_6-branch) -@@ -916,7 +916,8 @@ - - extern void verify_sequence_points (tree); - --extern tree fold_offsetof (tree, tree); -+extern tree fold_offsetof_1 (tree); -+extern tree fold_offsetof (tree); - - /* Places where an lvalue, or modifiable lvalue, may be required. - Used to select diagnostic messages in lvalue_error and -Index: gcc/DATESTAMP -=================================================================== ---- a/src/gcc/DATESTAMP (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/DATESTAMP (.../branches/gcc-4_6-branch) -@@ -1 +1 @@ --20111026 -+20111214 -Index: gcc/configure -=================================================================== ---- a/src/gcc/configure (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/configure (.../branches/gcc-4_6-branch) -@@ -7442,17 +7442,7 @@ - RANLIB="$ac_cv_prog_RANLIB" - fi - --case "${host}" in --*-*-darwin*) -- # By default, the Darwin ranlib will not treat common symbols as -- # definitions when building the archive table of contents. Other -- # ranlibs do that; pass an option to the Darwin ranlib that makes -- # it behave similarly. -- ranlib_flags="-c" -- ;; --*) -- ranlib_flags="" --esac -+ranlib_flags="" - - - # Find a good install program. We prefer a C program (faster), -@@ -15740,7 +15730,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -16653,7 +16643,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -16671,7 +16661,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -@@ -17505,7 +17495,7 @@ - lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 - lt_status=$lt_dlunknown - cat > conftest.$ac_ext <<_LT_EOF --#line 17508 "configure" -+#line 17498 "configure" - #include "confdefs.h" - - #if HAVE_DLFCN_H -@@ -17611,7 +17601,7 @@ - lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 - lt_status=$lt_dlunknown - cat > conftest.$ac_ext <<_LT_EOF --#line 17614 "configure" -+#line 17604 "configure" - #include "confdefs.h" - - #if HAVE_DLFCN_H -@@ -18537,7 +18527,7 @@ - esac - ;; - -- freebsd[12]*) -+ freebsd2.*) - # C++ shared libraries reported to be fairly broken before - # switch to ELF - ld_shlibs_CXX=no -@@ -20312,7 +20302,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -20330,7 +20320,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -Index: gcc/objc/objc-next-runtime-abi-01.c -=================================================================== ---- a/src/gcc/objc/objc-next-runtime-abi-01.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/objc/objc-next-runtime-abi-01.c (.../branches/gcc-4_6-branch) -@@ -2871,12 +2871,15 @@ - return eh_id; - } - -+/* For NeXT ABI 0 and 1, the personality routines are just those of the -+ underlying language. */ -+ - static tree - objc_eh_personality (void) - { - if (!objc_eh_personality_decl) - #ifndef OBJCPLUS -- objc_eh_personality_decl = build_personality_function ("objc"); -+ objc_eh_personality_decl = build_personality_function ("gcc"); - #else - objc_eh_personality_decl = build_personality_function ("gxx"); - #endif -Index: gcc/objc/objc-act.c -=================================================================== ---- a/src/gcc/objc/objc-act.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/objc/objc-act.c (.../branches/gcc-4_6-branch) -@@ -3136,9 +3136,8 @@ - struct string_descriptor *desc, key; - void **loc; - -- /* Prep the string argument. */ -- string = fix_string_type (string); -- TREE_SET_CODE (string, STRING_CST); -+ /* We should be passed a STRING_CST. */ -+ gcc_checking_assert (TREE_CODE (string) == STRING_CST); - length = TREE_STRING_LENGTH (string) - 1; - - /* The target may have different ideas on how to construct an ObjC string -Index: gcc/objc/ChangeLog -=================================================================== ---- a/src/gcc/objc/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/objc/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,18 @@ -+2011-11-12 Iain Sandoe <iains@gcc.gnu.org> -+ -+ Backport from mainline -+ 2011-10-29 Iain Sandoe <iains@gcc.gnu.org> -+ -+ PR target/47997 -+ * objc-act.c (objc_build_string_object): Remove redundant second -+ call to fix_string_type (). Add a checking assert that we are, -+ indeed, passed a STRING_CST. -+ -+2011-11-12 Iain Sandoe <iains@gcc.gnu.org> -+ -+ * objc-next-runtime-abi-01.c (objc_eh_personality): Use gcc personality -+ for Objective-C m32. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: gcc/reorg.c -=================================================================== ---- a/src/gcc/reorg.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/reorg.c (.../branches/gcc-4_6-branch) -@@ -3554,9 +3554,11 @@ - } - } - -+ /* See if we have a simple (conditional) jump that is useless. */ - if (! INSN_ANNULLED_BRANCH_P (delay_insn) -+ && ! condjump_in_parallel_p (delay_insn) - && prev_active_insn (target_label) == insn -- && ! condjump_in_parallel_p (delay_insn) -+ && ! BARRIER_P (prev_nonnote_insn (target_label)) - #ifdef HAVE_cc0 - /* If the last insn in the delay slot sets CC0 for some insn, - various code assumes that it is in a delay slot. We could -Index: gcc/ChangeLog -=================================================================== ---- a/src/gcc/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,343 @@ -+2011-12-13 Eric Botcazou <ebotcazou@adacore.com> -+ -+ * lto-streamer-out.c (write_symbol): Use proper 64-bit host type. -+ * lto-cgraph.c (input_cgraph_opt_section): Use 'int' for offsets. -+ * lto-streamer-in.c (lto_read_body): Likewise. -+ (lto_input_toplevel_asms): Likewise. -+ * lto-section-in.c (lto_create_simple_input_block): Likewise. -+ * lto-opts.c (lto_read_file_options): Likewise. -+ * ipa-prop.c (ipa_prop_read_section): Likewise. -+ -+ * df.h (DF_NOTE): Fix typo in comment. -+ -+2011-12-13 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> -+ -+ * regmove.c (fixup_match_2): Only access call_used_regs with hard -+ regs. -+ -+2011-12-12 Jakub Jelinek <jakub@redhat.com> -+ -+ PR middle-end/51510 -+ * calls.c (internal_arg_pointer_based_exp_scan): Don't use -+ VEC_safe_grow_cleared if idx is smaller than VEC_length. -+ -+ Backported from mainline -+ 2011-12-11 Jakub Jelinek <jakub@redhat.com> -+ -+ PR tree-optimization/51485 -+ * tree-vect-data-refs.c (vect_analyze_data_refs): Give up on -+ DRs in call stmts. -+ -+2011-12-12 Eric Botcazou <ebotcazou@adacore.com> -+ -+ PR tree-optimization/50569 -+ * tree-sra.c (build_ref_for_model): Replicate a chain of COMPONENT_REFs -+ in the expression of MODEL instead of just the last one. -+ -+2011-12-09 Michael Meissner <meissner@the-meissners.org> -+ -+ Backport from mainline -+ 2011-12-09 Michael Meissner <meissner@the-meissners.org> -+ -+ PR rtl-optimization/51469 -+ * varasm.c (default_binds_local_p_1): If the symbol is a gnu -+ indirect function, mark the symbol as non-local. -+ -+2011-12-09 Jakub Jelinek <jakub@redhat.com> -+ -+ Backport from mainline -+ 2011-12-08 Jakub Jelinek <jakub@redhat.com> -+ -+ PR tree-optimization/51466 -+ * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Also copy -+ TREE_SIDE_EFFECTS. -+ -+ 2011-11-28 Jakub Jelinek <jakub@redhat.com> -+ -+ PR tree-optimization/50078 -+ * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Copy over -+ TREE_THIS_VOLATILE also from the old to new lhs resp. rhs. -+ -+2011-12-09 Kazu Hirata <kazu@codesourcery.com> -+ -+ Backport from mainline: -+ -+ 2011-12-05 Kazu Hirata <kazu@codesourcery.com> -+ -+ PR target/51408 -+ * config/arm/arm.md (*minmax_arithsi): Always require the else -+ clause in the MINUS case. -+ -+2011-12-08 Teresa Johnson <tejohnson@google.com> -+ -+ Backport from mainline: -+ -+ 2011-08-05 Uros Bizjak <ubizjak@gmail.com> -+ -+ * config/i386/i386.md (*movdi_internal_rex64): Use "!o" constraint -+ instead of "!m" for operand 0, alternative 4. -+ (*movdf_internal_rex64): Ditto for operand 0, alernative 6. -+ -+2011-12-08 Jakub Jelinek <jakub@redhat.com> -+ -+ Backport from mainline -+ 2011-12-05 Jakub Jelinek <jakub@redhat.com> -+ -+ PR debug/51410 -+ * c-decl.c (pop_scope): Don't add DECL_EXTERNAL decls -+ for debug info if scope is file_scope. -+ -+ PR c/51339 -+ * c-decl.c (c_finish_incomplete_decl, finish_decl): Call -+ relayout_decl instead of layout_decl. -+ -+ 2011-12-05 Jakub Jelinek <jakub@redhat.com> -+ Eric Botcazou <ebotcazou@adacore.com> -+ -+ PR middle-end/51323 -+ PR middle-end/50074 -+ * calls.c (internal_arg_pointer_exp_state): New variable. -+ (internal_arg_pointer_based_exp_1, -+ internal_arg_pointer_exp_scan): New functions. -+ (internal_arg_pointer_based_exp): New function. -+ (mem_overlaps_already_clobbered_arg_p): Use it. -+ (expand_call): Free internal_arg_pointer_exp_state.cache vector -+ and clear internal_arg_pointer_exp_state.scan_start. -+ -+ 2011-11-30 Jakub Jelinek <jakub@redhat.com> -+ -+ PR rtl-optimization/48721 -+ * sched-deps.c (sched_analyze_insn): For SIBLING_CALL_P set -+ reg_pending_barrier to TRUE_BARRIER. -+ -+ 2011-11-26 Joern Rennecke <joern.rennecke@embecosm.com> -+ -+ PR middle-end/50074 -+ * calls.c (mem_overlaps_already_clobbered_arg_p): -+ Return false if no outgoing arguments have been stored so far. -+ -+2011-12-08 Eric Botcazou <ebotcazou@adacore.com> -+ -+ PR tree-optimization/51315 -+ * tree-sra.c (tree_non_mode_aligned_mem_p): Rename to... -+ (tree_non_aligned_mem_p): ...this. Add ALIGN parameter. Look into -+ MEM_REFs and use get_object_or_type_alignment for them. -+ (build_accesses_from_assign): Adjust for above change. -+ (access_precludes_ipa_sra_p): Likewise. -+ -+2011-12-06 Martin Jambor <mjambor@suse.cz> -+ -+ Backport from mainline: -+ -+ 2011-12-02 Martin Jambor <mjambor@suse.cz> -+ -+ PR tree-optimization/50622 -+ * tree-sra.c (load_assign_lhs_subreplacements): Force gimple operand -+ if both lacc and racc are grp_partial_lhs. -+ -+2011-12-06 Iain Sandoe <iains@gcc.gnu.org> -+ -+ * config/rs6000/rs6000.c (darwin_rs6000_override_options): Initialize -+ rs6000_current_abi. -+ -+2011-12-06 Alan Modra <amodra@gmail.com> -+ -+ PR target/50906 -+ * config/rs6000/rs6000.c (rs6000_emit_prologue <TARGET_SPE_ABI>): -+ Do not mark r11 setup as frame-related. Pass correct offset to -+ rs6000_emit_savres_rtx. Correct out-of-line rs6000_frame_related -+ arguments. Correct sp_offset. Remove "offset" fudge from -+ in-line rs6000_frame_related call. Rename misleading variable. -+ Fix comments and whitespace. Tidy some expressions. -+ (rs6000_emit_epilogue <TARGET_SPE_ABI>): Always set frame_reg_rtx -+ to r11 in out-of-line case. Correct sp_offset. Pass correct -+ offset to rs6000_emit_savres_rtx. Rename misleading variable. -+ Fix comments and whitespace. Tidy some expressions. -+ (rs6000_emit_epilogue <non-TARGET_SPE_ABI>): Add sp_offset -+ adjustment when !saving_GPRs_inline. Correct register mode -+ used in address calcs. -+ (rs6000_emit_epilogue <non-TARGET_SPE_ABI>): Similarly when -+ !restoring_GPRs_inline. -+ -+2011-12-04 Jérémie Detrey <Jeremie.Detrey@loria.fr> -+ -+ PR target/51393 -+ * config/i386/avxintrin.h (_mm256_insert_epi64): Declare second -+ parameter as long long. -+ -+2011-12-02 Georg-Johann Lay <avr@gjlay.de> -+ -+ PR target/51002 -+ PR target/51345 -+ * config/avr/libgcc.S (__prologue_saves__, __epilogue_restores__): -+ Enclose parts using __SP_H__ in !defined (__AVR_HAVE_8BIT_SP__). -+ Add FIXME comments. -+ * config/avr/avr.md (movhi_sp_r_irq_off, movhi_sp_r_irq_on): Set -+ insn condition to !AVR_HAVE_8BIT_SP. -+ * config/avr/avr.c (output_movhi): "clr%B0" instead of "in -+ %B0,__SP_H__" if AVR_HAVE_8BIT_SP. -+ (avr_file_start): Only print "__SP_H__ = 0x3e" if !AVR_HAVE_8BIT_SP. -+ * config/avr/avr-devices.c (avr_mcu_types): ATtiny4313 and -+ AT86RF401 have a 16-bit SP (their manual is bogus). -+ -+2011-11-25 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ Backport from mainline: -+ -+ 2011-03-29 Richard Sandiford <richard.sandiford@linaro.org> -+ -+ PR debug/48190 -+ * dwarf2out.c (dw_loc_list_node): Add resolved_addr and replaced. -+ (cached_dw_loc_list_def): New structure. -+ (cached_dw_loc_list): New typedef. -+ (cached_dw_loc_list_table): New variable. -+ (cached_dw_loc_list_table_hash): New function. -+ (cached_dw_loc_list_table_eq): Likewise. -+ (add_location_or_const_value_attribute): Take a bool cache_p. -+ Cache the list when the parameter is true. -+ (gen_formal_parameter_die): Update caller. -+ (gen_variable_die): Likewise. -+ (dwarf2out_finish): Likewise. -+ (dwarf2out_abstract_function): Nullify cached_dw_loc_list_table -+ while generating debug info for the decl. -+ (dwarf2out_function_decl): Clear cached_dw_loc_list_table. -+ (dwarf2out_init): Initialize cached_dw_loc_list_table. -+ (resolve_addr): Cache the result of resolving a chain of -+ location lists. -+ -+2011-11-24 Enkovich Ilya <ilya.enkovich@intel.com> -+ -+ PR target/51287 -+ * i386.c (distance_non_agu_define): Fix insn attr check. -+ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ -+2011-11-19 Eric Botcazou <ebotcazou@adacore.com> -+ -+ PR rtl-optimization/51187 -+ * reorg.c (relax_delay_slots): Do not consider a jump useless if there -+ is a barrier between the jump and its target label. -+ -+2011-11-19 Richard Earnshaw <rearnsha@arm.com> -+ -+ PR target/50493 -+ * config/arm/arm.c (neon_disambiguate_copy): Correctly handle partial -+ overlap of src and dest operands. -+ -+2011-11-18 Iain Sandoe <iains@gcc.gnu.org> -+ -+ PR target/49992 -+ * configure.ac: Remove ranlib special-casing for Darwin. -+ * configure: Regenerate. -+ -+2011-11-16 Richard Earnshaw <rearnsha@arm.com> -+ Bernd Schmidt <bernds@coudesourcery.com> -+ Sebastian Huber <sebastian.huber@embedded-brains.de> -+ -+ PR target/49641 -+ * config/arm/arm.c (store_multiple_sequence): Avoid cases where -+ the base reg is stored iff compiling for Thumb1. -+ -+2011-11-13 Iain Sandoe <iains@gcc.gnu.org> -+ -+ PR target/48108 -+ Backport from mainline r180523 -+ * config/darwin.c (top level): Amend comments concerning LTO output. -+ (lto_section_num): New variable. (darwin_lto_section_e): New GTY. -+ (LTO_SECTS_SECTION, LTO_INDEX_SECTION): New. -+ (LTO_NAMES_SECTION): Rename. -+ (darwin_asm_named_section): Record LTO section counts and switches -+ in a vec of darwin_lto_section_e. -+ (darwin_file_start): Remove unused code. -+ (darwin_file_end): Put an LTO section termination label. Handle -+ output of the wrapped LTO sections, index and names table. -+ -+2011-11-12 Iain Sandoe <iains@gcc.gnu.org> -+ -+ PR target/45233 -+ * config/rs6000/rs6000.c (rs6000_legitimize_reload_address): -+ Only expand a symbol ref. into an access when the entity is defined -+ in the TU. -+ -+2011-11-10 Jakub Jelinek <jakub@redhat.com> -+ -+ PR middle-end/51077 -+ * tree-object-size.c (addr_object_size): Check TREE_CODE of -+ MEM_REF's operand rather than code of the MEM_REF itself. -+ -+2011-11-07 Alan Modra <amodra@gmail.com> -+ -+ PR target/30282 -+ * config/rs6000/rs6000.c (rs6000_emit_stack_reset): Always emit -+ blockage for ABI_V4. -+ -+2011-11-04 Eric Botcazou <ebotcazou@adacore.com> -+ -+ PR c++/50608 -+ * c-parser.c (c_parser_postfix_expression) <RID_OFFSETOF>: Adjust call -+ to fold_offsetof. -+ * c-typeck.c (build_unary_op) <ADDR_EXPR>: Call fold_offsetof_1. -+ -+2011-11-04 Eric Botcazou <ebotcazou@adacore.com> -+ -+ PR target/50979 -+ * config/sparc/sparc.h (ASM_CPU_SPEC): Pass -Av8 if -mcpu=v8. -+ -+2011-11-03 Uros Bizjak <ubizjak@gmail.com> -+ -+ * config/i386/i386.md (lround<X87MODEF:mode><SWI248x:mode>2, -+ rint<mode>2, floor<mode>2, lfloor<MODEF:mode><SWI48:mode>2, -+ btrunc<mode>2, lwp_lwpval<mode>3): Use operands[N] instead of operandN. -+ -+2011-11-02 Eric Botcazou <ebotcazou@adacore.com> -+ -+ PR target/50945 -+ * config/sparc/sparc.md (movsf_insn): Reindent constraints. -+ (movsf_insn_no_fpu): Likewise. -+ (movdf_insn_sp32): Likewise. -+ (movdf_insn_sp32_no_fpu): Likewise. -+ (movdf_insn_sp32_v9): Likewise. Remove redundant GY constraint. -+ (movdf_insn_sp32_v9_no_fpu): Likewise. -+ (movdf_insn_sp64): Likewise. -+ (movdf_insn_sp64_no_fpu): Likewise. -+ (movtf_insn_sp32): Likewise. -+ (movtf_insn_sp32_no_fpu): Likewise. -+ (movtf_insn_sp64): Likewise. -+ (movtf_insn_sp64_hq): Likewise. -+ (movtf_insn_sp64_no_fpu): Likewise. -+ -+2011-11-02 Bernd Schmidt <bernds@codesourcery.com> -+ -+ * cfgcleanup.c (try_head_merge_bb): If get_condition returns -+ NULL for a jump that is a cc0 insn, pick the previous insn for -+ move_before. -+ -+2011-11-01 Uros Bizjak <ubizjak@gmail.com> -+ -+ * config/i386/i386.md (splitters for int-float conversion): Use -+ SUBREG_REG on SUBREGs in splitter constraints. -+ -+2011-11-01 Julian Brown <julian@codesourcery.com> -+ -+ PR rtl-optimization/47918 -+ * reload1.c (set_initial_label_offsets): Use initial offsets -+ for labels on the nonlocal_goto_handler_labels chain. -+ -+2011-10-29 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> -+ -+ PR target/50691 -+ * config/pa/pa.c (emit_move_sequence): Legitimize TLS symbol references. -+ * config/pa/pa.h (LEGITIMATE_CONSTANT_P): Return false for -+ TLS_MODEL_GLOBAL_DYNAMIC and TLS_MODEL_LOCAL_DYNAMIC symbol references. -+ -+2011-10-27 Uros Bizjak <ubizjak@gmail.com> -+ -+ PR target/50875 -+ * config/i386/sse.md (*avx_unpcklpd256): Remove extra insn -+ constraints. Change alternative 1 to "x,m,1". -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -@@ -144,8 +489,8 @@ - - 2011-10-07 Bernd Schmidt <bernds@codesourcery.com> - -- PR target/49049 -- * config/arm/arm.md (arm_subsi3_insn): Lose the last alternative. -+ PR target/49049 -+ * config/arm/arm.md (arm_subsi3_insn): Lose the last alternative. - - 2011-10-06 Jakub Jelinek <jakub@redhat.com> - -@@ -252,7 +597,7 @@ - * config/rs6000/rs6000.md (probe_stack): Use explicit operand. - * config/rs6000/rs6000.c (output_probe_stack_range): Likewise. - --2011-09-14 Diego Novillo <dnovillo@google.com> -+2011-09-14 Diego Novillo <dnovillo@google.com> - - * tree-vect-stmts.c (vect_transform_stmt): Remove unused - local variable ORIG_SCALAR_STMT. -Index: gcc/testsuite/gcc.target/arm/pr49641.c -=================================================================== ---- a/src/gcc/testsuite/gcc.target/arm/pr49641.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gcc.target/arm/pr49641.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,18 @@ -+/* { dg-do compile } */ -+/* { dg-options "-mthumb -O2" } */ -+/* { dg-require-effective-target arm_thumb1_ok } */ -+/* { dg-final { scan-assembler-not "stmia\[\\t \]*r3!\[^\\n]*r3" } } */ -+typedef struct { -+ void *t1, *t2, *t3; -+} z; -+extern volatile int y; -+static inline void foo(z *x) { -+ x->t1 = &x->t2; -+ x->t2 = ((void *)0); -+ x->t3 = &x->t1; -+} -+extern z v; -+void bar (void) { -+ y = 0; -+ foo(&v); -+} -Index: gcc/testsuite/gcc.target/i386/pr51393.c -=================================================================== ---- a/src/gcc/testsuite/gcc.target/i386/pr51393.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gcc.target/i386/pr51393.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,22 @@ -+/* { dg-do run } */ -+/* { dg-require-effective-target avx } */ -+/* { dg-require-effective-target lp64 } */ -+/* { dg-options "-O -mavx" } */ -+ -+#include "avx-check.h" -+#include <immintrin.h> -+ -+static void -+__attribute__((noinline)) -+avx_test (void) -+{ -+ long long in = 0x800000000ll; -+ long long out; -+ -+ __m256i zero = _mm256_setzero_si256(); -+ __m256i tmp = _mm256_insert_epi64 (zero, in, 0); -+ out = _mm256_extract_epi64(tmp, 0); -+ -+ if (in != out) -+ abort (); -+} -Index: gcc/testsuite/gcc.target/i386/pr48721.c -=================================================================== ---- a/src/gcc/testsuite/gcc.target/i386/pr48721.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gcc.target/i386/pr48721.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,51 @@ -+/* PR rtl-optimization/48721 */ -+/* { dg-do compile } */ -+/* { dg-options "-O -foptimize-sibling-calls -fsched2-use-superblocks -fschedule-insns2 -mtune=core2" } */ -+ -+extern unsigned char a[]; -+extern int b[], d[], e[], f[], g[], *h[], m[], *n[], o[]; -+extern char c[]; -+ -+struct S -+{ -+ unsigned char s1; -+ int s2, s3, s4, s5, s6, s7, s8; -+}; -+ -+__attribute__((noinline, noclone)) int -+foo (int x) -+{ -+ return 0; -+} -+ -+int -+bar (int x, struct S *y) -+{ -+ int z; -+ switch (x) -+ { -+ case 1: -+ case 2: -+ { -+ int t2, t4, t5, t6, t7, t8; -+ z = o[y->s8 * 6]; -+ t8 = *n[m[x] * 5]; -+ t4 = *h[y->s7]; -+ t7 = z; -+ z = g[f[x] + y->s6]; -+ t6 = e[y->s5]; -+ t5 = d[c[x] + y->s3 * 17]; -+ if (z) -+ t2 = b[z]; -+ if (a[z] != y->s1) -+ return foo (x); -+ y->s8 = t8; -+ y->s4 = t4; -+ y->s7 = t7; -+ y->s6 = t6; -+ y->s5 = t5; -+ y->s2 = t2; -+ } -+ } -+ return 0; -+} -Index: gcc/testsuite/gcc.target/i386/movdi-rex64.c -=================================================================== ---- a/src/gcc/testsuite/gcc.target/i386/movdi-rex64.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gcc.target/i386/movdi-rex64.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,11 @@ -+/* { dg-do compile { target *-*-linux* } } */ -+/* { dg-options "-fPIE" } */ -+ -+char *strcpy (char *dest, const char *src); -+ -+static __thread char buffer[25]; -+const char * error_message (void) -+{ -+ strcpy (buffer, "Unknown code "); -+ return 0; -+} -Index: gcc/testsuite/gfortran.dg/whole_file_35.f90 -=================================================================== ---- a/src/gcc/testsuite/gfortran.dg/whole_file_35.f90 (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gfortran.dg/whole_file_35.f90 (.../branches/gcc-4_6-branch) -@@ -0,0 +1,28 @@ -+! { dg-do compile } -+! -+! PR fortran/50408 -+! -+! Contributed by Vittorio Zecca -+! -+ module m -+ type int -+ integer :: val -+ end type int -+ interface ichar -+ module procedure uch -+ end interface -+ contains -+ function uch (c) -+ character (len=1), intent (in) :: c -+ type (int) :: uch -+ intrinsic ichar -+ uch%val = 127 - ichar (c) -+ end function uch -+ end module m -+ -+ program p -+ use m -+ print *,ichar('~') ! must print "1" -+ end program p -+ -+! { dg-final { cleanup-modules "m" } } -Index: gcc/testsuite/gfortran.dg/move_alloc_8.f90 -=================================================================== ---- a/src/gcc/testsuite/gfortran.dg/move_alloc_8.f90 (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gfortran.dg/move_alloc_8.f90 (.../branches/gcc-4_6-branch) -@@ -0,0 +1,106 @@ -+! { dg-do compile } -+! -+! PR fortran/50684 -+! -+! Module "bug" contributed by Martin Steghöfer. -+! -+ -+MODULE BUG -+ TYPE MY_TYPE -+ INTEGER, ALLOCATABLE :: VALUE -+ END TYPE -+CONTAINS -+ SUBROUTINE POINTER_INTENT_IN_BUG_WORKING(POINTER_INTENT_IN_VARIABLE) -+ TYPE(MY_TYPE), POINTER, INTENT(IN) :: POINTER_INTENT_IN_VARIABLE -+ TYPE(MY_TYPE), POINTER :: POINTER_VARIABLE_LOCAL -+ INTEGER, ALLOCATABLE :: LOCAL_VALUE -+ -+ POINTER_VARIABLE_LOCAL=>POINTER_INTENT_IN_VARIABLE -+ CALL MOVE_ALLOC(POINTER_VARIABLE_LOCAL%VALUE, LOCAL_VALUE) -+ -+ RETURN -+ END SUBROUTINE POINTER_INTENT_IN_BUG_WORKING -+ -+ SUBROUTINE POINTER_INTENT_IN_BUG_FAILING(POINTER_INTENT_IN_VARIABLE) -+ TYPE(MY_TYPE), POINTER, INTENT(IN) :: POINTER_INTENT_IN_VARIABLE -+ INTEGER, ALLOCATABLE :: LOCAL_VALUE -+ -+ CALL MOVE_ALLOC(POINTER_INTENT_IN_VARIABLE%VALUE, LOCAL_VALUE) -+ -+ RETURN -+ END SUBROUTINE POINTER_INTENT_IN_BUG_FAILING -+end module bug -+ -+subroutine test1() -+ TYPE MY_TYPE -+ INTEGER, ALLOCATABLE :: VALUE -+ END TYPE -+CONTAINS -+ SUBROUTINE sub (dt) -+ type(MY_TYPE), intent(in) :: dt -+ INTEGER, ALLOCATABLE :: lv -+ call move_alloc(dt%VALUE, lv) ! { dg-error "cannot be INTENT.IN." } -+ END SUBROUTINE -+end subroutine test1 -+ -+subroutine test2 (x, px) -+ implicit none -+ type t -+ integer, allocatable :: a -+ end type t -+ -+ type t2 -+ type(t), pointer :: ptr -+ integer, allocatable :: a -+ end type t2 -+ -+ type(t2), intent(in) :: x -+ type(t2), pointer, intent(in) :: px -+ -+ integer, allocatable :: a -+ type(t2), pointer :: ta -+ -+ call move_alloc (px, ta) ! { dg-error "cannot be INTENT.IN." } -+ call move_alloc (x%a, a) ! { dg-error "cannot be INTENT.IN." } -+ call move_alloc (x%ptr%a, a) ! OK (3) -+ call move_alloc (px%a, a) ! OK (4) -+ call move_alloc (px%ptr%a, a) ! OK (5) -+end subroutine test2 -+ -+subroutine test3 (x, px) -+ implicit none -+ type t -+ integer, allocatable :: a -+ end type t -+ -+ type t2 -+ class(t), pointer :: ptr -+ integer, allocatable :: a -+ end type t2 -+ -+ type(t2), intent(in) :: x -+ class(t2), pointer, intent(in) :: px -+ -+ integer, allocatable :: a -+ class(t2), pointer :: ta -+ -+ call move_alloc (px, ta) ! { dg-error "cannot be INTENT.IN." } -+ call move_alloc (x%a, a) ! { dg-error "cannot be INTENT.IN." } -+ call move_alloc (x%ptr%a, a) ! OK (6) -+ call move_alloc (px%a, a) ! OK (7) -+ call move_alloc (px%ptr%a, a) ! OK (8) -+end subroutine test3 -+ -+subroutine test4() -+ TYPE MY_TYPE -+ INTEGER, ALLOCATABLE :: VALUE -+ END TYPE -+CONTAINS -+ SUBROUTINE sub (dt) -+ CLASS(MY_TYPE), intent(in) :: dt -+ INTEGER, ALLOCATABLE :: lv -+ call move_alloc(dt%VALUE, lv) ! { dg-error "cannot be INTENT.IN." } -+ END SUBROUTINE -+end subroutine test4 -+ -+! { dg-final { cleanup-modules "bug" } } -Index: gcc/testsuite/gfortran.dg/realloc_on_assign_8.f90 -=================================================================== ---- a/src/gcc/testsuite/gfortran.dg/realloc_on_assign_8.f90 (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gfortran.dg/realloc_on_assign_8.f90 (.../branches/gcc-4_6-branch) -@@ -0,0 +1,17 @@ -+! { dg-do compile } -+! -+! PR fortran/51448 -+! -+! Contribued by François Willot -+! -+ PROGRAM MAIN -+ IMPLICIT NONE -+ TYPE mytype -+ REAL b(2) -+ END TYPE mytype -+ TYPE(mytype) a -+ DOUBLE PRECISION, ALLOCATABLE :: x(:) -+ ALLOCATE(x(2)) -+ a%b=0.0E0 -+ x=a%b -+ END -Index: gcc/testsuite/gfortran.dg/default_initialization_5.f90 -=================================================================== ---- a/src/gcc/testsuite/gfortran.dg/default_initialization_5.f90 (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gfortran.dg/default_initialization_5.f90 (.../branches/gcc-4_6-branch) -@@ -0,0 +1,66 @@ -+! { dg-do run } -+! { dg-options "-fdump-tree-original" } -+! -+! PR fortran/51435 -+! -+! Contributed by darmar.xxl@gmail.com -+! -+module arr_m -+ type arr_t -+ real(8), dimension(:), allocatable :: rsk -+ end type -+ type arr_t2 -+ integer :: a = 77 -+ end type -+end module arr_m -+!********************* -+module list_m -+ use arr_m -+ implicit none -+ -+ type(arr_t2), target :: tgt -+ -+ type my_list -+ type(arr_t), pointer :: head => null() -+ end type my_list -+ type my_list2 -+ type(arr_t2), pointer :: head => tgt -+ end type my_list2 -+end module list_m -+!*********************** -+module worker_mod -+ use list_m -+ implicit none -+ -+ type data_all_t -+ type(my_list) :: my_data -+ end type data_all_t -+ type data_all_t2 -+ type(my_list2) :: my_data -+ end type data_all_t2 -+contains -+ subroutine do_job() -+ type(data_all_t) :: dum -+ type(data_all_t2) :: dum2 -+ -+ if (associated(dum%my_data%head)) then -+ call abort() -+ else -+ print *, 'OK: do_job my_data%head is NOT associated' -+ end if -+ -+ if (dum2%my_data%head%a /= 77) & -+ call abort() -+ end subroutine -+end module -+!*************** -+program hello -+ use worker_mod -+ implicit none -+ call do_job() -+end program -+ -+! { dg-final { scan-tree-dump-times "my_data.head = 0B" 1 "original" } } -+! { dg-final { scan-tree-dump-times "my_data.head = &tgt" 1 "original" } } -+! { dg-final { cleanup-tree-dump "original" } } -+! { dg-final { cleanup-modules "arr_m list_m worker_mod" } } -Index: gcc/testsuite/gfortran.dg/pr50875.f90 -=================================================================== ---- a/src/gcc/testsuite/gfortran.dg/pr50875.f90 (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gfortran.dg/pr50875.f90 (.../branches/gcc-4_6-branch) -@@ -0,0 +1,39 @@ -+! { dg-do compile { target { i?86-*-* x86_64-*-* } } } -+! { dg-options "-O3 -mavx" } -+! -+! PR fortran/50875.f90 -+ -+module test -+ -+ implicit none -+ -+ integer, parameter :: dp=kind(1.d0) -+ -+ integer :: P = 2 -+ -+ real(kind=dp), allocatable :: real_array_A(:),real_array_B(:,:) -+ complex(kind=dp), allocatable :: cmplx_array_A(:) -+ -+contains -+ -+ subroutine routine_A -+ -+ integer :: i -+ -+ allocate(cmplx_array_A(P),real_array_B(P,P),real_array_A(P)) -+ -+ real_array_A = 1 -+ real_array_B = 1 -+ -+ do i = 1, p -+ cmplx_array_A = cmplx(real_array_B(:,i),0.0_dp,dp) -+ cmplx_array_A = cmplx_array_A * exp(cmplx(0.0_dp,real_array_A+1)) -+ end do -+ -+ deallocate(cmplx_array_A,real_array_B,real_array_A) -+ -+ end subroutine routine_A -+ -+end module test -+ -+! { dg-final { cleanup-modules "test" } } -Index: gcc/testsuite/gfortran.dg/warn_function_without_result_2.f90 -=================================================================== ---- a/src/gcc/testsuite/gfortran.dg/warn_function_without_result_2.f90 (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gfortran.dg/warn_function_without_result_2.f90 (.../branches/gcc-4_6-branch) -@@ -0,0 +1,19 @@ -+! { dg-do compile } -+! { dg-options "-Wall" } -+! -+! PR fortran/50923 -+! -+module m -+contains -+ integer pure function f() ! { dg-warning "Return value of function 'f' at .1. not set" } -+ end function f -+ integer pure function g() result(h) ! { dg-warning "Return value 'h' of function 'g' declared at .1. not set" } -+ end function g -+ integer pure function i() -+ i = 7 -+ end function i -+ integer pure function j() result(k) -+ k = 8 -+ end function j -+end module m -+! { dg-final { cleanup-modules "mod" } } -Index: gcc/testsuite/gfortran.dg/implicit_pure_1.f90 -=================================================================== ---- a/src/gcc/testsuite/gfortran.dg/implicit_pure_1.f90 (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gfortran.dg/implicit_pure_1.f90 (.../branches/gcc-4_6-branch) -@@ -0,0 +1,53 @@ -+! { dg-do run } -+! -+! PR fortran/51218 -+! -+! Contributed by Harald Anlauf -+! -+ -+module a -+ implicit none -+ integer :: neval = 0 -+contains -+ subroutine inc_eval -+ neval = neval + 1 -+ end subroutine inc_eval -+end module a -+ -+module b -+ use a -+ implicit none -+contains -+ function f(x) ! Should be implicit pure -+ real :: f -+ real, intent(in) :: x -+ f = x -+ end function f -+ -+ function g(x) ! Should NOT be implicit pure -+ real :: g -+ real, intent(in) :: x -+ call inc_eval -+ g = x -+ end function g -+end module b -+ -+program gfcbug114a -+ use a -+ use b -+ implicit none -+ real :: x = 1, y = 1, t, u, v, w -+ if (neval /= 0) call abort () -+ t = f(x)*f(y) -+ if (neval /= 0) call abort () -+ u = f(x)*f(y) + f(x)*f(y) -+ if (neval /= 0) call abort () -+ v = g(x)*g(y) -+ if (neval /= 2) call abort () -+ w = g(x)*g(y) + g(x)*g(y) -+ if (neval /= 6) call abort () -+ if (t /= 1.0 .or. u /= 2.0 .or. v /= 1.0 .or. w /= 2) call abort () -+end program gfcbug114a -+ -+! { dg-final { scan-module "b" "IMPLICIT_PURE" } } -+! { dg-final { cleanup-modules "b" } } -Index: gcc/testsuite/gcc.c-torture/execute/pr51466.c -=================================================================== ---- a/src/gcc/testsuite/gcc.c-torture/execute/pr51466.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr51466.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,43 @@ -+/* PR tree-optimization/51466 */ -+ -+extern void abort (void); -+ -+__attribute__((noinline, noclone)) int -+foo (int i) -+{ -+ volatile int v[4]; -+ int *p; -+ v[i] = 6; -+ p = (int *) &v[i]; -+ return *p; -+} -+ -+__attribute__((noinline, noclone)) int -+bar (int i) -+{ -+ volatile int v[4]; -+ int *p; -+ v[i] = 6; -+ p = (int *) &v[i]; -+ *p = 8; -+ return v[i]; -+} -+ -+__attribute__((noinline, noclone)) int -+baz (int i) -+{ -+ volatile int v[4]; -+ int *p; -+ v[i] = 6; -+ p = (int *) &v[0]; -+ *p = 8; -+ return v[i]; -+} -+ -+int -+main () -+{ -+ if (foo (3) != 6 || bar (2) != 8 || baz (0) != 8 || baz (1) != 6) -+ abort (); -+ return 0; -+} -Index: gcc/testsuite/gcc.c-torture/execute/20111212-1.c -=================================================================== ---- a/src/gcc/testsuite/gcc.c-torture/execute/20111212-1.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gcc.c-torture/execute/20111212-1.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,34 @@ -+/* PR tree-optimization/50569 */ -+/* Reported by Paul Koning <pkoning@gcc.gnu.org> */ -+/* Reduced testcase by Mikael Pettersson <mikpe@it.uu.se> */ -+ -+struct event { -+ struct { -+ unsigned int sec; -+ } sent __attribute__((packed)); -+}; -+ -+void __attribute__((noinline,noclone)) frob_entry(char *buf) -+{ -+ struct event event; -+ -+ __builtin_memcpy(&event, buf, sizeof(event)); -+ if (event.sent.sec < 64) { -+ event.sent.sec = -1U; -+ __builtin_memcpy(buf, &event, sizeof(event)); -+ } -+} -+ -+int main(void) -+{ -+ union { -+ char buf[1 + sizeof(struct event)]; -+ int align; -+ } u; -+ -+ __builtin_memset(&u, 0, sizeof u); -+ -+ frob_entry(&u.buf[1]); -+ -+ return 0; -+} -Index: gcc/testsuite/gcc.c-torture/execute/pr51323.c -=================================================================== ---- a/src/gcc/testsuite/gcc.c-torture/execute/pr51323.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr51323.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,35 @@ -+/* PR middle-end/51323 */ -+ -+extern void abort (void); -+struct S { int a, b, c; }; -+int v; -+ -+__attribute__((noinline, noclone)) void -+foo (int x, int y, int z) -+{ -+ if (x != v || y != 0 || z != 9) -+ abort (); -+} -+ -+static inline int -+baz (const struct S *p) -+{ -+ return p->b; -+} -+ -+__attribute__((noinline, noclone)) void -+bar (int x, struct S y) -+{ -+ foo (baz (&y), 0, x); -+} -+ -+int -+main () -+{ -+ struct S s; -+ v = 3; s.a = v - 1; s.b = v; s.c = v + 1; -+ bar (9, s); -+ v = 17; s.a = v - 1; s.b = v; s.c = v + 1; -+ bar (9, s); -+ return 0; -+} -Index: gcc/testsuite/gcc.c-torture/execute/20111208-1.c -=================================================================== ---- a/src/gcc/testsuite/gcc.c-torture/execute/20111208-1.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gcc.c-torture/execute/20111208-1.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,94 @@ -+/* PR tree-optimization/51315 */ -+/* Reported by Jurij Smakov <jurij@wooyd.org> */ -+ -+typedef unsigned int size_t; -+ -+extern void *memcpy (void *__restrict __dest, -+ __const void *__restrict __src, size_t __n) -+ __attribute__ ((__nothrow__)) __attribute__ ((__nonnull__ (1, 2))); -+ -+extern size_t strlen (__const char *__s) -+ __attribute__ ((__nothrow__)) __attribute__ ((__pure__)) __attribute__ ((__nonnull__ (1))); -+ -+typedef short int int16_t; -+typedef int int32_t; -+ -+extern void abort (void); -+ -+int a; -+ -+static void __attribute__ ((noinline,noclone)) -+do_something (int item) -+{ -+ a = item; -+} -+ -+int -+pack_unpack (char *s, char *p) -+{ -+ char *send, *pend; -+ char type; -+ int integer_size; -+ -+ send = s + strlen (s); -+ pend = p + strlen (p); -+ -+ while (p < pend) -+ { -+ type = *p++; -+ -+ switch (type) -+ { -+ case 's': -+ integer_size = 2; -+ goto unpack_integer; -+ -+ case 'l': -+ integer_size = 4; -+ goto unpack_integer; -+ -+ unpack_integer: -+ switch (integer_size) -+ { -+ case 2: -+ { -+ union -+ { -+ int16_t i; -+ char a[sizeof (int16_t)]; -+ } -+ v; -+ memcpy (v.a, s, sizeof (int16_t)); -+ s += sizeof (int16_t); -+ do_something (v.i); -+ } -+ break; -+ -+ case 4: -+ { -+ union -+ { -+ int32_t i; -+ char a[sizeof (int32_t)]; -+ } -+ v; -+ memcpy (v.a, s, sizeof (int32_t)); -+ s += sizeof (int32_t); -+ do_something (v.i); -+ } -+ break; -+ } -+ break; -+ } -+ } -+ return (int) *s; -+} -+ -+int -+main (void) -+{ -+ int n = pack_unpack ("\200\001\377\376\035\300", "sl"); -+ if (n != 0) -+ abort (); -+ return 0; -+} -Index: gcc/testsuite/gcc.c-torture/compile/pr51077.c -=================================================================== ---- a/src/gcc/testsuite/gcc.c-torture/compile/pr51077.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr51077.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,15 @@ -+/* PR middle-end/51077 */ -+ -+struct S { unsigned char s, t[256]; }; -+ -+void -+foo (const struct S *x, struct S *y, int z) -+{ -+ int i; -+ for (i = 0; i < 8; i++) -+ { -+ const struct S *a = &x[i]; -+ __builtin___memcpy_chk (y->t, a->t, z, __builtin_object_size (y->t, 0)); -+ y = (struct S *) &y->t[z]; -+ } -+} -Index: gcc/testsuite/gcc.c-torture/compile/20110913-1.c -=================================================================== ---- a/src/gcc/testsuite/gcc.c-torture/compile/20110913-1.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gcc.c-torture/compile/20110913-1.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,26 @@ -+struct ieee754_double { -+ double d; -+}; -+extern const float __exp_deltatable[178]; -+float __ieee754_expf (float x) -+{ -+ static const float himark = 88.72283935546875; -+ static const float lomark = -103.972084045410; -+ if (__builtin_isless(x, himark) && __builtin_isgreater(x, lomark)) -+ { -+ int tval; -+ double x22, t, result, dx; -+ float delta; -+ struct ieee754_double ex2_u; -+ dx -= t; -+ tval = (int) (t * 512.0); -+ if (t >= 0) -+ delta = - __exp_deltatable[tval]; -+ else -+ delta = __exp_deltatable[-tval]; -+ x22 = (0.5000000496709180453 * dx + 1.0000001192102037084) * dx + delta; -+ result = x22 * ex2_u.d + ex2_u.d; -+ return (float) result; -+ } -+ return x; -+} -Index: gcc/testsuite/gnat.dg/frame_overflow.adb -=================================================================== ---- a/src/gcc/testsuite/gnat.dg/frame_overflow.adb (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gnat.dg/frame_overflow.adb (.../branches/gcc-4_6-branch) -@@ -1,27 +1,20 @@ - -- { dg-do compile } - --with System; -+package body Frame_Overflow is - --procedure frame_overflow is -- -- type Bitpos_Range_T is range 1..2**(System.Word_Size-1)-1; -- type Bitmap_Array_T is array (Bitpos_Range_T) of Boolean; -- -- type Bitmap_T is record -- Bits : Bitmap_Array_T := (others => False); -- end record; -- -- function -+ function -- { dg-error "too large" } - Set_In (Bitmap : Bitmap_T; Bitpos : Bitpos_Range_T) return Bitmap_T - is -- Result: Bitmap_T := Bitmap; -- { dg-error "Storage_Error" } -+ Result: Bitmap_T := Bitmap; - begin - Result.Bits (Bitpos) := True; - return Result; - end; - -- function Negate (Bitmap : Bitmap_T) return Bitmap_T is -- Result: Bitmap_T; -- { dg-error "Storage_Error" } -+ function -- { dg-error "too large" } -+ Negate (Bitmap : Bitmap_T) return Bitmap_T -+ is -+ Result: Bitmap_T; - begin - for E in Bitpos_Range_T loop - Result.Bits (E) := not Bitmap.Bits (E); -@@ -29,6 +22,4 @@ - return Result; - end; - --begin -- null; --end; -+end Frame_Overflow; -Index: gcc/testsuite/gnat.dg/frame_overflow.ads -=================================================================== ---- a/src/gcc/testsuite/gnat.dg/frame_overflow.ads (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gnat.dg/frame_overflow.ads (.../branches/gcc-4_6-branch) -@@ -0,0 +1,17 @@ -+with System; -+ -+package Frame_Overflow is -+ -+ type Bitpos_Range_T is range 1..2**(System.Word_Size-1)-1; -+ type Bitmap_Array_T is array (Bitpos_Range_T) of Boolean; -+ -+ type Bitmap_T is record -+ Bits : Bitmap_Array_T := (others => False); -+ end record; -+ -+ function -+ Set_In (Bitmap : Bitmap_T; Bitpos : Bitpos_Range_T) return Bitmap_T; -+ -+ function Negate (Bitmap : Bitmap_T) return Bitmap_T; -+ -+end Frame_Overflow; -Index: gcc/testsuite/gnat.dg/specs/addr1.ads -=================================================================== ---- a/src/gcc/testsuite/gnat.dg/specs/addr1.ads (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gnat.dg/specs/addr1.ads (.../branches/gcc-4_6-branch) -@@ -15,7 +15,7 @@ - end record; - for Rec2'Size use 64; - -- A: Arr (1 .. 12); -+ A: Arr (1 .. 4); - - Obj1: Rec1; - for Obj1'Address use A'Address; -- { dg-bogus "alignment" } -Index: gcc/testsuite/gcc.dg/pr45819.c -=================================================================== ---- a/src/gcc/testsuite/gcc.dg/pr45819.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gcc.dg/pr45819.c (.../branches/gcc-4_6-branch) -@@ -1,5 +1,5 @@ - /* { dg-do compile } */ --/* { dg-options "-O2 -fdump-tree-optimized" } */ -+/* { dg-options "-O2 -fdump-tree-optimized -w" } */ - - struct ehci_regs { - char x; -Index: gcc/testsuite/gcc.dg/gomp/pr51339.c -=================================================================== ---- a/src/gcc/testsuite/gcc.dg/gomp/pr51339.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gcc.dg/gomp/pr51339.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,15 @@ -+/* PR c/51339 */ -+/* { dg-do compile } */ -+/* { dg-options "-fopenmp" } */ -+ -+char g[] = "g"; -+ -+void -+foo (void) -+{ -+#pragma omp parallel sections firstprivate (g) lastprivate (g) -+ { -+ #pragma omp section -+ g[0] = 'h'; -+ } -+} -Index: gcc/testsuite/gcc.dg/cpp/assert4.c -=================================================================== ---- a/src/gcc/testsuite/gcc.dg/cpp/assert4.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gcc.dg/cpp/assert4.c (.../branches/gcc-4_6-branch) -@@ -1,4 +1,4 @@ --/* Copyright (C) 2003, 2006, 2008 Free Software Foundation, Inc. -+/* Copyright (C) 2003, 2006, 2008, 2009, 2011 Free Software Foundation, Inc. - Test builtin preprocessor assertions. - By Kaveh Ghazi <ghazi@caip.rutgers.edu>. */ - -@@ -7,7 +7,7 @@ - - /* Check for #system assertions. */ - --#if defined __gnu_linux__ -+#if defined __linux__ - # if !#system(linux) || !#system(unix) || !#system(posix) - # error - # endif -Index: gcc/testsuite/gcc.dg/pr50078.c -=================================================================== ---- a/src/gcc/testsuite/gcc.dg/pr50078.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gcc.dg/pr50078.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,14 @@ -+/* PR tree-optimization/50078 */ -+/* { dg-do compile } */ -+/* { dg-options "-O2" } */ -+ -+unsigned nonvolvar[2]; -+ -+void -+test (int arg) -+{ -+ unsigned v = *(volatile unsigned *) (&nonvolvar[arg]); -+ *(volatile unsigned *) (&nonvolvar[arg]) = v; -+} -+ -+/* { dg-final { scan-assembler-times "movl\[^\n\r\]*nonvolvar" 2 { target { { i?86-*-* x86_64-*-* } && nonpic } } } } */ -Index: gcc/testsuite/gcc.dg/debug/dwarf2/pr51410.c -=================================================================== ---- a/src/gcc/testsuite/gcc.dg/debug/dwarf2/pr51410.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gcc.dg/debug/dwarf2/pr51410.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,13 @@ -+/* PR debug/51410 */ -+/* { dg-do compile } */ -+/* { dg-options "-O0 -gdwarf-2 -dA -fno-merge-debug-strings" } */ -+ -+int x; -+ -+int -+foo (void) -+{ -+ return x; -+} -+ -+/* { dg-final { scan-assembler-times "\\(DIE\[^\\r\\n\]*DW_TAG_variable\\)" 1 } } */ -Index: gcc/testsuite/gcc.dg/pr51408.c -=================================================================== ---- a/src/gcc/testsuite/gcc.dg/pr51408.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gcc.dg/pr51408.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,22 @@ -+/* This testcase used to fail because of a bug in -+ arm.md:*minmax_arithsi. */ -+ -+/* { dg-do run } */ -+/* { dg-options "-O1" } */ -+ -+extern void abort (void); -+ -+int __attribute__((noinline)) -+foo (int a, int b) -+{ -+ int max = (b > 0) ? b : 0; -+ return max - a; -+} -+ -+int -+main (void) -+{ -+ if (foo (3, -1) != -3) -+ abort (); -+ return 0; -+} -Index: gcc/testsuite/gcc.dg/delay-slot-2.c -=================================================================== ---- a/src/gcc/testsuite/gcc.dg/delay-slot-2.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/gcc.dg/delay-slot-2.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,116 @@ -+/* PR rtl-optimization/51187 */ -+/* Reported by Jurij Smakov <jurij@wooyd.org> */ -+ -+/* { dg-do compile } */ -+/* { dg-options "-g -O2" } */ -+ -+extern int printf (__const char *__restrict __format, ...); -+extern void print_c_condition (const char *); -+ -+enum decision_type -+{ -+ DT_num_insns, -+ DT_mode, DT_code, DT_veclen, -+ DT_elt_zero_int, DT_elt_one_int, DT_elt_zero_wide, DT_elt_zero_wide_safe, -+ DT_const_int, -+ DT_veclen_ge, DT_dup, DT_pred, DT_c_test, -+ DT_accept_op, DT_accept_insn -+}; -+ -+struct decision_test -+{ -+ struct decision_test *next; -+ enum decision_type type; -+ -+ union -+ { -+ int num_insns; -+ -+ struct -+ { -+ const char *name; -+ } pred; -+ -+ const char *c_test; -+ int veclen; -+ int dup; -+ long intval; -+ int opno; -+ -+ struct { -+ int code_number; -+ int lineno; -+ int num_clobbers_to_add; -+ } insn; -+ } u; -+}; -+ -+enum routine_type { -+ RECOG, SPLIT, PEEPHOLE2 -+}; -+ -+void -+write_cond (struct decision_test *p, int depth, -+ enum routine_type subroutine_type) -+{ -+ switch (p->type) -+ { -+ case DT_num_insns: -+ printf ("peep2_current_count >= %d", p->u.num_insns); -+ break; -+ -+ case DT_code: -+ printf ("GET_CODE (x%d) == ", depth); -+ break; -+ -+ case DT_veclen: -+ printf ("XVECLEN (x%d, 0) == %d", depth, p->u.veclen); -+ break; -+ -+ case DT_elt_zero_int: -+ printf ("XINT (x%d, 0) == %d", depth, (int) p->u.intval); -+ break; -+ -+ case DT_elt_one_int: -+ printf ("XINT (x%d, 1) == %d", depth, (int) p->u.intval); -+ break; -+ -+ case DT_elt_zero_wide: -+ case DT_elt_zero_wide_safe: -+ printf ("XWINT (x%d, 0) == ", depth); -+ print_host_wide_int (p->u.intval); -+ break; -+ -+ case DT_const_int: -+ printf ("x%d == const_int_rtx[MAX_SAVED_CONST_INT + (%d)]", -+ depth, (int) p->u.intval); -+ break; -+ -+ case DT_veclen_ge: -+ printf ("XVECLEN (x%d, 0) >= %d", depth, p->u.veclen); -+ break; -+ -+ case DT_dup: -+ printf ("rtx_equal_p (x%d, operands[%d])", depth, p->u.dup); -+ break; -+ -+ case DT_pred: -+ printf ("%s (x%d)", p->u.pred.name, depth); -+ break; -+ -+ case DT_c_test: -+ print_c_condition (p->u.c_test); -+ break; -+ -+ case DT_accept_insn: -+ ((void)(__builtin_expect(!(subroutine_type == RECOG), 0) ? __builtin_unreachable(), 0 : 0)); -+ ((void)(__builtin_expect(!(p->u.insn.num_clobbers_to_add), 0) ? __builtin_unreachable(), 0 : 0)); -+ printf ("pnum_clobbers != NULL"); -+ break; -+ -+ default: -+ __builtin_unreachable(); -+ } -+} -+ -+/* { dg-final { scan-assembler "printf" } } */ -Index: gcc/testsuite/ChangeLog -=================================================================== ---- a/src/gcc/testsuite/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,203 @@ -+2011-12-14 Jason Merrill <jason@redhat.com> -+ -+ PR c++/51248 -+ * g++.dg/other/enum2.C: New. -+ -+2011-12-13 Jason Merrill <jason@redhat.com> -+ -+ PR c++/51406 -+ PR c++/51161 -+ * g++.dg/cpp0x/rv-cast3.C: New. -+ * g++.dg/cpp0x/rv-cast4.C: New. -+ -+2011-12-12 Jakub Jelinek <jakub@redhat.com> -+ -+ PR testsuite/51511 -+ * gcc.dg/pr45819.c: Add -w to dg-options. -+ -+ Backported from mainline -+ 2011-12-11 Jakub Jelinek <jakub@redhat.com> -+ -+ PR tree-optimization/51485 -+ * g++.dg/vect/pr51485.cc: New test. -+ -+2011-12-12 Eric Botcazou <ebotcazou@adacore.com> -+ -+ * gcc.c-torture/execute/20111212-1.c: New test. -+ -+2011-12-11 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/50923 -+ * gfortran.dg/warn_function_without_result_2.f90: New. -+ -+2011-12-11 Thomas Koenig <tkoenig@gcc.gnu.org> -+ -+ PR fortran/51338 -+ Backport from trunk -+ * gfortran.dg/assumed_charlen_substring_1.f90: New test. -+ -+2011-12-09 Jakub Jelinek <jakub@redhat.com> -+ -+ Backport from mainline -+ 2011-12-08 Jakub Jelinek <jakub@redhat.com> -+ -+ PR tree-optimization/51466 -+ * gcc.c-torture/execute/pr51466.c: New test. -+ -+ 2011-11-28 Jakub Jelinek <jakub@redhat.com> -+ -+ PR tree-optimization/50078 -+ * gcc.dg/pr50078.c: New test. -+ -+2011-12-09 Kazu Hirata <kazu@codesourcery.com> -+ -+ Backport from mainline: -+ -+ 2011-12-05 Kazu Hirata <kazu@codesourcery.com> -+ -+ PR target/51408 -+ * gcc.dg/pr51408.c: New. -+ -+2011-12-08 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/51448 -+ * gfortran.dg/realloc_on_assign_8.f90: New. -+ -+2011-12-08 Teresa Johnson <tejohnson@google.com> -+ -+ * gcc.target/i386/movdi-rex64.c: Remove unnecessary -+ unused label. -+ -+2011-12-08 Teresa Johnson <tejohnson@google.com> -+ -+ * gcc.target/i386/movdi-rex64.c: Remove unnecessary -+ -Wwrite-strings option. -+ -+2011-12-08 Teresa Johnson <tejohnson@google.com> -+ -+ * gcc.target/i386/movdi-rex64.c: New. -+ -+2011-12-08 Jakub Jelinek <jakub@redhat.com> -+ -+ Backport from mainline -+ 2011-12-05 Jakub Jelinek <jakub@redhat.com> -+ -+ PR debug/51410 -+ * gcc.dg/debug/dwarf2/pr51410.c: New test. -+ -+ PR c/51339 -+ * gcc.dg/gomp/pr51339.c: New test. -+ -+ 2011-12-05 Jakub Jelinek <jakub@redhat.com> -+ Eric Botcazou <ebotcazou@adacore.com> -+ -+ PR middle-end/51323 -+ PR middle-end/50074 -+ * gcc.c-torture/execute/pr51323.c: New test. -+ -+ 2011-11-30 Jakub Jelinek <jakub@redhat.com> -+ -+ PR rtl-optimization/48721 -+ * gcc.target/i386/pr48721.c: New test. -+ -+2011-12-08 Eric Botcazou <ebotcazou@adacore.com> -+ -+ * gcc.c-torture/execute/20111208-1.c: New test. -+ -+ Backport from mainline -+ 2011-09-25 Eric Botcazou <ebotcazou@adacore.com> -+ -+ * gnat.dg/frame_overflow.ads: New. -+ * gnat.dg/frame_overflow.adb: Adjust. -+ * gnat.dg/specs/addr1.ads: Likewise. -+ -+2011-12-06 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/51435 -+ * gfortran.dg/default_initialization_5.f90: New. -+ -+2011-12-06 Martin Jambor <mjambor@suse.cz> -+ -+ PR tree-optimization/50622 -+ * g++.dg/tree-ssa/pr50622.C: New test. -+ -+2011-12-04 Uros Bizjak <ubizjak@gmail.com> -+ Jérémie Detrey <Jeremie.Detrey@loria.fr> -+ -+ PR target/51393 -+ * gcc.target/i386/pr51393.c: New test. -+ -+2011-12-03 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/50684 -+ * gfortran.dg/move_alloc_8.f90: New. -+ -+2011-11-25 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/50408 -+ * gfortran.dg/whole_file_35.f90: New. -+ -+2011-11-24 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/51218 -+ * resolve.c (pure_subroutine): If called subroutine is -+ impure, unset implicit_pure. -+ (resolve_function): Move impure check to simplify code. -+ -+2011-11-22 Paolo Carlini <paolo.carlini@oracle.com> -+ -+ PR c++/51265 -+ * g++.dg/cpp0x/decltype36.C: New. -+ -+2011-11-19 Eric Botcazou <ebotcazou@adacore.com> -+ -+ * gcc.dg/delay-slot-2.c: New test. -+ -+2011-11-18 Joseph Myers <joseph@codesourcery.com> -+ -+ * gcc.dg/cpp/assert4.c: Test __linux__, not __gnu_linux__. -+ -+2011-11-18 Paolo Carlini <paolo.carlini@oracle.com> -+ -+ PR c++/51150 -+ * g++.dg/cpp0x/pr51150.C: New. -+ -+2011-11-16 Richard Earnshaw <rearnsha@arm.com> -+ Bernd Schmidt <bernds@coudesourcery.com> -+ Sebastian Huber <sebastian.huber@embedded-brains.de> -+ -+ PR target/49641 -+ * gcc.target/arm/pr49641.c: New test. -+ -+2011-11-10 Jakub Jelinek <jakub@redhat.com> -+ -+ PR middle-end/51077 -+ * gcc.c-torture/compile/pr51077.c: New test. -+ -+2011-11-07 Jason Merrill <jason@redhat.com> -+ -+ PR c++/50870 -+ * g++.dg/cpp0x/decltype35.C: New. -+ -+2011-11-04 Eric Botcazou <ebotcazou@adacore.com> -+ -+ * g++.dg/other/offsetof7.C: New test. -+ -+2011-11-02 Bernd Schmidt <bernds@codesourcery.com> -+ -+ * gcc.c-torture/compile/20110907.c: New file. -+ -+2011-10-29 Paolo Carlini <paolo.carlini@oracle.com> -+ -+ PR c++/50901 -+ * g++.dg/cpp0x/pr50901.C: New. -+ -+2011-10-27 Uros Bizjak <ubizjak@gmail.com> -+ Steven G. Kargl <kargl@gcc.gnu.org> -+ -+ PR target/50875 -+ * gfortran.dg/pr50875.f90: New test. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -@@ -9,9 +209,9 @@ - - 2011-10-20 Uros Bizjak <ubizjak@gmail.com> - -- * gcc.dg/ipa/ipa-sra-2.c: Add dg-require-effective-target -- non_strict_align. -- * gcc.dg/ipa/ipa-sra-6.c: Ditto. -+ * gcc.dg/ipa/ipa-sra-2.c: Add dg-require-effective-target -+ non_strict_align. -+ * gcc.dg/ipa/ipa-sra-6.c: Ditto. - - 2011-10-19 Jason Merrill <jason@redhat.com> - -Index: gcc/testsuite/g++.dg/vect/pr51485.cc -=================================================================== ---- a/src/gcc/testsuite/g++.dg/vect/pr51485.cc (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/g++.dg/vect/pr51485.cc (.../branches/gcc-4_6-branch) -@@ -0,0 +1,14 @@ -+/* { dg-do compile } */ -+ -+struct A { A (); unsigned int a; }; -+double bar (A a) throw () __attribute__((pure)); -+ -+void -+foo (unsigned int x, double *y, A *z) -+{ -+ unsigned int i; -+ for (i = 0; i < x; i++) -+ y[i] = bar (z[i]); -+} -+ -+/* { dg-final { cleanup-tree-dump "vect" } } */ -Index: gcc/testsuite/g++.dg/other/enum2.C -=================================================================== ---- a/src/gcc/testsuite/g++.dg/other/enum2.C (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/g++.dg/other/enum2.C (.../branches/gcc-4_6-branch) -@@ -0,0 +1,3 @@ -+// PR c++/51248 -+ -+enum E { e = sizeof(const E*) }; -Index: gcc/testsuite/g++.dg/other/offsetof7.C -=================================================================== ---- a/src/gcc/testsuite/g++.dg/other/offsetof7.C (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/g++.dg/other/offsetof7.C (.../branches/gcc-4_6-branch) -@@ -0,0 +1,17 @@ -+// PR c++/50608 -+// Testcase by <dberger@oubliette.org> -+// { dg-do compile } -+ -+struct A { -+ int offset; -+}; -+ -+struct B: public A { -+}; -+ -+struct C { -+ A a; -+ B b; -+}; -+ -+int fails = __builtin_offsetof (C, b.offset); -Index: gcc/testsuite/g++.dg/tree-ssa/pr50622.C -=================================================================== ---- a/src/gcc/testsuite/g++.dg/tree-ssa/pr50622.C (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr50622.C (.../branches/gcc-4_6-branch) -@@ -0,0 +1,30 @@ -+// { dg-do compile } -+// { dg-options "-O2" } -+ -+typedef __complex__ double Value; -+struct LorentzVector -+{ -+ LorentzVector & operator+=(const LorentzVector & a) { -+ theX += a.theX; -+ theY += a.theY; -+ theZ += a.theZ; -+ theT += a.theT; -+ return *this; -+ } -+ -+ Value theX; -+ Value theY; -+ Value theZ; -+ Value theT; -+}; -+ -+inline LorentzVector -+operator+(LorentzVector a, const LorentzVector & b) { -+ return a += b; -+} -+ -+Value ex, et; -+LorentzVector sum() { -+ LorentzVector v1; v1.theX =ex; v1.theY =ex+et; v1.theZ =ex-et; v1.theT =et; -+ return v1+v1; -+} -Index: gcc/testsuite/g++.dg/cpp0x/pr50901.C -=================================================================== ---- a/src/gcc/testsuite/g++.dg/cpp0x/pr50901.C (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/g++.dg/cpp0x/pr50901.C (.../branches/gcc-4_6-branch) -@@ -0,0 +1,9 @@ -+// { dg-options "-std=c++0x" } -+ -+template<class T> int foo(int a) -+{ -+ const unsigned b = a < 0 ? -a : a; -+ return 0; -+} -+ -+int i = foo<float>(1); -Index: gcc/testsuite/g++.dg/cpp0x/decltype35.C -=================================================================== ---- a/src/gcc/testsuite/g++.dg/cpp0x/decltype35.C (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/g++.dg/cpp0x/decltype35.C (.../branches/gcc-4_6-branch) -@@ -0,0 +1,15 @@ -+// PR c++/50870 -+// { dg-options -std=c++0x } -+ -+template <class V> -+ struct impl -+ { -+ template <class T> static T create(); -+ }; -+ -+template <class T, class U, class V, class -+ = decltype(impl<V>::template create<T>() -+ -> impl<V>::template create<U>())> -+struct tester { }; -+ -+tester<impl<float>*, int, float> ti; -Index: gcc/testsuite/g++.dg/cpp0x/decltype36.C -=================================================================== ---- a/src/gcc/testsuite/g++.dg/cpp0x/decltype36.C (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/g++.dg/cpp0x/decltype36.C (.../branches/gcc-4_6-branch) -@@ -0,0 +1,21 @@ -+// PR c++/51265 -+// { dg-options -std=c++0x } -+ -+struct Funny -+{ -+ int print(int); -+}; -+ -+template<typename X> -+void c(); -+ -+template<typename X, X ff> -+void xx() -+{ -+ c<decltype(ff)>(); -+} -+ -+int main() -+{ -+ xx<int(Funny::*)(int), &Funny::print>(); -+} -Index: gcc/testsuite/g++.dg/cpp0x/pr51150.C -=================================================================== ---- a/src/gcc/testsuite/g++.dg/cpp0x/pr51150.C (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/g++.dg/cpp0x/pr51150.C (.../branches/gcc-4_6-branch) -@@ -0,0 +1,20 @@ -+// PR c++/51150 -+// { dg-options "-std=c++0x" } -+ -+struct Clock { -+ double Now(); -+}; -+template <class T> void Foo(Clock* clock) { -+ const int now = clock->Now(); -+} -+ -+template void Foo<float>(Clock*); -+ -+template <class T> void Boo(int val) { -+ const int now1 = (double)(val); -+ const int now2 = const_cast<double>(val); // { dg-error "invalid" } -+ const int now3 = static_cast<double>(val); -+ const int now4 = reinterpret_cast<double>(val); // { dg-error "invalid" } -+} -+ -+template void Boo<float>(int); -Index: gcc/testsuite/g++.dg/cpp0x/rv-cast3.C -=================================================================== ---- a/src/gcc/testsuite/g++.dg/cpp0x/rv-cast3.C (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/g++.dg/cpp0x/rv-cast3.C (.../branches/gcc-4_6-branch) -@@ -0,0 +1,17 @@ -+// PR c++/51406 -+// { dg-do run { target c++11 } } -+ -+extern "C" int printf(const char *,...); -+extern "C" void abort(); -+ -+struct A { int a; A() : a(1) {} }; -+struct B { int b; B() : b(2) {} }; -+struct X : A, B {}; -+ -+int main() { -+ X x; -+ int a=static_cast<A&&>(x).a; -+ int b=static_cast<B&&>(x).b; -+ // printf ("%d %d\n", a, b); -+ if (a!=1 || b!=2) abort(); -+} -Index: gcc/testsuite/g++.dg/cpp0x/rv-cast4.C -=================================================================== ---- a/src/gcc/testsuite/g++.dg/cpp0x/rv-cast4.C (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/testsuite/g++.dg/cpp0x/rv-cast4.C (.../branches/gcc-4_6-branch) -@@ -0,0 +1,13 @@ -+// PR c++/51161 -+// { dg-do compile { target c++11 } } -+ -+struct A{}; -+struct B : A{}; -+struct C : A{}; -+struct D : B, C{}; -+ -+int main() -+{ -+ D d; -+ static_cast<A &&>(d); // { dg-error "ambiguous" } -+} -Index: gcc/cp/typeck.c -=================================================================== ---- a/src/gcc/cp/typeck.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/cp/typeck.c (.../branches/gcc-4_6-branch) -@@ -4835,9 +4835,7 @@ - && TREE_CONSTANT (TREE_OPERAND (val, 0))) - { - tree type = build_pointer_type (argtype); -- tree op0 = fold_convert (type, TREE_OPERAND (val, 0)); -- tree op1 = fold_convert (sizetype, fold_offsetof (arg, val)); -- return fold_build2 (POINTER_PLUS_EXPR, type, op0, op1); -+ return fold_convert (type, fold_offsetof_1 (arg)); - } - - /* Handle complex lvalues (when permitted) -@@ -5772,8 +5770,18 @@ - && reference_related_p (TREE_TYPE (type), intype) - && (c_cast_p || at_least_as_qualified_p (TREE_TYPE (type), intype))) - { -- expr = build_typed_address (expr, type); -- return convert_from_reference (expr); -+ /* Handle the lvalue case here by casting to lvalue reference and -+ then changing it to an rvalue reference. Casting an xvalue to -+ rvalue reference will be handled by the main code path. */ -+ tree lref = cp_build_reference_type (TREE_TYPE (type), false); -+ result = (perform_direct_initialization_if_possible -+ (lref, expr, c_cast_p, complain)); -+ result = cp_fold_convert (type, result); -+ /* Make sure we don't fold back down to a named rvalue reference, -+ because that would be an lvalue. */ -+ if (DECL_P (result)) -+ result = build1 (NON_LVALUE_EXPR, type, result); -+ return convert_from_reference (result); - } - - /* Resolve overloaded address here rather than once in -Index: gcc/cp/decl.c -=================================================================== ---- a/src/gcc/cp/decl.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/cp/decl.c (.../branches/gcc-4_6-branch) -@@ -11540,15 +11540,19 @@ - static void - copy_type_enum (tree dst, tree src) - { -- TYPE_MIN_VALUE (dst) = TYPE_MIN_VALUE (src); -- TYPE_MAX_VALUE (dst) = TYPE_MAX_VALUE (src); -- TYPE_SIZE (dst) = TYPE_SIZE (src); -- TYPE_SIZE_UNIT (dst) = TYPE_SIZE_UNIT (src); -- SET_TYPE_MODE (dst, TYPE_MODE (src)); -- TYPE_PRECISION (dst) = TYPE_PRECISION (src); -- TYPE_ALIGN (dst) = TYPE_ALIGN (src); -- TYPE_USER_ALIGN (dst) = TYPE_USER_ALIGN (src); -- TYPE_UNSIGNED (dst) = TYPE_UNSIGNED (src); -+ tree t; -+ for (t = dst; t; t = TYPE_NEXT_VARIANT (t)) -+ { -+ TYPE_MIN_VALUE (t) = TYPE_MIN_VALUE (src); -+ TYPE_MAX_VALUE (t) = TYPE_MAX_VALUE (src); -+ TYPE_SIZE (t) = TYPE_SIZE (src); -+ TYPE_SIZE_UNIT (t) = TYPE_SIZE_UNIT (src); -+ SET_TYPE_MODE (dst, TYPE_MODE (src)); -+ TYPE_PRECISION (t) = TYPE_PRECISION (src); -+ TYPE_ALIGN (t) = TYPE_ALIGN (src); -+ TYPE_USER_ALIGN (t) = TYPE_USER_ALIGN (src); -+ TYPE_UNSIGNED (t) = TYPE_UNSIGNED (src); -+ } - } - - /* Begin compiling the definition of an enumeration type. -@@ -11903,9 +11907,12 @@ - return; - } - -- /* Here there should not be any variants of this type. */ -+ /* If this is a forward declaration, there should not be any variants, -+ though we can get a variant in the middle of an enum-specifier with -+ wacky code like 'enum E { e = sizeof(const E*) };' */ - gcc_assert (enumtype == TYPE_MAIN_VARIANT (enumtype) -- && !TYPE_NEXT_VARIANT (enumtype)); -+ && (TYPE_VALUES (enumtype) -+ || !TYPE_NEXT_VARIANT (enumtype))); - } - - /* Build and install a CONST_DECL for an enumeration constant of the -Index: gcc/cp/ChangeLog -=================================================================== ---- a/src/gcc/cp/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/cp/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,45 @@ -+2011-12-14 Jason Merrill <jason@redhat.com> -+ -+ PR c++/51248 -+ * decl.c (copy_type_enum): Also update variants. -+ (finish_enum): Allow variants of complete enums. -+ -+2011-12-13 Jason Merrill <jason@redhat.com> -+ -+ PR c++/51406 -+ PR c++/51161 -+ * typeck.c (build_static_cast_1): Fix cast of lvalue to -+ base rvalue reference. -+ -+2011-11-22 Paolo Carlini <paolo.carlini@oracle.com> -+ -+ PR c++/51265 -+ * semantics.c (finish_decltype_type): Handle PTRMEM_CST. -+ -+2011-11-18 Paolo Carlini <paolo.carlini@oracle.com> -+ -+ PR c++/51150 -+ * pt.c (tsubst_copy_and_build): Handle FIX_TRUNC_EXPR. -+ -+2011-11-07 Jason Merrill <jason@redhat.com> -+ -+ PR c++/50870 -+ * pt.c (tsubst_copy): Handle NAMESPACE_DECL. -+ (tsubst_copy_and_build) [COMPONENT_REF]: Handle a still-dependent -+ object. -+ -+2011-11-04 Eric Botcazou <ebotcazou@adacore.com> -+ -+ PR c++/50608 -+ * semantics.c (finish_offsetof): Adjust call to fold_offsetof. -+ * typeck.c (cp_build_addr_expr_1): Call fold_offsetof_1. -+ -+2011-10-29 Paolo Carlini <paolo.carlini@oracle.com> -+ -+ PR c++/50901 -+ * call.c (build_new_op_1): Handle ABS_EXPR together with the -+ other unary EXPR. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: gcc/cp/pt.c -=================================================================== ---- a/src/gcc/cp/pt.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/cp/pt.c (.../branches/gcc-4_6-branch) -@@ -11439,6 +11439,9 @@ - mark_used (t); - return t; - -+ case NAMESPACE_DECL: -+ return t; -+ - case OVERLOAD: - /* An OVERLOAD will always be a non-dependent overload set; an - overload set from function scope will just be represented with an -@@ -12704,6 +12707,10 @@ - return build_x_unary_op (TREE_CODE (t), RECUR (TREE_OPERAND (t, 0)), - complain); - -+ case FIX_TRUNC_EXPR: -+ return cp_build_unary_op (FIX_TRUNC_EXPR, RECUR (TREE_OPERAND (t, 0)), -+ 0, complain); -+ - case ADDR_EXPR: - op1 = TREE_OPERAND (t, 0); - if (TREE_CODE (op1) == LABEL_DECL) -@@ -13179,7 +13186,9 @@ - if (member == error_mark_node) - return error_mark_node; - -- if (object_type && !CLASS_TYPE_P (object_type)) -+ if (type_dependent_expression_p (object)) -+ /* We can't do much here. */; -+ else if (!CLASS_TYPE_P (object_type)) - { - if (SCALAR_TYPE_P (object_type)) - { -Index: gcc/cp/semantics.c -=================================================================== ---- a/src/gcc/cp/semantics.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/cp/semantics.c (.../branches/gcc-4_6-branch) -@@ -3348,7 +3348,7 @@ - } - if (TREE_CODE (expr) == INDIRECT_REF && REFERENCE_REF_P (expr)) - expr = TREE_OPERAND (expr, 0); -- return fold_offsetof (expr, NULL_TREE); -+ return fold_offsetof (expr); - } - - /* Replace the AGGR_INIT_EXPR at *TP with an equivalent CALL_EXPR. This -@@ -4927,8 +4927,9 @@ - gcc_unreachable (); - - case INTEGER_CST: -+ case PTRMEM_CST: - /* We can get here when the id-expression refers to an -- enumerator. */ -+ enumerator or non-type template parameter. */ - type = TREE_TYPE (expr); - break; - -Index: gcc/cp/call.c -=================================================================== ---- a/src/gcc/cp/call.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/cp/call.c (.../branches/gcc-4_6-branch) -@@ -4996,6 +4996,7 @@ - case POSTDECREMENT_EXPR: - case REALPART_EXPR: - case IMAGPART_EXPR: -+ case ABS_EXPR: - return cp_build_unary_op (code, arg1, candidates != 0, complain); - - case ARRAY_REF: -Index: gcc/lto-cgraph.c -=================================================================== ---- a/src/gcc/lto-cgraph.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/lto-cgraph.c (.../branches/gcc-4_6-branch) -@@ -1792,9 +1792,9 @@ - { - const struct lto_function_header *header = - (const struct lto_function_header *) data; -- const int32_t cfg_offset = sizeof (struct lto_function_header); -- const int32_t main_offset = cfg_offset + header->cfg_size; -- const int32_t string_offset = main_offset + header->main_size; -+ const int cfg_offset = sizeof (struct lto_function_header); -+ const int main_offset = cfg_offset + header->cfg_size; -+ const int string_offset = main_offset + header->main_size; - struct data_in *data_in; - struct lto_input_block ib_main; - unsigned int i; -Index: gcc/lto-streamer-out.c -=================================================================== ---- a/src/gcc/lto-streamer-out.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/lto-streamer-out.c (.../branches/gcc-4_6-branch) -@@ -2408,7 +2408,7 @@ - enum gcc_plugin_symbol_kind kind; - enum gcc_plugin_symbol_visibility visibility; - int slot_num; -- uint64_t size; -+ unsigned HOST_WIDEST_INT size; - const char *comdat; - unsigned char c; - -@@ -2466,7 +2466,7 @@ - when symbol has attribute (visibility("hidden")) specified. - targetm.binds_local_p check DECL_VISIBILITY_SPECIFIED and gets this - right. */ -- -+ - if (DECL_EXTERNAL (t) - && !targetm.binds_local_p (t)) - visibility = GCCPV_DEFAULT; -@@ -2488,14 +2488,9 @@ - } - - if (kind == GCCPK_COMMON -- && DECL_SIZE (t) -- && TREE_CODE (DECL_SIZE (t)) == INTEGER_CST) -- { -- size = (HOST_BITS_PER_WIDE_INT >= 64) -- ? (uint64_t) int_size_in_bytes (TREE_TYPE (t)) -- : (((uint64_t) TREE_INT_CST_HIGH (DECL_SIZE_UNIT (t))) << 32) -- | TREE_INT_CST_LOW (DECL_SIZE_UNIT (t)); -- } -+ && DECL_SIZE_UNIT (t) -+ && TREE_CODE (DECL_SIZE_UNIT (t)) == INTEGER_CST) -+ size = TREE_INT_CST_LOW (DECL_SIZE_UNIT (t)); - else - size = 0; - -Index: gcc/dwarf2out.c -=================================================================== ---- a/src/gcc/dwarf2out.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/dwarf2out.c (.../branches/gcc-4_6-branch) -@@ -4431,6 +4431,11 @@ - const char *section; /* Section this loclist is relative to */ - dw_loc_descr_ref expr; - hashval_t hash; -+ /* True if all addresses in this and subsequent lists are known to be -+ resolved. */ -+ bool resolved_addr; -+ /* True if this list has been replaced by dw_loc_next. */ -+ bool replaced; - bool emitted; - } dw_loc_list_node; - -@@ -6091,6 +6096,19 @@ - /* Table of decl location linked lists. */ - static GTY ((param_is (var_loc_list))) htab_t decl_loc_table; - -+/* A cached location list. */ -+struct GTY (()) cached_dw_loc_list_def { -+ /* The DECL_UID of the decl that this entry describes. */ -+ unsigned int decl_id; -+ -+ /* The cached location list. */ -+ dw_loc_list_ref loc_list; -+}; -+typedef struct cached_dw_loc_list_def cached_dw_loc_list; -+ -+/* Table of cached location lists. */ -+static GTY ((param_is (cached_dw_loc_list))) htab_t cached_dw_loc_list_table; -+ - /* A pointer to the base of a list of references to DIE's that - are uniquely identified by their tag, presence/absence of - children DIE's, and list of attribute/value pairs. */ -@@ -6439,7 +6457,7 @@ - static void insert_double (double_int, unsigned char *); - static void insert_float (const_rtx, unsigned char *); - static rtx rtl_for_decl_location (tree); --static bool add_location_or_const_value_attribute (dw_die_ref, tree, -+static bool add_location_or_const_value_attribute (dw_die_ref, tree, bool, - enum dwarf_attribute); - static bool tree_add_const_value_attribute (dw_die_ref, tree); - static bool tree_add_const_value_attribute_for_decl (dw_die_ref, tree); -@@ -8173,6 +8191,24 @@ - htab_find_with_hash (decl_loc_table, decl, DECL_UID (decl)); - } - -+/* Returns a hash value for X (which really is a cached_dw_loc_list_list). */ -+ -+static hashval_t -+cached_dw_loc_list_table_hash (const void *x) -+{ -+ return (hashval_t) ((const cached_dw_loc_list *) x)->decl_id; -+} -+ -+/* Return nonzero if decl_id of cached_dw_loc_list X is the same as -+ UID of decl *Y. */ -+ -+static int -+cached_dw_loc_list_table_eq (const void *x, const void *y) -+{ -+ return (((const cached_dw_loc_list *) x)->decl_id -+ == DECL_UID ((const_tree) y)); -+} -+ - /* Equate a DIE to a particular declaration. */ - - static void -@@ -16995,15 +17031,22 @@ - these things can crop up in other ways also.) Note that one type of - constant value which can be passed into an inlined function is a constant - pointer. This can happen for example if an actual argument in an inlined -- function call evaluates to a compile-time constant address. */ -+ function call evaluates to a compile-time constant address. - -+ CACHE_P is true if it is worth caching the location list for DECL, -+ so that future calls can reuse it rather than regenerate it from scratch. -+ This is true for BLOCK_NONLOCALIZED_VARS in inlined subroutines, -+ since we will need to refer to them each time the function is inlined. */ -+ - static bool --add_location_or_const_value_attribute (dw_die_ref die, tree decl, -+add_location_or_const_value_attribute (dw_die_ref die, tree decl, bool cache_p, - enum dwarf_attribute attr) - { - rtx rtl; - dw_loc_list_ref list; - var_loc_list *loc_list; -+ cached_dw_loc_list *cache; -+ void **slot; - - if (TREE_CODE (decl) == ERROR_MARK) - return false; -@@ -17040,7 +17083,33 @@ - && add_const_value_attribute (die, rtl)) - return true; - } -- list = loc_list_from_tree (decl, decl_by_reference_p (decl) ? 0 : 2); -+ /* If this decl is from BLOCK_NONLOCALIZED_VARS, we might need its -+ list several times. See if we've already cached the contents. */ -+ list = NULL; -+ if (loc_list == NULL || cached_dw_loc_list_table == NULL) -+ cache_p = false; -+ if (cache_p) -+ { -+ cache = (cached_dw_loc_list *) -+ htab_find_with_hash (cached_dw_loc_list_table, decl, DECL_UID (decl)); -+ if (cache) -+ list = cache->loc_list; -+ } -+ if (list == NULL) -+ { -+ list = loc_list_from_tree (decl, decl_by_reference_p (decl) ? 0 : 2); -+ /* It is usually worth caching this result if the decl is from -+ BLOCK_NONLOCALIZED_VARS and if the list has at least two elements. */ -+ if (cache_p && list && list->dw_loc_next) -+ { -+ slot = htab_find_slot_with_hash (cached_dw_loc_list_table, decl, -+ DECL_UID (decl), INSERT); -+ cache = ggc_alloc_cleared_cached_dw_loc_list (); -+ cache->decl_id = DECL_UID (decl); -+ cache->loc_list = list; -+ *slot = cache; -+ } -+ } - if (list) - { - add_AT_location_description (die, attr, list); -@@ -18738,7 +18807,7 @@ - equate_decl_number_to_die (node, parm_die); - if (! DECL_ABSTRACT (node_or_origin)) - add_location_or_const_value_attribute (parm_die, node_or_origin, -- DW_AT_location); -+ node == NULL, DW_AT_location); - - break; - -@@ -18923,6 +18992,7 @@ - tree context; - int was_abstract; - htab_t old_decl_loc_table; -+ htab_t old_cached_dw_loc_list_table; - - /* Make sure we have the actual abstract inline, not a clone. */ - decl = DECL_ORIGIN (decl); -@@ -18937,6 +19007,8 @@ - get locations in abstract instantces. */ - old_decl_loc_table = decl_loc_table; - decl_loc_table = NULL; -+ old_cached_dw_loc_list_table = cached_dw_loc_list_table; -+ cached_dw_loc_list_table = NULL; - - /* Be sure we've emitted the in-class declaration DIE (if any) first, so - we don't get confused by DECL_ABSTRACT. */ -@@ -18961,6 +19033,7 @@ - - current_function_decl = save_fn; - decl_loc_table = old_decl_loc_table; -+ cached_dw_loc_list_table = old_cached_dw_loc_list_table; - pop_cfun (); - } - -@@ -19745,9 +19818,8 @@ - && !TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (decl_or_origin))) - defer_location (decl_or_origin, var_die); - else -- add_location_or_const_value_attribute (var_die, -- decl_or_origin, -- DW_AT_location); -+ add_location_or_const_value_attribute (var_die, decl_or_origin, -+ decl == NULL, DW_AT_location); - add_pubname (decl_or_origin, var_die); - } - else -@@ -21534,6 +21606,7 @@ - dwarf2out_decl (decl); - - htab_empty (decl_loc_table); -+ htab_empty (cached_dw_loc_list_table); - } - - /* Output a marker (i.e. a label) for the beginning of the generated code for -@@ -22267,6 +22340,11 @@ - decl_loc_table = htab_create_ggc (10, decl_loc_table_hash, - decl_loc_table_eq, NULL); - -+ /* Allocate the cached_dw_loc_list_table. */ -+ cached_dw_loc_list_table -+ = htab_create_ggc (10, cached_dw_loc_list_table_hash, -+ cached_dw_loc_list_table_eq, NULL); -+ - /* Allocate the initial hunk of the decl_scope_table. */ - decl_scope_table = VEC_alloc (tree, gc, 256); - -@@ -22907,30 +22985,53 @@ - { - dw_die_ref c; - dw_attr_ref a; -- dw_loc_list_ref *curr; -+ dw_loc_list_ref *curr, *start, loc; - unsigned ix; - - FOR_EACH_VEC_ELT (dw_attr_node, die->die_attr, ix, a) - switch (AT_class (a)) - { - case dw_val_class_loc_list: -- curr = AT_loc_list_ptr (a); -- while (*curr) -+ start = curr = AT_loc_list_ptr (a); -+ loc = *curr; -+ gcc_assert (loc); -+ /* The same list can be referenced more than once. See if we have -+ already recorded the result from a previous pass. */ -+ if (loc->replaced) -+ *curr = loc->dw_loc_next; -+ else if (!loc->resolved_addr) - { -- if (!resolve_addr_in_expr ((*curr)->expr)) -+ /* As things stand, we do not expect or allow one die to -+ reference a suffix of another die's location list chain. -+ References must be identical or completely separate. -+ There is therefore no need to cache the result of this -+ pass on any list other than the first; doing so -+ would lead to unnecessary writes. */ -+ while (*curr) - { -- dw_loc_list_ref next = (*curr)->dw_loc_next; -- if (next && (*curr)->ll_symbol) -+ gcc_assert (!(*curr)->replaced && !(*curr)->resolved_addr); -+ if (!resolve_addr_in_expr ((*curr)->expr)) - { -- gcc_assert (!next->ll_symbol); -- next->ll_symbol = (*curr)->ll_symbol; -+ dw_loc_list_ref next = (*curr)->dw_loc_next; -+ if (next && (*curr)->ll_symbol) -+ { -+ gcc_assert (!next->ll_symbol); -+ next->ll_symbol = (*curr)->ll_symbol; -+ } -+ *curr = next; - } -- *curr = next; -+ else -+ curr = &(*curr)->dw_loc_next; - } -+ if (loc == *start) -+ loc->resolved_addr = 1; - else -- curr = &(*curr)->dw_loc_next; -+ { -+ loc->replaced = 1; -+ loc->dw_loc_next = *start; -+ } - } -- if (!AT_loc_list (a)) -+ if (!*start) - { - remove_AT (die, a->dw_attr); - ix--; -@@ -23359,6 +23460,7 @@ - add_location_or_const_value_attribute ( - VEC_index (deferred_locations, deferred_locations_list, i)->die, - VEC_index (deferred_locations, deferred_locations_list, i)->variable, -+ false, - DW_AT_location); - } - -Index: gcc/ada/mlib-tgt-specific-darwin.adb -=================================================================== ---- a/src/gcc/ada/mlib-tgt-specific-darwin.adb (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/ada/mlib-tgt-specific-darwin.adb (.../branches/gcc-4_6-branch) -@@ -36,8 +36,6 @@ - - -- Non default subprograms - -- function Archive_Indexer_Options return String_List_Access; -- - procedure Build_Dynamic_Library - (Ofiles : Argument_List; - Options : Argument_List; -@@ -67,15 +65,6 @@ - (1 => Flat_Namespace'Access, - 2 => Shared_Libgcc'Access); - -- ----------------------------- -- -- Archive_Indexer_Options -- -- ----------------------------- -- -- function Archive_Indexer_Options return String_List_Access is -- begin -- return new String_List'(1 => new String'("-c")); -- end Archive_Indexer_Options; -- - --------------------------- - -- Build_Dynamic_Library -- - --------------------------- -@@ -180,7 +169,6 @@ - end Is_Archive_Ext; - - begin -- Archive_Indexer_Options_Ptr := Archive_Indexer_Options'Access; - Build_Dynamic_Library_Ptr := Build_Dynamic_Library'Access; - DLL_Ext_Ptr := DLL_Ext'Access; - Dynamic_Option_Ptr := Dynamic_Option'Access; -Index: gcc/ada/init.c -=================================================================== ---- a/src/gcc/ada/init.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/ada/init.c (.../branches/gcc-4_6-branch) -@@ -2216,12 +2216,33 @@ - return 0; - } - -+#define HAVE_GNAT_ADJUST_CONTEXT_FOR_RAISE -+ -+void -+__gnat_adjust_context_for_raise (int signo ATTRIBUTE_UNUSED, -+ void *ucontext ATTRIBUTE_UNUSED) -+{ -+#if defined (__x86_64__) -+ /* Work around radar #10302855/pr50678, where the unwinders (libunwind or -+ libgcc_s depending on the system revision) and the DWARF unwind data for -+ the sigtramp have different ideas about register numbering (causing rbx -+ and rdx to be transposed).. */ -+ ucontext_t *uc = (ucontext_t *)ucontext ; -+ unsigned long t = uc->uc_mcontext->__ss.__rbx; -+ -+ uc->uc_mcontext->__ss.__rbx = uc->uc_mcontext->__ss.__rdx; -+ uc->uc_mcontext->__ss.__rdx = t; -+#endif -+} -+ - static void --__gnat_error_handler (int sig, siginfo_t *si, void *ucontext ATTRIBUTE_UNUSED) -+__gnat_error_handler (int sig, siginfo_t *si, void *ucontext) - { - struct Exception_Data *exception; - const char *msg; - -+ __gnat_adjust_context_for_raise (sig, ucontext); -+ - switch (sig) - { - case SIGSEGV: -Index: gcc/ada/ChangeLog -=================================================================== ---- a/src/gcc/ada/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/ada/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,42 @@ -+2011-12-08 Eric Botcazou <ebotcazou@adacore.com> -+ -+ PR tree-optimization/51315 -+ Backport from mainline -+ 2011-09-25 Eric Botcazou <ebotcazou@adacore.com> -+ -+ * gcc-interface/decl.c (gnat_to_gnu_entity) <object>: Do not promote -+ the alignment if this doesn't prevent BLKmode access to the object. -+ -+2011-11-13 Iain Sandoe <iains@gcc.gnu.org> -+ -+ Backport from mainline r181474 -+ PR target/50678 -+ * init.c (__gnat_error_handler) [Darwin]: Move work-around to the -+ bug filed as radar #10302855 from __gnat_error_handler ... -+ ... to (__gnat_adjust_context_for_raise) [Darwin]: New. -+ (HAVE_GNAT_ADJUST_CONTEXT_FOR_RAISE) [Darwin]: Define. -+ (__gnat_error_handler) [Darwin]: Use __gnat_adjust_context_for_raise. -+ -+2011-11-18 Tristan Gingold <gingold@adacore.com> -+ Iain Sandoe <iains@gcc.gnu.org> -+ -+ PR target/49992 -+ * mlib-tgt-specific-darwin.adb (Archive_Indexer_Options): Remove. -+ * gcc-interface/Makefile.in (darwin): Remove ranlib special-casing -+ for Darwin. -+ -+2011-11-13 Iain Sandoe <iains@gcc.gnu.org> -+ -+ Backport from mainline r181319 -+ * gcc-interface/Makefile.in (stamp-gnatlib-$(RTSDIR)): Don't link -+ s-oscons.ads. -+ (OSCONS_CPP, OSCONS_EXTRACT): New. -+ (./bldtools/oscons/xoscons): New Target. -+ ($(RTSDIR)/s-oscons.ads): New Target. -+ (gnatlib): Depend on $(RTSDIR)/s-oscons.ads. -+ * Make-generated.in: Remove machinery to generate xoscons and -+ ada/s-oscons.ads. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: gcc/ada/gcc-interface/Makefile.in -=================================================================== ---- a/src/gcc/ada/gcc-interface/Makefile.in (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/ada/gcc-interface/Makefile.in (.../branches/gcc-4_6-branch) -@@ -2189,7 +2189,6 @@ - - EH_MECHANISM=-gcc - GNATLIB_SHARED = gnatlib-shared-darwin -- RANLIB = ranlib -c - GMEM_LIB = gmemlib - LIBRARY_VERSION := $(LIB_VERSION) - soext = .dylib -@@ -2447,21 +2446,52 @@ - $(foreach PAIR,$(LIBGNAT_TARGET_PAIRS), \ - $(LN_S) $(fsrcpfx)ada/$(word 2,$(subst <, ,$(PAIR))) \ - $(RTSDIR)/$(word 1,$(subst <, ,$(PAIR)));) --# Copy generated target dependent sources -- $(RM) $(RTSDIR)/s-oscons.ads -- (cd $(RTSDIR); $(LN_S) ../s-oscons.ads s-oscons.ads) -+# Copy tsystem.h -+ $(CP) $(srcdir)/tsystem.h $(RTSDIR) - $(RM) ../stamp-gnatlib-$(RTSDIR) - touch ../stamp-gnatlib1-$(RTSDIR) - - # GNULLI End ############################################################# - -+ifeq ($(strip $(filter-out alpha64 ia64 dec hp vms% openvms% alphavms%,$(subst -, ,$(host)))),) -+OSCONS_CPP=../../$(DECC) -E /comment=as_is -DNATIVE \ -+ -DTARGET='""$(target)""' $(fsrcpfx)ada/s-oscons-tmplt.c -+ -+OSCONS_EXTRACT=../../$(DECC) -DNATIVE \ -+ -DTARGET='""$(target)""' $(fsrcpfx)ada/s-oscons-tmplt.c ; \ -+ ld -o s-oscons-tmplt.exe s-oscons-tmplt.obj; \ -+ ./s-oscons-tmplt.exe > s-oscons-tmplt.s -+ -+else -+# GCC_FOR_TARGET has paths relative to the gcc directory, so we need to adjust -+# for running it from $(RTSDIR) -+OSCONS_CC=`echo "$(GCC_FOR_TARGET)" \ -+ | sed -e 's^\./xgcc^../../xgcc^' -e 's^-B./^-B../../^'` -+OSCONS_CPP=$(OSCONS_CC) $(GNATLIBCFLAGS) -E -C \ -+ -DTARGET=\"$(target)\" $(fsrcpfx)ada/s-oscons-tmplt.c > s-oscons-tmplt.i -+OSCONS_EXTRACT=$(OSCONS_CC) -S s-oscons-tmplt.i -+endif -+ -+./bldtools/oscons/xoscons: xoscons.adb xutil.ads xutil.adb -+ -$(MKDIR) ./bldtools/oscons -+ $(RM) $(addprefix ./bldtools/oscons/,$(notdir $^)) -+ $(CP) $^ ./bldtools/oscons -+ (cd ./bldtools/oscons ; gnatmake -q xoscons) -+ -+$(RTSDIR)/s-oscons.ads: ../stamp-gnatlib1-$(RTSDIR) s-oscons-tmplt.c gsocket.h ./bldtools/oscons/xoscons -+ $(RM) $(RTSDIR)/s-oscons-tmplt.i $(RTSDIR)/s-oscons-tmplt.s -+ (cd $(RTSDIR) ; \ -+ $(OSCONS_CPP) ; \ -+ $(OSCONS_EXTRACT) ; \ -+ ../bldtools/oscons/xoscons) -+ - # Don't use semicolon separated shell commands that involve list expansions. - # The semicolon triggers a call to DCL on VMS and DCL can't handle command - # line lengths in excess of 256 characters. - # Example: cd $(RTSDIR); ar rc libfoo.a $(LONG_LIST_OF_OBJS) - # is guaranteed to overflow the buffer. - --gnatlib: ../stamp-gnatlib1-$(RTSDIR) ../stamp-gnatlib2-$(RTSDIR) -+gnatlib: ../stamp-gnatlib1-$(RTSDIR) ../stamp-gnatlib2-$(RTSDIR) $(RTSDIR)/s-oscons.ads - $(MAKE) -C $(RTSDIR) \ - CC="`echo \"$(GCC_FOR_TARGET)\" \ - | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'`" \ -Index: gcc/ada/gcc-interface/decl.c -=================================================================== ---- a/src/gcc/ada/gcc-interface/decl.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/ada/gcc-interface/decl.c (.../branches/gcc-4_6-branch) -@@ -808,16 +808,30 @@ - && No (Address_Clause (gnat_entity)))) - && TREE_CODE (TYPE_SIZE (gnu_type)) == INTEGER_CST) - { -- /* No point in jumping through all the hoops needed in order -+ unsigned int size_cap, align_cap; -+ -+ /* No point in promoting the alignment if this doesn't prevent -+ BLKmode access to the object, in particular block copy, as -+ this will for example disable the NRV optimization for it. -+ No point in jumping through all the hoops needed in order - to support BIGGEST_ALIGNMENT if we don't really have to. - So we cap to the smallest alignment that corresponds to - a known efficient memory access pattern of the target. */ -- unsigned int align_cap = Is_Atomic (gnat_entity) -- ? BIGGEST_ALIGNMENT -- : get_mode_alignment (ptr_mode); -+ if (Is_Atomic (gnat_entity)) -+ { -+ size_cap = UINT_MAX; -+ align_cap = BIGGEST_ALIGNMENT; -+ } -+ else -+ { -+ size_cap = MAX_FIXED_MODE_SIZE; -+ align_cap = get_mode_alignment (ptr_mode); -+ } - - if (!host_integerp (TYPE_SIZE (gnu_type), 1) -- || compare_tree_int (TYPE_SIZE (gnu_type), align_cap) >= 0) -+ || compare_tree_int (TYPE_SIZE (gnu_type), size_cap) > 0) -+ align = 0; -+ else if (compare_tree_int (TYPE_SIZE (gnu_type), align_cap) > 0) - align = align_cap; - else - align = ceil_alignment (tree_low_cst (TYPE_SIZE (gnu_type), 1)); -Index: gcc/ada/Make-generated.in -=================================================================== ---- a/src/gcc/ada/Make-generated.in (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/ada/Make-generated.in (.../branches/gcc-4_6-branch) -@@ -64,37 +64,6 @@ - $(CP) $^ $(ADA_GEN_SUBDIR)/bldtools/nmake_s - (cd $(ADA_GEN_SUBDIR)/bldtools/nmake_s; gnatmake -q xnmake ; ./xnmake -s ../../nmake.ads ) - --ifeq ($(strip $(filter-out alpha64 ia64 dec hp vms% openvms% alphavms%,$(subst -, ,$(host)))),) --OSCONS_CPP=../../../$(DECC) -E /comment=as_is -DNATIVE \ -- -DTARGET='""$(target)""' s-oscons-tmplt.c -- --OSCONS_EXTRACT=../../../$(DECC) -DNATIVE \ -- -DTARGET='""$(target)""' s-oscons-tmplt.c ; \ -- ld -o s-oscons-tmplt.exe s-oscons-tmplt.obj; \ -- ./s-oscons-tmplt.exe > s-oscons-tmplt.s -- --else --# GCC_FOR_TARGET has paths relative to the gcc directory, so we need to ajust --# for running it from $(ADA_GEN_SUBDIR)/bldtools/oscons --OSCONS_CC=`echo "$(GCC_FOR_TARGET)" \ -- | sed -e 's^\./xgcc^../../../xgcc^' -e 's^-B./^-B../../../^'` --OSCONS_CPP=$(OSCONS_CC) $(GNATLIBCFLAGS) -E -C \ -- -DTARGET=\"$(target)\" s-oscons-tmplt.c > s-oscons-tmplt.i --OSCONS_EXTRACT=$(OSCONS_CC) -S s-oscons-tmplt.i --endif -- --$(ADA_GEN_SUBDIR)/s-oscons.ads : $(ADA_GEN_SUBDIR)/s-oscons-tmplt.c $(ADA_GEN_SUBDIR)/gsocket.h $(ADA_GEN_SUBDIR)/xoscons.adb $(ADA_GEN_SUBDIR)/xutil.ads $(ADA_GEN_SUBDIR)/xutil.adb -- -$(MKDIR) $(ADA_GEN_SUBDIR)/bldtools/oscons -- $(RM) $(addprefix $(ADA_GEN_SUBDIR)/bldtools/oscons/,$(notdir $^)) -- $(CP) $^ $(ADA_GEN_SUBDIR)/bldtools/oscons -- (cd $(ADA_GEN_SUBDIR)/bldtools/oscons ; gnatmake -q xoscons ; \ -- $(RM) s-oscons-tmplt.i s-oscons-tmplt.s ; \ -- $(OSCONS_CPP) ; \ -- $(OSCONS_EXTRACT) ; \ -- ./xoscons ; \ -- $(RM) ../../s-oscons.ads ; \ -- $(CP) s-oscons.ads s-oscons.h ../../) -- - $(ADA_GEN_SUBDIR)/sdefault.adb: $(ADA_GEN_SUBDIR)/stamp-sdefault ; @true - $(ADA_GEN_SUBDIR)/stamp-sdefault : $(srcdir)/version.c Makefile - $(ECHO) "pragma Style_Checks (Off);" >tmp-sdefault.adb -Index: gcc/lto-streamer-in.c -=================================================================== ---- a/src/gcc/lto-streamer-in.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/lto-streamer-in.c (.../branches/gcc-4_6-branch) -@@ -1366,9 +1366,9 @@ - { - const struct lto_function_header *header; - struct data_in *data_in; -- int32_t cfg_offset; -- int32_t main_offset; -- int32_t string_offset; -+ int cfg_offset; -+ int main_offset; -+ int string_offset; - struct lto_input_block ib_cfg; - struct lto_input_block ib_main; - -Index: gcc/c-decl.c -=================================================================== ---- a/src/gcc/c-decl.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/c-decl.c (.../branches/gcc-4_6-branch) -@@ -721,7 +721,7 @@ - - complete_array_type (&TREE_TYPE (decl), NULL_TREE, true); - -- layout_decl (decl, 0); -+ relayout_decl (decl); - } - } - } -@@ -1200,7 +1200,7 @@ - DECL_CHAIN (p) = BLOCK_VARS (block); - BLOCK_VARS (block) = p; - } -- else if (VAR_OR_FUNCTION_DECL_P (p)) -+ else if (VAR_OR_FUNCTION_DECL_P (p) && scope != file_scope) - { - /* For block local externs add a special - DECL_EXTERNAL decl for debug info generation. */ -@@ -4261,7 +4261,7 @@ - if (DECL_INITIAL (decl)) - TREE_TYPE (DECL_INITIAL (decl)) = type; - -- layout_decl (decl, 0); -+ relayout_decl (decl); - } - - if (TREE_CODE (decl) == VAR_DECL) -Index: gcc/fortran/trans-array.c -=================================================================== ---- a/src/gcc/fortran/trans-array.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/fortran/trans-array.c (.../branches/gcc-4_6-branch) -@@ -6772,8 +6772,17 @@ - gfc_array_index_type, cond, - lbound, gfc_index_one_node); - } -- else if (expr->expr_type == EXPR_VARIABLE) -+ -+ if (expr->expr_type == EXPR_FUNCTION) - { -+ /* A conversion function, so use the argument. */ -+ gcc_assert (expr->value.function.isym -+ && expr->value.function.isym->conversion); -+ expr = expr->value.function.actual->expr; -+ } -+ -+ if (expr->expr_type == EXPR_VARIABLE) -+ { - tmp = TREE_TYPE (expr->symtree->n.sym->backend_decl); - for (ref = expr->ref; ref; ref = ref->next) - { -@@ -6785,15 +6794,6 @@ - } - return GFC_TYPE_ARRAY_LBOUND(tmp, dim); - } -- else if (expr->expr_type == EXPR_FUNCTION) -- { -- /* A conversion function, so use the argument. */ -- expr = expr->value.function.actual->expr; -- if (expr->expr_type != EXPR_VARIABLE) -- return gfc_index_one_node; -- desc = TREE_TYPE (expr->symtree->n.sym->backend_decl); -- return get_std_lbound (expr, desc, dim, assumed_size); -- } - - return gfc_index_one_node; - } -Index: gcc/fortran/ChangeLog -=================================================================== ---- a/src/gcc/fortran/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/fortran/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,55 @@ -+2011-12-11 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/50923 -+ * trans-decl.c (generate_local_decl): Set TREE_NO_WARNING only -+ if the front end has printed a warning. -+ (gfc_generate_function_code): Fix unset-result warning. -+ -+2011-12-11 Thomas Koenig <tkoenig@gcc.gnu.org> -+ -+ PR fortran/51338 -+ Backport from trunk -+ * dependency.c (are_identical_variables): Handle case where -+ end fields of substring references are NULL. -+ -+2011-12-08 Toon Moene <toon@moene.org> -+ -+ PR fortran/51310 -+ * invoke.texi: Itemize the cases for which -+ -finit-<type>=<constant> doesn't work. -+ -+2011-12-08 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/51448 -+ * fortran/trans-array.c (get_std_lbound): Fix handling of -+ conversion functions. -+ -+2011-12-06 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/51435 -+ * expr.c (gfc_has_default_initializer): Fix handling of -+ DT with initialized pointer components. -+ -+2011-12-03 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/50684 -+ * check.c (variable_check): Fix intent(in) check. -+ -+2011-11-25 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/50408 -+ * trans-decl.c (gfc_get_module_backend_decl): Also copy -+ ts.u.derived from the gsym if the ts.type is BT_CLASS. -+ (gfc_get_extern_function_decl): Copy also the backend_decl -+ for the symbol's ts.u.{derived,cl} from the gsym. -+ * trans-types.c (gfc_copy_dt_decls_ifequal): Directly -+ return if "from" and "to" are the same. -+ -+2011-11-24 Tobias Burnus <burnus@net-b.de> -+ -+ PR fortran/51218 -+ * gfortran.dg/implicit_pure_1.f90: New. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: gcc/fortran/expr.c -=================================================================== ---- a/src/gcc/fortran/expr.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/fortran/expr.c (.../branches/gcc-4_6-branch) -@@ -3679,6 +3679,8 @@ - if (!c->attr.pointer - && gfc_has_default_initializer (c->ts.u.derived)) - return true; -+ if (c->attr.pointer && c->initializer) -+ return true; - } - else - { -@@ -3689,6 +3691,7 @@ - return false; - } - -+ - /* Get an expression for a default initializer. */ - - gfc_expr * -Index: gcc/fortran/trans-types.c -=================================================================== ---- a/src/gcc/fortran/trans-types.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/fortran/trans-types.c (.../branches/gcc-4_6-branch) -@@ -2092,6 +2092,9 @@ - gfc_component *to_cm; - gfc_component *from_cm; - -+ if (from == to) -+ return 1; -+ - if (from->backend_decl == NULL - || !gfc_compare_derived_types (from, to)) - return 0; -Index: gcc/fortran/resolve.c -=================================================================== ---- a/src/gcc/fortran/resolve.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/fortran/resolve.c (.../branches/gcc-4_6-branch) -@@ -3132,11 +3132,11 @@ - "procedure within a PURE procedure", name, &expr->where); - t = FAILURE; - } -+ -+ if (gfc_implicit_pure (NULL)) -+ gfc_current_ns->proc_name->attr.implicit_pure = 0; - } - -- if (!pure_function (expr, &name) && name && gfc_implicit_pure (NULL)) -- gfc_current_ns->proc_name->attr.implicit_pure = 0; -- - /* Functions without the RECURSIVE attribution are not allowed to - * call themselves. */ - if (expr->value.function.esym && !expr->value.function.esym->attr.recursive) -@@ -3195,6 +3195,9 @@ - else if (gfc_pure (NULL)) - gfc_error ("Subroutine call to '%s' at %L is not PURE", sym->name, - &c->loc); -+ -+ if (gfc_implicit_pure (NULL)) -+ gfc_current_ns->proc_name->attr.implicit_pure = 0; - } - - -Index: gcc/fortran/trans-decl.c -=================================================================== ---- a/src/gcc/fortran/trans-decl.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/fortran/trans-decl.c (.../branches/gcc-4_6-branch) -@@ -677,7 +677,7 @@ - } - else if (s->backend_decl) - { -- if (sym->ts.type == BT_DERIVED) -+ if (sym->ts.type == BT_DERIVED || sym->ts.type == BT_CLASS) - gfc_copy_dt_decls_ifequal (s->ts.u.derived, sym->ts.u.derived, - true); - else if (sym->ts.type == BT_CHARACTER) -@@ -1602,6 +1602,11 @@ - gfc_find_symbol (sym->name, gsym->ns, 0, &s); - if (s && s->backend_decl) - { -+ if (sym->ts.type == BT_DERIVED || sym->ts.type == BT_CLASS) -+ gfc_copy_dt_decls_ifequal (s->ts.u.derived, sym->ts.u.derived, -+ true); -+ else if (sym->ts.type == BT_CHARACTER) -+ sym->ts.u.cl->backend_decl = s->ts.u.cl->backend_decl; - sym->backend_decl = s->backend_decl; - return sym->backend_decl; - } -@@ -4179,10 +4184,16 @@ - "declared INTENT(OUT) but was not set and " - "does not have a default initializer", - sym->name, &sym->declared_at); -+ if (sym->backend_decl != NULL_TREE) -+ TREE_NO_WARNING(sym->backend_decl) = 1; - } - else if (gfc_option.warn_unused_dummy_argument) -- gfc_warning ("Unused dummy argument '%s' at %L", sym->name, -+ { -+ gfc_warning ("Unused dummy argument '%s' at %L", sym->name, - &sym->declared_at); -+ if (sym->backend_decl != NULL_TREE) -+ TREE_NO_WARNING(sym->backend_decl) = 1; -+ } - } - - /* Warn for unused variables, but not if they're inside a common -@@ -4227,11 +4238,6 @@ - mark the symbol now, as well as in traverse_ns, to prevent - getting stuck in a circular dependency. */ - sym->mark = 1; -- -- /* We do not want the middle-end to warn about unused parameters -- as this was already done above. */ -- if (sym->attr.dummy && sym->backend_decl != NULL_TREE) -- TREE_NO_WARNING(sym->backend_decl) = 1; - } - else if (sym->attr.flavor == FL_PARAMETER) - { -@@ -4846,11 +4852,11 @@ - if (result == NULL_TREE) - { - /* TODO: move to the appropriate place in resolve.c. */ -- if (warn_return_type && !sym->attr.referenced && sym == sym->result) -+ if (warn_return_type && sym == sym->result) - gfc_warning ("Return value of function '%s' at %L not set", - sym->name, &sym->declared_at); -- -- TREE_NO_WARNING(sym->backend_decl) = 1; -+ if (warn_return_type) -+ TREE_NO_WARNING(sym->backend_decl) = 1; - } - else - gfc_add_expr_to_block (&body, gfc_generate_return ()); -Index: gcc/fortran/check.c -=================================================================== ---- a/src/gcc/fortran/check.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/fortran/check.c (.../branches/gcc-4_6-branch) -@@ -485,10 +485,31 @@ - && (gfc_current_intrinsic_arg[n]->intent == INTENT_OUT - || gfc_current_intrinsic_arg[n]->intent == INTENT_INOUT)) - { -- gfc_error ("'%s' argument of '%s' intrinsic at %L cannot be INTENT(IN)", -- gfc_current_intrinsic_arg[n]->name, gfc_current_intrinsic, -- &e->where); -- return FAILURE; -+ gfc_ref *ref; -+ bool pointer = e->symtree->n.sym->ts.type == BT_CLASS -+ && CLASS_DATA (e->symtree->n.sym) -+ ? CLASS_DATA (e->symtree->n.sym)->attr.class_pointer -+ : e->symtree->n.sym->attr.pointer; -+ -+ for (ref = e->ref; ref; ref = ref->next) -+ { -+ if (pointer && ref->type == REF_COMPONENT) -+ break; -+ if (ref->type == REF_COMPONENT -+ && ((ref->u.c.component->ts.type == BT_CLASS -+ && CLASS_DATA (ref->u.c.component)->attr.class_pointer) -+ || (ref->u.c.component->ts.type != BT_CLASS -+ && ref->u.c.component->attr.pointer))) -+ break; -+ } -+ -+ if (!ref) -+ { -+ gfc_error ("'%s' argument of '%s' intrinsic at %L cannot be " -+ "INTENT(IN)", gfc_current_intrinsic_arg[n]->name, -+ gfc_current_intrinsic, &e->where); -+ return FAILURE; -+ } - } - - if (e->expr_type == EXPR_VARIABLE -Index: gcc/fortran/dependency.c -=================================================================== ---- a/src/gcc/fortran/dependency.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/fortran/dependency.c (.../branches/gcc-4_6-branch) -@@ -163,9 +163,19 @@ - break; - - case REF_SUBSTRING: -- if (gfc_dep_compare_expr (r1->u.ss.start, r2->u.ss.start) != 0 -- || gfc_dep_compare_expr (r1->u.ss.end, r2->u.ss.end) != 0) -+ if (gfc_dep_compare_expr (r1->u.ss.start, r2->u.ss.start) != 0) - return false; -+ -+ /* If both are NULL, the end length compares equal, because we -+ are looking at the same variable. This can only happen for -+ assumed- or deferred-length character arguments. */ -+ -+ if (r1->u.ss.end == NULL && r2->u.ss.end == NULL) -+ break; -+ -+ if (gfc_dep_compare_expr (r1->u.ss.end, r2->u.ss.end) != 0) -+ return false; -+ - break; - - default: -Index: gcc/regmove.c -=================================================================== ---- a/src/gcc/regmove.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/regmove.c (.../branches/gcc-4_6-branch) -@@ -860,7 +860,7 @@ - if (REG_N_CALLS_CROSSED (REGNO (src)) == 0) - break; - -- if (call_used_regs [REGNO (dst)] -+ if ((HARD_REGISTER_P (dst) && call_used_regs [REGNO (dst)]) - || find_reg_fusage (p, CLOBBER, dst)) - break; - } -Index: gcc/configure.ac -=================================================================== ---- a/src/gcc/configure.ac (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/configure.ac (.../branches/gcc-4_6-branch) -@@ -807,17 +807,7 @@ - gcc_AC_PROG_LN_S - ACX_PROG_LN($LN_S) - AC_PROG_RANLIB --case "${host}" in --*-*-darwin*) -- # By default, the Darwin ranlib will not treat common symbols as -- # definitions when building the archive table of contents. Other -- # ranlibs do that; pass an option to the Darwin ranlib that makes -- # it behave similarly. -- ranlib_flags="-c" -- ;; --*) -- ranlib_flags="" --esac -+ranlib_flags="" - AC_SUBST(ranlib_flags) - - gcc_AC_PROG_INSTALL -Index: gcc/df.h -=================================================================== ---- a/src/gcc/df.h (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/df.h (.../branches/gcc-4_6-branch) -@@ -53,7 +53,7 @@ - #define DF_RD 3 /* Reaching Defs. */ - #define DF_CHAIN 4 /* Def-Use and/or Use-Def Chains. */ - #define DF_WORD_LR 5 /* Subreg tracking lr. */ --#define DF_NOTE 6 /* REG_DEF and REG_UNUSED notes. */ -+#define DF_NOTE 6 /* REG_DEAD and REG_UNUSED notes. */ - #define DF_MD 7 /* Multiple Definitions. */ - - #define DF_LAST_PROBLEM_PLUS1 (DF_MD + 1) -Index: gcc/lto-section-in.c -=================================================================== ---- a/src/gcc/lto-section-in.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/lto-section-in.c (.../branches/gcc-4_6-branch) -@@ -296,7 +296,7 @@ - = (const struct lto_simple_header *) data; - - struct lto_input_block* ib_main; -- int32_t main_offset = sizeof (struct lto_simple_header); -+ int main_offset = sizeof (struct lto_simple_header); - - if (!data) - return NULL; -Index: gcc/tree-vect-data-refs.c -=================================================================== ---- a/src/gcc/tree-vect-data-refs.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/tree-vect-data-refs.c (.../branches/gcc-4_6-branch) -@@ -2631,6 +2631,16 @@ - return false; - } - -+ if (is_gimple_call (stmt)) -+ { -+ if (vect_print_dump_info (REPORT_UNVECTORIZED_LOCATIONS)) -+ { -+ fprintf (vect_dump, "not vectorized: dr in a call "); -+ print_gimple_stmt (vect_dump, stmt, 0, TDF_SLIM); -+ } -+ return false; -+ } -+ - /* Update DR field in stmt_vec_info struct. */ - - /* If the dataref is in an inner-loop of the loop that is considered for -Index: gcc/c-typeck.c -=================================================================== ---- a/src/gcc/c-typeck.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/c-typeck.c (.../branches/gcc-4_6-branch) -@@ -3802,11 +3802,7 @@ - if (val && TREE_CODE (val) == INDIRECT_REF - && TREE_CONSTANT (TREE_OPERAND (val, 0))) - { -- tree op0 = fold_convert_loc (location, sizetype, -- fold_offsetof (arg, val)), op1; -- -- op1 = fold_convert_loc (location, argtype, TREE_OPERAND (val, 0)); -- ret = fold_build2_loc (location, POINTER_PLUS_EXPR, argtype, op1, op0); -+ ret = fold_convert_loc (location, argtype, fold_offsetof_1 (arg)); - goto return_build_unary_op; - } - -Index: gcc/calls.c -=================================================================== ---- a/src/gcc/calls.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/calls.c (.../branches/gcc-4_6-branch) -@@ -1548,6 +1548,131 @@ - return funexp; - } - -+/* Internal state for internal_arg_pointer_based_exp and its helpers. */ -+static struct -+{ -+ /* Last insn that has been scanned by internal_arg_pointer_based_exp_scan, -+ or NULL_RTX if none has been scanned yet. */ -+ rtx scan_start; -+ /* Vector indexed by REGNO - FIRST_PSEUDO_REGISTER, recording if a pseudo is -+ based on crtl->args.internal_arg_pointer. The element is NULL_RTX if the -+ pseudo isn't based on it, a CONST_INT offset if the pseudo is based on it -+ with fixed offset, or PC if this is with variable or unknown offset. */ -+ VEC(rtx, heap) *cache; -+} internal_arg_pointer_exp_state; -+ -+static rtx internal_arg_pointer_based_exp (rtx, bool); -+ -+/* Helper function for internal_arg_pointer_based_exp. Scan insns in -+ the tail call sequence, starting with first insn that hasn't been -+ scanned yet, and note for each pseudo on the LHS whether it is based -+ on crtl->args.internal_arg_pointer or not, and what offset from that -+ that pointer it has. */ -+ -+static void -+internal_arg_pointer_based_exp_scan (void) -+{ -+ rtx insn, scan_start = internal_arg_pointer_exp_state.scan_start; -+ -+ if (scan_start == NULL_RTX) -+ insn = get_insns (); -+ else -+ insn = NEXT_INSN (scan_start); -+ -+ while (insn) -+ { -+ rtx set = single_set (insn); -+ if (set && REG_P (SET_DEST (set)) && !HARD_REGISTER_P (SET_DEST (set))) -+ { -+ rtx val = NULL_RTX; -+ unsigned int idx = REGNO (SET_DEST (set)) - FIRST_PSEUDO_REGISTER; -+ /* Punt on pseudos set multiple times. */ -+ if (idx < VEC_length (rtx, internal_arg_pointer_exp_state.cache) -+ && (VEC_index (rtx, internal_arg_pointer_exp_state.cache, idx) -+ != NULL_RTX)) -+ val = pc_rtx; -+ else -+ val = internal_arg_pointer_based_exp (SET_SRC (set), false); -+ if (val != NULL_RTX) -+ { -+ if (idx -+ >= VEC_length (rtx, internal_arg_pointer_exp_state.cache)) -+ VEC_safe_grow_cleared (rtx, heap, -+ internal_arg_pointer_exp_state.cache, -+ idx + 1); -+ VEC_replace (rtx, internal_arg_pointer_exp_state.cache, -+ idx, val); -+ } -+ } -+ if (NEXT_INSN (insn) == NULL_RTX) -+ scan_start = insn; -+ insn = NEXT_INSN (insn); -+ } -+ -+ internal_arg_pointer_exp_state.scan_start = scan_start; -+} -+ -+/* Helper function for internal_arg_pointer_based_exp, called through -+ for_each_rtx. Return 1 if *LOC is a register based on -+ crtl->args.internal_arg_pointer. Return -1 if *LOC is not based on it -+ and the subexpressions need not be examined. Otherwise return 0. */ -+ -+static int -+internal_arg_pointer_based_exp_1 (rtx *loc, void *data ATTRIBUTE_UNUSED) -+{ -+ if (REG_P (*loc) && internal_arg_pointer_based_exp (*loc, false) != NULL_RTX) -+ return 1; -+ if (MEM_P (*loc)) -+ return -1; -+ return 0; -+} -+ -+/* Compute whether RTL is based on crtl->args.internal_arg_pointer. Return -+ NULL_RTX if RTL isn't based on it, a CONST_INT offset if RTL is based on -+ it with fixed offset, or PC if this is with variable or unknown offset. -+ TOPLEVEL is true if the function is invoked at the topmost level. */ -+ -+static rtx -+internal_arg_pointer_based_exp (rtx rtl, bool toplevel) -+{ -+ if (CONSTANT_P (rtl)) -+ return NULL_RTX; -+ -+ if (rtl == crtl->args.internal_arg_pointer) -+ return const0_rtx; -+ -+ if (REG_P (rtl) && HARD_REGISTER_P (rtl)) -+ return NULL_RTX; -+ -+ if (GET_CODE (rtl) == PLUS && CONST_INT_P (XEXP (rtl, 1))) -+ { -+ rtx val = internal_arg_pointer_based_exp (XEXP (rtl, 0), toplevel); -+ if (val == NULL_RTX || val == pc_rtx) -+ return val; -+ return plus_constant (val, INTVAL (XEXP (rtl, 1))); -+ } -+ -+ /* When called at the topmost level, scan pseudo assignments in between the -+ last scanned instruction in the tail call sequence and the latest insn -+ in that sequence. */ -+ if (toplevel) -+ internal_arg_pointer_based_exp_scan (); -+ -+ if (REG_P (rtl)) -+ { -+ unsigned int idx = REGNO (rtl) - FIRST_PSEUDO_REGISTER; -+ if (idx < VEC_length (rtx, internal_arg_pointer_exp_state.cache)) -+ return VEC_index (rtx, internal_arg_pointer_exp_state.cache, idx); -+ -+ return NULL_RTX; -+ } -+ -+ if (for_each_rtx (&rtl, internal_arg_pointer_based_exp_1, NULL)) -+ return pc_rtx; -+ -+ return NULL_RTX; -+} -+ - /* Return true if and only if SIZE storage units (usually bytes) - starting from address ADDR overlap with already clobbered argument - area. This function is used to determine if we should give up a -@@ -1557,20 +1682,17 @@ - mem_overlaps_already_clobbered_arg_p (rtx addr, unsigned HOST_WIDE_INT size) - { - HOST_WIDE_INT i; -+ rtx val; - -- if (addr == crtl->args.internal_arg_pointer) -- i = 0; -- else if (GET_CODE (addr) == PLUS -- && XEXP (addr, 0) == crtl->args.internal_arg_pointer -- && CONST_INT_P (XEXP (addr, 1))) -- i = INTVAL (XEXP (addr, 1)); -- /* Return true for arg pointer based indexed addressing. */ -- else if (GET_CODE (addr) == PLUS -- && (XEXP (addr, 0) == crtl->args.internal_arg_pointer -- || XEXP (addr, 1) == crtl->args.internal_arg_pointer)) -+ if (sbitmap_empty_p (stored_args_map)) -+ return false; -+ val = internal_arg_pointer_based_exp (addr, true); -+ if (val == NULL_RTX) -+ return false; -+ else if (val == pc_rtx) - return true; - else -- return false; -+ i = INTVAL (val); - - #ifdef ARGS_GROW_DOWNWARD - i = -i - size; -@@ -3175,6 +3297,8 @@ - } - - sbitmap_free (stored_args_map); -+ internal_arg_pointer_exp_state.scan_start = NULL_RTX; -+ VEC_free (rtx, heap, internal_arg_pointer_exp_state.cache); - } - else - { -Index: gcc/cfgcleanup.c -=================================================================== ---- a/src/gcc/cfgcleanup.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/cfgcleanup.c (.../branches/gcc-4_6-branch) -@@ -1969,7 +1969,14 @@ - - cond = get_condition (jump, &move_before, true, false); - if (cond == NULL_RTX) -- move_before = jump; -+ { -+#ifdef HAVE_cc0 -+ if (reg_mentioned_p (cc0_rtx, jump)) -+ move_before = prev_nonnote_nondebug_insn (jump); -+ else -+#endif -+ move_before = jump; -+ } - - for (ix = 0; ix < nedges; ix++) - if (EDGE_SUCC (bb, ix)->dest == EXIT_BLOCK_PTR) -@@ -2131,7 +2138,14 @@ - jump = BB_END (final_dest_bb); - cond = get_condition (jump, &move_before, true, false); - if (cond == NULL_RTX) -- move_before = jump; -+ { -+#ifdef HAVE_cc0 -+ if (reg_mentioned_p (cc0_rtx, jump)) -+ move_before = prev_nonnote_nondebug_insn (jump); -+ else -+#endif -+ move_before = jump; -+ } - } - - do -Index: gcc/tree-sra.c -=================================================================== ---- a/src/gcc/tree-sra.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/tree-sra.c (.../branches/gcc-4_6-branch) -@@ -1020,26 +1020,28 @@ - return false; - } - --/* Return true iff type of EXP is not sufficiently aligned. */ -+/* Return true if EXP is a memory reference less aligned than ALIGN. This is -+ invoked only on strict-alignment targets. */ - - static bool --tree_non_mode_aligned_mem_p (tree exp) -+tree_non_aligned_mem_p (tree exp, unsigned int align) - { -- enum machine_mode mode = TYPE_MODE (TREE_TYPE (exp)); -- unsigned int align; -+ unsigned int exp_align; - - if (TREE_CODE (exp) == VIEW_CONVERT_EXPR) - exp = TREE_OPERAND (exp, 0); - -- if (TREE_CODE (exp) == SSA_NAME -- || TREE_CODE (exp) == MEM_REF -- || mode == BLKmode -- || is_gimple_min_invariant (exp) -- || !STRICT_ALIGNMENT) -+ if (TREE_CODE (exp) == SSA_NAME || is_gimple_min_invariant (exp)) - return false; - -- align = get_object_alignment (exp, BIGGEST_ALIGNMENT); -- if (GET_MODE_ALIGNMENT (mode) > align) -+ /* get_object_alignment will fall back to BITS_PER_UNIT if it cannot -+ compute an explicit alignment. Pretend that dereferenced pointers -+ are always aligned on strict-alignment targets. */ -+ exp_align = get_object_alignment (exp, BIGGEST_ALIGNMENT); -+ if (TREE_CODE (exp) == MEM_REF || TREE_CODE (exp) == TARGET_MEM_REF) -+ exp_align = MAX (TYPE_ALIGN (TREE_TYPE (exp)), exp_align); -+ -+ if (exp_align < align) - return true; - - return false; -@@ -1071,7 +1073,11 @@ - if (lacc) - { - lacc->grp_assignment_write = 1; -- lacc->grp_unscalarizable_region |= tree_non_mode_aligned_mem_p (rhs); -+ if (STRICT_ALIGNMENT -+ && tree_non_aligned_mem_p (rhs, -+ get_object_alignment (lhs, -+ BIGGEST_ALIGNMENT))) -+ lacc->grp_unscalarizable_region = 1; - } - - if (racc) -@@ -1080,7 +1086,11 @@ - if (should_scalarize_away_bitmap && !gimple_has_volatile_ops (stmt) - && !is_gimple_reg_type (racc->type)) - bitmap_set_bit (should_scalarize_away_bitmap, DECL_UID (racc->base)); -- racc->grp_unscalarizable_region |= tree_non_mode_aligned_mem_p (lhs); -+ if (STRICT_ALIGNMENT -+ && tree_non_aligned_mem_p (lhs, -+ get_object_alignment (rhs, -+ BIGGEST_ALIGNMENT))) -+ racc->grp_unscalarizable_region = 1; - } - - if (lacc && racc -@@ -1435,29 +1445,61 @@ - return fold_build2_loc (loc, MEM_REF, exp_type, base, off); - } - -+DEF_VEC_ALLOC_P_STACK (tree); -+#define VEC_tree_stack_alloc(alloc) VEC_stack_alloc (tree, alloc) -+ - /* Construct a memory reference to a part of an aggregate BASE at the given -- OFFSET and of the same type as MODEL. In case this is a reference to a -- component, the function will replicate the last COMPONENT_REF of model's -- expr to access it. GSI and INSERT_AFTER have the same meaning as in -- build_ref_for_offset. */ -+ OFFSET and of the type of MODEL. In case this is a chain of references -+ to component, the function will replicate the chain of COMPONENT_REFs of -+ the expression of MODEL to access it. GSI and INSERT_AFTER have the same -+ meaning as in build_ref_for_offset. */ - - static tree - build_ref_for_model (location_t loc, tree base, HOST_WIDE_INT offset, - struct access *model, gimple_stmt_iterator *gsi, - bool insert_after) - { -+ tree type = model->type, t; -+ VEC(tree,stack) *cr_stack = NULL; -+ - if (TREE_CODE (model->expr) == COMPONENT_REF) - { -- tree t, exp_type, fld = TREE_OPERAND (model->expr, 1); -- offset -= int_bit_position (fld); -- exp_type = TREE_TYPE (TREE_OPERAND (model->expr, 0)); -- t = build_ref_for_offset (loc, base, offset, exp_type, gsi, insert_after); -- return fold_build3_loc (loc, COMPONENT_REF, TREE_TYPE (fld), t, fld, -- NULL_TREE); -+ tree expr = model->expr; -+ -+ /* Create a stack of the COMPONENT_REFs so later we can walk them in -+ order from inner to outer. */ -+ cr_stack = VEC_alloc (tree, stack, 6); -+ -+ do { -+ tree field = TREE_OPERAND (expr, 1); -+ offset -= int_bit_position (field); -+ -+ VEC_safe_push (tree, stack, cr_stack, expr); -+ -+ expr = TREE_OPERAND (expr, 0); -+ type = TREE_TYPE (expr); -+ } while (TREE_CODE (expr) == COMPONENT_REF); - } -- else -- return build_ref_for_offset (loc, base, offset, model->type, -- gsi, insert_after); -+ -+ t = build_ref_for_offset (loc, base, offset, type, gsi, insert_after); -+ -+ if (TREE_CODE (model->expr) == COMPONENT_REF) -+ { -+ unsigned i; -+ tree expr; -+ -+ /* Now replicate the chain of COMPONENT_REFs from inner to outer. */ -+ FOR_EACH_VEC_ELT_REVERSE (tree, cr_stack, i, expr) -+ { -+ tree field = TREE_OPERAND (expr, 1); -+ t = fold_build3_loc (loc, COMPONENT_REF, TREE_TYPE (field), t, field, -+ NULL_TREE); -+ } -+ -+ VEC_free (tree, stack, cr_stack); -+ } -+ -+ return t; - } - - /* Construct a memory reference consisting of component_refs and array_refs to -@@ -2594,6 +2636,10 @@ - rhs = get_access_replacement (racc); - if (!useless_type_conversion_p (lacc->type, racc->type)) - rhs = fold_build1_loc (loc, VIEW_CONVERT_EXPR, lacc->type, rhs); -+ -+ if (racc->grp_partial_lhs && lacc->grp_partial_lhs) -+ rhs = force_gimple_operand_gsi (old_gsi, rhs, true, NULL_TREE, -+ true, GSI_SAME_STMT); - } - else - { -@@ -3604,7 +3650,8 @@ - || gimple_code (access->stmt) == GIMPLE_ASM)) - return true; - -- if (tree_non_mode_aligned_mem_p (access->expr)) -+ if (STRICT_ALIGNMENT -+ && tree_non_aligned_mem_p (access->expr, TYPE_ALIGN (access->type))) - return true; - - return false; -Index: gcc/lto/lto.c -=================================================================== ---- a/src/gcc/lto/lto.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/lto/lto.c (.../branches/gcc-4_6-branch) -@@ -198,7 +198,7 @@ - uint32_t ix; - tree decl; - uint32_t i, j; -- -+ - ix = *data++; - decl = lto_streamer_cache_get (data_in->reader_cache, (int) ix); - if (TREE_CODE (decl) != FUNCTION_DECL) -@@ -241,9 +241,9 @@ - VEC(ld_plugin_symbol_resolution_t,heap) *resolutions) - { - const struct lto_decl_header *header = (const struct lto_decl_header *) data; -- const int32_t decl_offset = sizeof (struct lto_decl_header); -- const int32_t main_offset = decl_offset + header->decl_state_size; -- const int32_t string_offset = main_offset + header->main_size; -+ const int decl_offset = sizeof (struct lto_decl_header); -+ const int main_offset = decl_offset + header->decl_state_size; -+ const int string_offset = main_offset + header->main_size; - struct lto_input_block ib_main; - struct data_in *data_in; - unsigned int i; -@@ -291,17 +291,20 @@ - - if (data_ptr != data_end) - internal_error ("bytecode stream: garbage at the end of symbols section"); -- -+ - /* Set the current decl state to be the global state. */ - decl_data->current_decl_state = decl_data->global_decl_state; - - lto_data_in_delete (data_in); - } - --/* strtoll is not portable. */ --int64_t --lto_parse_hex (const char *p) { -- uint64_t ret = 0; -+/* Custom version of strtoll, which is not portable. */ -+ -+static HOST_WIDEST_INT -+lto_parse_hex (const char *p) -+{ -+ HOST_WIDEST_INT ret = 0; -+ - for (; *p != '\0'; ++p) - { - char c = *p; -@@ -317,6 +320,7 @@ - internal_error ("could not parse hex number"); - ret |= part; - } -+ - return ret; - } - -@@ -352,7 +356,7 @@ - { - int t; - char offset_p[17]; -- int64_t offset; -+ HOST_WIDEST_INT offset; - t = fscanf (resolution, "@0x%16s", offset_p); - if (t != 1) - internal_error ("could not parse file offset"); -Index: gcc/lto/lto.h -=================================================================== ---- a/src/gcc/lto/lto.h (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/lto/lto.h (.../branches/gcc-4_6-branch) -@@ -60,6 +60,4 @@ - size_t len; - }; - --int64_t lto_parse_hex (const char *p); -- - #endif /* LTO_H */ -Index: gcc/lto/ChangeLog -=================================================================== ---- a/src/gcc/lto/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/lto/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,10 @@ -+2011-12-13 Eric Botcazou <ebotcazou@adacore.com> -+ -+ * lto.h (lto_parse_hex): Delete. -+ * lto.c (lto_read_decls): Use 'int' for offsets. -+ (lto_parse_hex): Make static and return proper 64-bit host type. -+ (lto_resolution_read): Use proper 64-bit host type. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: gcc/ipa-prop.c -=================================================================== ---- a/src/gcc/ipa-prop.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/ipa-prop.c (.../branches/gcc-4_6-branch) -@@ -2868,9 +2868,9 @@ - { - const struct lto_function_header *header = - (const struct lto_function_header *) data; -- const int32_t cfg_offset = sizeof (struct lto_function_header); -- const int32_t main_offset = cfg_offset + header->cfg_size; -- const int32_t string_offset = main_offset + header->main_size; -+ const int cfg_offset = sizeof (struct lto_function_header); -+ const int main_offset = cfg_offset + header->cfg_size; -+ const int string_offset = main_offset + header->main_size; - struct data_in *data_in; - struct lto_input_block ib_main; - unsigned int i; -Index: gcc/po/ChangeLog -=================================================================== ---- a/src/gcc/po/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/po/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,7 @@ -+2011-10-30 Joseph Myers <joseph@codesourcery.com> -+ -+ * ja.po: Update. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: gcc/po/ja.po -=================================================================== ---- a/src/gcc/po/ja.po (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/po/ja.po (.../branches/gcc-4_6-branch) -@@ -20,7 +20,7 @@ - "Project-Id-Version: gcc 4.6.1\n" - "Report-Msgid-Bugs-To: http://gcc.gnu.org/bugs.html\n" - "POT-Creation-Date: 2011-06-21 10:27+0000\n" --"PO-Revision-Date: 2011-10-25 22:36+0900\n" -+"PO-Revision-Date: 2011-10-30 18:48+0900\n" - "Last-Translator: Yasuaki Taniguchi <yasuakit@gmail.com>\n" - "Language-Team: Japanese <translation-team-ja@lists.sourceforge.net>\n" - "Language: ja\n" -@@ -834,12 +834,12 @@ - #: gcov.c:420 - #, c-format - msgid " -a, --all-blocks Show information for every basic block\n" --msgstr "" -+msgstr " -a, --all-blocks 各基本ブロックに関する情報を表示する\n" - - #: gcov.c:421 - #, c-format - msgid " -b, --branch-probabilities Include branch probabilities in output\n" --msgstr "" -+msgstr " -b, --branch-probabilities 出力に分岐可能性情報を含める\n" - - #: gcov.c:422 - #, c-format -@@ -847,6 +847,8 @@ - " -c, --branch-counts Given counts of branches taken\n" - " rather than percentages\n" - msgstr "" -+" -c, --branch-counts 分岐に関する百分率では無く行われた\n" -+" 回数を取得する\n" - - #: gcov.c:424 - #, c-format -@@ -859,21 +861,23 @@ - " -l, --long-file-names Use long output file names for included\n" - " source files\n" - msgstr "" -+" -l, --long-file-names インクルードされたソースファイルに関する長い\n" -+" 出力ファイル名を使用する\n" - - #: gcov.c:427 - #, c-format - msgid " -f, --function-summaries Output summaries for each function\n" --msgstr "" -+msgstr " -f, --function-summaries 各関数に関する要約を出力する\n" - - #: gcov.c:428 - #, c-format - msgid " -o, --object-directory DIR|FILE Search for object files in DIR or called FILE\n" --msgstr "" -+msgstr " -o, --object-directory DIR|FILE オブジェクトファイルを DIR 内または呼び出し用 FILE 内で検索する\n" - - #: gcov.c:429 - #, c-format - msgid " -p, --preserve-paths Preserve all pathname components\n" --msgstr "" -+msgstr " -p, --preserve-paths すべてのパス名要素を保護する\n" - - #: gcov.c:430 - #, c-format -@@ -977,7 +981,7 @@ - #: gcov.c:1045 - #, c-format - msgid "%s:cannot open data file, assuming not executed\n" --msgstr "" -+msgstr "%s:データファイルを開けません。実行されていないと見なします\n" - - #: gcov.c:1052 - #, c-format -@@ -1027,7 +1031,7 @@ - #: gcov.c:1379 - #, c-format - msgid "%s:graph is unsolvable for '%s'\n" --msgstr "" -+msgstr "%s: '%s' 用のグラフが解決できません\n" - - #: gcov.c:1459 - #, c-format -@@ -1037,7 +1041,7 @@ - #: gcov.c:1462 - #, c-format - msgid "Lines executed:%s of %d\n" --msgstr "" -+msgstr "実行された行:%s of %d\n" - - #: gcov.c:1466 - #, c-format -@@ -1047,7 +1051,7 @@ - #: gcov.c:1472 - #, c-format - msgid "Branches executed:%s of %d\n" --msgstr "" -+msgstr "実行された分岐:%s of %d\n" - - #: gcov.c:1476 - #, c-format -@@ -1057,12 +1061,12 @@ - #: gcov.c:1482 - #, c-format - msgid "No branches\n" --msgstr "" -+msgstr "分岐がありません\n" - - #: gcov.c:1484 - #, c-format - msgid "Calls executed:%s of %d\n" --msgstr "" -+msgstr "実行された呼び出し:%s of %d\n" - - #: gcov.c:1488 - #, c-format -@@ -1075,24 +1079,24 @@ - msgstr "%s: '%s' に対する行がありません\n" - - #: gcov.c:1843 --#, fuzzy, c-format -+#, c-format - msgid "call %2d returned %s\n" --msgstr "呼び出し %d の戻り = %d\n" -+msgstr "" - - #: gcov.c:1848 --#, fuzzy, c-format -+#, c-format - msgid "call %2d never executed\n" --msgstr "呼び出し %d は一度も実行せず\n" -+msgstr "" - - #: gcov.c:1853 --#, fuzzy, c-format -+#, c-format - msgid "branch %2d taken %s%s\n" --msgstr "ブランチ %d 受理 = %d%%\n" -+msgstr "" - - #: gcov.c:1857 --#, fuzzy, c-format -+#, c-format - msgid "branch %2d never executed\n" --msgstr "ブランチ %d は一度も実行されず\n" -+msgstr "" - - #: gcov.c:1862 - #, c-format -@@ -1100,9 +1104,9 @@ - msgstr "" - - #: gcov.c:1865 --#, fuzzy, c-format -+#, c-format - msgid "unconditional %2d never executed\n" --msgstr "呼び出し %d は一度も実行せず\n" -+msgstr "" - - #: gcov.c:1901 - #, c-format -@@ -1412,11 +1416,11 @@ - - #: opts.c:1183 - msgid "The following options take separate arguments" --msgstr "" -+msgstr "次のオプションは分離した引数を取ります" - - #: opts.c:1185 - msgid "The following options take joined arguments" --msgstr "" -+msgstr "次のオプションは結合した引数を取ります" - - #: opts.c:1196 - msgid "The following options are language-related" -@@ -1472,7 +1476,7 @@ - #: targhooks.c:1469 - #, c-format - msgid "created and used with differing settings of '%s'" --msgstr "" -+msgstr "作成時と使用時で '%s' の設定が異なります" - - #: targhooks.c:1471 - msgid "out of memory" -@@ -1480,11 +1484,11 @@ - - #: targhooks.c:1486 - msgid "created and used with different settings of -fpic" --msgstr "" -+msgstr "作成時と使用時で -fpic の設定が異なります" - - #: targhooks.c:1488 - msgid "created and used with different settings of -fpie" --msgstr "" -+msgstr "作成時と使用時で -fpie の設定が異なります" - - #: tlink.c:386 - #, c-format -@@ -1717,11 +1721,11 @@ - - #: params.def:100 - msgid "The maximum depth of recursive inlining for inline functions" --msgstr "" -+msgstr "インライン関数を再帰的にインライン化する時の最大深度" - - #: params.def:105 - msgid "The maximum depth of recursive inlining for non-inline functions" --msgstr "" -+msgstr "非インライン関数を再帰的にインライン化する時の最大深度" - - #: params.def:110 - msgid "Inline recursively only when the probability of call being executed exceeds the parameter" -@@ -1761,16 +1765,15 @@ - - #: params.def:180 - msgid "The size of function body to be considered large" --msgstr "" -+msgstr "大きいと見なされる関数本体のサイズ" - - #: params.def:184 - msgid "Maximal growth due to inlining of large function (in percent)" - msgstr "" - - #: params.def:188 --#, fuzzy - msgid "The size of translation unit to be considered large" --msgstr "翻訳単位全体をファイルにダンプする" -+msgstr "大きいと見なされる翻訳単位のサイズ" - - #: params.def:192 - msgid "How much can given compilation unit grow because of the inlining (in percent)" -@@ -1786,20 +1789,19 @@ - - #: params.def:204 - msgid "The size of stack frame to be considered large" --msgstr "" -+msgstr "大きいと見なされるスタックフレームのサイズ" - - #: params.def:208 - msgid "Maximal stack frame growth due to inlining (in percent)" --msgstr "" -+msgstr "インライン化によって増加するスタックフレームの最大量 (百分率)" - - #: params.def:215 - msgid "The maximum amount of memory to be allocated by GCSE" --msgstr "" -+msgstr "GCSE によって配置されるメモリの最大量" - - #: params.def:222 --#, fuzzy - msgid "The maximum ratio of insertions to deletions of expressions in GCSE" --msgstr "RPTS 用の最大反復数を指定する" -+msgstr "" - - #: params.def:233 - msgid "The threshold ratio for performing partial redundancy elimination after reload" -@@ -1963,9 +1965,8 @@ - msgstr "" - - #: params.def:470 --#, fuzzy - msgid "Bound on number of iv uses in loop optimized in iv optimizations" --msgstr "目立たない、コストのかかる最適化を行なう" -+msgstr "" - - #: params.def:478 - msgid "If number of candidates in the set is smaller, we always try to remove unused ivs during its optimization" -@@ -2044,9 +2045,8 @@ - msgstr "" - - #: params.def:594 --#, fuzzy - msgid "The maximum number of iterations through CFG to extend regions" --msgstr "RPTS 用の最大反復数を指定する" -+msgstr "" - - #: params.def:599 - msgid "The maximum conflict delay for an insn to be considered for speculative motion" -@@ -2077,9 +2077,8 @@ - msgstr "" - - #: params.def:637 --#, fuzzy - msgid "The upper bound for sharing integer constants" --msgstr "`%s' の列挙値が整数定数ではありません" -+msgstr "整数定数を共有するための上限値" - - #: params.def:656 - msgid "Minimum number of virtual mappings to consider switching to full virtual renames" -@@ -2111,11 +2110,11 @@ - - #: params.def:714 - msgid "The number of insns executed before prefetch is completed" --msgstr "" -+msgstr "プリフェッチが完了する前に実行される命令数" - - #: params.def:721 - msgid "The number of prefetches that can run at the same time" --msgstr "" -+msgstr "同時に実行可能なプリフェッチの数" - - #: params.def:728 - msgid "The size of L1 cache" -@@ -2162,9 +2161,8 @@ - msgstr "" - - #: params.def:806 --#, fuzzy - msgid "maximum number of parameters in a SCoP" --msgstr "RPTS 用の最大反復数を指定する" -+msgstr "SCoP 内のパラメータの最大数" - - #: params.def:813 - msgid "maximum number of basic blocks per function to be analyzed by Graphite" -@@ -2597,9 +2595,9 @@ - msgstr "無効な %%E 値" - - #: config/alpha/alpha.c:5431 config/alpha/alpha.c:5479 --#, fuzzy, c-format -+#, c-format - msgid "unknown relocation unspec" --msgstr "不明な設定済コンストラクタ型です" -+msgstr "" - - #: config/alpha/alpha.c:5440 config/crx/crx.c:1119 - #: config/rs6000/rs6000.c:16490 config/spu/spu.c:1726 -@@ -3000,32 +2998,32 @@ - #: config/i386/i386.c:14106 config/i386/i386.c:14146 - #, c-format - msgid "operand is not a condition code, invalid operand code 'D'" --msgstr "" -+msgstr "被演算子は条件コードではありません。無効な被演算子コード 'D' です" - - #: config/i386/i386.c:14172 - #, c-format - msgid "operand is neither a constant nor a condition code, invalid operand code 'C'" --msgstr "" -+msgstr "被演算子は定数でも条件コードでもありません。無効な被演算子コード 'C' です" - - #: config/i386/i386.c:14182 - #, c-format - msgid "operand is neither a constant nor a condition code, invalid operand code 'F'" --msgstr "" -+msgstr "被演算子は定数でも条件コードでもありません。無効な被演算子コード 'F' です" - - #: config/i386/i386.c:14200 - #, c-format - msgid "operand is neither a constant nor a condition code, invalid operand code 'c'" --msgstr "" -+msgstr "被演算子は定数でも条件コードでもありません。無効な被演算子コード 'c' です" - - #: config/i386/i386.c:14210 - #, c-format - msgid "operand is neither a constant nor a condition code, invalid operand code 'f'" --msgstr "" -+msgstr "被演算子は定数でも条件コードでもありません。無効な被演算子コード 'f' です" - - #: config/i386/i386.c:14313 - #, c-format - msgid "operand is not a condition code, invalid operand code 'Y'" --msgstr "" -+msgstr "被演算子は条件コードではありません。無効な被演算子コード 'Y' です" - - #: config/i386/i386.c:14339 - #, c-format -@@ -3098,7 +3096,7 @@ - #: config/lm32/lm32.c:529 - #, c-format - msgid "only 0.0 can be loaded as an immediate" --msgstr "" -+msgstr "即値としてロードできるのは 0.0 のみです" - - #: config/lm32/lm32.c:599 - msgid "bad operand" -@@ -3138,15 +3136,15 @@ - - #: config/m32r/m32r.c:2290 - msgid "pre-increment address is not a register" --msgstr "" -+msgstr "前置増分アドレスがレジスタではありません" - - #: config/m32r/m32r.c:2297 - msgid "pre-decrement address is not a register" --msgstr "" -+msgstr "前置減分アドレスがレジスタではありません" - - #: config/m32r/m32r.c:2304 - msgid "post-increment address is not a register" --msgstr "" -+msgstr "後置増分アドレスがレジスタではありません" - - #: config/m32r/m32r.c:2380 config/m32r/m32r.c:2394 - #: config/rs6000/rs6000.c:25500 -@@ -3252,7 +3250,7 @@ - - #: config/mmix/mmix.c:1589 config/mmix/mmix.c:1719 - msgid "MMIX Internal: Expected a CONST_INT, not this" --msgstr "" -+msgstr "MMIX 内部: CONST_INT が予期されますが、異なっています" - - #: config/mmix/mmix.c:1668 - msgid "MMIX Internal: Bad value for 'm', not a CONST_INT" -@@ -3260,11 +3258,11 @@ - - #: config/mmix/mmix.c:1687 - msgid "MMIX Internal: Expected a register, not this" --msgstr "" -+msgstr "MMIX 内部: レジスタが予期されますが、異なっています" - - #: config/mmix/mmix.c:1697 - msgid "MMIX Internal: Expected a constant, not this" --msgstr "" -+msgstr "MMIX 内部: 定数が予期されますが、異なっています" - - #. We need the original here. - #: config/mmix/mmix.c:1781 -@@ -3301,7 +3299,7 @@ - - #: config/picochip/picochip.c:2983 config/picochip/picochip.c:3015 - msgid "Bad address, not (reg+disp):" --msgstr "" -+msgstr "誤ったアドレスです。 (reg+disp) ではありません:" - - #: config/picochip/picochip.c:3029 - msgid "Bad address, not register:" -@@ -3526,15 +3524,15 @@ - - #: config/sh/sh.c:9271 - msgid "created and used with different architectures / ABIs" --msgstr "" -+msgstr "作成時と使用時で アーキテクチャ/ABI が異なります" - - #: config/sh/sh.c:9273 - msgid "created and used with different ABIs" --msgstr "" -+msgstr "作成時と使用時で ABI が異なります" - - #: config/sh/sh.c:9275 - msgid "created and used with different endianness" --msgstr "" -+msgstr "作成時と使用時でエンディアンが異なります" - - #: config/sparc/sparc.c:7445 config/sparc/sparc.c:7451 - #, c-format -@@ -3617,7 +3615,7 @@ - #: config/vax/vax.c:427 - #, c-format - msgid "symbol with offset used in PIC mode" --msgstr "" -+msgstr "PIC モードで使用されるオフセット付きのシンボルです" - - #: config/vax/vax.c:513 - #, c-format -@@ -3837,19 +3835,19 @@ - msgstr "%s:%d:%d: ここから再帰的に実体化されました" - - #: cp/error.c:2913 --#, fuzzy, c-format -+#, c-format - msgid "%s:%d:%d: instantiated from here" - msgstr "%s:%d:%d: ここから実体化されました" - - #: cp/error.c:2918 - #, c-format - msgid "%s:%d: recursively instantiated from here" --msgstr "" -+msgstr "%s:%d: ここから再帰的に実体化されました" - - #: cp/error.c:2919 --#, fuzzy, c-format -+#, c-format - msgid "%s:%d: instantiated from here" --msgstr "%s:%d: ここで実体化されました\n" -+msgstr "%s:%d: ここから実体化されました" - - #: cp/error.c:2962 - #, c-format -@@ -4029,22 +4027,21 @@ - #: fortran/expr.c:607 - #, c-format - msgid "Constant expression required at %C" --msgstr "" -+msgstr "%C では定数式が要求されます" - - #: fortran/expr.c:610 - #, c-format - msgid "Integer expression required at %C" --msgstr "" -+msgstr "%C では整数式が要求されます" - - #: fortran/expr.c:615 --#, fuzzy, c-format -+#, c-format - msgid "Integer value too large in expression at %C" --msgstr "式の整数がオーバーフローしました" -+msgstr "%C の式内で整数値が大きすぎます" - - #: fortran/expr.c:3147 --#, fuzzy - msgid "array assignment" --msgstr "代入" -+msgstr "配列代入" - - #: fortran/gfortranspec.c:303 - #, c-format -@@ -4080,7 +4077,7 @@ - - #: fortran/io.c:551 - msgid "Unexpected element '%c' in format string at %L" --msgstr "" -+msgstr "予期しない要素 '%c' が書式文字列内 (位置 %L) にあります" - - #: fortran/io.c:553 - msgid "Unexpected end of format string" -@@ -4088,15 +4085,15 @@ - - #: fortran/io.c:554 - msgid "Zero width in format descriptor" --msgstr "" -+msgstr "幅 0 の書式記述子です" - - #: fortran/io.c:574 - msgid "Missing leading left parenthesis" --msgstr "" -+msgstr "前に左小括弧がありません" - - #: fortran/io.c:603 - msgid "Left parenthesis required after '*'" --msgstr "" -+msgstr "'*' の後には左小括弧が必要です" - - #: fortran/io.c:634 - msgid "Expected P edit descriptor" -@@ -4116,9 +4113,8 @@ - msgstr "" - - #: fortran/io.c:844 --#, fuzzy - msgid "E specifier not allowed with g0 descriptor" --msgstr "型指定子 `%s' は struct や class の後には使えません" -+msgstr "" - - #: fortran/io.c:914 - msgid "Positive exponent width required" -@@ -4362,9 +4358,8 @@ - msgstr "" - - #: fortran/resolve.c:6233 --#, fuzzy - msgid "End expression in DO loop" --msgstr "オペランドとして無効な式" -+msgstr "" - - #: fortran/resolve.c:6237 - msgid "Step expression in DO loop" -@@ -4564,7 +4559,7 @@ - #: java/jcf-dump.c:1148 - #, c-format - msgid " --extdirs PATH Set extensions directory path\n" --msgstr "" -+msgstr " --extdirs PATH 拡張のディレクトリパスを設定する\n" - - #: java/jcf-dump.c:1149 - #, c-format -@@ -4734,18 +4729,18 @@ - #: config/pa/pa-hpux11.h:111 config/pa/pa64-hpux.h:30 config/pa/pa64-hpux.h:33 - #: config/pa/pa64-hpux.h:42 config/pa/pa64-hpux.h:45 - msgid "warning: consider linking with '-static' as system libraries with" --msgstr "" -+msgstr "警告: システムライブラリとリンクする時は '-static' を指定することを検討してください" - - #: config/pa/pa-hpux10.h:90 config/pa/pa-hpux10.h:93 config/pa/pa-hpux10.h:101 - #: config/pa/pa-hpux10.h:104 config/pa/pa-hpux11.h:109 - #: config/pa/pa-hpux11.h:112 config/pa/pa64-hpux.h:31 config/pa/pa64-hpux.h:34 - #: config/pa/pa64-hpux.h:43 config/pa/pa64-hpux.h:46 - msgid " profiling support are only provided in archive format" --msgstr "" -+msgstr " プロファイリングサポートは書庫フォーマット内でのみ提供されます" - - #: config/rs6000/darwin.h:99 - msgid " conflicting code gen style switches are used" --msgstr "" -+msgstr " 競合しているコード生成スタイルスイッチが使用されています" - - #: config/arm/arm.h:178 - msgid "-msoft-float and -mhard_float may not be used together" -@@ -4805,7 +4800,7 @@ - - #: config/i386/linux-unwind.h:186 - msgid "ax ; {int $0x80 | syscall" --msgstr "" -+msgstr "ax ; {int $0x80 | syscall" - - #: config/s390/tpf.h:120 - msgid "static is not supported on TPF-OS" -@@ -4869,7 +4864,7 @@ - - #: java/lang.opt:206 - msgid "--extdirs=<path>\tSet the extension directory path" --msgstr "" -+msgstr "--extdirs=<path>\t拡張のディレクトリパスを設定する" - - #: java/lang.opt:216 - msgid "Input file is a file with a list of filenames to compile" -@@ -5388,7 +5383,7 @@ - - #: config/frv/frv.opt:31 - msgid "Enable label alignment optimizations" --msgstr "" -+msgstr "ラベル整列最適化を有効にする" - - #: config/frv/frv.opt:35 - msgid "Dynamically allocate cc registers" -@@ -5452,7 +5447,7 @@ - - #: config/frv/frv.opt:116 - msgid "Enable use of GPREL for read-only data in FDPIC" --msgstr "" -+msgstr "FDPIC 内の読み取り専用データ用 GPREL の使用を有効にする" - - #: config/frv/frv.opt:120 config/rs6000/rs6000.opt:216 - #: config/pdp11/pdp11.opt:67 -@@ -5460,9 +5455,8 @@ - msgstr "ハードウェア浮動小数点を利用する" - - #: config/frv/frv.opt:124 config/bfin/bfin.opt:77 --#, fuzzy - msgid "Enable inlining of PLT in function calls" --msgstr "関数呼び出しの前後でレジスタの保存を有効にする" -+msgstr "関数呼び出し内で PLT のインライン化を有効にする" - - #: config/frv/frv.opt:128 - msgid "Enable PIC support for building libraries" -@@ -5478,7 +5472,7 @@ - - #: config/frv/frv.opt:140 - msgid "Use media instructions" --msgstr "" -+msgstr "media 命令を使用する" - - #: config/frv/frv.opt:144 - msgid "Use multiply add/subtract instructions" -@@ -5494,7 +5488,7 @@ - - #: config/frv/frv.opt:157 - msgid "Do not mark ABI switches in e_flags" --msgstr "" -+msgstr "e_flags 内の ABI スイッチをマークしない" - - #: config/frv/frv.opt:161 - msgid "Remove redundant membars" -@@ -5506,7 +5500,7 @@ - - #: config/frv/frv.opt:169 - msgid "Enable setting GPRs to the result of comparisons" --msgstr "" -+msgstr "比較結果を汎用レジスタに設定することを有効にする" - - #: config/frv/frv.opt:173 - msgid "Change the amount of scheduler lookahead" -@@ -5565,9 +5559,8 @@ - msgstr "" - - #: config/mn10300/mn10300.opt:56 --#, fuzzy - msgid "Allow gcc to generate LIW instructions" --msgstr "gcc が repeat/erepeat 命令を使用することを許可する" -+msgstr "gcc が LIW 命令を生成することを許可する" - - #: config/s390/tpf.opt:23 - msgid "Enable TPF-OS tracing code" -@@ -5640,11 +5633,11 @@ - - #: config/s390/s390.opt:91 - msgid "Warn if a function uses alloca or creates an array with dynamic size" --msgstr "" -+msgstr "関数で alloca を使用するか、または動的サイズの配列を作成した場合に、警告する" - - #: config/s390/s390.opt:95 - msgid "Warn if a single function's framesize exceeds the given framesize" --msgstr "" -+msgstr "一つの関数のフレームサイズが与えられたフレームサイズを超過する場合に警告する" - - #: config/s390/s390.opt:99 - msgid "z/Architecture" -@@ -5692,7 +5685,7 @@ - - #: config/ia64/ia64.opt:56 - msgid "gp is constant (but save/restore gp on indirect calls)" --msgstr "gp を定数とする（但、間接呼び出しでは gp を save/restore する）" -+msgstr "gp を定数とする（ただし、間接呼び出しでは gp を save/restore する）" - - #: config/ia64/ia64.opt:60 - msgid "Generate self-relocatable code" -@@ -5741,39 +5734,39 @@ - #: config/ia64/ia64.opt:107 config/spu/spu.opt:72 config/sh/sh.opt:258 - #: config/pa/pa.opt:51 - msgid "Specify range of registers to make fixed" --msgstr "" -+msgstr "固定するレジスタの範囲を指定する" - - #: config/ia64/ia64.opt:119 - msgid "Use data speculation before reload" --msgstr "" -+msgstr "reload 前にデータ投機を使用する" - - #: config/ia64/ia64.opt:123 - msgid "Use data speculation after reload" --msgstr "" -+msgstr "reload 後にデータ投機を使用する" - - #: config/ia64/ia64.opt:127 - msgid "Use control speculation" --msgstr "" -+msgstr "制御投機を使用する" - - #: config/ia64/ia64.opt:131 - msgid "Use in block data speculation before reload" --msgstr "" -+msgstr "reload 前にブロック内データ投機を使用する" - - #: config/ia64/ia64.opt:135 - msgid "Use in block data speculation after reload" --msgstr "" -+msgstr "reload 後にブロック内データ投機を使用する" - - #: config/ia64/ia64.opt:139 - msgid "Use in block control speculation" --msgstr "" -+msgstr "ブロック内制御投機を使用する" - - #: config/ia64/ia64.opt:143 - msgid "Use simple data speculation check" --msgstr "" -+msgstr "単純データ投機検査を使用する" - - #: config/ia64/ia64.opt:147 - msgid "Use simple data speculation check for control speculation" --msgstr "" -+msgstr "制御投機用の単純データ投機検査を使用する" - - #: config/ia64/ia64.opt:151 - msgid "If set, data speculative instructions will be chosen for schedule only if there are no other choices at the moment " -@@ -5789,7 +5782,7 @@ - - #: config/ia64/ia64.opt:163 - msgid "Place a stop bit after every cycle when scheduling" --msgstr "" -+msgstr "スケジューリング時の各サイクル後にストップビットを配置する" - - #: config/ia64/ia64.opt:167 - msgid "Assume that floating-point stores and loads are not likely to cause conflict when placed into one instruction group" -@@ -5805,7 +5798,7 @@ - - #: config/ia64/ia64.opt:179 - msgid "Don't generate checks for control speculation in selective scheduling" --msgstr "" -+msgstr "選択的スケジューリング内では制御投機用の検査を生成しない" - - #: config/ia64/vms_symvec_libgcc_s.opt:3 - msgid "! It would be better to auto-generate this file." -@@ -6109,7 +6102,7 @@ - - #: config/m68k/m68k.opt:160 config/bfin/bfin.opt:61 - msgid "Enable separate data segment" --msgstr "" -+msgstr "分離データセグメントを有効にする" - - #: config/m68k/m68k.opt:164 config/bfin/bfin.opt:57 - msgid "ID of shared library to build" -@@ -6149,7 +6142,7 @@ - - #: config/i386/mingw.opt:23 - msgid "Warn about none ISO msvcrt scanf/printf width extensions" --msgstr "" -+msgstr "非 ISO の msvcrt scanf/printf の幅拡張に関して警告する" - - #: config/i386/mingw.opt:27 - msgid "For nested functions on stack executable permission is set." -@@ -6201,7 +6194,7 @@ - - #: config/i386/i386.opt:114 - msgid "Data greater than given threshold will go into .ldata section in x86-64 medium model" --msgstr "" -+msgstr "x86-64 メディアモデルでは与えられた閾値より大きいデータを .ldata セクションに配置する" - - #: config/i386/i386.opt:118 - msgid "Use given x86-64 code model" -@@ -6217,16 +6210,15 @@ - - #: config/i386/i386.opt:129 - msgid "Always use Dynamic Realigned Argument Pointer (DRAP) to realign stack" --msgstr "" -+msgstr "スタックを再整列するために動的再整列引数ポインタ (Dynamic Realigned Argument Pointer, DRAP) を常に使用する" - - #: config/i386/i386.opt:133 - msgid "Return values of functions in FPU registers" - msgstr "FPU レジスタ内の機能の値を返す" - - #: config/i386/i386.opt:137 --#, fuzzy - msgid "Generate floating point mathematics using given instruction set" --msgstr "ハードウェア浮動小数点命令を使用する" -+msgstr "与えられた命令集合を使用して浮動小数数値計算を生成する" - - #: config/i386/i386.opt:149 - msgid "Inline all known string operations" -@@ -6314,8 +6306,9 @@ - msgstr "8 バイトベクトルをメモリに返す" - - #: config/i386/i386.opt:253 -+#, fuzzy - msgid "Generate reciprocals instead of divss and sqrtss." --msgstr "" -+msgstr "divss および sqrtss の代わりに逆数 (reciprocal) を生成する" - - #: config/i386/i386.opt:257 - msgid "Generate cld instruction in the function prologue." -@@ -6331,7 +6324,7 @@ - - #: config/i386/i386.opt:271 - msgid "Use 128-bit AVX instructions instead of 256-bit AVX instructions in the auto-vectorizer." --msgstr "" -+msgstr "自動ベクトル化で 256 ビット AVX 命令の代わりに 128 ビット AVX 命令を使用する" - - #: config/i386/i386.opt:277 - msgid "Generate 32bit i386 code" -@@ -6382,9 +6375,8 @@ - msgstr "SSE4.1 と SSE4.2 の組み込み関数とコード生成をサポートしない" - - #: config/i386/i386.opt:328 --#, fuzzy - msgid "%<-msse5%> was removed" --msgstr "'-msse5' は削除されました" -+msgstr "%<-msse5%> は削除されました" - - #: config/i386/i386.opt:333 - msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2 and AVX built-in functions and code generation" -@@ -6544,7 +6536,7 @@ - - #: config/rs6000/rs6000.opt:152 - msgid "Use PowerPC General Purpose group optional instructions" --msgstr "PowerPC 一般用途グループオプション命令を使用する" -+msgstr "PowerPC 汎用グループオプション命令を使用する" - - #: config/rs6000/rs6000.opt:156 - msgid "Use PowerPC Graphics group optional instructions" -@@ -7002,7 +6994,7 @@ - - #: config/mcore/mcore.opt:56 config/fr30/fr30.opt:27 - msgid "Assume that run-time support has been provided, so omit -lsim from the linker command line" --msgstr "" -+msgstr "実行時サポートが提供されると見なし、リンカコマンドラインに -lsim を含めない" - - #: config/mcore/mcore.opt:60 - msgid "Use arbitrary sized immediates in bit operations" -@@ -7014,7 +7006,7 @@ - - #: config/mcore/mcore.opt:71 - msgid "Set the maximum amount for a single stack increment operation" --msgstr "単一のスタックインクリメント操作の最大値を設定する" -+msgstr "単一のスタック増分操作の最大値を設定する" - - #: config/mcore/mcore.opt:75 - msgid "Always treat bitfields as int-sized" -@@ -7234,7 +7226,7 @@ - - #: config/sh/sh.opt:246 - msgid "Division strategy, one of: call, call2, fp, inv, inv:minlat, inv20u, inv20l, inv:call, inv:call2, inv:fp, call-div1, call-fp, call-table" --msgstr "" -+msgstr "除算戦略、次のいずれか: call, call2, fp, inv, inv:minlat, inv20u, inv20l, inv:call, inv:call2, inv:fp, call-div1, call-fp, call-table" - - #: config/sh/sh.opt:250 - msgid "Specify name for 32 bit signed division function" -@@ -7282,7 +7274,7 @@ - - #: config/sh/sh.opt:298 - msgid "Mark MAC register as call-clobbered" --msgstr "" -+msgstr "MAC レジスタを呼び出しで破壊されるとマークする" - - #: config/sh/sh.opt:304 - msgid "Make structs a multiple of 4 bytes (warning: ABI altered)" -@@ -7960,7 +7952,7 @@ - - #: config/m68hc11/m68hc11.opt:49 - msgid "Auto pre/post decrement increment allowed" --msgstr "自動 pre/post デクリメント インクリメントを許容する" -+msgstr "自動 前置/後置 減分/増分 を許容する" - - #: config/m68hc11/m68hc11.opt:53 - msgid "Min/max instructions allowed" -@@ -7972,7 +7964,7 @@ - - #: config/m68hc11/m68hc11.opt:61 - msgid "Auto pre/post decrement increment not allowed" --msgstr "自動 pre/post デクリメント インクリメントを許容しない" -+msgstr "自動 前置/後置 減分/増分を許容しない" - - #: config/m68hc11/m68hc11.opt:65 - msgid "Use jsr and rts for function calls and returns" -@@ -8346,7 +8338,7 @@ - - #: config/bfin/bfin.opt:69 - msgid "Link with the fast floating-point library" --msgstr "" -+msgstr "高速な浮動小数ライブラリとリンクする" - - #: config/bfin/bfin.opt:81 - msgid "Do stack checking using bounds in L1 scratch memory" -@@ -8382,7 +8374,7 @@ - - #: config/picochip/picochip.opt:31 - msgid "Specify whether the byte access instructions should be used. Enabled by default." --msgstr "" -+msgstr "バイトアクセス命令を使用するかどうかを指定する。デフォルトでは有効となる" - - #: config/picochip/picochip.opt:35 - msgid "Enable debug output to be generated." -@@ -8390,11 +8382,11 @@ - - #: config/picochip/picochip.opt:39 - msgid "Allow a symbol value to be used as an immediate value in an instruction." --msgstr "" -+msgstr "命令内でシンボル値が即値として使用されることを許可する" - - #: config/picochip/picochip.opt:43 - msgid "Generate warnings when inefficient code is known to be generated." --msgstr "" -+msgstr "非効率なコードが生成された時に警告する" - - #: config/vxworks.opt:36 - msgid "Assume the VxWorks RTP environment" -@@ -8418,7 +8410,7 @@ - - #: config/darwin.opt:205 - msgid "Warn if constant CFString objects contain non-portable characters" --msgstr "" -+msgstr "定数 CFString オブジェクトが移植性の無い文字を含む場合に警告する" - - #: config/darwin.opt:210 - msgid "Generate AT&T-style stubs for Mach-O" -@@ -8430,7 +8422,7 @@ - - #: config/darwin.opt:218 - msgid "Generate code suitable for fast turn around debugging" --msgstr "" -+msgstr "デバッグを高速に行うために適したコードを生成する" - - #: config/darwin.opt:227 - msgid "The earliest MacOS X version on which this program will run" -@@ -8442,15 +8434,15 @@ - - #: config/darwin.opt:235 - msgid "Generate code for darwin loadable kernel extensions" --msgstr "" -+msgstr "darwin ロード可能カーネル拡張用のコードを生成する" - - #: config/darwin.opt:239 - msgid "Generate code for the kernel or loadable kernel extensions" --msgstr "" -+msgstr "カーネル用、またはロード可能カーネル拡張用のコードを生成する" - - #: config/darwin.opt:243 - msgid "-iframework <dir>\tAdd <dir> to the end of the system framework include path" --msgstr "" -+msgstr "-iframework <dir>\t<dir> をシステムフレームワークインクルードパスの末尾に加える" - - #: config/lynx.opt:23 - msgid "Support legacy multi-threading" -@@ -8737,7 +8729,6 @@ - msgstr "" - - #: config/microblaze/microblaze.opt:92 --#, fuzzy - msgid "Use hardware floating point conversion instructions" - msgstr "ハードウェア浮動小数点変換命令を使用する" - -@@ -8862,7 +8853,7 @@ - - #: c-family/c.opt:249 - msgid "-MT <target>\tAdd an unquoted target" --msgstr "" -+msgstr "-MT <target>\tターゲット (引用符を付けない) を追加する" - - #: c-family/c.opt:253 - msgid "Do not generate #line directives" -@@ -8898,11 +8889,11 @@ - - #: c-family/c.opt:288 - msgid "Warn about C constructs that are not in the common subset of C and C++" --msgstr "" -+msgstr "C と C++ の共通部分集合では無い C 構文に関して警告する" - - #: c-family/c.opt:292 - msgid "Warn about C++ constructs whose meaning differs between ISO C++ 1998 and ISO C++ 200x" --msgstr "" -+msgstr "ISO C++ 1998 と ISO C++ 200x で意味が異なる C++ 構文に関して警告する" - - #: c-family/c.opt:296 - msgid "Warn about casts which discard qualifiers" -@@ -8962,7 +8953,7 @@ - - #: c-family/c.opt:352 - msgid "Warn about stray tokens after #elif and #endif" --msgstr "" -+msgstr "#elif および #endif の後にあるはぐれたトークンに関して警告する" - - #: c-family/c.opt:356 - msgid "Warn about comparison of different enum types" -@@ -8977,9 +8968,8 @@ - msgstr "浮動小数点数の等価比較に関して警告する" - - #: c-family/c.opt:372 --#, fuzzy - msgid "Warn about printf/scanf/strftime/strfmon format string anomalies" --msgstr "printf/scanf/strftime/strfmon 形式の変則的なものに関して警告する" -+msgstr "printf/scanf/strftime/strfmon 書式文字列異常に関して警告する" - - #: c-family/c.opt:376 - msgid "Warn if passing too many arguments to a function for its format string" -@@ -8998,9 +8988,8 @@ - msgstr "セキュリティ問題になる可能性がある書式関数に関して警告する" - - #: c-family/c.opt:392 --#, fuzzy - msgid "Warn about strftime formats yielding 2-digit years" --msgstr "strftime 形式が二桁で年を表している時の警告しない" -+msgstr "strftime 書式が 2 桁の年の場合に警告する" - - #: c-family/c.opt:396 - msgid "Warn about zero-length formats" -@@ -9409,7 +9398,7 @@ - - #: c-family/c.opt:823 - msgid "Don't emit dllexported inline functions unless needed" --msgstr "" -+msgstr "必要が無い限り dllexported インライン関数を発行しない" - - #: c-family/c.opt:830 - msgid "Allow implicit conversions between vectors with differing numbers of subparts and/or differing element types." -@@ -9501,7 +9490,7 @@ - - #: c-family/c.opt:942 - msgid "Generate run time type descriptor information" --msgstr "" -+msgstr "実行時型記述子情報を生成する" - - #: c-family/c.opt:946 - msgid "Use the same size for double as for float" -@@ -9889,19 +9878,16 @@ - msgstr "関数が __attribute__((pure)) の候補となりそうな場合に警告する" - - #: common.opt:608 --#, fuzzy - msgid "Warn about enumerated switches, with no default, missing a case" --msgstr "列挙定数の switch で case 指定が欠けているものに関して警告する" -+msgstr "列挙定数を使用した switch 文で default 文が無いか特定の case が無い場合に警告する" - - #: common.opt:612 --#, fuzzy - msgid "Warn about enumerated switches missing a \"default:\" statement" --msgstr "列挙定数の switch で case 指定が欠けているものに関して警告する" -+msgstr "列挙定数を使用した switch 文で \"default:\" 文が無い場合に警告する" - - #: common.opt:616 --#, fuzzy - msgid "Warn about all enumerated switches missing a specific case" --msgstr "列挙定数の switch で case 指定が欠けているものに関して警告する" -+msgstr "列挙定数を使用した switch 文で特定の case が無い場合に警告する" - - #: common.opt:620 - msgid "Do not suppress warnings from system headers" -@@ -10000,9 +9986,8 @@ - msgstr "自動増加/減少命令を生成する" - - #: common.opt:821 --#, fuzzy - msgid "Generate code to check bounds before indexing arrays" --msgstr "配列の添字と添字境界を検査するコードを生成する" -+msgstr "配列の添え字を使用する前に境界検査を行うコードを生成する" - - #: common.opt:825 - #, fuzzy -@@ -10043,7 +10028,7 @@ - - #: common.opt:864 - msgid "Looks for opportunities to reduce stack adjustments and stack references." --msgstr "" -+msgstr "スタック調整およびスタック参照を削減する機会を探す" - - #: common.opt:868 - msgid "Do not put uninitialized globals in the common section" -@@ -10058,18 +10043,16 @@ - msgstr "" - - #: common.opt:884 --#, fuzzy - msgid "Perform comparison elimination after register allocation has finished" --msgstr "グローバル共通部分式を除去する" -+msgstr "レジスタは位置が完了した後に比較の除去を行う" - - #: common.opt:888 - msgid "Do not perform optimizations increasing noticeably stack usage" --msgstr "" -+msgstr "スタック使用量を著しく増加させる最適化を行わない" - - #: common.opt:892 --#, fuzzy - msgid "Perform a register copy-propagation optimization pass" --msgstr "最適化過程のレジスタつけ変えを行なう" -+msgstr "" - - #: common.opt:896 - msgid "Perform cross-jumping optimization" -@@ -10101,7 +10084,7 @@ - - #: common.opt:928 - msgid "Map one directory name to another in debug information" --msgstr "" -+msgstr "デバッグ情報内のディレクトリー名を他のものにマップする" - - #: common.opt:934 - msgid "Defer popping functions args from stack until later" -@@ -10116,9 +10099,8 @@ - msgstr "無意味な null ポインタ検査を削除する" - - #: common.opt:946 --#, fuzzy - msgid "Try to convert virtual calls to direct ones." --msgstr "リンカが PIC 呼び出しを直接呼び出しに変更することを許可するように試みる" -+msgstr "仮想呼び出しを直接呼び出しに変換することを試みる" - - #: common.opt:950 - #, fuzzy -@@ -10137,7 +10119,7 @@ - - #: common.opt:978 - msgid "-fdump-final-insns=filename\tDump to filename the insns at the end of translation" --msgstr "" -+msgstr "-fdump-final-insns=filename\t翻訳終了時に filename へ命令をダンプする" - - #: common.opt:982 - msgid "-fdump-go-spec=filename\tWrite all declarations to file as Go code" -@@ -10173,7 +10155,7 @@ - - #: common.opt:1014 common.opt:1018 - msgid "Perform unused type elimination in debug info" --msgstr "" -+msgstr "デバッグ情報内で使用されていない型の除去を行う" - - #: common.opt:1022 - msgid "Do not suppress C++ class debug information." -@@ -10181,25 +10163,24 @@ - - #: common.opt:1026 - msgid "Generate debug information to support Identical Code Folding (ICF)" --msgstr "" -+msgstr "Identical Code Folding (ICF) をサポートするためのデバッグ情報を生成する" - - #: common.opt:1030 - msgid "Enable exception handling" - msgstr "例外処理を有効にする" - - #: common.opt:1034 --#, fuzzy - msgid "Perform a number of minor, expensive optimizations" --msgstr "目立たない、コストのかかる最適化を行なう" -+msgstr "多くの、目立たないがコストが高い最適化を行う" - - #: common.opt:1038 - msgid "-fexcess-precision=[fast|standard]\tSpecify handling of excess floating-point precision" --msgstr "" -+msgstr "-fexcess-precision=[fast|standard]\t余分な浮動小数点精度の取り扱いを指定する" - - #: common.opt:1041 - #, c-format - msgid "unknown excess precision style %qs" --msgstr "" -+msgstr "不明な余分な精度スタイル %qs です" - - #: common.opt:1054 - msgid "Assume no NaNs or infinities are generated" -@@ -10222,52 +10203,45 @@ - msgstr "" - - #: common.opt:1077 --#, fuzzy, c-format -+#, c-format - msgid "unknown floating point contraction style %qs" --msgstr "浮動小数点定数を TOC 内に配置する" -+msgstr "不明な浮動小数短縮形 %qs です" - - #: common.opt:1094 - msgid "Allow function addresses to be held in registers" - msgstr "関数アドレスをレジスタに持たせる事を許可する" - - #: common.opt:1098 --#, fuzzy - msgid "Place each function into its own section" --msgstr "各々の関数をそれ自身のセクションに配置する" -+msgstr "それぞれの関数をそれ自身のセクションに配置する" - - #: common.opt:1102 --#, fuzzy - msgid "Perform global common subexpression elimination" --msgstr "グローバル共通部分式を除去する" -+msgstr "大域共通部分式の除去を行う" - - #: common.opt:1106 --#, fuzzy - msgid "Perform enhanced load motion during global common subexpression elimination" --msgstr "グローバル共通部分式を除去する" -+msgstr "" - - #: common.opt:1110 --#, fuzzy - msgid "Perform store motion after global common subexpression elimination" --msgstr "グローバル共通部分式を除去する" -+msgstr "" - - #: common.opt:1114 - msgid "Perform redundant load after store elimination in global common subexpression" - msgstr "" - - #: common.opt:1119 --#, fuzzy - msgid "Perform global common subexpression elimination after register allocation" --msgstr "グローバル共通部分式を除去する" -+msgstr "レジスタ配置後に大域共通部分式の除去を行う" - - #: common.opt:1125 --#, fuzzy - msgid "Enable in and out of Graphite representation" --msgstr "自動テンプレート実体化を有効にする" -+msgstr "" - - #: common.opt:1129 --#, fuzzy - msgid "Enable Graphite Identity transformation" --msgstr "呼び出しグラフ情報を送出する" -+msgstr "" - - #: common.opt:1133 - msgid "Mark all loops as parallel" -@@ -10306,9 +10280,8 @@ - msgstr "" - - #: common.opt:1173 --#, fuzzy - msgid "Perform conversion of conditional jumps to conditional execution" --msgstr "条件的な実行への変更のための閾値を変更する" -+msgstr "" - - #: common.opt:1177 - msgid "Convert conditional jumps in innermost loops to branchless equivalents" -@@ -10376,13 +10349,12 @@ - msgstr "" - - #: common.opt:1253 --#, fuzzy - msgid "Discover pure and const functions" --msgstr "使われない仮想関数を切り捨てる" -+msgstr "純粋および定数関数を見つける" - - #: common.opt:1257 - msgid "Discover readonly and non addressable static variables" --msgstr "" -+msgstr "読み取り専用およびアドレス付けできない静的変数を見つける" - - #: common.opt:1261 - msgid "Perform matrix layout flattening and transposing based" -@@ -10415,9 +10387,8 @@ - msgstr "" - - #: common.opt:1305 --#, fuzzy - msgid "Share slots for saving different hard registers." --msgstr "引数レジスタにローカルのものを格納する" -+msgstr "" - - #: common.opt:1309 - msgid "Share stack slots for spilled pseudo-registers." -@@ -10621,19 +10592,19 @@ - - #: common.opt:1521 - msgid "Enable basic program profiling code" --msgstr "" -+msgstr "基本プログラムプロファイリングコードを有効にする" - - #: common.opt:1525 - msgid "Insert arc-based program profiling code" --msgstr "" -+msgstr "円弧ベースプログラムプロファイリングコードを挿入する" - - #: common.opt:1529 - msgid "Set the top-level directory for storing the profile data." --msgstr "" -+msgstr "プロファイルデータ保存用の最上位ディレクリーを設定する" - - #: common.opt:1534 - msgid "Enable correction of flow inconsistent profile data input" --msgstr "" -+msgstr "フロー一貫性が無いデータ入力の訂正を有効にする" - - #: common.opt:1538 - msgid "Enable common options for generating profile info for profile feedback directed optimizations" -@@ -10653,7 +10624,7 @@ - - #: common.opt:1554 - msgid "Insert code to profile values of expressions" --msgstr "" -+msgstr "式の値をプロファイルするためのコードを挿入する" - - #: common.opt:1561 - msgid "-frandom-seed=<string>\tMake compile reproducible using <string>" -@@ -11836,7 +11807,7 @@ - #: c-decl.c:1150 - #, gcc-internal-format - msgid "nested function %q+D declared but never defined" --msgstr "" -+msgstr "入れ子になった関数 %q+D が宣言されましたが定義されていません" - - #: c-decl.c:1162 - #, gcc-internal-format -@@ -11893,7 +11864,7 @@ - #: c-decl.c:1613 - #, gcc-internal-format - msgid "prototype for %q+D follows non-prototype definition" --msgstr "" -+msgstr "非プロトタイプ定義に続いて %q+D 用のプロトタイプがあります" - - #: c-decl.c:1628 - #, gcc-internal-format -@@ -11969,9 +11940,9 @@ - msgstr "%q+D が異なる型で再定義されました" - - #: c-decl.c:1818 --#, fuzzy, gcc-internal-format -+#, gcc-internal-format - msgid "redefinition of typedef %q+D with variably modified type" --msgstr "%q+D が異なる型で再定義されました" -+msgstr "" - - #: c-decl.c:1825 - #, gcc-internal-format -@@ -12016,17 +11987,17 @@ - #: c-decl.c:2001 - #, gcc-internal-format - msgid "extern declaration of %q+D follows declaration with no linkage" --msgstr "" -+msgstr "リンク無し宣言の後に %q+D の extern 宣言が続いています" - - #: c-decl.c:2037 - #, gcc-internal-format - msgid "declaration of %q+D with no linkage follows extern declaration" --msgstr "" -+msgstr "extern 宣言の後にリンク無し %q+D の宣言が続いています" - - #: c-decl.c:2043 - #, gcc-internal-format - msgid "redeclaration of %q+D with no linkage" --msgstr "" -+msgstr "リンク無し %q+D の再定義です" - - #: c-decl.c:2069 - #, gcc-internal-format -@@ -12354,7 +12325,7 @@ - #: c-decl.c:4614 - #, gcc-internal-format - msgid "defining a type in a compound literal is invalid in C++" --msgstr "" -+msgstr "複合リテラル内での型定義は C++ では無効です" - - #: c-decl.c:4666 c-decl.c:4681 - #, gcc-internal-format -@@ -13393,23 +13364,23 @@ - #: c-parser.c:1829 - #, gcc-internal-format - msgid "expression in static assertion is not an integer" --msgstr "" -+msgstr "静的アサーション内の式が整数ではありません" - - #: c-parser.c:1836 - #, gcc-internal-format - msgid "expression in static assertion is not an integer constant expression" --msgstr "" -+msgstr "静的アサーション内の式が整数定数式ではありません" - - #: c-parser.c:1841 - #, gcc-internal-format - msgid "expression in static assertion is not constant" --msgstr "" -+msgstr "静的アサーション内の式が定数ではありません" - - #. Report the error. - #: c-parser.c:1846 cp/semantics.c:4719 - #, gcc-internal-format - msgid "static assertion failed: %E" --msgstr "" -+msgstr "静的アサーションに失敗しました: %E" - - #: c-parser.c:2207 c-parser.c:3063 c-parser.c:3709 c-parser.c:3983 - #: c-parser.c:5084 c-parser.c:5175 c-parser.c:5800 c-parser.c:6083 -@@ -14125,12 +14096,12 @@ - #: c-typeck.c:3578 - #, gcc-internal-format - msgid "increment of enumeration value is invalid in C++" --msgstr "列挙値のインクリメントは C++ では無効です" -+msgstr "列挙値の増分は C++ では無効です" - - #: c-typeck.c:3581 - #, gcc-internal-format - msgid "decrement of enumeration value is invalid in C++" --msgstr "列挙値のデクリメントは C++ では無効です" -+msgstr "列挙値の減分は C++ では無効です" - - #: c-typeck.c:3594 - #, gcc-internal-format -@@ -14140,22 +14111,22 @@ - #: c-typeck.c:3613 c-typeck.c:3645 - #, gcc-internal-format - msgid "wrong type argument to increment" --msgstr "インクリメントする引数の型が間違っています" -+msgstr "増分する引数の型が間違っています" - - #: c-typeck.c:3615 c-typeck.c:3648 - #, gcc-internal-format - msgid "wrong type argument to decrement" --msgstr "デクリメントする引数の型が間違っています" -+msgstr "減分する引数の型が間違っています" - - #: c-typeck.c:3635 - #, gcc-internal-format - msgid "increment of pointer to unknown structure" --msgstr "不明な構造体へのポインタのインクリメントです" -+msgstr "不明な構造体へのポインタの増分です" - - #: c-typeck.c:3638 - #, gcc-internal-format - msgid "decrement of pointer to unknown structure" --msgstr "不明な構造体へのポインタのデクリメントです" -+msgstr "不明な構造体へのポインタの減分です" - - #: c-typeck.c:3722 - #, gcc-internal-format -@@ -14170,12 +14141,12 @@ - #: c-typeck.c:3895 c-family/c-common.c:8658 - #, gcc-internal-format - msgid "increment of read-only location %qE" --msgstr "読み取り専用位置 %qE のインクリメントです" -+msgstr "読み取り専用位置 %qE の増分です" - - #: c-typeck.c:3898 c-family/c-common.c:8659 - #, gcc-internal-format - msgid "decrement of read-only location %qE" --msgstr "読み取り専用位置 %qE のデクリメントです" -+msgstr "読み取り専用位置 %qE の減分です" - - #: c-typeck.c:3939 - #, gcc-internal-format -@@ -19787,12 +19758,12 @@ - #: c-family/c-common.c:8611 - #, gcc-internal-format - msgid "increment of member %qD in read-only object" --msgstr "読み取り専用オブジェクト内のメンバ %qD のインクリメントです" -+msgstr "読み取り専用オブジェクト内のメンバ %qD の増分です" - - #: c-family/c-common.c:8613 - #, gcc-internal-format - msgid "decrement of member %qD in read-only object" --msgstr "読み取り専用オブジェクト内のメンバ %qD のデクリメントです" -+msgstr "読み取り専用オブジェクト内のメンバ %qD の減分です" - - #: c-family/c-common.c:8615 - #, gcc-internal-format -@@ -19807,12 +19778,12 @@ - #: c-family/c-common.c:8620 - #, gcc-internal-format - msgid "increment of read-only member %qD" --msgstr "読み取り専用メンバ %qD のインクリメントです" -+msgstr "読み取り専用メンバ %qD の増分です" - - #: c-family/c-common.c:8621 - #, gcc-internal-format - msgid "decrement of read-only member %qD" --msgstr "読み取り専用メンバ %qD のデクリメントです" -+msgstr "読み取り専用メンバ %qD の減分です" - - #: c-family/c-common.c:8622 - #, gcc-internal-format -@@ -19827,12 +19798,12 @@ - #: c-family/c-common.c:8627 - #, gcc-internal-format - msgid "increment of read-only variable %qD" --msgstr "読み取り専用変数 %qD のインクリメントです" -+msgstr "読み取り専用変数 %qD の増分です" - - #: c-family/c-common.c:8628 - #, gcc-internal-format - msgid "decrement of read-only variable %qD" --msgstr "読み取り専用変数 %qD のデクリメントです" -+msgstr "読み取り専用変数 %qD の減分です" - - #: c-family/c-common.c:8629 - #, gcc-internal-format -@@ -19847,12 +19818,12 @@ - #: c-family/c-common.c:8633 - #, gcc-internal-format - msgid "increment of read-only parameter %qD" --msgstr "読み取り専用パラメータ %qD のインクリメントです" -+msgstr "読み取り専用パラメータ %qD の増分です" - - #: c-family/c-common.c:8634 - #, gcc-internal-format - msgid "decrement of read-only parameter %qD" --msgstr "読み取り専用パラメータ %qD のデクリメントです" -+msgstr "読み取り専用パラメータ %qD の減分です" - - #: c-family/c-common.c:8635 - #, gcc-internal-format -@@ -19867,12 +19838,12 @@ - #: c-family/c-common.c:8642 - #, gcc-internal-format - msgid "increment of read-only named return value %qD" --msgstr "読み取り専用名前付き戻り値 %qD のインクリメントです" -+msgstr "読み取り専用名前付き戻り値 %qD の増分です" - - #: c-family/c-common.c:8644 - #, gcc-internal-format - msgid "decrement of read-only named return value %qD" --msgstr "読み取り専用名前付き戻り値 %qD のデクリメントです" -+msgstr "読み取り専用名前付き戻り値 %qD の減分です" - - #: c-family/c-common.c:8646 - #, gcc-internal-format -@@ -19887,12 +19858,12 @@ - #: c-family/c-common.c:8652 - #, gcc-internal-format - msgid "increment of function %qD" --msgstr "関数 %qD のインクリメントです" -+msgstr "関数 %qD の増分です" - - #: c-family/c-common.c:8653 - #, gcc-internal-format - msgid "decrement of function %qD" --msgstr "関数 %qD のデクリメントです" -+msgstr "関数 %qD の減分です" - - #: c-family/c-common.c:8654 - #, gcc-internal-format -@@ -19912,12 +19883,12 @@ - #: c-family/c-common.c:8677 - #, gcc-internal-format - msgid "lvalue required as increment operand" --msgstr "インクリメントの被演算子として左辺値が必要です" -+msgstr "増分の被演算子として左辺値が必要です" - - #: c-family/c-common.c:8680 - #, gcc-internal-format - msgid "lvalue required as decrement operand" --msgstr "デクリメントの被演算子として左辺値が必要です" -+msgstr "減分の被演算子として左辺値が必要です" - - #: c-family/c-common.c:8683 - #, gcc-internal-format -@@ -20556,12 +20527,12 @@ - #: c-family/c-omp.c:375 cp/semantics.c:4431 - #, gcc-internal-format - msgid "missing increment expression" --msgstr "インクリメント式がありません" -+msgstr "増分式がありません" - - #: c-family/c-omp.c:444 cp/semantics.c:4287 - #, gcc-internal-format - msgid "invalid increment expression" --msgstr "無効なインクリメント式です" -+msgstr "無効な増分式です" - - #: c-family/c-opts.c:303 - #, gcc-internal-format -@@ -20571,7 +20542,7 @@ - #: c-family/c-opts.c:306 - #, gcc-internal-format - msgid "obsolete option -I- used, please use -iquote instead" --msgstr "廃止あれたオプション -I- が使用されています。代わりに -iquote を使用してください" -+msgstr "廃止されたオプション -I- が使用されています。代わりに -iquote を使用してください" - - #: c-family/c-opts.c:486 - #, gcc-internal-format -Index: gcc/tree-ssa-forwprop.c -=================================================================== ---- a/src/gcc/tree-ssa-forwprop.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/tree-ssa-forwprop.c (.../branches/gcc-4_6-branch) -@@ -872,7 +872,7 @@ - TREE_TYPE (gimple_assign_rhs1 (use_stmt)))) - { - tree *def_rhs_basep = &TREE_OPERAND (def_rhs, 0); -- tree new_offset, new_base, saved; -+ tree new_offset, new_base, saved, new_lhs; - while (handled_component_p (*def_rhs_basep)) - def_rhs_basep = &TREE_OPERAND (*def_rhs_basep, 0); - saved = *def_rhs_basep; -@@ -891,9 +891,12 @@ - *def_rhs_basep = build2 (MEM_REF, TREE_TYPE (*def_rhs_basep), - new_base, new_offset); - TREE_THIS_VOLATILE (*def_rhs_basep) = TREE_THIS_VOLATILE (lhs); -+ TREE_SIDE_EFFECTS (*def_rhs_basep) = TREE_SIDE_EFFECTS (lhs); - TREE_THIS_NOTRAP (*def_rhs_basep) = TREE_THIS_NOTRAP (lhs); -- gimple_assign_set_lhs (use_stmt, -- unshare_expr (TREE_OPERAND (def_rhs, 0))); -+ new_lhs = unshare_expr (TREE_OPERAND (def_rhs, 0)); -+ gimple_assign_set_lhs (use_stmt, new_lhs); -+ TREE_THIS_VOLATILE (new_lhs) = TREE_THIS_VOLATILE (lhs); -+ TREE_SIDE_EFFECTS (new_lhs) = TREE_SIDE_EFFECTS (lhs); - *def_rhs_basep = saved; - tidy_after_forward_propagate_addr (use_stmt); - /* Continue propagating into the RHS if this was not the -@@ -953,7 +956,7 @@ - TREE_TYPE (TREE_OPERAND (def_rhs, 0)))) - { - tree *def_rhs_basep = &TREE_OPERAND (def_rhs, 0); -- tree new_offset, new_base, saved; -+ tree new_offset, new_base, saved, new_rhs; - while (handled_component_p (*def_rhs_basep)) - def_rhs_basep = &TREE_OPERAND (*def_rhs_basep, 0); - saved = *def_rhs_basep; -@@ -972,9 +975,12 @@ - *def_rhs_basep = build2 (MEM_REF, TREE_TYPE (*def_rhs_basep), - new_base, new_offset); - TREE_THIS_VOLATILE (*def_rhs_basep) = TREE_THIS_VOLATILE (rhs); -+ TREE_SIDE_EFFECTS (*def_rhs_basep) = TREE_SIDE_EFFECTS (rhs); - TREE_THIS_NOTRAP (*def_rhs_basep) = TREE_THIS_NOTRAP (rhs); -- gimple_assign_set_rhs1 (use_stmt, -- unshare_expr (TREE_OPERAND (def_rhs, 0))); -+ new_rhs = unshare_expr (TREE_OPERAND (def_rhs, 0)); -+ gimple_assign_set_rhs1 (use_stmt, new_rhs); -+ TREE_THIS_VOLATILE (new_rhs) = TREE_THIS_VOLATILE (rhs); -+ TREE_SIDE_EFFECTS (new_rhs) = TREE_SIDE_EFFECTS (rhs); - *def_rhs_basep = saved; - fold_stmt_inplace (use_stmt); - tidy_after_forward_propagate_addr (use_stmt); -Index: gcc/varasm.c -=================================================================== ---- a/src/gcc/varasm.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/varasm.c (.../branches/gcc-4_6-branch) -@@ -6751,11 +6751,14 @@ - /* A non-decl is an entry in the constant pool. */ - if (!DECL_P (exp)) - local_p = true; -- /* Weakrefs may not bind locally, even though the weakref itself is -- always static and therefore local. -- FIXME: We can resolve this more curefuly by looking at the weakref -- alias. */ -- else if (lookup_attribute ("weakref", DECL_ATTRIBUTES (exp))) -+ /* Weakrefs may not bind locally, even though the weakref itself is always -+ static and therefore local. Similarly, the resolver for ifunc functions -+ might resolve to a non-local function. -+ FIXME: We can resolve the weakref case more curefuly by looking at the -+ weakref alias. */ -+ else if (lookup_attribute ("weakref", DECL_ATTRIBUTES (exp)) -+ || (TREE_CODE (exp) == FUNCTION_DECL -+ && lookup_attribute ("ifunc", DECL_ATTRIBUTES (exp)))) - local_p = false; - /* Static variables are always local. */ - else if (! TREE_PUBLIC (exp)) -Index: gcc/sched-deps.c -=================================================================== ---- a/src/gcc/sched-deps.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/sched-deps.c (.../branches/gcc-4_6-branch) -@@ -2687,7 +2687,11 @@ - else - sched_analyze_2 (deps, XEXP (link, 0), insn); - } -- if (find_reg_note (insn, REG_SETJMP, NULL)) -+ /* Don't schedule anything after a tail call, tail call needs -+ to use at least all call-saved registers. */ -+ if (SIBLING_CALL_P (insn)) -+ reg_pending_barrier = TRUE_BARRIER; -+ else if (find_reg_note (insn, REG_SETJMP, NULL)) - reg_pending_barrier = MOVE_BARRIER; - } - -Index: gcc/tree-object-size.c -=================================================================== ---- a/src/gcc/tree-object-size.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/tree-object-size.c (.../branches/gcc-4_6-branch) -@@ -175,7 +175,7 @@ - unsigned HOST_WIDE_INT sz; - - if (!osi || (object_size_type & 1) != 0 -- || TREE_CODE (pt_var) != SSA_NAME) -+ || TREE_CODE (TREE_OPERAND (pt_var, 0)) != SSA_NAME) - { - sz = compute_builtin_object_size (TREE_OPERAND (pt_var, 0), - object_size_type & ~1); -Index: gcc/lto-opts.c -=================================================================== ---- a/src/gcc/lto-opts.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/lto-opts.c (.../branches/gcc-4_6-branch) -@@ -358,7 +358,7 @@ - size_t len, l, skip; - const char *data, *p; - const struct lto_simple_header *header; -- int32_t opts_offset; -+ int opts_offset; - struct lto_input_block ib; - - data = lto_get_section_data (file_data, LTO_section_opts, NULL, &len); -@@ -379,10 +379,10 @@ - - lto_check_version (header->lto_header.major_version, - header->lto_header.minor_version); -- -+ - LTO_INIT_INPUT_BLOCK (ib, p + opts_offset, 0, header->main_size); - input_options (&ib); -- -+ - skip = header->main_size + opts_offset; - l -= skip; - p += skip; -Index: gcc/c-parser.c -=================================================================== ---- a/src/gcc/c-parser.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/c-parser.c (.../branches/gcc-4_6-branch) -@@ -6294,7 +6294,7 @@ - c_parser_error (parser, "expected identifier"); - c_parser_skip_until_found (parser, CPP_CLOSE_PAREN, - "expected %<)%>"); -- expr.value = fold_offsetof (offsetof_ref, NULL_TREE); -+ expr.value = fold_offsetof (offsetof_ref); - } - break; - case RID_CHOOSE_EXPR: -Index: gcc/config/sparc/sparc.md -=================================================================== ---- a/src/gcc/config/sparc/sparc.md (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/config/sparc/sparc.md (.../branches/gcc-4_6-branch) -@@ -1813,8 +1813,8 @@ - }) - - (define_insn "*movsf_insn" -- [(set (match_operand:V32 0 "nonimmediate_operand" "=d,f,*r,*r,*r,f,*r,m,m") -- (match_operand:V32 1 "input_operand" "GY,f,*rRY,Q,S,m,m,f,*rGY"))] -+ [(set (match_operand:V32 0 "nonimmediate_operand" "=d,f, *r,*r,*r,f,*r,m, m") -+ (match_operand:V32 1 "input_operand" "GY,f,*rRY, Q, S,m, m,f,*rGY"))] - "TARGET_FPU - && (register_operand (operands[0], <V32:MODE>mode) - || register_or_zero_operand (operands[1], <V32:MODE>mode))" -@@ -1861,8 +1861,8 @@ - ;; when -mno-fpu. - - (define_insn "*movsf_insn_no_fpu" -- [(set (match_operand:SF 0 "nonimmediate_operand" "=r,r,r,r,m") -- (match_operand:SF 1 "input_operand" "rR,Q,S,m,rG"))] -+ [(set (match_operand:SF 0 "nonimmediate_operand" "=r,r,r,r, m") -+ (match_operand:SF 1 "input_operand" "rR,Q,S,m,rG"))] - "! TARGET_FPU - && (register_operand (operands[0], SFmode) - || register_or_zero_operand (operands[1], SFmode))" -@@ -1948,8 +1948,8 @@ - - ;; Be careful, fmovd does not exist when !v9. - (define_insn "*movdf_insn_sp32" -- [(set (match_operand:DF 0 "nonimmediate_operand" "=e,W,U,T,o,e,*r,o,e,o") -- (match_operand:DF 1 "input_operand" "W#F,e,T,U,G,e,*rFo,*r,o#F,e"))] -+ [(set (match_operand:DF 0 "nonimmediate_operand" "= e,W,U,T,o,e, *r, o, e,o") -+ (match_operand:DF 1 "input_operand" "W#F,e,T,U,G,e,*rFo,*r,o#F,e"))] - "TARGET_FPU - && ! TARGET_V9 - && (register_operand (operands[0], DFmode) -@@ -1969,8 +1969,8 @@ - (set_attr "length" "*,*,*,*,2,2,2,2,2,2")]) - - (define_insn "*movdf_insn_sp32_no_fpu" -- [(set (match_operand:DF 0 "nonimmediate_operand" "=U,T,o,r,o") -- (match_operand:DF 1 "input_operand" "T,U,G,ro,r"))] -+ [(set (match_operand:DF 0 "nonimmediate_operand" "=U,T,o, r,o") -+ (match_operand:DF 1 "input_operand" " T,U,G,ro,r"))] - "! TARGET_FPU - && ! TARGET_V9 - && (register_operand (operands[0], DFmode) -@@ -1986,8 +1986,8 @@ - - ;; We have available v9 double floats but not 64-bit integer registers. - (define_insn "*movdf_insn_sp32_v9" -- [(set (match_operand:V64 0 "nonimmediate_operand" "=b,e,e,T,W,U,T,f,*r,o") -- (match_operand:V64 1 "input_operand" "GY,e,W#F,GY,e,T,U,o#F,*roGYDF,*rGYf"))] -+ [(set (match_operand:V64 0 "nonimmediate_operand" "=b,e, e, T,W,U,T, f, *r, o") -+ (match_operand:V64 1 "input_operand" "GY,e,W#F,GY,e,T,U,o#F,*roFD,*rGYf"))] - "TARGET_FPU - && TARGET_V9 - && ! TARGET_ARCH64 -@@ -2009,8 +2009,8 @@ - (set_attr "fptype" "double,double,*,*,*,*,*,*,*,*")]) - - (define_insn "*movdf_insn_sp32_v9_no_fpu" -- [(set (match_operand:DF 0 "nonimmediate_operand" "=U,T,T,r,o") -- (match_operand:DF 1 "input_operand" "T,U,G,ro,rG"))] -+ [(set (match_operand:DF 0 "nonimmediate_operand" "=U,T,T, r, o") -+ (match_operand:DF 1 "input_operand" " T,U,G,ro,rG"))] - "! TARGET_FPU - && TARGET_V9 - && ! TARGET_ARCH64 -@@ -2027,8 +2027,8 @@ - - ;; We have available both v9 double floats and 64-bit integer registers. - (define_insn "*movdf_insn_sp64" -- [(set (match_operand:V64 0 "nonimmediate_operand" "=b,e,e,W,*r,*r,m,*r") -- (match_operand:V64 1 "input_operand" "GY,e,W#F,e,*rGY,m,*rGY,DF"))] -+ [(set (match_operand:V64 0 "nonimmediate_operand" "=b,e, e,W, *r,*r, m,*r") -+ (match_operand:V64 1 "input_operand" "GY,e,W#F,e,*rGY, m,*rGY,FD"))] - "TARGET_FPU - && TARGET_ARCH64 - && (register_operand (operands[0], <V64:MODE>mode) -@@ -2047,8 +2047,8 @@ - (set_attr "fptype" "double,double,*,*,*,*,*,*")]) - - (define_insn "*movdf_insn_sp64_no_fpu" -- [(set (match_operand:DF 0 "nonimmediate_operand" "=r,r,m") -- (match_operand:DF 1 "input_operand" "r,m,rG"))] -+ [(set (match_operand:DF 0 "nonimmediate_operand" "=r,r, m") -+ (match_operand:DF 1 "input_operand" "r,m,rG"))] - "! TARGET_FPU - && TARGET_ARCH64 - && (register_operand (operands[0], DFmode) -@@ -2288,8 +2288,8 @@ - }) - - (define_insn "*movtf_insn_sp32" -- [(set (match_operand:TF 0 "nonimmediate_operand" "=b,e,o,U,r") -- (match_operand:TF 1 "input_operand" "G,oe,GeUr,o,roG"))] -+ [(set (match_operand:TF 0 "nonimmediate_operand" "=b, e, o,U, r") -+ (match_operand:TF 1 "input_operand" " G,oe,GeUr,o,roG"))] - "TARGET_FPU - && ! TARGET_ARCH64 - && (register_operand (operands[0], TFmode) -@@ -2302,8 +2302,8 @@ - ;; when -mno-fpu. - - (define_insn "*movtf_insn_sp32_no_fpu" -- [(set (match_operand:TF 0 "nonimmediate_operand" "=o,U,o,r,o") -- (match_operand:TF 1 "input_operand" "G,o,U,roG,r"))] -+ [(set (match_operand:TF 0 "nonimmediate_operand" "=o,U,o, r,o") -+ (match_operand:TF 1 "input_operand" " G,o,U,roG,r"))] - "! TARGET_FPU - && ! TARGET_ARCH64 - && (register_operand (operands[0], TFmode) -@@ -2312,8 +2312,8 @@ - [(set_attr "length" "4")]) - - (define_insn "*movtf_insn_sp64" -- [(set (match_operand:TF 0 "nonimmediate_operand" "=b,e,o,r") -- (match_operand:TF 1 "input_operand" "G,oe,Ger,roG"))] -+ [(set (match_operand:TF 0 "nonimmediate_operand" "=b, e, o, r") -+ (match_operand:TF 1 "input_operand" "G,oe,Ger,roG"))] - "TARGET_FPU - && TARGET_ARCH64 - && ! TARGET_HARD_QUAD -@@ -2323,8 +2323,8 @@ - [(set_attr "length" "2")]) - - (define_insn "*movtf_insn_sp64_hq" -- [(set (match_operand:TF 0 "nonimmediate_operand" "=b,e,e,m,o,r") -- (match_operand:TF 1 "input_operand" "G,e,m,e,rG,roG"))] -+ [(set (match_operand:TF 0 "nonimmediate_operand" "=b,e,e,m, o, r") -+ (match_operand:TF 1 "input_operand" "G,e,m,e,rG,roG"))] - "TARGET_FPU - && TARGET_ARCH64 - && TARGET_HARD_QUAD -@@ -2341,8 +2341,8 @@ - (set_attr "length" "2,*,*,*,2,2")]) - - (define_insn "*movtf_insn_sp64_no_fpu" -- [(set (match_operand:TF 0 "nonimmediate_operand" "=r,o") -- (match_operand:TF 1 "input_operand" "orG,rG"))] -+ [(set (match_operand:TF 0 "nonimmediate_operand" "= r, o") -+ (match_operand:TF 1 "input_operand" "orG,rG"))] - "! TARGET_FPU - && TARGET_ARCH64 - && (register_operand (operands[0], TFmode) -Index: gcc/config/sparc/sparc.h -=================================================================== ---- a/src/gcc/config/sparc/sparc.h (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/config/sparc/sparc.h (.../branches/gcc-4_6-branch) -@@ -408,6 +408,7 @@ - %{mcpu=sparclite:-Asparclite} \ - %{mcpu=sparclite86x:-Asparclite} \ - %{mcpu=f930:-Asparclite} %{mcpu=f934:-Asparclite} \ -+%{mcpu=v8:-Av8} \ - %{mv8plus:-Av8plus} \ - %{mcpu=v9:-Av9} \ - %{mcpu=ultrasparc:%{!mv8plus:-Av9a}} \ -Index: gcc/config/i386/i386.md -=================================================================== ---- a/src/gcc/config/i386/i386.md (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/config/i386/i386.md (.../branches/gcc-4_6-branch) -@@ -1960,7 +1960,7 @@ - - (define_insn "*movdi_internal_rex64" - [(set (match_operand:DI 0 "nonimmediate_operand" -- "=r,r ,r,m ,!m,*y,*y,?r ,m ,?*Ym,?*y,*x,*x,?r ,m,?*Yi,*x,?*x,?*Ym") -+ "=r,r ,r,m ,!o,*y,*y,?r ,m ,?*Ym,?*y,*x,*x,?r ,m,?*Yi,*x,?*x,?*Ym") - (match_operand:DI 1 "general_operand" - "Z ,rem,i,re,n ,C ,*y,*Ym,*y,r ,m ,C ,*x,*Yi,*x,r ,m ,*Ym,*x"))] - "TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1]))" -@@ -2905,7 +2905,7 @@ - - (define_insn "*movdf_internal_rex64" - [(set (match_operand:DF 0 "nonimmediate_operand" -- "=f,m,f,r ,m,!r,!m,Y2*x,Y2*x,Y2*x,m ,Yi,r ") -+ "=f,m,f,r ,m,!r,!o,Y2*x,Y2*x,Y2*x,m ,Yi,r ") - (match_operand:DF 1 "general_operand" - "fm,f,G,rm,r,F ,F ,C ,Y2*x,m ,Y2*x,r ,Yi"))] - "TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1])) -@@ -5103,7 +5103,7 @@ - && reload_completed - && (SSE_REG_P (operands[0]) - || (GET_CODE (operands[0]) == SUBREG -- && SSE_REG_P (operands[0])))" -+ && SSE_REG_P (SUBREG_REG (operands[0]))))" - [(set (match_dup 0) (float:MODEF (match_dup 1)))]) - - (define_split -@@ -5116,7 +5116,7 @@ - && reload_completed - && (SSE_REG_P (operands[0]) - || (GET_CODE (operands[0]) == SUBREG -- && SSE_REG_P (operands[0])))" -+ && SSE_REG_P (SUBREG_REG (operands[0]))))" - [(set (match_dup 2) (match_dup 1)) - (set (match_dup 0) (float:MODEF (match_dup 2)))]) - -@@ -5207,7 +5207,7 @@ - && reload_completed - && (SSE_REG_P (operands[0]) - || (GET_CODE (operands[0]) == SUBREG -- && SSE_REG_P (operands[0])))" -+ && SSE_REG_P (SUBREG_REG (operands[0]))))" - [(const_int 0)] - { - rtx op1 = operands[1]; -@@ -5248,7 +5248,7 @@ - && reload_completed - && (SSE_REG_P (operands[0]) - || (GET_CODE (operands[0]) == SUBREG -- && SSE_REG_P (operands[0])))" -+ && SSE_REG_P (SUBREG_REG (operands[0]))))" - [(const_int 0)] - { - operands[3] = simplify_gen_subreg (<ssevecmode>mode, operands[0], -@@ -5270,7 +5270,7 @@ - && reload_completed - && (SSE_REG_P (operands[0]) - || (GET_CODE (operands[0]) == SUBREG -- && SSE_REG_P (operands[0])))" -+ && SSE_REG_P (SUBREG_REG (operands[0]))))" - [(const_int 0)] - { - rtx op1 = operands[1]; -@@ -5314,7 +5314,7 @@ - && reload_completed - && (SSE_REG_P (operands[0]) - || (GET_CODE (operands[0]) == SUBREG -- && SSE_REG_P (operands[0])))" -+ && SSE_REG_P (SUBREG_REG (operands[0]))))" - [(const_int 0)] - { - operands[3] = simplify_gen_subreg (<ssevecmode>mode, operands[0], -@@ -5375,7 +5375,7 @@ - && reload_completed - && (SSE_REG_P (operands[0]) - || (GET_CODE (operands[0]) == SUBREG -- && SSE_REG_P (operands[0])))" -+ && SSE_REG_P (SUBREG_REG (operands[0]))))" - [(set (match_dup 0) (float:MODEF (match_dup 1)))]) - - (define_insn "*float<SSEMODEI24:mode><MODEF:mode>2_sse_nointerunit" -@@ -5410,7 +5410,7 @@ - && reload_completed - && (SSE_REG_P (operands[0]) - || (GET_CODE (operands[0]) == SUBREG -- && SSE_REG_P (operands[0])))" -+ && SSE_REG_P (SUBREG_REG (operands[0]))))" - [(set (match_dup 2) (match_dup 1)) - (set (match_dup 0) (float:MODEF (match_dup 2)))]) - -@@ -5423,7 +5423,7 @@ - && reload_completed - && (SSE_REG_P (operands[0]) - || (GET_CODE (operands[0]) == SUBREG -- && SSE_REG_P (operands[0])))" -+ && SSE_REG_P (SUBREG_REG (operands[0]))))" - [(set (match_dup 0) (float:MODEF (match_dup 1)))]) - - (define_insn "*float<SSEMODEI24:mode><X87MODEF:mode>2_i387_with_temp" -@@ -14625,7 +14625,7 @@ - emit_insn (gen_sse4_1_round<mode>2 - (operands[0], operands[1], GEN_INT (0x04))); - else -- ix86_expand_rint (operand0, operand1); -+ ix86_expand_rint (operands[0], operands[1]); - } - else - { -@@ -14649,9 +14649,9 @@ - if (optimize_insn_for_size_p ()) - FAIL; - if (TARGET_64BIT || (<MODE>mode != DFmode)) -- ix86_expand_round (operand0, operand1); -+ ix86_expand_round (operands[0], operands[1]); - else -- ix86_expand_rounddf_32 (operand0, operand1); -+ ix86_expand_rounddf_32 (operands[0], operands[1]); - DONE; - }) - -@@ -14796,7 +14796,7 @@ - { - if (optimize_insn_for_size_p ()) - FAIL; -- ix86_expand_lround (operand0, operand1); -+ ix86_expand_lround (operands[0], operands[1]); - DONE; - }) - -@@ -14871,9 +14871,9 @@ - emit_insn (gen_sse4_1_round<mode>2 - (operands[0], operands[1], GEN_INT (0x01))); - else if (TARGET_64BIT || (<MODE>mode != DFmode)) -- ix86_expand_floorceil (operand0, operand1, true); -+ ix86_expand_floorceil (operands[0], operands[1], true); - else -- ix86_expand_floorceildf_32 (operand0, operand1, true); -+ ix86_expand_floorceildf_32 (operands[0], operands[1], true); - } - else - { -@@ -15053,7 +15053,7 @@ - { - if (TARGET_64BIT && optimize_insn_for_size_p ()) - FAIL; -- ix86_expand_lfloorceil (operand0, operand1, true); -+ ix86_expand_lfloorceil (operands[0], operands[1], true); - DONE; - }) - -@@ -15128,9 +15128,9 @@ - else if (optimize_insn_for_size_p ()) - FAIL; - else if (TARGET_64BIT || (<MODE>mode != DFmode)) -- ix86_expand_floorceil (operand0, operand1, false); -+ ix86_expand_floorceil (operands[0], operands[1], false); - else -- ix86_expand_floorceildf_32 (operand0, operand1, false); -+ ix86_expand_floorceildf_32 (operands[0], operands[1], false); - } - else - { -@@ -15308,7 +15308,7 @@ - "SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH - && !flag_trapping_math" - { -- ix86_expand_lfloorceil (operand0, operand1, false); -+ ix86_expand_lfloorceil (operands[0], operands[1], false); - DONE; - }) - -@@ -15383,9 +15383,9 @@ - else if (optimize_insn_for_size_p ()) - FAIL; - else if (TARGET_64BIT || (<MODE>mode != DFmode)) -- ix86_expand_trunc (operand0, operand1); -+ ix86_expand_trunc (operands[0], operands[1]); - else -- ix86_expand_truncdf_32 (operand0, operand1); -+ ix86_expand_truncdf_32 (operands[0], operands[1]); - } - else - { -@@ -18285,8 +18285,8 @@ - (match_operand:SI 3 "const_int_operand" "i")] - UNSPECV_LWPVAL_INTRINSIC)] - "TARGET_LWP" -- "/* Avoid unused variable warning. */ -- (void) operand0;") -+ ;; Avoid unused variable warning. -+ "(void) operands[0];") - - (define_insn "*lwp_lwpval<mode>3_1" - [(unspec_volatile [(match_operand:SWI48 0 "register_operand" "r") -Index: gcc/config/i386/sse.md -=================================================================== ---- a/src/gcc/config/i386/sse.md (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/config/i386/sse.md (.../branches/gcc-4_6-branch) -@@ -4521,15 +4521,14 @@ - [(set (match_operand:V4DF 0 "register_operand" "=x,x") - (vec_select:V4DF - (vec_concat:V8DF -- (match_operand:V4DF 1 "nonimmediate_operand" "xm,x") -- (match_operand:V4DF 2 "nonimmediate_operand" " 1,xm")) -+ (match_operand:V4DF 1 "nonimmediate_operand" " x,m") -+ (match_operand:V4DF 2 "nonimmediate_operand" "xm,1")) - (parallel [(const_int 0) (const_int 4) - (const_int 2) (const_int 6)])))] -- "TARGET_AVX -- && (!MEM_P (operands[1]) || rtx_equal_p (operands[1], operands[2]))" -+ "TARGET_AVX" - "@ -- vmovddup\t{%1, %0|%0, %1} -- vunpcklpd\t{%2, %1, %0|%0, %1, %2}" -+ vunpcklpd\t{%2, %1, %0|%0, %1, %2} -+ vmovddup\t{%1, %0|%0, %1}" - [(set_attr "type" "sselog") - (set_attr "prefix" "vex") - (set_attr "mode" "V4DF")]) -Index: gcc/config/i386/avxintrin.h -=================================================================== ---- a/src/gcc/config/i386/avxintrin.h (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/config/i386/avxintrin.h (.../branches/gcc-4_6-branch) -@@ -759,7 +759,7 @@ - - #ifdef __x86_64__ - extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) --_mm256_insert_epi64 (__m256i __X, int __D, int const __N) -+_mm256_insert_epi64 (__m256i __X, long long __D, int const __N) - { - __m128i __Y = _mm256_extractf128_si256 (__X, __N >> 1); - __Y = _mm_insert_epi64 (__Y, __D, __N % 2); -Index: gcc/config/i386/i386.c -=================================================================== ---- a/src/gcc/config/i386/i386.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/config/i386/i386.c (.../branches/gcc-4_6-branch) -@@ -16329,7 +16329,6 @@ - basic_block bb = BLOCK_FOR_INSN (insn); - int distance = 0; - df_ref *def_rec; -- enum attr_type insn_type; - - if (insn != BB_HEAD (bb)) - { -@@ -16345,8 +16344,8 @@ - && (regno1 == DF_REF_REGNO (*def_rec) - || regno2 == DF_REF_REGNO (*def_rec))) - { -- insn_type = get_attr_type (prev); -- if (insn_type != TYPE_LEA) -+ if (recog_memoized (prev) < 0 -+ || get_attr_type (prev) != TYPE_LEA) - goto done; - } - } -@@ -16385,8 +16384,8 @@ - && (regno1 == DF_REF_REGNO (*def_rec) - || regno2 == DF_REF_REGNO (*def_rec))) - { -- insn_type = get_attr_type (prev); -- if (insn_type != TYPE_LEA) -+ if (recog_memoized (prev) < 0 -+ || get_attr_type (prev) != TYPE_LEA) - goto done; - } - } -Index: gcc/config/avr/libgcc.S -=================================================================== ---- a/src/gcc/config/avr/libgcc.S (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/config/avr/libgcc.S (.../branches/gcc-4_6-branch) -@@ -582,7 +582,16 @@ - push r17 - push r28 - push r29 -+#if defined (__AVR_HAVE_8BIT_SP__) -+;; FIXME: __AVR_HAVE_8BIT_SP__ is set on device level, not on core level -+;; so this lines are dead code. To make it work, devices without -+;; SP_H must get their own multilib(s), see PR51345. - in r28,__SP_L__ -+ sub r28,r26 -+ clr r29 -+ out __SP_L__,r28 -+#else -+ in r28,__SP_L__ - in r29,__SP_H__ - sub r28,r26 - sbc r29,r27 -@@ -591,6 +600,7 @@ - out __SP_H__,r29 - out __SREG__,__tmp_reg__ - out __SP_L__,r28 -+#endif - #if defined (__AVR_HAVE_EIJMP_EICALL__) - eijmp - #else -@@ -625,6 +635,15 @@ - ldd r16,Y+4 - ldd r17,Y+3 - ldd r26,Y+2 -+#if defined (__AVR_HAVE_8BIT_SP__) -+;; FIXME: __AVR_HAVE_8BIT_SP__ is set on device level, not on core level -+;; so this lines are dead code. To make it work, devices without -+;; SP_H must get their own multilib(s). -+ ldd r29,Y+1 -+ add r28,r30 -+ out __SP_L__,r28 -+ mov r28, r26 -+#else - ldd r27,Y+1 - add r28,r30 - adc r29,__zero_reg__ -@@ -635,6 +654,7 @@ - out __SP_L__,r28 - mov_l r28, r26 - mov_h r29, r27 -+#endif - ret - .endfunc - #endif /* defined (L_epilogue) */ -Index: gcc/config/avr/avr.md -=================================================================== ---- a/src/gcc/config/avr/avr.md (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/config/avr/avr.md (.../branches/gcc-4_6-branch) -@@ -299,7 +299,7 @@ - [(set (match_operand:HI 0 "stack_register_operand" "=q") - (unspec_volatile:HI [(match_operand:HI 1 "register_operand" "r")] - UNSPECV_WRITE_SP_IRQ_OFF))] -- "" -+ "!AVR_HAVE_8BIT_SP" - "out __SP_H__, %B1 - out __SP_L__, %A1" - [(set_attr "length" "2") -@@ -309,7 +309,7 @@ - [(set (match_operand:HI 0 "stack_register_operand" "=q") - (unspec_volatile:HI [(match_operand:HI 1 "register_operand" "r")] - UNSPECV_WRITE_SP_IRQ_ON))] -- "" -+ "!AVR_HAVE_8BIT_SP" - "cli - out __SP_H__, %B1 - sei -Index: gcc/config/avr/avr-devices.c -=================================================================== ---- a/src/gcc/config/avr/avr-devices.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/config/avr/avr-devices.c (.../branches/gcc-4_6-branch) -@@ -70,7 +70,7 @@ - { "attiny2313a", ARCH_AVR25, "__AVR_ATtiny2313A__", 1, 0x0060, "tn2313a" }, - { "attiny24", ARCH_AVR25, "__AVR_ATtiny24__", 1, 0x0060, "tn24" }, - { "attiny24a", ARCH_AVR25, "__AVR_ATtiny24A__", 1, 0x0060, "tn24a" }, -- { "attiny4313", ARCH_AVR25, "__AVR_ATtiny4313__", 1, 0x0060, "tn4313" }, -+ { "attiny4313", ARCH_AVR25, "__AVR_ATtiny4313__", 0, 0x0060, "tn4313" }, - { "attiny44", ARCH_AVR25, "__AVR_ATtiny44__", 0, 0x0060, "tn44" }, - { "attiny44a", ARCH_AVR25, "__AVR_ATtiny44A__", 0, 0x0060, "tn44a" }, - { "attiny84", ARCH_AVR25, "__AVR_ATtiny84__", 0, 0x0060, "tn84" }, -@@ -88,7 +88,7 @@ - { "attiny87", ARCH_AVR25, "__AVR_ATtiny87__", 0, 0x0100, "tn87" }, - { "attiny48", ARCH_AVR25, "__AVR_ATtiny48__", 0, 0x0100, "tn48" }, - { "attiny88", ARCH_AVR25, "__AVR_ATtiny88__", 0, 0x0100, "tn88" }, -- { "at86rf401", ARCH_AVR25, "__AVR_AT86RF401__", 1, 0x0060, "86401" }, -+ { "at86rf401", ARCH_AVR25, "__AVR_AT86RF401__", 0, 0x0060, "86401" }, - /* Classic, > 8K, <= 64K. */ - { "avr3", ARCH_AVR3, NULL, 0, 0x0060, "43355" }, - { "at43usb355", ARCH_AVR3, "__AVR_AT43USB355__", 0, 0x0060, "43355" }, -Index: gcc/config/avr/avr.c -=================================================================== ---- a/src/gcc/config/avr/avr.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/config/avr/avr.c (.../branches/gcc-4_6-branch) -@@ -1879,9 +1879,12 @@ - } - else if (test_hard_reg_class (STACK_REG, src)) - { -- *l = 2; -- return (AS2 (in,%A0,__SP_L__) CR_TAB -- AS2 (in,%B0,__SP_H__)); -+ *l = 2; -+ return AVR_HAVE_8BIT_SP -+ ? (AS2 (in,%A0,__SP_L__) CR_TAB -+ AS1 (clr,%B0)) -+ : (AS2 (in,%A0,__SP_L__) CR_TAB -+ AS2 (in,%B0,__SP_H__)); - } - - if (AVR_HAVE_MOVW) -@@ -5173,10 +5176,10 @@ - - default_file_start (); - --/* fprintf (asm_out_file, "\t.arch %s\n", avr_mcu_name);*/ -- fputs ("__SREG__ = 0x3f\n" -- "__SP_H__ = 0x3e\n" -- "__SP_L__ = 0x3d\n", asm_out_file); -+ fputs ("__SREG__ = 0x3f\n", asm_out_file); -+ if (!AVR_HAVE_8BIT_SP) -+ fputs ("__SP_H__ = 0x3e\n", asm_out_file); -+ fputs ("__SP_L__ = 0x3d\n", asm_out_file); - - fputs ("__tmp_reg__ = 0\n" - "__zero_reg__ = 1\n", asm_out_file); -Index: gcc/config/rs6000/rs6000.c -=================================================================== ---- a/src/gcc/config/rs6000/rs6000.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/config/rs6000/rs6000.c (.../branches/gcc-4_6-branch) -@@ -2612,6 +2612,7 @@ - off. */ - rs6000_altivec_abi = 1; - TARGET_ALTIVEC_VRSAVE = 1; -+ rs6000_current_abi = ABI_DARWIN; - - if (DEFAULT_ABI == ABI_DARWIN - && TARGET_64BIT) -@@ -6824,6 +6825,7 @@ - #if TARGET_MACHO - && DEFAULT_ABI == ABI_DARWIN - && (flag_pic || MACHO_DYNAMIC_NO_PIC_P) -+ && machopic_symbol_defined_p (x) - #else - && DEFAULT_ABI == ABI_V4 - && !flag_pic -@@ -20227,7 +20229,7 @@ - { - /* This blockage is needed so that sched doesn't decide to move - the sp change before the register restores. */ -- if (frame_reg_rtx != sp_reg_rtx -+ if (DEFAULT_ABI == ABI_V4 - || (TARGET_SPE_ABI - && info->spe_64bit_regs_used != 0 - && info->first_gp_reg_save != 32)) -@@ -20644,56 +20646,52 @@ - { - int i; - rtx spe_save_area_ptr; -- -+ int save_ptr_to_sp; -+ int ool_adjust = 0; -+ - /* Determine whether we can address all of the registers that need -- to be saved with an offset from the stack pointer that fits in -+ to be saved with an offset from frame_reg_rtx that fits in - the small const field for SPE memory instructions. */ -- int spe_regs_addressable_via_sp -- = (SPE_CONST_OFFSET_OK(info->spe_gp_save_offset + sp_offset -- + (32 - info->first_gp_reg_save - 1) * reg_size) -+ int spe_regs_addressable -+ = (SPE_CONST_OFFSET_OK (info->spe_gp_save_offset + sp_offset -+ + reg_size * (32 - info->first_gp_reg_save - 1)) - && saving_GPRs_inline); - int spe_offset; -- -- if (spe_regs_addressable_via_sp) -+ -+ if (spe_regs_addressable) - { - spe_save_area_ptr = frame_reg_rtx; -+ save_ptr_to_sp = info->total_size - sp_offset; - spe_offset = info->spe_gp_save_offset + sp_offset; - } - else - { - /* Make r11 point to the start of the SPE save area. We need - to be careful here if r11 is holding the static chain. If -- it is, then temporarily save it in r0. We would use r0 as -- our base register here, but using r0 as a base register in -- loads and stores means something different from what we -- would like. */ -- int ool_adjust = (saving_GPRs_inline -- ? 0 -- : (info->first_gp_reg_save -- - (FIRST_SAVRES_REGISTER+1))*8); -- HOST_WIDE_INT offset = (info->spe_gp_save_offset -- + sp_offset - ool_adjust); -+ it is, then temporarily save it in r0. */ -+ int offset; - -+ if (!saving_GPRs_inline) -+ ool_adjust = 8 * (info->first_gp_reg_save -+ - (FIRST_SAVRES_REGISTER + 1)); -+ offset = info->spe_gp_save_offset + sp_offset - ool_adjust; -+ spe_save_area_ptr = gen_rtx_REG (Pmode, 11); -+ save_ptr_to_sp = info->total_size - sp_offset + offset; -+ spe_offset = 0; -+ - if (using_static_chain_p) - { - rtx r0 = gen_rtx_REG (Pmode, 0); - gcc_assert (info->first_gp_reg_save > 11); -- -- emit_move_insn (r0, gen_rtx_REG (Pmode, 11)); -+ -+ emit_move_insn (r0, spe_save_area_ptr); - } -- -- spe_save_area_ptr = gen_rtx_REG (Pmode, 11); -- insn = emit_insn (gen_addsi3 (spe_save_area_ptr, -- frame_reg_rtx, -- GEN_INT (offset))); -- /* We need to make sure the move to r11 gets noted for -- properly outputting unwind information. */ -- if (!saving_GPRs_inline) -- rs6000_frame_related (insn, frame_reg_rtx, offset, -- NULL_RTX, NULL_RTX); -- spe_offset = 0; -+ emit_insn (gen_addsi3 (spe_save_area_ptr, -+ frame_reg_rtx, GEN_INT (offset))); -+ if (REGNO (frame_reg_rtx) == 11) -+ sp_offset = -info->spe_gp_save_offset + ool_adjust; - } -- -+ - if (saving_GPRs_inline) - { - for (i = 0; i < 32 - info->first_gp_reg_save; i++) -@@ -20705,36 +20703,34 @@ - /* We're doing all this to ensure that the offset fits into - the immediate offset of 'evstdd'. */ - gcc_assert (SPE_CONST_OFFSET_OK (reg_size * i + spe_offset)); -- -+ - offset = GEN_INT (reg_size * i + spe_offset); - addr = gen_rtx_PLUS (Pmode, spe_save_area_ptr, offset); - mem = gen_rtx_MEM (V2SImode, addr); -- -+ - insn = emit_move_insn (mem, reg); -- -- rs6000_frame_related (insn, spe_save_area_ptr, -- info->spe_gp_save_offset -- + sp_offset + reg_size * i, -- offset, const0_rtx); -+ -+ rs6000_frame_related (insn, -+ spe_save_area_ptr, save_ptr_to_sp, -+ NULL_RTX, NULL_RTX); - } - } - else - { - rtx par; - -- par = rs6000_make_savres_rtx (info, gen_rtx_REG (Pmode, 11), -- 0, reg_mode, -+ par = rs6000_make_savres_rtx (info, spe_save_area_ptr, -+ ool_adjust, reg_mode, - /*savep=*/true, /*gpr=*/true, - /*lr=*/false); - insn = emit_insn (par); -- rs6000_frame_related (insn, frame_ptr_rtx, info->total_size, -+ rs6000_frame_related (insn, spe_save_area_ptr, save_ptr_to_sp, - NULL_RTX, NULL_RTX); - } -- -- -+ - /* Move the static chain pointer back. */ -- if (using_static_chain_p && !spe_regs_addressable_via_sp) -- emit_move_insn (gen_rtx_REG (Pmode, 11), gen_rtx_REG (Pmode, 0)); -+ if (using_static_chain_p && !spe_regs_addressable) -+ emit_move_insn (spe_save_area_ptr, gen_rtx_REG (Pmode, 0)); - } - else if (!WORLD_SAVE_P (info) && !saving_GPRs_inline) - { -@@ -20743,10 +20739,12 @@ - /* Need to adjust r11 (r12) if we saved any FPRs. */ - if (info->first_fp_reg_save != 64) - { -- rtx dest_reg = gen_rtx_REG (reg_mode, DEFAULT_ABI == ABI_AIX -- ? 12 : 11); -- rtx offset = GEN_INT (sp_offset -- + (-8 * (64-info->first_fp_reg_save))); -+ rtx dest_reg = gen_rtx_REG (Pmode, DEFAULT_ABI == ABI_AIX ? 12 : 11); -+ int save_off = 8 * (64 - info->first_fp_reg_save); -+ rtx offset = GEN_INT (sp_offset - save_off); -+ -+ if (REGNO (dest_reg) == REGNO (frame_reg_rtx)) -+ sp_offset = save_off; - emit_insn (gen_add3_insn (dest_reg, frame_reg_rtx, offset)); - } - -@@ -21622,40 +21620,39 @@ - && info->first_gp_reg_save != 32) - { - /* Determine whether we can address all of the registers that need -- to be saved with an offset from the stack pointer that fits in -- the small const field for SPE memory instructions. */ -- int spe_regs_addressable_via_sp -- = (SPE_CONST_OFFSET_OK(info->spe_gp_save_offset + sp_offset -- + (32 - info->first_gp_reg_save - 1) * reg_size) -+ to be saved with an offset from frame_reg_rtx that fits in -+ the small const field for SPE memory instructions. */ -+ int spe_regs_addressable -+ = (SPE_CONST_OFFSET_OK (info->spe_gp_save_offset + sp_offset -+ + reg_size * (32 - info->first_gp_reg_save - 1)) - && restoring_GPRs_inline); - int spe_offset; -+ int ool_adjust = 0; - -- if (spe_regs_addressable_via_sp) -+ if (spe_regs_addressable) - spe_offset = info->spe_gp_save_offset + sp_offset; - else -- { -+ { - rtx old_frame_reg_rtx = frame_reg_rtx; -- /* Make r11 point to the start of the SPE save area. We worried about -- not clobbering it when we were saving registers in the prologue. -- There's no need to worry here because the static chain is passed -- anew to every function. */ -- int ool_adjust = (restoring_GPRs_inline -- ? 0 -- : (info->first_gp_reg_save -- - (FIRST_SAVRES_REGISTER+1))*8); -+ /* Make r11 point to the start of the SPE save area. We worried about -+ not clobbering it when we were saving registers in the prologue. -+ There's no need to worry here because the static chain is passed -+ anew to every function. */ - -- if (frame_reg_rtx == sp_reg_rtx) -- frame_reg_rtx = gen_rtx_REG (Pmode, 11); -- emit_insn (gen_addsi3 (frame_reg_rtx, old_frame_reg_rtx, -+ if (!restoring_GPRs_inline) -+ ool_adjust = 8 * (info->first_gp_reg_save -+ - (FIRST_SAVRES_REGISTER + 1)); -+ frame_reg_rtx = gen_rtx_REG (Pmode, 11); -+ emit_insn (gen_addsi3 (frame_reg_rtx, old_frame_reg_rtx, - GEN_INT (info->spe_gp_save_offset - + sp_offset - - ool_adjust))); - /* Keep the invariant that frame_reg_rtx + sp_offset points - at the top of the stack frame. */ -- sp_offset = -info->spe_gp_save_offset; -+ sp_offset = -info->spe_gp_save_offset + ool_adjust; - -- spe_offset = 0; -- } -+ spe_offset = 0; -+ } - - if (restoring_GPRs_inline) - { -@@ -21695,8 +21692,8 @@ - { - rtx par; - -- par = rs6000_make_savres_rtx (info, gen_rtx_REG (Pmode, 11), -- 0, reg_mode, -+ par = rs6000_make_savres_rtx (info, frame_reg_rtx, -+ ool_adjust, reg_mode, - /*savep=*/false, /*gpr=*/true, - /*lr=*/true); - emit_jump_insn (par); -@@ -21717,12 +21714,12 @@ - sp_offset, can_use_exit); - else - { -- emit_insn (gen_add3_insn (gen_rtx_REG (Pmode, DEFAULT_ABI == ABI_AIX -- ? 12 : 11), -- frame_reg_rtx, -+ rtx src_reg = gen_rtx_REG (Pmode, DEFAULT_ABI == ABI_AIX ? 12 : 11); -+ -+ emit_insn (gen_add3_insn (src_reg, frame_reg_rtx, - GEN_INT (sp_offset - info->fp_size))); -- if (REGNO (frame_reg_rtx) == 11) -- sp_offset += info->fp_size; -+ if (REGNO (frame_reg_rtx) == REGNO (src_reg)) -+ sp_offset = info->fp_size; - } - - par = rs6000_make_savres_rtx (info, frame_reg_rtx, -Index: gcc/config/darwin.c -=================================================================== ---- a/src/gcc/config/darwin.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/config/darwin.c (.../branches/gcc-4_6-branch) -@@ -1753,19 +1753,51 @@ - return (!strncmp ((const char *)p, "_OBJC_", 6)); - } - --/* LTO support for Mach-O. */ -+/* LTO support for Mach-O. - --/* Section names for LTO sections. */ --static unsigned int lto_section_names_offset = 0; -+ This version uses three mach-o sections to encapsulate the (unlimited -+ number of) lto sections. - --/* This is the obstack which we use to allocate the many strings. */ --static struct obstack lto_section_names_obstack; -+ __GNU_LTO, __lto_sections contains the concatented GNU LTO section data. -+ __GNU_LTO, __section_names contains the GNU LTO section names. -+ __GNU_LTO, __section_index contains an array of values that index these. - --/* Segment name for LTO sections. */ -+ Indexed thus: -+ <section offset from the start of __GNU_LTO, __lto_sections>, -+ <section length> -+ <name offset from the start of __GNU_LTO, __section_names, -+ <name length>. -+ -+ At present, for both m32 and m64 mach-o files each of these fields is -+ represented by a uint32_t. This is because, AFAICT, a mach-o object -+ cannot exceed 4Gb because the section_64 offset field (see below) is 32bits. -+ -+ uint32_t offset; -+ "offset An integer specifying the offset to this section in the file." */ -+ -+/* Count lto section numbers. */ -+static unsigned int lto_section_num = 0; -+ -+/* A vector of information about LTO sections, at present, we only have -+ the name. TODO: see if we can get the data length somehow. */ -+typedef struct GTY (()) darwin_lto_section_e { -+ const char *sectname; -+} darwin_lto_section_e ; -+DEF_VEC_O(darwin_lto_section_e); -+DEF_VEC_ALLOC_O(darwin_lto_section_e, gc); -+ -+static GTY (()) VEC (darwin_lto_section_e, gc) * lto_section_names; -+ -+/* Segment for LTO data. */ - #define LTO_SEGMENT_NAME "__GNU_LTO" - --/* Section name for LTO section names section. */ --#define LTO_NAMES_SECTION "__section_names" -+/* Section wrapper scheme (used here to wrap the unlimited number of LTO -+ sections into three Mach-O ones). -+ NOTE: These names MUST be kept in sync with those in -+ libiberty/simple-object-mach-o. */ -+#define LTO_SECTS_SECTION "__wrapper_sects" -+#define LTO_NAMES_SECTION "__wrapper_names" -+#define LTO_INDEX_SECTION "__wrapper_index" - - /* File to temporarily store LTO data. This is appended to asm_out_file - in darwin_end_file. */ -@@ -1808,37 +1840,38 @@ - unsigned int flags, - tree decl ATTRIBUTE_UNUSED) - { -- /* LTO sections go in a special segment __GNU_LTO. We want to replace the -- section name with something we can use to represent arbitrary-length -- names (section names in Mach-O are at most 16 characters long). */ -+ /* LTO sections go in a special section that encapsulates the (unlimited) -+ number of GNU LTO sections within a single mach-o one. */ - if (strncmp (name, LTO_SECTION_NAME_PREFIX, - strlen (LTO_SECTION_NAME_PREFIX)) == 0) - { -+ darwin_lto_section_e e; - /* We expect certain flags to be set... */ - gcc_assert ((flags & (SECTION_DEBUG | SECTION_NAMED)) - == (SECTION_DEBUG | SECTION_NAMED)); - -- /* Add the section name to the things to output when we end the -- current assembler output file. -- This is all not very efficient, but that doesn't matter -- this -- shouldn't be a hot path in the compiler... */ -- obstack_1grow (<o_section_names_obstack, '\t'); -- obstack_grow (<o_section_names_obstack, ".ascii ", 7); -- obstack_1grow (<o_section_names_obstack, '"'); -- obstack_grow (<o_section_names_obstack, name, strlen (name)); -- obstack_grow (<o_section_names_obstack, "\\0\"\n", 4); -- -- /* Output the dummy section name. */ -- fprintf (asm_out_file, "\t# %s\n", name); -- fprintf (asm_out_file, "\t.section %s,__%08X,regular,debug\n", -- LTO_SEGMENT_NAME, lto_section_names_offset); -- -- /* Update the offset for the next section name. Make sure we stay -- within reasonable length. */ -- lto_section_names_offset += strlen (name) + 1; -- gcc_assert (lto_section_names_offset > 0 -- && lto_section_names_offset < ((unsigned) 1 << 31)); -- } -+ /* Switch to our combined section. */ -+ fprintf (asm_out_file, "\t.section %s,%s,regular,debug\n", -+ LTO_SEGMENT_NAME, LTO_SECTS_SECTION); -+ /* Output a label for the start of this sub-section. */ -+ fprintf (asm_out_file, "L_GNU_LTO%d:\t;# %s\n", -+ lto_section_num, name); -+ /* We have to jump through hoops to get the values of the intra-section -+ offsets... */ -+ fprintf (asm_out_file, "\t.set L$gnu$lto$offs%d,L_GNU_LTO%d-L_GNU_LTO0\n", -+ lto_section_num, lto_section_num); -+ fprintf (asm_out_file, -+ "\t.set L$gnu$lto$size%d,L_GNU_LTO%d-L_GNU_LTO%d\n", -+ lto_section_num, lto_section_num+1, lto_section_num); -+ lto_section_num++; -+ e.sectname = xstrdup (name); -+ /* Keep the names, we'll need to make a table later. -+ TODO: check that we do not revisit sections, that would break -+ the assumption of how this is done. */ -+ if (lto_section_names == NULL) -+ lto_section_names = VEC_alloc (darwin_lto_section_e, gc, 16); -+ VEC_safe_push (darwin_lto_section_e, gc, lto_section_names, &e); -+ } - else if (strncmp (name, "__DWARF,", 8) == 0) - darwin_asm_dwarf_section (name, flags, decl); - else -@@ -2711,16 +2744,12 @@ - darwin_asm_output_dwarf_delta (file, size, lab, sname); - } - --/* Called from the within the TARGET_ASM_FILE_START for each target. -- Initialize the stuff we need for LTO long section names support. */ -+/* Called from the within the TARGET_ASM_FILE_START for each target. */ - - void - darwin_file_start (void) - { -- /* We fill this obstack with the complete section text for the lto section -- names to write in darwin_file_end. */ -- obstack_init (<o_section_names_obstack); -- lto_section_names_offset = 0; -+ /* Nothing to do. */ - } - - /* Called for the TARGET_ASM_FILE_END hook. -@@ -2731,8 +2760,6 @@ - void - darwin_file_end (void) - { -- const char *lto_section_names; -- - machopic_finish (asm_out_file); - if (strcmp (lang_hooks.name, "GNU C++") == 0) - { -@@ -2762,6 +2789,13 @@ - lto_asm_txt = buf = (char *) xmalloc (n + 1); - while (fgets (lto_asm_txt, n, lto_asm_out_file)) - fputs (lto_asm_txt, asm_out_file); -+ /* Put a termination label. */ -+ fprintf (asm_out_file, "\t.section %s,%s,regular,debug\n", -+ LTO_SEGMENT_NAME, LTO_SECTS_SECTION); -+ fprintf (asm_out_file, "L_GNU_LTO%d:\t;# end of lto\n", -+ lto_section_num); -+ /* Make sure our termination label stays in this section. */ -+ fputs ("\t.space\t1\n", asm_out_file); - } - - /* Remove the temporary file. */ -@@ -2770,21 +2804,50 @@ - free (lto_asm_out_name); - } - -- /* Finish the LTO section names obstack. Don't output anything if -- there are no recorded section names. */ -- obstack_1grow (<o_section_names_obstack, '\0'); -- lto_section_names = XOBFINISH (<o_section_names_obstack, const char *); -- if (strlen (lto_section_names) > 0) -+ /* Output the names and indices. */ -+ if (lto_section_names && VEC_length (darwin_lto_section_e, lto_section_names)) - { -- fprintf (asm_out_file, -- "\t.section %s,%s,regular,debug\n", -+ int count; -+ darwin_lto_section_e *ref; -+ /* For now, we'll make the offsets 4 bytes and unaligned - we'll fix -+ the latter up ourselves. */ -+ const char *op = integer_asm_op (4,0); -+ -+ /* Emit the names. */ -+ fprintf (asm_out_file, "\t.section %s,%s,regular,debug\n", - LTO_SEGMENT_NAME, LTO_NAMES_SECTION); -- fprintf (asm_out_file, -- "\t# Section names in %s are offsets into this table\n", -- LTO_SEGMENT_NAME); -- fprintf (asm_out_file, "%s\n", lto_section_names); -+ FOR_EACH_VEC_ELT (darwin_lto_section_e, lto_section_names, count, ref) -+ { -+ fprintf (asm_out_file, "L_GNU_LTO_NAME%d:\n", count); -+ /* We have to jump through hoops to get the values of the intra-section -+ offsets... */ -+ fprintf (asm_out_file, -+ "\t.set L$gnu$lto$noff%d,L_GNU_LTO_NAME%d-L_GNU_LTO_NAME0\n", -+ count, count); -+ fprintf (asm_out_file, -+ "\t.set L$gnu$lto$nsiz%d,L_GNU_LTO_NAME%d-L_GNU_LTO_NAME%d\n", -+ count, count+1, count); -+ fprintf (asm_out_file, "\t.asciz\t\"%s\"\n", ref->sectname); -+ } -+ fprintf (asm_out_file, "L_GNU_LTO_NAME%d:\t;# end\n", lto_section_num); -+ /* make sure our termination label stays in this section. */ -+ fputs ("\t.space\t1\n", asm_out_file); -+ -+ /* Emit the Index. */ -+ fprintf (asm_out_file, "\t.section %s,%s,regular,debug\n", -+ LTO_SEGMENT_NAME, LTO_INDEX_SECTION); -+ fputs ("\t.align\t2\n", asm_out_file); -+ fputs ("# Section offset, Section length, Name offset, Name length\n", -+ asm_out_file); -+ FOR_EACH_VEC_ELT (darwin_lto_section_e, lto_section_names, count, ref) -+ { -+ fprintf (asm_out_file, "%s L$gnu$lto$offs%d\t;# %s\n", -+ op, count, ref->sectname); -+ fprintf (asm_out_file, "%s L$gnu$lto$size%d\n", op, count); -+ fprintf (asm_out_file, "%s L$gnu$lto$noff%d\n", op, count); -+ fprintf (asm_out_file, "%s L$gnu$lto$nsiz%d\n", op, count); -+ } - } -- obstack_free (<o_section_names_obstack, NULL); - - /* If we have section anchors, then we must prevent the linker from - re-arranging data. */ -Index: gcc/config/arm/arm.c -=================================================================== ---- a/src/gcc/config/arm/arm.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/config/arm/arm.c (.../branches/gcc-4_6-branch) -@@ -9812,6 +9812,9 @@ - rtx base_reg_rtx = NULL; - int i, stm_case; - -+ /* Write back of base register is currently only supported for Thumb 1. */ -+ int base_writeback = TARGET_THUMB1; -+ - /* Can only handle up to MAX_LDM_STM_OPS insns at present, though could be - easily extended if required. */ - gcc_assert (nops >= 2 && nops <= MAX_LDM_STM_OPS); -@@ -9869,7 +9872,9 @@ - /* If it isn't an integer register, then we can't do this. */ - if (unsorted_regs[i] < 0 - || (TARGET_THUMB1 && unsorted_regs[i] > LAST_LO_REGNUM) -- || (TARGET_THUMB2 && unsorted_regs[i] == base_reg) -+ /* The effects are unpredictable if the base register is -+ both updated and stored. */ -+ || (base_writeback && unsorted_regs[i] == base_reg) - || (TARGET_THUMB2 && unsorted_regs[i] == SP_REGNUM) - || unsorted_regs[i] > 14) - return 0; -@@ -19571,39 +19576,34 @@ - emit_move_insn (mem, tmp2); - } - --/* Set up operands for a register copy from src to dest, taking care not to -- clobber registers in the process. -- FIXME: This has rather high polynomial complexity (O(n^3)?) but shouldn't -- be called with a large N, so that should be OK. */ -+/* Set up OPERANDS for a register copy from SRC to DEST, taking care -+ not to early-clobber SRC registers in the process. - -+ We assume that the operands described by SRC and DEST represent a -+ decomposed copy of OPERANDS[1] into OPERANDS[0]. COUNT is the -+ number of components into which the copy has been decomposed. */ - void - neon_disambiguate_copy (rtx *operands, rtx *dest, rtx *src, unsigned int count) - { -- unsigned int copied = 0, opctr = 0; -- unsigned int done = (1 << count) - 1; -- unsigned int i, j; -+ unsigned int i; - -- while (copied != done) -+ if (!reg_overlap_mentioned_p (operands[0], operands[1]) -+ || REGNO (operands[0]) < REGNO (operands[1])) - { - for (i = 0; i < count; i++) -- { -- int good = 1; -- -- for (j = 0; good && j < count; j++) -- if (i != j && (copied & (1 << j)) == 0 -- && reg_overlap_mentioned_p (src[j], dest[i])) -- good = 0; -- -- if (good) -- { -- operands[opctr++] = dest[i]; -- operands[opctr++] = src[i]; -- copied |= 1 << i; -- } -- } -+ { -+ operands[2 * i] = dest[i]; -+ operands[2 * i + 1] = src[i]; -+ } - } -- -- gcc_assert (opctr == count * 2); -+ else -+ { -+ for (i = 0; i < count; i++) -+ { -+ operands[2 * i] = dest[count - i - 1]; -+ operands[2 * i + 1] = src[count - i - 1]; -+ } -+ } - } - - /* Expand an expression EXP that calls a built-in function, -Index: gcc/config/arm/arm.md -=================================================================== ---- a/src/gcc/config/arm/arm.md (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/config/arm/arm.md (.../branches/gcc-4_6-branch) -@@ -3272,7 +3272,7 @@ - bool need_else; - - if (which_alternative != 0 || operands[3] != const0_rtx -- || (code != PLUS && code != MINUS && code != IOR && code != XOR)) -+ || (code != PLUS && code != IOR && code != XOR)) - need_else = true; - else - need_else = false; -Index: gcc/config/pa/pa.c -=================================================================== ---- a/src/gcc/config/pa/pa.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/config/pa/pa.c (.../branches/gcc-4_6-branch) -@@ -1863,6 +1863,11 @@ - /* Handle the most common case: storing into a register. */ - else if (register_operand (operand0, mode)) - { -+ /* Legitimize TLS symbol references. This happens for references -+ that aren't a legitimate constant. */ -+ if (PA_SYMBOL_REF_TLS_P (operand1)) -+ operand1 = legitimize_tls_address (operand1); -+ - if (register_operand (operand1, mode) - || (GET_CODE (operand1) == CONST_INT - && cint_ok_for_move (INTVAL (operand1))) -Index: gcc/config/pa/pa.h -=================================================================== ---- a/src/gcc/config/pa/pa.h (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/config/pa/pa.h (.../branches/gcc-4_6-branch) -@@ -848,6 +848,9 @@ - && (NEW_HP_ASSEMBLER \ - || TARGET_GAS \ - || GET_CODE (X) != LABEL_REF) \ -+ && (!PA_SYMBOL_REF_TLS_P (X) \ -+ || (SYMBOL_REF_TLS_MODEL (X) != TLS_MODEL_GLOBAL_DYNAMIC \ -+ && SYMBOL_REF_TLS_MODEL (X) != TLS_MODEL_LOCAL_DYNAMIC)) \ - && (!TARGET_64BIT \ - || GET_CODE (X) != CONST_DOUBLE) \ - && (!TARGET_64BIT \ -Index: gcc/reload1.c -=================================================================== ---- a/src/gcc/reload1.c (.../tags/gcc_4_6_2_release) -+++ b/src/gcc/reload1.c (.../branches/gcc-4_6-branch) -@@ -3899,6 +3899,10 @@ - if (XEXP (x, 0)) - set_label_offsets (XEXP (x, 0), NULL_RTX, 1); - -+ for (x = nonlocal_goto_handler_labels; x; x = XEXP (x, 1)) -+ if (XEXP (x, 0)) -+ set_label_offsets (XEXP (x, 0), NULL_RTX, 1); -+ - for_each_eh_label (set_initial_eh_label_offset); - } - -Index: zlib/configure -=================================================================== ---- a/src/zlib/configure (.../tags/gcc_4_6_2_release) -+++ b/src/zlib/configure (.../branches/gcc-4_6-branch) -@@ -8600,7 +8600,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -9516,7 +9516,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -9534,7 +9534,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -Index: zlib/ChangeLog -=================================================================== ---- a/src/zlib/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/zlib/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,7 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: libstdc++-v3/configure -=================================================================== ---- a/src/libstdc++-v3/configure (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/configure (.../branches/gcc-4_6-branch) -@@ -9698,7 +9698,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -10614,7 +10614,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -10632,7 +10632,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -@@ -12522,7 +12522,7 @@ - esac - ;; - -- freebsd[12]*) -+ freebsd2.*) - # C++ shared libraries reported to be fairly broken before - # switch to ELF - ld_shlibs_CXX=no -@@ -14297,7 +14297,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -14315,7 +14315,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -Index: libstdc++-v3/include/debug/unordered_map -=================================================================== ---- a/src/libstdc++-v3/include/debug/unordered_map (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/include/debug/unordered_map (.../branches/gcc-4_6-branch) -@@ -276,6 +276,10 @@ - } - - iterator -+ erase(iterator __it) -+ { return erase(const_iterator(__it)); } -+ -+ iterator - erase(const_iterator __first, const_iterator __last) - { - __glibcxx_check_erase_range(__first, __last); -@@ -558,6 +562,10 @@ - } - - iterator -+ erase(iterator __it) -+ { return erase(const_iterator(__it)); } -+ -+ iterator - erase(const_iterator __first, const_iterator __last) - { - __glibcxx_check_erase_range(__first, __last); -Index: libstdc++-v3/include/debug/unordered_set -=================================================================== ---- a/src/libstdc++-v3/include/debug/unordered_set (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/include/debug/unordered_set (.../branches/gcc-4_6-branch) -@@ -269,6 +269,10 @@ - } - - iterator -+ erase(iterator __it) -+ { return erase(const_iterator(__it)); } -+ -+ iterator - erase(const_iterator __first, const_iterator __last) - { - __glibcxx_check_erase_range(__first, __last); -@@ -539,6 +543,10 @@ - } - - iterator -+ erase(iterator __it) -+ { return erase(const_iterator(__it)); } -+ -+ iterator - erase(const_iterator __first, const_iterator __last) - { - __glibcxx_check_erase_range(__first, __last); -Index: libstdc++-v3/include/debug/map.h -=================================================================== ---- a/src/libstdc++-v3/include/debug/map.h (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/include/debug/map.h (.../branches/gcc-4_6-branch) -@@ -273,6 +273,10 @@ - this->_M_invalidate_if(_Equal(__position.base())); - return iterator(_Base::erase(__position.base()), this); - } -+ -+ iterator -+ erase(iterator __position) -+ { return erase(const_iterator(__position)); } - #else - void - erase(iterator __position) -Index: libstdc++-v3/include/debug/multimap.h -=================================================================== ---- a/src/libstdc++-v3/include/debug/multimap.h (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/include/debug/multimap.h (.../branches/gcc-4_6-branch) -@@ -254,6 +254,10 @@ - this->_M_invalidate_if(_Equal(__position.base())); - return iterator(_Base::erase(__position.base()), this); - } -+ -+ iterator -+ erase(iterator __position) -+ { return erase(const_iterator(__position)); } - #else - void - erase(iterator __position) -Index: libstdc++-v3/include/std/complex -=================================================================== ---- a/src/libstdc++-v3/include/std/complex (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/include/std/complex (.../branches/gcc-4_6-branch) -@@ -1,7 +1,7 @@ - // The template and inlines for the -*- C++ -*- complex number classes. - - // Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, --// 2006, 2007, 2008, 2009, 2010 -+// 2006, 2007, 2008, 2009, 2010, 2011 - // Free Software Foundation, Inc. - // - // This file is part of the GNU ISO C++ Library. This library is free -@@ -1695,12 +1695,9 @@ - std::complex<_Tp> - __complex_acosh(const std::complex<_Tp>& __z) - { -- std::complex<_Tp> __t((__z.real() - __z.imag()) -- * (__z.real() + __z.imag()) - _Tp(1.0), -- _Tp(2.0) * __z.real() * __z.imag()); -- __t = std::sqrt(__t); -- -- return std::log(__t + __z); -+ // Kahan's formula. -+ return _Tp(2.0) * std::log(std::sqrt(_Tp(0.5) * (__z + _Tp(1.0))) -+ + std::sqrt(_Tp(0.5) * (__z - _Tp(1.0)))); - } - - #if _GLIBCXX_USE_C99_COMPLEX_TR1 -Index: libstdc++-v3/include/profile/map.h -=================================================================== ---- a/src/libstdc++-v3/include/profile/map.h (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/include/profile/map.h (.../branches/gcc-4_6-branch) -@@ -326,6 +326,10 @@ - __profcxx_map_to_unordered_map_erase(this, size(), 1); - return __i; - } -+ -+ iterator -+ erase(iterator __position) -+ { return erase(const_iterator(__position)); } - #else - void - erase(iterator __position) -Index: libstdc++-v3/include/profile/multimap.h -=================================================================== ---- a/src/libstdc++-v3/include/profile/multimap.h (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/include/profile/multimap.h (.../branches/gcc-4_6-branch) -@@ -225,6 +225,10 @@ - iterator - erase(const_iterator __position) - { return iterator(_Base::erase(__position)); } -+ -+ iterator -+ erase(iterator __position) -+ { return iterator(_Base::erase(__position)); } - #else - void - erase(iterator __position) -Index: libstdc++-v3/include/bits/hashtable.h -=================================================================== ---- a/src/libstdc++-v3/include/bits/hashtable.h (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/include/bits/hashtable.h (.../branches/gcc-4_6-branch) -@@ -440,6 +440,11 @@ - iterator - erase(const_iterator); - -+ // LWG 2059. -+ iterator -+ erase(iterator __it) -+ { return erase(const_iterator(__it)); } -+ - size_type - erase(const key_type&); - -Index: libstdc++-v3/include/bits/stl_map.h -=================================================================== ---- a/src/libstdc++-v3/include/bits/stl_map.h (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/include/bits/stl_map.h (.../branches/gcc-4_6-branch) -@@ -612,6 +612,11 @@ - iterator - erase(const_iterator __position) - { return _M_t.erase(__position); } -+ -+ // LWG 2059. -+ iterator -+ erase(iterator __position) -+ { return _M_t.erase(__position); } - #else - /** - * @brief Erases an element from a %map. -Index: libstdc++-v3/include/bits/stl_multimap.h -=================================================================== ---- a/src/libstdc++-v3/include/bits/stl_multimap.h (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/include/bits/stl_multimap.h (.../branches/gcc-4_6-branch) -@@ -533,6 +533,11 @@ - iterator - erase(const_iterator __position) - { return _M_t.erase(__position); } -+ -+ // LWG 2059. -+ iterator -+ erase(iterator __position) -+ { return _M_t.erase(__position); } - #else - /** - * @brief Erases an element from a %multimap. -Index: libstdc++-v3/include/bits/stl_tree.h -=================================================================== ---- a/src/libstdc++-v3/include/bits/stl_tree.h (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/include/bits/stl_tree.h (.../branches/gcc-4_6-branch) -@@ -760,6 +760,16 @@ - _M_erase_aux(__position); - return __result._M_const_cast(); - } -+ -+ // LWG 2059. -+ iterator -+ erase(iterator __position) -+ { -+ iterator __result = __position; -+ ++__result; -+ _M_erase_aux(__position); -+ return __result; -+ } - #else - void - erase(iterator __position) -Index: libstdc++-v3/include/tr1/complex -=================================================================== ---- a/src/libstdc++-v3/include/tr1/complex (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/include/tr1/complex (.../branches/gcc-4_6-branch) -@@ -185,12 +185,9 @@ - std::complex<_Tp> - __complex_acosh(const std::complex<_Tp>& __z) - { -- std::complex<_Tp> __t((__z.real() - __z.imag()) -- * (__z.real() + __z.imag()) - _Tp(1.0), -- _Tp(2.0) * __z.real() * __z.imag()); -- __t = std::sqrt(__t); -- -- return std::log(__t + __z); -+ // Kahan's formula. -+ return _Tp(2.0) * std::log(std::sqrt(_Tp(0.5) * (__z + _Tp(1.0))) -+ + std::sqrt(_Tp(0.5) * (__z - _Tp(1.0)))); - } - - #if _GLIBCXX_USE_C99_COMPLEX_TR1 -Index: libstdc++-v3/include/tr1/poly_hermite.tcc -=================================================================== ---- a/src/libstdc++-v3/include/tr1/poly_hermite.tcc (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/include/tr1/poly_hermite.tcc (.../branches/gcc-4_6-branch) -@@ -1,6 +1,6 @@ - // Special functions -*- C++ -*- - --// Copyright (C) 2006, 2007, 2008, 2009, 2010 -+// Copyright (C) 2006, 2007, 2008, 2009, 2010, 2011 - // Free Software Foundation, Inc. - // - // This file is part of the GNU ISO C++ Library. This library is free -@@ -84,7 +84,7 @@ - unsigned int __i; - for (__H_nm2 = __H_0, __H_nm1 = __H_1, __i = 2; __i <= __n; ++__i) - { -- __H_n = 2 * (__x * __H_nm1 + (__i - 1) * __H_nm2); -+ __H_n = 2 * (__x * __H_nm1 - (__i - 1) * __H_nm2); - __H_nm2 = __H_nm1; - __H_nm1 = __H_n; - } -Index: libstdc++-v3/ChangeLog -=================================================================== ---- a/src/libstdc++-v3/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,55 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ -+2011-11-16 Paolo Carlini <paolo.carlini@oracle.com> -+ -+ PR libstdc++/51142 -+ * include/debug/unordered_map (unordered_map<>::erase(iterator), -+ unordered_multimap<>::erase(iterator)): Add, consistently with -+ LWG 2059. -+ * include/debug/unordered_set (unordered_set<>::erase(iterator), -+ unordered_multiset<>::erase(iterator)): Likewise. -+ * include/debug/map.h (map<>::erase(iterator)): Likewise. -+ * include/debug/multimap.h (multimap<>::erase(iterator)): Likewise. -+ * include/profile/map.h (map<>::erase(iterator)): Likewise. -+ * include/profile/multimap.h (multimap<>::erase(iterator)): Likewise. -+ * include/bits/hashtable.h (_Hashtable<>::erase(iterator)): Likewise. -+ * include/bits/stl_map.h (map<>::erase(iterator)): Likewise. -+ * include/bits/stl_multimap.h (multimap<>::erase(iterator)): Likewise. -+ * include/bits/stl_tree.h (_Rb_tree<>::erase(iterator)): Likewise. -+ * testsuite/23_containers/unordered_map/erase/51142.cc: New. -+ * testsuite/23_containers/multimap/modifiers/erase/51142.cc: Likewise. -+ * testsuite/23_containers/set/modifiers/erase/51142.cc: Likewise. -+ * testsuite/23_containers/unordered_multimap/erase/51142.cc: Likewise. -+ * testsuite/23_containers/unordered_set/erase/51142.cc: Likewise. -+ * testsuite/23_containers/multiset/modifiers/erase/51142.cc: Likewise. -+ * testsuite/23_containers/unordered_multiset/erase/51142.cc: Likewise. -+ * testsuite/23_containers/map/modifiers/erase/51142.cc: Likewise. -+ -+2011-11-15 Jason Dick <dickphd@gmail.com> -+ -+ PR libstdc++/51133 -+ * include/tr1/poly_hermite.tcc (__poly_hermite_recursion): Fix -+ wrong sign in recursion relation. -+ -+2011-11-02 Richard B. Kreckel <kreckel@ginac.de> -+ Paolo Carlini <paolo.carlini@oracle.com> -+ -+ PR libstdc++/50880 -+ * include/std/complex (__complex_acosh): Fix in a better way, -+ use Kahan's formula. -+ * include/tr1/complex (__complex_acosh): Likewise. -+ -+2011-11-02 Richard B. Kreckel <kreckel@ginac.de> -+ Paolo Carlini <paolo.carlini@oracle.com> -+ -+ PR libstdc++/50880 -+ * include/std/complex (__complex_acosh): Fix for __z.real() < 0. -+ * include/tr1/complex (__complex_acosh): Likewise. -+ * testsuite/26_numerics/complex/50880.cc: New. -+ * testsuite/tr1/8_c_compatibility/complex/50880.cc: Likewise. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: libstdc++-v3/testsuite/26_numerics/complex/50880.cc -=================================================================== ---- a/src/libstdc++-v3/testsuite/26_numerics/complex/50880.cc (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/testsuite/26_numerics/complex/50880.cc (.../branches/gcc-4_6-branch) -@@ -0,0 +1,53 @@ -+// { dg-options "-std=gnu++0x" } -+// -+// Copyright (C) 2011 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+// -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without even the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+// -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// <http://www.gnu.org/licenses/>. -+ -+#include <complex> -+#include <testsuite_hooks.h> -+ -+template<typename T> -+ void test01_do() -+ { -+ bool test __attribute__((unused)) = true; -+ -+ const std::complex<T> ca(T(-2), T(2)); -+ const std::complex<T> cb(T(-2), T(0)); -+ const std::complex<T> cc(T(-2), T(-2)); -+ -+ std::complex<T> cra = std::acosh(ca); -+ std::complex<T> crb = std::acosh(cb); -+ std::complex<T> crc = std::acosh(cc); -+ -+ VERIFY( cra.real() > T(0) ); -+ VERIFY( crb.real() > T(0) ); -+ VERIFY( crc.real() > T(0) ); -+ } -+ -+// libstdc++/50880 -+void test01() -+{ -+ test01_do<float>(); -+ test01_do<double>(); -+ test01_do<long double>(); -+} -+ -+int main() -+{ -+ test01(); -+ return 0; -+} -Index: libstdc++-v3/testsuite/tr1/8_c_compatibility/complex/50880.cc -=================================================================== ---- a/src/libstdc++-v3/testsuite/tr1/8_c_compatibility/complex/50880.cc (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/testsuite/tr1/8_c_compatibility/complex/50880.cc (.../branches/gcc-4_6-branch) -@@ -0,0 +1,51 @@ -+// Copyright (C) 2011 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+// -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without even the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+// -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// <http://www.gnu.org/licenses/>. -+ -+#include <tr1/complex> -+#include <testsuite_hooks.h> -+ -+template<typename T> -+ void test01_do() -+ { -+ bool test __attribute__((unused)) = true; -+ -+ const std::complex<T> ca(T(-2), T(2)); -+ const std::complex<T> cb(T(-2), T(0)); -+ const std::complex<T> cc(T(-2), T(-2)); -+ -+ std::complex<T> cra = std::tr1::acosh(ca); -+ std::complex<T> crb = std::tr1::acosh(cb); -+ std::complex<T> crc = std::tr1::acosh(cc); -+ -+ VERIFY( cra.real() > T(0) ); -+ VERIFY( crb.real() > T(0) ); -+ VERIFY( crc.real() > T(0) ); -+ } -+ -+// libstdc++/50880 -+void test01() -+{ -+ test01_do<float>(); -+ test01_do<double>(); -+ test01_do<long double>(); -+} -+ -+int main() -+{ -+ test01(); -+ return 0; -+} -Index: libstdc++-v3/testsuite/23_containers/unordered_map/erase/51142.cc -=================================================================== ---- a/src/libstdc++-v3/testsuite/23_containers/unordered_map/erase/51142.cc (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/testsuite/23_containers/unordered_map/erase/51142.cc (.../branches/gcc-4_6-branch) -@@ -0,0 +1,38 @@ -+// Copyright (C) 2011 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+// -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without even the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+// -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// <http://www.gnu.org/licenses/>. -+// -+ -+// { dg-do compile } -+// { dg-options "-std=gnu++0x" } -+ -+#include <unordered_map> -+ -+struct X -+{ -+ template<typename T> -+ X(T&) {} -+}; -+ -+bool operator==(const X&, const X&) { return false; } -+ -+// LWG 2059. -+void erasor(std::unordered_map<X, int>& s, X x) -+{ -+ std::unordered_map<X, int>::iterator it = s.find(x); -+ if (it != s.end()) -+ s.erase(it); -+} -Index: libstdc++-v3/testsuite/23_containers/multimap/modifiers/erase/51142.cc -=================================================================== ---- a/src/libstdc++-v3/testsuite/23_containers/multimap/modifiers/erase/51142.cc (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/testsuite/23_containers/multimap/modifiers/erase/51142.cc (.../branches/gcc-4_6-branch) -@@ -0,0 +1,38 @@ -+// Copyright (C) 2011 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+// -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without even the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+// -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// <http://www.gnu.org/licenses/>. -+// -+ -+// { dg-do compile } -+// { dg-options "-std=gnu++0x" } -+ -+#include <map> -+ -+struct X -+{ -+ template<typename T> -+ X(T&) {} -+}; -+ -+bool operator<(const X&, const X&) { return false; } -+ -+// LWG 2059. -+void erasor(std::multimap<X, int>& s, X x) -+{ -+ std::multimap<X, int>::iterator it = s.find(x); -+ if (it != s.end()) -+ s.erase(it); -+} -Index: libstdc++-v3/testsuite/23_containers/set/modifiers/erase/51142.cc -=================================================================== ---- a/src/libstdc++-v3/testsuite/23_containers/set/modifiers/erase/51142.cc (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/testsuite/23_containers/set/modifiers/erase/51142.cc (.../branches/gcc-4_6-branch) -@@ -0,0 +1,38 @@ -+// Copyright (C) 2011 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+// -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without even the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+// -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// <http://www.gnu.org/licenses/>. -+// -+ -+// { dg-do compile } -+// { dg-options "-std=gnu++0x" } -+ -+#include <set> -+ -+struct X -+{ -+ template<typename T> -+ X(T&) {} -+}; -+ -+bool operator<(const X&, const X&) { return false; } -+ -+// LWG 2059. -+void erasor(std::set<X>& s, X x) -+{ -+ std::set<X>::iterator it = s.find(x); -+ if (it != s.end()) -+ s.erase(it); -+} -Index: libstdc++-v3/testsuite/23_containers/unordered_multimap/erase/51142.cc -=================================================================== ---- a/src/libstdc++-v3/testsuite/23_containers/unordered_multimap/erase/51142.cc (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/testsuite/23_containers/unordered_multimap/erase/51142.cc (.../branches/gcc-4_6-branch) -@@ -0,0 +1,38 @@ -+// Copyright (C) 2011 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+// -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without even the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+// -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// <http://www.gnu.org/licenses/>. -+// -+ -+// { dg-do compile } -+// { dg-options "-std=gnu++0x" } -+ -+#include <unordered_map> -+ -+struct X -+{ -+ template<typename T> -+ X(T&) {} -+}; -+ -+bool operator==(const X&, const X&) { return false; } -+ -+// LWG 2059. -+void erasor(std::unordered_multimap<X, int>& s, X x) -+{ -+ std::unordered_multimap<X, int>::iterator it = s.find(x); -+ if (it != s.end()) -+ s.erase(it); -+} -Index: libstdc++-v3/testsuite/23_containers/unordered_set/erase/51142.cc -=================================================================== ---- a/src/libstdc++-v3/testsuite/23_containers/unordered_set/erase/51142.cc (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/testsuite/23_containers/unordered_set/erase/51142.cc (.../branches/gcc-4_6-branch) -@@ -0,0 +1,38 @@ -+// Copyright (C) 2011 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+// -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without even the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+// -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// <http://www.gnu.org/licenses/>. -+// -+ -+// { dg-do compile } -+// { dg-options "-std=gnu++0x" } -+ -+#include <unordered_set> -+ -+struct X -+{ -+ template<typename T> -+ X(T&) {} -+}; -+ -+bool operator==(const X&, const X&) { return false; } -+ -+// LWG 2059. -+void erasor(std::unordered_set<X>& s, X x) -+{ -+ std::unordered_set<X>::iterator it = s.find(x); -+ if (it != s.end()) -+ s.erase(it); -+} -Index: libstdc++-v3/testsuite/23_containers/multiset/modifiers/erase/51142.cc -=================================================================== ---- a/src/libstdc++-v3/testsuite/23_containers/multiset/modifiers/erase/51142.cc (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/testsuite/23_containers/multiset/modifiers/erase/51142.cc (.../branches/gcc-4_6-branch) -@@ -0,0 +1,38 @@ -+// Copyright (C) 2011 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+// -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without even the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+// -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// <http://www.gnu.org/licenses/>. -+// -+ -+// { dg-do compile } -+// { dg-options "-std=gnu++0x" } -+ -+#include <set> -+ -+struct X -+{ -+ template<typename T> -+ X(T&) {} -+}; -+ -+bool operator<(const X&, const X&) { return false; } -+ -+// LWG 2059. -+void erasor(std::multiset<X>& s, X x) -+{ -+ std::multiset<X>::iterator it = s.find(x); -+ if (it != s.end()) -+ s.erase(it); -+} -Index: libstdc++-v3/testsuite/23_containers/unordered_multiset/erase/51142.cc -=================================================================== ---- a/src/libstdc++-v3/testsuite/23_containers/unordered_multiset/erase/51142.cc (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/testsuite/23_containers/unordered_multiset/erase/51142.cc (.../branches/gcc-4_6-branch) -@@ -0,0 +1,38 @@ -+// Copyright (C) 2011 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+// -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without even the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+// -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// <http://www.gnu.org/licenses/>. -+// -+ -+// { dg-do compile } -+// { dg-options "-std=gnu++0x" } -+ -+#include <unordered_set> -+ -+struct X -+{ -+ template<typename T> -+ X(T&) {} -+}; -+ -+bool operator==(const X&, const X&) { return false; } -+ -+// LWG 2059. -+void erasor(std::unordered_multiset<X>& s, X x) -+{ -+ std::unordered_multiset<X>::iterator it = s.find(x); -+ if (it != s.end()) -+ s.erase(it); -+} -Index: libstdc++-v3/testsuite/23_containers/map/modifiers/erase/51142.cc -=================================================================== ---- a/src/libstdc++-v3/testsuite/23_containers/map/modifiers/erase/51142.cc (.../tags/gcc_4_6_2_release) -+++ b/src/libstdc++-v3/testsuite/23_containers/map/modifiers/erase/51142.cc (.../branches/gcc-4_6-branch) -@@ -0,0 +1,38 @@ -+// Copyright (C) 2011 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+// -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without even the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+// -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// <http://www.gnu.org/licenses/>. -+// -+ -+// { dg-do compile } -+// { dg-options "-std=gnu++0x" } -+ -+#include <map> -+ -+struct X -+{ -+ template<typename T> -+ X(T&) {} -+}; -+ -+bool operator<(const X&, const X&) { return false; } -+ -+// LWG 2059. -+void erasor(std::map<X, int>& s, X x) -+{ -+ std::map<X, int>::iterator it = s.find(x); -+ if (it != s.end()) -+ s.erase(it); -+} -Index: configure.ac -=================================================================== ---- a/src/configure.ac (.../tags/gcc_4_6_2_release) -+++ b/src/configure.ac (.../branches/gcc-4_6-branch) -@@ -2428,10 +2428,6 @@ - extra_arflags_for_target=" -X32_64" - extra_nmflags_for_target=" -B -X32_64" - ;; -- *-*-darwin[[3-9]]*) -- # ranlib before Darwin10 requires the -c flag to look at common symbols. -- extra_ranlibflags_for_target=" -c" -- ;; - mips*-*-pe | sh*-*-pe | *arm-wince-pe) - target_makefile_frag="config/mt-wince" - ;; -Index: libobjc/configure -=================================================================== ---- a/src/libobjc/configure (.../tags/gcc_4_6_2_release) -+++ b/src/libobjc/configure (.../branches/gcc-4_6-branch) -@@ -8797,7 +8797,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -9713,7 +9713,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -9731,7 +9731,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -Index: libobjc/ChangeLog -=================================================================== ---- a/src/libobjc/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/libobjc/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,7 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: libgfortran/configure -=================================================================== ---- a/src/libgfortran/configure (.../tags/gcc_4_6_2_release) -+++ b/src/libgfortran/configure (.../branches/gcc-4_6-branch) -@@ -10326,7 +10326,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -11242,7 +11242,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -11260,7 +11260,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -@@ -14162,7 +14162,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds_FC='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct_FC=yes - hardcode_minus_L_FC=yes -@@ -14870,7 +14870,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -14888,7 +14888,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -Index: libgfortran/ChangeLog -=================================================================== ---- a/src/libgfortran/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/libgfortran/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,7 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: libada/Makefile.in -=================================================================== ---- a/src/libada/Makefile.in (.../tags/gcc_4_6_2_release) -+++ b/src/libada/Makefile.in (.../branches/gcc-4_6-branch) -@@ -70,6 +70,7 @@ - version := $(shell cat $(srcdir)/../gcc/BASE-VER) - libsubdir := $(libdir)/gcc/$(target_noncanonical)/$(version)$(MULTISUBDIR) - ADA_RTS_DIR=$(GCC_DIR)/ada/rts$(subst /,_,$(MULTISUBDIR)) -+ADA_RTS_SUBDIR=./rts$(subst /,_,$(MULTISUBDIR)) - - # exeext should not be used because it's the *host* exeext. We're building - # a *target* library, aren't we?!? Likewise for CC. Still, provide bogus -@@ -96,10 +97,10 @@ - "CFLAGS=$(CFLAGS) $(WARN_CFLAGS)" - - # Rules to build gnatlib. --.PHONY: gnatlib gnatlib-plain gnatlib-sjlj gnatlib-zcx gnatlib-shared oscons -+.PHONY: gnatlib gnatlib-plain gnatlib-sjlj gnatlib-zcx gnatlib-shared osconstool - gnatlib: @default_gnatlib_target@ - --gnatlib-plain: oscons $(GCC_DIR)/ada/Makefile -+gnatlib-plain: osconstool $(GCC_DIR)/ada/Makefile - test -f stamp-libada || \ - $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) gnatlib \ - && touch stamp-libada -@@ -108,7 +109,7 @@ - $(LN_S) $(ADA_RTS_DIR) adainclude - $(LN_S) $(ADA_RTS_DIR) adalib - --gnatlib-sjlj gnatlib-zcx gnatlib-shared: oscons $(GCC_DIR)/ada/Makefile -+gnatlib-sjlj gnatlib-zcx gnatlib-shared: osconstool $(GCC_DIR)/ada/Makefile - test -f stamp-libada || \ - $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) $@ \ - && touch stamp-libada -@@ -117,8 +118,8 @@ - $(LN_S) $(ADA_RTS_DIR) adainclude - $(LN_S) $(ADA_RTS_DIR) adalib - --oscons: -- $(MAKE) -C $(GCC_DIR) $(LIBADA_FLAGS_TO_PASS) ada/s-oscons.ads -+osconstool: -+ $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) ./bldtools/oscons/xoscons - - install-gnatlib: $(GCC_DIR)/ada/Makefile - $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) install-gnatlib -Index: libada/ChangeLog -=================================================================== ---- a/src/libada/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/libada/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,9 @@ -+2011-11-13 Iain Sandoe <iains@gcc.gnu.org> -+ -+ Backport from mainline r181319 -+ Makefile.in: Change dependency on oscons to depend on the generator -+ tool. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: libmudflap/configure -=================================================================== ---- a/src/libmudflap/configure (.../tags/gcc_4_6_2_release) -+++ b/src/libmudflap/configure (.../branches/gcc-4_6-branch) -@@ -8818,7 +8818,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -9731,7 +9731,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -9749,7 +9749,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -Index: libmudflap/ChangeLog -=================================================================== ---- a/src/libmudflap/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/libmudflap/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,7 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: boehm-gc/ChangeLog -=================================================================== ---- a/src/boehm-gc/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/boehm-gc/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,7 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: boehm-gc/configure -=================================================================== ---- a/src/boehm-gc/configure (.../tags/gcc_4_6_2_release) -+++ b/src/boehm-gc/configure (.../branches/gcc-4_6-branch) -@@ -9604,7 +9604,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -10520,7 +10520,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -10538,7 +10538,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -@@ -12428,7 +12428,7 @@ - esac - ;; - -- freebsd[12]*) -+ freebsd2.*) - # C++ shared libraries reported to be fairly broken before - # switch to ELF - ld_shlibs_CXX=no -@@ -14203,7 +14203,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -14221,7 +14221,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -Index: libiberty/ChangeLog -=================================================================== ---- a/src/libiberty/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/libiberty/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,17 @@ -+2011-11-13 Iain Sandoe <iains@gcc.gnu.org> -+ -+ PR target/48108 -+ Backport from mainline r180523 -+ * simple-object-mach-o.c (GNU_WRAPPER_SECTS, GNU_WRAPPER_INDEX, -+ GNU_WRAPPER_NAMES): New macros. -+ (simple_object_mach_o_segment): Handle wrapper scheme. -+ (simple_object_mach_o_write_section_header): Allow the segment name -+ to be supplied. -+ (simple_object_mach_o_write_segment): Handle wrapper scheme. Ensure -+ that the top-level segment name in the load command is empty. -+ (simple_object_mach_o_write_to_file): Determine the number of -+ sections during segment output, use that in writing the header. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: libiberty/simple-object-mach-o.c -=================================================================== ---- a/src/libiberty/simple-object-mach-o.c (.../tags/gcc_4_6_2_release) -+++ b/src/libiberty/simple-object-mach-o.c (.../branches/gcc-4_6-branch) -@@ -1,5 +1,5 @@ - /* simple-object-mach-o.c -- routines to manipulate Mach-O object files. -- Copyright 2010 Free Software Foundation, Inc. -+ Copyright 2010, 2011 Free Software Foundation, Inc. - Written by Ian Lance Taylor, Google. - - This program is free software; you can redistribute it and/or modify it -@@ -174,6 +174,15 @@ - - #define GNU_SECTION_NAMES "__section_names" - -+/* A GNU-specific extension to wrap multiple sections using three -+ mach-o sections within a given segment. The section '__wrapper_sects' -+ is subdivided according to the index '__wrapper_index' and each sub -+ sect is named according to the names supplied in '__wrapper_names'. */ -+ -+#define GNU_WRAPPER_SECTS "__wrapper_sects" -+#define GNU_WRAPPER_INDEX "__wrapper_index" -+#define GNU_WRAPPER_NAMES "__wrapper_names" -+ - /* Private data for an simple_object_read. */ - - struct simple_object_mach_o_read -@@ -214,8 +223,19 @@ - unsigned int reserved; - }; - --/* See if we have a Mach-O file. */ -+/* See if we have a Mach-O MH_OBJECT file: - -+ A standard MH_OBJECT (from as) will have three load commands: -+ 0 - LC_SEGMENT/LC_SEGMENT64 -+ 1 - LC_SYMTAB -+ 2 - LC_DYSYMTAB -+ -+ The LC_SEGMENT/LC_SEGMENT64 will introduce a single anonymous segment -+ containing all the sections. -+ -+ Files written by simple-object will have only the segment command -+ (no symbol tables). */ -+ - static void * - simple_object_mach_o_match ( - unsigned char header[SIMPLE_OBJECT_MATCH_HEADER_LEN], -@@ -356,9 +376,30 @@ - } - } - --/* Handle a segment in a Mach-O file. Return 1 if we should continue, -- 0 if the caller should return. */ -+/* Handle a segment in a Mach-O Object file. - -+ This will callback to the function pfn for each "section found" the meaning -+ of which depends on gnu extensions to mach-o: -+ -+ If we find mach-o sections (with the segment name as specified) which also -+ contain: a 'sects' wrapper, an index, and a name table, we expand this into -+ as many sections as are specified in the index. In this case, there will -+ be a callback for each of these. -+ -+ We will also allow an extension that permits long names (more than 16 -+ characters) to be used with mach-o. In this case, the section name has -+ a specific format embedding an index into a name table, and the file must -+ contain such name table. -+ -+ Return 1 if we should continue, 0 if the caller should return. */ -+ -+#define SOMO_SECTS_PRESENT 0x01 -+#define SOMO_INDEX_PRESENT 0x02 -+#define SOMO_NAMES_PRESENT 0x04 -+#define SOMO_LONGN_PRESENT 0x08 -+#define SOMO_WRAPPING (SOMO_SECTS_PRESENT | SOMO_INDEX_PRESENT \ -+ | SOMO_NAMES_PRESENT) -+ - static int - simple_object_mach_o_segment (simple_object_read *sobj, off_t offset, - const unsigned char *segbuf, -@@ -378,9 +419,20 @@ - unsigned int nsects; - unsigned char *secdata; - unsigned int i; -+ unsigned int gnu_sections_found; - unsigned int strtab_index; -+ unsigned int index_index; -+ unsigned int nametab_index; -+ unsigned int sections_index; - char *strtab; -+ char *nametab; -+ unsigned char *index; - size_t strtab_size; -+ size_t nametab_size; -+ size_t index_size; -+ unsigned int n_wrapped_sects; -+ size_t wrapper_sect_size; -+ off_t wrapper_sect_offset; - - fetch_32 = (omr->is_big_endian - ? simple_object_fetch_big_32 -@@ -409,6 +461,8 @@ - nsects)); - } - -+ /* Fetch the section headers from the segment command. */ -+ - secdata = XNEWVEC (unsigned char, nsects * sechdrsize); - if (!simple_object_internal_read (sobj->descriptor, offset + seghdrsize, - secdata, nsects * sechdrsize, errmsg, err)) -@@ -417,9 +471,13 @@ - return 0; - } - -- /* Scan for a __section_names section. This is in effect a GNU -- extension that permits section names longer than 16 chars. */ -+ /* Scan for special sections that signal GNU extensions to the format. */ - -+ gnu_sections_found = 0; -+ index_index = nsects; -+ sections_index = nsects; -+ strtab_index = nsects; -+ nametab_index = nsects; - for (i = 0; i < nsects; ++i) - { - size_t nameoff; -@@ -427,19 +485,104 @@ - nameoff = i * sechdrsize + segname_offset; - if (strcmp ((char *) secdata + nameoff, omr->segment_name) != 0) - continue; -+ - nameoff = i * sechdrsize + sectname_offset; -- if (strcmp ((char *) secdata + nameoff, GNU_SECTION_NAMES) == 0) -- break; -+ if (strcmp ((char *) secdata + nameoff, GNU_WRAPPER_NAMES) == 0) -+ { -+ nametab_index = i; -+ gnu_sections_found |= SOMO_NAMES_PRESENT; -+ } -+ else if (strcmp ((char *) secdata + nameoff, GNU_WRAPPER_INDEX) == 0) -+ { -+ index_index = i; -+ gnu_sections_found |= SOMO_INDEX_PRESENT; -+ } -+ else if (strcmp ((char *) secdata + nameoff, GNU_WRAPPER_SECTS) == 0) -+ { -+ sections_index = i; -+ gnu_sections_found |= SOMO_SECTS_PRESENT; -+ } -+ else if (strcmp ((char *) secdata + nameoff, GNU_SECTION_NAMES) == 0) -+ { -+ strtab_index = i; -+ gnu_sections_found |= SOMO_LONGN_PRESENT; -+ } - } - -- strtab_index = i; -- if (strtab_index >= nsects) -+ /* If any of the special wrapper section components is present, then -+ they all should be. */ -+ -+ if ((gnu_sections_found & SOMO_WRAPPING) != 0) - { -- strtab = NULL; -- strtab_size = 0; -+ off_t nametab_offset; -+ off_t index_offset; -+ -+ if ((gnu_sections_found & SOMO_WRAPPING) != SOMO_WRAPPING) -+ { -+ *errmsg = "GNU Mach-o section wrapper: required section missing"; -+ *err = 0; /* No useful errno. */ -+ XDELETEVEC (secdata); -+ return 0; -+ } -+ -+ /* Fetch the name table. */ -+ -+ simple_object_mach_o_section_info (omr->is_big_endian, is_32, -+ secdata + nametab_index * sechdrsize, -+ &nametab_offset, &nametab_size); -+ nametab = XNEWVEC (char, nametab_size); -+ if (!simple_object_internal_read (sobj->descriptor, -+ sobj->offset + nametab_offset, -+ (unsigned char *) nametab, nametab_size, -+ errmsg, err)) -+ { -+ XDELETEVEC (nametab); -+ XDELETEVEC (secdata); -+ return 0; -+ } -+ -+ /* Fetch the index. */ -+ -+ simple_object_mach_o_section_info (omr->is_big_endian, is_32, -+ secdata + index_index * sechdrsize, -+ &index_offset, &index_size); -+ index = XNEWVEC (unsigned char, index_size); -+ if (!simple_object_internal_read (sobj->descriptor, -+ sobj->offset + index_offset, -+ index, index_size, -+ errmsg, err)) -+ { -+ XDELETEVEC (index); -+ XDELETEVEC (nametab); -+ XDELETEVEC (secdata); -+ return 0; -+ } -+ -+ /* The index contains 4 unsigned ints per sub-section: -+ sub-section offset/length, sub-section name/length. -+ We fix this for both 32 and 64 bit mach-o for now, since -+ other fields limit the maximum size of an object to 4G. */ -+ n_wrapped_sects = index_size / 16; -+ -+ /* Get the parameters for the wrapper too. */ -+ simple_object_mach_o_section_info (omr->is_big_endian, is_32, -+ secdata + sections_index * sechdrsize, -+ &wrapper_sect_offset, -+ &wrapper_sect_size); - } - else - { -+ index = NULL; -+ index_size = 0; -+ nametab = NULL; -+ nametab_size = 0; -+ n_wrapped_sects = 0; -+ } -+ -+ /* If we have a long names section, fetch it. */ -+ -+ if ((gnu_sections_found & SOMO_LONGN_PRESENT) != 0) -+ { - off_t strtab_offset; - - simple_object_mach_o_section_info (omr->is_big_endian, is_32, -@@ -452,52 +595,120 @@ - errmsg, err)) - { - XDELETEVEC (strtab); -+ XDELETEVEC (index); -+ XDELETEVEC (nametab); - XDELETEVEC (secdata); - return 0; - } - } -+ else -+ { -+ strtab = NULL; -+ strtab_size = 0; -+ strtab_index = nsects; -+ } - - /* Process the sections. */ - - for (i = 0; i < nsects; ++i) - { - const unsigned char *sechdr; -- char namebuf[MACH_O_NAME_LEN + 1]; -+ char namebuf[MACH_O_NAME_LEN * 2 + 2]; - char *name; - off_t secoffset; - size_t secsize; -+ int l; - -- if (i == strtab_index) -+ sechdr = secdata + i * sechdrsize; -+ -+ /* We've already processed the long section names. */ -+ -+ if ((gnu_sections_found & SOMO_LONGN_PRESENT) != 0 -+ && i == strtab_index) - continue; - -- sechdr = secdata + i * sechdrsize; -+ /* We only act on the segment named. */ - - if (strcmp ((char *) sechdr + segname_offset, omr->segment_name) != 0) - continue; - -- memcpy (namebuf, sechdr + sectname_offset, MACH_O_NAME_LEN); -- namebuf[MACH_O_NAME_LEN] = '\0'; -+ /* Process sections associated with the wrapper. */ - -- name = &namebuf[0]; -- if (strtab != NULL && name[0] == '_' && name[1] == '_') -+ if ((gnu_sections_found & SOMO_WRAPPING) != 0) - { -- unsigned long stringoffset; -+ if (i == nametab_index || i == index_index) -+ continue; - -- if (sscanf (name + 2, "%08lX", &stringoffset) == 1) -+ if (i == sections_index) - { -- if (stringoffset >= strtab_size) -+ unsigned int j; -+ for (j = 0; j < n_wrapped_sects; ++j) - { -- *errmsg = "section name offset out of range"; -- *err = 0; -- XDELETEVEC (strtab); -- XDELETEVEC (secdata); -- return 0; -+ unsigned int subsect_offset, subsect_length, name_offset; -+ subsect_offset = (*fetch_32) (index + 16 * j); -+ subsect_length = (*fetch_32) (index + 16 * j + 4); -+ name_offset = (*fetch_32) (index + 16 * j + 8); -+ /* We don't need the name_length yet. */ -+ -+ secoffset = wrapper_sect_offset + subsect_offset; -+ secsize = subsect_length; -+ name = nametab + name_offset; -+ -+ if (!(*pfn) (data, name, secoffset, secsize)) -+ { -+ *errmsg = NULL; -+ *err = 0; -+ XDELETEVEC (index); -+ XDELETEVEC (nametab); -+ XDELETEVEC (strtab); -+ XDELETEVEC (secdata); -+ return 0; -+ } - } -- -- name = strtab + stringoffset; -+ continue; - } - } - -+ if ((gnu_sections_found & SOMO_LONGN_PRESENT) != 0) -+ { -+ memcpy (namebuf, sechdr + sectname_offset, MACH_O_NAME_LEN); -+ namebuf[MACH_O_NAME_LEN] = '\0'; -+ -+ name = &namebuf[0]; -+ if (strtab != NULL && name[0] == '_' && name[1] == '_') -+ { -+ unsigned long stringoffset; -+ -+ if (sscanf (name + 2, "%08lX", &stringoffset) == 1) -+ { -+ if (stringoffset >= strtab_size) -+ { -+ *errmsg = "section name offset out of range"; -+ *err = 0; -+ XDELETEVEC (index); -+ XDELETEVEC (nametab); -+ XDELETEVEC (strtab); -+ XDELETEVEC (secdata); -+ return 0; -+ } -+ -+ name = strtab + stringoffset; -+ } -+ } -+ } -+ else -+ { -+ /* Otherwise, make a name like __segment,__section as per the -+ convention in mach-o asm. */ -+ name = &namebuf[0]; -+ memset (namebuf, 0, MACH_O_NAME_LEN * 2 + 2); -+ memcpy (namebuf, (char *) sechdr + segname_offset, MACH_O_NAME_LEN); -+ l = strlen (namebuf); -+ namebuf[l] = ','; -+ memcpy (namebuf + l + 1, (char *) sechdr + sectname_offset, -+ MACH_O_NAME_LEN); -+ } -+ - simple_object_mach_o_section_info (omr->is_big_endian, is_32, sechdr, - &secoffset, &secsize); - -@@ -505,12 +716,16 @@ - { - *errmsg = NULL; - *err = 0; -+ XDELETEVEC (index); -+ XDELETEVEC (nametab); - XDELETEVEC (strtab); - XDELETEVEC (secdata); - return 0; - } - } - -+ XDELETEVEC (index); -+ XDELETEVEC (nametab); - XDELETEVEC (strtab); - XDELETEVEC (secdata); - -@@ -724,9 +939,9 @@ - simple_object_mach_o_write_section_header (simple_object_write *sobj, - int descriptor, - size_t sechdr_offset, -- const char *name, size_t secaddr, -- size_t secsize, size_t offset, -- unsigned int align, -+ const char *name, const char *segn, -+ size_t secaddr, size_t secsize, -+ size_t offset, unsigned int align, - const char **errmsg, int *err) - { - struct simple_object_mach_o_attributes *attrs = -@@ -748,7 +963,7 @@ - strncpy ((char *) hdr + offsetof (struct mach_o_section_32, sectname), - name, MACH_O_NAME_LEN); - strncpy ((char *) hdr + offsetof (struct mach_o_section_32, segname), -- sobj->segment_name, MACH_O_NAME_LEN); -+ segn, MACH_O_NAME_LEN); - set_32 (hdr + offsetof (struct mach_o_section_32, addr), secaddr); - set_32 (hdr + offsetof (struct mach_o_section_32, size), secsize); - set_32 (hdr + offsetof (struct mach_o_section_32, offset), offset); -@@ -773,7 +988,7 @@ - strncpy ((char *) hdr + offsetof (struct mach_o_section_64, sectname), - name, MACH_O_NAME_LEN); - strncpy ((char *) hdr + offsetof (struct mach_o_section_64, segname), -- sobj->segment_name, MACH_O_NAME_LEN); -+ segn, MACH_O_NAME_LEN); - set_64 (hdr + offsetof (struct mach_o_section_64, addr), secaddr); - set_64 (hdr + offsetof (struct mach_o_section_64, size), secsize); - set_32 (hdr + offsetof (struct mach_o_section_64, offset), offset); -@@ -793,11 +1008,25 @@ - sechdrsize, errmsg, err); - } - --/* Write out the single segment and the sections of a Mach-O file. */ -+/* Write out the single (anonymous) segment containing the sections of a Mach-O -+ Object file. - -+ As a GNU extension to mach-o, when the caller specifies a segment name in -+ sobj->segment_name, all the sections passed will be output under a single -+ mach-o section header. The caller's sections are indexed within this -+ 'wrapper' section by a table stored in a second mach-o section. Finally, -+ arbitrary length section names are permitted by the extension and these are -+ stored in a table in a third mach-o section. -+ -+ Note that this is only likely to make any sense for the __GNU_LTO segment -+ at present. -+ -+ If the wrapper extension is not in force, we assume that the section name -+ is in the form __SEGMENT_NAME,__section_name as per Mach-O asm. */ -+ - static int - simple_object_mach_o_write_segment (simple_object_write *sobj, int descriptor, -- size_t nsects, const char **errmsg, -+ size_t *nsects, const char **errmsg, - int *err) - { - struct simple_object_mach_o_attributes *attrs = -@@ -814,6 +1043,10 @@ - simple_object_write_section *section; - unsigned char hdrbuf[sizeof (struct mach_o_segment_command_64)]; - unsigned char *hdr; -+ size_t nsects_in; -+ unsigned int *index; -+ char *snames; -+ unsigned int sect; - - set_32 = (attrs->is_big_endian - ? simple_object_set_big_32 -@@ -834,19 +1067,62 @@ - sechdrsize = sizeof (struct mach_o_section_64); - } - -+ name_offset = 0; -+ *nsects = nsects_in = 0; -+ -+ /* Count the number of sections we start with. */ -+ -+ for (section = sobj->sections; section != NULL; section = section->next) -+ nsects_in++; -+ -+ if (sobj->segment_name != NULL) -+ { -+ /* We will only write 3 sections: wrapped data, index and names. */ -+ -+ *nsects = 3; -+ -+ /* The index has four entries per wrapped section: -+ Section Offset, length, Name offset, length. -+ Where the offsets are based at the start of the wrapper and name -+ sections respectively. -+ The values are stored as 32 bit int for both 32 and 64 bit mach-o -+ since the size of a mach-o MH_OBJECT cannot exceed 4G owing to -+ other constraints. */ -+ -+ index = XNEWVEC (unsigned int, nsects_in * 4); -+ -+ /* We now need to figure out the size of the names section. This just -+ stores the names as null-terminated c strings, packed without any -+ alignment padding. */ -+ -+ for (section = sobj->sections, sect = 0; section != NULL; -+ section = section->next, sect++) -+ { -+ index[sect*4+2] = name_offset; -+ index[sect*4+3] = strlen (section->name) + 1; -+ name_offset += strlen (section->name) + 1; -+ } -+ snames = XNEWVEC (char, name_offset); -+ } -+ else -+ { -+ *nsects = nsects_in; -+ index = NULL; -+ snames = NULL; -+ } -+ - sechdr_offset = hdrsize + seghdrsize; -- cmdsize = seghdrsize + nsects * sechdrsize; -+ cmdsize = seghdrsize + *nsects * sechdrsize; - offset = hdrsize + cmdsize; -- name_offset = 0; - secaddr = 0; - -- for (section = sobj->sections; section != NULL; section = section->next) -+ for (section = sobj->sections, sect = 0; -+ section != NULL; section = section->next, sect++) - { - size_t mask; - size_t new_offset; - size_t secsize; - struct simple_object_write_section_buffer *buffer; -- char namebuf[MACH_O_NAME_LEN + 1]; - - mask = (1U << section->align) - 1; - new_offset = offset + mask; -@@ -877,39 +1153,126 @@ - secsize += buffer->size; - } - -- snprintf (namebuf, sizeof namebuf, "__%08X", name_offset); -+ if (sobj->segment_name != NULL) -+ { -+ index[sect*4+0] = (unsigned int) offset; -+ index[sect*4+1] = secsize; -+ /* Stash the section name in our table. */ -+ memcpy (snames + index[sect * 4 + 2], section->name, -+ index[sect * 4 + 3]); -+ } -+ else -+ { -+ char namebuf[MACH_O_NAME_LEN + 1]; -+ char segnbuf[MACH_O_NAME_LEN + 1]; -+ char *comma; -+ -+ /* Try to extract segment,section from the input name. */ -+ -+ memset (namebuf, 0, sizeof namebuf); -+ memset (segnbuf, 0, sizeof segnbuf); -+ comma = strchr (section->name, ','); -+ if (comma != NULL) -+ { -+ int len = comma - section->name; -+ len = len > MACH_O_NAME_LEN ? MACH_O_NAME_LEN : len; -+ strncpy (namebuf, section->name, len); -+ strncpy (segnbuf, comma + 1, MACH_O_NAME_LEN); -+ } -+ else /* just try to copy the name, leave segment blank. */ -+ strncpy (namebuf, section->name, MACH_O_NAME_LEN); -+ -+ if (!simple_object_mach_o_write_section_header (sobj, descriptor, -+ sechdr_offset, -+ namebuf, segnbuf, -+ secaddr, secsize, -+ offset, -+ section->align, -+ errmsg, err)) -+ return 0; -+ sechdr_offset += sechdrsize; -+ } -+ -+ offset += secsize; -+ secaddr += secsize; -+ } -+ -+ if (sobj->segment_name != NULL) -+ { -+ size_t secsize; -+ unsigned int i; -+ -+ /* Write the section header for the wrapper. */ -+ /* Account for any initial aligment - which becomes the alignment for this -+ created section. */ -+ -+ secsize = (offset - index[0]); - if (!simple_object_mach_o_write_section_header (sobj, descriptor, -- sechdr_offset, namebuf, -- secaddr, secsize, offset, -- section->align, -+ sechdr_offset, -+ GNU_WRAPPER_SECTS, -+ sobj->segment_name, -+ 0 /*secaddr*/, -+ secsize, index[0], -+ sobj->sections->align, - errmsg, err)) - return 0; - -+ /* Subtract the wrapper section start from the begining of each sub -+ section. */ -+ -+ for (i = 1; i < nsects_in; ++i) -+ index[4 * i] -= index[0]; -+ index[0] = 0; -+ - sechdr_offset += sechdrsize; -- offset += secsize; -- name_offset += strlen (section->name) + 1; -- secaddr += secsize; -- } - -- /* Write out the section names. */ -+ /* Write out the section names. -+ ... the header ... -+ name_offset contains the length of the section. It is not aligned. */ - -- if (!simple_object_mach_o_write_section_header (sobj, descriptor, -- sechdr_offset, -- GNU_SECTION_NAMES, secaddr, -- name_offset, offset, 0, -- errmsg, err)) -- return 0; -+ if (!simple_object_mach_o_write_section_header (sobj, descriptor, -+ sechdr_offset, -+ GNU_WRAPPER_NAMES, -+ sobj->segment_name, -+ 0 /*secaddr*/, -+ name_offset, -+ offset, -+ 0, errmsg, err)) -+ return 0; - -- for (section = sobj->sections; section != NULL; section = section->next) -- { -- size_t namelen; -+ /* ... and the content.. */ -+ if (!simple_object_internal_write (descriptor, offset, -+ (const unsigned char *) snames, -+ name_offset, errmsg, err)) -+ return 0; - -- namelen = strlen (section->name) + 1; -+ sechdr_offset += sechdrsize; -+ secaddr += name_offset; -+ offset += name_offset; -+ -+ /* Now do the index, we'll align this to 4 bytes although the read code -+ will handle unaligned. */ -+ -+ offset += 3; -+ offset &= ~0x03; -+ if (!simple_object_mach_o_write_section_header (sobj, descriptor, -+ sechdr_offset, -+ GNU_WRAPPER_INDEX, -+ sobj->segment_name, -+ 0 /*secaddr*/, -+ nsects_in * 16, -+ offset, -+ 2, errmsg, err)) -+ return 0; -+ -+ /* ... and the content.. */ - if (!simple_object_internal_write (descriptor, offset, -- (const unsigned char *) section->name, -- namelen, errmsg, err)) -+ (const unsigned char *) index, -+ nsects_in*16, errmsg, err)) - return 0; -- offset += namelen; -+ -+ XDELETEVEC (index); -+ XDELETEVEC (snames); - } - - /* Write out the segment header. */ -@@ -923,9 +1286,8 @@ - MACH_O_LC_SEGMENT); - set_32 (hdr + offsetof (struct mach_o_segment_command_32, cmdsize), - cmdsize); -- strncpy (((char *) hdr -- + offsetof (struct mach_o_segment_command_32, segname)), -- sobj->segment_name, MACH_O_NAME_LEN); -+ /* MH_OBJECTS have a single, anonymous, segment - so the segment name -+ is left empty. */ - /* vmaddr left as zero. */ - /* vmsize left as zero. */ - set_32 (hdr + offsetof (struct mach_o_segment_command_32, fileoff), -@@ -935,7 +1297,7 @@ - /* maxprot left as zero. */ - /* initprot left as zero. */ - set_32 (hdr + offsetof (struct mach_o_segment_command_32, nsects), -- nsects); -+ *nsects); - /* flags left as zero. */ - } - else -@@ -951,9 +1313,8 @@ - MACH_O_LC_SEGMENT); - set_32 (hdr + offsetof (struct mach_o_segment_command_64, cmdsize), - cmdsize); -- strncpy (((char *) hdr -- + offsetof (struct mach_o_segment_command_64, segname)), -- sobj->segment_name, MACH_O_NAME_LEN); -+ /* MH_OBJECTS have a single, anonymous, segment - so the segment name -+ is left empty. */ - /* vmaddr left as zero. */ - /* vmsize left as zero. */ - set_64 (hdr + offsetof (struct mach_o_segment_command_64, fileoff), -@@ -963,7 +1324,7 @@ - /* maxprot left as zero. */ - /* initprot left as zero. */ - set_32 (hdr + offsetof (struct mach_o_segment_command_64, nsects), -- nsects); -+ *nsects); - /* flags left as zero. */ - #endif - } -@@ -978,23 +1339,17 @@ - simple_object_mach_o_write_to_file (simple_object_write *sobj, int descriptor, - int *err) - { -- size_t nsects; -- simple_object_write_section *section; -+ size_t nsects = 0; - const char *errmsg; - -- /* Start at 1 for symbol_names section. */ -- nsects = 1; -- for (section = sobj->sections; section != NULL; section = section->next) -- ++nsects; -+ if (!simple_object_mach_o_write_segment (sobj, descriptor, &nsects, -+ &errmsg, err)) -+ return errmsg; - - if (!simple_object_mach_o_write_header (sobj, descriptor, nsects, - &errmsg, err)) - return errmsg; - -- if (!simple_object_mach_o_write_segment (sobj, descriptor, nsects, -- &errmsg, err)) -- return errmsg; -- - return NULL; - } - -Index: ChangeLog -=================================================================== ---- a/src/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,13 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * libtool.m4: Additional FreeBSD 10 fixes. -+ -+2011-11-18 Iain Sandoe <iains@gcc.gnu.org> -+ -+ PR target/49992 -+ * configure.ac: Remove ranlib special-casing for Darwin. -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: lto-plugin/configure -=================================================================== ---- a/src/lto-plugin/configure (.../tags/gcc_4_6_2_release) -+++ b/src/lto-plugin/configure (.../branches/gcc-4_6-branch) -@@ -8733,7 +8733,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -9646,7 +9646,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -9664,7 +9664,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -Index: lto-plugin/ChangeLog -=================================================================== ---- a/src/lto-plugin/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/lto-plugin/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,7 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: libffi/configure -=================================================================== ---- a/src/libffi/configure (.../tags/gcc_4_6_2_release) -+++ b/src/libffi/configure (.../branches/gcc-4_6-branch) -@@ -9001,7 +9001,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -9914,7 +9914,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -9932,7 +9932,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -Index: libffi/ChangeLog -=================================================================== ---- a/src/libffi/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/libffi/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,7 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: libssp/configure -=================================================================== ---- a/src/libssp/configure (.../tags/gcc_4_6_2_release) -+++ b/src/libssp/configure (.../branches/gcc-4_6-branch) -@@ -8864,7 +8864,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -9780,7 +9780,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -9798,7 +9798,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -Index: libssp/ChangeLog -=================================================================== ---- a/src/libssp/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/libssp/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,7 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: libjava/libltdl/configure -=================================================================== ---- a/src/libjava/libltdl/configure (.../tags/gcc_4_6_2_release) -+++ b/src/libjava/libltdl/configure (.../branches/gcc-4_6-branch) -@@ -7355,7 +7355,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -7968,7 +7968,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -Index: libjava/libltdl/ChangeLog -=================================================================== ---- a/src/libjava/libltdl/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/libjava/libltdl/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,8 @@ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * acinclude.m4: Additional FreeBSD 10 fixes. -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: libjava/libltdl/acinclude.m4 -=================================================================== ---- a/src/libjava/libltdl/acinclude.m4 (.../tags/gcc_4_6_2_release) -+++ b/src/libjava/libltdl/acinclude.m4 (.../branches/gcc-4_6-branch) -@@ -1377,7 +1377,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[[01]]* | freebsdelf3.[[01]]*) -@@ -3035,7 +3035,7 @@ - ;; - esac - ;; -- freebsd[[12]]*) -+ freebsd2.*) - # C++ shared libraries reported to be fairly broken before switch to ELF - _LT_AC_TAGVAR(ld_shlibs, $1)=no - ;; -@@ -5669,7 +5669,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - _LT_AC_TAGVAR(archive_cmds, $1)='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - _LT_AC_TAGVAR(hardcode_direct, $1)=yes - _LT_AC_TAGVAR(hardcode_minus_L, $1)=yes -Index: libjava/configure.ac -=================================================================== ---- a/src/libjava/configure.ac (.../tags/gcc_4_6_2_release) -+++ b/src/libjava/configure.ac (.../branches/gcc-4_6-branch) -@@ -1060,7 +1060,7 @@ - *-*-cygwin*) - # Don't set THREADLIBS here. Cygwin doesn't have -lpthread. - ;; -- *-*-freebsd[[1234]]*) -+ *-*-freebsd[[34]].*) - # Before FreeBSD 5, it didn't have -lpthread (or any library which - # merely adds pthread_* functions) but it does have a -pthread switch - # which is required at link-time to select -lc_r *instead* of -lc. -Index: libjava/classpath/config.rpath -=================================================================== ---- a/src/libjava/classpath/config.rpath (.../tags/gcc_4_6_2_release) -+++ b/src/libjava/classpath/config.rpath (.../branches/gcc-4_6-branch) -@@ -361,7 +361,7 @@ - hardcode_libdir_flag_spec='-R$libdir' - hardcode_direct=yes - ;; -- freebsd2*) -+ freebsd2.*) - hardcode_direct=yes - hardcode_minus_L=yes - ;; -@@ -533,7 +533,7 @@ - ;; - freebsd* | dragonfly*) - case "$host_os" in -- freebsd[123]*) -+ freebsd[23].*) - library_names_spec='$libname$shrext$versuffix' ;; - *) - library_names_spec='$libname$shrext' ;; -Index: libjava/classpath/configure -=================================================================== ---- a/src/libjava/classpath/configure (.../tags/gcc_4_6_2_release) -+++ b/src/libjava/classpath/configure (.../branches/gcc-4_6-branch) -@@ -10025,7 +10025,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -10941,7 +10941,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -10959,7 +10959,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -@@ -14225,7 +14225,7 @@ - esac - ;; - -- freebsd[12]*) -+ freebsd2.*) - # C++ shared libraries reported to be fairly broken before - # switch to ELF - ld_shlibs_CXX=no -@@ -16000,7 +16000,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -16018,7 +16018,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -Index: libjava/classpath/ChangeLog.gcj -=================================================================== ---- a/src/libjava/classpath/ChangeLog.gcj (.../tags/gcc_4_6_2_release) -+++ b/src/libjava/classpath/ChangeLog.gcj (.../branches/gcc-4_6-branch) -@@ -1,3 +1,9 @@ -+2011-11-29 Andreas Tobler <andreast@fgznet.ch> -+ -+ * config.rpath (ld_shlibs): Fix detection of FreeBSD-10 and up. -+ (libname_spec): Likewise. -+ * configure: Regenerate with autoconf -I ../../. -+ - 2011-02-13 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> - - * config.rpath, ltcf-c.sh, ltcf-gcj.sh, ltconfig: Remove -Index: libjava/ChangeLog -=================================================================== ---- a/src/libjava/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/libjava/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,16 @@ -+2011-11-24 Jakub Jelinek <jakub@redhat.com> -+ -+ PR bootstrap/50888 -+ * prims.cc: Don't include ctype.h. -+ (c_isspace): Define. -+ (next_property_key, next_property_value): Use it instead -+ of isspace. -+ -+2011-11-20 Andreas Tobler <andreast@fgznet.ch> -+ -+ * configure.ac: Fix FreeBSD 10 detection. -+ * configure: Regenerate. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: libjava/prims.cc -=================================================================== ---- a/src/libjava/prims.cc (.../tags/gcc_4_6_2_release) -+++ b/src/libjava/prims.cc (.../branches/gcc-4_6-branch) -@@ -38,7 +38,6 @@ - #endif - - #ifndef DISABLE_GETENV_PROPERTIES --#include <ctype.h> - #include <java-props.h> - #define PROCESS_GCJ_PROPERTIES process_gcj_properties() - #else -@@ -985,6 +984,8 @@ - - #ifndef DISABLE_GETENV_PROPERTIES - -+#define c_isspace(c) (memchr (" \t\n\r\v\f", c, 6) != NULL) -+ - static char * - next_property_key (char *s, size_t *length) - { -@@ -993,7 +994,7 @@ - JvAssert (s); - - // Skip over whitespace -- while (isspace (*s)) -+ while (c_isspace (*s)) - s++; - - // If we've reached the end, return NULL. Also return NULL if for -@@ -1005,7 +1006,7 @@ - - // Determine the length of the property key. - while (s[l] != 0 -- && ! isspace (s[l]) -+ && ! c_isspace (s[l]) - && s[l] != ':' - && s[l] != '=') - { -@@ -1027,19 +1028,19 @@ - - JvAssert (s); - -- while (isspace (*s)) -+ while (c_isspace (*s)) - s++; - - if (*s == ':' - || *s == '=') - s++; - -- while (isspace (*s)) -+ while (c_isspace (*s)) - s++; - - // Determine the length of the property value. - while (s[l] != 0 -- && ! isspace (s[l]) -+ && ! c_isspace (s[l]) - && s[l] != ':' - && s[l] != '=') - { -Index: libjava/configure -=================================================================== ---- a/src/libjava/configure (.../tags/gcc_4_6_2_release) -+++ b/src/libjava/configure (.../branches/gcc-4_6-branch) -@@ -11560,7 +11560,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct=yes - hardcode_minus_L=yes -@@ -12476,7 +12476,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -12494,7 +12494,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -@@ -14384,7 +14384,7 @@ - esac - ;; - -- freebsd[12]*) -+ freebsd2.*) - # C++ shared libraries reported to be fairly broken before - # switch to ELF - ld_shlibs_CXX=no -@@ -16159,7 +16159,7 @@ - objformat=`/usr/bin/objformat` - else - case $host_os in -- freebsd[123]*) objformat=aout ;; -+ freebsd[23].*) objformat=aout ;; - *) objformat=elf ;; - esac - fi -@@ -16177,7 +16177,7 @@ - esac - shlibpath_var=LD_LIBRARY_PATH - case $host_os in -- freebsd2*) -+ freebsd2.*) - shlibpath_overrides_runpath=yes - ;; - freebsd3.[01]* | freebsdelf3.[01]*) -@@ -18520,7 +18520,7 @@ - ;; - - # Unfortunately, older versions of FreeBSD 2 do not have this feature. -- freebsd2*) -+ freebsd2.*) - archive_cmds_GCJ='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' - hardcode_direct_GCJ=yes - hardcode_minus_L_GCJ=yes -@@ -20715,7 +20715,7 @@ - *-*-cygwin*) - # Don't set THREADLIBS here. Cygwin doesn't have -lpthread. - ;; -- *-*-freebsd[1234]*) -+ *-*-freebsd[34].*) - # Before FreeBSD 5, it didn't have -lpthread (or any library which - # merely adds pthread_* functions) but it does have a -pthread switch - # which is required at link-time to select -lc_r *instead* of -lc. -Index: maintainer-scripts/ChangeLog -=================================================================== ---- a/src/maintainer-scripts/ChangeLog (.../tags/gcc_4_6_2_release) -+++ b/src/maintainer-scripts/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,8 @@ -+2011-11-23 Gerald Pfeifer <gerald@pfeifer.com> -+ -+ * update_web_docs_svn: Make $DOCSDIR group writable after -+ creating it. -+ - 2011-10-26 Release Manager - - * GCC 4.6.2 released. -Index: maintainer-scripts/update_web_docs_svn -=================================================================== ---- a/src/maintainer-scripts/update_web_docs_svn (.../tags/gcc_4_6_2_release) -+++ b/src/maintainer-scripts/update_web_docs_svn (.../branches/gcc-4_6-branch) -@@ -93,6 +93,7 @@ - - if [ ! -d $DOCSDIR ]; then - mkdir $DOCSDIR -+ chmod g+w $DOCSDIR - fi - - if [ -z "$RELEASE" ]; then diff --git a/debian/rules.conf b/debian/rules.conf index cb98a79..0bec9e9 100644 --- a/debian/rules.conf +++ b/debian/rules.conf @@ -36,7 +36,7 @@ define gen_multilib_deps lib$1biarch := $$(lib$1biarchsf) endif endef -$(foreach x,gomp mudflap ssp gfortran objc quadmath go,$(eval $(call gen_multilib_deps,$(x)))) +$(foreach x,gomp mudflap ssp gfortran itm objc quadmath go,$(eval $(call gen_multilib_deps,$(x)))) # Helper to generate _no_archs variables. # For example, $(eval $(call gen_no_archs,java)) will create the java_no_archs @@ -331,7 +331,7 @@ ifneq (,$(java_awt_peers)) # gstreamer peer #JAVA_BUILD_DEP += libgstreamer-plugins-base0.10-dev$(bd_java_archs), ifneq ($(single_package),yes) - JAVA_BUILD_DEP += g++-4.6 [armel armhf], + JAVA_BUILD_DEP += g++-4.7 [armel armhf], endif endif ifneq ($(with_standalone_gcj),yes) @@ -438,8 +438,8 @@ NEXT_GCC_VERSION := $(shell echo $(GCC_VERSION) | \ awk -F. '{OFS="."; if (NF==2) $$3=1; else $$NF += 1; print}') # first version with a new path component in gcc_lib_dir (i.e. GCC_VERSION # or TARGET_ALIAS changes), or last version available for all architectures -DEB_GCC_SOFT_VERSION := 4.6.1-16 -DEB_GCJ_SOFT_VERSION := 4.6.1-9 +DEB_GCC_SOFT_VERSION := 4.7 +DEB_GCJ_SOFT_VERSION := 4.7 ifeq ($(with_d),yes) DEB_GDC_VERSION := $(GDC_BASE_VERSION)-$(DEB_VERSION) @@ -447,10 +447,10 @@ endif # semiautomatic ... DEB_SOVERSION := $(DEB_VERSION) -DEB_SOVERSION := 4.6 -DEB_SOEVERSION := $(EPOCH):4.6 -DEB_STDCXX_SOVERSION := 4.6 -DEB_GCJ_SOVERSION := 4.6 +DEB_SOVERSION := 4.7 +DEB_SOEVERSION := $(EPOCH):4.7 +DEB_STDCXX_SOVERSION := 4.7 +DEB_GCJ_SOVERSION := 4.7 DEB_GOMP_SOVERSION := $(DEB_SOVERSION) DEB_GCCMATH_SOVERSION := $(DEB_SOVERSION) @@ -618,6 +618,9 @@ endif ifeq ($(with_libgomp),yes) addons += libgomp lib32gomp lib64gomp libn32gomp endif +ifeq ($(with_libitm),yes) + addons += libitm lib32itm lib64itm libn32itm +endif ifeq ($(with_libqmath),yes) addons += libqmath lib32qmath lib64qmath libn32qmath endif @@ -628,10 +631,10 @@ ifeq ($(with_go),yes) endif endif ifneq (,$(findstring armel,$(biarchhfarchs))) - addons += libhfgcc libhfgomp libhfqmath libhfcxx libhfobjc libhfmudflap libhfgfortran + addons += libhfgcc libhfgomp libhfitm libhfqmath libhfcxx libhfobjc libhfmudflap libhfgfortran endif ifneq (,$(findstring armhf,$(biarchsfarchs))) - addons += libsfgcc libsfgomp libsfqmath libsfcxx libsfobjc libsfmudflap libsfgfortran + addons += libsfgcc libsfgomp libsfitm libsfqmath libsfcxx libsfobjc libsfmudflap libsfgfortran endif ifneq ($(DEB_CROSS),yes) @@ -639,7 +642,7 @@ ifneq ($(DEB_CROSS),yes) addons += libgcj libgcjdev gcjdoc libgnat libs source # libgmath libnof lib64gnat ssp ifneq (,$(neon_archs)) - addons += libneongcc libneongomp libneonobjc libneongfortran libneoncxx + addons += libneongcc libneongomp libneonitm libneonobjc libneongfortran libneoncxx endif ifeq ($(with_fixincl),yes) addons += fixincl @@ -723,6 +726,7 @@ control-file: -DPHOBOS_V=$(libphobos_version) \ -DGOMP_SO=$(GOMP_SONAME) \ -DGCCMATH_SO=$(GCCMATH_SONAME) \ + -DITM_SO=$(ITM_SONAME) \ -DMF_SO=$(MUDFLAP_SONAME) \ -DQMATH_SO=$(QUADMATH_SONAME) \ -DSSP_SO=$(SSP_SONAME) \ @@ -812,6 +816,10 @@ ifeq ($(with_gomp),yes) echo 'dep:libgomp=libgomp$(GOMP_SONAME)$(LS) (>= $${gcc:Version})' \ >> debian/substvars.local.tmp endif +ifeq ($(with_itm),yes) + echo 'dep:libitm=libitm$(ITM_SONAME)$(LS) (>= $${gcc:Version})' \ + >> debian/substvars.local.tmp +endif ifeq ($(with_qmath),yes) echo 'dep:libqmath=libquadmath$(QUADMATH_SONAME)$(LS) (>= $${gcc:Version})' \ >> debian/substvars.local.tmp @@ -833,6 +841,10 @@ ifeq ($(multilib),yes) echo 'dep:libgompbiarch=$(libgompbiarch)' \ >> debian/substvars.local.tmp endif + ifeq ($(with_itm),yes) + echo 'dep:libitmbiarch=$(libitmbiarch)' \ + >> debian/substvars.local.tmp + endif ifeq ($(with_qmath),yes) echo 'dep:libqmathbiarch=$(libquadmathbiarch)' \ >> debian/substvars.local.tmp @@ -910,6 +922,7 @@ parameters-file: echo 'MUDFLAP_SONAME := $(MUDFLAP_SONAME)'; \ echo 'SSP_SONAME := $(SSP_SONAME)'; \ echo 'GOMP_SONAME := $(GOMP_SONAME)'; \ + echo 'ITM_SONAME := $(ITM_SONAME)'; \ echo 'QMATH_SONAME := $(QUADMATH_SONAME)'; \ echo 'GCCMATH_SONAME := $(GCCMATH_SONAME)'; \ echo 'GO_SONAME := $(GO_SONAME)'; \ diff --git a/debian/rules.d/binary-cpp.mk b/debian/rules.d/binary-cpp.mk index eb21e8d..50c562c 100644 --- a/debian/rules.d/binary-cpp.mk +++ b/debian/rules.d/binary-cpp.mk @@ -47,14 +47,6 @@ endif debian/dh_doclink -p$(p_cpp) $(p_base) debian/dh_rmemptydirs -p$(p_cpp) -ifeq ($(with_multiarch_lib),yes) - : # paths needed for relative lookups from startfile_prefixes - for ma in $(xarch_multiarch_names); do \ - mkdir -p $(d_cpp)/lib/$$ma; \ - mkdir -p $(d_cpp)/usr/lib/$$ma; \ - done -endif - dh_strip -p$(p_cpp) dh_compress -p$(p_cpp) dh_fixperms -p$(p_cpp) diff --git a/debian/rules.d/binary-fortran.mk b/debian/rules.d/binary-fortran.mk index c667541..d4363a8 100644 --- a/debian/rules.d/binary-fortran.mk +++ b/debian/rules.d/binary-fortran.mk @@ -95,7 +95,8 @@ do_fortran = $(call __do_fortran,lib$(1)gfortran$(FORTRAN_SONAME),$(1)) define do_fortran_dev dh_installdirs -p$(2) $(gcc_lib_dir$(1)) DH_COMPAT=2 dh_movefiles -p$(2) \ - $(gcc_lib_dir$(1))/libgfortranbegin.a + $(gcc_lib_dir$(1))/libgfortranbegin.a \ + $(gcc_lib_dir$(1))/libcaf_single.a $(call install_gcc_lib,libgfortran,$(FORTRAN_SONAME),$(1),$(2)) endef # ---------------------------------------------------------------------- diff --git a/debian/rules.d/binary-gcc.mk b/debian/rules.d/binary-gcc.mk index 17dec4f..14bfa4a 100644 --- a/debian/rules.d/binary-gcc.mk +++ b/debian/rules.d/binary-gcc.mk @@ -21,7 +21,7 @@ endif # but it becomes difficult to name all these files ... dirs_gcc = \ - $(docdir)/$(p_base)/{gcc,libssp,gomp,quadmath} \ + $(docdir)/$(p_base)/{gcc,libssp,gomp,itm,quadmath} \ $(PF)/bin \ $(gcc_lexec_dir) \ $(gcc_lib_dir)/{include,include-fixed} \ @@ -30,6 +30,7 @@ dirs_gcc = \ # XXX: what about triarch mapping? files_gcc = \ $(PF)/bin/$(cmd_prefix){gcc,gcov}$(pkg_ver) \ + $(PF)/bin/$(cmd_prefix){gcc-ar,gcc-ranlib,gcc-nm}$(pkg_ver) \ $(gcc_lexec_dir)/{collect2,lto1,lto-wrapper} \ $(gcc_lib_dir)/include/std*.h \ $(shell for h in \ @@ -37,7 +38,8 @@ files_gcc = \ {cpuid,decfloat,float,iso646,limits,mm3dnow,mm_malloc}.h \ {ppu_intrinsics,paired,spu2vmx,vec_types,si2vmx}.h \ {,a,b,e,i,n,p,s,t,w,x}mmintrin.h mmintrin-common.h \ - {abm,avx,bmi,fma4,ia32,lwp,popcnt,tbm,x86,xop,}intrin.h \ + {abm,avx,avx2,bmi,bmi2,f16c,fma,fma4,ia32,}intrin.h \ + {lwp,lzcnt,popcnt,tbm,x86,xop,}intrin.h \ {cross-stdarg,syslimits,unwind,varargs}.h; \ do \ test -e $(d)/$(gcc_lib_dir)/include/$$h \ @@ -130,6 +132,9 @@ define __do_gcc_libs $(if $(filter yes, $(with_gomp)), $(call install_gcc_lib,libgomp,$(GOMP_SONAME),$(1),$(2)) ) + $(if $(filter yes, $(with_itm)), + $(call install_gcc_lib,libitm,$(ITM_SONAME),$(1),$(2)) + ) $(if $(filter yes, $(with_qmath)), $(call install_gcc_lib,libquadmath,$(QMATH_SONAME),$(1),$(2)) ) @@ -167,6 +172,11 @@ ifeq ($(with_gomp),yes) cp -p $(srcdir)/libgomp/ChangeLog \ $(d_gcc)/$(docdir)/$(p_base)/gomp/changelog endif +ifeq ($(with_itm),yes) + mv $(d)/$(usr_lib)/libitm*.spec $(d_gcc)/$(gcc_lib_dir)/ + cp -p $(srcdir)/libitm/ChangeLog \ + $(d_gcc)/$(docdir)/$(p_base)/itm/changelog +endif ifeq ($(with_qmath),yes) cp -p $(srcdir)/libquadmath/ChangeLog \ $(d_gcc)/$(docdir)/$(p_base)/quadmath/changelog @@ -179,6 +189,12 @@ ifneq ($(DEB_CROSS),yes) $(d_gcc)/$(PF)/bin/$(DEB_TARGET_GNU_TYPE)-gcc$(pkg_ver) ln -sf gcc$(pkg_ver) \ $(d_gcc)/$(PF)/bin/$(TARGET_ALIAS)-gcc$(pkg_ver) + for i in ar ranlib nm; do \ + ln -sf gcc-$$i$(pkg_ver) \ + $(d_gcc)/$(PF)/bin/$(DEB_TARGET_GNU_TYPE)-gcc-$$i$(pkg_ver); \ + ln -sf gcc-$$i$(pkg_ver) \ + $(d_gcc)/$(PF)/bin/$(TARGET_ALIAS)-gcc-$$i$(pkg_ver); \ + done ifneq ($(GFDL_INVARIANT_FREE),yes) ln -sf gcc$(pkg_ver).1 \ $(d_gcc)/$(PF)/share/man/man1/$(DEB_TARGET_GNU_TYPE)-gcc$(pkg_ver).1 @@ -245,6 +261,10 @@ $(binary_stamp)-gcc-multi: $(install_dependencies) debian/dh_doclink -p$(p_gcc_m) $(p_base) debian/dh_rmemptydirs -p$(p_gcc_m) + mkdir -p $(d_gcc_m)/usr/share/lintian/overrides + cp -p debian/$(p_gcc_m).overrides \ + $(d_gcc_m)/usr/share/lintian/overrides/$(p_gcc_m) + dh_strip -p$(p_gcc_m) dh_compress -p$(p_gcc_m) dh_shlibdeps -p$(p_gcc_m) @@ -340,12 +360,19 @@ ifeq ($(with_gomp),yes) $(MAKE) -C $(buildlibdir)/libgomp stamp-build-info cp -p $(buildlibdir)/libgomp/libgomp$(pkg_ver).info $(d_doc)/$(PF)/share/info/ endif +ifeq ($(with_itm),yes) +# $(MAKE) -C $(buildlibdir)/libitm stamp-build-info +# cp -p $(buildlibdir)/libitm/libitm$(pkg_ver).info $(d_doc)/$(PF)/share/info/ +endif debian/dh_doclink -p$(p_doc) $(p_base) dh_installdocs -p$(p_doc) html/gcc.html html/gccint.html ifeq ($(with_gomp),yes) cp -p html/libgomp.html $(d_doc)/usr/share/doc/$(p_doc)/ endif +ifeq ($(with_itm),yes) + cp -p html/libitm.html $(d_doc)/usr/share/doc/$(p_doc)/ +endif rm -f $(d_doc)/$(docdir)/$(p_base)/copyright debian/dh_rmemptydirs -p$(p_doc) diff --git a/debian/rules.d/binary-java.mk b/debian/rules.d/binary-java.mk index e7736e9..c8b16da 100644 --- a/debian/rules.d/binary-java.mk +++ b/debian/rules.d/binary-java.mk @@ -194,7 +194,8 @@ ifeq ($(with_standalone_gcj),yes) {cpuid,decfloat,float,iso646,limits,mm3dnow,mm_malloc}.h \ {ppu_intrinsics,paired,spu2vmx,vec_types,si2vmx}.h \ {,a,b,e,i,n,p,s,t,w,x}mmintrin.h mmintrin-common.h \ - {abm,avx,bmi,fma4,ia32,lwp,popcnt,tbm,x86,xop,}intrin.h \ + {abm,avx,avx2,bmi,bmi2,f16c,fma,fma4,ia32,}intrin.h \ + {lwp,lzcnt,popcnt,tbm,x86,xop,}intrin.h \ {cross-stdarg,syslimits,unwind,varargs}.h; \ do \ test -e $(d)/$(gcc_lib_dir)/include/$$h \ diff --git a/debian/rules.d/binary-libitm.mk b/debian/rules.d/binary-libitm.mk new file mode 100644 index 0000000..c1a7abe --- /dev/null +++ b/debian/rules.d/binary-libitm.mk @@ -0,0 +1,67 @@ +$(lib_binaries) += libitm +ifeq ($(with_lib64itm),yes) + $(lib_binaries) += lib64itm +endif +ifeq ($(with_lib32itm),yes) + $(lib_binaries) += lib32itm +endif +ifeq ($(with_libn32itm),yes) + $(lib_binaries) += libn32itm +endif +ifeq ($(with_libhfitm),yes) + $(lib_binaries) += libhfitm +endif +ifeq ($(with_libsfitm),yes) + $(lib_binaries) += libsfitm +endif + +define __do_itm + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_l) $(d_d) + dh_installdirs -p$(p_l) $(usr_lib$(2)) + DH_COMPAT=2 dh_movefiles -p$(p_l) $(usr_lib$(2))/libitm.so.* + + debian/dh_doclink -p$(p_l) $(p_base) + debian/dh_doclink -p$(p_d) $(p_base) + + dh_strip -p$(p_l) --dbg-package=$(p_d) + dh_compress -p$(p_l) -p$(p_d) + dh_fixperms -p$(p_l) -p$(p_d) + dh_makeshlibs -p$(p_l) + $(call cross_mangle_shlibs,$(p_l)) + DIRNAME=$(subst n,,$(2)) $(cross_shlibdeps) dh_shlibdeps -p$(p_l) + $(call cross_mangle_substvars,$(p_l)) + dh_gencontrol -p$(p_l) -p$(p_d) \ + -- -v$(DEB_VERSION) $(common_substvars) + $(call cross_mangle_control,$(p_l)) + dh_installdeb -p$(p_l) -p$(p_d) + dh_md5sums -p$(p_l) -p$(p_d) + dh_builddeb -p$(p_l) -p$(p_d) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) +endef + +# ---------------------------------------------------------------------- + +do_itm = $(call __do_itm,lib$(1)itm$(ITM_SONAME),$(1)) + +$(binary_stamp)-libitm: $(install_stamp) + $(call do_itm,) + +$(binary_stamp)-lib64itm: $(install_stamp) + $(call do_itm,64) + +$(binary_stamp)-lib32itm: $(install_stamp) + $(call do_itm,32) + +$(binary_stamp)-libn32itm: $(install_stamp) + $(call do_itm,n32) + +$(binary_stamp)-libhfitm: $(install_dependencies) + $(call do_itm,hf) + +$(binary_stamp)-libsfitm: $(install_dependencies) + $(call do_itm,sf) diff --git a/debian/rules.d/binary-spu.mk b/debian/rules.d/binary-spu.mk index 3d4c9b6..2b69e7c 100644 --- a/debian/rules.d/binary-spu.mk +++ b/debian/rules.d/binary-spu.mk @@ -15,6 +15,7 @@ dirs_spugcc = \ files_spugcc = \ $(PF)/bin/spu-{cpp,gcc}$(pkg_ver) \ + $(PF)/bin/$(cmd_prefix){gcc-ar,gcc-ranlib,gcc-nm}$(pkg_ver) \ $(gcc_spu_lexec_dir)/{cc1,collect2,lto1,lto-wrapper} \ $(gcc_spu_lexec_dir)/liblto_plugin.so{,.0,.0.0.0} \ $(gcc_spu_lib_dir)/{include,include-fixed} \ diff --git a/debian/rules.defs b/debian/rules.defs index c37aaa5..6ec4fcf 100644 --- a/debian/rules.defs +++ b/debian/rules.defs @@ -710,7 +710,7 @@ ifeq ($(with_objc),yes) ifeq ($(with_dev),yes) with_objcdev := yes endif - # libobjc soname change in 4.6 + # libobjc soname change in 4.7 #ifeq ($(with_common_libs),yes) with_libobjc := yes #endif @@ -815,6 +815,13 @@ with_mudflap := $(call envfilt, mudflap, , , $(with_mudflap)) with_gomp := yes with_gomp := $(call envfilt, gomp, , , $(with_gomp)) +# itm -------------------- +itm_archs = amd64 i386 +ifneq (,$(filter $(DEB_TARGET_ARCH),$(itm_archs))) + with_itm := yes +endif +with_itm := $(call envfilt, itm, , , $(with_itm)) + # gold -------------------- # armel with binutils 2.20.51 only gold_archs = amd64 armel armhf i386 lpia powerpc ppc64 sparc @@ -832,6 +839,7 @@ GFDL_INVARIANT_FREE := yes ifeq ($(distribution),Ubuntu) GFDL_INVARIANT_FREE := no endif +GFDL_INVARIANT_FREE := no # ------------------------------------------------------------------- # non-extra config @@ -867,6 +875,13 @@ else #endif endif + # libitm ----------------- + ifeq ($(with_itm)-$(with_common_libs),yes-yes) + #ifneq ($(DEB_CROSS),yes) + with_libitm := yes + #endif + endif + # libquadmath ----------------- ifeq ($(with_qmath)-$(with_common_libs),yes-yes) #ifneq ($(DEB_CROSS),yes) @@ -1044,6 +1059,9 @@ define gen_biarch ifeq ($$(with_libgomp),yes) with_lib$1gomp:= yes endif + ifeq ($$(with_libitm),yes) + with_lib$1itm:= yes + endif ifeq ($$(with_libqmath),yes) with_lib$1qmath := yes endif @@ -1119,6 +1137,7 @@ ifeq ($(no_biarch_libs),yes) with_lib64ssp := no with_lib64go := no with_lib64gomp := no + with_lib64itm := no with_lib64qmath := no with_lib32gcc := no @@ -1132,6 +1151,7 @@ ifeq ($(no_biarch_libs),yes) with_lib32ssp := no with_lib32go := no with_lib32gomp := no + with_lib32itm := no with_lib32qmath := no with_libn32gcc := no @@ -1145,6 +1165,7 @@ ifeq ($(no_biarch_libs),yes) with_libn32ssp := no with_libn32go := no with_libn32gomp := no + with_libn32itm := no with_libn32qmath := no with_libhfgcc := no @@ -1158,6 +1179,7 @@ ifeq ($(no_biarch_libs),yes) with_libhfssp := no with_libhfgo := no with_libhfgomp := no + with_libhfitm := no with_libhfqmath := no with_libsfgcc := no @@ -1171,7 +1193,9 @@ ifeq ($(no_biarch_libs),yes) with_libsfssp := no with_libsfgo := no with_libsfgomp := no + with_libsfitm := no with_libsfqmath := no + with_java_plugin := no ifdef DEB_CROSS_NO_BIARCH diff --git a/debian/rules.patch b/debian/rules.patch index f4d0e7f..e719d9b 100644 --- a/debian/rules.patch +++ b/debian/rules.patch @@ -13,8 +13,9 @@ series_file ?= $(patchdir)/series # which patches should be applied? debian_patches = \ - $(if $(with_linaro_branch),gcc-linaro) \ - svn-updates$(if $(with_linaro_branch),-linaro) \ + +# $(if $(with_linaro_branch),gcc-linaro) \ +# svn-updates$(if $(with_linaro_branch),-linaro) \ ifeq ($(with_java),yes) # debian_patches += \ @@ -24,7 +25,8 @@ endif ifneq ($(GFDL_INVARIANT_FREE),yes) debian_patches += \ rename-info-files \ - $(if $(with_linaro_branch),gcc-linaro-doc) \ + +# $(if $(with_linaro_branch),gcc-linaro-doc) \ # $(if $(with_linaro_branch),,svn-doc-updates) \ @@ -64,30 +66,17 @@ debian_patches += \ libgomp-omp_h-multilib \ sparc-force-cpu \ pr24619 \ - $(if $(with_linaro_branch),,pr45979) \ gccgo-version \ - no_fpr_in_libgcc \ - pr48226 \ - pr47487 \ - mudflap-varargs \ pr45078 \ - pr43804 \ pr47818 \ - $(if $(with_linaro_branch),,pr48830) \ - $(if $(with_linaro_branch),,pr49169) \ - pr49756 \ pr49940 \ pr49944 \ - gcc-cloog-dl \ libffi-kfreebsd \ gcc-base-version \ - pr49696 \ libffi-powerpc-sf \ libffi-powerpc-sysv-without-string-ops \ - $(if $(with_linaro_branch),,pr49030) \ - $(if $(with_linaro_branch),,pr50193) \ - pr50114 \ +# gcc-cloog-dl \ # $(if $(filter yes, $(DEB_CROSS)),,gcc-print-file-name) \ # libstdc++-nothumb-check \ # TODO: update ... @@ -194,7 +183,7 @@ endif ifeq ($(DEB_TARGET_ARCH),ppc64) ifeq ($(distribution),Ubuntu) - debian_patches += ibm-branch + #debian_patches += ibm-branch endif endif @@ -205,10 +194,6 @@ endif #debian_patches += link-libs -debian_patches += libjava-disable-static -debian_patches += s390-biarch -debian_patches += mips-triarch - # all patches below this line are applied for gcc-snapshot builds as well ifeq ($(trunk_build),yes) @@ -216,11 +201,7 @@ ifeq ($(trunk_build),yes) debian_patches = endif -ifeq ($(trunk_build),yes) - debian_patches += arm-dynamic-linker-trunk -else - debian_patches += arm-dynamic-linker -endif +debian_patches += arm-dynamic-linker ifeq ($(with_softfloat),yes) debian_patches += arm-multilib-soft-float else ifeq ($(multilib),yes) @@ -228,11 +209,7 @@ else ifeq ($(multilib),yes) endif ifeq ($(DEB_CROSS),yes) - ifeq ($(trunk_build),yes) - debian_patches += cross-include-trunk cross-fixes-trunk - else - debian_patches += cross-include cross-fixes - endif + debian_patches += cross-include cross-fixes endif ifeq ($(DEB_TARGET_ARCH_OS),hurd) @@ -253,7 +230,7 @@ endif debian_patches += ada-mips debian_patches += libffi-ro-eh_frame_sect -ifneq ($(trunk_build),yes) +#ifneq ($(trunk_build),yes) debian_patches += gcc-multiarch ifneq ($(GFDL_INVARIANT_FREE),yes) debian_patches += gcc-multiarch-doc @@ -261,7 +238,7 @@ endif ifeq ($(with_multiarch_lib),yes) debian_patches += libjava-multiarch endif -endif # gcc-snapshot +#endif # gcc-snapshot debian_patches += libjava-nobiarch-check debian_patches += config-ml ifeq ($(biarch64),yes) @@ -269,19 +246,11 @@ ifeq ($(biarch64),yes) debian_patches += cross-biarch endif endif -ifeq ($(trunk_build),yes) - debian_patches += gcc-powerpc-nof-trunk -else - debian_patches += gcc-powerpc-nof -endif +debian_patches += gcc-powerpc-nof debian_patches += gcc-powerpc-undef ifeq ($(biarch32),yes) ifeq ($(with_multiarch_lib),yes) - ifeq ($(trunk_build),yes) - debian_patches += gcc-multilib64-multiarch-trunk - else - debian_patches += gcc-multilib64-multiarch - endif + debian_patches += gcc-multilib64-multiarch else debian_patches += gcc-multilib64 endif @@ -301,12 +270,7 @@ ifeq ($(distribution),Ubuntu) endif debian_patches += gcc-system-root debian_patches += libgomp-kfreebsd-testsuite - -ifeq ($(trunk_build),yes) - debian_patches += armhf-triplet-trunk -else - debian_patches += armhf-triplet -endif +debian_patches += armhf-triplet #debian_patches += address-clauses-timed-entry-calls diff --git a/debian/rules.sonames b/debian/rules.sonames index e69803e..f8e1c61 100644 --- a/debian/rules.sonames +++ b/debian/rules.sonames @@ -44,6 +44,7 @@ ifeq (,$(wildcard debian/soname-cache)) | sed -e 's/.*"\([^"]*\)".*/\1/'`; \ echo GNAT_SONAME=$$v >> $$cache; \ echo GO_SONAME=0 >> $$cache; \ + echo ITM_SONAME=1 >> $$cache; \ cat $$cache) else SONAME_VARS := $(shell cat debian/soname-cache) @@ -62,6 +63,7 @@ GCCMATH_SONAME = $(call vafilt,$(SONAME_VARS),GCCMATH_SONAME) QUADMATH_SONAME = $(call vafilt,$(SONAME_VARS),QUADMATH_SONAME) GNAT_SONAME = $(call vafilt,$(SONAME_VARS),GNAT_SONAME) GO_SONAME = $(call vafilt,$(SONAME_VARS),GO_SONAME) +ITM_SONAME = $(call vafilt,$(SONAME_VARS),ITM_SONAME) # alias GFORTRAN_SONAME = $(FORTRAN_SONAME) diff --git a/debian/rules2 b/debian/rules2 index 1ad5c97..cf011d4 100644 --- a/debian/rules2 +++ b/debian/rules2 @@ -232,6 +232,10 @@ ifneq ($(with_gomp),yes) CONFARGS += --disable-libgomp endif +ifneq ($(with_itm),yes) + CONFARGS += --disable-libitm +endif + ifeq ($(with_plugins),yes) CONFARGS += --enable-plugin endif @@ -1020,6 +1024,7 @@ $(configure_hppa64_stamp): $(build_stamp) --disable-nls \ --disable-threads \ --disable-libgomp \ + --disable-libitm \ --disable-libmudflap \ --disable-libssp \ --disable-libquadmath \ @@ -1156,6 +1161,9 @@ endif ifeq ($(with_gomp),yes) MANUALS += $(srcdir)/libgomp/libgomp.texi endif +ifeq ($(with_itm),yes) + MANUALS += $(srcdir)/libitm/libitm.texi +endif html-docs: $(build_html_stamp) #$(build_html_stamp): html-texi2html @@ -1582,6 +1590,10 @@ ifeq ($(with_libgomp),yes) include debian/rules.d/binary-libgomp.mk endif +ifeq ($(with_libitm),yes) + include debian/rules.d/binary-libitm.mk +endif + ifeq ($(with_cdev),yes) include debian/rules.d/binary-cpp.mk endif |