* Update the ibm branch to SVN 20140306 (r208322).

git-svn-id: svn://svn.debian.org/svn/gcccvs/branches/sid/gcc-4.8@7204 6ca36cf4-e1d1-0310-8c6f-e303bb2178ca

3 files changed, 177 insertions, 113 deletions

diff --git a/debian/changelog b/debian/changelog
index 82beb60..80ee239 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,9 +1,9 @@
 gcc-4.8 (4.8.2-17) UNRELEASED; urgency=medium
 
   * Update to SVN 20140303 (r208303) from the gcc-4_8-branch.
-  * Update the ibm branch to SVN 20140304 (r208291).
+  * Update the ibm branch to SVN 20140306 (r208322).
 
- -- Matthias Klose <doko@debian.org>  Tue, 04 Mar 2014 07:33:29 +0100
+ -- Matthias Klose <doko@debian.org>  Thu, 06 Mar 2014 04:40:28 +0100
 
 gcc-4.8 (4.8.2-16) unstable; urgency=medium
 
diff --git a/debian/patches/gcc-ppc64el-doc.diff b/debian/patches/gcc-ppc64el-doc.diff
index 3c2d32c..0363b94 100644
--- a/debian/patches/gcc-ppc64el-doc.diff
+++ b/debian/patches/gcc-ppc64el-doc.diff
@@ -1,7 +1,7 @@
 # DP: Changes from the ibm/gcc-4_8-branch (documentation)
 
-LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
-    svn://gcc.gnu.org/svn/gcc/branches/ibm/gcc-4_8-branch@208291 \
+LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@208295 \
+    svn://gcc.gnu.org/svn/gcc/branches/ibm/gcc-4_8-branch@208322 \
  | filterdiff --remove-timestamps --addoldprefix=a/src/ --addnewprefix=b/src/
 
 --- a/src/gcc/doc/extend.texi
@@ -562,7 +562,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  
  @emph{RX Options}
  @gccoptlist{-m64bit-doubles  -m32bit-doubles  -fpu  -nofpu@gol
-@@ -17237,7 +17242,9 @@
+@@ -17239,7 +17244,9 @@
  @gccoptlist{-maltivec  -mfprnd  -mhard-float  -mmfcrf  -mmultiple @gol
  -mpopcntb -mpopcntd  -mpowerpc64 @gol
  -mpowerpc-gpopt  -mpowerpc-gfxopt  -msingle-float -mdouble-float @gol
@@ -573,7 +573,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  
  The particular options set for any particular CPU varies between
  compiler versions, depending on what setting seems to produce optimal
-@@ -17288,6 +17295,38 @@
+@@ -17290,6 +17297,38 @@
  @option{-mabi=altivec} to adjust the current ABI with AltiVec ABI
  enhancements.
  
@@ -612,7 +612,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  @item -mvrsave
  @itemx -mno-vrsave
  @opindex mvrsave
-@@ -17355,6 +17394,55 @@
+@@ -17357,6 +17396,55 @@
  instructions, and also enable the use of built-in functions that allow
  more direct access to the VSX instruction set.
  
@@ -668,7 +668,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  @item -mfloat-gprs=@var{yes/single/double/no}
  @itemx -mfloat-gprs
  @opindex mfloat-gprs
-@@ -17774,7 +17862,8 @@
+@@ -17776,7 +17864,8 @@
  @opindex mabi
  Extend the current ABI with a particular extension, or remove such extension.
  Valid values are @var{altivec}, @var{no-altivec}, @var{spe},
@@ -678,7 +678,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  
  @item -mabi=spe
  @opindex mabi=spe
-@@ -17796,6 +17885,20 @@
+@@ -17798,6 +17887,20 @@
  Change the current ABI to use IEEE extended-precision long double.
  This is a PowerPC 32-bit Linux ABI option.
  
@@ -699,7 +699,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  @item -mprototype
  @itemx -mno-prototype
  @opindex mprototype
-@@ -18081,6 +18184,23 @@
+@@ -18083,6 +18186,23 @@
  a pointer on AIX and 64-bit Linux systems.  If the TOC value is not
  saved in the prologue, it is saved just before the call through the
  pointer.  The @option{-mno-save-toc-indirect} option is the default.
diff --git a/debian/patches/gcc-ppc64el.diff b/debian/patches/gcc-ppc64el.diff
index 3360e53..6cc656b 100644
--- a/debian/patches/gcc-ppc64el.diff
+++ b/debian/patches/gcc-ppc64el.diff
@@ -1,7 +1,7 @@
-# DP: Changes from the ibm/gcc-4_8-branch (20140304)
+# DP: Changes from the ibm/gcc-4_8-branch (20140306)
 
-LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
-    svn://gcc.gnu.org/svn/gcc/branches/ibm/gcc-4_8-branch@208291 \
+LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@208295 \
+    svn://gcc.gnu.org/svn/gcc/branches/ibm/gcc-4_8-branch@208322 \
  | filterdiff --remove-timestamps --addoldprefix=a/src/ --addnewprefix=b/src/
 
 --- a/src/libitm/configure
@@ -1534,7 +1534,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  	{
  	  /* We are in a plt call stub or r2 adjusting long branch stub,
  	     before r2 has been saved.  Keep REG_UNSAVED.  */
-@@ -305,18 +333,21 @@
+@@ -305,10 +333,12 @@
  	{
  	  unsigned int *insn
  	    = (unsigned int *) _Unwind_GetGR (context, R_LR);
@@ -1550,6 +1550,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  	    {
  	      /* We are at the bctrl instruction in a call via function
  		 pointer.  gcc always emits the load of the new R2 just
+@@ -315,8 +345,9 @@
  		 before the bctrl so this is the first and only place
  		 we need to use the stored R2.  */
  	      _Unwind_Word sp = _Unwind_GetGR (context, 1);
@@ -1911,7 +1912,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  	  s390*-*linux*|s390*-*tpf*)
 --- a/src/gcc/builtins.c
 +++ b/src/gcc/builtins.c
-@@ -5850,6 +5850,9 @@
+@@ -5861,6 +5861,9 @@
    switch (fcode)
      {
      CASE_FLT_FN (BUILT_IN_FABS):
@@ -1921,7 +1922,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
        target = expand_builtin_fabs (exp, target, subtarget);
        if (target)
  	return target;
-@@ -10302,6 +10305,9 @@
+@@ -10313,6 +10316,9 @@
        return fold_builtin_strlen (loc, type, arg0);
  
      CASE_FLT_FN (BUILT_IN_FABS):
@@ -5939,7 +5940,28 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +#include "bool2.h"
 --- a/src/gcc/testsuite/ChangeLog.ibm
 +++ b/src/gcc/testsuite/ChangeLog.ibm
-@@ -0,0 +1,574 @@
+@@ -0,0 +1,595 @@
++2014-03-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
++
++	Backport from mainline 208321
++	2014-03-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
++
++	* gcc.dg/vmx/extract-vsx.c: Replace "vector long" with "vector
++	long long" throughout.
++	* gcc.dg/vmx/extract-vsx-be-order.c: Likewise.
++	* gcc.dg/vmx/insert-vsx.c: Likewise.
++	* gcc.dg/vmx/insert-vsx-be-order.c: Likewise.
++	* gcc.dg/vmx/ld-vsx.c: Likewise.
++	* gcc.dg/vmx/ld-vsx-be-order.c: Likewise.
++	* gcc.dg/vmx/ldl-vsx.c: Likewise.
++	* gcc.dg/vmx/ldl-vsx-be-order.c: Likewise.
++	* gcc.dg/vmx/merge-vsx.c: Likewise.
++	* gcc.dg/vmx/merge-vsx-be-order.c: Likewise.
++	* gcc.dg/vmx/st-vsx.c: Likewise.
++	* gcc.dg/vmx/st-vsx-be-order.c: Likewise.
++	* gcc.dg/vmx/stl-vsx.c: Likewise.
++	* gcc.dg/vmx/stl-vsx-be-order.c: Likewise.
++
 +2014-02-25  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
 +
 +	Backport from mainline 208120
@@ -7005,7 +7027,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +
 +#include "harness.h"
 +
-+static unsigned long svul[2] __attribute__ ((aligned (16)));
++static unsigned long long svul[2] __attribute__ ((aligned (16)));
 +static double svd[2] __attribute__ ((aligned (16)));
 +
 +static void check_arrays ()
@@ -7021,14 +7043,14 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +static void test ()
 +{
 +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
-+  vector unsigned long vul = {1,0};
++  vector unsigned long long vul = {1,0};
 +  vector double vd = {1.0,0.0};
 +#else
-+  vector unsigned long vul = {0,1};
++  vector unsigned long long vul = {0,1};
 +  vector double vd = {0.0,1.0};
 +#endif
 +
-+  vec_stl (vul, 0, (vector unsigned long *)svul);
++  vec_stl (vul, 0, (vector unsigned long long *)svul);
 +  vec_stl (vd,  0, (vector double *)svd);
 +
 +  check_arrays ();
@@ -7057,7 +7079,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +
 +#include "harness.h"
 +
-+static int vec_long_eq (vector long x, vector long y)
++static int vec_long_long_eq (vector long long x, vector long long y)
 +{
 +  return (x[0] == y[0] && x[1] == y[1]);
 +}
@@ -7069,20 +7091,20 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +
 +static void test()
 +{
-+  vector long vl = {0, 1};
++  vector long long vl = {0, 1};
 +  vector double vd = {0.0, 1.0};
-+  vector long vlr = vec_insert (2, vl, 0);
++  vector long long vlr = vec_insert (2, vl, 0);
 +  vector double vdr = vec_insert (2.0, vd, 1);
 +
 +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
-+  vector long vler = {0, 2};
++  vector long long vler = {0, 2};
 +  vector double vder = {2.0, 1.0};
 +#else
-+  vector long vler = {2, 1};
++  vector long long vler = {2, 1};
 +  vector double vder = {0.0, 2.0};
 +#endif
 +
-+  check (vec_long_eq (vlr, vler), "vl");
++  check (vec_long_long_eq (vlr, vler), "vl");
 +  check (vec_dbl_eq (vdr, vder), "vd");
 +}
 --- a/src/gcc/testsuite/gcc.dg/vmx/unpack.c
@@ -7214,7 +7236,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +
 +#include "harness.h"
 +
-+static unsigned long svul[2] __attribute__ ((aligned (16)));
++static unsigned long long svul[2] __attribute__ ((aligned (16)));
 +static double svd[2] __attribute__ ((aligned (16)));
 +
 +static void init ()
@@ -7230,20 +7252,20 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +static void test ()
 +{
 +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
-+  vector unsigned long evul = {1,0};
++  vector unsigned long long evul = {1,0};
 +  vector double evd = {1.0,0.0};
 +#else
-+  vector unsigned long evul = {0,1};
++  vector unsigned long long evul = {0,1};
 +  vector double evd = {0.0,1.0};
 +#endif
 +
-+  vector unsigned long vul;
++  vector unsigned long long vul;
 +  vector double vd;
 +  unsigned i;
 +
 +  init ();
 +
-+  vul = vec_ldl (0, (vector unsigned long *)svul);
++  vul = vec_ldl (0, (vector unsigned long long *)svul);
 +  vd  = vec_ldl (0, (vector double *)svd);
 +
 +  for (i = 0; i < 2; ++i)
@@ -7497,7 +7519,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +
 +#include "harness.h"
 +
-+static unsigned long svul[2] __attribute__ ((aligned (16)));
++static unsigned long long svul[2] __attribute__ ((aligned (16)));
 +static double svd[2] __attribute__ ((aligned (16)));
 +
 +static void init ()
@@ -7513,20 +7535,20 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +static void test ()
 +{
 +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
-+  vector unsigned long evul = {1,0};
++  vector unsigned long long evul = {1,0};
 +  vector double evd = {1.0,0.0};
 +#else
-+  vector unsigned long evul = {0,1};
++  vector unsigned long long evul = {0,1};
 +  vector double evd = {0.0,1.0};
 +#endif
 +
-+  vector unsigned long vul;
++  vector unsigned long long vul;
 +  vector double vd;
 +  unsigned i;
 +
 +  init ();
 +
-+  vul = vec_ld (0, (vector unsigned long *)svul);
++  vul = vec_ld (0, (vector unsigned long long *)svul);
 +  vd  = vec_ld (0, (vector double *)svd);
 +
 +  for (i = 0; i < 2; ++i)
@@ -7786,7 +7808,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +}
 --- a/src/gcc/testsuite/gcc.dg/vmx/gcc-bug-i.c
 +++ b/src/gcc/testsuite/gcc.dg/vmx/gcc-bug-i.c
-@@ -13,12 +13,27 @@
+@@ -13,6 +13,20 @@
  #define DO_INLINE __attribute__ ((always_inline))
  #define DONT_INLINE __attribute__ ((noinline))
  
@@ -7807,6 +7829,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  static inline DO_INLINE int inline_me(vector signed short data) 
  {
    union {vector signed short v; signed short s[8];} u;
+@@ -19,6 +33,7 @@
    u.v = data;
    return u.s[7];
  }
@@ -7838,7 +7861,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +
 +#include "harness.h"
 +
-+static unsigned long svul[2] __attribute__ ((aligned (16)));
++static unsigned long long svul[2] __attribute__ ((aligned (16)));
 +static double svd[2] __attribute__ ((aligned (16)));
 +
 +static void check_arrays ()
@@ -7854,14 +7877,14 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +static void test ()
 +{
 +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
-+  vector unsigned long vul = {1,0};
++  vector unsigned long long vul = {1,0};
 +  vector double vd = {1.0,0.0};
 +#else
-+  vector unsigned long vul = {0,1};
++  vector unsigned long long vul = {0,1};
 +  vector double vd = {0.0,1.0};
 +#endif
 +
-+  vec_st (vul, 0, (vector unsigned long *)svul);
++  vec_st (vul, 0, (vector unsigned long long *)svul);
 +  vec_st (vd,  0, (vector double *)svd);
 +
 +  check_arrays ();
@@ -8305,7 +8328,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +
 +#include "harness.h"
 +
-+static unsigned long svul[2] __attribute__ ((aligned (16)));
++static unsigned long long svul[2] __attribute__ ((aligned (16)));
 +static double svd[2] __attribute__ ((aligned (16)));
 +
 +static void init ()
@@ -8320,16 +8343,16 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +
 +static void test ()
 +{
-+  vector unsigned long evul = {0,1};
++  vector unsigned long long evul = {0,1};
 +  vector double evd = {0.0,1.0};
 +
-+  vector unsigned long vul;
++  vector unsigned long long vul;
 +  vector double vd;
 +  unsigned i;
 +
 +  init ();
 +
-+  vul = vec_ld (0, (vector unsigned long *)svul);
++  vul = vec_ld (0, (vector unsigned long long *)svul);
 +  vd  = vec_ld (0, (vector double *)svd);
 +
 +  for (i = 0; i < 2; ++i)
@@ -8349,7 +8372,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +
 +static void test()
 +{
-+  vector long vl = {0, 1};
++  vector long long vl = {0, 1};
 +  vector double vd = {0.0, 1.0};
 +
 +  check (vec_extract (vl, 0) == 0, "vec_extract, vl, 0");
@@ -8694,7 +8717,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +
 +static void test()
 +{
-+  vector long vl = {0, 1};
++  vector long long vl = {0, 1};
 +  vector double vd = {0.0, 1.0};
 +
 +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
@@ -9002,7 +9025,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +
 +#include "harness.h"
 +
-+static unsigned long svul[2] __attribute__ ((aligned (16)));
++static unsigned long long svul[2] __attribute__ ((aligned (16)));
 +static double svd[2] __attribute__ ((aligned (16)));
 +
 +static void check_arrays ()
@@ -9017,10 +9040,10 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +
 +static void test ()
 +{
-+  vector unsigned long vul = {0,1};
++  vector unsigned long long vul = {0,1};
 +  vector double vd = {0.0,1.0};
 +
-+  vec_st (vul, 0, (vector unsigned long *)svul);
++  vec_st (vul, 0, (vector unsigned long long *)svul);
 +  vec_st (vd,  0, (vector double *)svd);
 +
 +  check_arrays ();
@@ -9050,7 +9073,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +
 +#include "harness.h"
 +
-+static int vec_long_eq (vector long x, vector long y)
++static int vec_long_long_eq (vector long long x, vector long long y)
 +{
 +  return (x[0] == y[0] && x[1] == y[1]);
 +}
@@ -9063,24 +9086,24 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +static void test()
 +{
 +  /* Input vectors.  */
-+  vector long vla = {-2,-1};
-+  vector long vlb = {0,1};
++  vector long long vla = {-2,-1};
++  vector long long vlb = {0,1};
 +  vector double vda = {-2.0,-1.0};
 +  vector double vdb = {0.0,1.0};
 +
 +  /* Result vectors.  */
-+  vector long vlh, vll;
++  vector long long vlh, vll;
 +  vector double vdh, vdl;
 +
 +  /* Expected result vectors.  */
 +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
-+  vector long vlrh = {1,-1};
-+  vector long vlrl = {0,-2};
++  vector long long vlrh = {1,-1};
++  vector long long vlrl = {0,-2};
 +  vector double vdrh = {1.0,-1.0};
 +  vector double vdrl = {0.0,-2.0};
 +#else
-+  vector long vlrh = {-2,0};
-+  vector long vlrl = {-1,1};
++  vector long long vlrh = {-2,0};
++  vector long long vlrl = {-1,1};
 +  vector double vdrh = {-2.0,0.0};
 +  vector double vdrl = {-1.0,1.0};
 +#endif
@@ -9090,8 +9113,8 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +  vdh = vec_mergeh (vda, vdb);
 +  vdl = vec_mergel (vda, vdb);
 +
-+  check (vec_long_eq (vlh, vlrh), "vlh");
-+  check (vec_long_eq (vll, vlrl), "vll");
++  check (vec_long_long_eq (vlh, vlrh), "vlh");
++  check (vec_long_long_eq (vll, vlrl), "vll");
 +  check (vec_double_eq (vdh, vdrh), "vdh" );
 +  check (vec_double_eq (vdl, vdrl), "vdl" );
 +}
@@ -9171,7 +9194,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +
 +#include "harness.h"
 +
-+static int vec_long_eq (vector long x, vector long y)
++static int vec_long_long_eq (vector long long x, vector long long y)
 +{
 +  return (x[0] == y[0] && x[1] == y[1]);
 +}
@@ -9183,14 +9206,14 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +
 +static void test()
 +{
-+  vector long vl = {0, 1};
++  vector long long vl = {0, 1};
 +  vector double vd = {0.0, 1.0};
-+  vector long vlr = vec_insert (2, vl, 0);
++  vector long long vlr = vec_insert (2, vl, 0);
 +  vector double vdr = vec_insert (2.0, vd, 1);
-+  vector long vler = {2, 1};
++  vector long long vler = {2, 1};
 +  vector double vder = {0.0, 2.0};
 +
-+  check (vec_long_eq (vlr, vler), "vl");
++  check (vec_long_long_eq (vlr, vler), "vl");
 +  check (vec_dbl_eq (vdr, vder), "vd");
 +}
 --- a/src/gcc/testsuite/gcc.dg/vmx/vsums-be-order.c
@@ -9225,7 +9248,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +
 +#include "harness.h"
 +
-+static unsigned long svul[2] __attribute__ ((aligned (16)));
++static unsigned long long svul[2] __attribute__ ((aligned (16)));
 +static double svd[2] __attribute__ ((aligned (16)));
 +
 +static void init ()
@@ -9240,16 +9263,16 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +
 +static void test ()
 +{
-+  vector unsigned long evul = {0,1};
++  vector unsigned long long evul = {0,1};
 +  vector double evd = {0.0,1.0};
 +
-+  vector unsigned long vul;
++  vector unsigned long long vul;
 +  vector double vd;
 +  unsigned i;
 +
 +  init ();
 +
-+  vul = vec_ldl (0, (vector unsigned long *)svul);
++  vul = vec_ldl (0, (vector unsigned long long *)svul);
 +  vd  = vec_ldl (0, (vector double *)svd);
 +
 +  for (i = 0; i < 2; ++i)
@@ -9443,7 +9466,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +
 +#include "harness.h"
 +
-+static int vec_long_eq (vector long x, vector long y)
++static int vec_long_long_eq (vector long long x, vector long long y)
 +{
 +  return (x[0] == y[0] && x[1] == y[1]);
 +}
@@ -9456,18 +9479,18 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +static void test()
 +{
 +  /* Input vectors.  */
-+  vector long vla = {-2,-1};
-+  vector long vlb = {0,1};
++  vector long long vla = {-2,-1};
++  vector long long vlb = {0,1};
 +  vector double vda = {-2.0,-1.0};
 +  vector double vdb = {0.0,1.0};
 +
 +  /* Result vectors.  */
-+  vector long vlh, vll;
++  vector long long vlh, vll;
 +  vector double vdh, vdl;
 +
 +  /* Expected result vectors.  */
-+  vector long vlrh = {-2,0};
-+  vector long vlrl = {-1,1};
++  vector long long vlrh = {-2,0};
++  vector long long vlrl = {-1,1};
 +  vector double vdrh = {-2.0,0.0};
 +  vector double vdrl = {-1.0,1.0};
 +
@@ -9476,8 +9499,8 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +  vdh = vec_mergeh (vda, vdb);
 +  vdl = vec_mergel (vda, vdb);
 +
-+  check (vec_long_eq (vlh, vlrh), "vlh");
-+  check (vec_long_eq (vll, vlrl), "vll");
++  check (vec_long_long_eq (vlh, vlrh), "vlh");
++  check (vec_long_long_eq (vll, vlrl), "vll");
 +  check (vec_double_eq (vdh, vdrh), "vdh" );
 +  check (vec_double_eq (vdl, vdrl), "vdl" );
 +}
@@ -9490,7 +9513,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +
 +#include "harness.h"
 +
-+static unsigned long svul[2] __attribute__ ((aligned (16)));
++static unsigned long long svul[2] __attribute__ ((aligned (16)));
 +static double svd[2] __attribute__ ((aligned (16)));
 +
 +static void check_arrays ()
@@ -9505,10 +9528,10 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 +
 +static void test ()
 +{
-+  vector unsigned long vul = {0,1};
++  vector unsigned long long vul = {0,1};
 +  vector double vd = {0.0,1.0};
 +
-+  vec_stl (vul, 0, (vector unsigned long *)svul);
++  vec_stl (vul, 0, (vector unsigned long long *)svul);
 +  vec_stl (vd,  0, (vector double *)svd);
 +
 +  check_arrays ();
@@ -9684,7 +9707,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  #define OVL_ARG_DEPENDENT(NODE) TREE_LANG_FLAG_0 (OVERLOAD_CHECK (NODE))
 --- a/src/gcc/cp/name-lookup.c
 +++ b/src/gcc/cp/name-lookup.c
-@@ -2268,8 +2268,7 @@
+@@ -2286,8 +2286,7 @@
  		  && compparms (TYPE_ARG_TYPES (TREE_TYPE (fn)),
  				TYPE_ARG_TYPES (TREE_TYPE (decl)))
  		  && ! decls_match (fn, decl))
@@ -9694,7 +9717,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  
  	      dup = duplicate_decls (decl, fn, is_friend);
  	      /* If DECL was a redeclaration of FN -- even an invalid
-@@ -2501,7 +2500,7 @@
+@@ -2519,7 +2518,7 @@
  		  if (new_fn == old_fn)
  		    /* The function already exists in the current namespace.  */
  		    break;
@@ -9703,7 +9726,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  		    continue; /* this is a using decl */
  		  else if (compparms (TYPE_ARG_TYPES (TREE_TYPE (new_fn)),
  				      TYPE_ARG_TYPES (TREE_TYPE (old_fn))))
-@@ -2516,7 +2515,7 @@
+@@ -2534,7 +2533,7 @@
  			break;
  		      else
  			{
@@ -9770,7 +9793,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
     FNDECL is the function in which the argument was defined.
  
     There are two types of rounding that are done.  The first, controlled by
-@@ -3713,19 +3713,16 @@
+@@ -3713,7 +3713,8 @@
  
  void
  locate_and_pad_parm (enum machine_mode passed_mode, tree type, int in_regs,
@@ -9780,6 +9803,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  		     struct args_size *initial_offset_ptr,
  		     struct locate_and_pad_arg_data *locate)
  {
+@@ -3720,12 +3721,8 @@
    tree sizetree;
    enum direction where_pad;
    unsigned int boundary, round_boundary;
@@ -9836,7 +9860,14 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  	      emit_move_insn (gen_rtx_REG (GET_MODE (decl_rtl),
 --- a/src/gcc/ChangeLog.ibm
 +++ b/src/gcc/ChangeLog.ibm
-@@ -0,0 +1,2995 @@
+@@ -0,0 +1,3002 @@
++2014-03-04  Peter Bergner  <bergner@vnet.ibm.com>
++
++	Merge up to 208295.
++	* REVISION: Update subversion id.
++
++	Picks up LIBITM fixes for libitm.c/reentrant.c.
++
 +2014-03-03  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
 +
 +	Backport from mainline r208287
@@ -12882,7 +12913,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
 --- a/src/gcc/REVISION
 +++ b/src/gcc/REVISION
 @@ -0,0 +1 @@
-+[ibm/gcc-4_8-branch merged from gcc-4_8-branch, revision 206665]
++[ibm/gcc-4_8-branch merged from gcc-4_8-branch, revision 208295]
 --- a/src/gcc/config.gcc
 +++ b/src/gcc/config.gcc
 @@ -420,7 +420,7 @@
@@ -13426,7 +13457,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    "
  {
    if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],
-@@ -505,14 +518,14 @@
+@@ -505,7 +518,7 @@
    [(set (match_operand:VEC_I 0 "vint_operand" "")
  	(gtu:VEC_I (match_operand:VEC_I 1 "vint_operand" "")
  		   (match_operand:VEC_I 2 "vint_operand" "")))]
@@ -13435,6 +13466,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    "")
  
  (define_expand "vector_geu<mode>"
+@@ -512,7 +525,7 @@
    [(set (match_operand:VEC_I 0 "vint_operand" "")
  	(geu:VEC_I (match_operand:VEC_I 1 "vint_operand" "")
  		   (match_operand:VEC_I 2 "vint_operand" "")))]
@@ -14525,7 +14557,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  				 | OPTION_MASK_CMPB			\
  				 | OPTION_MASK_RECIP_PRECISION		\
  				 | OPTION_MASK_PPC_GFXOPT		\
-@@ -38,12 +38,24 @@
+@@ -38,6 +38,8 @@
  
    /* For ISA 2.06, don't add ISEL, since in general it isn't a win, but
       altivec is a win so enable it.  */
@@ -14534,6 +14566,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  #define ISA_2_6_MASKS_EMBEDDED	(ISA_2_5_MASKS_EMBEDDED | OPTION_MASK_POPCNTD)
  #define ISA_2_6_MASKS_SERVER	(ISA_2_5_MASKS_SERVER			\
  				 | OPTION_MASK_POPCNTD			\
+@@ -44,6 +46,16 @@
  				 | OPTION_MASK_ALTIVEC			\
  				 | OPTION_MASK_VSX)
  
@@ -15521,7 +15554,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V4SF,
      RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
    { ALTIVEC_BUILTIN_VEC_ABS, VSX_BUILTIN_XVABSDP,
-@@ -577,12 +602,20 @@
+@@ -577,6 +602,10 @@
      RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },
    { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSH,
      RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
@@ -15532,6 +15565,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHPX,
      RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 },
    { ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH,
+@@ -583,6 +612,10 @@
      RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },
    { ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH,
      RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
@@ -17342,7 +17376,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    fprintf (stderr,
  	   "\n"
  	   "d  reg_class = %s\n"
-@@ -1734,25 +2016,70 @@
+@@ -1734,7 +2016,19 @@
  	   "wa reg_class = %s\n"
  	   "wd reg_class = %s\n"
  	   "wf reg_class = %s\n"
@@ -17363,6 +17397,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_d]],
  	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_f]],
  	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_v]],
+@@ -1741,18 +2035,51 @@
  	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wa]],
  	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wd]],
  	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wf]],
@@ -18608,7 +18643,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    /* If not REG_OK_STRICT (before reload) let pass any stack offset.  */
    if (! reg_ok_strict
        && reg_offset_p
-@@ -6545,31 +7439,20 @@
+@@ -6545,8 +7439,7 @@
      return 1;
    if (rs6000_legitimate_offset_address_p (mode, x, reg_ok_strict, false))
      return 1;
@@ -18618,6 +18653,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
        && mode != TDmode
        && ((TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT)
  	  || TARGET_POWERPC64
+@@ -6553,23 +7446,13 @@
  	  || (mode != DFmode && mode != DDmode)
  	  || (TARGET_E500_DOUBLE && mode != DDmode))
        && (TARGET_POWERPC64 || mode != DImode)
@@ -19546,7 +19582,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  	  else
  	    align = cum->words & 1;
  	  align_words = cum->words + align;
-@@ -8697,101 +10092,50 @@
+@@ -8697,92 +10092,44 @@
  
        /* _Decimal128 must be passed in an even/odd float register pair.
  	 This assumes that the register number is odd when fregno is odd.  */
@@ -19667,6 +19703,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  	}
        else if (align_words < GP_ARG_NUM_REG)
  	{
+@@ -8789,9 +10136,6 @@
  	  if (TARGET_32BIT && TARGET_POWERPC64)
  	    return rs6000_mixed_function_arg (mode, type, align_words);
  
@@ -19676,7 +19713,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  	  return gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words);
  	}
        else
-@@ -8810,42 +10154,62 @@
+@@ -8810,16 +10154,32 @@
  			  tree type, bool named)
  {
    CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
@@ -19712,6 +19749,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    /* In this complicated case we just disable the partial_nregs code.  */
    if (TARGET_MACHO && rs6000_darwin64_struct_check_p (mode, type))
      return 0;
+@@ -8826,26 +10186,30 @@
  
    align_words = rs6000_parm_start (mode, type, cum->words);
  
@@ -20053,7 +20091,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  #define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)
  #define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE)
  #define RS6000_BUILTIN_S(ENUM, NAME, MASK, ATTR, ICODE)
-@@ -9872,17 +11389,49 @@
+@@ -9872,6 +11389,7 @@
  #include "rs6000-builtin.def"
  };
  
@@ -20061,6 +20099,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  #undef RS6000_BUILTIN_1
  #undef RS6000_BUILTIN_2
  #undef RS6000_BUILTIN_3
+@@ -9878,11 +11396,42 @@
  #undef RS6000_BUILTIN_A
  #undef RS6000_BUILTIN_D
  #undef RS6000_BUILTIN_E
@@ -20433,7 +20472,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    if (target == 0
        || GET_MODE (target) != tmode
        || ! (*insn_data[icode].operand[0].predicate) (target, tmode))
-@@ -10770,16 +12625,38 @@
+@@ -10770,8 +12625,19 @@
  
    switch (fcode)
      {
@@ -20453,6 +20492,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
      case ALTIVEC_BUILTIN_STVEBX:
        return altivec_expand_stv_builtin (CODE_FOR_altivec_stvebx, exp);
      case ALTIVEC_BUILTIN_STVEHX:
+@@ -10778,8 +12644,19 @@
        return altivec_expand_stv_builtin (CODE_FOR_altivec_stvehx, exp);
      case ALTIVEC_BUILTIN_STVEWX:
        return altivec_expand_stv_builtin (CODE_FOR_altivec_stvewx, exp);
@@ -21180,7 +21220,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
        ret = NO_REGS;
        sri->icode = CODE_FOR_nothing;
        sri->extra_cost = 0;
-@@ -13755,22 +16111,43 @@
+@@ -13755,14 +16111,23 @@
  
  	  /* Loads to and stores from gprs can do reg+offset, and wouldn't need
  	     an extra register in that case, but it would need an extra
@@ -21208,6 +21248,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  		  /* account for splitting the loads, and converting the
  		     address from reg+reg to reg.  */
  		  sri->extra_cost = (((TARGET_64BIT) ? 3 : 5)
+@@ -13769,8 +16134,20 @@
  				     + ((GET_CODE (addr) == AND) ? 1 : 0));
  		}
  	    }
@@ -21403,7 +21444,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
      case VSX_REGS:
      case ALTIVEC_REGS:
  
-@@ -14067,42 +16487,43 @@
+@@ -14067,35 +16487,35 @@
  	      || !VECTOR_MEM_ALTIVEC_P (mode)))
  	{
  	  and_op2 = XEXP (addr, 1);
@@ -21453,6 +21494,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  	;
  
        else if (GET_CODE (addr) == PLUS)
+@@ -14102,7 +16522,8 @@
  	{
  	  addr_op1 = XEXP (addr, 0);
  	  addr_op2 = XEXP (addr, 1);
@@ -21963,7 +22005,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
      default:
        gcc_unreachable ();
      }
-@@ -16798,12 +19440,21 @@
+@@ -16798,6 +19440,12 @@
  
    switch (mode)
      {
@@ -21976,6 +22018,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
      case SImode:
        fn = gen_store_conditionalsi;
        break;
+@@ -16804,6 +19452,9 @@
      case DImode:
        fn = gen_store_conditionaldi;
        break;
@@ -22570,7 +22613,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
        sp_off = frame_off = info->total_size;
      }
  
-@@ -19852,14 +22694,14 @@
+@@ -19852,7 +22694,7 @@
  
  	  insn = emit_move_insn (mem, reg);
  	  rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,
@@ -22579,6 +22622,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  	  END_USE (0);
  	}
      }
+@@ -19859,7 +22701,7 @@
  
    /* If we need to save CR, put it into r12 or r11.  Choose r12 except when
       r12 will be needed by out-of-line gpr restore.  */
@@ -26449,7 +26493,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  /* Alignment options for fields in structures for sub-targets following
     AIX-like ABI.
     ALIGN_POWER word-aligns FP doubles (default AIX ABI).
-@@ -479,22 +527,44 @@
+@@ -479,16 +527,37 @@
  #define TARGET_FCTIDUZ	TARGET_POPCNTD
  #define TARGET_FCTIWUZ	TARGET_POPCNTD
  
@@ -26487,6 +26531,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  #define MASK_ISEL			OPTION_MASK_ISEL
  #define MASK_MFCRF			OPTION_MASK_MFCRF
  #define MASK_MFPGPR			OPTION_MASK_MFPGPR
+@@ -495,6 +564,7 @@
  #define MASK_MULHW			OPTION_MASK_MULHW
  #define MASK_MULTIPLE			OPTION_MASK_MULTIPLE
  #define MASK_NO_UPDATE			OPTION_MASK_NO_UPDATE
@@ -27017,7 +27062,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    "vaddu<VI_char>m %0,%1,%2"
    [(set_attr "type" "vecsimple")])
  
-@@ -398,17 +412,17 @@
+@@ -398,7 +412,7 @@
          (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")
                        (match_operand:V4SI 2 "register_operand" "v")]
  		     UNSPEC_VADDCUW))]
@@ -27026,6 +27071,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    "vaddcuw %0,%1,%2"
    [(set_attr "type" "vecsimple")])
  
+@@ -405,10 +419,10 @@
  (define_insn "altivec_vaddu<VI_char>s"
    [(set (match_operand:VI 0 "register_operand" "=v")
          (unspec:VI [(match_operand:VI 1 "register_operand" "v")
@@ -27794,7 +27840,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    [(set (match_operand:V8HI 0 "register_operand" "=v")
          (unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v")
                        (match_operand:V16QI 2 "register_operand" "v")]
-@@ -989,167 +1399,139 @@
+@@ -989,19 +1399,37 @@
    "vmulosb %0,%1,%2"
    [(set_attr "type" "veccomplex")])
  
@@ -27834,6 +27880,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  		     UNSPEC_VMULOSH))]
    "TARGET_ALTIVEC"
    "vmulosh %0,%1,%2"
+@@ -1008,74 +1436,7 @@
    [(set_attr "type" "veccomplex")])
  
  
@@ -27909,6 +27956,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  (define_insn "altivec_vpkpx"
    [(set (match_operand:V8HI 0 "register_operand" "=v")
          (unspec:V8HI [(match_operand:V4SI 1 "register_operand" "v")
+@@ -1082,74 +1443,95 @@
                        (match_operand:V4SI 2 "register_operand" "v")]
  		     UNSPEC_VPKPX))]
    "TARGET_ALTIVEC"
@@ -28098,7 +28146,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    "vsra<VI_char> %0,%1,%2"
    [(set_attr "type" "vecsimple")])
  
-@@ -1233,64 +1615,242 @@
+@@ -1233,15 +1615,29 @@
    "vsum4s<VI_char>s %0,%1,%2"
    [(set_attr "type" "veccomplex")])
  
@@ -28131,6 +28179,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  
  (define_insn "altivec_vsumsws"
    [(set (match_operand:V4SI 0 "register_operand" "=v")
+@@ -1248,12 +1644,54 @@
          (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")
                        (match_operand:V4SI 2 "register_operand" "v")]
  		     UNSPEC_VSUMSWS))
@@ -28186,6 +28235,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    [(set (match_operand:V16QI 0 "register_operand" "=v")
          (vec_duplicate:V16QI
  	 (vec_select:QI (match_operand:V16QI 1 "register_operand" "v")
+@@ -1260,10 +1698,48 @@
  			(parallel
  			 [(match_operand:QI 2 "u5bit_cint_operand" "")]))))]
    "TARGET_ALTIVEC"
@@ -28235,6 +28285,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    [(set (match_operand:V8HI 0 "register_operand" "=v")
  	(vec_duplicate:V8HI
  	 (vec_select:HI (match_operand:V8HI 1 "register_operand" "v")
+@@ -1270,10 +1746,48 @@
  			(parallel
  			 [(match_operand:QI 2 "u5bit_cint_operand" "")]))))]
    "TARGET_ALTIVEC"
@@ -28284,6 +28335,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    [(set (match_operand:V4SI 0 "register_operand" "=v")
  	(vec_duplicate:V4SI
  	 (vec_select:SI (match_operand:V4SI 1 "register_operand" "v")
+@@ -1280,10 +1794,48 @@
  			(parallel
  			 [(match_operand:QI 2 "u5bit_cint_operand" "i")]))))]
    "TARGET_ALTIVEC"
@@ -28333,6 +28385,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    [(set (match_operand:V4SF 0 "register_operand" "=v")
  	(vec_duplicate:V4SF
  	 (vec_select:SF (match_operand:V4SF 1 "register_operand" "v")
+@@ -1290,7 +1842,15 @@
  			(parallel
  			 [(match_operand:QI 2 "u5bit_cint_operand" "i")]))))]
    "VECTOR_UNIT_ALTIVEC_P (V4SFmode)"
@@ -28349,7 +28402,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    [(set_attr "type" "vecperm")])
  
  (define_insn "altivec_vspltis<VI_char>"
-@@ -1308,23 +1868,53 @@
+@@ -1308,7 +1868,7 @@
    "vrfiz %0,%1"
    [(set_attr "type" "vecfloat")])
  
@@ -28358,6 +28411,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    [(set (match_operand:VM 0 "register_operand" "=v")
  	(unspec:VM [(match_operand:VM 1 "register_operand" "v")
  		    (match_operand:VM 2 "register_operand" "v")
+@@ -1315,10 +1875,25 @@
  		    (match_operand:V16QI 3 "register_operand" "v")]
  		   UNSPEC_VPERM))]
    "TARGET_ALTIVEC"
@@ -28384,6 +28438,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    [(set (match_operand:VM 0 "register_operand" "=v")
  	(unspec:VM [(match_operand:VM 1 "register_operand" "v")
  		    (match_operand:VM 2 "register_operand" "v")
+@@ -1325,6 +1900,21 @@
  		    (match_operand:V16QI 3 "register_operand" "v")]
  		   UNSPEC_VPERM_UNS))]
    "TARGET_ALTIVEC"
@@ -28419,7 +28474,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  
  (define_expand "vec_perm_constv16qi"
    [(match_operand:V16QI 0 "register_operand" "")
-@@ -1476,89 +2071,109 @@
+@@ -1476,52 +2071,72 @@
    "vsldoi %0,%1,%2,%3"
    [(set_attr "type" "vecperm")])
  
@@ -28522,6 +28577,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    [(set_attr "type" "vecperm")])
  
  ;; Compare vectors producing a vector result and a predicate, setting CR6 to
+@@ -1528,37 +2143,37 @@
  ;; indicate a combined status
  (define_insn "*altivec_vcmpequ<VI_char>_p"
    [(set (reg:CC 74)
@@ -29735,7 +29791,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
        break;
      default:
        gcc_unreachable ();
-@@ -170,35 +170,185 @@
+@@ -170,14 +170,26 @@
    DONE;
  })
  
@@ -29767,6 +29823,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  	(unspec_volatile:ATOMIC
           [(match_operand:ATOMIC 1 "memory_operand" "Z")] UNSPECV_LL))]
    ""
+@@ -184,21 +196,159 @@
    "<larx> %0,%y1"
    [(set_attr "type" "load_l")])
  
@@ -31071,7 +31128,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    [(set_attr "type" "fp")])
  
  ;; This expander is here to avoid FLOAT_WORDS_BIGENDIAN tests in
-@@ -4742,39 +5014,84 @@
+@@ -4742,12 +5014,14 @@
  ;; Use an unspec rather providing an if-then-else in RTL, to prevent the
  ;; compiler from optimizing -0.0
  (define_insn "copysign<mode>3_fcpsgn"
@@ -31091,6 +31148,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    [(set_attr "type" "fp")])
  
  ;; For MIN, MAX, and conditional move, we use DEFINE_EXPAND's that involve a
+@@ -4754,27 +5028,70 @@
  ;; fsel instruction and some auxiliary computations.  Then we just have a
  ;; single DEFINE_INSN for fsel and the define_splits to make them if made by
  ;; combine.
@@ -32235,7 +32293,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    "reload_completed
     && ((GET_CODE (operands[0]) == REG && REGNO (operands[0]) <= 31)
         || (GET_CODE (operands[0]) == SUBREG
-@@ -7947,42 +8573,89 @@
+@@ -7947,10 +8573,10 @@
    REAL_VALUE_TYPE rv;
  
    REAL_VALUE_FROM_CONST_DOUBLE (rv, operands[1]);
@@ -32248,6 +32306,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
    else
      operands[2] = gen_lowpart (SImode, operands[0]);
  
+@@ -7957,11 +8583,11 @@
    operands[3] = gen_int_mode (l, SImode);
  }")
  
@@ -32264,6 +32323,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
     && (TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT)"
    "@
     mr %0,%1
+@@ -7968,21 +8594,68 @@
     lwz%U1%X1 %0,%1
     stw%U0%X0 %1,%0
     fmr %0,%1
@@ -34219,7 +34279,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  	   && (rs6000_sdata == SDATA_EABI				\
  	       || rs6000_sdata == SDATA_SYSV))				\
      {									\
-@@ -173,14 +173,14 @@
+@@ -173,7 +173,7 @@
        error ("-mrelocatable and -mno-minimal-toc are incompatible");	\
      }									\
  									\
@@ -34228,6 +34288,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
      {									\
        rs6000_isa_flags &= ~OPTION_MASK_RELOCATABLE;			\
        error ("-mrelocatable and -mcall-%s are incompatible",		\
+@@ -180,7 +180,7 @@
  	     rs6000_abi_name);						\
      }									\
  									\
@@ -39369,7 +39430,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  INSTALL_PROGRAM = @INSTALL_PROGRAM@
 --- a/src/libffi/testsuite/libffi.call/cls_double_va.c
 +++ b/src/libffi/testsuite/libffi.call/cls_double_va.c
-@@ -38,26 +38,24 @@
+@@ -38,7 +38,7 @@
  
  	/* This printf call is variadic */
  	CHECK(ffi_prep_cif_var(&cif, FFI_DEFAULT_ABI, 1, 2, &ffi_type_sint,
@@ -39378,6 +39439,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  
  	args[0] = &format;
  	args[1] = &doubleArg;
+@@ -45,19 +45,17 @@
  	args[2] = NULL;
  
  	ffi_call(&cif, FFI_FN(printf), &res, args);
@@ -39406,7 +39468,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  }
 --- a/src/libffi/testsuite/libffi.call/cls_longdouble_va.c
 +++ b/src/libffi/testsuite/libffi.call/cls_longdouble_va.c
-@@ -38,27 +38,24 @@
+@@ -38,7 +38,7 @@
  
  	/* This printf call is variadic */
  	CHECK(ffi_prep_cif_var(&cif, FFI_DEFAULT_ABI, 1, 2, &ffi_type_sint,
@@ -39415,6 +39477,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  
  	args[0] = &format;
  	args[1] = &ldArg;
+@@ -45,20 +45,17 @@
  	args[2] = NULL;
  
  	ffi_call(&cif, FFI_FN(printf), &res, args);
@@ -39544,7 +39607,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
        tm_type.elements = &tm_type_elements;
      
        for (i = 0; i < 9; i++)
-@@ -540,21 +541,23 @@
+@@ -540,12 +541,14 @@
  #include <ffi.h>
  
  /* Acts like puts with the file given at time of enclosure. */
@@ -39562,6 +39625,7 @@ LANG=C svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@206665 \
  int main()
  @{
    ffi_cif cif;
+@@ -552,9 +555,9 @@
    ffi_type *args[1];
    ffi_closure *closure;