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authordoko <doko@6ca36cf4-e1d1-0310-8c6f-e303bb2178ca>2014-06-26 16:24:07 +0000
committerdoko <doko@6ca36cf4-e1d1-0310-8c6f-e303bb2178ca>2014-06-26 16:24:07 +0000
commite899bf9306fed54a6d25c46ee790ce0cfc6ebb20 (patch)
tree741a9aca32348ee5949072621e52b4ff3c9c55fc
parent4b536fc71c5502d314af138f6e2b2630f1727a9f (diff)
downloadgcc-48-e899bf9306fed54a6d25c46ee790ce0cfc6ebb20.tar.gz
* Update to SVN 20140626 (r212014) from the gcc-4_8-branch.
* Remove version requirement for dependency on make. Addresses: #751891. * Drop versioned build dependency on gdb, and apply the pretty printer patch for libstdc++ based on the release. git-svn-id: svn://svn.debian.org/svn/gcccvs/branches/sid/gcc-4.8@7479 6ca36cf4-e1d1-0310-8c6f-e303bb2178ca
-rw-r--r--debian/changelog9
-rw-r--r--debian/control2
-rw-r--r--debian/control.m42
-rw-r--r--debian/patches/svn-updates.diff610
-rw-r--r--debian/rules.patch3
5 files changed, 611 insertions, 15 deletions
diff --git a/debian/changelog b/debian/changelog
index c04982c..ac56ac7 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,6 +1,6 @@
-gcc-4.8 (4.8.3-4) UNRELEASED; urgency=medium
+gcc-4.8 (4.8.3-4) unstable; urgency=medium
- * Update to SVN 20140616 (r211693) from the gcc-4_8-branch.
+ * Update to SVN 20140626 (r212014) from the gcc-4_8-branch.
[ Aurelien Jarno ]
* Fix PR c++/61336, taken from the trunk.
@@ -8,8 +8,11 @@ gcc-4.8 (4.8.3-4) UNRELEASED; urgency=medium
[ Matthias Klose ]
* Fix removal of python byte-code files in libstdc++6. Addresses: #751435.
* Fix a segfault in the driver from calling free on non-malloc'd area.
+ * Remove version requirement for dependency on make. Addresses: #751891.
+ * Drop versioned build dependency on gdb, and apply the pretty printer
+ patch for libstdc++ based on the release.
- -- Matthias Klose <doko@debian.org> Mon, 16 Jun 2014 09:28:11 +0200
+ -- Matthias Klose <doko@debian.org> Thu, 26 Jun 2014 10:59:38 +0200
gcc-4.8 (4.8.3-3) unstable; urgency=medium
diff --git a/debian/control b/debian/control
index 88a27f4..25054a9 100644
--- a/debian/control
+++ b/debian/control
@@ -927,7 +927,7 @@ Description: GCC soft-floating-point gcc libraries (ARM)
Package: gcc-4.8-source
Architecture: all
Priority: optional
-Depends: make (>= 3.81), autoconf2.64, quilt, patchutils, gawk, ${misc:Depends}
+Depends: make, autoconf2.64, quilt, patchutils, gawk, ${misc:Depends}
Description: Source of the GNU Compiler Collection
This package contains the sources and patches which are needed to
build the GNU Compiler Collection (GCC).
diff --git a/debian/control.m4 b/debian/control.m4
index 1968d7e..7f4fefc 100644
--- a/debian/control.m4
+++ b/debian/control.m4
@@ -4015,7 +4015,7 @@ ifenabled(`source',`
Package: gcc`'PV-source
Architecture: all
Priority: PRI(optional)
-Depends: make (>= 3.81), autoconf2.64, quilt, patchutils, gawk, ${misc:Depends}
+Depends: make, autoconf2.64, quilt, patchutils, gawk, ${misc:Depends}
Description: Source of the GNU Compiler Collection
This package contains the sources and patches which are needed to
build the GNU Compiler Collection (GCC).
diff --git a/debian/patches/svn-updates.diff b/debian/patches/svn-updates.diff
index 0743df0..7472cc9 100644
--- a/debian/patches/svn-updates.diff
+++ b/debian/patches/svn-updates.diff
@@ -1,10 +1,10 @@
-# DP: updates from the 4.8 branch upto 20140616 (r211693).
+# DP: updates from the 4.8 branch upto 20140626 (r212014).
last_updated()
{
cat > ${dir}LAST_UPDATED <<EOF
-Mon Jun 16 09:24:47 CEST 2014
-Mon Jun 16 07:24:47 UTC 2014 (revision 211693)
+Thu Jun 26 10:55:49 CEST 2014
+Thu Jun 26 08:55:49 UTC 2014 (revision 212014)
EOF
}
@@ -269,13 +269,22 @@ Index: libstdc++-v3/testsuite/30_threads/promise/60966.cc
+ for (auto& t : threads)
+ t.join();
+}
+Index: libjava/classpath
+===================================================================
+--- a/src/libjava/classpath (.../tags/gcc_4_8_3_release)
++++ b/src/libjava/classpath (.../branches/gcc-4_8-branch)
+
+Property changes on: libjava/classpath
+___________________________________________________________________
+Modified: svn:mergeinfo
+ Merged /trunk/libjava/classpath:r211733
Index: gcc/DATESTAMP
===================================================================
--- a/src/gcc/DATESTAMP (.../tags/gcc_4_8_3_release)
+++ b/src/gcc/DATESTAMP (.../branches/gcc-4_8-branch)
@@ -1 +1 @@
-20140522
-+20140616
++20140626
Index: gcc/ipa-cp.c
===================================================================
--- a/src/gcc/ipa-cp.c (.../tags/gcc_4_8_3_release)
@@ -293,7 +302,58 @@ Index: gcc/ChangeLog
===================================================================
--- a/src/gcc/ChangeLog (.../tags/gcc_4_8_3_release)
+++ b/src/gcc/ChangeLog (.../branches/gcc-4_8-branch)
-@@ -1,3 +1,173 @@
+@@ -1,3 +1,224 @@
++2014-06-24 Jakub Jelinek <jakub@redhat.com>
++
++ PR target/61570
++ * config/i386/driver-i386.c (host_detect_local_cpu): For unknown
++ model family 6 CPU with has_longmode never use a CPU without
++ 64-bit support.
++
++2014-06-20 Chung-Lin Tang <cltang@codesourcery.com>
++
++ Backport from mainline
++
++ 2014-06-20 Julian Brown <julian@codesourcery.com>
++ Chung-Lin Tang <cltang@codesourcery.com>
++
++ * config/arm/arm.c (arm_output_mi_thunk): Fix offset for
++ TARGET_THUMB1_ONLY. Add comments.
++
++2014-06-18 Uros Bizjak <ubizjak@gmail.com>
++
++ Backport from mainline
++ 2014-06-06 Uros Bizjak <ubizjak@gmail.com>
++
++ PR target/61423
++ * config/i386/i386.md (*floatunssi<mode>2_i387_with_xmm): New
++ define_insn_and_split pattern, merged from *floatunssi<mode>2_1
++ and corresponding splitters. Zero extend general register
++ or memory input operand to XMM temporary. Enable for
++ TARGET_SSE2 and TARGET_INTER_UNIT_MOVES_TO_VEC only.
++ (floatunssi<mode>2): Update expander predicate.
++
++2014-06-18 Richard Henderson <rth@redhat.com>
++
++ PR target/61545
++ * config/aarch64/aarch64.md (tlsdesc_small): Clobber CC_REGNUM.
++
++2014-06-17 Nagaraju Mekala <nagaraju.mekala@xilinx.com>
++
++ Revert on gcc-4_8-branch.
++ * config/microblaze/microblaze.md: Add movsi4_rev insn pattern.
++ * config/microblaze/predicates.md: Add reg_or_mem_operand predicate.
++
++2014-06-17 Yufeng Zhang <yufeng.zhang@arm.com>
++
++ Backport from mainline
++
++ PR target/61483
++ * config/aarch64/aarch64.c (aarch64_layout_arg): Add new local
++ variable 'size'; calculate 'size' right in the front; use
++ 'size' to compute 'nregs' (when 'allocate_ncrn != 0') and
++ pcum->aapcs_stack_words.
++
+2014-06-13 Peter Bergner <bergner@vnet.ibm.com>
+
+ Backport from mainline
@@ -510,6 +570,172 @@ Index: gcc/testsuite/gcc.target/powerpc/htm-ttest.c
+{
+ return _HTM_STATE(__builtin_ttest());
+}
+Index: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-14.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-14.c (.../tags/gcc_4_8_3_release)
++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-14.c (.../branches/gcc-4_8-branch)
+@@ -0,0 +1,35 @@
++/* Test AAPCS64 layout and __builtin_va_start.
++
++ Pass named HFA/HVA argument on stack. */
++
++/* { dg-do run { target aarch64*-*-* } } */
++
++#ifndef IN_FRAMEWORK
++#define AAPCS64_TEST_STDARG
++#define TESTFILE "va_arg-14.c"
++#include "type-def.h"
++
++struct hfa_fx2_t hfa_fx2 = {1.2f, 2.2f};
++struct hfa_fx3_t hfa_fx3 = {3.2f, 4.2f, 5.2f};
++vf4_t float32x4 = {6.2f, 7.2f, 8.2f, 9.2f};
++vf4_t float32x4_2 = {10.2f, 11.2f, 12.2f, 13.2f};
++
++#include "abitest.h"
++#else
++ ARG (float, 1.0f, S0, 0)
++ ARG (float, 2.0f, S1, 1)
++ ARG (float, 3.0f, S2, 2)
++ ARG (float, 4.0f, S3, 3)
++ ARG (float, 5.0f, S4, 4)
++ ARG (float, 6.0f, S5, 5)
++ ARG (float, 7.0f, S6, 6)
++ ARG (struct hfa_fx3_t, hfa_fx3, STACK, 7)
++ /* Previous argument size has been rounded up to the nearest multiple of
++ 8 bytes. */
++ ARG (struct hfa_fx2_t, hfa_fx2, STACK + 16, 8)
++ /* NSAA is rounded up to the nearest natural alignment of float32x4. */
++ ARG (vf4_t, float32x4, STACK + 32, 9)
++ ARG (vf4_t, float32x4_2, STACK + 48, LAST_NAMED_ARG_ID)
++ DOTS
++ LAST_ANON (double, 123456789.987, STACK + 64, 11)
++#endif
+Index: gcc/testsuite/gcc.target/aarch64/aapcs64/type-def.h
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/type-def.h (.../tags/gcc_4_8_3_release)
++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/type-def.h (.../branches/gcc-4_8-branch)
+@@ -34,6 +34,13 @@
+ float b;
+ };
+
++struct hfa_fx3_t
++{
++ float a;
++ float b;
++ float c;
++};
++
+ struct hfa_dx2_t
+ {
+ double a;
+Index: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-13.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-13.c (.../tags/gcc_4_8_3_release)
++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-13.c (.../branches/gcc-4_8-branch)
+@@ -0,0 +1,59 @@
++/* Test AAPCS64 layout and __builtin_va_start.
++
++ Pass named HFA/HVA argument on stack. */
++
++/* { dg-do run { target aarch64*-*-* } } */
++
++#ifndef IN_FRAMEWORK
++#define AAPCS64_TEST_STDARG
++#define TESTFILE "va_arg-13.c"
++
++struct float_float_t
++{
++ float a;
++ float b;
++} float_float;
++
++union float_int_t
++{
++ float b8;
++ int b5;
++} float_int;
++
++#define HAS_DATA_INIT_FUNC
++void
++init_data ()
++{
++ float_float.a = 1.2f;
++ float_float.b = 2.2f;
++
++ float_int.b8 = 4983.80f;
++}
++
++#include "abitest.h"
++#else
++ ARG (float, 1.0f, S0, 0)
++ ARG (float, 2.0f, S1, 1)
++ ARG (float, 3.0f, S2, 2)
++ ARG (float, 4.0f, S3, 3)
++ ARG (float, 5.0f, S4, 4)
++ ARG (float, 6.0f, S5, 5)
++ ARG (float, 7.0f, S6, 6)
++ ARG (struct float_float_t, float_float, STACK, 7)
++ ARG (int, 9, W0, 8)
++ ARG (int, 10, W1, 9)
++ ARG (int, 11, W2, 10)
++ ARG (int, 12, W3, 11)
++ ARG (int, 13, W4, 12)
++ ARG (int, 14, W5, 13)
++ ARG (int, 15, W6, LAST_NAMED_ARG_ID)
++ DOTS
++ /* Note on the reason of using 'X7' instead of 'W7' here:
++ Using 'X7' makes sure the test works in the big-endian mode.
++ According to PCS rules B.4 and C.10, the size of float_int is rounded
++ to 8 bytes and prepared in the register X7 as if loaded via LDR from
++ the memory, with the content of the other 4 bytes unspecified. The
++ test framework will only compare the 4 relavent bytes. */
++ ANON (union float_int_t, float_int, X7, 15)
++ LAST_ANON (long long, 12683143434LL, STACK + 8, 16)
++#endif
+Index: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-15.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-15.c (.../tags/gcc_4_8_3_release)
++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-15.c (.../branches/gcc-4_8-branch)
+@@ -0,0 +1,39 @@
++/* Test AAPCS64 layout and __builtin_va_start.
++
++ Pass named __128int argument on stack. */
++
++/* { dg-do run { target aarch64*-*-* } } */
++
++#ifndef IN_FRAMEWORK
++#define AAPCS64_TEST_STDARG
++#define TESTFILE "va_arg-15.c"
++#include "type-def.h"
++
++union int128_t qword;
++
++#define HAS_DATA_INIT_FUNC
++void
++init_data ()
++{
++ /* Init signed quad-word integer. */
++ qword.l64 = 0xfdb9753102468aceLL;
++ qword.h64 = 0xeca8642013579bdfLL;
++}
++
++#include "abitest.h"
++#else
++ ARG (int, 1, W0, 0)
++ ARG (int, 2, W1, 1)
++ ARG (int, 3, W2, 2)
++ ARG (int, 4, W3, 3)
++ ARG (int, 5, W4, 4)
++ ARG (int, 6, W5, 5)
++ ARG (int, 7, W6, 6)
++ ARG (__int128, qword.i, STACK, LAST_NAMED_ARG_ID)
++ DOTS
++#ifndef __AAPCS64_BIG_ENDIAN__
++ LAST_ANON (int, 8, STACK + 16, 8)
++#else
++ LAST_ANON (int, 8, STACK + 20, 8)
++#endif
++#endif
Index: gcc/testsuite/gcc.target/avr/torture/pr61443.c
===================================================================
--- a/src/gcc/testsuite/gcc.target/avr/torture/pr61443.c (.../tags/gcc_4_8_3_release)
@@ -649,6 +875,49 @@ Index: gcc/testsuite/gcc.target/avr/torture/pr61443.c
+
+ exit (0);
+}
+Index: gcc/testsuite/gcc.target/i386/pr61423.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/i386/pr61423.c (.../tags/gcc_4_8_3_release)
++++ b/src/gcc/testsuite/gcc.target/i386/pr61423.c (.../branches/gcc-4_8-branch)
+@@ -0,0 +1,38 @@
++/* PR target/61423 */
++/* { dg-do run { target ia32 } } */
++/* { dg-options "-O1 -ftree-vectorize -msse2 -mfpmath=387 -mtune=core2" } */
++
++#define N 1024
++static unsigned int A[N];
++
++double
++__attribute__((noinline))
++func (void)
++{
++ unsigned int sum = 0;
++ unsigned i;
++ double t;
++
++ for (i = 0; i < N; i++)
++ sum += A[i];
++
++ t = sum;
++ return t;
++}
++
++int
++main ()
++{
++ unsigned i;
++ double d;
++
++ for(i = 0; i < N; i++)
++ A[i] = 1;
++
++ d = func();
++
++ if (d != 1024.0)
++ __builtin_abort ();
++
++ return 0;
++}
Index: gcc/testsuite/gcc.target/i386/pr60901.c
===================================================================
--- a/src/gcc/testsuite/gcc.target/i386/pr60901.c (.../tags/gcc_4_8_3_release)
@@ -671,6 +940,25 @@ Index: gcc/testsuite/gcc.target/i386/pr60901.c
+ baz (0);
+ }
+}
+Index: gcc/testsuite/gcc.target/i386/pr61446.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/i386/pr61446.c (.../tags/gcc_4_8_3_release)
++++ b/src/gcc/testsuite/gcc.target/i386/pr61446.c (.../branches/gcc-4_8-branch)
+@@ -0,0 +1,14 @@
++/* PR rtl-optimization/61446 */
++
++/* { dg-do compile { target { ia32 } } } */
++/* { dg-options "-O2 -march=corei7 -mfpmath=387" } */
++
++unsigned long long
++foo (float a)
++{
++ const double dfa = a;
++ const unsigned int hi = dfa / 0x1p32f;
++ const unsigned int lo = dfa - (double) hi * 0x1p32f;
++
++ return ((unsigned long long) hi << (4 * (8))) | lo;
++}
Index: gcc/testsuite/lib/target-supports.exp
===================================================================
--- a/src/gcc/testsuite/lib/target-supports.exp (.../tags/gcc_4_8_3_release)
@@ -691,6 +979,19 @@ Index: gcc/testsuite/lib/target-supports.exp
# Return 1 if the target supports double of 64 bits,
# 0 otherwise.
+Index: gcc/testsuite/gfortran.dg/default_format_denormal_2.f90
+===================================================================
+--- a/src/gcc/testsuite/gfortran.dg/default_format_denormal_2.f90 (.../tags/gcc_4_8_3_release)
++++ b/src/gcc/testsuite/gfortran.dg/default_format_denormal_2.f90 (.../branches/gcc-4_8-branch)
+@@ -1,6 +1,6 @@
+ ! { dg-require-effective-target fortran_large_real }
+-! { dg-do run { xfail powerpc*-apple-darwin* powerpc*-*-linux* } }
+-! Test XFAILed on these platforms because the system's printf() lacks
++! { dg-do run { xfail powerpc*-apple-darwin* } }
++! Test XFAILed on this platform because the system's printf() lacks
+ ! proper support for denormalized long doubles. See PR24685
+ !
+ ! This tests that the default formats for formatted I/O of reals are
Index: gcc/testsuite/gfortran.dg/cray_pointers_10.f90
===================================================================
--- a/src/gcc/testsuite/gfortran.dg/cray_pointers_10.f90 (.../tags/gcc_4_8_3_release)
@@ -816,7 +1117,37 @@ Index: gcc/testsuite/ChangeLog
===================================================================
--- a/src/gcc/testsuite/ChangeLog (.../tags/gcc_4_8_3_release)
+++ b/src/gcc/testsuite/ChangeLog (.../branches/gcc-4_8-branch)
-@@ -1,3 +1,65 @@
+@@ -1,3 +1,95 @@
++2014-06-25 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
++
++ * gfortran.dg/default_format_denormal_2.f90: Remove xfail for
++ powerpc*-*-linux*.
++
++2014-06-18 Uros Bizjak <ubizjak@gmail.com>
++
++ Backport from mainline
++ 2014-06-13 Ilya Enkovich <ilya.enkovich@intel.com>
++
++ PR rtl-optimization/61094
++ PR rtl-optimization/61446
++ * gcc.target/i386/pr61446.c : New.
++
++ Backport from mainline
++ 2014-06-06 Uros Bizjak <ubizjak@gmail.com>
++
++ PR target/61423
++ * gcc.target/i386/pr61423.c: New test.
++
++2014-06-17 Yufeng Zhang <yufeng.zhang@arm.com>
++
++ Backport from mainline
++
++ PR target/61483
++ * gcc.target/aarch64/aapcs64/type-def.h (struct hfa_fx2_t): New type.
++ * gcc.target/aarch64/aapcs64/va_arg-13.c: New test.
++ * gcc.target/aarch64/aapcs64/va_arg-14.c: Ditto.
++ * gcc.target/aarch64/aapcs64/va_arg-15.c: Ditto.
++
+2014-06-15 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
+
+ Backport from trunk.
@@ -911,11 +1242,29 @@ Index: gcc/testsuite/g++.dg/cpp0x/variadic158.C
+{
+ CreateMetric<int, const char*>("abcd", "def", Base());
+}
+Index: gcc/testsuite/g++.dg/template/local-fn1.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/template/local-fn1.C (.../tags/gcc_4_8_3_release)
++++ b/src/gcc/testsuite/g++.dg/template/local-fn1.C (.../branches/gcc-4_8-branch)
+@@ -0,0 +1,8 @@
++// PR c++/60605
++
++template <typename T = int>
++struct Foo {
++ void bar() {
++ void bug();
++ }
++};
Index: gcc/cp/ChangeLog
===================================================================
--- a/src/gcc/cp/ChangeLog (.../tags/gcc_4_8_3_release)
+++ b/src/gcc/cp/ChangeLog (.../branches/gcc-4_8-branch)
-@@ -1,3 +1,8 @@
+@@ -1,3 +1,13 @@
++2014-06-17 Jason Merrill <jason@redhat.com>
++
++ PR c++/60605
++ * pt.c (check_default_tmpl_args): Check DECL_LOCAL_FUNCTION_P.
++
+2014-06-02 Jason Merrill <jason@redhat.com>
+
+ PR c++/61134
@@ -928,7 +1277,17 @@ Index: gcc/cp/pt.c
===================================================================
--- a/src/gcc/cp/pt.c (.../tags/gcc_4_8_3_release)
+++ b/src/gcc/cp/pt.c (.../branches/gcc-4_8-branch)
-@@ -14934,7 +14934,7 @@
+@@ -4308,7 +4308,8 @@
+ in the template-parameter-list of the definition of a member of a
+ class template. */
+
+- if (TREE_CODE (CP_DECL_CONTEXT (decl)) == FUNCTION_DECL)
++ if (TREE_CODE (CP_DECL_CONTEXT (decl)) == FUNCTION_DECL
++ || (TREE_CODE (decl) == FUNCTION_DECL && DECL_LOCAL_FUNCTION_P (decl)))
+ /* You can't have a function template declaration in a local
+ scope, nor you can you define a member of a class template in a
+ local scope. */
+@@ -14934,7 +14935,7 @@
continue;
for (packs = PACK_EXPANSION_PARAMETER_PACKS (type);
packs; packs = TREE_CHAIN (packs))
@@ -1234,6 +1593,109 @@ Index: gcc/config/elfos.h
#else
#define USE_GNU_UNIQUE_OBJECT 0
#endif
+Index: gcc/config/i386/i386.md
+===================================================================
+--- a/src/gcc/config/i386/i386.md (.../tags/gcc_4_8_3_release)
++++ b/src/gcc/config/i386/i386.md (.../branches/gcc-4_8-branch)
+@@ -5339,66 +5339,37 @@
+
+ ;; Avoid store forwarding (partial memory) stall penalty by extending
+ ;; SImode value to DImode through XMM register instead of pushing two
+-;; SImode values to stack. Note that even !TARGET_INTER_UNIT_MOVES
+-;; targets benefit from this optimization. Also note that fild
+-;; loads from memory only.
++;; SImode values to stack. Also note that fild loads from memory only.
+
+-(define_insn "*floatunssi<mode>2_1"
+- [(set (match_operand:X87MODEF 0 "register_operand" "=f,f")
++(define_insn_and_split "*floatunssi<mode>2_i387_with_xmm"
++ [(set (match_operand:X87MODEF 0 "register_operand" "=f")
+ (unsigned_float:X87MODEF
+- (match_operand:SI 1 "nonimmediate_operand" "x,m")))
+- (clobber (match_operand:DI 2 "memory_operand" "=m,m"))
+- (clobber (match_scratch:SI 3 "=X,x"))]
++ (match_operand:SI 1 "nonimmediate_operand" "rm")))
++ (clobber (match_scratch:DI 3 "=x"))
++ (clobber (match_operand:DI 2 "memory_operand" "=m"))]
+ "!TARGET_64BIT
+ && TARGET_80387 && X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, DImode)
+- && TARGET_SSE"
++ && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES"
+ "#"
++ "&& reload_completed"
++ [(set (match_dup 3) (zero_extend:DI (match_dup 1)))
++ (set (match_dup 2) (match_dup 3))
++ (set (match_dup 0)
++ (float:X87MODEF (match_dup 2)))]
++ ""
+ [(set_attr "type" "multi")
+ (set_attr "mode" "<MODE>")])
+
+-(define_split
+- [(set (match_operand:X87MODEF 0 "register_operand")
+- (unsigned_float:X87MODEF
+- (match_operand:SI 1 "register_operand")))
+- (clobber (match_operand:DI 2 "memory_operand"))
+- (clobber (match_scratch:SI 3))]
+- "!TARGET_64BIT
+- && TARGET_80387 && X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, DImode)
+- && TARGET_SSE
+- && reload_completed"
+- [(set (match_dup 2) (match_dup 1))
+- (set (match_dup 0)
+- (float:X87MODEF (match_dup 2)))]
+- "operands[1] = simplify_gen_subreg (DImode, operands[1], SImode, 0);")
+-
+-(define_split
+- [(set (match_operand:X87MODEF 0 "register_operand")
+- (unsigned_float:X87MODEF
+- (match_operand:SI 1 "memory_operand")))
+- (clobber (match_operand:DI 2 "memory_operand"))
+- (clobber (match_scratch:SI 3))]
+- "!TARGET_64BIT
+- && TARGET_80387 && X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, DImode)
+- && TARGET_SSE
+- && reload_completed"
+- [(set (match_dup 2) (match_dup 3))
+- (set (match_dup 0)
+- (float:X87MODEF (match_dup 2)))]
+-{
+- emit_move_insn (operands[3], operands[1]);
+- operands[3] = simplify_gen_subreg (DImode, operands[3], SImode, 0);
+-})
+-
+ (define_expand "floatunssi<mode>2"
+ [(parallel
+ [(set (match_operand:X87MODEF 0 "register_operand")
+ (unsigned_float:X87MODEF
+ (match_operand:SI 1 "nonimmediate_operand")))
+- (clobber (match_dup 2))
+- (clobber (match_scratch:SI 3))])]
++ (clobber (match_scratch:DI 3))
++ (clobber (match_dup 2))])]
+ "!TARGET_64BIT
+ && ((TARGET_80387 && X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, DImode)
+- && TARGET_SSE)
++ && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES)
+ || (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH))"
+ {
+ if (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
+Index: gcc/config/i386/driver-i386.c
+===================================================================
+--- a/src/gcc/config/i386/driver-i386.c (.../tags/gcc_4_8_3_release)
++++ b/src/gcc/config/i386/driver-i386.c (.../branches/gcc-4_8-branch)
+@@ -713,6 +713,11 @@
+ /* Assume Core 2. */
+ cpu = "core2";
+ }
++ else if (has_longmode)
++ /* Perhaps some emulator? Assume x86-64, otherwise gcc
++ -march=native would be unusable for 64-bit compilations,
++ as all the CPUs below are 32-bit only. */
++ cpu = "x86-64";
+ else if (has_sse3)
+ /* It is Core Duo. */
+ cpu = "pentium-m";
Index: gcc/config/i386/i386.c
===================================================================
--- a/src/gcc/config/i386/i386.c (.../tags/gcc_4_8_3_release)
@@ -1269,6 +1731,44 @@ Index: gcc/config/i386/i386.c
add_dependee_for_func_arg (first_arg, e->src);
}
}
+Index: gcc/config/microblaze/predicates.md
+===================================================================
+--- a/src/gcc/config/microblaze/predicates.md (.../tags/gcc_4_8_3_release)
++++ b/src/gcc/config/microblaze/predicates.md (.../branches/gcc-4_8-branch)
+@@ -85,10 +85,6 @@
+ (ior (match_operand 0 "const_0_operand")
+ (match_operand 0 "register_operand")))
+
+-(define_predicate "reg_or_mem_operand"
+- (ior (match_operand 0 "memory_operand")
+- (match_operand 0 "register_operand")))
+-
+ ;; Return if the operand is either the PC or a label_ref.
+ (define_special_predicate "pc_or_label_operand"
+ (ior (match_code "pc,label_ref")
+Index: gcc/config/microblaze/microblaze.md
+===================================================================
+--- a/src/gcc/config/microblaze/microblaze.md (.../tags/gcc_4_8_3_release)
++++ b/src/gcc/config/microblaze/microblaze.md (.../branches/gcc-4_8-branch)
+@@ -1119,18 +1119,6 @@
+ }
+ )
+
+-;;Load and store reverse
+-(define_insn "movsi4_rev"
+- [(set (match_operand:SI 0 "reg_or_mem_operand" "=r,Q")
+- (bswap:SI (match_operand:SF 1 "reg_or_mem_operand" "Q,r")))]
+- "TARGET_REORDER"
+- "@
+- lwr\t%0,%y1,r0
+- swr\t%1,%y0,r0"
+- [(set_attr "type" "load,store")
+- (set_attr "mode" "SI")
+- (set_attr "length" "4,4")])
+-
+ ;; 32-bit floating point moves
+
+ (define_expand "movsf"
Index: gcc/config/avr/avr-fixed.md
===================================================================
--- a/src/gcc/config/avr/avr-fixed.md (.../tags/gcc_4_8_3_release)
@@ -1356,6 +1856,71 @@ Index: gcc/config/aarch64/arm_neon.h
: /* No clobbers */);
return result;
}
+Index: gcc/config/aarch64/aarch64.md
+===================================================================
+--- a/src/gcc/config/aarch64/aarch64.md (.../tags/gcc_4_8_3_release)
++++ b/src/gcc/config/aarch64/aarch64.md (.../branches/gcc-4_8-branch)
+@@ -3292,6 +3292,7 @@
+ (unspec:DI [(match_operand:DI 0 "aarch64_valid_symref" "S")]
+ UNSPEC_TLSDESC))
+ (clobber (reg:DI LR_REGNUM))
++ (clobber (reg:CC CC_REGNUM))
+ (clobber (match_scratch:DI 1 "=r"))]
+ "TARGET_TLS_DESC"
+ "adrp\\tx0, %A0\;ldr\\t%1, [x0, #%L0]\;add\\tx0, x0, %L0\;.tlsdesccall\\t%0\;blr\\t%1"
+Index: gcc/config/aarch64/aarch64.c
+===================================================================
+--- a/src/gcc/config/aarch64/aarch64.c (.../tags/gcc_4_8_3_release)
++++ b/src/gcc/config/aarch64/aarch64.c (.../branches/gcc-4_8-branch)
+@@ -1201,6 +1201,7 @@
+ CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
+ int ncrn, nvrn, nregs;
+ bool allocate_ncrn, allocate_nvrn;
++ HOST_WIDE_INT size;
+
+ /* We need to do this once per argument. */
+ if (pcum->aapcs_arg_processed)
+@@ -1208,6 +1209,11 @@
+
+ pcum->aapcs_arg_processed = true;
+
++ /* Size in bytes, rounded to the nearest multiple of 8 bytes. */
++ size
++ = AARCH64_ROUND_UP (type ? int_size_in_bytes (type) : GET_MODE_SIZE (mode),
++ UNITS_PER_WORD);
++
+ allocate_ncrn = (type) ? !(FLOAT_TYPE_P (type)) : !FLOAT_MODE_P (mode);
+ allocate_nvrn = aarch64_vfp_is_call_candidate (pcum_v,
+ mode,
+@@ -1258,10 +1264,8 @@
+ }
+
+ ncrn = pcum->aapcs_ncrn;
+- nregs = ((type ? int_size_in_bytes (type) : GET_MODE_SIZE (mode))
+- + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
++ nregs = size / UNITS_PER_WORD;
+
+-
+ /* C6 - C9. though the sign and zero extension semantics are
+ handled elsewhere. This is the case where the argument fits
+ entirely general registers. */
+@@ -1309,13 +1313,12 @@
+ pcum->aapcs_nextncrn = NUM_ARG_REGS;
+
+ /* The argument is passed on stack; record the needed number of words for
+- this argument (we can re-use NREGS) and align the total size if
+- necessary. */
++ this argument and align the total size if necessary. */
+ on_stack:
+- pcum->aapcs_stack_words = nregs;
++ pcum->aapcs_stack_words = size / UNITS_PER_WORD;
+ if (aarch64_function_arg_alignment (mode, type) == 16 * BITS_PER_UNIT)
+ pcum->aapcs_stack_size = AARCH64_ROUND_UP (pcum->aapcs_stack_size,
+- 16 / UNITS_PER_WORD) + 1;
++ 16 / UNITS_PER_WORD);
+ return;
+ }
+
Index: gcc/config/rs6000/htm.md
===================================================================
--- a/src/gcc/config/rs6000/htm.md (.../tags/gcc_4_8_3_release)
@@ -1771,6 +2336,26 @@ Index: gcc/config/rs6000/rs6000.md
(define_insn_and_split "unpack<mode>_dm"
[(set (match_operand:<FP128_64> 0 "nonimmediate_operand" "=d,m,d,r,m")
(unspec:<FP128_64>
+Index: gcc/config/arm/arm.c
+===================================================================
+--- a/src/gcc/config/arm/arm.c (.../tags/gcc_4_8_3_release)
++++ b/src/gcc/config/arm/arm.c (.../branches/gcc-4_8-branch)
+@@ -24476,9 +24476,13 @@
+ fputs (":\n", file);
+ if (flag_pic)
+ {
+- /* Output ".word .LTHUNKn-7-.LTHUNKPCn". */
++ /* Output ".word .LTHUNKn-[3,7]-.LTHUNKPCn". */
+ rtx tem = XEXP (DECL_RTL (function), 0);
+- tem = gen_rtx_PLUS (GET_MODE (tem), tem, GEN_INT (-7));
++ /* For TARGET_THUMB1_ONLY the thunk is in Thumb mode, so the PC
++ pipeline offset is four rather than eight. Adjust the offset
++ accordingly. */
++ tem = plus_constant (GET_MODE (tem), tem,
++ TARGET_THUMB1_ONLY ? -3 : -7);
+ tem = gen_rtx_MINUS (GET_MODE (tem),
+ tem,
+ gen_rtx_SYMBOL_REF (Pmode,
Index: gcc/config/arm/arm.md
===================================================================
--- a/src/gcc/config/arm/arm.md (.../tags/gcc_4_8_3_release)
@@ -1966,3 +2551,12 @@ Index: libgfortran/io/unix.c
s->st_dev = statbuf.st_dev;
s->st_ino = statbuf.st_ino;
+Index: .
+===================================================================
+--- a/src/. (.../tags/gcc_4_8_3_release)
++++ b/src/. (.../branches/gcc-4_8-branch)
+
+Property changes on: .
+___________________________________________________________________
+Modified: svn:mergeinfo
+ Merged /trunk:r211733
diff --git a/debian/rules.patch b/debian/rules.patch
index ed490d9..e1b4f24 100644
--- a/debian/rules.patch
+++ b/debian/rules.patch
@@ -103,8 +103,7 @@ debian_patches += \
# FIXME: still necessary for cross building the native compiler?
# gcc-auto-build \
-gdb_depends := $(shell dpkg -s gdb | grep '^Depends:.*libpython3')
-ifneq (,$(findstring libpython3,$(gdb_depends)))
+ifeq (,$(filter $(distrelease),wheezy squeeze dapper hardy lucid maverick natty oneiric precise quantal raring))
debian_patches += libstdc++-python3
endif