* Update to SVN 20140523 (r210828) from the gcc-4_9-branch.

git-svn-id: svn://svn.debian.org/svn/gcccvs/branches/sid/gcc-4.9@7407 6ca36cf4-e1d1-0310-8c6f-e303bb2178ca

2 files changed, 995 insertions, 61 deletions

diff --git a/debian/changelog b/debian/changelog
index c04bd1f..3f5e6e8 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,6 +1,6 @@
 gcc-4.9 (4.9.0-5) UNRELEASED; urgency=medium
 
-  * Update to SVN 20140520 (r210646) from the gcc-4_9-branch.
+  * Update to SVN 20140523 (r210828) from the gcc-4_9-branch.
   * Limit systemtap-sdt-dev build dependency to enumerated linux architectures.
     Build-conflict with systemtap-sdt-dev on ppc64el.
   * Build libitm on AArch64, patch taken from the trunk.
diff --git a/debian/patches/svn-updates.diff b/debian/patches/svn-updates.diff
index d44a4ba..48c519b 100644
--- a/debian/patches/svn-updates.diff
+++ b/debian/patches/svn-updates.diff
@@ -3,8 +3,8 @@
 last_updated()
 {
 	cat > ${dir}LAST_UPDATED <<EOF
-Tue May 20 17:22:28 CEST 2014
-Tue May 20 15:22:28 UTC 2014 (revision 210646)
+Fri May 23 00:24:33 CEST 2014
+Thu May 22 22:24:33 UTC 2014 (revision 210828)
 EOF
 }
 
@@ -16,7 +16,12 @@ Index: libgomp/ChangeLog
 ===================================================================
 --- a/src/libgomp/ChangeLog	(.../tags/gcc_4_9_0_release)
 +++ b/src/libgomp/ChangeLog	(.../branches/gcc-4_9-branch)
-@@ -1,3 +1,28 @@
+@@ -1,3 +1,33 @@
++2014-05-21  Jakub Jelinek  <jakub@redhat.com>
++
++	PR middle-end/61252
++	* testsuite/libgomp.c++/simd-9.C: New test.
++
 +2014-05-18  Uros Bizjak  <ubizjak@gmail.com>
 +
 +	* libgomp.texi (Runitme Library Routines): Remove multiple @menu.
@@ -235,6 +240,63 @@ Index: libgomp/testsuite/libgomp.c++/atomic-14.C
      { v = x; x = l ? 17 : 12; }
    if (v != 47)
      abort ();
+Index: libgomp/testsuite/libgomp.c++/simd-9.C
+===================================================================
+--- a/src/libgomp/testsuite/libgomp.c++/simd-9.C	(.../tags/gcc_4_9_0_release)
++++ b/src/libgomp/testsuite/libgomp.c++/simd-9.C	(.../branches/gcc-4_9-branch)
+@@ -0,0 +1,52 @@
++// { dg-do run }
++// { dg-options "-O2" }
++// { dg-additional-options "-msse2" { target sse2_runtime } }
++// { dg-additional-options "-mavx" { target avx_runtime } }
++
++extern "C" void abort ();
++int a[1024] __attribute__((aligned (32))) = { 1 };
++#pragma omp declare reduction (foo:int:omp_out += omp_in) \
++		    initializer (omp_priv = 0)
++
++__attribute__((noinline, noclone)) void
++foo (int &u, int &v)
++{
++  int i;
++  #pragma omp simd aligned(a : 32) reduction(foo:u) reduction(+:v)
++  for (i = 0; i < 1024; i++)
++    {
++      int x = a[i];
++      u += x;
++      v += x;
++    }
++}
++
++__attribute__((noinline, noclone)) void
++bar (int &u, int &v)
++{
++  int i;
++  #pragma omp simd aligned(a : 32) reduction(foo:u) reduction(+:v) \
++		   safelen(1)
++  for (i = 0; i < 1024; i++)
++    {
++      int x = a[i];
++      u += x;
++      v += x;
++    }
++}
++
++int
++main ()
++{
++  int i;
++  for (i = 0; i < 1024; i++)
++    a[i] = (i & 31) + (i / 128);
++  int u = 0, v = 0;
++  foo (u, v);
++  if (u != 19456 || v != 19456)
++    abort ();
++  u = 0; v = 0;
++  bar (u, v);
++  if (u != 19456 || v != 19456)
++    abort ();
++}
 Index: libgomp/testsuite/libgomp.c/simd-9.c
 ===================================================================
 --- a/src/libgomp/testsuite/libgomp.c/simd-9.c	(.../tags/gcc_4_9_0_release)
@@ -1994,11 +2056,34 @@ Index: libbacktrace/mmap.c
  	}
        vec->base = base;
        vec->alc = alc - vec->size;
+Index: libjava/classpath
+===================================================================
+--- a/src/libjava/classpath	(.../tags/gcc_4_9_0_release)
++++ b/src/libjava/classpath	(.../branches/gcc-4_9-branch)
+
+Property changes on: libjava/classpath
+___________________________________________________________________
+Modified: svn:mergeinfo
+   Merged /trunk/libjava/classpath:r210668
 Index: libgcc/ChangeLog
 ===================================================================
 --- a/src/libgcc/ChangeLog	(.../tags/gcc_4_9_0_release)
 +++ b/src/libgcc/ChangeLog	(.../branches/gcc-4_9-branch)
-@@ -1,3 +1,19 @@
+@@ -1,3 +1,33 @@
++2014-05-22  Nick Clifton  <nickc@redhat.com>
++
++	* config/msp430/t-msp430 (HOST_LIBGCC2_CFLAGS): Add
++	-mhwmult=none.
++
++2014-05-21  Maciej W. Rozycki  <macro@codesourcery.com>
++
++	Backport from mainline
++	2014-05-21  Maciej W. Rozycki  <macro@codesourcery.com>
++
++	PR libgcc/60166
++	* config/arm/sfp-machine.h (_FP_NANFRAC_H, _FP_NANFRAC_S)
++	(_FP_NANFRAC_D, _FP_NANSIGN_Q): Set the quiet bit.
++
 +2014-05-15  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 +
 +	Backport from mainline
@@ -2074,6 +2159,38 @@ Index: libgcc/config/i386/cygming-crtbegin.c
  #endif /* TARGET_USE_JCR_SECTION */
  
  #if defined(HAVE_LD_RO_RW_SECTION_MIXING)
+Index: libgcc/config/arm/sfp-machine.h
+===================================================================
+--- a/src/libgcc/config/arm/sfp-machine.h	(.../tags/gcc_4_9_0_release)
++++ b/src/libgcc/config/arm/sfp-machine.h	(.../branches/gcc-4_9-branch)
+@@ -21,10 +21,10 @@
+ 
+ /* According to RTABI, QNAN is only with the most significant bit of the
+    significand set, and all other significand bits zero.  */
+-#define _FP_NANFRAC_H		0
+-#define _FP_NANFRAC_S		0
+-#define _FP_NANFRAC_D		0, 0
+-#define _FP_NANFRAC_Q		0, 0, 0, 0
++#define _FP_NANFRAC_H		_FP_QNANBIT_H
++#define _FP_NANFRAC_S		_FP_QNANBIT_S
++#define _FP_NANFRAC_D		_FP_QNANBIT_D, 0
++#define _FP_NANFRAC_Q		_FP_QNANBIT_Q, 0, 0, 0
+ #define _FP_NANSIGN_H		0
+ #define _FP_NANSIGN_S		0
+ #define _FP_NANSIGN_D		0
+Index: libgcc/config/msp430/t-msp430
+===================================================================
+--- a/src/libgcc/config/msp430/t-msp430	(.../tags/gcc_4_9_0_release)
++++ b/src/libgcc/config/msp430/t-msp430	(.../branches/gcc-4_9-branch)
+@@ -42,7 +42,7 @@
+ 	$(srcdir)/config/msp430/floathisf.c \
+ 	$(srcdir)/config/msp430/cmpd.c
+ 
+-HOST_LIBGCC2_CFLAGS += -Os -ffunction-sections -fdata-sections
++HOST_LIBGCC2_CFLAGS += -Os -ffunction-sections -fdata-sections -mhwmult=none
+ 
+ # Local Variables:
+ # mode: Makefile
 Index: gcc/tree-ssa-loop-im.c
 ===================================================================
 --- a/src/gcc/tree-ssa-loop-im.c	(.../tags/gcc_4_9_0_release)
@@ -2300,7 +2417,7 @@ Index: gcc/DATESTAMP
 +++ b/src/gcc/DATESTAMP	(.../branches/gcc-4_9-branch)
 @@ -1 +1 @@
 -20140422
-+20140520
++20140522
 Index: gcc/tree-tailcall.c
 ===================================================================
 --- a/src/gcc/tree-tailcall.c	(.../tags/gcc_4_9_0_release)
@@ -2431,7 +2548,112 @@ Index: gcc/omp-low.c
  }
  
  /* Create a new name for omp child function.  Returns an identifier.  */
-@@ -3803,6 +3809,14 @@
+@@ -2994,6 +3000,27 @@
+   return true;
+ }
+ 
++/* Helper function of lower_rec_input_clauses.  For a reference
++   in simd reduction, add an underlying variable it will reference.  */
++
++static void
++handle_simd_reference (location_t loc, tree new_vard, gimple_seq *ilist)
++{
++  tree z = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (new_vard)));
++  if (TREE_CONSTANT (z))
++    {
++      const char *name = NULL;
++      if (DECL_NAME (new_vard))
++	name = IDENTIFIER_POINTER (DECL_NAME (new_vard));
++
++      z = create_tmp_var_raw (TREE_TYPE (TREE_TYPE (new_vard)), name);
++      gimple_add_tmp_var (z);
++      TREE_ADDRESSABLE (z) = 1;
++      z = build_fold_addr_expr_loc (loc, z);
++      gimplify_assign (new_vard, z, ilist);
++    }
++}
++
+ /* Generate code to implement the input clauses, FIRSTPRIVATE and COPYIN,
+    from the receiver (aka child) side and initializers for REFERENCE_TYPE
+    private variables.  Initialization statements go in ILIST, while calls
+@@ -3185,13 +3212,11 @@
+ 		}
+ 	      else if (TREE_CONSTANT (x))
+ 		{
+-		  /* For reduction with placeholder in SIMD loop,
+-		     defer adding the initialization of the reference,
+-		     because if we decide to use SIMD array for it,
+-		     the initilization could cause expansion ICE.  */
+-		  if (c_kind == OMP_CLAUSE_REDUCTION
+-		      && OMP_CLAUSE_REDUCTION_PLACEHOLDER (c)
+-		      && is_simd)
++		  /* For reduction in SIMD loop, defer adding the
++		     initialization of the reference, because if we decide
++		     to use SIMD array for it, the initilization could cause
++		     expansion ICE.  */
++		  if (c_kind == OMP_CLAUSE_REDUCTION && is_simd)
+ 		    x = NULL_TREE;
+ 		  else
+ 		    {
+@@ -3520,23 +3545,7 @@
+ 		     But if they aren't used, we need to emit the deferred
+ 		     initialization now.  */
+ 		  else if (is_reference (var) && is_simd)
+-		    {
+-		      tree z
+-			= TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (new_vard)));
+-		      if (TREE_CONSTANT (z))
+-			{
+-			  const char *name = NULL;
+-			  if (DECL_NAME (var))
+-			    name = IDENTIFIER_POINTER (DECL_NAME (new_vard));
+-
+-			  z = create_tmp_var_raw
+-				(TREE_TYPE (TREE_TYPE (new_vard)), name);
+-			  gimple_add_tmp_var (z);
+-			  TREE_ADDRESSABLE (z) = 1;
+-			  z = build_fold_addr_expr_loc (clause_loc, z);
+-			  gimplify_assign (new_vard, z, ilist);
+-			}
+-		    }
++		    handle_simd_reference (clause_loc, new_vard, ilist);
+ 		  x = lang_hooks.decls.omp_clause_default_ctor
+ 				(c, new_var, unshare_expr (x));
+ 		  if (x)
+@@ -3569,6 +3578,13 @@
+ 		  if (code == MINUS_EXPR)
+ 		    code = PLUS_EXPR;
+ 
++		  tree new_vard = new_var;
++		  if (is_simd && is_reference (var))
++		    {
++		      gcc_assert (TREE_CODE (new_var) == MEM_REF);
++		      new_vard = TREE_OPERAND (new_var, 0);
++		      gcc_assert (DECL_P (new_vard));
++		    }
+ 		  if (is_simd
+ 		      && lower_rec_simd_input_clauses (new_var, ctx, max_vf,
+ 						       idx, lane, ivar, lvar))
+@@ -3580,9 +3596,18 @@
+ 		      x = build2 (code, TREE_TYPE (ref), ref, ivar);
+ 		      ref = build_outer_var_ref (var, ctx);
+ 		      gimplify_assign (ref, x, &llist[1]);
++
++		      if (new_vard != new_var)
++			{
++			  SET_DECL_VALUE_EXPR (new_vard,
++					       build_fold_addr_expr (lvar));
++			  DECL_HAS_VALUE_EXPR_P (new_vard) = 1;
++			}
+ 		    }
+ 		  else
+ 		    {
++		      if (is_reference (var) && is_simd)
++			handle_simd_reference (clause_loc, new_vard, ilist);
+ 		      gimplify_assign (new_var, x, ilist);
+ 		      if (is_simd)
+ 			{
+@@ -3803,6 +3828,14 @@
  				  OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (c));
  	      OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (c) = NULL;
  	    }
@@ -2446,7 +2668,7 @@ Index: gcc/omp-low.c
  
  	  x = build_outer_var_ref (var, ctx);
  	  if (is_reference (var))
-@@ -5570,6 +5584,12 @@
+@@ -5570,6 +5603,12 @@
      {
        stmt = gimple_build_assign (endvar, iend);
        gsi_insert_after (&gsi, stmt, GSI_CONTINUE_LINKING);
@@ -2459,7 +2681,7 @@ Index: gcc/omp-low.c
      }
    if (fd->collapse > 1)
      expand_omp_for_init_vars (fd, &gsi, counts, inner_stmt, startvar);
-@@ -5986,6 +6006,12 @@
+@@ -5986,6 +6025,12 @@
      {
        stmt = gimple_build_assign (endvar, e);
        gsi_insert_after (&gsi, stmt, GSI_CONTINUE_LINKING);
@@ -2472,7 +2694,7 @@ Index: gcc/omp-low.c
      }
    if (fd->collapse > 1)
      expand_omp_for_init_vars (fd, &gsi, counts, inner_stmt, startvar);
-@@ -6371,6 +6397,12 @@
+@@ -6371,6 +6416,12 @@
      {
        stmt = gimple_build_assign (endvar, e);
        gsi_insert_after (&si, stmt, GSI_CONTINUE_LINKING);
@@ -2485,7 +2707,7 @@ Index: gcc/omp-low.c
      }
    if (fd->collapse > 1)
      expand_omp_for_init_vars (fd, &si, counts, inner_stmt, startvar);
-@@ -11291,45 +11323,53 @@
+@@ -11291,45 +11342,53 @@
  ipa_simd_modify_stmt_ops (tree *tp, int *walk_subtrees, void *data)
  {
    struct walk_stmt_info *wi = (struct walk_stmt_info *) data;
@@ -2568,7 +2790,7 @@ Index: gcc/omp-low.c
      {
        tree vce = build1 (VIEW_CONVERT_EXPR, TREE_TYPE (*tp), repl);
        *tp = vce;
-@@ -11338,8 +11378,6 @@
+@@ -11338,8 +11397,6 @@
      *tp = repl;
  
    info->modified = true;
@@ -2577,7 +2799,7 @@ Index: gcc/omp-low.c
    return NULL_TREE;
  }
  
-@@ -11358,7 +11396,7 @@
+@@ -11358,7 +11415,7 @@
  			       tree retval_array, tree iter)
  {
    basic_block bb;
@@ -2586,7 +2808,7 @@ Index: gcc/omp-low.c
  
    /* Re-use the adjustments array, but this time use it to replace
       every function argument use to an offset into the corresponding
-@@ -11381,6 +11419,46 @@
+@@ -11381,6 +11438,46 @@
  	j += node->simdclone->simdlen / TYPE_VECTOR_SUBPARTS (vectype) - 1;
      }
  
@@ -2633,11 +2855,117 @@ Index: gcc/omp-low.c
    struct modify_stmt_info info;
    info.adjustments = adjustments;
  
+Index: gcc/ipa-inline-transform.c
+===================================================================
+--- a/src/gcc/ipa-inline-transform.c	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/ipa-inline-transform.c	(.../branches/gcc-4_9-branch)
+@@ -214,6 +214,7 @@
+    it is NULL. If UPDATE_OVERALL_SUMMARY is false, do not bother to recompute overall
+    size of caller after inlining. Caller is required to eventually do it via
+    inline_update_overall_summary.
++   If callee_removed is non-NULL, set it to true if we removed callee node.
+ 
+    Return true iff any new callgraph edges were discovered as a
+    result of inlining.  */
+@@ -221,7 +222,8 @@
+ bool
+ inline_call (struct cgraph_edge *e, bool update_original,
+ 	     vec<cgraph_edge_p> *new_edges,
+-	     int *overall_size, bool update_overall_summary)
++	     int *overall_size, bool update_overall_summary,
++	     bool *callee_removed)
+ {
+   int old_size = 0, new_size = 0;
+   struct cgraph_node *to = NULL;
+@@ -260,6 +262,8 @@
+ 	    {
+ 	      next_alias = cgraph_alias_target (alias);
+ 	      cgraph_remove_node (alias);
++	      if (callee_removed)
++		*callee_removed = true;
+ 	      alias = next_alias;
+ 	    }
+ 	  else
 Index: gcc/ChangeLog
 ===================================================================
 --- a/src/gcc/ChangeLog	(.../tags/gcc_4_9_0_release)
 +++ b/src/gcc/ChangeLog	(.../branches/gcc-4_9-branch)
-@@ -1,3 +1,724 @@
+@@ -1,3 +1,799 @@
++2014-05-22  Vladimir Makarov  <vmakarov@redhat.com>
++
++	PR rtl-optimization/60969
++	* ira-costs.c (record_reg_classes): Process NO_REGS for matching
++	constraints.  Set up mem cost for NO_REGS case.
++
++2014-05-22  Peter Bergner  <bergner@vnet.ibm.com>
++
++	* config/rs6000/htm.md (ttest): Use correct shift value to get CR0.
++
++2014-05-22  Richard Earnshaw  <rearnsha@arm.com>
++
++	PR target/61208
++	* arm.md (arm_cmpdi_unsigned): Fix length calculation for Thumb2.
++
++2014-05-22  Nick Clifton  <nickc@redhat.com>
++
++	* config/msp430/msp430.h (ASM_SPEC): Add spaces after inserted
++	options.
++
++2014-05-22  Jakub Jelinek  <jakub@redhat.com>
++
++	* tree-streamer-in.c (unpack_ts_real_cst_value_fields): Make sure
++	all padding bits in REAL_VALUE_TYPE are cleared.
++
++2014-05-21  Guozhi Wei  <carrot@google.com>
++
++	PR target/61202
++	* config/aarch64/arm_neon.h (vqdmulh_n_s16): Change the last operand's
++	constraint.
++	(vqdmulhq_n_s16): Likewise.
++
++2014-05-21  Martin Jambor  <mjambor@suse.cz>
++
++	* doc/invoke.texi (Optimize Options): Document parameters
++	ipa-cp-eval-threshold, ipa-max-agg-items, ipa-cp-loop-hint-bonus and
++	ipa-cp-array-index-hint-bonus.
++
++2014-05-21  Jakub Jelinek  <jakub@redhat.com>
++
++	PR middle-end/61252
++	* omp-low.c (handle_simd_reference): New function.
++	(lower_rec_input_clauses): Use it.  Defer adding reference
++	initialization even for reduction without placeholder if in simd,
++	handle it properly later on.
++
++2014-05-20  Jan Hubicka  <hubicka@ucw.cz>
++
++	PR bootstrap/60984
++	* ipa-inline-transform.c (inline_call): Use add CALLEE_REMOVED parameter.
++	* ipa-inline.c (inline_to_all_callers): If callee was removed; return.
++	(ipa_inline): Loop inline_to_all_callers until no more aliases are removed.
++
++2014-05-20  Jan Hubicka  <hubicka@ucw.cz>
++
++	PR lto/60820
++	* varpool.c (varpool_remove_node): Do not alter decls when streaming.
++
++2014-05-20  DJ Delorie  <dj@redhat.com>
++
++	* config/msp430/msp430.md (split): Don't allow subregs when
++	splitting SImode adds.
++	(andneghi): Fix subtraction logic.
++	* config/msp430/predicates.md (msp430_nonsubreg_or_imm_operand): New.
++
++2014-05-20  Nick Clifton  <nickc@redhat.com>
++
++	* config/msp430/msp430.c (TARGET_GIMPLIFY_VA_ARG_EXPR): Define.
++	(msp430_gimplify_va_arg_expr): New function.
++	(msp430_print_operand): Handle (CONST (ZERO_EXTRACT)).
++
++	* config/msp430/msp430.md (zero_extendpsisi2): Use + constraint on
++	operand 0 in order to prevent confusion about the number of
++	registers involved.
++
 +2014-05-20  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 +
 +	* config/arm/arm.md (arith_shiftsi): Do not predicate for
@@ -3362,7 +3690,7 @@ Index: gcc/ChangeLog
  2014-04-22  Release Manager
  
  	* GCC 4.9.0 released.
-@@ -59,8 +785,7 @@
+@@ -59,8 +860,7 @@
  2014-04-11  Tobias Burnus  <burnus@net-b.de>
  
  	PR other/59055
@@ -3372,7 +3700,7 @@ Index: gcc/ChangeLog
  	* doc/gcc.texi (Service): Update description in the @menu
  	* doc/invoke.texi (Option Summary): Remove misplaced and
  	duplicated @menu.
-@@ -86,15 +811,14 @@
+@@ -86,15 +886,14 @@
  2014-04-11  Jakub Jelinek  <jakub@redhat.com>
  
  	PR rtl-optimization/60663
@@ -3391,7 +3719,7 @@ Index: gcc/ChangeLog
  
  2014-04-10  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
  
-@@ -212,9 +936,10 @@
+@@ -212,9 +1011,10 @@
  
  2014-04-05  Pitchumani Sivanupandi  <Pitchumani.S@atmel.com>
  
@@ -3405,7 +3733,7 @@ Index: gcc/ChangeLog
  	* config/avr/avr-c.c (avr_cpu_cpp_builtins): use dev_attribute to check
  	errata_skip. Add __AVR_ISA_RMW__ builtin macro if RMW ISA available.
  	* config/avr/avr-devices.c (avr_mcu_types): Update AVR_MCU macro for
-@@ -282,21 +1007,21 @@
+@@ -282,21 +1082,21 @@
  2014-04-04  Martin Jambor  <mjambor@suse.cz>
  
  	PR ipa/60640
@@ -3438,7 +3766,7 @@ Index: gcc/ChangeLog
  	moved setting of a lot of flags to set_new_clone_decl_and_node_flags.
  
  2014-04-04  Jeff Law  <law@redhat.com>
-@@ -334,8 +1059,8 @@
+@@ -334,8 +1134,8 @@
  
  	PR tree-optimization/60505
  	* tree-vectorizer.h (struct _stmt_vec_info): Add th field as the
@@ -3449,7 +3777,7 @@ Index: gcc/ChangeLog
  	* tree-vect-loop.c (new_loop_vec_info):
  	Initialize LOOP_VINFO_COST_MODEL_THRESHOLD.
  	* tree-vect-loop.c (vect_analyze_loop_operations):
-@@ -347,8 +1072,7 @@
+@@ -347,8 +1147,7 @@
  
  2014-04-03  Richard Biener  <rguenther@suse.de>
  
@@ -3459,7 +3787,7 @@ Index: gcc/ChangeLog
  	(streamer_tree_cache_create): Adjust.
  	* tree-streamer.c (streamer_tree_cache_add_to_node_array): Adjust
  	to allow optional nodes array.
-@@ -359,8 +1083,7 @@
+@@ -359,8 +1158,7 @@
  	* lto-streamer-out.c (create_output_block): Avoid maintaining
  	the node array in the writer cache.
  	(DFS_write_tree): Remove assertion.
@@ -3469,7 +3797,7 @@ Index: gcc/ChangeLog
  	* lto-streamer-in.c (lto_data_in_create): Adjust for
  	streamer_tree_cache_create prototype change.
  
-@@ -381,24 +1104,6 @@
+@@ -381,24 +1179,6 @@
  	(Weffc++): Remove Scott's numbering, merge lists and reference
  	Wnon-virtual-dtor.
  
@@ -3494,7 +3822,7 @@ Index: gcc/ChangeLog
  2014-04-03  Nick Clifton  <nickc@redhat.com>
  
  	* config/rl78/rl78-expand.md (movqi): Handle (SUBREG (SYMBOL_REF))
-@@ -414,8 +1119,8 @@
+@@ -414,8 +1194,8 @@
  2014-04-02  Jan Hubicka  <hubicka@ucw.cz>
  
  	PR ipa/60659
@@ -3505,7 +3833,7 @@ Index: gcc/ChangeLog
  	(possible_polymorphic_call_targets): For inconsistent contexts
  	return empty complete list.
  
-@@ -519,8 +1224,7 @@
+@@ -519,8 +1299,7 @@
  
  2014-04-01  Richard Biener  <rguenther@suse.de>
  
@@ -4180,6 +4508,25 @@ Index: gcc/testsuite/gcc.target/powerpc/pack02.c
 +
 +  return 0;
 +}
+Index: gcc/testsuite/gcc.target/powerpc/htm-ttest.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/htm-ttest.c	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/testsuite/gcc.target/powerpc/htm-ttest.c	(.../branches/gcc-4_9-branch)
+@@ -0,0 +1,14 @@
++/* { dg-do compile { target { powerpc*-*-* } } } */
++/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
++/* { dg-require-effective-target powerpc_htm_ok } */
++/* { dg-options "-O2 -mhtm" } */
++
++/* { dg-final { scan-assembler "rlwinm r?\[0-9\]+,r?\[0-9\]+,3,30,31" { target { ilp32 } } } } */
++/* { dg-final { scan-assembler "rldicl r?\[0-9\]+,r?\[0-9\]+,35,62" { target { lp64 } } } } */
++
++#include <htmintrin.h>
++long
++ttest (void)
++{
++  return _HTM_STATE(__builtin_ttest());
++}
 Index: gcc/testsuite/gcc.target/powerpc/pack03.c
 ===================================================================
 --- a/src/gcc/testsuite/gcc.target/powerpc/pack03.c	(.../tags/gcc_4_9_0_release)
@@ -5518,7 +5865,21 @@ Index: gcc/testsuite/ChangeLog
 ===================================================================
 --- a/src/gcc/testsuite/ChangeLog	(.../tags/gcc_4_9_0_release)
 +++ b/src/gcc/testsuite/ChangeLog	(.../branches/gcc-4_9-branch)
-@@ -1,3 +1,327 @@
+@@ -1,3 +1,341 @@
++2014-05-22  Peter Bergner  <bergner@vnet.ibm.com>
++
++	* gcc.target/powerpc/htm-ttest.c: New test.
++
++2014-05-21  Igor Zamyatin  <igor.zamyatin@intel.com>
++
++	PR c++/60189
++	* c-c++-common/cilk-plus/CK/invalid_sync.cc: New test.
++
++2014-05-18  Jan Hubicka  <hubicka@ucw.cz>
++
++	PR middle-end/58094
++	* g++.dg/ipa/devirt-11.C: Be lax about number of devirtualizations.
++
 +2014-05-18  Eric Botcazou  <ebotcazou@adacore.com>
 +
 +	* gnat.dg/enum3.adb: New test.
@@ -5846,7 +6207,7 @@ Index: gcc/testsuite/ChangeLog
  2014-04-22  Release Manager
  
  	* GCC 4.9.0 released.
-@@ -51,7 +375,7 @@
+@@ -51,7 +389,7 @@
  2014-04-12  Jerry DeLisle  <jvdelisle@gcc.gnu>
  
  	PR libfortran/60810
@@ -5855,7 +6216,7 @@ Index: gcc/testsuite/ChangeLog
  
  2014-04-11  Steve Ellcey  <sellcey@mips.com>
  	    Jakub Jelinek  <jakub@redhat.com>
-@@ -135,8 +459,7 @@
+@@ -135,8 +473,7 @@
  
  2014-04-08  Jason Merrill  <jason@redhat.com>
  
@@ -5865,7 +6226,7 @@ Index: gcc/testsuite/ChangeLog
  
  2014-04-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  
-@@ -256,10 +579,10 @@
+@@ -256,10 +593,10 @@
  2014-04-04  Martin Jambor  <mjambor@suse.cz>
  
  	PR ipa/60640
@@ -5880,7 +6241,7 @@ Index: gcc/testsuite/ChangeLog
  
  2014-04-04  Jeff Law  <law@redhat.com>
  
-@@ -371,7 +694,7 @@
+@@ -371,7 +708,7 @@
  
  2014-04-01  Fabien Chêne  <fabien@gcc.gnu.org>
  
@@ -5889,7 +6250,7 @@ Index: gcc/testsuite/ChangeLog
  	* g++.dg/init/ctor4-1.C: New.
  	* g++.dg/cpp0x/defaulted2.C: Adjust.
  
-@@ -459,8 +782,8 @@
+@@ -459,8 +796,8 @@
  
  2014-03-27  Jeff Law  <law@redhat.com>
  
@@ -5900,7 +6261,7 @@ Index: gcc/testsuite/ChangeLog
  
  2014-03-28  Adam Butcher  <adam@jessamine.co.uk>
  
-@@ -493,14 +816,13 @@
+@@ -493,14 +830,13 @@
  
  2014-03-28  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  
@@ -5918,7 +6279,7 @@ Index: gcc/testsuite/ChangeLog
  	of second source operand.
  	* gcc.target/i386/avx512f-vshuff64x2-2.c: Ditto.
  	* gcc.target/i386/avx512f-vshufi32x4-2.c: Ditto.
-@@ -635,8 +957,8 @@
+@@ -635,8 +971,8 @@
  
  2014-03-24  Marek Polacek  <polacek@redhat.com>
  
@@ -5929,7 +6290,7 @@ Index: gcc/testsuite/ChangeLog
  	* c-c++-common/ubsan/overflow-1.c: Check for unwanted output.
  	* c-c++-common/ubsan/overflow-add-1.c: Likewise.
  	* c-c++-common/ubsan/overflow-mul-1.c: Likewise.
-@@ -721,8 +1043,7 @@
+@@ -721,8 +1057,7 @@
  2014-03-21  Tobias Burnus  <burnus@net-b.de>
  
  	PR fortran/60599
@@ -5939,7 +6300,7 @@ Index: gcc/testsuite/ChangeLog
  
  2014-03-20  Jakub Jelinek  <jakub@redhat.com>
  
-@@ -1540,8 +1861,7 @@
+@@ -1540,8 +1875,7 @@
  
  2014-02-19  Paul Pluzhnikov  <ppluzhnikov@google.com>
  
@@ -5949,7 +6310,7 @@ Index: gcc/testsuite/ChangeLog
  
  2014-02-19  Jakub Jelinek  <jakub@redhat.com>
  
-@@ -1850,8 +2170,7 @@
+@@ -1850,8 +2184,7 @@
  
  2014-02-10  Jakub Jelinek  <jakub@redhat.com>
  
@@ -5959,7 +6320,7 @@ Index: gcc/testsuite/ChangeLog
  
  2014-02-09  Paul Thomas  <pault@gcc.gnu.org>
  
-@@ -3098,8 +3417,8 @@
+@@ -3098,8 +3431,8 @@
  	* gfortran.dg/vect/fast-math-mgrid-resid.f: Change
  	-fdump-tree-optimized to -fdump-tree-pcom-details in dg-options and
  	cleanup-tree-dump from optimized to pcom.  Remove scan-tree-dump-times
@@ -6511,8 +6872,22 @@ Index: gcc/testsuite/g++.dg/ipa/devirt-11.C
     and two to fn3. While doing so the new symbol for fn2 needs to be
     introduced.  */
 -/* { dg-final { scan-ipa-dump-times "Discovered a virtual call to a known target" 3 "inline"  } } */
-+/* { dg-final { scan-ipa-dump-times "Discovered a virtual call to a known target" 1 "inline"  } } */
++/* { dg-final { scan-ipa-dump "Discovered a virtual call to a known target" "inline"  } } */
  /* { dg-final { cleanup-ipa-dump "inline" } } */
+Index: gcc/testsuite/c-c++-common/cilk-plus/CK/invalid_sync.cc
+===================================================================
+--- a/src/gcc/testsuite/c-c++-common/cilk-plus/CK/invalid_sync.cc	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/testsuite/c-c++-common/cilk-plus/CK/invalid_sync.cc	(.../branches/gcc-4_9-branch)
+@@ -0,0 +1,9 @@
++/* PR c/60189 */
++/* { dg-do compile } */
++/* { dg-options "-fcilkplus" } */
++
++int main (void)
++{
++    _Cilk_sync return; /* { dg-error " expected ';' before 'return'" } */
++    return 0;
++}
 Index: gcc/testsuite/c-c++-common/torture/pr60971.c
 ===================================================================
 --- a/src/gcc/testsuite/c-c++-common/torture/pr60971.c	(.../tags/gcc_4_9_0_release)
@@ -6750,7 +7125,15 @@ Index: gcc/cp/ChangeLog
 ===================================================================
 --- a/src/gcc/cp/ChangeLog	(.../tags/gcc_4_9_0_release)
 +++ b/src/gcc/cp/ChangeLog	(.../branches/gcc-4_9-branch)
-@@ -1,3 +1,54 @@
+@@ -1,3 +1,62 @@
++2014-05-21  Igor Zamyatin  <igor.zamyatin@intel.com>
++
++	PR c/60189
++	* parser.c (cp_parser_postfix_expression): Move handling of cilk_sync
++	from here to...
++	(cp_parser_statement): ...here. Make sure only semicolon can go after
++	Cilk_sync.
++
 +2014-05-13  Jason Merrill  <jason@redhat.com>
 +
 +	PR c++/61151
@@ -7043,7 +7426,53 @@ Index: gcc/cp/parser.c
 ===================================================================
 --- a/src/gcc/cp/parser.c	(.../tags/gcc_4_9_0_release)
 +++ b/src/gcc/cp/parser.c	(.../branches/gcc-4_9-branch)
-@@ -28530,6 +28530,20 @@
+@@ -5835,20 +5835,6 @@
+ 	  }
+ 	break;
+       }
+-      
+-    case RID_CILK_SYNC:
+-      if (flag_cilkplus)
+-	{ 
+-	  tree sync_expr = build_cilk_sync ();
+-	  SET_EXPR_LOCATION (sync_expr, 
+-			     cp_lexer_peek_token (parser->lexer)->location);
+-	  finish_expr_stmt (sync_expr);
+-	}
+-      else
+-	error_at (token->location, "-fcilkplus must be enabled to use" 
+-		  " %<_Cilk_sync%>");
+-      cp_lexer_consume_token (parser->lexer);
+-      break;
+ 
+     case RID_BUILTIN_SHUFFLE:
+       {
+@@ -9400,6 +9386,24 @@
+ 	  statement = cp_parser_jump_statement (parser);
+ 	  break;
+ 
++	case RID_CILK_SYNC:
++	  cp_lexer_consume_token (parser->lexer);
++	  if (flag_cilkplus)
++	    {
++	      tree sync_expr = build_cilk_sync ();
++	      SET_EXPR_LOCATION (sync_expr,
++				 token->location);
++	      statement = finish_expr_stmt (sync_expr);
++	    }
++	  else
++	    {
++	      error_at (token->location, "-fcilkplus must be enabled to use"
++			" %<_Cilk_sync%>");
++	      statement = error_mark_node;
++	    }
++	  cp_parser_require (parser, CPP_SEMICOLON, RT_SEMICOLON);
++	  break;
++
+ 	  /* Objective-C++ exception-handling constructs.  */
+ 	case RID_AT_TRY:
+ 	case RID_AT_CATCH:
+@@ -28530,6 +28534,20 @@
        tree id = cp_lexer_peek_token (parser->lexer)->u.value;
        const char *p = IDENTIFIER_POINTER (id);
  
@@ -7064,7 +7493,7 @@ Index: gcc/cp/parser.c
        if (!strcmp (p, "read"))
  	code = OMP_ATOMIC_READ;
        else if (!strcmp (p, "write"))
-@@ -28543,16 +28557,22 @@
+@@ -28543,16 +28561,22 @@
        if (p)
  	cp_lexer_consume_token (parser->lexer);
      }
@@ -7094,7 +7523,7 @@ Index: gcc/cp/parser.c
  	}
      }
    cp_parser_require_pragma_eol (parser, pragma_tok);
-@@ -29825,10 +29845,12 @@
+@@ -29825,10 +29849,12 @@
  	return cp_parser_omp_for (parser, pragma_tok, p_name, mask, cclauses);
        block = begin_omp_parallel ();
        save = cp_parser_begin_omp_structured_block (parser);
@@ -7318,6 +7747,66 @@ Index: gcc/loop-init.c
      }
  
    /* Apply flags to loops.  */
+Index: gcc/ipa-inline.c
+===================================================================
+--- a/src/gcc/ipa-inline.c	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/ipa-inline.c	(.../branches/gcc-4_9-branch)
+@@ -1961,6 +1961,8 @@
+ inline_to_all_callers (struct cgraph_node *node, void *data)
+ {
+   int *num_calls = (int *)data;
++  bool callee_removed = false;
++
+   while (node->callers && !node->global.inlined_to)
+     {
+       struct cgraph_node *caller = node->callers->caller;
+@@ -1977,7 +1979,7 @@
+ 		   inline_summary (node->callers->caller)->size);
+ 	}
+ 
+-      inline_call (node->callers, true, NULL, NULL, true);
++      inline_call (node->callers, true, NULL, NULL, true, &callee_removed);
+       if (dump_file)
+ 	fprintf (dump_file,
+ 		 " Inlined into %s which now has %i size\n",
+@@ -1987,8 +1989,10 @@
+ 	{
+ 	  if (dump_file)
+ 	    fprintf (dump_file, "New calls found; giving up.\n");
+-	  return true;
++	  return callee_removed;
+ 	}
++      if (callee_removed)
++	return true;
+     }
+   return false;
+ }
+@@ -2107,8 +2111,9 @@
+ 	      int num_calls = 0;
+ 	      cgraph_for_node_and_aliases (node, sum_callers,
+ 					   &num_calls, true);
+-	      cgraph_for_node_and_aliases (node, inline_to_all_callers,
+-					   &num_calls, true);
++	      while (cgraph_for_node_and_aliases (node, inline_to_all_callers,
++					          &num_calls, true))
++		;
+ 	      remove_functions = true;
+ 	    }
+ 	}
+Index: gcc/ipa-inline.h
+===================================================================
+--- a/src/gcc/ipa-inline.h	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/ipa-inline.h	(.../branches/gcc-4_9-branch)
+@@ -234,7 +234,8 @@
+ bool speculation_useful_p (struct cgraph_edge *e, bool anticipate_inlining);
+ 
+ /* In ipa-inline-transform.c  */
+-bool inline_call (struct cgraph_edge *, bool, vec<cgraph_edge_p> *, int *, bool);
++bool inline_call (struct cgraph_edge *, bool, vec<cgraph_edge_p> *, int *, bool,
++		  bool *callee_removed = NULL);
+ unsigned int inline_transform (struct cgraph_node *);
+ void clone_inlined_nodes (struct cgraph_edge *e, bool, bool, int *,
+ 			  int freq_scale);
 Index: gcc/go/gofrontend/types.h
 ===================================================================
 --- a/src/gcc/go/gofrontend/types.h	(.../tags/gcc_4_9_0_release)
@@ -9011,6 +9500,37 @@ Index: gcc/cfgexpand.c
  
  	  var_end_seq
  	    = asan_emit_stack_protection (virtual_stack_vars_rtx,
+Index: gcc/lto/ChangeLog
+===================================================================
+--- a/src/gcc/lto/ChangeLog	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/lto/ChangeLog	(.../branches/gcc-4_9-branch)
+@@ -1,3 +1,8 @@
++2014-04-22  Jan Hubicka  <hubicka@ucw.cz>
++
++	PR lto/61012
++	* lto-symtab.c (lto_symtab_merge_decls_1):
++
+ 2014-04-22  Release Manager
+ 
+ 	* GCC 4.9.0 released.
+Index: gcc/lto/lto-symtab.c
+===================================================================
+--- a/src/gcc/lto/lto-symtab.c	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/lto/lto-symtab.c	(.../branches/gcc-4_9-branch)
+@@ -453,7 +453,12 @@
+      cgraph or a varpool node.  */
+   if (!prevailing)
+     {
+-      prevailing = first;
++      for (prevailing = first;
++	   prevailing; prevailing = prevailing->next_sharing_asm_name)
++	if (lto_symtab_symbol_p (prevailing))
++	  break;
++      if (!prevailing)
++	return;
+       /* For variables chose with a priority variant with vnode
+ 	 attached (i.e. from unit where external declaration of
+ 	 variable is actually used).
 Index: gcc/ipa-prop.c
 ===================================================================
 --- a/src/gcc/ipa-prop.c	(.../tags/gcc_4_9_0_release)
@@ -20234,7 +20754,114 @@ Index: gcc/ira-costs.c
 ===================================================================
 --- a/src/gcc/ira-costs.c	(.../tags/gcc_4_9_0_release)
 +++ b/src/gcc/ira-costs.c	(.../branches/gcc-4_9-branch)
-@@ -762,10 +762,11 @@
+@@ -407,6 +407,8 @@
+   int alt;
+   int i, j, k;
+   int insn_allows_mem[MAX_RECOG_OPERANDS];
++  move_table *move_in_cost, *move_out_cost;
++  short (*mem_cost)[2];
+ 
+   for (i = 0; i < n_ops; i++)
+     insn_allows_mem[i] = 0;
+@@ -517,42 +519,79 @@
+ 		  bool in_p = recog_data.operand_type[i] != OP_OUT;
+ 		  bool out_p = recog_data.operand_type[i] != OP_IN;
+ 		  enum reg_class op_class = classes[i];
+-		  move_table *move_in_cost, *move_out_cost;
+ 
+ 		  ira_init_register_move_cost_if_necessary (mode);
+ 		  if (! in_p)
+ 		    {
+ 		      ira_assert (out_p);
+-		      move_out_cost = ira_may_move_out_cost[mode];
+-		      for (k = cost_classes_ptr->num - 1; k >= 0; k--)
++		      if (op_class == NO_REGS)
+ 			{
+-			  rclass = cost_classes[k];
+-			  pp_costs[k]
+-			    = move_out_cost[op_class][rclass] * frequency;
++			  mem_cost = ira_memory_move_cost[mode];
++			  for (k = cost_classes_ptr->num - 1; k >= 0; k--)
++			    {
++			      rclass = cost_classes[k];
++			      pp_costs[k] = mem_cost[rclass][0] * frequency;
++			    }
+ 			}
++		      else
++			{
++			  move_out_cost = ira_may_move_out_cost[mode];
++			  for (k = cost_classes_ptr->num - 1; k >= 0; k--)
++			    {
++			      rclass = cost_classes[k];
++			      pp_costs[k]
++				= move_out_cost[op_class][rclass] * frequency;
++			    }
++			}
+ 		    }
+ 		  else if (! out_p)
+ 		    {
+ 		      ira_assert (in_p);
+-		      move_in_cost = ira_may_move_in_cost[mode];
+-		      for (k = cost_classes_ptr->num - 1; k >= 0; k--)
++		      if (op_class == NO_REGS)
+ 			{
+-			  rclass = cost_classes[k];
+-			  pp_costs[k]
+-			    = move_in_cost[rclass][op_class] * frequency;
++			  mem_cost = ira_memory_move_cost[mode];
++			  for (k = cost_classes_ptr->num - 1; k >= 0; k--)
++			    {
++			      rclass = cost_classes[k];
++			      pp_costs[k] = mem_cost[rclass][1] * frequency;
++			    }
+ 			}
++		      else
++			{
++			  move_in_cost = ira_may_move_in_cost[mode];
++			  for (k = cost_classes_ptr->num - 1; k >= 0; k--)
++			    {
++			      rclass = cost_classes[k];
++			      pp_costs[k]
++				= move_in_cost[rclass][op_class] * frequency;
++			    }
++			}
+ 		    }
+ 		  else
+ 		    {
+-		      move_in_cost = ira_may_move_in_cost[mode];
+-		      move_out_cost = ira_may_move_out_cost[mode];
+-		      for (k = cost_classes_ptr->num - 1; k >= 0; k--)
++		      if (op_class == NO_REGS)
+ 			{
+-			  rclass = cost_classes[k];
+-			  pp_costs[k] = ((move_in_cost[rclass][op_class]
+-					  + move_out_cost[op_class][rclass])
+-					 * frequency);
++			  mem_cost = ira_memory_move_cost[mode];
++			  for (k = cost_classes_ptr->num - 1; k >= 0; k--)
++			    {
++			      rclass = cost_classes[k];
++			      pp_costs[k] = ((mem_cost[rclass][0]
++					      + mem_cost[rclass][1])
++					     * frequency);
++			    }
+ 			}
++		      else
++			{
++			  move_in_cost = ira_may_move_in_cost[mode];
++			  move_out_cost = ira_may_move_out_cost[mode];
++			  for (k = cost_classes_ptr->num - 1; k >= 0; k--)
++			    {
++			      rclass = cost_classes[k];
++			      pp_costs[k] = ((move_in_cost[rclass][op_class]
++					      + move_out_cost[op_class][rclass])
++					     * frequency);
++			    }
++			}
+ 		    }
+ 
+ 		  /* If the alternative actually allows memory, make
+@@ -762,10 +801,11 @@
  	     into that class.  */
  	  if (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER)
  	    {
@@ -20248,11 +20875,11 @@ Index: gcc/ira-costs.c
  
  		     Otherwise we may perform an uninitialized read
  		     from this_op_costs after the `continue' statement
-@@ -783,50 +784,90 @@
+@@ -782,51 +822,94 @@
+ 		  bool in_p = recog_data.operand_type[i] != OP_OUT;
  		  bool out_p = recog_data.operand_type[i] != OP_IN;
  		  enum reg_class op_class = classes[i];
- 		  move_table *move_in_cost, *move_out_cost;
-+		  short (*mem_cost)[2];
+-		  move_table *move_in_cost, *move_out_cost;
  
  		  ira_init_register_move_cost_if_necessary (mode);
  		  if (! in_p)
@@ -20345,14 +20972,22 @@ Index: gcc/ira-costs.c
 +			}
  		    }
  
- 		  /* If the alternative actually allows memory, make
- 		     things a bit cheaper since we won't need an extra
- 		     insn to load it.  */
+-		  /* If the alternative actually allows memory, make
+-		     things a bit cheaper since we won't need an extra
+-		     insn to load it.  */
 -		  pp->mem_cost
 -		    = ((out_p ? ira_memory_move_cost[mode][op_class][0] : 0)
 -		       + (in_p ? ira_memory_move_cost[mode][op_class][1] : 0)
 -		       - allows_mem[i]) * frequency;
-+		  if (op_class != NO_REGS)
++		  if (op_class == NO_REGS)
++		    /* Although we don't need insn to reload from
++		       memory, still accessing memory is usually more
++		       expensive than a register.  */
++		    pp->mem_cost = frequency;
++		  else
++		    /* If the alternative actually allows memory, make
++		       things a bit cheaper since we won't need an
++		       extra insn to load it.  */
 +		    pp->mem_cost
 +		      = ((out_p ? ira_memory_move_cost[mode][op_class][0] : 0)
 +			 + (in_p ? ira_memory_move_cost[mode][op_class][1] : 0)
@@ -20360,7 +20995,7 @@ Index: gcc/ira-costs.c
  		  /* If we have assigned a class to this allocno in
  		     our first pass, add a cost to this alternative
  		     corresponding to what we would add if this
-@@ -836,15 +877,28 @@
+@@ -836,15 +919,28 @@
  		      enum reg_class pref_class = pref[COST_INDEX (REGNO (op))];
  
  		      if (pref_class == NO_REGS)
@@ -20418,6 +21053,20 @@ Index: gcc/tree-inline.c
  	}
        if ((TREE_CODE (TREE_TYPE (result)) == COMPLEX_TYPE
             || TREE_CODE (TREE_TYPE (result)) == VECTOR_TYPE)
+Index: gcc/tree-streamer-in.c
+===================================================================
+--- a/src/gcc/tree-streamer-in.c	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/tree-streamer-in.c	(.../branches/gcc-4_9-branch)
+@@ -167,6 +167,9 @@
+   REAL_VALUE_TYPE r;
+   REAL_VALUE_TYPE *rp;
+ 
++  /* Clear all bits of the real value type so that we can later do
++     bitwise comparisons to see if two values are the same.  */
++  memset (&r, 0, sizeof r);
+   r.cl = (unsigned) bp_unpack_value (bp, 2);
+   r.decimal = (unsigned) bp_unpack_value (bp, 1);
+   r.sign = (unsigned) bp_unpack_value (bp, 1);
 Index: gcc/symtab.c
 ===================================================================
 --- a/src/gcc/symtab.c	(.../tags/gcc_4_9_0_release)
@@ -21544,6 +22193,28 @@ Index: gcc/config/avr/avr.c
            break;
          }
  
+Index: gcc/config/aarch64/arm_neon.h
+===================================================================
+--- a/src/gcc/config/aarch64/arm_neon.h	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/config/aarch64/arm_neon.h	(.../branches/gcc-4_9-branch)
+@@ -10111,7 +10111,7 @@
+   int16x4_t result;
+   __asm__ ("sqdmulh %0.4h,%1.4h,%2.h[0]"
+            : "=w"(result)
+-           : "w"(a), "w"(b)
++           : "w"(a), "x"(b)
+            : /* No clobbers */);
+   return result;
+ }
+@@ -10133,7 +10133,7 @@
+   int16x8_t result;
+   __asm__ ("sqdmulh %0.8h,%1.8h,%2.h[0]"
+            : "=w"(result)
+-           : "w"(a), "w"(b)
++           : "w"(a), "x"(b)
+            : /* No clobbers */);
+   return result;
+ }
 Index: gcc/config/aarch64/aarch64.h
 ===================================================================
 --- a/src/gcc/config/aarch64/aarch64.h	(.../tags/gcc_4_9_0_release)
@@ -21615,6 +22286,19 @@ Index: gcc/config/rs6000/predicates.md
      ret = 0;
  
    else if (!memory_operand (op, mode))
+Index: gcc/config/rs6000/htm.md
+===================================================================
+--- a/src/gcc/config/rs6000/htm.md	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/config/rs6000/htm.md	(.../branches/gcc-4_9-branch)
+@@ -179,7 +179,7 @@
+ 			     (const_int 0)]
+ 			    UNSPECV_HTM_TABORTWCI))
+    (set (subreg:CC (match_dup 2) 0) (match_dup 1))
+-   (set (match_dup 3) (lshiftrt:SI (match_dup 2) (const_int 24)))
++   (set (match_dup 3) (lshiftrt:SI (match_dup 2) (const_int 28)))
+    (parallel [(set (match_operand:SI 0 "int_reg_operand" "")
+ 		   (and:SI (match_dup 3) (const_int 15)))
+               (clobber (scratch:CC))])]
 Index: gcc/config/rs6000/htmxlintrin.h
 ===================================================================
 --- a/src/gcc/config/rs6000/htmxlintrin.h	(.../tags/gcc_4_9_0_release)
@@ -22798,6 +23482,30 @@ Index: gcc/config/arm/arm.md
 ===================================================================
 --- a/src/gcc/config/arm/arm.md	(.../tags/gcc_4_9_0_release)
 +++ b/src/gcc/config/arm/arm.md	(.../branches/gcc-4_9-branch)
+@@ -8349,8 +8349,8 @@
+ 
+ (define_insn_and_split "*arm_cmpdi_unsigned"
+   [(set (reg:CC_CZ CC_REGNUM)
+-        (compare:CC_CZ (match_operand:DI 0 "s_register_operand" "l,r,r")
+-                       (match_operand:DI 1 "arm_di_operand"     "Py,r,rDi")))]
++        (compare:CC_CZ (match_operand:DI 0 "s_register_operand" "l,r,r,r")
++                       (match_operand:DI 1 "arm_di_operand"     "Py,r,Di,rDi")))]
+ 
+   "TARGET_32BIT"
+   "#"   ; "cmp\\t%R0, %R1\;it eq\;cmpeq\\t%Q0, %Q1"
+@@ -8370,9 +8370,9 @@
+     operands[1] = gen_lowpart (SImode, operands[1]);
+   }
+   [(set_attr "conds" "set")
+-   (set_attr "enabled_for_depr_it" "yes,yes,no")
+-   (set_attr "arch" "t2,t2,*")
+-   (set_attr "length" "6,6,8")
++   (set_attr "enabled_for_depr_it" "yes,yes,no,*")
++   (set_attr "arch" "t2,t2,t2,a")
++   (set_attr "length" "6,6,10,8")
+    (set_attr "type" "multiple")]
+ )
+ 
 @@ -9860,6 +9860,7 @@
    "TARGET_32BIT"
    "%i1%?\\t%0, %2, %4%S3"
@@ -22866,11 +23574,66 @@ Index: gcc/config/msp430/msp430-protos.h
 +bool    msp430_use_f5_series_hwmult (void);
  
  #endif /* GCC_MSP430_PROTOS_H */
+Index: gcc/config/msp430/predicates.md
+===================================================================
+--- a/src/gcc/config/msp430/predicates.md	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/config/msp430/predicates.md	(.../branches/gcc-4_9-branch)
+@@ -73,6 +73,10 @@
+ (define_predicate "msp430_nonsubreg_operand"
+   (match_code "reg,mem"))
+ 
++(define_predicate "msp430_nonsubreg_or_imm_operand"
++  (ior (match_operand 0 "msp430_nonsubreg_operand")
++       (match_operand 0 "immediate_operand")))
++
+ ; TRUE for constants which are bit positions for zero_extract
+ (define_predicate "msp430_bitpos"
+   (and (match_code "const_int")
 Index: gcc/config/msp430/msp430.md
 ===================================================================
 --- a/src/gcc/config/msp430/msp430.md	(.../tags/gcc_4_9_0_release)
 +++ b/src/gcc/config/msp430/msp430.md	(.../branches/gcc-4_9-branch)
-@@ -1321,12 +1321,12 @@
+@@ -362,8 +362,8 @@
+ ; halves.
+ (define_split
+   [(set (match_operand:SI          0 "msp430_nonsubreg_operand")
+-	(plus:SI (match_operand:SI 1 "nonimmediate_operand")
+-		 (match_operand:SI 2 "general_operand")))
++	(plus:SI (match_operand:SI 1 "msp430_nonsubreg_operand")
++		 (match_operand:SI 2 "msp430_nonsubreg_or_imm_operand")))
+    ]
+   ""
+   [(parallel [(set (match_operand:HI 3 "nonimmediate_operand" "=&rm")
+@@ -609,9 +609,15 @@
+ ; when the PSI value is negative..
+ ;
+ ; Note: using PUSHM.A #1 is two bytes smaller than using PUSHX.A....
++;
++; Note: We use a + constraint on operand 0 as otherwise GCC gets confused
++; about extending a single PSI mode register into a pair of SImode registers
++; with the same starting register.  It thinks that the upper register of
++; the pair is unused and so it can clobber it.  Try compiling 20050826-2.c
++; at -O2 to see this.
+ 
+ (define_insn "zero_extendpsisi2"
+-  [(set (match_operand:SI                  0 "register_operand" "=r")
++  [(set (match_operand:SI                  0 "register_operand" "+r")
+ 	(zero_extend:SI (match_operand:PSI 1 "register_operand" "r")))]
+   ""
+   "*
+@@ -1311,9 +1317,9 @@
+   ""
+   "*
+     if (REGNO (operands[0]) != REGNO (operands[1]))
+-      return \"MOV.W\t%1, %0 { SUB.W\t#0, %0 { AND.W\t%2, %0\";
++      return \"MOV.W\t%1, %0 { INV.W\t%0 { INC.W\t%0 { AND.W\t%2, %0\";
+     else
+-      return \"SUB.W\t#0, %0 { AND.W\t%2, %0\";
++      return \"INV.W\t%0 { INC.W\t%0 { AND.W\t%2, %0\";
+   "
+   )
+ 
+@@ -1321,12 +1327,12 @@
    [(set (match_operand:SI                          0 "register_operand" "=r")
  	(mult:SI (sign_extend:SI (match_operand:HI 1 "register_operand" "%0"))
  		 (sign_extend:SI (match_operand:HI 2 "register_operand" "r"))))]
@@ -22887,7 +23650,7 @@ Index: gcc/config/msp430/msp430.md
    "
  )
  
-@@ -1334,12 +1334,12 @@
+@@ -1334,12 +1340,12 @@
    [(set (match_operand:SI                          0 "register_operand" "=r")
  	(mult:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "%0"))
  		 (zero_extend:SI (match_operand:HI 2 "register_operand" "r"))))]
@@ -22904,7 +23667,7 @@ Index: gcc/config/msp430/msp430.md
    "
  )
  
-@@ -1347,12 +1347,12 @@
+@@ -1347,12 +1353,12 @@
    [(set (match_operand:DI                          0 "register_operand" "=r")
  	(mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "%0"))
  		 (sign_extend:DI (match_operand:SI 2 "register_operand" "r"))))]
@@ -22921,7 +23684,7 @@ Index: gcc/config/msp430/msp430.md
    "
  )
  
-@@ -1360,11 +1360,11 @@
+@@ -1360,11 +1366,11 @@
    [(set (match_operand:DI                          0 "register_operand" "=r")
  	(mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "%0"))
  		 (zero_extend:DI (match_operand:SI 2 "register_operand" "r"))))]
@@ -23017,7 +23780,105 @@ Index: gcc/config/msp430/msp430.c
        /* It is not an error if we do not match the MCU name.  There are
  	 hundreds of them.  */
      }
-@@ -1847,16 +1817,20 @@
+@@ -760,6 +730,97 @@
+ {
+   return Pmode;
+ }
++
++#undef  TARGET_GIMPLIFY_VA_ARG_EXPR
++#define TARGET_GIMPLIFY_VA_ARG_EXPR msp430_gimplify_va_arg_expr
++
++#include "gimplify.h"
++#include "gimple-expr.h"
++
++static tree
++msp430_gimplify_va_arg_expr (tree valist, tree type, gimple_seq *pre_p,
++			  gimple_seq *post_p)
++{
++  tree addr, t, type_size, rounded_size, valist_tmp;
++  unsigned HOST_WIDE_INT align, boundary;
++  bool indirect;
++
++  indirect = pass_by_reference (NULL, TYPE_MODE (type), type, false);
++  if (indirect)
++    type = build_pointer_type (type);
++
++  align = PARM_BOUNDARY / BITS_PER_UNIT;
++  boundary = targetm.calls.function_arg_boundary (TYPE_MODE (type), type);
++
++  /* When we align parameter on stack for caller, if the parameter
++     alignment is beyond MAX_SUPPORTED_STACK_ALIGNMENT, it will be
++     aligned at MAX_SUPPORTED_STACK_ALIGNMENT.  We will match callee
++     here with caller.  */
++  if (boundary > MAX_SUPPORTED_STACK_ALIGNMENT)
++    boundary = MAX_SUPPORTED_STACK_ALIGNMENT;
++
++  boundary /= BITS_PER_UNIT;
++
++  /* Hoist the valist value into a temporary for the moment.  */
++  valist_tmp = get_initialized_tmp_var (valist, pre_p, NULL);
++
++  /* va_list pointer is aligned to PARM_BOUNDARY.  If argument actually
++     requires greater alignment, we must perform dynamic alignment.  */
++  if (boundary > align
++      && !integer_zerop (TYPE_SIZE (type)))
++    {
++      /* FIXME: This is where this function diverts from targhooks.c:
++	 std_gimplify_va_arg_expr().  It works, but I do not know why...  */
++      if (! POINTER_TYPE_P (type))
++	{
++	  t = build2 (MODIFY_EXPR, TREE_TYPE (valist), valist_tmp,
++		      fold_build_pointer_plus_hwi (valist_tmp, boundary - 1));
++	  gimplify_and_add (t, pre_p);
++
++	  t = build2 (MODIFY_EXPR, TREE_TYPE (valist), valist_tmp,
++		      fold_build2 (BIT_AND_EXPR, TREE_TYPE (valist),
++				   valist_tmp,
++				   build_int_cst (TREE_TYPE (valist), -boundary)));
++	  gimplify_and_add (t, pre_p);
++	}
++    }
++  else
++    boundary = align;
++
++  /* If the actual alignment is less than the alignment of the type,
++     adjust the type accordingly so that we don't assume strict alignment
++     when dereferencing the pointer.  */
++  boundary *= BITS_PER_UNIT;
++  if (boundary < TYPE_ALIGN (type))
++    {
++      type = build_variant_type_copy (type);
++      TYPE_ALIGN (type) = boundary;
++    }
++
++  /* Compute the rounded size of the type.  */
++  type_size = size_in_bytes (type);
++  rounded_size = round_up (type_size, align);
++
++  /* Reduce rounded_size so it's sharable with the postqueue.  */
++  gimplify_expr (&rounded_size, pre_p, post_p, is_gimple_val, fb_rvalue);
++
++  /* Get AP.  */
++  addr = valist_tmp;
++
++  /* Compute new value for AP.  */
++  t = fold_build_pointer_plus (valist_tmp, rounded_size);
++  t = build2 (MODIFY_EXPR, TREE_TYPE (valist), valist, t);
++  gimplify_and_add (t, pre_p);
++
++  addr = fold_convert (build_pointer_type (type), addr);
++
++  if (indirect)
++    addr = build_va_arg_indirect_ref (addr);
++
++  addr = build_va_arg_indirect_ref (addr);
++
++  return addr;
++}
+ 
+ /* Addressing Modes */
+ 
+@@ -1847,16 +1908,20 @@
  
  /* Returns true if the current MCU is an F5xxx series.  */
  bool
@@ -23041,7 +23902,7 @@ Index: gcc/config/msp430/msp430.c
  {
    static const char * known_32bit_mult_mcus [] =
      {
-@@ -1868,7 +1842,11 @@
+@@ -1868,7 +1933,11 @@
        "msp430f47177",     "msp430f47187",     "msp430f47197"
      };
    int i;
@@ -23054,7 +23915,7 @@ Index: gcc/config/msp430/msp430.c
      return false;
  
    for (i = ARRAY_SIZE (known_32bit_mult_mcus); i--;)
-@@ -1878,25 +1856,6 @@
+@@ -1878,25 +1947,6 @@
    return false;
  }
  
@@ -23080,7 +23941,7 @@ Index: gcc/config/msp430/msp430.c
  /* This function does the same as the default, but it will replace GCC
     function names with the MSPABI-specified ones.  */
  void
-@@ -1913,11 +1872,11 @@
+@@ -1913,11 +1963,11 @@
  
    /* If we have been given a specific MCU name then we may be
       able to make use of its hardware multiply capabilities.  */
@@ -23094,7 +23955,7 @@ Index: gcc/config/msp430/msp430.c
  	    name = "__mulhi2_f5";
  	  else
  	    name = "__mulhi2";
-@@ -1924,9 +1883,9 @@
+@@ -1924,9 +1974,9 @@
  	}
        else if (strcmp ("__mspabi_mpyl", name) == 0)
  	{
@@ -23106,7 +23967,7 @@ Index: gcc/config/msp430/msp430.c
  	    name = "__mulsi2_hw32";
  	  else
  	    name = "__mulsi2";
-@@ -2203,7 +2162,7 @@
+@@ -2203,7 +2253,7 @@
  	 because builtins are expanded before the frame layout is determined.  */
        fprintf (file, "%d",
  	       msp430_initial_elimination_offset (ARG_POINTER_REGNUM, STACK_POINTER_REGNUM)
@@ -23115,6 +23976,40 @@ Index: gcc/config/msp430/msp430.c
        return;
  
      case 'J':
+@@ -2226,8 +2276,32 @@
+       msp430_print_operand_addr (file, addr);
+       break;
+ 
++    case CONST:
++      if (GET_CODE (XEXP (op, 0)) == ZERO_EXTRACT)
++	{
++	  op = XEXP (op, 0);
++	  switch (INTVAL (XEXP (op, 2)))
++	    {
++	    case 0:
++	      fprintf (file, "#lo (");
++	      msp430_print_operand_raw (file, XEXP (op, 0));
++	      fprintf (file, ")");
++	      break;
++	  
++	    case 16:
++	      fprintf (file, "#hi (");
++	      msp430_print_operand_raw (file, XEXP (op, 0));
++	      fprintf (file, ")");
++	      break;
++
++	    default:
++	      output_operand_lossage ("invalid zero extract");
++	      break;
++	    }
++	  break;
++	}
++      /* Fall through.  */
+     case CONST_INT:
+-    case CONST:
+     case SYMBOL_REF:
+     case LABEL_REF:
+       if (letter == 0)
 Index: gcc/config/msp430/msp430.opt
 ===================================================================
 --- a/src/gcc/config/msp430/msp430.opt	(.../tags/gcc_4_9_0_release)
@@ -23174,6 +24069,21 @@ Index: gcc/config/msp430/msp430.opt
 +
 +EnumValue
 +Enum(msp430_hwmult_types) String(f5series) Value(F5SERIES)
+Index: gcc/config/msp430/msp430.h
+===================================================================
+--- a/src/gcc/config/msp430/msp430.h	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/config/msp430/msp430.h	(.../branches/gcc-4_9-branch)
+@@ -55,8 +55,8 @@
+   "%{mcpu=*:-mcpu=%*}%{!mcpu=*:%{mmcu=*:-mmcu=%*}} " /* Pass the CPU type on to the assembler.  */ \
+   "%{mrelax=-mQ} " /* Pass the relax option on to the assembler.  */ \
+   "%{mlarge:-ml} " /* Tell the assembler if we are building for the LARGE pointer model.  */ \
+-  "%{!msim:-md} %{msim:%{mlarge:-md}}" /* Copy data from ROM to RAM if necessary.  */ \
+-  "%{ffunction-sections:-gdwarf-sections}" /* If function sections are being created then create DWARF line number sections as well.  */
++  "%{!msim:-md} %{msim:%{mlarge:-md}} " /* Copy data from ROM to RAM if necessary.  */ \
++  "%{ffunction-sections:-gdwarf-sections} " /* If function sections are being created then create DWARF line number sections as well.  */
+ 
+ /* Enable linker section garbage collection by default, unless we
+    are creating a relocatable binary (gc does not work) or debugging
 Index: gcc/tree-vect-slp.c
 ===================================================================
 --- a/src/gcc/tree-vect-slp.c	(.../tags/gcc_4_9_0_release)
@@ -23317,6 +24227,21 @@ Index: gcc/tree-vect-slp.c
      {
        if (dump_enabled_p ())
          dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location, 
+Index: gcc/varpool.c
+===================================================================
+--- a/src/gcc/varpool.c	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/varpool.c	(.../branches/gcc-4_9-branch)
+@@ -166,7 +166,9 @@
+   /* Because we remove references from external functions before final compilation,
+      we may end up removing useful constructors.
+      FIXME: We probably want to trace boundaries better.  */
+-  if ((init = ctor_for_folding (node->decl)) == error_mark_node)
++  if (cgraph_state == CGRAPH_LTO_STREAMING)
++    ;
++  else if ((init = ctor_for_folding (node->decl)) == error_mark_node)
+     varpool_remove_initializer (node);
+   else
+     DECL_INITIAL (node->decl) = init;
 Index: gcc/tree-ssa-threadedge.c
 ===================================================================
 --- a/src/gcc/tree-ssa-threadedge.c	(.../tags/gcc_4_9_0_release)
@@ -23712,3 +24637,12 @@ Index: libgfortran/io/unix.c
  
    s->st_dev = statbuf.st_dev;
    s->st_ino = statbuf.st_ino;
+Index: .
+===================================================================
+--- a/src/.	(.../tags/gcc_4_9_0_release)
++++ b/src/.	(.../branches/gcc-4_9-branch)
+
+Property changes on: .
+___________________________________________________________________
+Added: svn:mergeinfo
+   Merged /trunk:r210668