* Update to SVN 20140306 (r208359) from the gcc-4_8-branch.

git-svn-id: svn://svn.debian.org/svn/gcccvs/branches/sid/gcc-4.8@7205 6ca36cf4-e1d1-0310-8c6f-e303bb2178ca

1 files changed, 278 insertions, 90 deletions

diff --git a/debian/patches/svn-doc-updates.diff b/debian/patches/svn-doc-updates.diff
index ac9de37..2839890 100644
--- a/debian/patches/svn-doc-updates.diff
+++ b/debian/patches/svn-doc-updates.diff
@@ -1,103 +1,291 @@
-# DP: updates from the 4.8 branch upto 20130421 (documentation).
+# DP: updates from the 4.8 branch upto 20140406 (documentation).
 
-svn diff svn://gcc.gnu.org/svn/gcc/tags/gcc_4_8_0_release svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch \
+svn diff svn://gcc.gnu.org/svn/gcc/tags/gcc_4_8_2_release svn://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch \
 	| sed -r 's,^--- (\S+)\t(\S+)(.*)$,--- a/src/\1\t\2,;s,^\+\+\+ (\S+)\t(\S+)(.*)$,+++ b/src/\1\t\2,' \
 	| awk '/^Index:.*\.texi/ {skip=0; print; next} /^Index:/ {skip=1; next} skip==0'
 
-Index: gcc/doc/standards.texi
-===================================================================
---- a/src/gcc/doc/standards.texi	(.../tags/gcc_4_8_0_release)
-+++ b/src/gcc/doc/standards.texi	(.../branches/gcc-4_8-branch)
-@@ -280,13 +280,8 @@
- 
- @section Go language
- 
--The Go language continues to evolve as of this writing; see the
--@uref{http://golang.org/@/ref/@/spec, current language
--specifications}.  At present there are no specific versions of Go, and
--there is no way to describe the language supported by GCC in terms of
--a specific version.  In general GCC tracks the evolving specification
--closely, and any given release will support the language as of the
--date that the release was frozen.
-+As of the GCC 4.7.1 release, GCC supports the Go 1 language standard,
-+described at @uref{http://golang.org/doc/go1.html}.
- 
- @section References for other languages
- 
 Index: gcc/doc/extend.texi
 ===================================================================
---- a/src/gcc/doc/extend.texi	(.../tags/gcc_4_8_0_release)
+--- a/src/gcc/doc/extend.texi	(.../tags/gcc_4_8_2_release)
 +++ b/src/gcc/doc/extend.texi	(.../branches/gcc-4_8-branch)
-@@ -1339,7 +1339,7 @@
- accesses to these data read from generic address space, i.e.@:
- from RAM,
- so that you need special accessors like @code{pgm_read_byte}
--from @w{@uref{http://nongnu.org/avr-libc/user-manual,AVR-LibC}}
-+from @w{@uref{http://nongnu.org/avr-libc/user-manual/,AVR-LibC}}
- together with attribute @code{progmem}.
- 
- @noindent
-@@ -4914,7 +4914,7 @@
- In order to read data located with the @code{progmem} attribute
- (inline) assembler must be used.
- @smallexample
--/* Use custom macros from @w{@uref{http://nongnu.org/avr-libc/user-manual,AVR-LibC}} */
-+/* Use custom macros from @w{@uref{http://nongnu.org/avr-libc/user-manual/,AVR-LibC}} */
- #include <avr/pgmspace.h> 
- 
- /* Locate var in flash memory */
+@@ -3121,6 +3121,17 @@
+ prologue used in Win32 API functions in Microsoft Windows XP Service Pack 2
+ and newer.
+ 
++@item hotpatch [(@var{prologue-halfwords})]
++@cindex @code{hotpatch} attribute
++
++On S/390 System z targets, you can use this function attribute to
++make GCC generate a ``hot-patching'' function prologue.  The
++@code{hotpatch} has no effect on funtions that are explicitly
++inline.  If the @option{-mhotpatch} or @option{-mno-hotpatch}
++command-line option is used at the same time, the @code{hotpatch}
++attribute takes precedence.  If an argument is given, the maximum
++allowed value is 1000000.
++
+ @item naked
+ @cindex function without a prologue/epilogue code
+ Use this attribute on the ARM, AVR, MCORE, RX and SPU ports to indicate that
 Index: gcc/doc/invoke.texi
 ===================================================================
---- a/src/gcc/doc/invoke.texi	(.../tags/gcc_4_8_0_release)
+--- a/src/gcc/doc/invoke.texi	(.../tags/gcc_4_8_2_release)
 +++ b/src/gcc/doc/invoke.texi	(.../branches/gcc-4_8-branch)
-@@ -922,7 +922,6 @@
- -mfaster-structs  -mno-faster-structs  -mflat  -mno-flat @gol
- -mfpu  -mno-fpu  -mhard-float  -msoft-float @gol
- -mhard-quad-float  -msoft-quad-float @gol
---mlittle-endian @gol
- -mstack-bias  -mno-stack-bias @gol
- -munaligned-doubles  -mno-unaligned-doubles @gol
- -mv8plus  -mno-v8plus  -mvis  -mno-vis @gol
-@@ -8177,7 +8176,7 @@
- and those merged by attribute @code{externally_visible} become static functions
- and in effect are optimized more aggressively by interprocedural optimizers.
- 
--In combination with @code{-flto} using this option should not be used.
-+This option should not be used in combination with @code{-flto}.
- Instead relying on a linker plugin should provide safer and more precise
- information.
- 
-@@ -11701,7 +11700,7 @@
- The startup code from libgcc never sets @code{EIND}.
- Notice that startup code is a blend of code from libgcc and AVR-LibC.
- For the impact of AVR-LibC on @code{EIND}, see the
--@w{@uref{http://nongnu.org/avr-libc/user-manual,AVR-LibC user manual}}.
-+@w{@uref{http://nongnu.org/avr-libc/user-manual/,AVR-LibC user manual}}.
- 
- @item
- It is legitimate for user-specific startup code to set up @code{EIND}
-@@ -19291,11 +19290,6 @@
- on SPARC-V9 processors in 64-bit environments:
- 
- @table @gcctabopt
--@item -mlittle-endian
--@opindex mlittle-endian
--Generate code for a processor running in little-endian mode.  It is only
--available for a few configurations and most notably not on Solaris and Linux.
+@@ -161,7 +161,7 @@
+ -pipe  -pass-exit-codes  @gol
+ -x @var{language}  -v  -###  --help@r{[}=@var{class}@r{[},@dots{}@r{]]}  --target-help  @gol
+ --version -wrapper @@@var{file} -fplugin=@var{file} -fplugin-arg-@var{name}=@var{arg}  @gol
+--fdump-ada-spec@r{[}-slim@r{]} -fada-spec-parent=@var{arg} -fdump-go-spec=@var{file}}
++-fdump-ada-spec@r{[}-slim@r{]} -fada-spec-parent=@var{unit} -fdump-go-spec=@var{file}}
+ 
+ @item C Language Options
+ @xref{C Dialect Options,,Options Controlling C Dialect}.
+@@ -879,7 +879,8 @@
+ -msmall-exec  -mno-small-exec  -mmvcle -mno-mvcle @gol
+ -m64  -m31  -mdebug  -mno-debug  -mesa  -mzarch @gol
+ -mtpf-trace -mno-tpf-trace  -mfused-madd  -mno-fused-madd @gol
+--mwarn-framesize  -mwarn-dynamicstack  -mstack-size -mstack-guard}
++-mwarn-framesize  -mwarn-dynamicstack  -mstack-size -mstack-guard @gol
++-mhotpatch[=@var{halfwords}] -mno-hotpatch}
+ 
+ @emph{Score Options}
+ @gccoptlist{-meb -mel @gol
+@@ -928,7 +929,7 @@
+ -mvis2  -mno-vis2  -mvis3  -mno-vis3 @gol
+ -mcbcond -mno-cbcond @gol
+ -mfmaf  -mno-fmaf  -mpopc  -mno-popc @gol
+--mfix-at697f}
++-mfix-at697f -mfix-ut699}
+ 
+ @emph{SPU Options}
+ @gccoptlist{-mwarn-reloc -merror-reloc @gol
+@@ -1460,11 +1461,18 @@
+ for the plugin called @var{name}.
+ 
+ @item -fdump-ada-spec@r{[}-slim@r{]}
+-For C and C++ source and include files, generate corresponding Ada
+-specs. @xref{Generating Ada Bindings for C and C++ headers,,, gnat_ugn,
++@opindex fdump-ada-spec
++For C and C++ source and include files, generate corresponding Ada specs.
++@xref{Generating Ada Bindings for C and C++ headers,,, gnat_ugn,
+ GNAT User's Guide}, which provides detailed documentation on this feature.
+ 
++@item -fada-spec-parent=@var{unit}
++@opindex fada-spec-parent
++In conjunction with @option{-fdump-ada-spec@r{[}-slim@r{]}} above, generate
++Ada specs as child units of parent @var{unit}.
++
+ @item -fdump-go-spec=@var{file}
++@opindex fdump-go-spec
+ For input files in any language, generate corresponding Go
+ declarations in @var{file}.  This generates Go @code{const},
+ @code{type}, @code{var}, and @code{func} declarations which may be a
+@@ -11241,11 +11249,32 @@
+ big-endian ARM processors generated by versions of the compiler prior to
+ 2.8.  This option is now deprecated.
+ 
+-@item -mcpu=@var{name}
+-@opindex mcpu
+-This specifies the name of the target ARM processor.  GCC uses this name
+-to determine what kind of instructions it can emit when generating
+-assembly code.  Permissible names are: @samp{arm2}, @samp{arm250},
++@item -march=@var{name}
++@opindex march
++This specifies the name of the target ARM architecture.  GCC uses this
++name to determine what kind of instructions it can emit when generating
++assembly code.  This option can be used in conjunction with or instead
++of the @option{-mcpu=} option.  Permissible names are: @samp{armv2},
++@samp{armv2a}, @samp{armv3}, @samp{armv3m}, @samp{armv4}, @samp{armv4t},
++@samp{armv5}, @samp{armv5t}, @samp{armv5e}, @samp{armv5te},
++@samp{armv6}, @samp{armv6j},
++@samp{armv6t2}, @samp{armv6z}, @samp{armv6zk}, @samp{armv6-m},
++@samp{armv7}, @samp{armv7-a}, @samp{armv7-r}, @samp{armv7-m}, @samp{armv7e-m}
++@samp{armv8-a},
++@samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}.
++
++@option{-march=native} causes the compiler to auto-detect the architecture
++of the build computer.  At present, this feature is only supported on
++Linux, and not all architectures are recognized.  If the auto-detect is
++unsuccessful the option has no effect.
++
++@item -mtune=@var{name}
++@opindex mtune
++This option specifies the name of the target ARM processor for
++which GCC should tune the performance of the code.
++For some ARM implementations better performance can be obtained by using
++this option.
++Permissible names are: @samp{arm2}, @samp{arm250},
+ @samp{arm3}, @samp{arm6}, @samp{arm60}, @samp{arm600}, @samp{arm610},
+ @samp{arm620}, @samp{arm7}, @samp{arm7m}, @samp{arm7d}, @samp{arm7dm},
+ @samp{arm7di}, @samp{arm7dmi}, @samp{arm70}, @samp{arm700},
+@@ -11273,27 +11302,6 @@
+ @samp{fa526}, @samp{fa626},
+ @samp{fa606te}, @samp{fa626te}, @samp{fmp626}, @samp{fa726te}.
+ 
+-
+-@option{-mcpu=generic-@var{arch}} is also permissible, and is
+-equivalent to @option{-march=@var{arch} -mtune=generic-@var{arch}}.
+-See @option{-mtune} for more information.
 -
- @item -m32
- @itemx -m64
- @opindex m32
-Index: gcc/fortran/intrinsic.texi
+-@option{-mcpu=native} causes the compiler to auto-detect the CPU
+-of the build computer.  At present, this feature is only supported on
+-Linux, and not all architectures are recognized.  If the auto-detect is
+-unsuccessful the option has no effect.
+-
+-@item -mtune=@var{name}
+-@opindex mtune
+-This option is very similar to the @option{-mcpu=} option, except that
+-instead of specifying the actual target processor type, and hence
+-restricting which instructions can be used, it specifies that GCC should
+-tune the performance of the code as if the target were of the type
+-specified in this option, but still choosing the instructions it
+-generates based on the CPU specified by a @option{-mcpu=} option.
+-For some ARM implementations better performance can be obtained by using
+-this option.
+-
+ @option{-mtune=generic-@var{arch}} specifies that GCC should tune the
+ performance for a blend of processors within architecture @var{arch}.
+ The aim is to generate code that run well on the current most popular
+@@ -11306,21 +11314,23 @@
+ Linux, and not all architectures are recognized.  If the auto-detect is
+ unsuccessful the option has no effect.
+ 
+-@item -march=@var{name}
+-@opindex march
+-This specifies the name of the target ARM architecture.  GCC uses this
+-name to determine what kind of instructions it can emit when generating
+-assembly code.  This option can be used in conjunction with or instead
+-of the @option{-mcpu=} option.  Permissible names are: @samp{armv2},
+-@samp{armv2a}, @samp{armv3}, @samp{armv3m}, @samp{armv4}, @samp{armv4t},
+-@samp{armv5}, @samp{armv5t}, @samp{armv5e}, @samp{armv5te},
+-@samp{armv6}, @samp{armv6j},
+-@samp{armv6t2}, @samp{armv6z}, @samp{armv6zk}, @samp{armv6-m},
+-@samp{armv7}, @samp{armv7-a}, @samp{armv7-r}, @samp{armv7-m},
+-@samp{armv8-a},
+-@samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}.
++@item -mcpu=@var{name}
++@opindex mcpu
++This specifies the name of the target ARM processor.  GCC uses this name
++to derive the name of the target ARM architecture (as if specified
++by @option{-march}) and the ARM processor type for which to tune for
++performance (as if specified by @option{-mtune}).  Where this option
++is used in conjunction with @option{-march} or @option{-mtune},
++those options take precedence over the appropriate part of this option.
+ 
+-@option{-march=native} causes the compiler to auto-detect the architecture
++Permissible names for this option are the same as those for
++@option{-mtune}.
++
++@option{-mcpu=generic-@var{arch}} is also permissible, and is
++equivalent to @option{-march=@var{arch} -mtune=generic-@var{arch}}.
++See @option{-mtune} for more information.
++
++@option{-mcpu=native} causes the compiler to auto-detect the CPU
+ of the build computer.  At present, this feature is only supported on
+ Linux, and not all architectures are recognized.  If the auto-detect is
+ unsuccessful the option has no effect.
+@@ -11409,8 +11419,11 @@
+ 
+ @item -mpic-register=@var{reg}
+ @opindex mpic-register
+-Specify the register to be used for PIC addressing.  The default is R10
+-unless stack-checking is enabled, when R9 is used.
++Specify the register to be used for PIC addressing.
++For standard PIC base case, the default will be any suitable register
++determined by compiler.  For single PIC base case, the default is
++@samp{R9} if target is EABI based or stack-checking is enabled,
++otherwise the default is @samp{R10}.
+ 
+ @item -mpoke-function-name
+ @opindex mpoke-function-name
+@@ -18449,6 +18462,21 @@
+ In order to be efficient the extra code makes the assumption that the stack starts
+ at an address aligned to the value given by @var{stack-size}.
+ The @var{stack-guard} option can only be used in conjunction with @var{stack-size}.
++
++@item -mhotpatch[=@var{halfwords}]
++@itemx -mno-hotpatch
++@opindex mhotpatch
++If the hotpatch option is enabled, a ``hot-patching'' function
++prologue is generated for all functions in the compilation unit.
++The funtion label is prepended with the given number of two-byte
++Nop instructions (@var{halfwords}, maximum 1000000) or 12 Nop
++instructions if no argument is present.  Functions with a
++hot-patching prologue are never inlined automatically, and a
++hot-patching prologue is never generated for functions functions
++that are explicitly inline.
++
++This option can be overridden for individual functions with the
++@code{hotpatch} attribute.
+ @end table
+ 
+ @node Score Options
+@@ -19133,10 +19161,10 @@
+ Set the instruction set, register set, and instruction scheduling parameters
+ for machine type @var{cpu_type}.  Supported values for @var{cpu_type} are
+ @samp{v7}, @samp{cypress}, @samp{v8}, @samp{supersparc}, @samp{hypersparc},
+-@samp{leon}, @samp{sparclite}, @samp{f930}, @samp{f934}, @samp{sparclite86x},
+-@samp{sparclet}, @samp{tsc701}, @samp{v9}, @samp{ultrasparc},
+-@samp{ultrasparc3}, @samp{niagara}, @samp{niagara2}, @samp{niagara3},
+-and @samp{niagara4}.
++@samp{leon}, @samp{leon3}, @samp{sparclite}, @samp{f930}, @samp{f934},
++@samp{sparclite86x}, @samp{sparclet}, @samp{tsc701}, @samp{v9},
++@samp{ultrasparc}, @samp{ultrasparc3}, @samp{niagara}, @samp{niagara2},
++@samp{niagara3} and @samp{niagara4}.
+ 
+ Native Solaris and GNU/Linux toolchains also support the value @samp{native},
+ which selects the best architecture option for the host processor.
+@@ -19155,7 +19183,7 @@
+ cypress
+ 
+ @item v8
+-supersparc, hypersparc, leon
++supersparc, hypersparc, leon, leon3
+ 
+ @item sparclite
+ f930, f934, sparclite86x
+@@ -19217,10 +19245,11 @@
+ The same values for @option{-mcpu=@var{cpu_type}} can be used for
+ @option{-mtune=@var{cpu_type}}, but the only useful values are those
+ that select a particular CPU implementation.  Those are @samp{cypress},
+-@samp{supersparc}, @samp{hypersparc}, @samp{leon}, @samp{f930}, @samp{f934},
+-@samp{sparclite86x}, @samp{tsc701}, @samp{ultrasparc}, @samp{ultrasparc3},
+-@samp{niagara}, @samp{niagara2}, @samp{niagara3} and @samp{niagara4}.  With
+-native Solaris and GNU/Linux toolchains, @samp{native} can also be used.
++@samp{supersparc}, @samp{hypersparc}, @samp{leon}, @samp{leon3}, @samp{f930},
++@samp{f934}, @samp{sparclite86x}, @samp{tsc701}, @samp{ultrasparc},
++@samp{ultrasparc3}, @samp{niagara}, @samp{niagara2}, @samp{niagara3} and
++@samp{niagara4}.  With native Solaris and GNU/Linux toolchains, @samp{native}
++can also be used.
+ 
+ @item -mv8plus
+ @itemx -mno-v8plus
+@@ -19289,6 +19318,11 @@
+ @opindex mfix-at697f
+ Enable the documented workaround for the single erratum of the Atmel AT697F
+ processor (which corresponds to erratum #13 of the AT697E processor).
++
++@item -mfix-ut699
++@opindex mfix-ut699
++Enable the documented workarounds for the floating-point errata and the data
++cache nullify errata of the UT699 processor.
+ @end table
+ 
+ These @samp{-m} options are supported in addition to the above
+Index: gcc/fortran/invoke.texi
 ===================================================================
---- a/src/gcc/fortran/intrinsic.texi	(.../tags/gcc_4_8_0_release)
-+++ b/src/gcc/fortran/intrinsic.texi	(.../branches/gcc-4_8-branch)
-@@ -9248,7 +9248,7 @@
- @item @emph{Arguments}:
- @multitable @columnfractions .15 .70
- @item @var{X} @tab Shall be of type @code{REAL}.
--@item @var{S} @tab (Optional) shall be of type @code{REAL} and
-+@item @var{S} @tab Shall be of type @code{REAL} and
- not equal to zero.
- @end multitable
+--- a/src/gcc/fortran/invoke.texi	(.../tags/gcc_4_8_2_release)
++++ b/src/gcc/fortran/invoke.texi	(.../branches/gcc-4_8-branch)
+@@ -982,11 +982,12 @@
+ into internal representation.  Only really useful for debugging the
+ GNU Fortran compiler itself.
+ 
+-@item -fdump-optimized-tree
++@item -fdump-fortran-optimized
+ @opindex @code{fdump-fortran-optimized}
+ Output the parse tree after front-end optimization.  Only really
+ useful for debugging the GNU Fortran compiler itself.
  
++@item -fdump-parse-tree
+ @opindex @code{fdump-parse-tree}
+ Output the internal parse tree after translating the source program
+ into internal representation.  Only really useful for debugging the