summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorRobert Mustacchi <rm@joyent.com>2011-08-01 21:42:57 +0000
committerRobert Mustacchi <rm@joyent.com>2011-08-01 21:42:57 +0000
commitf0707d07a4288a781a2192ad77c94b97251a9bb5 (patch)
tree86997dd7814d65dc58733789ae999f3fcf3fe0bd
parent8d3d4a53bb8de182a3686485ee6a0f6acaa8c3e4 (diff)
downloadillumos-kvm-f0707d07a4288a781a2192ad77c94b97251a9bb5.tar.gz
HVM-539 Fixup msr.h
-rw-r--r--Makefile3
-rw-r--r--kvm.c2
-rw-r--r--kvm_emulate.c2
-rw-r--r--kvm_lapic.c2
-rw-r--r--kvm_mdb.c2
-rw-r--r--kvm_msr.h100
-rw-r--r--kvm_vmx.c2
-rw-r--r--kvm_x86.c2
-rw-r--r--msr.h142
9 files changed, 108 insertions, 149 deletions
diff --git a/Makefile b/Makefile
index 99ed3c7..200e8d9 100644
--- a/Makefile
+++ b/Makefile
@@ -42,6 +42,7 @@ HEADERS= \
kvm_lapic.h \
kvm_mmu.h \
kvm_msidef.h \
+ kvm_msr.h \
kvm_paging_tmpl.h \
kvm_timer.h \
kvm_tss.h \
@@ -74,7 +75,7 @@ HDRCHK_SYSHDRS= \
kvm_x86host.h \
kvm_x86impl.h
-kvm: kvm.c kvm_x86.c kvm_emulate.c kvm.h kvm_x86host.h msr.h kvm_bitops.h kvm_irq.c kvm_i8254.c kvm_lapic.c kvm_mmu.c kvm_iodev.c kvm_ioapic.c kvm_vmx.c kvm_i8259.c kvm_coalesced_mmio.c kvm_irq_comm.c kvm_cache_regs.c kvm_bitops.c $(HEADERS)
+kvm: kvm.c kvm_x86.c kvm_emulate.c kvm.h kvm_x86host.h kvm_msr.h kvm_bitops.h kvm_irq.c kvm_i8254.c kvm_lapic.c kvm_mmu.c kvm_iodev.c kvm_ioapic.c kvm_vmx.c kvm_i8259.c kvm_coalesced_mmio.c kvm_irq_comm.c kvm_cache_regs.c kvm_bitops.c $(HEADERS)
$(CC) $(CFLAGS) $(INCLUDEDIR) kvm.c
$(CC) $(CFLAGS) $(INCLUDEDIR) kvm_x86.c
$(CC) $(CFLAGS) $(INCLUDEDIR) kvm_emulate.c
diff --git a/kvm.c b/kvm.c
index eaf655b..ae46640 100644
--- a/kvm.c
+++ b/kvm.c
@@ -317,7 +317,7 @@
#include "kvm_bitops.h"
#include "kvm_vmx.h"
#include "msr-index.h"
-#include "msr.h"
+#include "kvm_msr.h"
#include "kvm_host.h"
#include "kvm_lapic.h"
#include "processor-flags.h"
diff --git a/kvm_emulate.c b/kvm_emulate.c
index 508f5a3..832a19d 100644
--- a/kvm_emulate.c
+++ b/kvm_emulate.c
@@ -50,7 +50,7 @@
#include "kvm_mmu.h"
#include "msr-index.h"
-#include "msr.h"
+#include "kvm_msr.h"
#include "processor-flags.h"
#include "kvm_iodev.h"
#include "kvm.h"
diff --git a/kvm_lapic.c b/kvm_lapic.c
index 91165a2..2376802 100644
--- a/kvm_lapic.c
+++ b/kvm_lapic.c
@@ -22,7 +22,7 @@
#include <sys/atomic.h>
#include "kvm_bitops.h"
-#include "msr.h"
+#include "kvm_msr.h"
#include "kvm_apicdef.h"
#include "kvm_cpuid.h"
#include "kvm_x86host.h"
diff --git a/kvm_mdb.c b/kvm_mdb.c
index 831fa97..2b698af 100644
--- a/kvm_mdb.c
+++ b/kvm_mdb.c
@@ -22,7 +22,7 @@
#include <sys/segments.h>
#include <sys/mdb_modapi.h>
-#include "msr.h"
+#include "kvm_msr.h"
#include "kvm_vmx.h"
#include "kvm_iodev.h"
#include "kvm_host.h"
diff --git a/kvm_msr.h b/kvm_msr.h
new file mode 100644
index 0000000..6b14852
--- /dev/null
+++ b/kvm_msr.h
@@ -0,0 +1,100 @@
+/*
+ * This header file has been slimmed down and adopted from the Linux Kernel's
+ * <asm-x86/msr.h>
+ */
+#ifndef _KVM_MSR_H
+#define _KVM_MSR_H
+
+#include "msr-index.h"
+
+#include <sys/ontrap.h>
+#include <sys/errno.h>
+
+typedef struct msr {
+ union {
+ struct {
+ uint32_t l;
+ uint32_t h;
+ };
+ uint64_t q;
+ }b;
+} msr_t;
+
+typedef struct msr_info {
+ uint32_t msr_no;
+ struct msr reg;
+ struct msr *msrs;
+ int err;
+} msr_info_t;
+
+typedef struct msr_regs_info {
+ uint32_t *regs;
+ int err;
+} msr_regs_info_t;
+
+/*
+ * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A"
+ * constraint has different meanings. For i386, "A" means exactly
+ * edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead,
+ * it means rax *or* rdx.
+ */
+#define DECLARE_ARGS(val, low, high) unsigned low, high
+#define EAX_EDX_VAL(val, low, high) ((low) | ((uint64_t)(high) << 32))
+#define EAX_EDX_ARGS(val, low, high) "a" (low), "d" (high)
+#define EAX_EDX_RET(val, low, high) "=a" (low), "=d" (high)
+
+extern unsigned long long native_read_msr(unsigned int);
+extern uint64_t native_read_msr_safe(unsigned int, int *);
+extern int native_write_msr_safe(unsigned int, unsigned, unsigned);
+extern void native_write_msr(unsigned int, unsigned, unsigned);
+
+extern unsigned long long native_read_tsc(void);
+extern unsigned long long __native_read_tsc(void);
+
+/*
+ * Access to machine-specific registers (available on 586 and better only)
+ * Note: the rd* operations modify the parameters directly (without using
+ * pointer indirection), this allows gcc to optimize better
+ */
+
+#define rdmsr(msr, val1, val2) \
+do { \
+ uint64_t __val = native_read_msr((msr)); \
+ (val1) = (uint32_t)__val; \
+ (val2) = (uint32_t)(__val >> 32); \
+} while (0)
+
+#define rdmsrl(msr, val) \
+ ((val) = native_read_msr((msr)))
+
+#define wrmsrl(msr, val) \
+ native_write_msr((msr), (uint32_t)((uint64_t)(val)), \
+ (uint32_t)((uint64_t)(val) >> 32))
+
+/* see comment above for wrmsr() */
+/* wrmsr with exception handling */
+extern int wrmsr_safe(unsigned msr, unsigned low, unsigned high);
+
+/* rdmsr with exception handling */
+/* BEGIN CSTYLED */
+#define rdmsr_safe(msr, p1, p2) \
+({ \
+ int __err; \
+ uint64_t __val = native_read_msr_safe((msr), &__err); \
+ (*p1) = (uint32_t)__val; \
+ (*p2) = (uint32_t)(__val >> 32); \
+ __err; \
+})
+/* END CSTYLED */
+
+extern int rdmsrl_safe(unsigned, unsigned long long *);
+extern int rdmsrl_amd_safe(unsigned, unsigned long long *);
+extern int wrmsrl_amd_safe(unsigned, unsigned long long);
+
+#define rdtscl(low) \
+ ((low) = (uint32_t)__native_read_tsc())
+
+#define rdtscll(val) \
+ ((val) = __native_read_tsc())
+
+#endif /* _KVM_MSR_H */
diff --git a/kvm_vmx.c b/kvm_vmx.c
index f164857..9579b99 100644
--- a/kvm_vmx.c
+++ b/kvm_vmx.c
@@ -25,7 +25,7 @@
#include <sys/xc_levels.h>
#include "kvm_bitops.h"
-#include "msr.h"
+#include "kvm_msr.h"
#include "kvm_cpuid.h"
#include "kvm_impl.h"
#include "kvm_x86impl.h"
diff --git a/kvm_x86.c b/kvm_x86.c
index 7a661a6..5ed4774 100644
--- a/kvm_x86.c
+++ b/kvm_x86.c
@@ -19,7 +19,7 @@
#include "kvm_bitops.h"
#include "kvm_vmx.h"
#include "msr-index.h"
-#include "msr.h"
+#include "kvm_msr.h"
#include "kvm_host.h"
#include "kvm_lapic.h"
#include "processor-flags.h"
diff --git a/msr.h b/msr.h
deleted file mode 100644
index f4ea1e3..0000000
--- a/msr.h
+++ /dev/null
@@ -1,142 +0,0 @@
-#ifndef _ASM_X86_MSR_H
-#define _ASM_X86_MSR_H
-
-#include "msr-index.h"
-
-#ifndef __ASSEMBLY__
-
-
-#define X86_IOC_RDMSR_REGS _IOWR('c', 0xA0, __u32[8])
-#define X86_IOC_WRMSR_REGS _IOWR('c', 0xA1, __u32[8])
-
-#ifdef _KERNEL
-
-#include <sys/ontrap.h>
-#include <sys/errno.h>
-
-#ifdef XXX
-#include <asm/cpumask.h>
-#endif /*XXX*/
-
-typedef struct msr {
- union {
- struct {
- uint32_t l;
- uint32_t h;
- };
- uint64_t q;
- }b;
-} msr_t;
-
-typedef struct msr_info {
- uint32_t msr_no;
- struct msr reg;
- struct msr *msrs;
- int err;
-} msr_info_t;
-
-typedef struct msr_regs_info {
- uint32_t *regs;
- int err;
-} msr_regs_info_t;
-
-extern unsigned long long native_read_tscp(unsigned int *aux);
-
-/*
- * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A"
- * constraint has different meanings. For i386, "A" means exactly
- * edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead,
- * it means rax *or* rdx.
- */
-#define DECLARE_ARGS(val, low, high) unsigned low, high
-#define EAX_EDX_VAL(val, low, high) ((low) | ((uint64_t)(high) << 32))
-#define EAX_EDX_ARGS(val, low, high) "a" (low), "d" (high)
-#define EAX_EDX_RET(val, low, high) "=a" (low), "=d" (high)
-
-extern unsigned long long native_read_msr(unsigned int msr);
-extern uint64_t native_read_msr_safe(unsigned int msr, int *err);
-extern int native_write_msr_safe(unsigned int msr,
- unsigned low, unsigned high);
-
-extern void native_write_msr(unsigned int msr,
- unsigned low, unsigned high);
-
-extern unsigned long long native_read_tsc(void);
-
-extern unsigned long long __native_read_tsc(void);
-extern unsigned long long native_read_pmc(int counter);
-
-#ifdef CONFIG_PARAVIRT
-#include <asm/paravirt.h>
-#else
-
-#ifdef XXX
-#include <linux/errno.h>
-#endif /*XXX*/
-/*
- * Access to machine-specific registers (available on 586 and better only)
- * Note: the rd* operations modify the parameters directly (without using
- * pointer indirection), this allows gcc to optimize better
- */
-
-#define rdmsr(msr, val1, val2) \
-do { \
- uint64_t __val = native_read_msr((msr)); \
- (val1) = (uint32_t)__val; \
- (val2) = (uint32_t)(__val >> 32); \
-} while (0)
-
-#define rdmsrl(msr, val) \
- ((val) = native_read_msr((msr)))
-
-#define wrmsrl(msr, val) \
- native_write_msr((msr), (uint32_t)((uint64_t)(val)), (uint32_t)((uint64_t)(val) >> 32))
-
-/* see comment above for wrmsr() */
-/* wrmsr with exception handling */
-extern int wrmsr_safe(unsigned msr, unsigned low, unsigned high);
-
-/* rdmsr with exception handling */
-#define rdmsr_safe(msr, p1, p2) \
-({ \
- int __err; \
- uint64_t __val = native_read_msr_safe((msr), &__err); \
- (*p1) = (uint32_t)__val; \
- (*p2) = (uint32_t)(__val >> 32); \
- __err; \
-})
-
-extern int rdmsrl_safe(unsigned msr, unsigned long long *p);
-
-extern int rdmsrl_amd_safe(unsigned msr, unsigned long long *p);
-extern int wrmsrl_amd_safe(unsigned msr, unsigned long long val);
-
-#define rdtscl(low) \
- ((low) = (uint32_t)__native_read_tsc())
-
-#define rdtscll(val) \
- ((val) = __native_read_tsc())
-
-#define rdpmc(counter, low, high) \
-do { \
- uint64_t _l = native_read_pmc((counter)); \
- (low) = (uint32_t)_l; \
- (high) = (uint32_t)(_l >> 32); \
-} while (0)
-
-#endif /* !CONFIG_PARAVIRT */
-
-
-#define checking_wrmsrl(msr, val) wrmsr_safe((msr), (uint32_t)(val), \
- (uint32_t)((val) >> 32))
-
-#define write_tsc(val1, val2) wrmsr(MSR_IA32_TSC, (val1), (val2))
-
-#define write_rdtscp_aux(val) wrmsr(MSR_TSC_AUX, (val), 0)
-
-struct msr *msrs_alloc(void);
-void msrs_free(struct msr *msrs);
-
-#endif /* _KERNEL */
-#endif /* __ASSEMBLY__ */
-#endif /* _ASM_X86_MSR_H */