diff options
author | raf <none@none> | 2007-06-29 11:22:13 -0700 |
---|---|---|
committer | raf <none@none> | 2007-06-29 11:22:13 -0700 |
commit | 41efec2219526a9b3ecce26f97aba761ef1e1d0d (patch) | |
tree | 965a62b40bcb8e94fe61f3eb171f9ac7e87aa418 /usr/src/lib/libc/sparc | |
parent | 3a5a36bed7d37f89dd29cedbff57558e30629f6e (diff) | |
download | illumos-gate-41efec2219526a9b3ecce26f97aba761ef1e1d0d.tar.gz |
6559990 user-level read/write locks should be much faster
6550115 Signal delivery causes unbounded priority inversions
Diffstat (limited to 'usr/src/lib/libc/sparc')
-rw-r--r-- | usr/src/lib/libc/sparc/Makefile | 2 | ||||
-rw-r--r-- | usr/src/lib/libc/sparc/threads/sparc.il | 28 |
2 files changed, 25 insertions, 5 deletions
diff --git a/usr/src/lib/libc/sparc/Makefile b/usr/src/lib/libc/sparc/Makefile index 61472f35b6..63e8e88ea4 100644 --- a/usr/src/lib/libc/sparc/Makefile +++ b/usr/src/lib/libc/sparc/Makefile @@ -1111,7 +1111,7 @@ TIL= \ $(TIL:%=pics/%) := CFLAGS += $(LIBCBASE)/threads/sparc.il # special kludge for inlines with 'cas': -pics/synch.o pics/lwp.o := sparc_CFLAGS += -_gcc=-Wa,-xarch=v8plus +pics/rwlock.o pics/synch.o pics/lwp.o := sparc_CFLAGS += -_gcc=-Wa,-xarch=v8plus # Files in port/fp subdirectory that need base.il inline template IL= \ diff --git a/usr/src/lib/libc/sparc/threads/sparc.il b/usr/src/lib/libc/sparc/threads/sparc.il index c3f81e69b3..57d351ae6d 100644 --- a/usr/src/lib/libc/sparc/threads/sparc.il +++ b/usr/src/lib/libc/sparc/threads/sparc.il @@ -55,12 +55,12 @@ * 32-bit applications that use %g5 as an invariant register. */ - .inline cas32, 0 + .inline atomic_cas_32, 0 .word 0xd5e21009 ! cas [%o0], %o1, %o2 mov %o2, %o0 .end - .inline swap32, 0 + .inline atomic_swap_32, 0 ld [%o0], %o2 1: mov %o1, %o3 @@ -71,7 +71,7 @@ mov %o3, %o0 .end - .inline incr32, 0 + .inline atomic_inc_32, 0 ld [%o0], %o2 1: add %o2, 1, %o3 @@ -81,7 +81,7 @@ mov %o3, %o2 .end - .inline decr32, 0 + .inline atomic_dec_32, 0 ld [%o0], %o2 1: sub %o2, 1, %o3 @@ -91,6 +91,26 @@ mov %o3, %o2 .end + .inline atomic_and_32, 0 + ld [%o0], %o2 +1: + and %o2, %o1, %o3 + .word 0xd7e2100a ! cas [%o0], %o2, %o3 + cmp %o2, %o3 + bne,a 1b + mov %o3, %o2 + .end + + .inline atomic_or_32, 0 + ld [%o0], %o2 +1: + or %o2, %o1, %o3 + .word 0xd7e2100a ! cas [%o0], %o2, %o3 + cmp %o2, %o3 + bne,a 1b + mov %o3, %o2 + .end + .inline caller, 0 mov %i7, %o0 .end |