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| author | Hans Rosenfeld <hans.rosenfeld@joyent.com> | 2018-03-26 16:16:18 +0200 |
|---|---|---|
| committer | Hans Rosenfeld <hans.rosenfeld@joyent.com> | 2018-09-26 21:30:14 +0200 |
| commit | b5cf5bc277244cdacc06d213322ec98e76ef8d89 (patch) | |
| tree | 19e0eb0112d5b98673bca22b98618db41697c4b1 /usr/src/uts/intel/io/pci/pci_pci.c | |
| parent | d48defc5a82c2bc955d3c8c9a5a3c7ccea87d5d4 (diff) | |
| download | illumos-gate-b5cf5bc277244cdacc06d213322ec98e76ef8d89.tar.gz | |
9796 want support for PCI BAR size >= 4G
Reviewed by: Jerry Jelinek <jerry.jelinek@joyent.com>
Reviewed by: Patrick Mooney <patrick.mooney@joyent.com>
Reviewed by: Robert Mustacchi <rm@joyent.com>
Reviewed by: Toomas Soome <tsoome@me.com>
Reviewed by: Andy Fiddaman <omnios@citrus-it.net>
Reviewed by: Garrett D'Amore <garrett@damore.org>
Approved by: Garrett D'Amore <garrett@damore.org>
Diffstat (limited to 'usr/src/uts/intel/io/pci/pci_pci.c')
| -rw-r--r-- | usr/src/uts/intel/io/pci/pci_pci.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/usr/src/uts/intel/io/pci/pci_pci.c b/usr/src/uts/intel/io/pci/pci_pci.c index b15c057371..eeb62a82ac 100644 --- a/usr/src/uts/intel/io/pci/pci_pci.c +++ b/usr/src/uts/intel/io/pci/pci_pci.c @@ -24,6 +24,7 @@ */ /* * Copyright 2012 Garrett D'Amore <garrett@damore.org>. All rights reserved. + * Copyright 2018 Joyent, Inc. */ /* @@ -561,12 +562,21 @@ ppb_ctlops(dev_info_t *dip, dev_info_t *rdip, if (ctlop == DDI_CTLOPS_NREGS) *(int *)result = totreg; else if (ctlop == DDI_CTLOPS_REGSIZE) { + uint64_t rs; + rn = *(int *)arg; if (rn >= totreg) { kmem_free(drv_regp, reglen); return (DDI_FAILURE); } - *(off_t *)result = drv_regp[rn].pci_size_low; + + rs = drv_regp[rn].pci_size_low | + ((uint64_t)drv_regp[rn].pci_size_hi << 32); + if (rs > OFF_MAX) { + kmem_free(drv_regp, reglen); + return (DDI_FAILURE); + } + *(off_t *)result = rs; } kmem_free(drv_regp, reglen); |