9829 want interface for posted-interrupt-request IPIs

Reviewed by: Bryan Cantrill <bryan@joyent.com>
Reviewed by: John Levon <john.levon@joyent.com>
Reviewed by: Robert Mustacchi <rm@joyent.com>
Reviewed by: Richard Lowe <richlowe@richlowe.net>
Approved by: Dan McDonald <danmcd@joyent.com>

16 files changed, 160 insertions, 21 deletions

diff --git a/usr/src/cmd/mdb/i86pc/modules/apix/apix.c b/usr/src/cmd/mdb/i86pc/modules/apix/apix.c
index 62ede1fd26..ca168f2cdb 100644
--- a/usr/src/cmd/mdb/i86pc/modules/apix/apix.c
+++ b/usr/src/cmd/mdb/i86pc/modules/apix/apix.c
@@ -20,6 +20,7 @@
  */
 /*
  * Copyright (c) 2010, Oracle and/or its affiliates. All rights reserved.
+ * Copyright 2018 Joyent, Inc.
  */
 
 #include "intr_common.h"
@@ -170,5 +171,9 @@ _mdb_init(void)
 		if (GELF_ST_TYPE(sym.st_info) == STT_FUNC)
 			gld_intr_addr = (uintptr_t)sym.st_value;
 
+	if (mdb_readvar(&apic_pir_vect, "apic_pir_vect") == -1) {
+		apic_pir_vect = -1;
+	}
+
 	return (&modinfo);
 }
diff --git a/usr/src/cmd/mdb/i86pc/modules/common/intr_common.c b/usr/src/cmd/mdb/i86pc/modules/common/intr_common.c
index 00f6afcbf8..86c24040fa 100644
--- a/usr/src/cmd/mdb/i86pc/modules/common/intr_common.c
+++ b/usr/src/cmd/mdb/i86pc/modules/common/intr_common.c
@@ -20,6 +20,7 @@
  */
 /*
  * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved.
+ * Copyright 2018 Joyent, Inc.
  */
 
 #include "intr_common.h"
@@ -29,6 +30,7 @@
 
 int		option_flags;
 uintptr_t	gld_intr_addr;
+int		apic_pir_vect;
 static struct av_head softvec_tbl[LOCK_LEVEL + 1];
 
 static char *businfo_array[] = {
@@ -302,11 +304,16 @@ apic_interrupt_dump(apic_irq_t *irqp, struct av_head *avp,
 
 	} else {
 		if (irqp->airq_mps_intr_index == RESERVE_INDEX &&
-		    !irqp->airq_share)
-			mdb_printf("poke_cpu");
-		else if (mdb_vread(&avhp, sizeof (struct autovec),
-		    (uintptr_t)avp->avh_link) != -1)
+		    !irqp->airq_share) {
+			if (irqp->airq_vector == apic_pir_vect) {
+				mdb_printf("pir_ipi");
+			} else {
+				mdb_printf("poke_cpu");
+			}
+		} else if (mdb_vread(&avhp, sizeof (struct autovec),
+		    (uintptr_t)avp->avh_link) != -1) {
 			mdb_printf("%a", avhp.av_vector);
+		}
 	}
 	mdb_printf("\n");
 }
@@ -446,10 +453,15 @@ apix_interrupt_ipi_dump(apix_vector_t *vectp, struct autovec *avp,
 		mdb_printf("%-9s %-3s %s%-3s %-6s %-3s %-6s %-3d   %-9s ",
 		    cpu_vector, "-  ", evtchn, ipl, "-   ", "Edg",
 		    intr_type, vectp->v_share, ioapic_iline);
-	if (!vectp->v_share)
-		mdb_printf("poke_cpu");
-	else
+	if (!vectp->v_share) {
+		if (vectp->v_vector == apic_pir_vect) {
+			mdb_printf("pir_ipi");
+		} else {
+			mdb_printf("poke_cpu");
+		}
+	} else {
 		mdb_printf("%a", avp->av_vector);
+	}
 
 	mdb_printf("\n");
 }
diff --git a/usr/src/cmd/mdb/i86pc/modules/common/intr_common.h b/usr/src/cmd/mdb/i86pc/modules/common/intr_common.h
index d2d92594ba..531cca5f2a 100644
--- a/usr/src/cmd/mdb/i86pc/modules/common/intr_common.h
+++ b/usr/src/cmd/mdb/i86pc/modules/common/intr_common.h
@@ -20,6 +20,7 @@
  */
 /*
  * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved.
+ * Copyright 2018 Joyent, Inc.
  */
 
 #ifndef _MDB_INTR_COMMON_H
@@ -73,6 +74,9 @@ extern int	option_flags;
  */
 extern uintptr_t	gld_intr_addr;
 
+/* cached the PIR ipi vector to differentiate it from poke_cpu */
+extern int	apic_pir_vect;
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/usr/src/cmd/mdb/i86pc/modules/pcplusmp/pcplusmp.c b/usr/src/cmd/mdb/i86pc/modules/pcplusmp/pcplusmp.c
index a682707337..bb24b0ae70 100644
--- a/usr/src/cmd/mdb/i86pc/modules/pcplusmp/pcplusmp.c
+++ b/usr/src/cmd/mdb/i86pc/modules/pcplusmp/pcplusmp.c
@@ -20,6 +20,7 @@
  */
 /*
  * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
+ * Copyright 2018 Joyent, Inc.
  */
 
 #include "intr_common.h"
@@ -116,5 +117,9 @@ _mdb_init(void)
 		if (GELF_ST_TYPE(sym.st_info) == STT_FUNC)
 			gld_intr_addr = (uintptr_t)sym.st_value;
 
+	if (mdb_readvar(&apic_pir_vect, "apic_pir_vect") == -1) {
+		apic_pir_vect = -1;
+	}
+
 	return (&modinfo);
 }
diff --git a/usr/src/uts/i86pc/io/apix/apix.c b/usr/src/uts/i86pc/io/apix/apix.c
index d02ffe8096..0e8d4f5fd1 100644
--- a/usr/src/uts/i86pc/io/apix/apix.c
+++ b/usr/src/uts/i86pc/io/apix/apix.c
@@ -25,9 +25,7 @@
 /*
  * Copyright (c) 2010, Intel Corporation.
  * All rights reserved.
- */
-/*
- * Copyright (c) 2017, Joyent, Inc.  All rights reserved.
+ * Copyright 2018 Joyent, Inc.
  */
 
 /*
@@ -167,6 +165,9 @@ static struct	psm_ops apix_ops = {
 	apix_intr_ops,		/* Advanced DDI Interrupt framework */
 	apic_state,		/* save, restore apic state for S3 */
 	apic_cpu_ops,		/* CPU control interface. */
+
+	apic_get_pir_ipivect,
+	apic_send_pir_ipi,
 };
 
 struct psm_ops *psmops = &apix_ops;
@@ -384,6 +385,8 @@ apix_init()
 		apic_have_32bit_cr8 = 1;
 #endif
 
+	apic_pir_vect = apix_get_ipivect(XC_CPUPOKE_PIL, -1);
+
 	/*
 	 * Initialize IRM pool parameters
 	 */
@@ -1127,9 +1130,11 @@ x2apic_update_psm()
 	 * being apix_foo as opposed to apic_foo and x2apic_foo.
 	 */
 	pops->psm_send_ipi = x2apic_send_ipi;
-
 	send_dirintf = pops->psm_send_ipi;
 
+	pops->psm_send_pir_ipi = x2apic_send_pir_ipi;
+	psm_send_pir_ipi = pops->psm_send_pir_ipi;
+
 	apic_mode = LOCAL_X2APIC;
 	apic_change_ops();
 }
@@ -2588,6 +2593,8 @@ apic_switch_ipi_callback(boolean_t enter)
 		if (apic_poweron_cnt == 0) {
 			pops->psm_send_ipi = apic_common_send_ipi;
 			send_dirintf = pops->psm_send_ipi;
+			pops->psm_send_pir_ipi = apic_common_send_pir_ipi;
+			psm_send_pir_ipi = pops->psm_send_pir_ipi;
 		}
 		apic_poweron_cnt++;
 	} else {
@@ -2596,6 +2603,8 @@ apic_switch_ipi_callback(boolean_t enter)
 		if (apic_poweron_cnt == 0) {
 			pops->psm_send_ipi = x2apic_send_ipi;
 			send_dirintf = pops->psm_send_ipi;
+			pops->psm_send_pir_ipi = x2apic_send_pir_ipi;
+			psm_send_pir_ipi = pops->psm_send_pir_ipi;
 		}
 	}
 	lock_clear(&apic_mode_switch_lock);
diff --git a/usr/src/uts/i86pc/io/apix/apix_regops.c b/usr/src/uts/i86pc/io/apix/apix_regops.c
index 1432b66a81..3c28e829ab 100644
--- a/usr/src/uts/i86pc/io/apix/apix_regops.c
+++ b/usr/src/uts/i86pc/io/apix/apix_regops.c
@@ -25,13 +25,14 @@
 /*
  * Copyright 2014 Josef 'Jeff' Sipek <jeffpc@josefsipek.net>
  * Copyright (c) 2014 by Delphix. All rights reserved.
- * Copyright 2017 Joyent, Inc.
+ * Copyright 2018 Joyent, Inc.
  */
 
 #include <sys/cpuvar.h>
 #include <sys/psm.h>
 #include <sys/archsystm.h>
 #include <sys/apic.h>
+#include <sys/apic_common.h>
 #include <sys/sunddi.h>
 #include <sys/ddi_impldefs.h>
 #include <sys/mach_intr.h>
@@ -218,6 +219,34 @@ x2apic_send_ipi(int cpun, int ipl)
 	intr_restore(flag);
 }
 
+void
+x2apic_send_pir_ipi(processorid_t cpun)
+{
+	const int vector = apic_pir_vect;
+	ulong_t flag;
+
+	ASSERT(apic_mode == LOCAL_X2APIC);
+	ASSERT((vector >= APIC_BASE_VECT) && (vector <= APIC_SPUR_INTR));
+
+	/* Serialize as described in x2apic_send_ipi() above. */
+	atomic_or_ulong(&flag, 1);
+
+	flag = intr_clear();
+
+	/* Self-IPI for inducing PIR makes no sense. */
+	if ((cpun != psm_get_cpu_id())) {
+#ifdef	DEBUG
+		/* Only for debugging. (again, see: x2apic_send_ipi) */
+		APIC_AV_PENDING_SET();
+#endif	/* DEBUG */
+
+		apic_reg_ops->apic_write_int_cmd(apic_cpus[cpun].aci_local_id,
+		    vector);
+	}
+
+	intr_restore(flag);
+}
+
 /*
  * Generates IPI to another CPU depending on the local APIC mode.
  * apic_send_ipi() and x2apic_send_ipi() depends on the configured
@@ -250,3 +279,16 @@ apic_common_send_ipi(int cpun, int ipl)
 	    vector);
 	intr_restore(flag);
 }
+
+void
+apic_common_send_pir_ipi(processorid_t cpun)
+{
+	const int mode = apic_local_mode();
+
+	if (mode == LOCAL_X2APIC) {
+		x2apic_send_pir_ipi(cpun);
+		return;
+	}
+
+	apic_send_pir_ipi(cpun);
+}
diff --git a/usr/src/uts/i86pc/io/pcplusmp/apic.c b/usr/src/uts/i86pc/io/pcplusmp/apic.c
index e63544087a..93ee3380ed 100644
--- a/usr/src/uts/i86pc/io/pcplusmp/apic.c
+++ b/usr/src/uts/i86pc/io/pcplusmp/apic.c
@@ -25,9 +25,7 @@
 /*
  * Copyright (c) 2010, Intel Corporation.
  * All rights reserved.
- */
-/*
- * Copyright (c) 2017, Joyent, Inc.  All rights reserved.
+ * Copyright 2018 Joyent, Inc.
  */
 
 /*
@@ -202,6 +200,9 @@ static struct	psm_ops apic_ops = {
 	apic_intr_ops,			/* Advanced DDI Interrupt framework */
 	apic_state,			/* save, restore apic state for S3 */
 	apic_cpu_ops,			/* CPU control interface. */
+
+	apic_get_pir_ipivect,
+	apic_send_pir_ipi,
 };
 
 struct psm_ops *psmops = &apic_ops;
@@ -298,6 +299,8 @@ apic_init(void)
 		apic_ipltopri[j] = (i << APIC_IPL_SHIFT) + APIC_BASE_VECT;
 	apic_init_common();
 
+	apic_pir_vect = apic_get_ipivect(XC_CPUPOKE_PIL, -1);
+
 #if !defined(__amd64)
 	if (cpuid_have_cr8access(CPU))
 		apic_have_32bit_cr8 = 1;
diff --git a/usr/src/uts/i86pc/io/pcplusmp/apic_common.c b/usr/src/uts/i86pc/io/pcplusmp/apic_common.c
index f5f5fcfe1a..4eedcbcf02 100644
--- a/usr/src/uts/i86pc/io/pcplusmp/apic_common.c
+++ b/usr/src/uts/i86pc/io/pcplusmp/apic_common.c
@@ -23,7 +23,7 @@
  * Copyright (c) 2010, Oracle and/or its affiliates. All rights reserved.
  */
 /*
- * Copyright (c) 2017, Joyent, Inc.  All rights reserved.
+ * Copyright 2018 Joyent, Inc.
  * Copyright (c) 2016, 2017 by Delphix. All rights reserved.
  */
 
@@ -130,6 +130,8 @@ int cmci_cpu_setup_registered;
 
 lock_t apic_mode_switch_lock;
 
+int apic_pir_vect;
+
 /*
  * Patchable global variables.
  */
@@ -629,6 +631,31 @@ apic_send_ipi(int cpun, int ipl)
 	intr_restore(flag);
 }
 
+void
+apic_send_pir_ipi(processorid_t cpun)
+{
+	const int vector = apic_pir_vect;
+	ulong_t flag;
+
+	ASSERT((vector >= APIC_BASE_VECT) && (vector <= APIC_SPUR_INTR));
+
+	flag = intr_clear();
+
+	/* Self-IPI for inducing PIR makes no sense. */
+	if ((cpun != psm_get_cpu_id())) {
+		APIC_AV_PENDING_SET();
+		apic_reg_ops->apic_write_int_cmd(apic_cpus[cpun].aci_local_id,
+		    vector);
+	}
+
+	intr_restore(flag);
+}
+
+int
+apic_get_pir_ipivect(void)
+{
+	return (apic_pir_vect);
+}
 
 /*ARGSUSED*/
 void
diff --git a/usr/src/uts/i86pc/io/psm/uppc.c b/usr/src/uts/i86pc/io/psm/uppc.c
index adfd5079a1..c22154d1a7 100644
--- a/usr/src/uts/i86pc/io/psm/uppc.c
+++ b/usr/src/uts/i86pc/io/psm/uppc.c
@@ -21,6 +21,7 @@
 /*
  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
+ * Copyright 2018 Joyent, Inc.
  */
 
 #define	PSMI_1_7
@@ -174,7 +175,10 @@ static struct	psm_ops uppc_ops = {
 	    psm_intr_op_t, int *))NULL,		/* psm_intr_ops		*/
 
 	uppc_state,				/* psm_state		*/
-	(int (*)(psm_cpu_request_t *))NULL	/* psm_cpu_ops		*/
+	(int (*)(psm_cpu_request_t *))NULL,	/* psm_cpu_ops		*/
+
+	(int (*)(void))NULL,			/* psm_get_pir_ipivect	*/
+	(void (*)(processorid_t))NULL,		/* psm_send_pir_ipi	*/
 };
 
 
diff --git a/usr/src/uts/i86pc/os/mp_machdep.c b/usr/src/uts/i86pc/os/mp_machdep.c
index 7062df90ff..48e14c0f9f 100644
--- a/usr/src/uts/i86pc/os/mp_machdep.c
+++ b/usr/src/uts/i86pc/os/mp_machdep.c
@@ -25,6 +25,7 @@
 /*
  * Copyright (c) 2009-2010, Intel Corporation.
  * All rights reserved.
+ * Copyright 2018 Joyent, Inc.
  */
 
 #define	PSMI_1_7
@@ -148,6 +149,8 @@ int (*psm_get_ipivect)(int, int) = NULL;
 uchar_t (*psm_get_ioapicid)(uchar_t) = NULL;
 uint32_t (*psm_get_localapicid)(uint32_t) = NULL;
 uchar_t (*psm_xlate_vector_by_irq)(uchar_t) = NULL;
+int (*psm_get_pir_ipivect)(void) = NULL;
+void (*psm_send_pir_ipi)(processorid_t) = NULL;
 
 int (*psm_clkinit)(int) = NULL;
 void (*psm_timer_reprogram)(hrtime_t) = NULL;
@@ -1153,6 +1156,9 @@ mach_smpinit(void)
 	}
 
 	psm_get_ipivect = pops->psm_get_ipivect;
+	psm_get_pir_ipivect = pops->psm_get_pir_ipivect;
+	psm_send_pir_ipi = pops->psm_send_pir_ipi;
+
 
 	(void) add_avintr((void *)NULL, XC_HI_PIL, xc_serv, "xc_intr",
 	    (*pops->psm_get_ipivect)(XC_HI_PIL, PSM_INTR_IPI_HI),
diff --git a/usr/src/uts/i86pc/sys/apic.h b/usr/src/uts/i86pc/sys/apic.h
index 0ad325ac49..26626ec5a4 100644
--- a/usr/src/uts/i86pc/sys/apic.h
+++ b/usr/src/uts/i86pc/sys/apic.h
@@ -20,7 +20,7 @@
  */
 /*
  * Copyright (c) 1993, 2010, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2017 Joyent, Inc.
+ * Copyright 2018 Joyent, Inc.
  * Copyright (c) 2017 by Delphix. All rights reserved.
  */
 /*
@@ -832,6 +832,7 @@ extern void apic_change_eoi();
 extern void apic_send_EOI(uint32_t);
 extern void apic_send_directed_EOI(uint32_t);
 extern uint64_t apic_calibrate();
+extern void x2apic_send_pir_ipi(processorid_t);
 
 extern volatile uint32_t *apicadr;	/* virtual addr of local APIC   */
 extern int apic_forceload;
@@ -878,6 +879,7 @@ extern void apic_change_ops();
 extern void apic_common_send_ipi(int, int);
 extern void apic_set_directed_EOI_handler();
 extern int apic_directed_EOI_supported();
+extern void apic_common_send_pir_ipi(processorid_t);
 
 extern apic_intrmap_ops_t *apic_vt_ops;
 
diff --git a/usr/src/uts/i86pc/sys/apic_common.h b/usr/src/uts/i86pc/sys/apic_common.h
index 2eb7bc2597..71e43e5863 100644
--- a/usr/src/uts/i86pc/sys/apic_common.h
+++ b/usr/src/uts/i86pc/sys/apic_common.h
@@ -23,7 +23,7 @@
  * Copyright (c) 2017 by Delphix. All rights reserved.
  */
 /*
- * Copyright (c) 2013, Joyent, Inc.  All rights reserved.
+ * Copyright 2018 Joyent, Inc.
  */
 
 #ifndef _SYS_APIC_COMMON_H
@@ -116,6 +116,8 @@ extern int	apic_panic_on_apic_error;
 
 extern int	apic_verbose;
 
+extern int	apic_pir_vect;
+
 #ifdef DEBUG
 extern int	apic_debug;
 extern int	apic_restrict_vector;
@@ -183,6 +185,8 @@ extern void	apic_shutdown(int cmd, int fcn);
 extern void	apic_preshutdown(int cmd, int fcn);
 extern processorid_t	apic_get_next_processorid(processorid_t cpun);
 extern uint64_t	apic_calibrate();
+extern int	apic_get_pir_ipivect(void);
+extern void	apic_send_pir_ipi(processorid_t);
 
 extern int apic_error_intr();
 extern void apic_cpcovf_mask_clear(void);
diff --git a/usr/src/uts/i86pc/sys/psm_types.h b/usr/src/uts/i86pc/sys/psm_types.h
index 24ad7d700f..6b779373b5 100644
--- a/usr/src/uts/i86pc/sys/psm_types.h
+++ b/usr/src/uts/i86pc/sys/psm_types.h
@@ -26,6 +26,7 @@
 /*
  * Copyright (c) 2010, Intel Corporation.
  * All rights reserved.
+ * Copyright 2018 Joyent, Inc.
  */
 
 #ifndef	_SYS_PSM_TYPES_H
@@ -190,6 +191,9 @@ struct 	psm_ops {
 #endif
 #if defined(PSMI_1_7)
 	int	(*psm_cpu_ops)(psm_cpu_request_t *reqp);
+
+	int	(*psm_get_pir_ipivect)(void);
+	void	(*psm_send_pir_ipi)(processorid_t cpu);
 #endif
 };
 
diff --git a/usr/src/uts/i86pc/sys/smp_impldefs.h b/usr/src/uts/i86pc/sys/smp_impldefs.h
index 77a203042c..2848b1b3c2 100644
--- a/usr/src/uts/i86pc/sys/smp_impldefs.h
+++ b/usr/src/uts/i86pc/sys/smp_impldefs.h
@@ -21,6 +21,7 @@
 
 /*
  * Copyright (c) 1993, 2010, Oracle and/or its affiliates. All rights reserved.
+ * Copyright 2018 Joyent, Inc.
  */
 
 #ifndef _SYS_SMP_IMPLDEFS_H
@@ -64,6 +65,7 @@ extern void (*psm_enable_intr)(processorid_t); /* enable intr to cpu	*/
 extern int (*psm_get_clockirq)(int); /* get clock vector		*/
 extern int (*psm_get_ipivect)(int, int); /* get interprocessor intr vec */
 extern int (*psm_clkinit)(int);	/* timer init entry point		*/
+extern int (*psm_cached_ipivect)(int, int); /* get cached ipi vec	*/
 extern void (*psm_timer_reprogram)(hrtime_t); /* timer reprogram	*/
 extern void (*psm_timer_enable)(void);		/* timer enable		*/
 extern void (*psm_timer_disable)(void);		/* timer disable	*/
@@ -72,6 +74,8 @@ extern int (*psm_state)(psm_state_request_t *); /* psm state save/restore */
 extern uchar_t (*psm_get_ioapicid)(uchar_t);	/* get io-apic id */
 extern uint32_t (*psm_get_localapicid)(uint32_t);	/* get local-apic id */
 extern uchar_t (*psm_xlate_vector_by_irq)(uchar_t); /* get vector for an irq */
+extern int (*psm_get_pir_ipivect)(void); /* get PIR (for VMM) ipi vect	*/
+extern void (*psm_send_pir_ipi)(processorid_t);	/* send PIR ipi		*/
 
 extern int (*slvltovect)(int);	/* ipl interrupt priority level		*/
 extern int (*setlvl)(int, int *); /* set intr pri represented by vect	*/
diff --git a/usr/src/uts/i86xpv/io/psm/xpv_psm.c b/usr/src/uts/i86xpv/io/psm/xpv_psm.c
index c59d1015a0..7f1ac2170a 100644
--- a/usr/src/uts/i86xpv/io/psm/xpv_psm.c
+++ b/usr/src/uts/i86xpv/io/psm/xpv_psm.c
@@ -22,6 +22,7 @@
 /*
  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
+ * Copyright 2018 Joyent, Inc.
  */
 
 #define	PSMI_1_7
@@ -1673,7 +1674,10 @@ static struct psm_ops xen_psm_ops = {
 	(void (*)(int, int))NULL,		/* psm_preshutdown	*/
 	xen_intr_ops,			/* Advanced DDI Interrupt framework */
 	(int (*)(psm_state_request_t *))NULL,	/* psm_state		*/
-	(int (*)(psm_cpu_request_t *))NULL	/* psm_cpu_ops		*/
+	(int (*)(psm_cpu_request_t *))NULL,	/* psm_cpu_ops		*/
+
+	(int (*)(void))NULL,			/* psm_get_pir_ipivect	*/
+	(void (*)(processorid_t))NULL,		/* psm_send_pir_ipi	*/
 };
 
 static struct psm_info xen_psm_info = {
diff --git a/usr/src/uts/i86xpv/io/psm/xpv_uppc.c b/usr/src/uts/i86xpv/io/psm/xpv_uppc.c
index d50b7f504e..fa6a079826 100644
--- a/usr/src/uts/i86xpv/io/psm/xpv_uppc.c
+++ b/usr/src/uts/i86xpv/io/psm/xpv_uppc.c
@@ -22,6 +22,7 @@
 /*
  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
+ * Copyright 2018 Joyent, Inc.
  */
 
 #define	PSMI_1_7
@@ -892,7 +893,10 @@ static struct psm_ops xen_uppc_ops = {
 	(int (*)(dev_info_t *, ddi_intr_handle_impl_t *,
 	    psm_intr_op_t, int *))NULL,		/* psm_intr_ops		*/
 	(int (*)(psm_state_request_t *))NULL,	/* psm_state		*/
-	(int (*)(psm_cpu_request_t *))NULL	/* psm_cpu_ops		*/
+	(int (*)(psm_cpu_request_t *))NULL,	/* psm_cpu_ops		*/
+
+	(int (*)(void))NULL,			/* psm_get_pir_ipivect	*/
+	(void (*)(processorid_t))NULL,		/* psm_send_pir_ipi	*/
 };
 
 static struct psm_info xen_uppc_info = {