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| author | Josef 'Jeff' Sipek <jeffpc@josefsipek.net> | 2014-03-11 13:05:59 -0400 |
|---|---|---|
| committer | Robert Mustacchi <rm@joyent.com> | 2014-04-07 09:02:55 -0700 |
| commit | 29ddbbefe0da081f1b541515eaa79fba9b663896 (patch) | |
| tree | 44d08267cb881a21a156006751730d0e25ebc158 /usr/src | |
| parent | 32842aabdc7c6f8f0c6140a256cf42cf5404fefb (diff) | |
| download | illumos-gate-29ddbbefe0da081f1b541515eaa79fba9b663896.tar.gz | |
4665 pcplusmp open-codes register operations
Reviewed by: Dan McDonald <danmcd@omniti.com>
Reviewed by: Robert Mustacchi <rm@joyent.com>
Reviewed by: Hans Rosenfeld <hans.rosenfeld@nexenta.com>
Approved by: Robert Mustacchi <rm@joyent.com>
Diffstat (limited to 'usr/src')
| -rw-r--r-- | usr/src/uts/i86pc/io/pcplusmp/apic.c | 59 |
1 files changed, 7 insertions, 52 deletions
diff --git a/usr/src/uts/i86pc/io/pcplusmp/apic.c b/usr/src/uts/i86pc/io/pcplusmp/apic.c index a678c41189..db5674aa5a 100644 --- a/usr/src/uts/i86pc/io/pcplusmp/apic.c +++ b/usr/src/uts/i86pc/io/pcplusmp/apic.c @@ -571,23 +571,9 @@ apic_intr_enter(int ipl, int *vectorp) nipl = apic_ipls[vector]; *vectorp = apic_vector_to_irq[vector + APIC_BASE_VECT]; - if (apic_mode == LOCAL_APIC) { -#if defined(__amd64) - setcr8((ulong_t)(apic_ipltopri[nipl] >> - APIC_IPL_SHIFT)); -#else - if (apic_have_32bit_cr8) - setcr8((ulong_t)(apic_ipltopri[nipl] >> - APIC_IPL_SHIFT)); - else - LOCAL_APIC_WRITE_REG(APIC_TASK_REG, - (uint32_t)apic_ipltopri[nipl]); -#endif - LOCAL_APIC_WRITE_REG(APIC_EOI_REG, 0); - } else { - X2APIC_WRITE(APIC_TASK_REG, apic_ipltopri[nipl]); - X2APIC_WRITE(APIC_EOI_REG, 0); - } + + apic_reg_ops->apic_write_task_reg(apic_ipltopri[nipl]); + apic_reg_ops->apic_send_eoi(0); return (nipl); } @@ -618,20 +604,7 @@ apic_intr_enter(int ipl, int *vectorp) nipl = apic_ipls[vector]; *vectorp = irq = apic_vector_to_irq[vector + APIC_BASE_VECT]; - if (apic_mode == LOCAL_APIC) { -#if defined(__amd64) - setcr8((ulong_t)(apic_ipltopri[nipl] >> APIC_IPL_SHIFT)); -#else - if (apic_have_32bit_cr8) - setcr8((ulong_t)(apic_ipltopri[nipl] >> - APIC_IPL_SHIFT)); - else - LOCAL_APIC_WRITE_REG(APIC_TASK_REG, - (uint32_t)apic_ipltopri[nipl]); -#endif - } else { - X2APIC_WRITE(APIC_TASK_REG, apic_ipltopri[nipl]); - } + apic_reg_ops->apic_write_task_reg(apic_ipltopri[nipl]); cpu_infop->aci_current[nipl] = (uchar_t)irq; cpu_infop->aci_curipl = (uchar_t)nipl; @@ -643,11 +616,7 @@ apic_intr_enter(int ipl, int *vectorp) * cache usage. So, we leave it as is. */ if (!apic_level_intr[irq]) { - if (apic_mode == LOCAL_APIC) { - LOCAL_APIC_WRITE_REG(APIC_EOI_REG, 0); - } else { - X2APIC_WRITE(APIC_EOI_REG, 0); - } + apic_reg_ops->apic_send_eoi(0); } #ifdef DEBUG @@ -687,14 +656,7 @@ apic_intr_exit(int prev_ipl, int irq) { apic_cpus_info_t *cpu_infop; -#if defined(__amd64) - setcr8((ulong_t)(apic_ipltopri[prev_ipl] >> APIC_IPL_SHIFT)); -#else - if (apic_have_32bit_cr8) - setcr8((ulong_t)(apic_ipltopri[prev_ipl] >> APIC_IPL_SHIFT)); - else - apicadr[APIC_TASK_REG] = apic_ipltopri[prev_ipl]; -#endif + apic_reg_ops->apic_write_task_reg(apic_ipltopri[prev_ipl]); APIC_INTR_EXIT(); } @@ -729,14 +691,7 @@ psm_intr_exit_fn(void) static void apic_setspl(int ipl) { -#if defined(__amd64) - setcr8((ulong_t)(apic_ipltopri[ipl] >> APIC_IPL_SHIFT)); -#else - if (apic_have_32bit_cr8) - setcr8((ulong_t)(apic_ipltopri[ipl] >> APIC_IPL_SHIFT)); - else - apicadr[APIC_TASK_REG] = apic_ipltopri[ipl]; -#endif + apic_reg_ops->apic_write_task_reg(apic_ipltopri[ipl]); /* interrupts at ipl above this cannot be in progress */ apic_cpus[psm_get_cpu_id()].aci_ISR_in_progress &= (2 << ipl) - 1; |