14420 Need support for Intel I219 v16-v23

Reviewed by: Brian Bennett <brian.bennett@joyent.com>
Approved by: Gordon Ross <gordon.w.ross@gmail.com>

7 files changed, 137 insertions, 9 deletions

diff --git a/usr/src/man/man7d/e1000g.7d b/usr/src/man/man7d/e1000g.7d
index ffa71f9d20..3582d0dc20 100644
--- a/usr/src/man/man7d/e1000g.7d
+++ b/usr/src/man/man7d/e1000g.7d
@@ -10,8 +10,9 @@
 .\"
 .\"
 .\" Copyright 2020 Robert Mustacchi
+.\" Copyright 2022 Oxide Computer Company
 .\"
-.Dd March 14, 2020
+.Dd January 17, 2022
 .Dt E1000G 7D
 .Os
 .Sh NAME
@@ -140,9 +141,9 @@ Ethernet Connection I218-LM v1-3
 .It
 Ethernet Connection I218-V v1-3
 .It
-Ethernet Connection I219-LM v1-15
+Ethernet Connection I219-LM v1-23
 .It
-Ethernet Connection I219-V v1-14
+Ethernet Connection I219-V v1-23
 .El
 .Pp
 The following specific devices are supported by this driver:
diff --git a/usr/src/pkg/manifests/driver-network-e1000g.p5m b/usr/src/pkg/manifests/driver-network-e1000g.p5m
index 8eb5247e29..28cfe93d77 100644
--- a/usr/src/pkg/manifests/driver-network-e1000g.p5m
+++ b/usr/src/pkg/manifests/driver-network-e1000g.p5m
@@ -51,6 +51,10 @@ driver name=e1000g perms="* 0666 root sys" clone_perms="e1000g 0666 root sys" \
     alias=pci8086,d4f,p \
     alias=pci8086,d53,p \
     alias=pci8086,d55,p \
+    alias=pci8086,dc5,p \
+    alias=pci8086,dc6,p \
+    alias=pci8086,dc7,p \
+    alias=pci8086,dc8,p \
     alias=pci8086,1000 \
     alias=pci8086,1001 \
     alias=pci8086,1004.0e11.49 \
@@ -172,11 +176,24 @@ driver name=e1000g perms="* 0666 root sys" clone_perms="e1000g 0666 root sys" \
     alias=pci8086,15e2 \
     alias=pci8086,15e3 \
     alias=pci8086,15f4,p \
+    alias=pci8086,15f5,p \
     alias=pci8086,15f9,p \
     alias=pci8086,15fa,p \
     alias=pci8086,15fb,p \
     alias=pci8086,15fc,p \
+    alias=pci8086,1a1c,p \
+    alias=pci8086,1a1d,p \
+    alias=pci8086,1a1e,p \
+    alias=pci8086,1a1f,p \
     alias=pci8086,294c \
+    alias=pci8086,550a,p \
+    alias=pci8086,550b,p \
+    alias=pci8086,550c,p \
+    alias=pci8086,550d,p \
+    alias=pci8086,550e,p \
+    alias=pci8086,550f,p \
+    alias=pci8086,5510,p \
+    alias=pci8086,5511,p \
     alias=pci8086,f0fe \
     alias=pciex8086,d4c \
     alias=pciex8086,d4d \
@@ -184,6 +201,10 @@ driver name=e1000g perms="* 0666 root sys" clone_perms="e1000g 0666 root sys" \
     alias=pciex8086,d4f \
     alias=pciex8086,d53 \
     alias=pciex8086,d55 \
+    alias=pciex8086,dc5 \
+    alias=pciex8086,dc6 \
+    alias=pciex8086,dc7 \
+    alias=pciex8086,dc8 \
     alias=pciex8086,1049 \
     alias=pciex8086,104a \
     alias=pciex8086,104b \
@@ -259,11 +280,24 @@ driver name=e1000g perms="* 0666 root sys" clone_perms="e1000g 0666 root sys" \
     alias=pciex8086,15e2 \
     alias=pciex8086,15e3 \
     alias=pciex8086,15f4 \
+    alias=pciex8086,15f5 \
     alias=pciex8086,15f9 \
     alias=pciex8086,15fa \
     alias=pciex8086,15fb \
     alias=pciex8086,15fc \
+    alias=pciex8086,1a1c \
+    alias=pciex8086,1a1d \
+    alias=pciex8086,1a1e \
+    alias=pciex8086,1a1f \
     alias=pciex8086,294c \
+    alias=pciex8086,550a \
+    alias=pciex8086,550b \
+    alias=pciex8086,550c \
+    alias=pciex8086,550d \
+    alias=pciex8086,550e \
+    alias=pciex8086,550f \
+    alias=pciex8086,5510 \
+    alias=pciex8086,5511 \
     alias=pciex8086,f0fe
 legacy pkg=SUNWintgige desc="Intel(R) PRO/1000 Server Adapter Driver" \
     name="Intel(R) PRO/1000 Server Adapter Driver"
diff --git a/usr/src/uts/common/io/e1000api/README.illumos b/usr/src/uts/common/io/e1000api/README.illumos
index d00891614d..e88eddc913 100644
--- a/usr/src/uts/common/io/e1000api/README.illumos
+++ b/usr/src/uts/common/io/e1000api/README.illumos
@@ -45,11 +45,12 @@ are. DO NOT just blindly copy over new common code. There is more work that
 needs to be done in terms of changed interfaces and expectations for the
 drivers.
 
-# Support for Ice Lake, Cannon Lake, and Tiger Lake
+# Support for Ice Lake, Cannon Lake, Tiger Lake, and the more recent I219 LM/V
 
 Due to several changes that have been made to the core e1000 code in
 FreeBSD that's specific to changes for iflib, a whole sale update was
-not done and instead support was manually merged based on Intel.
+not done and instead support was manually merged based on information from
+Intel.
 
 # e1000_defines.h
 
diff --git a/usr/src/uts/common/io/e1000api/e1000_api.c b/usr/src/uts/common/io/e1000api/e1000_api.c
index a6e8d2378d..80e6805503 100644
--- a/usr/src/uts/common/io/e1000api/e1000_api.c
+++ b/usr/src/uts/common/io/e1000api/e1000_api.c
@@ -331,8 +331,33 @@ s32 e1000_set_mac_type(struct e1000_hw *hw)
 	case E1000_DEV_ID_PCH_TGP_I219_LM14:
 	case E1000_DEV_ID_PCH_TGP_I219_V14:
 	case E1000_DEV_ID_PCH_TGP_I219_LM15:
+	case E1000_DEV_ID_PCH_TGP_I219_V15:
 		mac->type = e1000_pch_tgp;
 		break;
+	case E1000_DEV_ID_PCH_ADP_I219_LM16:
+	case E1000_DEV_ID_PCH_ADP_I219_V16:
+	case E1000_DEV_ID_PCH_ADP_I219_LM17:
+	case E1000_DEV_ID_PCH_ADP_I219_V17:
+		mac->type = e1000_pch_adp;
+		break;
+	case E1000_DEV_ID_PCH_MTP_I219_LM18:
+	case E1000_DEV_ID_PCH_MTP_I219_V18:
+	case E1000_DEV_ID_PCH_MTP_I219_LM19:
+	case E1000_DEV_ID_PCH_MTP_I219_V19:
+		mac->type = e1000_pch_mtp;
+		break;
+	case E1000_DEV_ID_PCH_LNP_I219_LM20:
+	case E1000_DEV_ID_PCH_LNP_I219_V20:
+	case E1000_DEV_ID_PCH_LNP_I219_LM21:
+	case E1000_DEV_ID_PCH_LNP_I219_V21:
+		mac->type = e1000_pch_lnp;
+		break;
+	case E1000_DEV_ID_PCH_RPL_I219_LM22:
+	case E1000_DEV_ID_PCH_RPL_I219_V22:
+	case E1000_DEV_ID_PCH_RPL_I219_LM23:
+	case E1000_DEV_ID_PCH_RPL_I219_V23:
+		mac->type = e1000_pch_rpl;
+		break;
 	case E1000_DEV_ID_82575EB_COPPER:
 	case E1000_DEV_ID_82575EB_FIBER_SERDES:
 	case E1000_DEV_ID_82575GB_QUAD_COPPER:
diff --git a/usr/src/uts/common/io/e1000api/e1000_hw.h b/usr/src/uts/common/io/e1000api/e1000_hw.h
index a9bb3cef75..9d440c3e71 100644
--- a/usr/src/uts/common/io/e1000api/e1000_hw.h
+++ b/usr/src/uts/common/io/e1000api/e1000_hw.h
@@ -165,6 +165,23 @@ struct e1000_hw;
 #define E1000_DEV_ID_PCH_TGP_I219_LM14		0x15F9
 #define E1000_DEV_ID_PCH_TGP_I219_V14		0x15FA
 #define E1000_DEV_ID_PCH_TGP_I219_LM15		0x15F4
+#define E1000_DEV_ID_PCH_TGP_I219_V15		0x15F5
+#define E1000_DEV_ID_PCH_ADP_I219_LM16		0x1A1E
+#define E1000_DEV_ID_PCH_ADP_I219_V16		0x1A1F
+#define E1000_DEV_ID_PCH_ADP_I219_LM17		0x1A1C
+#define E1000_DEV_ID_PCH_ADP_I219_V17		0x1A1D
+#define E1000_DEV_ID_PCH_MTP_I219_LM18		0x550A
+#define E1000_DEV_ID_PCH_MTP_I219_V18		0x550B
+#define E1000_DEV_ID_PCH_MTP_I219_LM19		0x550C
+#define E1000_DEV_ID_PCH_MTP_I219_V19		0x550D
+#define E1000_DEV_ID_PCH_LNP_I219_LM20		0x550E
+#define E1000_DEV_ID_PCH_LNP_I219_V20		0x550F
+#define E1000_DEV_ID_PCH_LNP_I219_LM21		0x5510
+#define E1000_DEV_ID_PCH_LNP_I219_V21		0x5511
+#define E1000_DEV_ID_PCH_RPL_I219_LM22		0x0DC7
+#define E1000_DEV_ID_PCH_RPL_I219_V22		0x0DC8
+#define E1000_DEV_ID_PCH_RPL_I219_LM23		0x0DC5
+#define E1000_DEV_ID_PCH_RPL_I219_V23		0x0DC6
 #define E1000_DEV_ID_82576			0x10C9
 #define E1000_DEV_ID_82576_FIBER		0x10E6
 #define E1000_DEV_ID_82576_SERDES		0x10E7
@@ -254,9 +271,10 @@ enum e1000_mac_type {
 	/*
 	 * The following MACs all share the ich8 style of hardware and are
 	 * implemented in ich8, though some are a little more different than
-	 * others. The pch_lpt, pch_spt, pch_cnp, and pch_tgp families are a bit
-	 * more different than the others and just have slight variants in
-	 * behavior between them. They are ordered based on release.
+	 * others. The pch_lpt, pch_spt, pch_cnp, pch_tgp, pch_adp, pch_mtp,
+	 * pch_lnp, and pch_rpl families are a bit more different than the
+	 * others and just have slight variants in behavior between them. They
+	 * are ordered based on release.
 	 */
 	e1000_ich8lan,
 	e1000_ich9lan,
@@ -267,6 +285,10 @@ enum e1000_mac_type {
 	e1000_pch_spt,
 	e1000_pch_cnp,
 	e1000_pch_tgp,
+	e1000_pch_adp,
+	e1000_pch_mtp,
+	e1000_pch_lnp,
+	e1000_pch_rpl,
 	/*
 	 * After this point all MACs are used by the igb(7D) driver as opposed
 	 * to e1000g(7D). If a new MAC is specific to e1000g series of devices,
diff --git a/usr/src/uts/common/io/e1000api/e1000_ich8lan.c b/usr/src/uts/common/io/e1000api/e1000_ich8lan.c
index 57f03e211b..a6bab1312f 100644
--- a/usr/src/uts/common/io/e1000api/e1000_ich8lan.c
+++ b/usr/src/uts/common/io/e1000api/e1000_ich8lan.c
@@ -346,6 +346,10 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)
 	case e1000_pch_spt:
 	case e1000_pch_cnp:
 	case e1000_pch_tgp:
+	case e1000_pch_adp:
+	case e1000_pch_mtp:
+	case e1000_pch_lnp:
+	case e1000_pch_rpl:
 		if (e1000_phy_is_accessible_pchlan(hw))
 			break;
 
@@ -496,6 +500,10 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw)
 		case e1000_pch_spt:
 		case e1000_pch_cnp:
 		case e1000_pch_tgp:
+		case e1000_pch_adp:
+		case e1000_pch_mtp:
+		case e1000_pch_lnp:
+		case e1000_pch_rpl:
 			/* In case the PHY needs to be in mdio slow mode,
 			 * set slow mode and try to get the PHY id again.
 			 */
@@ -799,6 +807,10 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
 	case e1000_pch_spt:
 	case e1000_pch_cnp:
 	case e1000_pch_tgp:
+	case e1000_pch_adp:
+	case e1000_pch_mtp:
+	case e1000_pch_lnp:
+	case e1000_pch_rpl:
 		/* multicast address update for pch2 */
 		mac->ops.update_mc_addr_list =
 			e1000_update_mc_addr_list_pch2lan;
@@ -1832,6 +1844,10 @@ void e1000_init_function_pointers_ich8lan(struct e1000_hw *hw)
 	case e1000_pch_spt:
 	case e1000_pch_cnp:
 	case e1000_pch_tgp:
+	case e1000_pch_adp:
+	case e1000_pch_mtp:
+	case e1000_pch_lnp:
+	case e1000_pch_rpl:
 		hw->phy.ops.init_params = e1000_init_phy_params_pchlan;
 		break;
 	default:
@@ -2298,6 +2314,10 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)
 	case e1000_pch_spt:
 	case e1000_pch_cnp:
 	case e1000_pch_tgp:
+	case e1000_pch_adp:
+	case e1000_pch_mtp:
+	case e1000_pch_lnp:
+	case e1000_pch_rpl:
 		sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M;
 		break;
 	default:
@@ -3417,6 +3437,10 @@ static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)
 	case e1000_pch_spt:
 	case e1000_pch_cnp:
 	case e1000_pch_tgp:
+	case e1000_pch_adp:
+	case e1000_pch_mtp:
+	case e1000_pch_lnp:
+	case e1000_pch_rpl:
 		bank1_offset = nvm->flash_bank_size;
 		act_offset = E1000_ICH_NVM_SIG_WORD;
 
@@ -4393,6 +4417,10 @@ static s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw)
 	case e1000_pch_spt:
 	case e1000_pch_cnp:
 	case e1000_pch_tgp:
+	case e1000_pch_adp:
+	case e1000_pch_mtp:
+	case e1000_pch_lnp:
+	case e1000_pch_rpl:
 		word = NVM_COMPAT;
 		valid_csum_mask = NVM_COMPAT_VALID_CSUM;
 		break;
diff --git a/usr/src/uts/common/io/e1000g/e1000g_main.c b/usr/src/uts/common/io/e1000g/e1000g_main.c
index 7d55a00682..eb579a54ee 100644
--- a/usr/src/uts/common/io/e1000g/e1000g_main.c
+++ b/usr/src/uts/common/io/e1000g/e1000g_main.c
@@ -26,6 +26,7 @@
  * Copyright 2012 DEY Storage Systems, Inc.  All rights reserved.
  * Copyright 2013 Nexenta Systems, Inc.  All rights reserved.
  * Copyright (c) 2018, Joyent, Inc.
+ * Copyright 2022 Oxide Computer Company
  */
 
 /*
@@ -51,7 +52,7 @@
 
 static char ident[] = "Intel PRO/1000 Ethernet";
 /* LINTED E_STATIC_UNUSED */
-static char e1000g_version[] = "Driver Ver. 5.3.24";
+static char e1000g_version[] = "Driver Ver. 5.4.00";
 
 /*
  * Proto types for DDI entry points
@@ -713,6 +714,10 @@ e1000g_regs_map(struct e1000g *Adapter)
 	case e1000_pch_spt:
 	case e1000_pch_cnp:
 	case e1000_pch_tgp:
+	case e1000_pch_adp:
+	case e1000_pch_mtp:
+	case e1000_pch_lnp:
+	case e1000_pch_rpl:
 		/*
 		 * On the SPT, the device flash is actually in BAR0, not a
 		 * separate BAR. Therefore we end up setting the
@@ -913,6 +918,10 @@ e1000g_setup_max_mtu(struct e1000g *Adapter)
 	case e1000_pch_spt:
 	case e1000_pch_cnp:
 	case e1000_pch_tgp:
+	case e1000_pch_adp:
+	case e1000_pch_mtp:
+	case e1000_pch_lnp:
+	case e1000_pch_rpl:
 		Adapter->max_mtu = MAXIMUM_MTU_9K;
 		break;
 	/* types with a special limit */
@@ -1494,6 +1503,14 @@ e1000g_init(struct e1000g *Adapter)
 		pba = E1000_PBA_26K;
 	} else if (hw->mac.type == e1000_pch_tgp) {
 		pba = E1000_PBA_26K;
+	} else if (hw->mac.type == e1000_pch_adp) {
+		pba = E1000_PBA_26K;
+	} else if (hw->mac.type == e1000_pch_mtp) {
+		pba = E1000_PBA_26K;
+	} else if (hw->mac.type == e1000_pch_lnp) {
+		pba = E1000_PBA_26K;
+	} else if (hw->mac.type == e1000_pch_rpl) {
+		pba = E1000_PBA_26K;
 	} else {
 		/*
 		 * Total FIFO is 40K