6747163 Ultra 40 panic when booting

6747598 nv_sata: SGPIO implementation should not even look at CK804 controllers

2 files changed, 38 insertions, 1 deletions

diff --git a/usr/src/uts/common/io/sata/adapters/nv_sata/nv_sata.c b/usr/src/uts/common/io/sata/adapters/nv_sata/nv_sata.c
index 89be9bda02..b76bdcd590 100644
--- a/usr/src/uts/common/io/sata/adapters/nv_sata/nv_sata.c
+++ b/usr/src/uts/common/io/sata/adapters/nv_sata/nv_sata.c
@@ -951,6 +951,10 @@ nv_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp, int *rvalp)
 		return (EBADF);
 	}
 
+	if ((nvc->nvc_sgp_cbp == NULL) || (nvc->nvc_sgp_cmn == NULL)) {
+		return (EBADF);
+	}
+
 	switch (cmd) {
 	case DEVCTL_SET_LED:
 		status = ddi_copyin((void *)arg, &led,
@@ -2323,7 +2327,7 @@ nv_init_ctl(nv_ctl_t *nvc, ddi_acc_handle_t pci_conf_handle)
 {
 	struct sata_hba_tran stran;
 	nv_port_t *nvp;
-	int j, ck804 = B_TRUE;
+	int j, ck804;
 	uchar_t *cmd_addr, *ctl_addr, *bm_addr;
 	ddi_acc_handle_t bar5_hdl = nvc->nvc_bar_hdl[5];
 	uchar_t *bar5  = nvc->nvc_bar_addr[5];
@@ -2332,6 +2336,11 @@ nv_init_ctl(nv_ctl_t *nvc, ddi_acc_handle_t pci_conf_handle)
 
 	NVLOG((NVDBG_INIT, nvc, NULL, "nv_init_ctl entered"));
 
+	ck804 = B_TRUE;
+#ifdef SGPIO_SUPPORT
+	nvc->nvc_mcp55_flag = B_FALSE;
+#endif
+
 	/*
 	 * Need to set bit 2 to 1 at config offset 0x50
 	 * to enable access to the bar5 registers.
@@ -2360,6 +2369,7 @@ nv_init_ctl(nv_ctl_t *nvc, ddi_acc_handle_t pci_conf_handle)
 
 		if (reg8 != j) {
 			ck804 = B_FALSE;
+			nvc->nvc_mcp55_flag = B_TRUE;
 			break;
 		}
 	}
@@ -5647,6 +5657,21 @@ nv_sgp_led_init(nv_ctl_t *nvc, ddi_acc_handle_t pci_conf_handle)
 	extern caddr_t psm_map_phys_new(paddr_t, size_t, int);
 
 	/*
+	 * Initialize with appropriately invalid values in case this function
+	 * exits without initializing SGPIO (for example, there is no SGPIO
+	 * support).
+	 */
+	nvc->nvc_sgp_csr = 0;
+	nvc->nvc_sgp_cbp = NULL;
+
+	/*
+	 * CK804 can pass the sgpio_detect test even though it does not support
+	 * SGPIO, so don't even look at a CK804.
+	 */
+	if (nvc->nvc_mcp55_flag != B_TRUE)
+		return;
+
+	/*
 	 * The NVIDIA SGPIO support can nominally handle 6 drives.
 	 * However, the current implementation only supports 4 drives.
 	 * With two drives per controller, that means only look at the
@@ -5903,6 +5928,9 @@ nv_sgp_check_set_cmn(nv_ctl_t *nvc)
 {
 	nv_sgp_cmn_t *cmn;
 
+	if (nvc->nvc_sgp_cbp == NULL)
+		return (NV_FAILURE);
+
 	/* check to see if Scratch Register is set */
 	if (nvc->nvc_sgp_cbp->sgpio_sr != 0) {
 		nvc->nvc_sgp_cmn =
@@ -6270,6 +6298,14 @@ nv_sgp_cleanup(nv_ctl_t *nvc)
 	nv_sgp_cmn_t *cmn = nvc->nvc_sgp_cmn;
 	extern void psm_unmap_phys(caddr_t, size_t);
 
+	/*
+	 * If the SGPIO command block isn't mapped or the shared data
+	 * structure isn't present in this instance, there isn't much that
+	 * can be cleaned up.
+	 */
+	if ((cb == NULL) || (cmn == NULL))
+		return;
+
 	/* turn off activity LEDs for this controller */
 	drv_leds = TR_ACTIVE_SET(TR_ACTIVE_DISABLE);
 
diff --git a/usr/src/uts/common/sys/sata/adapters/nv_sata/nv_sata.h b/usr/src/uts/common/sys/sata/adapters/nv_sata/nv_sata.h
index 9942b965dc..930792ad6f 100644
--- a/usr/src/uts/common/sys/sata/adapters/nv_sata/nv_sata.h
+++ b/usr/src/uts/common/sys/sata/adapters/nv_sata/nv_sata.h
@@ -99,6 +99,7 @@ typedef struct nv_ctl {
 	uint8_t		nvc_revid;	/* PCI revid of device */
 
 #ifdef SGPIO_SUPPORT
+	int		nvc_mcp55_flag;	/* is the controller MCP55 or CK804 */
 	uint8_t		nvc_ctlr_num;	/* controller number within the part */
 	uint32_t	nvc_sgp_csr;	/* SGPIO CSR i/o address */
 	volatile nv_sgp_cb_t *nvc_sgp_cbp; /* SGPIO Command Block */