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-rw-r--r--usr/src/uts/sun4v/cpu/generic.c15
-rw-r--r--usr/src/uts/sun4v/cpu/niagara.c17
-rw-r--r--usr/src/uts/sun4v/cpu/niagara2.c17
-rw-r--r--usr/src/uts/sun4v/os/cmp.c99
-rw-r--r--usr/src/uts/sun4v/os/fillsysinfo.c25
-rw-r--r--usr/src/uts/sun4v/sys/machcpuvar.h7
6 files changed, 131 insertions, 49 deletions
diff --git a/usr/src/uts/sun4v/cpu/generic.c b/usr/src/uts/sun4v/cpu/generic.c
index 0a6d9394f1..6c93042813 100644
--- a/usr/src/uts/sun4v/cpu/generic.c
+++ b/usr/src/uts/sun4v/cpu/generic.c
@@ -19,7 +19,7 @@
* CDDL HEADER END
*/
/*
- * Copyright 2006 Sun Microsystems, Inc. All rights reserved.
+ * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
@@ -152,13 +152,20 @@ void
cpu_init_private(struct cpu *cp)
{
/*
- * The cpu_ipipe field is initialized based on the execution
- * unit sharing information from the Machine Description table.
- * It defaults to the CPU id in the absence of such information.
+ * The cpu_ipipe and cpu_fpu fields are initialized based on
+ * the execution unit sharing information from the Machine
+ * Description table. They default to the CPU id in the
+ * absence of such information.
*/
cp->cpu_m.cpu_ipipe = cpunodes[cp->cpu_id].exec_unit_mapping;
if (cp->cpu_m.cpu_ipipe == NO_EU_MAPPING_FOUND)
cp->cpu_m.cpu_ipipe = (id_t)(cp->cpu_id);
+
+ cp->cpu_m.cpu_fpu = cpunodes[cp->cpu_id].fpu_mapping;
+ if (cp->cpu_m.cpu_fpu == NO_EU_MAPPING_FOUND)
+ cp->cpu_m.cpu_fpu = (id_t)(cp->cpu_id);
+
+ cp->cpu_m.cpu_core = (id_t)(cp->cpu_id);
}
void
diff --git a/usr/src/uts/sun4v/cpu/niagara.c b/usr/src/uts/sun4v/cpu/niagara.c
index 125ca8e224..7ed9c3c641 100644
--- a/usr/src/uts/sun4v/cpu/niagara.c
+++ b/usr/src/uts/sun4v/cpu/niagara.c
@@ -19,7 +19,7 @@
* CDDL HEADER END
*/
/*
- * Copyright 2006 Sun Microsystems, Inc. All rights reserved.
+ * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
@@ -173,14 +173,23 @@ cpu_init_private(struct cpu *cp)
extern int niagara_kstat_init(void);
/*
- * The cpu_ipipe field is initialized based on the execution
- * unit sharing information from the MD. It defaults to the
- * virtual CPU id in the absence of such information.
+ * The cpu_ipipe and cpu_fpu fields are initialized based on
+ * the execution unit sharing information from the MD. They default
+ * to the virtual CPU id in the absence of such information.
*/
cp->cpu_m.cpu_ipipe = cpunodes[cp->cpu_id].exec_unit_mapping;
if (cp->cpu_m.cpu_ipipe == NO_EU_MAPPING_FOUND)
cp->cpu_m.cpu_ipipe = (id_t)(cp->cpu_id);
+ cp->cpu_m.cpu_fpu = cpunodes[cp->cpu_id].fpu_mapping;
+ if (cp->cpu_m.cpu_fpu == NO_EU_MAPPING_FOUND)
+ cp->cpu_m.cpu_fpu = (id_t)(cp->cpu_id);
+
+ /*
+ * Niagara defines the the core to be at the ipipe level
+ */
+ cp->cpu_m.cpu_core = cp->cpu_m.cpu_ipipe;
+
ASSERT(MUTEX_HELD(&cpu_lock));
if (niagara_cpucnt++ == 0 && niagara_hsvc_available == B_TRUE) {
(void) niagara_kstat_init();
diff --git a/usr/src/uts/sun4v/cpu/niagara2.c b/usr/src/uts/sun4v/cpu/niagara2.c
index 83f5e6733b..382352411d 100644
--- a/usr/src/uts/sun4v/cpu/niagara2.c
+++ b/usr/src/uts/sun4v/cpu/niagara2.c
@@ -19,7 +19,7 @@
* CDDL HEADER END
*/
/*
- * Copyright 2006 Sun Microsystems, Inc. All rights reserved.
+ * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
@@ -161,14 +161,23 @@ cpu_init_private(struct cpu *cp)
extern int niagara_kstat_init(void);
/*
- * The cpu_ipipe field is initialized based on the execution
- * unit sharing information from the MD. It defaults to the
- * virtual CPU id in the absence of such information.
+ * The cpu_ipipe and cpu_fpu fields are initialized based on
+ * the execution unit sharing information from the MD. They default
+ * to the virtual CPU id in the absence of such information.
*/
cp->cpu_m.cpu_ipipe = cpunodes[cp->cpu_id].exec_unit_mapping;
if (cp->cpu_m.cpu_ipipe == NO_EU_MAPPING_FOUND)
cp->cpu_m.cpu_ipipe = (id_t)(cp->cpu_id);
+ cp->cpu_m.cpu_fpu = cpunodes[cp->cpu_id].fpu_mapping;
+ if (cp->cpu_m.cpu_fpu == NO_EU_MAPPING_FOUND)
+ cp->cpu_m.cpu_fpu = (id_t)(cp->cpu_id);
+
+ /*
+ * Niagara 2 defines the core to be at the FPU level
+ */
+ cp->cpu_m.cpu_core = cp->cpu_m.cpu_fpu;
+
ASSERT(MUTEX_HELD(&cpu_lock));
if ((niagara2_cpucnt++ == 0) && (niagara2_hsvc_available == B_TRUE))
(void) niagara_kstat_init();
diff --git a/usr/src/uts/sun4v/os/cmp.c b/usr/src/uts/sun4v/os/cmp.c
index c82f3e006e..7219b639bf 100644
--- a/usr/src/uts/sun4v/os/cmp.c
+++ b/usr/src/uts/sun4v/os/cmp.c
@@ -2,9 +2,8 @@
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
- * Common Development and Distribution License, Version 1.0 only
- * (the "License"). You may not use this file except in compliance
- * with the License.
+ * Common Development and Distribution License (the "License").
+ * You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* or http://www.opensolaris.org/os/licensing.
@@ -20,7 +19,7 @@
* CDDL HEADER END
*/
/*
- * Copyright 2006 Sun Microsystems, Inc. All rights reserved.
+ * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
@@ -29,7 +28,7 @@
#include <sys/types.h>
#include <sys/machsystm.h>
#include <sys/cmp.h>
-#include <sys/chip.h>
+#include <sys/pghw.h>
/*
* Note: For now assume the chip ID as 0 for all the cpus until additional
@@ -89,40 +88,80 @@ cmp_cpu_to_chip(processorid_t cpuid)
return (0);
}
-/*
- * Return a chip "id" for the given cpu_t
- * cpu_t's residing on the same physical processor
- * should map to the same "id"
- */
-chipid_t
-chip_plat_get_chipid(cpu_t *cp)
+/*ARGSUSED*/
+int
+pg_plat_hw_shared(cpu_t *cp, pghw_type_t hw)
{
- return (cmp_cpu_to_chip(cp->cpu_id));
+ switch (hw) {
+ case PGHW_IPIPE:
+ return (1);
+ case PGHW_FPU:
+ return (1);
+ case PGHW_CHIP:
+ return (1);
+ }
+ return (0);
}
-/*ARGSUSED*/
-void
-chip_plat_define_chip(cpu_t *cp, chip_def_t *cd)
+int
+pg_plat_cpus_share(cpu_t *cpu_a, cpu_t *cpu_b, pghw_type_t hw)
{
- cd->chipd_type = CHIP_CMT;
-
- /*
- * Define any needed adjustment of rechoose_interval
- * For now, all chips use the default. This
- * will change with future processors.
- */
- cd->chipd_rechoose_adj = 0;
- cd->chipd_nosteal = 0;
+ if (pg_plat_hw_shared(cpu_a, hw) == 0 ||
+ pg_plat_hw_shared(cpu_b, hw) == 0)
+ return (0);
+
+ return (pg_plat_hw_instance_id(cpu_a, hw) ==
+ pg_plat_hw_instance_id(cpu_b, hw));
+}
+
+id_t
+pg_plat_hw_instance_id(cpu_t *cpu, pghw_type_t hw)
+{
+ switch (hw) {
+ case PGHW_IPIPE:
+ return (cpu->cpu_m.cpu_ipipe);
+ case PGHW_CHIP:
+ return (cmp_cpu_to_chip(cpu->cpu_id));
+ case PGHW_FPU:
+ return (cpu->cpu_m.cpu_fpu);
+ default:
+ return (-1);
+ }
}
/*
- * Return a pipeline "id" for the given cpu_t
- * cpu_t's sharing the same instruction pipeline
- * should map to the same "id"
+ * Order the relevant hw sharing relationships
+ * from least, to greatest physical scope.
+ *
+ * The hierarchy *must* be defined for all hw that
+ * pg_plat_hw_shared() returns non-zero.
*/
+int
+pg_plat_hw_level(pghw_type_t hw)
+{
+ int i;
+ static pghw_type_t hw_hier[] = {
+ PGHW_IPIPE,
+ PGHW_FPU,
+ PGHW_CHIP,
+ PGHW_NUM_COMPONENTS
+ };
+
+ for (i = 0; hw_hier[i] != PGHW_NUM_COMPONENTS; i++) {
+ if (hw_hier[i] == hw)
+ return (i);
+ }
+ return (-1);
+}
id_t
-chip_plat_get_coreid(cpu_t *cp)
+pg_plat_get_core_id(cpu_t *cpu)
+{
+ return (cpu->cpu_m.cpu_core);
+}
+
+void
+cmp_set_nosteal_interval(void)
{
- return (cp->cpu_m.cpu_ipipe);
+ nosteal_nsec = 0;
}
diff --git a/usr/src/uts/sun4v/os/fillsysinfo.c b/usr/src/uts/sun4v/os/fillsysinfo.c
index c909f670fb..a2718cbed1 100644
--- a/usr/src/uts/sun4v/os/fillsysinfo.c
+++ b/usr/src/uts/sun4v/os/fillsysinfo.c
@@ -19,7 +19,7 @@
* CDDL HEADER END
*/
/*
- * Copyright 2006 Sun Microsystems, Inc. All rights reserved.
+ * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
@@ -218,6 +218,7 @@ setup_exec_unit_mappings(md_t *mdp)
int idx, i, j;
processorid_t cpuid;
char *eunit_name = broken_md_flag ? "exec_unit" : "exec-unit";
+ enum eu_type { INTEGER, FPU } etype;
/*
* Find the cpu integer exec units - and
@@ -236,7 +237,8 @@ setup_exec_unit_mappings(md_t *mdp)
num_eunits = md_alloc_scan_dag(mdp, cpus_node, eunit_name,
"fwd", &eunit);
if (num_eunits > 0) {
- char *match_type = broken_md_flag ? "int" : "integer";
+ char *int_str = broken_md_flag ? "int" : "integer";
+ char *fpu_str = "fp";
/* Spin through and find all the integer exec units */
for (i = 0; i < num_eunits; i++) {
@@ -245,13 +247,19 @@ setup_exec_unit_mappings(md_t *mdp)
int vallen;
uint64_t lcpuid;
- /* ignore nodes with no type */
+ /* ignore nodes with no type */
if (md_get_prop_data(mdp, eunit[i], "type",
(uint8_t **)&val, &vallen)) continue;
for (p = val; *p != '\0'; p += strlen(p) + 1) {
- if (strcmp(p, match_type) == 0)
+ if (strcmp(p, int_str) == 0) {
+ etype = INTEGER;
goto found;
+ }
+ if (strcmp(p, fpu_str) == 0) {
+ etype = FPU;
+ goto found;
+ }
}
continue;
@@ -275,7 +283,14 @@ found:
if (lcpuid >= NCPU)
continue;
cpuid = (processorid_t)lcpuid;
- cpunodes[cpuid].exec_unit_mapping = idx;
+ switch (etype) {
+ case INTEGER:
+ cpunodes[cpuid].exec_unit_mapping = idx;
+ break;
+ case FPU:
+ cpunodes[cpuid].fpu_mapping = idx;
+ break;
+ }
}
md_free_scan_dag(mdp, &node);
}
diff --git a/usr/src/uts/sun4v/sys/machcpuvar.h b/usr/src/uts/sun4v/sys/machcpuvar.h
index e0f4f2162b..632a5c767b 100644
--- a/usr/src/uts/sun4v/sys/machcpuvar.h
+++ b/usr/src/uts/sun4v/sys/machcpuvar.h
@@ -19,7 +19,7 @@
* CDDL HEADER END
*/
/*
- * Copyright 2006 Sun Microsystems, Inc. All rights reserved.
+ * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
@@ -159,7 +159,9 @@ struct machcpu {
uint64_t mondo_data_ra; /* mono data pa */
uint16_t *cpu_list; /* uint16_t [NCPU] */
uint64_t cpu_list_ra; /* cpu list ra */
- id_t cpu_ipipe; /* cpu exec unit id */
+ id_t cpu_ipipe; /* cpu int exec unit id */
+ id_t cpu_fpu; /* cpu fpu unit id */
+ id_t cpu_core; /* cpu core id */
kthread_t *startup_thread;
};
@@ -213,6 +215,7 @@ struct cpu_node {
int ecache_setsize;
uint64_t device_id;
id_t exec_unit_mapping;
+ id_t fpu_mapping;
};
extern struct cpu_node cpunodes[];
generated by cgit v1.2.3 (git 2.39.1) at 2025-06-22 08:04:47 +0000