4 files changed, 10 insertions, 16 deletions
diff --git a/usr/src/uts/common/io/nxge/nxge_main.c b/usr/src/uts/common/io/nxge/nxge_main.c
index b7888294e1..92c842cdc5 100644
--- a/usr/src/uts/common/io/nxge/nxge_main.c
+++ b/usr/src/uts/common/io/nxge/nxge_main.c
@@ -36,14 +36,8 @@ uint32_t 	nxge_dma_obp_props_only = 1;	/* use obp published props */
 uint32_t 	nxge_use_rdc_intr = 1;		/* debug to assign rdc intr */
 /*
  * PSARC/2007/453 MSI-X interrupt limit override
- * (This PSARC case is limited to MSI-X vectors
- *  and SPARC platforms only).
  */
-#if defined(_BIG_ENDIAN)
 uint32_t	nxge_msi_enable = 2;
-#else
-uint32_t	nxge_msi_enable = 1;
-#endif
 
 /*
  * Software workaround for a Neptune (PCI-E)
diff --git a/usr/src/uts/common/io/nxge/nxge_send.c b/usr/src/uts/common/io/nxge/nxge_send.c
index 97603172be..e4ff09d9b1 100644
--- a/usr/src/uts/common/io/nxge/nxge_send.c
+++ b/usr/src/uts/common/io/nxge/nxge_send.c
@@ -395,8 +395,8 @@ start_again:
 
 	tdc_stats = tx_ring_p->tdc_stats;
 	mark_mode = (tx_ring_p->descs_pending &&
-	    ((tx_ring_p->tx_ring_size - tx_ring_p->descs_pending)
-	    < nxge_tx_minfree));
+	    (((int)tx_ring_p->tx_ring_size - (int)tx_ring_p->descs_pending) <
+	    (int)nxge_tx_minfree));
 
 	NXGE_DEBUG_MSG((nxgep, TX_CTL,
 	    "TX Descriptor ring is channel %d mark mode %d",
diff --git a/usr/src/uts/common/io/nxge/nxge_txdma.c b/usr/src/uts/common/io/nxge/nxge_txdma.c
index 766e900da7..cdd72d576b 100644
--- a/usr/src/uts/common/io/nxge/nxge_txdma.c
+++ b/usr/src/uts/common/io/nxge/nxge_txdma.c
@@ -19,7 +19,7 @@
  * CDDL HEADER END
  */
 /*
- * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
+ * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
  */
 
@@ -1075,17 +1075,14 @@ nxge_txdma_reclaim(p_nxge_t nxgep, p_tx_ring_t tx_ring_p, int nmblks)
 			tx_msg_p = &tx_msg_ring[tx_rd_index];
 		}
 
-		status = (nmblks <= (tx_ring_p->tx_ring_size -
-		    tx_ring_p->descs_pending -
-		    TX_FULL_MARK));
+		status = (nmblks <= ((int)tx_ring_p->tx_ring_size -
+		    (int)tx_ring_p->descs_pending - TX_FULL_MARK));
 		if (status) {
 			cas32((uint32_t *)&tx_ring_p->queueing, 1, 0);
 		}
 	} else {
-		status = (nmblks <=
-		    (tx_ring_p->tx_ring_size -
-		    tx_ring_p->descs_pending -
-		    TX_FULL_MARK));
+		status = (nmblks <= ((int)tx_ring_p->tx_ring_size -
+		    (int)tx_ring_p->descs_pending - TX_FULL_MARK));
 	}
 
 	NXGE_DEBUG_MSG((nxgep, TX_CTL,
diff --git a/usr/src/uts/common/io/nxge/nxge_virtual.c b/usr/src/uts/common/io/nxge/nxge_virtual.c
index 51c7c56528..4a52dd415d 100644
--- a/usr/src/uts/common/io/nxge/nxge_virtual.c
+++ b/usr/src/uts/common/io/nxge/nxge_virtual.c
@@ -2501,6 +2501,9 @@ nxge_set_hw_dma_config(p_nxge_t nxgep)
 				}
 				break;
 			}
+
+			if (p_cfgp->max_rdcs < nrdcs)
+				nrdcs = p_cfgp->max_rdcs;
 		} else {
 			nrdcs = 0;
 		}