diff options
Diffstat (limited to 'usr/src')
-rw-r--r-- | usr/src/pkgdefs/SUNWcakr.i/prototype_com | 2 | ||||
-rw-r--r-- | usr/src/pkgdefs/SUNWckr/prototype_i386 | 2 | ||||
-rw-r--r-- | usr/src/uts/common/Makefile.files | 2 | ||||
-rw-r--r-- | usr/src/uts/common/sys/pci.h | 3 | ||||
-rw-r--r-- | usr/src/uts/i86pc/Makefile.files | 1 | ||||
-rw-r--r-- | usr/src/uts/i86pc/Makefile.i86pc.shared | 1 | ||||
-rw-r--r-- | usr/src/uts/i86pc/io/pci/pci_pci.c (renamed from usr/src/uts/common/io/pci_pci/pci_pci.c) | 323 | ||||
-rw-r--r-- | usr/src/uts/i86pc/io/pciex/pcie_pci.c | 3 | ||||
-rw-r--r-- | usr/src/uts/i86pc/pci_pci/Makefile (renamed from usr/src/uts/intel/pci_pci/Makefile) | 14 | ||||
-rw-r--r-- | usr/src/uts/intel/Makefile.intel.shared | 1 | ||||
-rw-r--r-- | usr/src/uts/intel/Makefile.rules | 7 |
11 files changed, 49 insertions, 310 deletions
diff --git a/usr/src/pkgdefs/SUNWcakr.i/prototype_com b/usr/src/pkgdefs/SUNWcakr.i/prototype_com index e5e834bc04..384c925811 100644 --- a/usr/src/pkgdefs/SUNWcakr.i/prototype_com +++ b/usr/src/pkgdefs/SUNWcakr.i/prototype_com @@ -76,6 +76,7 @@ f none platform/i86pc/kernel/drv/amd64/kb8042 755 root sys f none platform/i86pc/kernel/drv/amd64/mc-amd 755 root sys f none platform/i86pc/kernel/drv/amd64/npe 755 root sys f none platform/i86pc/kernel/drv/amd64/pci 755 root sys +f none platform/i86pc/kernel/drv/amd64/pci_pci 755 root sys f none platform/i86pc/kernel/drv/amd64/pcie_pci 755 root sys f none platform/i86pc/kernel/drv/amd64/power 755 root sys f none platform/i86pc/kernel/drv/amd64/rootnex 755 root sys @@ -91,6 +92,7 @@ f none platform/i86pc/kernel/drv/mc-amd 755 root sys f none platform/i86pc/kernel/drv/mc-amd.conf 644 root sys f none platform/i86pc/kernel/drv/npe 755 root sys f none platform/i86pc/kernel/drv/pci 755 root sys +f none platform/i86pc/kernel/drv/pci_pci 755 root sys f none platform/i86pc/kernel/drv/pcie_pci 755 root sys f none platform/i86pc/kernel/drv/pcie_pci.conf 644 root sys f none platform/i86pc/kernel/drv/power 755 root sys diff --git a/usr/src/pkgdefs/SUNWckr/prototype_i386 b/usr/src/pkgdefs/SUNWckr/prototype_i386 index 16ec7a45fa..f3a0b360da 100644 --- a/usr/src/pkgdefs/SUNWckr/prototype_i386 +++ b/usr/src/pkgdefs/SUNWckr/prototype_i386 @@ -95,7 +95,6 @@ f none kernel/drv/mpt.conf 644 root sys f none kernel/drv/mouse8042 755 root sys f none kernel/drv/openeepr 755 root sys f none kernel/drv/options 755 root sys -f none kernel/drv/pci_pci 755 root sys f none kernel/drv/pci_to_i2o 755 root sys f none kernel/drv/pci_to_i2o.conf 644 root sys f none kernel/drv/poll 755 root sys @@ -271,7 +270,6 @@ f none kernel/drv/amd64/mpt 755 root sys f none kernel/drv/amd64/mouse8042 755 root sys f none kernel/drv/amd64/openeepr 755 root sys f none kernel/drv/amd64/options 755 root sys -f none kernel/drv/amd64/pci_pci 755 root sys f none kernel/drv/amd64/poll 755 root sys f none kernel/drv/amd64/pseudo 755 root sys f none kernel/drv/amd64/ptc 755 root sys diff --git a/usr/src/uts/common/Makefile.files b/usr/src/uts/common/Makefile.files index 206d4a96f5..20038e8bf4 100644 --- a/usr/src/uts/common/Makefile.files +++ b/usr/src/uts/common/Makefile.files @@ -394,8 +394,6 @@ DIAUDIO_OBJS += audio.o OLDPTY_OBJS += tty_ptyconf.o -PCI_PCINEXUS_OBJS += pci_pci.o - PTC_OBJS += tty_pty.o PTSL_OBJS += tty_pts.o diff --git a/usr/src/uts/common/sys/pci.h b/usr/src/uts/common/sys/pci.h index 40f25dfd48..4bb48b00da 100644 --- a/usr/src/uts/common/sys/pci.h +++ b/usr/src/uts/common/sys/pci.h @@ -812,6 +812,9 @@ typedef struct pcix_attr { #define PCI_BASE_SIZE 4 /* size of base reg in bytes */ #define PCI_CONF_HDR_SIZE 256 /* configuration header size */ #define PCI_MAX_BUS_NUM 256 /* Maximum PCI buses allowed */ +#define PCI_MAX_DEVICES 32 /* Max PCI devices allowed */ +#define PCI_MAX_FUNCTIONS 8 /* Max PCI functions allowed */ +#define PCI_MAX_CHILDREN PCI_MAX_DEVICES * PCI_MAX_FUNCTIONS #define PCI_CLK_33MHZ (33 * 1000 * 1000) /* 33MHz clock speed */ #define PCI_CLK_66MHZ (66 * 1000 * 1000) /* 66MHz clock speed */ #define PCI_CLK_133MHZ (133 * 1000 * 1000) /* 133MHz clock speed */ diff --git a/usr/src/uts/i86pc/Makefile.files b/usr/src/uts/i86pc/Makefile.files index aff92da7f0..f539a27064 100644 --- a/usr/src/uts/i86pc/Makefile.files +++ b/usr/src/uts/i86pc/Makefile.files @@ -111,6 +111,7 @@ SPECIAL_OBJS += $(SPECIAL_OBJS_$(CLASS)) ROOTNEX_OBJS += rootnex.o ISANEXUS_OBJS += isa.o dma_engine.o i8237A.o PCINEXUS_OBJS += pci.o pci_common.o pci_kstats.o pci_tools.o +PCI_PCINEXUS_OBJS += pci_pci.o TCIC_OBJS += tcic.o diff --git a/usr/src/uts/i86pc/Makefile.i86pc.shared b/usr/src/uts/i86pc/Makefile.i86pc.shared index f88512aacb..c8dd43231a 100644 --- a/usr/src/uts/i86pc/Makefile.i86pc.shared +++ b/usr/src/uts/i86pc/Makefile.i86pc.shared @@ -242,6 +242,7 @@ MACH_NOT_YET_KMODS = $(AUTOCONF_OBJS) DRV_KMODS += rootnex DRV_KMODS += isa DRV_KMODS += pci +DRV_KMODS += pci_pci DRV_KMODS += pcie_pci DRV_KMODS += npe diff --git a/usr/src/uts/common/io/pci_pci/pci_pci.c b/usr/src/uts/i86pc/io/pci/pci_pci.c index eb3c6811cc..536d18b8ad 100644 --- a/usr/src/uts/common/io/pci_pci/pci_pci.c +++ b/usr/src/uts/i86pc/io/pci/pci_pci.c @@ -43,58 +43,46 @@ #include <sys/ndifm.h> #include <sys/fm/protocol.h> #include <sys/hotplug/pci/pcihp.h> -#if defined(__i386) || defined(__amd64) #include <sys/pci_intr_lib.h> #include <sys/psm.h> -#endif - -/* - * For PCI Hotplug support, the misc/pcihp module provides devctl control - * device and cb_ops functions to support hotplug operations. - */ -char _depends_on[] = "misc/pcihp"; /* * The variable controls the default setting of the command register * for pci devices. See ppb_initchild() for details. */ -#if defined(__i386) || defined(__amd64) -static ushort_t ppb_command_default = PCI_COMM_ME | - PCI_COMM_MAE | - PCI_COMM_IO; -#else -static ushort_t ppb_command_default = PCI_COMM_SERR_ENABLE | - PCI_COMM_WAIT_CYC_ENAB | - PCI_COMM_PARITY_DETECT | - PCI_COMM_ME | - PCI_COMM_MAE | - PCI_COMM_IO; -#endif - - -static int ppb_bus_map(dev_info_t *, dev_info_t *, ddi_map_req_t *, - off_t, off_t, caddr_t *); -static int ppb_ctlops(dev_info_t *, dev_info_t *, ddi_ctl_enum_t, - void *, void *); +static ushort_t ppb_command_default = PCI_COMM_ME | PCI_COMM_MAE | PCI_COMM_IO; + + +static int ppb_bus_map(dev_info_t *, dev_info_t *, ddi_map_req_t *, + off_t, off_t, caddr_t *); +static int ppb_ctlops(dev_info_t *, dev_info_t *, ddi_ctl_enum_t, + void *, void *); static int ppb_fm_init(dev_info_t *, dev_info_t *, int, ddi_iblock_cookie_t *); - static int ppb_fm_callback(dev_info_t *, ddi_fm_error_t *, const void *); - -#if defined(__i386) || defined(__amd64) -static int ppb_intr_ops(dev_info_t *, dev_info_t *, ddi_intr_op_t, - ddi_intr_handle_impl_t *, void *); +static int ppb_intr_ops(dev_info_t *, dev_info_t *, ddi_intr_op_t, + ddi_intr_handle_impl_t *, void *); /* - * Not to allow MSI by default except special case like AMD8132 with - * MSI enabled. - * However, this flag can be patched to allow MSI if needed. - * 0 = default value, MSI is allowed only for special case - * 1 = MSI supported without check - * -1 = MSI not supported at all + * ppb_support_msi: Flag that controls MSI support across P2P Bridges. + * By default, MSI is not supported. Special case is AMD-8132 chipset. + * + * However, MSI support behavior can be patched on a system by changing + * the value of this flag as shown below:- + * 0 = default value, MSI is allowed only for special case (AMD-8132) + * 1 = MSI supported without any checks + * -1 = MSI not supported at all */ int ppb_support_msi = 0; -#endif + +#define PCI_VENID_AMD 0x1022 /* AMD vendor-id */ +#define PCI_DEVID_8132 0x7458 /* 8132 chipset id */ +#define PCI_MSI_MAPPING_CAP_OFF 0xF4 +#define PCI_MSI_MAPPING_CAP_MASK 0xFF01000F +#define PCI_MSI_MAPPING_ENABLE 0xA8010008 + +extern int (*psm_intr_ops)(dev_info_t *, ddi_intr_handle_impl_t *, + psm_intr_op_t, int *); struct bus_ops ppb_bus_ops = { BUSO_REV, @@ -125,11 +113,7 @@ struct bus_ops ppb_bus_ops = { NULL, /* (*bus_fm_access_enter)(); */ NULL, /* (*bus_fm_access_exit)(); */ NULL, /* (*bus_power)(); */ -#if defined(__i386) || defined(__amd64) ppb_intr_ops /* (*bus_intr_op)(); */ -#else - i_ddi_intr_ops /* (*bus_intr_op)(); */ -#endif }; /* @@ -204,27 +188,15 @@ static struct modlinkage modlinkage = { static void *ppb_state; typedef struct { - dev_info_t *dip; int ppb_fmcap; ddi_iblock_cookie_t ppb_fm_ibc; kmutex_t ppb_peek_poke_mutex; kmutex_t ppb_err_mutex; -#if defined(__sparc) - /* - * configuration register state for the bus: - */ - uchar_t ppb_cache_line_size; - uchar_t ppb_latency_timer; -#endif - /* * cpr support: */ -#define PCI_MAX_DEVICES 32 -#define PCI_MAX_FUNCTIONS 8 -#define PCI_MAX_CHILDREN PCI_MAX_DEVICES * PCI_MAX_FUNCTIONS uint_t config_state_index; struct { dev_info_t *dip; @@ -237,43 +209,14 @@ typedef struct { } config_state[PCI_MAX_CHILDREN]; } ppb_devstate_t; -#if defined(__sparc) -/* - * The following variable enables a workaround for the following obp bug: - * - * 1234181 - obp should set latency timer registers in pci - * configuration header - * - * Until this bug gets fixed in the obp, the following workaround should - * be enabled. - */ -static uint_t ppb_set_latency_timer_register = 1; - -/* - * The following variable enables a workaround for an obp bug to be - * submitted. A bug requesting a workaround fof this problem has - * been filed: - * - * 1235094 - need workarounds on positron nexus drivers to set cache - * line size registers - * - * Until this bug gets fixed in the obp, the following workaround should - * be enabled. - */ -static uint_t ppb_set_cache_line_size_register = 1; -#endif - /* * forward function declarations: */ -static void ppb_removechild(dev_info_t *); -static int ppb_initchild(dev_info_t *child); -static void ppb_save_config_regs(ppb_devstate_t *ppb_p); -static void ppb_restore_config_regs(ppb_devstate_t *ppb_p); -#if defined(__sparc) -static int ppb_create_pci_prop(dev_info_t *); -#endif /* defined(__sparc) */ +static void ppb_removechild(dev_info_t *); +static int ppb_initchild(dev_info_t *child); +static void ppb_save_config_regs(ppb_devstate_t *ppb_p); +static void ppb_restore_config_regs(ppb_devstate_t *ppb_p); int @@ -369,12 +312,6 @@ ppb_attach(dev_info_t *devi, ddi_attach_cmd_t cmd) ddi_soft_state_free(ppb_state, instance); return (DDI_FAILURE); } -#if defined(__sparc) - ppb->ppb_cache_line_size = - pci_config_get8(config_handle, PCI_CONF_CACHE_LINESZ); - ppb->ppb_latency_timer = - pci_config_get8(config_handle, PCI_CONF_LATENCY_TIMER); -#endif pci_config_teardown(&config_handle); /* @@ -587,15 +524,6 @@ ppb_initchild(dev_info_t *child) char name[MAXNAMELEN]; ddi_acc_handle_t config_handle; ushort_t command_preserve, command; -#if !defined(__i386) && !defined(__amd64) - ushort_t bcr; - uchar_t header_type; -#endif -#if defined(__sparc) - int ret; - uchar_t min_gnt, latency_timer; - ppb_devstate_t *ppb; -#endif if (ppb_name_child(child, name, MAXNAMELEN) != DDI_SUCCESS) return (DDI_FAILURE); @@ -641,11 +569,6 @@ ppb_initchild(dev_info_t *child) } /* transfer select properties from PROM to kernel */ -#if defined(__sparc) - if ((ret = ppb_create_pci_prop(child)) != DDI_SUCCESS) - return (ret); -#endif /* defined(__sparc) */ - if (ddi_getprop(DDI_DEV_T_NONE, child, DDI_PROP_DONTPASS, "interrupts", -1) != -1) { pdptr = kmem_zalloc((sizeof (struct ddi_parent_private_data) + @@ -659,99 +582,16 @@ ppb_initchild(dev_info_t *child) if (pci_config_setup(child, &config_handle) != DDI_SUCCESS) return (DDI_FAILURE); -#if !defined(__i386) && !defined(__amd64) - /* - * Determine the configuration header type. - */ - header_type = pci_config_get8(config_handle, PCI_CONF_HEADER); -#endif - /* * Support for the "command-preserve" property. */ command_preserve = ddi_prop_get_int(DDI_DEV_T_ANY, child, - DDI_PROP_DONTPASS, - "command-preserve", 0); + DDI_PROP_DONTPASS, "command-preserve", 0); command = pci_config_get16(config_handle, PCI_CONF_COMM); command &= (command_preserve | PCI_COMM_BACK2BACK_ENAB); command |= (ppb_command_default & ~command_preserve); pci_config_put16(config_handle, PCI_CONF_COMM, command); -#if !defined(__i386) && !defined(__amd64) - /* - * If the device has a bus control register then program it - * based on the settings in the command register. - */ - if ((header_type & PCI_HEADER_TYPE_M) == PCI_HEADER_ONE) { - /* - * These flags should be moved to uts/common/sys/pci.h: - */ -#ifndef PCI_BCNF_BCNTRL -#define PCI_BCNF_BCNTRL 0x3e -#define PCI_BCNF_BCNTRL_PARITY_ENABLE 0x0001 -#define PCI_BCNF_BCNTRL_SERR_ENABLE 0x0002 -#define PCI_BCNF_BCNTRL_MAST_AB_MODE 0x0020 -#endif - bcr = pci_config_get8(config_handle, PCI_BCNF_BCNTRL); - if (ppb_command_default & PCI_COMM_PARITY_DETECT) - bcr |= PCI_BCNF_BCNTRL_PARITY_ENABLE; - if (ppb_command_default & PCI_COMM_SERR_ENABLE) - bcr |= PCI_BCNF_BCNTRL_SERR_ENABLE; - bcr |= PCI_BCNF_BCNTRL_MAST_AB_MODE; - pci_config_put8(config_handle, PCI_BCNF_BCNTRL, bcr); - } -#endif - -#if defined(__sparc) - /* - * Initialize cache-line-size configuration register if needed. - */ - if (ppb_set_cache_line_size_register && - ddi_getprop(DDI_DEV_T_ANY, child, DDI_PROP_DONTPASS, - "cache-line-size", 0) == 0) { - ppb = ddi_get_soft_state(ppb_state, - ddi_get_instance(ddi_get_parent(child))); - pci_config_put8(config_handle, PCI_CONF_CACHE_LINESZ, - ppb->ppb_cache_line_size); - n = pci_config_get8(config_handle, PCI_CONF_CACHE_LINESZ); - if (n != 0) { - (void) ndi_prop_update_int(DDI_DEV_T_NONE, child, - "cache-line-size", n); - } - } - - /* - * Initialize latency timer configuration registers if needed. - */ - if (ppb_set_latency_timer_register && - ddi_getprop(DDI_DEV_T_ANY, child, DDI_PROP_DONTPASS, - "latency-timer", 0) == 0) { - - if ((header_type & PCI_HEADER_TYPE_M) == PCI_HEADER_ONE) { - latency_timer = ppb->ppb_latency_timer; - /* - * This flags should be moved to uts/common/sys/pci.h: - */ -#ifndef PCI_BCNF_LATENCY_TIMER -#define PCI_BCNF_LATENCY_TIMER 0x1b -#endif - pci_config_put8(config_handle, PCI_BCNF_LATENCY_TIMER, - ppb->ppb_latency_timer); - } else { - min_gnt = pci_config_get8(config_handle, - PCI_CONF_MIN_G); - latency_timer = min_gnt * 8; - } - pci_config_put8(config_handle, PCI_CONF_LATENCY_TIMER, - latency_timer); - n = pci_config_get8(config_handle, PCI_CONF_LATENCY_TIMER); - if (n != 0) { - (void) ndi_prop_update_int(DDI_DEV_T_NONE, child, - "latency-timer", n); - } - } -#endif - pci_config_teardown(&config_handle); return (DDI_SUCCESS); } @@ -776,56 +616,6 @@ ppb_removechild(dev_info_t *dip) } /* - * Transfer select properties from PROM to kernel. - * For x86 pci is already enumerated by the kernel. - */ -#if defined(__sparc) -static int -ppb_create_pci_prop(dev_info_t *child) -{ - pci_regspec_t *pci_rp; - int length; - int value; - - /* get child "reg" property */ - value = ddi_getlongprop(DDI_DEV_T_ANY, child, DDI_PROP_CANSLEEP, - "reg", (caddr_t)&pci_rp, &length); - if (value != DDI_SUCCESS) - return (value); - - (void) ndi_prop_update_byte_array(DDI_DEV_T_NONE, child, "reg", - (uchar_t *)pci_rp, length); - - /* - * free the memory allocated by ddi_getlongprop (). - */ - kmem_free(pci_rp, length); - - /* assign the basic PCI Properties */ - - value = ddi_getprop(DDI_DEV_T_ANY, child, DDI_PROP_CANSLEEP, - "vendor-id", -1); - if (value != -1) - (void) ndi_prop_update_int(DDI_DEV_T_NONE, child, - "vendor-id", value); - - value = ddi_getprop(DDI_DEV_T_ANY, child, DDI_PROP_CANSLEEP, - "device-id", -1); - if (value != -1) - (void) ndi_prop_update_int(DDI_DEV_T_NONE, child, - "device-id", value); - - value = ddi_getprop(DDI_DEV_T_ANY, child, DDI_PROP_CANSLEEP, - "interrupts", -1); - if (value != -1) - (void) ndi_prop_update_int(DDI_DEV_T_NONE, child, - "interrupts", value); - return (DDI_SUCCESS); -} -#endif /* defined(__sparc) */ - - -/* * ppb_save_config_regs * * This routine saves the state of the configuration registers of all @@ -857,26 +647,6 @@ ppb_save_config_regs(ppb_devstate_t *ppb_p) ppb_p->config_state[i].dip = dip; ppb_p->config_state[i].command = pci_config_get16(config_handle, PCI_CONF_COMM); -#if !defined(__i386) && !defined(__amd64) - ppb_p->config_state[i].header_type = - pci_config_get8(config_handle, PCI_CONF_HEADER); - if ((ppb_p->config_state[i].header_type & PCI_HEADER_TYPE_M) == - PCI_HEADER_ONE) - ppb_p->config_state[i].bridge_control = - pci_config_get16(config_handle, - PCI_BCNF_BCNTRL); -#endif -#if defined(__sparc) - ppb_p->config_state[i].cache_line_size = - pci_config_get8(config_handle, PCI_CONF_CACHE_LINESZ); - ppb_p->config_state[i].latency_timer = - pci_config_get8(config_handle, PCI_CONF_LATENCY_TIMER); - if ((ppb_p->config_state[i].header_type & - PCI_HEADER_TYPE_M) == PCI_HEADER_ONE) - ppb_p->config_state[i].sec_latency_timer = - pci_config_get8(config_handle, - PCI_BCNF_LATENCY_TIMER); -#endif pci_config_teardown(&config_handle); } ppb_p->config_state_index = i; @@ -912,36 +682,10 @@ ppb_restore_config_regs(ppb_devstate_t *ppb_p) } pci_config_put16(config_handle, PCI_CONF_COMM, ppb_p->config_state[i].command); -#if !defined(__i386) && !defined(__amd64) - if ((ppb_p->config_state[i].header_type & PCI_HEADER_TYPE_M) == - PCI_HEADER_ONE) - pci_config_put16(config_handle, PCI_BCNF_BCNTRL, - ppb_p->config_state[i].bridge_control); -#endif -#if defined(__sparc) - pci_config_put8(config_handle, PCI_CONF_CACHE_LINESZ, - ppb_p->config_state[i].cache_line_size); - pci_config_put8(config_handle, PCI_CONF_LATENCY_TIMER, - ppb_p->config_state[i].latency_timer); - if ((ppb_p->config_state[i].header_type & - PCI_HEADER_TYPE_M) == PCI_HEADER_ONE) - pci_config_put8(config_handle, PCI_BCNF_LATENCY_TIMER, - ppb_p->config_state[i].sec_latency_timer); -#endif pci_config_teardown(&config_handle); } } -#if defined(__i386) || defined(__amd64) - -#define PCI_VENID_AMD 0x1022 -#define PCI_DEVID_8132 0x7458 -#define PCI_MSI_MAPPING_CAP_OFF 0xF4 -#define PCI_MSI_MAPPING_CAP_MASK 0xFF01000F -#define PCI_MSI_MAPPING_ENABLE 0xA8010008 - -extern int (*psm_intr_ops)(dev_info_t *, ddi_intr_handle_impl_t *, - psm_intr_op_t, int *); /* * ppb_intr_ops @@ -982,8 +726,8 @@ ppb_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op, } } else if (pci_config_setup(pdip, &config_handle) == DDI_SUCCESS) { /* - * ppb_support_msi == 0 - * only for check special case like AMD8132 which supports MSI + * ppb_support_msi == 0 i.e. by default, MSI is disabled + * Check only for special case like AMD8132 which supports MSI */ if ((pci_config_get16(config_handle, PCI_CONF_VENID) == PCI_VENID_AMD) && (pci_config_get16(config_handle, @@ -1014,7 +758,6 @@ ppb_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op, (void *)rdip, *(int *)result)); return (DDI_SUCCESS); } -#endif static int ppb_open(dev_t *devp, int flags, int otyp, cred_t *credp) diff --git a/usr/src/uts/i86pc/io/pciex/pcie_pci.c b/usr/src/uts/i86pc/io/pciex/pcie_pci.c index d2189c3aca..7d7f0e2db7 100644 --- a/usr/src/uts/i86pc/io/pciex/pcie_pci.c +++ b/usr/src/uts/i86pc/io/pciex/pcie_pci.c @@ -180,9 +180,6 @@ typedef struct { /* * cpr support: */ -#define PCI_MAX_DEVICES 32 -#define PCI_MAX_FUNCTIONS 8 -#define PCI_MAX_CHILDREN PCI_MAX_DEVICES * PCI_MAX_FUNCTIONS uint_t config_state_index; struct { dev_info_t *dip; diff --git a/usr/src/uts/intel/pci_pci/Makefile b/usr/src/uts/i86pc/pci_pci/Makefile index d27a296f52..b5e3779ed3 100644 --- a/usr/src/uts/intel/pci_pci/Makefile +++ b/usr/src/uts/i86pc/pci_pci/Makefile @@ -19,7 +19,7 @@ # CDDL HEADER END # # -# uts/intel/pci_pci/Makefile +# uts/i86pc/pci_pci/Makefile # # Copyright 2006 Sun Microsystems, Inc. All rights reserved. # Use is subject to license terms. @@ -40,14 +40,14 @@ UTSBASE = ../.. MODULE = pci_pci OBJECTS = $(PCI_PCINEXUS_OBJS:%=$(OBJS_DIR)/%) LINTS = $(PCI_PCINEXUS_OBJS:%.o=$(LINTS_DIR)/%.ln) -ROOTMODULE = $(ROOT_DRV_DIR)/$(MODULE) +ROOTMODULE = $(ROOT_PSM_DRV_DIR)/$(MODULE) INC_PATH += -I../../i86pc # # Include common rules. # -include $(UTSBASE)/intel/Makefile.intel +include $(UTSBASE)/i86pc/Makefile.i86pc # # Define targets @@ -57,6 +57,11 @@ LINT_TARGET = $(MODULE).lint INSTALL_TARGET = $(BINARY) $(ROOTMODULE) # +# depends on misc/pcihp +# +LDFLAGS += -dy -Nmisc/pcihp + +# # Override defaults to build a unique, local modstubs.o. # MODSTUBS_DIR = $(OBJS_DIR) @@ -86,5 +91,4 @@ install: $(INSTALL_DEPS) # # Include common targets. # -include $(UTSBASE)/intel/Makefile.targ - +include $(UTSBASE)/i86pc/Makefile.targ diff --git a/usr/src/uts/intel/Makefile.intel.shared b/usr/src/uts/intel/Makefile.intel.shared index 2367e343c3..39aa24a3f4 100644 --- a/usr/src/uts/intel/Makefile.intel.shared +++ b/usr/src/uts/intel/Makefile.intel.shared @@ -341,7 +341,6 @@ DRV_KMODS += emul64 # # Machine Specific Driver Modules (/kernel/drv): # -DRV_KMODS += pci_pci DRV_KMODS += options $(CLOSED_BUILD)CLOSED_DRV_KMODS += scsi_vhci diff --git a/usr/src/uts/intel/Makefile.rules b/usr/src/uts/intel/Makefile.rules index 50de973acd..ccdce16e4c 100644 --- a/usr/src/uts/intel/Makefile.rules +++ b/usr/src/uts/intel/Makefile.rules @@ -135,10 +135,6 @@ $(OBJS_DIR)/%.o: $(UTSBASE)/intel/syscall/%.c $(COMPILE.c) -o $@ $< $(CTFCONVERT_O) -$(OBJS_DIR)/%.o: $(UTSBASE)/common/io/pci_pci/%.c - $(COMPILE.c) -o $@ $< - $(CTFCONVERT_O) - $(OBJS_DIR)/%.o: $(UTSBASE)/common/os/%.c $(COMPILE.c) -o $@ $< $(CTFCONVERT_O) @@ -221,8 +217,5 @@ $(LINTS_DIR)/%.ln: $(UTSBASE)/intel/promif/%.c $(LINTS_DIR)/%.ln: $(UTSBASE)/intel/syscall/%.c @($(LHEAD) $(LINT.c) $< $(LTAIL)) -$(LINTS_DIR)/%.ln: $(UTSBASE)/common/io/pci_pci/%.c - @($(LHEAD) $(LINT.c) $< $(LTAIL)) - $(LINTS_DIR)/%.ln: $(UTSBASE)/common/os/%.c @($(LHEAD) $(LINT.c) $< $(LTAIL)) |