blob: 07a497b2b064265758f8ea78c80c20e1379e17bf (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
|
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* or http://www.opensolaris.org/os/licensing.
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2011 Nexenta Systems, Inc. All rights reserved.
*/
/*
* Copyright 2006 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#ifndef _FMA_H
#define _FMA_H
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __sparc
/*
* Common definitions for fma routines (SPARC)
*/
/* fsr fields */
/* current exception bits */
#define FSR_NXC 0x1
#define FSR_DZC 0x2
#define FSR_UFC 0x4
#define FSR_OFC 0x8
#define FSR_NVC 0x10
#define FSR_CEXC 0x1f /* mask for all cexc bits */
/* accrued exception bits */
#define FSR_NXA 0x20
#define FSR_DZA 0x40
#define FSR_UFA 0x80
#define FSR_OFA 0x100
#define FSR_NVA 0x200
/* trap enable bits */
#define FSR_NXM 0x00800000
#define FSR_DZM 0x01000000
#define FSR_UFM 0x02000000
#define FSR_OFM 0x04000000
#define FSR_NVM 0x08000000
/* rounding directions (right-adjusted) */
#define FSR_RN 0
#define FSR_RZ 1
#define FSR_RP 2
#define FSR_RM 3
/* inline templates */
extern void __fenv_getfsr32(unsigned int *);
extern void __fenv_setfsr32(const unsigned int *);
#endif /* __sparc */
#if defined(__x86)
/*
* Common definitions for fma routines (x86)
*/
/* control and status word fields */
/* exception flags */
#define FSW_NV 0x1
#define FSW_DN 0x2
#define FSW_DZ 0x4
#define FSW_OF 0x8
#define FSW_UF 0x10
#define FSW_NX 0x20
/* exception masks */
#define FCW_NVM 0x00010000
#define FCW_DNM 0x00020000
#define FCW_DZM 0x00040000
#define FCW_OFM 0x00080000
#define FCW_UFM 0x00100000
#define FCW_NXM 0x00200000
#define FCW_ALLM 0x003f0000
/* rounding directions */
#define FCW_RN 0x00000000
#define FCW_RM 0x04000000
#define FCW_RP 0x08000000
#define FCW_RZ 0x0c000000
/* rounding precisions */
#define FCW_P24 0x00000000
#define FCW_P53 0x02000000
#define FCW_P64 0x03000000
/* inline templates */
extern void __fenv_getcwsw(unsigned int *);
extern void __fenv_setcwsw(const unsigned int *);
#endif /* __x86 */
#ifdef __cplusplus
}
#endif
#endif /* _FMA_H */
|
