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'\" te
.\" Copyright (c) 2004, Sun Microsystems, Inc.
.\" Copyright 2019, Joyent, Inc.
.\" The contents of this file are subject to the terms of the Common Development and Distribution License (the "License"). You may not use this file except in compliance with the License.
.\" You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE or http://www.opensolaris.org/os/licensing. See the License for the specific language governing permissions and limitations under the License.
.\" When distributing Covered Code, include this CDDL HEADER in each file and include the License file at usr/src/OPENSOLARIS.LICENSE. If applicable, add the following below this CDDL HEADER, with the fields enclosed by brackets "[]" replaced with your own identifying information: Portions Copyright [yyyy] [name of copyright owner]
.TH DDI_REGS_MAP_SETUP 9F "April 18, 2019"
.SH NAME
ddi_regs_map_setup \- set up a mapping for a register address space
.SH SYNOPSIS
.nf
#include <sys/ddi.h>
#include <sys/sunddi.h>
\fBint\fR \fBddi_regs_map_setup\fR(\fBdev_info_t\fR \fI*dip\fR, \fBuint_t\fR \fIrnumber\fR, \fBcaddr_t\fR \fI*addrp\fR,
\fBoffset_t\fR \fIoffset\fR, \fBoffset_t\fR \fIlen\fR, \fBddi_device_acc_attr_t\fR \fI*accattrp\fR,
\fBddi_acc_handle_t\fR \fI*handlep\fR);
.fi
.SH INTERFACE LEVEL
illumos \fBDDI\fR specific (illumos \fBDDI\fR).
.SH PARAMETERS
.ne 2
.na
\fB\fIdip\fR\fR
.ad
.RS 12n
Pointer to the device's \fBdev_info\fR structure.
.RE
.sp
.ne 2
.na
\fB\fIrnumber\fR\fR
.ad
.RS 12n
Index of the desired tuple (0-based) in the register address space set.
See the
.B Register Numbers
section for more information.
.RE
.sp
.ne 2
.na
\fB\fIaddrp\fR\fR
.ad
.RS 12n
A platform-dependent value that, when added to an offset that is less than or
equal to the \fIlen\fR parameter (see below), is used for the \fBdev_addr\fR
argument to the \fBddi_get\fR, \fBddi_mem_get\fR, and
\fBddi_io_get\fR/\fBput\fR routines.
.RE
.sp
.ne 2
.na
\fB\fIoffset\fR\fR
.ad
.RS 12n
Offset into the register address space.
.RE
.sp
.ne 2
.na
\fB\fIlen\fR\fR
.ad
.RS 12n
Length to be mapped.
.RE
.sp
.ne 2
.na
\fB\fIaccattrp\fR\fR
.ad
.RS 12n
Pointer to a device access attribute structure of this mapping (see
\fBddi_device_acc_attr\fR(9S)).
.RE
.sp
.ne 2
.na
\fB\fIhandlep\fR\fR
.ad
.RS 12n
Pointer to a data access handle.
.RE
.SH DESCRIPTION
\fBddi_regs_map_setup()\fR maps in the register set given by \fIrnumber\fR. The
register number determines which register set is mapped if more than one
exists.
.sp
.LP
\fIoffset\fR specifies the starting location within the register space and
\fIlen\fR indicates the size of the area to be mapped. If \fIlen\fR is
non-zero, it overrides the length given in the register set description. If
both \fIlen\fR and \fIoffset\fR are \fB0\fR, the entire space is mapped. The
base of the mapped register space is returned in \fIaddrp\fR.
.sp
.LP
The device access attributes are specified in the location pointed by the
\fIaccattrp\fR argument (see \fBddi_device_acc_attr\fR(9S) for details).
.sp
.LP
The data access handle is returned in \fIhandlep\fR. \fIhandlep\fR is opaque;
drivers should not attempt to interpret its value. The handle is used by the
system to encode information for subsequent data access function calls to
maintain a consistent view between the host and the device.
.SS Register Numbers
The \fIreg\fR property is an array of tuples. The size of each tuple
varies based on the hardware device type. For example, PCI and PCI
Express devices have one size, while ISA devices have a different size.
Each tuple describes a register space that indicates a way to
communicate with the device. The \fIrnumber\fR argument selects which of
these to use.
.sp
.LP
For example, with PCI and PCI Express devices, the first base address
register (BAR) with a non-zero value is in \fIrnumber\fR \fB1\fR because
it is the second tuple in the \fIreg\fR property. The second BAR with a
non-zero value is in the third tuple (\fIrnumber\fR \fB2\fR).
.sp
.LP
For a full treatment of the meaning of the \fIreg\fR property for PCI
devices, see \fBpci\fR(4). For PCI express devices, see \fBpcie\fR(4).
For ISA devices, see \fBisa\fR(4). For cardbus, see \fBcardbus\fR(4).
For SBus devices, see \fBsbus\fR(4).
.SH RETURN VALUES
\fBddi_regs_map_setup()\fR returns:
.sp
.ne 2
.na
\fB\fBDDI_SUCCESS\fR\fR
.ad
.RS 25n
Successfully set up the mapping for data access.
.RE
.sp
.ne 2
.na
\fB\fBDDI_FAILURE\fR\fR
.ad
.RS 25n
Invalid register number \fIrnumber\fR, offset \fIoffset\fR, or length
\fIlen\fR.
.RE
.sp
.ne 2
.na
\fB\fBDDI_ME_RNUMBER_RANGE\fR\fR
.ad
.RS 25n
Invalid register number \fIrnumber\fR or unable to find \fIreg\fR property.
.RE
.sp
.ne 2
.na
\fB\fBDDI_REGS_ACC_CONFLICT\fR\fR
.ad
.RS 25n
Cannot enable the register mapping due to access conflicts with other enabled
mappings.
.RE
.sp
.LP
Note that the return value \fBDDI_ME_RNUMBER_RANGE\fR is not supported on all
platforms. Also, there is potential overlap between \fBDDI_ME_RNUMBER_RANGE\fR
and \fBDDI_FAILURE\fR. Drivers should check for \fB!=DDI_SUCCESS\fR rather than
checking for a specific failure value.
.SH CONTEXT
\fBddi_regs_map_setup()\fR must be called from user or kernel context.
.SH ATTRIBUTES
See \fBattributes\fR(5) for descriptions of the following attributes:
.sp
.sp
.TS
box;
c | c
l | l .
ATTRIBUTE TYPE ATTRIBUTE VALUE
_
Architecture PCI Local Bus, SBus, ISA
.TE
.SH SEE ALSO
\fBcardbus\fR(4), \fBisa\fR(4), \fBpci\fR(4), \fBpcie\fR(4), \fBsbus\fR(4),
\fBattributes\fR(5), \fBddi_regs_map_free\fR(9F), \fBddi_device_acc_attr\fR(9S)
.sp
.LP
\fIWriting Device Drivers\fR
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