12394 gfx-drm should use gcc-7

Reviewed by: Alexander Pyhalov <apyhalov@gmail.com>
Reviewed by: Gordon Ross <gordon.w.ross@gmail.com>

6 files changed, 15 insertions, 4 deletions

diff --git a/usr/src/Makefile.master b/usr/src/Makefile.master
index c110481..33c7883 100644
--- a/usr/src/Makefile.master
+++ b/usr/src/Makefile.master
@@ -112,7 +112,7 @@ TOOLS_PROTO=		$(TOOLS)/proto/root_$(MACH)-nd
 
 JAVA_ROOT=	/usr/java
 
-GNUC_ROOT=	/opt/gcc/4.4.4
+GNUC_ROOT=	/usr/gcc/7
 GCCLIBDIR=	$(GNUC_ROOT)/lib
 GCCLIBDIR64=	$(GNUC_ROOT)/lib/$(MACH64)
 
@@ -761,9 +761,9 @@ SPRO_VROOT=		$(SPRO_ROOT)/SS12
 GNU_ROOT=		/usr
 
 
-$(__GNUC)PRIMARY_CC=	gcc4,$(GNUC_ROOT)/bin/gcc,gnu
+$(__GNUC)PRIMARY_CC=	gcc7,$(GNUC_ROOT)/bin/gcc,gnu
 $(__SUNC)PRIMARY_CC=	studio12,$(SPRO_VROOT)/bin/cc,sun
-$(__GNUC)PRIMARY_CCC=	gcc4,$(GNUC_ROOT)/bin/g++,gnu
+$(__GNUC)PRIMARY_CCC=	gcc7,$(GNUC_ROOT)/bin/g++,gnu
 $(__SUNC)PRIMARY_CCC=	studio12,$(SPRO_VROOT)/bin/CC,sun
 CW_CC_COMPILERS=	$(PRIMARY_CC:%=--primary %) $(SHADOW_CCS:%=--shadow %)
 CW_CCC_COMPILERS=	$(PRIMARY_CCC:%=--primary %) $(SHADOW_CCCS:%=--shadow %)
diff --git a/usr/src/uts/common/io/drm/drm_sysfs.c b/usr/src/uts/common/io/drm/drm_sysfs.c
index 289924f..d256bb7 100644
--- a/usr/src/uts/common/io/drm/drm_sysfs.c
+++ b/usr/src/uts/common/io/drm/drm_sysfs.c
@@ -131,7 +131,7 @@ void drm_sysfs_device_remove(struct drm_minor *minor)
 			gfxp_vgatext_softc_free(minor->private);
 			minor->private = NULL;
 		}
-
+	/* FALLTHROUGH */
 	/* LINTED */
 	case DRM_MINOR_LEGACY:
 	case DRM_MINOR_CONTROL:
diff --git a/usr/src/uts/intel/io/i915/i915_ums.c b/usr/src/uts/intel/io/i915/i915_ums.c
index c3235d0..3952bad 100644
--- a/usr/src/uts/intel/io/i915/i915_ums.c
+++ b/usr/src/uts/intel/io/i915/i915_ums.c
@@ -242,6 +242,7 @@ void i915_save_display_reg(struct drm_device *dev)
 		if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))
 			for (i = 0; i < 8; i++)
 				dev_priv->regfile.saveFENCE[i+8] = I915_READ(FENCE_REG_945_8 + (i * 4));
+	/* FALLTHROUGH */
 	case 2:
 		for (i = 0; i < 8; i++)
 			dev_priv->regfile.saveFENCE[i] = I915_READ(FENCE_REG_830_0 + (i * 4));
diff --git a/usr/src/uts/intel/io/i915/intel_ddi.c b/usr/src/uts/intel/io/i915/intel_ddi.c
index 34baae5..f00a9eb 100644
--- a/usr/src/uts/intel/io/i915/intel_ddi.c
+++ b/usr/src/uts/intel/io/i915/intel_ddi.c
@@ -887,6 +887,7 @@ bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector)
 	case TRANS_DDI_MODE_SELECT_DP_SST:
 		if (type == DRM_MODE_CONNECTOR_eDP)
 			return true;
+	/* FALLTHROUGH */
 	case TRANS_DDI_MODE_SELECT_DP_MST:
 		return (type == DRM_MODE_CONNECTOR_DisplayPort);
 
diff --git a/usr/src/uts/intel/io/i915/intel_display.c b/usr/src/uts/intel/io/i915/intel_display.c
index 7aca768..ddd8dfa 100644
--- a/usr/src/uts/intel/io/i915/intel_display.c
+++ b/usr/src/uts/intel/io/i915/intel_display.c
@@ -6006,6 +6006,7 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
 		switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
 		default:
 			DRM_ERROR("unknown pipe linked to edp transcoder\n");
+		/* FALLTHROUGH */
 		case TRANS_DDI_EDP_INPUT_A_ONOFF:
 		case TRANS_DDI_EDP_INPUT_A_ON:
 			trans_edp_pipe = PIPE_A;
@@ -7746,6 +7747,7 @@ compute_baseline_pipe_bpp(struct intel_crtc *crtc,
 		/* checked in intel_framebuffer_init already */
 		if (INTEL_INFO(dev)->gen > 3)
 			return -EINVAL;
+	/* FALLTHROUGH */
 	case DRM_FORMAT_RGB565:
 		bpp = 6*3; /* min is 18bpp */
 		break;
@@ -7754,6 +7756,7 @@ compute_baseline_pipe_bpp(struct intel_crtc *crtc,
 		/* checked in intel_framebuffer_init already */
 		if (INTEL_INFO(dev)->gen < 4)
 			return -EINVAL;
+	/* FALLTHROUGH */
 	case DRM_FORMAT_XRGB8888:
 	case DRM_FORMAT_ARGB8888:
 		bpp = 8*3;
diff --git a/usr/src/uts/intel/io/i915/intel_sdvo.c b/usr/src/uts/intel/io/i915/intel_sdvo.c
index ba51b9a..be3a1f8 100644
--- a/usr/src/uts/intel/io/i915/intel_sdvo.c
+++ b/usr/src/uts/intel/io/i915/intel_sdvo.c
@@ -1216,6 +1216,7 @@ static void intel_sdvo_mode_set(struct intel_encoder *intel_encoder)
 	switch (intel_crtc->config.pixel_multiplier) {
 	default:
 		DRM_ERROR("unknown pixel mutlipler specified\n");
+	/* FALLTHROUGH */
 	case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
 	case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
 	case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
@@ -2209,14 +2210,19 @@ intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
 	switch (sdvo->controlled_output) {
 	case SDVO_OUTPUT_LVDS1:
 		mask |= SDVO_OUTPUT_LVDS1;
+	/* FALLTHROUGH */
 	case SDVO_OUTPUT_LVDS0:
 		mask |= SDVO_OUTPUT_LVDS0;
+	/* FALLTHROUGH */
 	case SDVO_OUTPUT_TMDS1:
 		mask |= SDVO_OUTPUT_TMDS1;
+	/* FALLTHROUGH */
 	case SDVO_OUTPUT_TMDS0:
 		mask |= SDVO_OUTPUT_TMDS0;
+	/* FALLTHROUGH */
 	case SDVO_OUTPUT_RGB1:
 		mask |= SDVO_OUTPUT_RGB1;
+	/* FALLTHROUGH */
 	case SDVO_OUTPUT_RGB0:
 		mask |= SDVO_OUTPUT_RGB0;
 		break;