10395 Add support for SMBIOS 3.2

10396 Want libjedec
10397 Check for SMBIOS table with higher version
10398 smbios slot version check is broken for smbios 3.x
10399 smbios CPU Cache extended size not correctly calculated
10400 smbios(1M) slot printing could be clearer
Reviewed by: Jerry Jelinek <jerry.jelinek@joyent.com>
Reviewed by: Jordan Hendricks <jordan.hendricks@joyent.com>
Reviewed by: C Fraire <cfraire@me.com>
Approved by: Richard Lowe <richlowe@richlowe.net>

29 files changed, 2606 insertions, 39 deletions

diff --git a/exception_lists/packaging b/exception_lists/packaging
index 405d2b9af5..4af29a1729 100644
--- a/exception_lists/packaging
+++ b/exception_lists/packaging
@@ -850,3 +850,11 @@ usr/bin/ctfmerge
 # SPARC doesn't currently use this today, though it may in the future.
 #
 usr/include/sys/sensors.h	sparc
+
+#
+# libjedec is private
+#
+usr/include/libjedec.h		i386
+usr/lib/amd64/libjedec.so	i386
+usr/lib/sparcv9/libjedec.so	sparc
+usr/lib/libjedec.so
diff --git a/usr/src/cmd/smbios/Makefile b/usr/src/cmd/smbios/Makefile
index f3d7803a78..c45bd8e519 100644
--- a/usr/src/cmd/smbios/Makefile
+++ b/usr/src/cmd/smbios/Makefile
@@ -30,7 +30,7 @@ SRCS = $(OBJS:%.o=%.c)
 include ../Makefile.cmd
 
 CFLAGS += $(CCVERBOSE)
-LDLIBS += -lsmbios
+LDLIBS += -lsmbios -ljedec
 
 FILEMODE = 0555
 STRIPFLAG =
diff --git a/usr/src/cmd/smbios/smbios.c b/usr/src/cmd/smbios/smbios.c
index a40e393a91..d2d63482f1 100644
--- a/usr/src/cmd/smbios/smbios.c
+++ b/usr/src/cmd/smbios/smbios.c
@@ -40,6 +40,7 @@
 #include <fcntl.h>
 #include <errno.h>
 #include <ctype.h>
+#include <libjedec.h>
 
 #define	SMBIOS_SUCCESS	0
 #define	SMBIOS_ERROR	1
@@ -55,6 +56,17 @@ static int opt_s;
 static int opt_t = -1;
 static int opt_x;
 
+static boolean_t
+smbios_vergteq(smbios_version_t *v, uint_t major, uint_t minor)
+{
+	if (v->smbv_major > major)
+		return (B_TRUE);
+	if (v->smbv_major == major &&
+	    v->smbv_minor >= minor)
+		return (B_TRUE);
+	return (B_FALSE);
+}
+
 /*PRINTFLIKE2*/
 static void
 smbios_warn(smbios_hdl_t *shp, const char *format, ...)
@@ -159,6 +171,22 @@ id_printf(FILE *fp, const char *s, id_t id)
 	}
 }
 
+static void
+jedec_print(FILE *fp, const char *desc, uint_t id)
+{
+	const char *name;
+	uint_t cont, vendor;
+
+	vendor = id & 0xff;
+	cont = (id >> 8) & 0xff;
+	name = libjedec_vendor_string(cont, vendor);
+	if (name == NULL) {
+		oprintf(fp, "  %s: 0x%x\n", desc, id);
+	} else {
+		oprintf(fp, "  %s: 0x%x (%s)\n", desc, id, name);
+	}
+}
+
 static int
 check_oem(smbios_hdl_t *shp)
 {
@@ -656,12 +684,41 @@ print_slot(smbios_hdl_t *shp, id_t id, FILE *fp)
 	    s.smbl_ch2, sizeof (s.smbl_ch2) * NBBY,
 	    smbios_slot_ch2_name, smbios_slot_ch2_desc);
 
-	if (check_oem(shp) != 0 && (v.smbv_major < 2 || v.smbv_minor < 6))
+	if (check_oem(shp) != 0 && !smbios_vergteq(&v, 2, 6))
 		return;
 
 	oprintf(fp, "  Segment Group: %u\n", s.smbl_sg);
 	oprintf(fp, "  Bus Number: %u\n", s.smbl_bus);
-	oprintf(fp, "  Device/Function Number: %u\n", s.smbl_df);
+	oprintf(fp, "  Device/Function Number: %u/%u\n", s.smbl_df >> 3,
+	    s.smbl_df & 0x7);
+
+	if (s.smbl_dbw != 0) {
+		oprintf(fp, "  Data Bus Width: %d\n", s.smbl_dbw);
+	}
+
+	if (s.smbl_npeers > 0) {
+		smbios_slot_peer_t *peer;
+		uint_t i, npeers;
+
+		if (smbios_info_slot_peers(shp, id, &npeers, &peer) != 0) {
+			smbios_warn(shp, "failed to read slot peer "
+			    "information");
+			return;
+		}
+
+		for (i = 0; i < npeers; i++) {
+			oprintf(fp, "  Slot Peer %u:\n", i);
+			oprintf(fp, "    Segment group: %u\n",
+			    peer[i].smblp_group);
+			oprintf(fp, "    Bus/Device/Function: %u/%u/%u",
+			    peer[i].smblp_bus, peer[i].smblp_device,
+			    peer[i].smblp_function);
+			oprintf(fp, "    Electrical width: %u\n",
+			    peer[i].smblp_data_width);
+		}
+
+		smbios_info_slot_peers_free(shp, npeers, peer);
+	}
 }
 
 static void
@@ -931,6 +988,68 @@ print_memdevice(smbios_hdl_t *shp, id_t id, FILE *fp)
 	} else {
 		oprintf(fp, "  Configured Voltage: Unknown\n");
 	}
+
+	if (md.smbmd_memtech != 0) {
+		desc_printf(smbios_memdevice_memtech_desc(md.smbmd_memtech),
+		    fp, "  Memory Technology: %u", md.smbmd_memtech);
+	}
+
+	if (md.smbmd_opcap_flags != 0) {
+		flag_printf(fp, "  Operating Mode Capabilities",
+		    md.smbmd_opcap_flags, sizeof (md.smbmd_opcap_flags) * NBBY,
+		    smbios_memdevice_op_capab_name,
+		    smbios_memdevice_op_capab_desc);
+	}
+
+	if (md.smbmd_firmware_rev[0] != '\0') {
+		oprintf(fp, "  Firmware Revision: %s\n", md.smbmd_firmware_rev);
+	}
+
+	if (md.smbmd_modmfg_id != 0) {
+		jedec_print(fp, "Module Manufacturer ID", md.smbmd_modmfg_id);
+	}
+
+	if (md.smbmd_modprod_id  != 0) {
+		jedec_print(fp, "Module Product ID", md.smbmd_modprod_id);
+	}
+
+	if (md.smbmd_cntrlmfg_id != 0) {
+		jedec_print(fp, "Memory Subsystem Controller Manufacturer ID",
+		    md.smbmd_cntrlmfg_id);
+	}
+
+	if (md.smbmd_cntrlprod_id != 0) {
+		jedec_print(fp, "Memory Subsystem Controller Product ID",
+		    md.smbmd_cntrlprod_id);
+	}
+
+	if (md.smbmd_nvsize == UINT64_MAX) {
+		oprintf(fp, "  Non-volatile Size: Unknown\n");
+	} else if (md.smbmd_nvsize != 0) {
+		oprintf(fp, "  Non-volatile Size: %llu bytes\n",
+		    (u_longlong_t)md.smbmd_nvsize);
+	}
+
+	if (md.smbmd_volatile_size == UINT64_MAX) {
+		oprintf(fp, "  Volatile Size: Unknown\n");
+	} else if (md.smbmd_volatile_size != 0) {
+		oprintf(fp, "  Volatile Size: %llu bytes\n",
+		    (u_longlong_t)md.smbmd_volatile_size);
+	}
+
+	if (md.smbmd_cache_size == UINT64_MAX) {
+		oprintf(fp, "  Cache Size: Unknown\n");
+	} else if (md.smbmd_cache_size != 0) {
+		oprintf(fp, "  Cache Size: %llu bytes\n",
+		    (u_longlong_t)md.smbmd_cache_size);
+	}
+
+	if (md.smbmd_logical_size == UINT64_MAX) {
+		oprintf(fp, "  Logical Size: Unknown\n");
+	} else if (md.smbmd_logical_size != 0) {
+		oprintf(fp, "  Logical Size: %llu bytes\n",
+		    (u_longlong_t)md.smbmd_logical_size);
+	}
 }
 
 static void
diff --git a/usr/src/common/smbios/mktables.sh b/usr/src/common/smbios/mktables.sh
index 969c329b25..cd711f6474 100644
--- a/usr/src/common/smbios/mktables.sh
+++ b/usr/src/common/smbios/mktables.sh
@@ -22,7 +22,7 @@
 #
 #
 # Copyright 2015 OmniTI Computer Consulting, Inc.  All rights reserved.
-# Copyright (c) 2017, Joyent, Inc.
+# Copyright (c) 2018, Joyent, Inc.
 # Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
 # Use is subject to license terms.
 #
@@ -49,9 +49,10 @@ SMB_CAF_	smbios_cache_flag_name		uint_t
 SMB_EVFL_	smbios_evlog_flag_name		uint_t
 SMB_IPMI_F_	smbios_ipmi_flag_name		uint_t
 SMB_POWERSUP_F_	smbios_powersup_flag_name	uint_t
+SMB_MOMC_	smbios_memdevice_op_capab_name	uint_t
 SMB_MDF_	smbios_memdevice_flag_name	uint_t
 SMB_PRC_	smbios_processor_core_flag_name	uint_t
-SMB_TYPE_ 	smbios_type_name		uint_t
+SMB_TYPE_	smbios_type_name		uint_t
 SMB_SLCH1_	smbios_slot_ch1_name		uint_t
 SMB_SLCH2_	smbios_slot_ch2_name		uint_t
 '
@@ -93,6 +94,8 @@ SMB_MDF_	smbios_memdevice_flag_desc	uint_t
 SMB_MDFF_	smbios_memdevice_form_desc	uint_t
 SMB_MDT_	smbios_memdevice_type_desc	uint_t
 SMB_MDR_	smbios_memdevice_rank_desc	uint_t
+SMB_MTECH_	smbios_memdevice_memtech_desc	uint_t
+SMB_MOMC_	smbios_memdevice_op_capab_desc	uint_t
 SMB_OBT_	smbios_onboard_type_desc	uint_t
 SMB_POC_	smbios_port_conn_desc		uint_t
 SMB_POT_	smbios_port_type_desc		uint_t
@@ -109,7 +112,7 @@ SMB_SLU_	smbios_slot_usage_desc		uint_t
 SMB_SLW_	smbios_slot_width_desc		uint_t
 SMB_TPROBE_L_	smbios_tprobe_loc_desc		uint_t
 SMB_TPROBE_S_	smbios_tprobe_status_desc	uint_t
-SMB_TYPE_ 	smbios_type_desc		uint_t
+SMB_TYPE_	smbios_type_desc		uint_t
 SMB_VPROBE_L_	smbios_vprobe_loc_desc		uint_t
 SMB_VPROBE_S_	smbios_vprobe_status_desc	uint_t
 SMB_WAKEUP_	smbios_system_wakeup_desc	uint_t
diff --git a/usr/src/common/smbios/smb_info.c b/usr/src/common/smbios/smb_info.c
index eb39095bde..2c67f2964a 100644
--- a/usr/src/common/smbios/smb_info.c
+++ b/usr/src/common/smbios/smb_info.c
@@ -67,6 +67,7 @@
 
 #include <sys/smbios_impl.h>
 #include <sys/byteorder.h>
+#include <sys/debug.h>
 
 #ifdef _KERNEL
 #include <sys/sunddi.h>
@@ -603,12 +604,14 @@ smbios_info_cache(smbios_hdl_t *shp, id_t id, smbios_cache_t *cap)
 		cap->smba_flags |= SMB_CAF_SOCKETED;
 
 	if (smb_libgteq(shp, SMB_VERSION_31)) {
-		if (smb_gteq(shp, SMB_VERSION_31)) {
-			cap->smba_maxsize2 =
-			    SMB_CACHE_EXT_SIZE(c.smbca_maxsize2);
-			cap->smba_size2 = SMB_CACHE_EXT_SIZE(c.smbca_size2);
-		} else {
+		cap->smba_maxsize2 = SMB_CACHE_EXT_SIZE(c.smbca_maxsize2);
+		cap->smba_size2 = SMB_CACHE_EXT_SIZE(c.smbca_size2);
+
+		if (cap->smba_maxsize2 == 0) {
 			cap->smba_maxsize2 = cap->smba_maxsize;
+		}
+
+		if (cap->smba_size2 == 0) {
 			cap->smba_size2 = cap->smba_size;
 		}
 	}
@@ -654,7 +657,7 @@ smbios_info_slot(smbios_hdl_t *shp, id_t id, smbios_slot_t *sp)
 		return (smb_set_errno(shp, ESMB_TYPE));
 
 	smb_info_bcopy(stp->smbst_hdr, &s, sizeof (s));
-	bzero(sp, sizeof (smbios_slot_t));
+	bzero(sp, sizeof (smb_base_slot_t));
 
 	sp->smbl_name = smb_strptr(stp, s.smbsl_name);
 	sp->smbl_type = s.smbsl_type;
@@ -668,6 +671,77 @@ smbios_info_slot(smbios_hdl_t *shp, id_t id, smbios_slot_t *sp)
 	sp->smbl_bus = s.smbsl_bus;
 	sp->smbl_df = s.smbsl_df;
 
+	if (smb_libgteq(shp, SMB_VERSION_32)) {
+		sp->smbl_dbw = s.smbsl_dbw;
+		sp->smbl_npeers = s.smbsl_npeers;
+	}
+
+	return (0);
+}
+
+void
+smbios_info_slot_peers_free(smbios_hdl_t *shp, uint_t npeers,
+    smbios_slot_peer_t *peer)
+{
+	size_t sz = npeers * sizeof (smbios_slot_peer_t);
+
+	if (npeers == 0) {
+		ASSERT3P(peer, ==, NULL);
+		return;
+	}
+
+	smb_free(peer, sz);
+}
+
+int
+smbios_info_slot_peers(smbios_hdl_t *shp, id_t id, uint_t *npeers,
+    smbios_slot_peer_t **peerp)
+{
+	const smb_struct_t *stp = smb_lookup_id(shp, id);
+	const smb_slot_t *slotp = (const smb_slot_t *)stp->smbst_hdr;
+	smbios_slot_peer_t *peer;
+	size_t minlen;
+	uint_t i;
+
+	if (stp == NULL)
+		return (-1); /* errno is set for us */
+
+	if (stp->smbst_hdr->smbh_type != SMB_TYPE_SLOT)
+		return (smb_set_errno(shp, ESMB_TYPE));
+
+	if (stp->smbst_hdr->smbh_len <= offsetof(smb_slot_t, smbsl_npeers) ||
+	    slotp->smbsl_npeers == 0) {
+		*npeers = 0;
+		*peerp = NULL;
+		return (0);
+	}
+
+	/*
+	 * Make sure that the size of the structure makes sense for the number
+	 * of peers reported.
+	 */
+	minlen = slotp->smbsl_npeers * sizeof (smb_slot_peer_t) +
+	    offsetof(smb_slot_t, smbsl_npeers);
+	if (stp->smbst_hdr->smbh_len < minlen) {
+		return (smb_set_errno(shp, ESMB_SHORT));
+	}
+
+	if ((peer = smb_alloc(slotp->smbsl_npeers *
+	    sizeof (smbios_slot_peer_t))) == NULL) {
+		return (smb_set_errno(shp, ESMB_NOMEM));
+	}
+
+	for (i = 0; i < slotp->smbsl_npeers; i++) {
+		peer[i].smblp_group = slotp->smbsl_peers[i].smbspb_group_no;
+		peer[i].smblp_bus = slotp->smbsl_peers[i].smbspb_bus;
+		peer[i].smblp_device = slotp->smbsl_peers[i].smbspb_df >> 3;
+		peer[i].smblp_function = slotp->smbsl_peers[i].smbspb_df & 0x7;
+		peer[i].smblp_data_width = slotp->smbsl_peers[i].smbspb_width;
+	}
+
+	*npeers = slotp->smbsl_npeers;
+	*peerp = peer;
+
 	return (0);
 }
 
@@ -923,6 +997,21 @@ smbios_info_memdevice(smbios_hdl_t *shp, id_t id, smbios_memdevice_t *mdp)
 		mdp->smbmd_confvolt = m.smbmdev_confvolt;
 	}
 
+	if (smb_libgteq(shp, SMB_VERSION_32)) {
+		mdp->smbmd_memtech = m.smbmdev_memtech;
+		mdp->smbmd_opcap_flags = m.smbmdev_opmode;
+		mdp->smbmd_firmware_rev = smb_strptr(stp,
+		    m.smbmdev_fwver);
+		mdp->smbmd_modmfg_id = m.smbmdev_modulemfgid;
+		mdp->smbmd_modprod_id = m.smbmdev_moduleprodid;
+		mdp->smbmd_cntrlmfg_id = m.smbmdev_memsysmfgid;
+		mdp->smbmd_cntrlprod_id = m.smbmdev_memsysprodid;
+		mdp->smbmd_nvsize = m.smbmdev_nvsize;
+		mdp->smbmd_volatile_size = m.smbmdev_volsize;
+		mdp->smbmd_cache_size = m.smbmdev_cachesize;
+		mdp->smbmd_logical_size = m.smbmdev_logicalsize;
+	}
+
 	return (0);
 }
 
diff --git a/usr/src/common/smbios/smb_open.c b/usr/src/common/smbios/smb_open.c
index 36472b491d..a81294592d 100644
--- a/usr/src/common/smbios/smb_open.c
+++ b/usr/src/common/smbios/smb_open.c
@@ -21,7 +21,7 @@
 
 /*
  * Copyright 2015 OmniTI Computer Consulting, Inc.  All rights reserved.
- * Copyright 2016 Joyent, Inc.
+ * Copyright 2018 Joyent, Inc.
  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
  */
@@ -229,6 +229,7 @@ smbios_bufopen(const smbios_entry_t *ep, const void *buf, size_t len,
 	case SMB_VERSION_28:
 	case SMB_VERSION_30:
 	case SMB_VERSION_31:
+	case SMB_VERSION_32:
 		break;
 	default:
 		return (smb_open_error(shp, errp, ESMB_VERSION));
diff --git a/usr/src/lib/Makefile b/usr/src/lib/Makefile
index 002501f668..5e5da05650 100644
--- a/usr/src/lib/Makefile
+++ b/usr/src/lib/Makefile
@@ -155,6 +155,7 @@ SUBDIRS +=				\
 	libipp		\
 	libipsecutil	\
 	libiscsit	\
+	libjedec	\
 	libkmf		\
 	libkrb5		\
 	libkstat	\
diff --git a/usr/src/lib/libjedec/Makefile b/usr/src/lib/libjedec/Makefile
new file mode 100644
index 0000000000..a2cb880270
--- /dev/null
+++ b/usr/src/lib/libjedec/Makefile
@@ -0,0 +1,44 @@
+#
+# This file and its contents are supplied under the terms of the
+# Common Development and Distribution License ("CDDL"), version 1.0.
+# You may only use this file in accordance with the terms of version
+# 1.0 of the CDDL.
+#
+# A full copy of the text of the CDDL should have accompanied this
+# source.  A copy of the CDDL is also available via the Internet at
+# http://www.illumos.org/license/CDDL.
+#
+
+#
+# Copyright (c) 2018 Joyent, Inc.
+#
+
+include		../Makefile.lib
+
+HDRS =		libjedec.h
+HDRDIR =	common
+SUBDIRS =	$(MACH)
+$(BUILD64)SUBDIRS +=	$(MACH64)
+
+all :=		TARGET = all
+clean :=	TARGET = clean
+clobber :=	TARGET = clobber
+install :=	TARGET = install
+lint :=		TARGET = lint
+
+.KEEP_STATE:
+
+all clean clobber lint: $(SUBDIRS)
+
+install:	$(SUBDIRS) install_h
+
+install_h:	$(ROOTHDRS)
+
+check:		$(CHECKHDRS)
+
+$(SUBDIRS):  FRC
+	@cd $@; pwd; $(MAKE) $(TARGET)
+
+FRC:
+
+include ../Makefile.targ
diff --git a/usr/src/lib/libjedec/Makefile.com b/usr/src/lib/libjedec/Makefile.com
new file mode 100644
index 0000000000..6b2f6da64d
--- /dev/null
+++ b/usr/src/lib/libjedec/Makefile.com
@@ -0,0 +1,33 @@
+#
+# This file and its contents are supplied under the terms of the
+# Common Development and Distribution License ("CDDL"), version 1.0.
+# You may only use this file in accordance with the terms of version
+# 1.0 of the CDDL.
+#
+# A full copy of the text of the CDDL should have accompanied this
+# source.  A copy of the CDDL is also available via the Internet at
+# http://www.illumos.org/license/CDDL.
+#
+
+#
+# Copyright (c) 2018 Joyent, Inc.
+#
+
+LIBRARY =	libjedec.a
+VERS =		.1
+OBJECTS =	libjedec.o
+
+include ../../Makefile.lib
+
+LIBS =		$(DYNLIB) $(LINTLIB)
+CPPFLAGS +=	-I../common
+
+SRCDIR =	../common
+
+.KEEP_STATE:
+
+all:	$(LIBS)
+
+lint:	lintcheck
+
+include ../../Makefile.targ
diff --git a/usr/src/lib/libjedec/amd64/Makefile b/usr/src/lib/libjedec/amd64/Makefile
new file mode 100644
index 0000000000..22d2fd32db
--- /dev/null
+++ b/usr/src/lib/libjedec/amd64/Makefile
@@ -0,0 +1,19 @@
+#
+# This file and its contents are supplied under the terms of the
+# Common Development and Distribution License ("CDDL"), version 1.0.
+# You may only use this file in accordance with the terms of version
+# 1.0 of the CDDL.
+#
+# A full copy of the text of the CDDL should have accompanied this
+# source.  A copy of the CDDL is also available via the Internet at
+# http://www.illumos.org/license/CDDL.
+#
+
+#
+# Copyright (c) 2018 Joyent, Inc.
+#
+
+include ../Makefile.com
+include ../../Makefile.lib.64
+
+install: all $(ROOTLIBS64) $(ROOTLINKS64) $(ROOTLINT64)
diff --git a/usr/src/lib/libjedec/common/libjedec.c b/usr/src/lib/libjedec/common/libjedec.c
new file mode 100644
index 0000000000..fd2df9e775
--- /dev/null
+++ b/usr/src/lib/libjedec/common/libjedec.c
@@ -0,0 +1,1323 @@
+/*
+ * This file and its contents are supplied under the terms of the
+ * Common Development and Distribution License ("CDDL"), version 1.0.
+ * You may only use this file in accordance with the terms of version
+ * 1.0 of the CDDL.
+ *
+ * A full copy of the text of the CDDL should have accompanied this
+ * source.  A copy of the CDDL is also available via the Internet at
+ * http://www.illumos.org/license/CDDL.
+ */
+
+/*
+ * Copyright (c) 2018, Joyent, Inc.
+ */
+
+#include <sys/types.h>
+#include <sys/sysmacros.h>
+
+/*
+ * This section of the library is dedicated to decoding the JEDEC vendor codes
+ * as defined in JEP-106 AV (July 2017). The vendor code is encoded as a series
+ * of continuation bytes and then the current vendor value. Each of the tables
+ * below corresponds to one of the continuation values and is ordered based on
+ * JEP-106.
+ *
+ * The value of a given vendor is encoded with a parity bit. That parity bit
+ * is left intact.
+ */
+
+typedef struct libjedec_vendor_pair {
+	const uint_t ljp_val;
+	const char *ljp_name;
+} libjedec_vendor_pair_t;
+
+static const libjedec_vendor_pair_t libjedec_vendors_0[126] = {
+	{ 0x01, "AMD" },
+	{ 0x02, "AMI" },
+	{ 0x83, "Fairchild" },
+	{ 0x04, "Fujitsu" },
+	{ 0x85, "GTE" },
+	{ 0x86, "Harris" },
+	{ 0x07, "Hitachi" },
+	{ 0x08, "Inmos" },
+	{ 0x89, "Intel" },
+	{ 0x8A, "I.T.T." },
+	{ 0x0B, "Intersil" },
+	{ 0x8C, "Monolithic Memories" },
+	{ 0x0D, "Mostek" },
+	{ 0x0E, "Freescale (Motorola)" },
+	{ 0x8F, "National" },
+	{ 0x10, "NEC" },
+	{ 0x91, "RCA" },
+	{ 0x92, "Raytheon" },
+	{ 0x13, "Conexant (Rockwell)" },
+	{ 0x94, "Seeq" },
+	{ 0x15, "NXP (Philips)" },
+	{ 0x16, "Synertek" },
+	{ 0x97, "Texas Instruments" },
+	{ 0x98, "Toshiba" },
+	{ 0x19, "Xicor" },
+	{ 0x1A, "Zilog" },
+	{ 0x9B, "Eurotechnique" },
+	{ 0x1C, "Mitsubishi" },
+	{ 0x9D, "Lucent (AT&T)" },
+	{ 0x9E, "Exel" },
+	{ 0x1F, "Atmel" },
+	{ 0x20, "STMicroelectronics" },
+	{ 0xA1, "Lattice Semi." },
+	{ 0xA2, "NCR" },
+	{ 0x23, "Wafer Scale Integration" },
+	{ 0xA4, "IBM" },
+	{ 0x25, "Tristar" },
+	{ 0x26, "Visic" },
+	{ 0xA7, "Intl. CMOS Technology" },
+	{ 0xA8, "SSSI" },
+	{ 0x29, "MicrochipTechnology" },
+	{ 0x2A, "Ricoh Ltd." },
+	{ 0xAB, "VLSI" },
+	{ 0x2C, "Micron Technology" },
+	{ 0xAD, "SK Hynix" },
+	{ 0xAE, "OKI Semiconductor" },
+	{ 0x2F, "ACTEL" },
+	{ 0xB0, "Sharp" },
+	{ 0x31, "Catalyst" },
+	{ 0x32, "Panasonic" },
+	{ 0xB3, "IDT" },
+	{ 0x34, "Cypress" },
+	{ 0xB5, "DEC" },
+	{ 0xB6, "LSI Logic" },
+	{ 0x37, "Zarlink (Plessey)" },
+	{ 0x38, "UTMC" },
+	{ 0xB9, "Thinking Machine" },
+	{ 0xBA, "Thomson CSF" },
+	{ 0x3B, "Integrated CMOS (Vertex)" },
+	{ 0xBC, "Honeywell" },
+	{ 0x3D, "Tektronix" },
+	{ 0x3E, "Oracle Corporation" },
+	{ 0xBF, "Silicon Storage Technology" },
+	{ 0x40, "ProMos/Mosel Vitelic" },
+	{ 0xC1, "Infineon (Siemens)" },
+	{ 0xC2, "Macronix" },
+	{ 0x43, "Xerox" },
+	{ 0xC4, "Plus Logic" },
+	{ 0x45, "SanDisk Corporation" },
+	{ 0x46, "Elan Circuit Tech." },
+	{ 0xC7, "European Silicon Str." },
+	{ 0xC8, "Apple Computer" },
+	{ 0x49, "Xilinx" },
+	{ 0x4A, "Compaq" },
+	{ 0xCB, "Protocol Engines" },
+	{ 0x4C, "SCI" },
+	{ 0xCD, "Seiko Instruments" },
+	{ 0xCE, "Samsung" },
+	{ 0x4F, "I3 Design System" },
+	{ 0xD0, "Klic" },
+	{ 0x51, "Crosspoint Solutions" },
+	{ 0x52, "Alliance Semiconductor" },
+	{ 0xD3, "Tandem" },
+	{ 0x54, "Hewlett-Packard" },
+	{ 0xD5, "Integrated Silicon Solutions" },
+	{ 0xD6, "Brooktree" },
+	{ 0x57, "New Media" },
+	{ 0x58, "MHS Electronic" },
+	{ 0xD9, "Performance Semi." },
+	{ 0xDA, "Winbond Electronic" },
+	{ 0x5B, "Kawasaki Steel" },
+	{ 0xDC, "Bright Micro" },
+	{ 0x5D, "TECMAR" },
+	{ 0x5E, "Exar" },
+	{ 0xDF, "PCMCIA" },
+	{ 0xE0, "LG Semi (Goldstar)" },
+	{ 0x61, "Northern Telecom" },
+	{ 0x62, "Sanyo" },
+	{ 0xE3, "Array Microsystems" },
+	{ 0x64, "Crystal Semiconductor" },
+	{ 0xE5, "Analog Devices" },
+	{ 0xE6, "PMC-Sierra" },
+	{ 0x67, "Asparix" },
+	{ 0x68, "Convex Computer" },
+	{ 0xE9, "Quality Semiconductor" },
+	{ 0xEA, "Nimbus Technology" },
+	{ 0x6B, "Transwitch" },
+	{ 0xEC, "Micronas (ITT Intermetall)" },
+	{ 0x6D, "Cannon" },
+	{ 0x6E, "Altera" },
+	{ 0xEF, "NEXCOM" },
+	{ 0x70, "Qualcomm" },
+	{ 0xF1, "Sony" },
+	{ 0xF2, "Cray Research" },
+	{ 0x73, "AMS(Austria Micro)" },
+	{ 0xF4, "Vitesse" },
+	{ 0x75, "Aster Electronics" },
+	{ 0x76, "Bay Networks (Synoptic)" },
+	{ 0xF7, "Zentrum/ZMD" },
+	{ 0xF8, "TRW" },
+	{ 0x79, "Thesys" },
+	{ 0x7A, "Solbourne Computer" },
+	{ 0xFB, "Allied-Signal" },
+	{ 0x7C, "Dialog Semiconductor" },
+	{ 0xFD, "Media Vision" },
+	{ 0xFE, "Numonyx Corporation" }
+};
+
+static const libjedec_vendor_pair_t libjedec_vendors_1[126] = {
+	{ 0x01, "Cirrus Logic" },
+	{ 0x02, "National Instruments" },
+	{ 0x83, "ILC Data Device" },
+	{ 0x04, "Alcatel Mietec" },
+	{ 0x85, "Micro Linear" },
+	{ 0x86, "Univ. of NC" },
+	{ 0x07, "JTAG Technologies" },
+	{ 0x08, "BAE Systems (Loral)" },
+	{ 0x89, "Nchip" },
+	{ 0x8A, "Galileo Tech" },
+	{ 0x0B, "Bestlink Systems" },
+	{ 0x8C, "Graychip" },
+	{ 0x0D, "GENNUM" },
+	{ 0x0E, "VideoLogic" },
+	{ 0x8F, "Robert Bosch" },
+	{ 0x10, "Chip Express" },
+	{ 0x91, "DATARAM" },
+	{ 0x92, "United Microelectronics Corp." },
+	{ 0x13, "TCSI" },
+	{ 0x94, "Smart Modular" },
+	{ 0x15, "Hughes Aircraft" },
+	{ 0x16, "Lanstar Semiconductor" },
+	{ 0x97, "Qlogic" },
+	{ 0x98, "Kingston" },
+	{ 0x19, "Music Semi" },
+	{ 0x1A, "Ericsson Components" },
+	{ 0x9B, "SpaSE" },
+	{ 0x1C, "Eon Silicon Devices" },
+	{ 0x9D, "Integrated Silicon Solution (ISSI)" },
+	{ 0x9E, "DoD" },
+	{ 0x1F, "Integ. Memories Tech." },
+	{ 0x20, "Corollary Inc." },
+	{ 0xA1, "Dallas Semiconductor" },
+	{ 0xA2, "Omnivision" },
+	{ 0x23, "EIV(Switzerland)" },
+	{ 0xA4, "Novatel Wireless" },
+	{ 0x25, "Zarlink (Mitel)" },
+	{ 0x26, "Clearpoint" },
+	{ 0xA7, "Cabletron" },
+	{ 0xA8, "STEC (Silicon Tech)" },
+	{ 0x29, "Vanguard" },
+	{ 0x2A, "Hagiwara Sys-Com" },
+	{ 0xAB, "Vantis" },
+	{ 0x2C, "Celestica" },
+	{ 0xAD, "Century" },
+	{ 0xAE, "Hal Computers" },
+	{ 0x2F, "Rohm Company Ltd." },
+	{ 0xB0, "Juniper Networks" },
+	{ 0x31, "Libit Signal Processing" },
+	{ 0x32, "Mushkin Enhanced Memory" },
+	{ 0xB3, "Tundra Semiconductor" },
+	{ 0x34, "Adaptec Inc." },
+	{ 0xB5, "LightSpeed Semi." },
+	{ 0xB6, "ZSP Corp." },
+	{ 0x37, "AMIC Technology" },
+	{ 0x38, "Adobe Systems" },
+	{ 0xB9, "Dynachip" },
+	{ 0xBA, "PNY Technologies, Inc." },
+	{ 0x3B, "Newport Digital" },
+	{ 0xBC, "MMC Networks" },
+	{ 0x3D, "T Square" },
+	{ 0x3E, "Seiko Epson" },
+	{ 0xBF, "Broadcom" },
+	{ 0x40, "Viking Components" },
+	{ 0xC1, "V3 Semiconductor" },
+	{ 0xC2, "Flextronics (Orbit Semiconductor)" },
+	{ 0x43, "Suwa Electronics" },
+	{ 0xC4, "Transmeta" },
+	{ 0x45, "Micron CMS" },
+	{ 0x46, "American Computer & Digital Components Inc." },
+	{ 0xC7, "Enhance 3000 Inc." },
+	{ 0xC8, "Tower Semiconductor" },
+	{ 0x49, "CPU Design" },
+	{ 0x4A, "Price Point" },
+	{ 0xCB, "Maxim Integrated Product" },
+	{ 0x4C, "Tellabs" },
+	{ 0xCD, "Centaur Technology" },
+	{ 0xCE, "Unigen Corporation" },
+	{ 0x4F, "Transcend Information" },
+	{ 0xD0, "Memory Card Technology" },
+	{ 0x51, "CKD Corporation Ltd." },
+	{ 0x52, "Capital Instruments, Inc." },
+	{ 0xD3, "Aica Kogyo, Ltd." },
+	{ 0x54, "Linvex Technology" },
+	{ 0xD5, "MSC Vertriebs GmbH" },
+	{ 0xD6, "AKM Company, Ltd." },
+	{ 0x57, "Dynamem, Inc." },
+	{ 0x58, "NERA ASA" },
+	{ 0xD9, "GSI Technology" },
+	{ 0xDA, "Dane-Elec (C Memory)" },
+	{ 0x5B, "Acorn Computers" },
+	{ 0xDC, "Lara Technology" },
+	{ 0x5D, "Oak Technology, Inc." },
+	{ 0x5E, "Itec Memory" },
+	{ 0xDF, "Tanisys Technology" },
+	{ 0xE0, "Truevision" },
+	{ 0x61, "Wintec Industries" },
+	{ 0x62, "Super PC Memory" },
+	{ 0xE3, "MGV Memory" },
+	{ 0x64, "Galvantech" },
+	{ 0xE5, "Gadzoox Networks" },
+	{ 0xE6, "Multi Dimensional Cons." },
+	{ 0x67, "GateField" },
+	{ 0x68, "Integrated Memory System" },
+	{ 0xE9, "Triscend" },
+	{ 0xEA, "XaQti" },
+	{ 0x6B, "Goldenram" },
+	{ 0xEC, "Clear Logic" },
+	{ 0x6D, "Cimaron Communications" },
+	{ 0x6E, "Nippon Steel Semi. Corp." },
+	{ 0xEF, "Advantage Memory" },
+	{ 0x70, "AMCC" },
+	{ 0xF1, "LeCroy" },
+	{ 0xF2, "Yamaha Corporation" },
+	{ 0x73, "Digital Microwave" },
+	{ 0xF4, "NetLogic Microsystems" },
+	{ 0x75, "MIMOS Semiconductor" },
+	{ 0x76, "Advanced Fibre" },
+	{ 0xF7, "BF Goodrich Data." },
+	{ 0xF8, "Epigram" },
+	{ 0x79, "Acbel Polytech Inc." },
+	{ 0x7A, "Apacer Technology" },
+	{ 0xFB, "Admor Memory" },
+	{ 0x7C, "FOXCONN" },
+	{ 0xFD, "Quadratics Superconductor" },
+	{ 0xFE, "3COM" }
+};
+
+static const libjedec_vendor_pair_t libjedec_vendors_2[126] = {
+	{ 0x01, "Camintonn Corporation" },
+	{ 0x02, "ISOA Incorporated" },
+	{ 0x83, "Agate Semiconductor" },
+	{ 0x04, "ADMtek Incorporated" },
+	{ 0x85, "HYPERTEC" },
+	{ 0x86, "Adhoc Technologies" },
+	{ 0x07, "MOSAID Technologies" },
+	{ 0x08, "Ardent Technologies" },
+	{ 0x89, "Switchcore" },
+	{ 0x8A, "Cisco Systems, Inc." },
+	{ 0x0B, "Allayer Technologies" },
+	{ 0x8C, "WorkX AG (Wichman)" },
+	{ 0x0D, "Oasis Semiconductor" },
+	{ 0x0E, "Novanet Semiconductor" },
+	{ 0x8F, "E-M Solutions" },
+	{ 0x10, "Power General" },
+	{ 0x91, "Advanced Hardware Arch." },
+	{ 0x92, "Inova Semiconductors GmbH" },
+	{ 0x13, "Telocity" },
+	{ 0x94, "Delkin Devices" },
+	{ 0x15, "Symagery Microsystems" },
+	{ 0x16, "C-Port Corporation" },
+	{ 0x97, "SiberCore Technologies" },
+	{ 0x98, "Southland Microsystems" },
+	{ 0x19, "Malleable Technologies" },
+	{ 0x1A, "Kendin Communications" },
+	{ 0x9B, "Great Technology Microcomputer" },
+	{ 0x1C, "Sanmina Corporation" },
+	{ 0x9D, "HADCO Corporation" },
+	{ 0x9E, "Corsair" },
+	{ 0x1F, "Actrans System Inc." },
+	{ 0x20, "ALPHA Technologies" },
+	{ 0xA1, "Silicon Laboratories, Inc. (Cygnal)" },
+	{ 0xA2, "Artesyn Technologies" },
+	{ 0x23, "Align Manufacturing" },
+	{ 0xA4, "Peregrine Semiconductor" },
+	{ 0x25, "Chameleon Systems" },
+	{ 0x26, "Aplus Flash Technology" },
+	{ 0xA7, "MIPS Technologies" },
+	{ 0xA8, "Chrysalis ITS" },
+	{ 0x29, "ADTEC Corporation" },
+	{ 0x2A, "Kentron Technologies" },
+	{ 0xAB, "Win Technologies" },
+	{ 0x2C, "Tezzaron Semiconductor" },
+	{ 0xAD, "Extreme Packet Devices" },
+	{ 0xAE, "RF Micro Devices" },
+	{ 0x2F, "Siemens AG" },
+	{ 0xB0, "Sarnoff Corporation" },
+	{ 0x31, "Itautec SA" },
+	{ 0x32, "Radiata Inc." },
+	{ 0xB3, "Benchmark Elect. (AVEX)" },
+	{ 0x34, "Legend" },
+	{ 0xB5, "SpecTek Incorporated" },
+	{ 0xB6, "Hi/fn" },
+	{ 0x37, "Enikia Incorporated" },
+	{ 0x38, "SwitchOn Networks" },
+	{ 0xB9, "AANetcom Incorporated" },
+	{ 0xBA, "Micro Memory Bank" },
+	{ 0x3B, "ESS Technology" },
+	{ 0xBC, "Virata Corporation" },
+	{ 0x3D, "Excess Bandwidth" },
+	{ 0x3E, "West Bay Semiconductor" },
+	{ 0xBF, "DSP Group" },
+	{ 0x40, "Newport Communications" },
+	{ 0xC1, "Chip2Chip Incorporated" },
+	{ 0xC2, "Phobos Corporation" },
+	{ 0x43, "Intellitech Corporation" },
+	{ 0xC4, "Nordic VLSI ASA" },
+	{ 0x45, "Ishoni Networks" },
+	{ 0x46, "Silicon Spice" },
+	{ 0xC7, "Alchemy Semiconductor" },
+	{ 0xC8, "Agilent Technologies" },
+	{ 0x49, "Centillium Communications" },
+	{ 0x4A, "W.L. Gore" },
+	{ 0xCB, "HanBit Electronics" },
+	{ 0x4C, "GlobeSpan" },
+	{ 0xCD, "Element 14" },
+	{ 0xCE, "Pycon" },
+	{ 0x4F, "Saifun Semiconductors" },
+	{ 0xD0, "Sibyte, Incorporated" },
+	{ 0x51, "MetaLink Technologies" },
+	{ 0x52, "Feiya Technology" },
+	{ 0xD3, "I & C Technology" },
+	{ 0x54, "Shikatronics" },
+	{ 0xD5, "Elektrobit" },
+	{ 0xD6, "Megic" },
+	{ 0x57, "Com-Tier" },
+	{ 0x58, "Malaysia Micro Solutions" },
+	{ 0xD9, "Hyperchip" },
+	{ 0xDA, "Gemstone Communications" },
+	{ 0x5B, "Anadigm (Anadyne)" },
+	{ 0xDC, "3ParData" },
+	{ 0x5D, "Mellanox Technologies" },
+	{ 0x5E, "Tenx Technologies" },
+	{ 0xDF, "Helix AG" },
+	{ 0xE0, "Domosys" },
+	{ 0x61, "Skyup Technology" },
+	{ 0x62, "HiNT Corporation" },
+	{ 0xE3, "Chiaro" },
+	{ 0x64, "MDT Technologies GmbH" },
+	{ 0xE5, "Exbit Technology A/S" },
+	{ 0xE6, "Integrated Technology Express" },
+	{ 0x67, "AVED Memory" },
+	{ 0x68, "Legerity" },
+	{ 0xE9, "Jasmine Networks" },
+	{ 0xEA, "Caspian Networks" },
+	{ 0x6B, "nCUBE" },
+	{ 0xEC, "Silicon Access Networks" },
+	{ 0x6D, "FDK Corporation" },
+	{ 0x6E, "High Bandwidth Access" },
+	{ 0xEF, "MultiLink Technology" },
+	{ 0x70, "BRECIS" },
+	{ 0xF1, "World Wide Packets" },
+	{ 0xF2, "APW" },
+	{ 0x73, "Chicory Systems" },
+	{ 0xF4, "Xstream Logic" },
+	{ 0x75, "Fast-Chip" },
+	{ 0x76, "Zucotto Wireless" },
+	{ 0xF7, "Realchip" },
+	{ 0xF8, "Galaxy Power" },
+	{ 0x79, "eSilicon" },
+	{ 0x7A, "Morphics Technology" },
+	{ 0xFB, "Accelerant Networks" },
+	{ 0x7C, "Silicon Wave" },
+	{ 0xFD, "SandCraft" },
+	{ 0xFE, "Elpida" }
+};
+
+static const libjedec_vendor_pair_t libjedec_vendors_3[126] = {
+	{ 0x01, "Solectron" },
+	{ 0x02, "Optosys Technologies" },
+	{ 0x83, "Buffalo (Formerly Melco)" },
+	{ 0x04, "TriMedia Technologies" },
+	{ 0x85, "Cyan Technologies" },
+	{ 0x86, "Global Locate" },
+	{ 0x07, "Optillion" },
+	{ 0x08, "Terago Communications" },
+	{ 0x89, "Ikanos Communications" },
+	{ 0x8A, "Princeton Technology" },
+	{ 0x0B, "Nanya Technology" },
+	{ 0x8C, "Elite Flash Storage" },
+	{ 0x0D, "Mysticom" },
+	{ 0x0E, "LightSand Communications" },
+	{ 0x8F, "ATI Technologies" },
+	{ 0x10, "Agere Systems" },
+	{ 0x91, "NeoMagic" },
+	{ 0x92, "AuroraNetics" },
+	{ 0x13, "Golden Empire" },
+	{ 0x94, "Mushkin" },
+	{ 0x15, "Tioga Technologies" },
+	{ 0x16, "Netlist" },
+	{ 0x97, "TeraLogic" },
+	{ 0x98, "Cicada Semiconductor" },
+	{ 0x19, "Centon Electronics" },
+	{ 0x1A, "Tyco Electronics" },
+	{ 0x9B, "Magis Works" },
+	{ 0x1C, "Zettacom" },
+	{ 0x9D, "Cogency Semiconductor" },
+	{ 0x9E, "Chipcon AS" },
+	{ 0x1F, "Aspex Technology" },
+	{ 0x20, "F5 Networks" },
+	{ 0xA1, "Programmable Silicon Solutions" },
+	{ 0xA2, "ChipWrights" },
+	{ 0x23, "Acorn Networks" },
+	{ 0xA4, "Quicklogic" },
+	{ 0x25, "Kingmax Semiconductor" },
+	{ 0x26, "BOPS" },
+	{ 0xA7, "Flasys" },
+	{ 0xA8, "BitBlitz Communications" },
+	{ 0x29, "eMemory Technology" },
+	{ 0x2A, "Procket Networks" },
+	{ 0xAB, "Purple Ray" },
+	{ 0x2C, "Trebia Networks" },
+	{ 0xAD, "Delta Electronics" },
+	{ 0xAE, "Onex Communications" },
+	{ 0x2F, "Ample Communications" },
+	{ 0xB0, "Memory Experts Intl" },
+	{ 0x31, "Astute Networks" },
+	{ 0x32, "Azanda Network Devices" },
+	{ 0xB3, "Dibcom" },
+	{ 0x34, "Tekmos" },
+	{ 0xB5, "API NetWorks" },
+	{ 0xB6, "Bay Microsystems" },
+	{ 0x37, "Firecron Ltd" },
+	{ 0x38, "Resonext Communications" },
+	{ 0xB9, "Tachys Technologies" },
+	{ 0xBA, "Equator Technology" },
+	{ 0x3B, "Concept Computer" },
+	{ 0xBC, "SILCOM" },
+	{ 0x3D, "3Dlabs" },
+	{ 0x3E, "c’t Magazine" },
+	{ 0xBF, "Sanera Systems" },
+	{ 0x40, "Silicon Packets" },
+	{ 0xC1, "Viasystems Group" },
+	{ 0xC2, "Simtek" },
+	{ 0x43, "Semicon Devices Singapore" },
+	{ 0xC4, "Satron Handelsges" },
+	{ 0x45, "Improv Systems" },
+	{ 0x46, "INDUSYS GmbH" },
+	{ 0xC7, "Corrent" },
+	{ 0xC8, "Infrant Technologies" },
+	{ 0x49, "Ritek Corp" },
+	{ 0x4A, "empowerTel Networks" },
+	{ 0xCB, "Hypertec" },
+	{ 0x4C, "Cavium Networks" },
+	{ 0xCD, "PLX Technology" },
+	{ 0xCE, "Massana Design" },
+	{ 0x4F, "Intrinsity" },
+	{ 0xD0, "Valence Semiconductor" },
+	{ 0x51, "Terawave Communications" },
+	{ 0x52, "IceFyre Semiconductor" },
+	{ 0xD3, "Primarion" },
+	{ 0x54, "Picochip Designs Ltd" },
+	{ 0xD5, "Silverback Systems" },
+	{ 0xD6, "Jade Star Technologies" },
+	{ 0x57, "Pijnenburg Securealink" },
+	{ 0x58, "takeMS - Ultron AG" },
+	{ 0xD9, "Cambridge Silicon Radio" },
+	{ 0xDA, "Swissbit" },
+	{ 0x5B, "Nazomi Communications" },
+	{ 0xDC, "eWave System" },
+	{ 0x5D, "Rockwell Collins" },
+	{ 0x5E, "Picocel Co. Ltd. (Paion)" },
+	{ 0xDF, "Alphamosaic Ltd" },
+	{ 0xE0, "Sandburst" },
+	{ 0x61, "SiCon Video" },
+	{ 0x62, "NanoAmp Solutions" },
+	{ 0xE3, "Ericsson Technology" },
+	{ 0x64, "PrairieComm" },
+	{ 0xE5, "Mitac International" },
+	{ 0xE6, "Layer N Networks" },
+	{ 0x67, "MtekVision (Atsana)" },
+	{ 0x68, "Allegro Networks" },
+	{ 0xE9, "Marvell Semiconductors" },
+	{ 0xEA, "Netergy Microelectronic" },
+	{ 0x6B, "NVIDIA" },
+	{ 0xEC, "Internet Machines" },
+	{ 0x6D, "Memorysolution GmbH" },
+	{ 0x6E, "Litchfield Communication" },
+	{ 0xEF, "Accton Technology" },
+	{ 0x70, "Teradiant Networks" },
+	{ 0xF1, "Scaleo Chip" },
+	{ 0xF2, "Cortina Systems" },
+	{ 0x73, "RAM Components" },
+	{ 0xF4, "Raqia Networks" },
+	{ 0x75, "ClearSpeed" },
+	{ 0x76, "Matsushita Battery" },
+	{ 0xF7, "Xelerated" },
+	{ 0xF8, "SimpleTech" },
+	{ 0x79, "Utron Technology" },
+	{ 0x7A, "Astec International" },
+	{ 0xFB, "AVM gmbH" },
+	{ 0x7C, "Redux Communications" },
+	{ 0xFD, "Dot Hill Systems" },
+	{ 0xFE, "TeraChip" }
+};
+
+static const libjedec_vendor_pair_t libjedec_vendors_4[126] = {
+	{ 0x01, "T-RAM Incorporated" },
+	{ 0x02, "Innovics Wireless" },
+	{ 0x83, "Teknovus" },
+	{ 0x04, "KeyEye Communications" },
+	{ 0x85, "Runcom Technologies" },
+	{ 0x86, "RedSwitch" },
+	{ 0x07, "Dotcast" },
+	{ 0x08, "Silicon Mountain Memory" },
+	{ 0x89, "Signia Technologies" },
+	{ 0x8A, "Pixim" },
+	{ 0x0B, "Galazar Networks" },
+	{ 0x8C, "White Electronic Designs" },
+	{ 0x0D, "Patriot Scientific" },
+	{ 0x0E, "Neoaxiom Corporation" },
+	{ 0x8F, "3Y Power Technology" },
+	{ 0x10, "Scaleo Chip" },
+	{ 0x91, "Potentia Power Systems" },
+	{ 0x92, "C-guys Incorporated" },
+	{ 0x13, "Digital Communications Technology Incorporated" },
+	{ 0x94, "Silicon-Based Technology" },
+	{ 0x15, "Fulcrum Microsystems" },
+	{ 0x16, "Positivo Informatica Ltd" },
+	{ 0x97, "XIOtech Corporation" },
+	{ 0x98, "PortalPlayer" },
+	{ 0x19, "Zhiying Software" },
+	{ 0x1A, "ParkerVision, Inc." },
+	{ 0x9B, "Phonex Broadband" },
+	{ 0x1C, "Skyworks Solutions" },
+	{ 0x9D, "Entropic Communications" },
+	{ 0x9E, "I’M Intelligent Memory Ltd." },
+	{ 0x1F, "Zensys A/S" },
+	{ 0x20, "Legend Silicon Corp." },
+	{ 0xA1, "Sci-worx GmbH" },
+	{ 0xA2, "SMSC (Standard Microsystems)" },
+	{ 0x23, "Renesas Electronics" },
+	{ 0xA4, "Raza Microelectronics" },
+	{ 0x25, "Phyworks" },
+	{ 0x26, "MediaTek" },
+	{ 0xA7, "Non-cents Productions" },
+	{ 0xA8, "US Modular" },
+	{ 0x29, "Wintegra Ltd." },
+	{ 0x2A, "Mathstar" },
+	{ 0xAB, "StarCore" },
+	{ 0x2C, "Oplus Technologies" },
+	{ 0xAD, "Mindspeed" },
+	{ 0xAE, "Just Young Computer" },
+	{ 0x2F, "Radia Communications" },
+	{ 0xB0, "OCZ" },
+	{ 0x31, "Emuzed" },
+	{ 0x32, "LOGIC Devices" },
+	{ 0xB3, "Inphi Corporation" },
+	{ 0x34, "Quake Technologies" },
+	{ 0xB5, "Vixel" },
+	{ 0xB6, "SolusTek" },
+	{ 0x37, "Kongsberg Maritime" },
+	{ 0x38, "Faraday Technology" },
+	{ 0xB9, "Altium Ltd." },
+	{ 0xBA, "Insyte" },
+	{ 0x3B, "ARM Ltd." },
+	{ 0xBC, "DigiVision" },
+	{ 0x3D, "Vativ Technologies" },
+	{ 0x3E, "Endicott Interconnect Technologies" },
+	{ 0xBF, "Pericom" },
+	{ 0x40, "Bandspeed" },
+	{ 0xC1, "LeWiz Communications" },
+	{ 0xC2, "CPU Technology" },
+	{ 0x43, "Ramaxel Technology" },
+	{ 0xC4, "DSP Group" },
+	{ 0x45, "Axis Communications" },
+	{ 0x46, "Legacy Electronics" },
+	{ 0xC7, "Chrontel" },
+	{ 0xC8, "Powerchip Semiconductor" },
+	{ 0x49, "MobilEye Technologies" },
+	{ 0x4A, "Excel Semiconductor" },
+	{ 0xCB, "A-DATA Technology" },
+	{ 0x4C, "VirtualDigm" },
+	{ 0xCD, "G Skill Intl" },
+	{ 0xCE, "Quanta Computer" },
+	{ 0x4F, "Yield Microelectronics" },
+	{ 0xD0, "Afa Technologies" },
+	{ 0x51, "KINGBOX Technology Co. Ltd." },
+	{ 0x52, "Ceva" },
+	{ 0xD3, "iStor Networks" },
+	{ 0x54, "Advance Modules" },
+	{ 0xD5, "Microsoft" },
+	{ 0xD6, "Open-Silicon" },
+	{ 0x57, "Goal Semiconductor" },
+	{ 0x58, "ARC International" },
+	{ 0xD9, "Simmtec" },
+	{ 0xDA, "Metanoia" },
+	{ 0x5B, "Key Stream" },
+	{ 0xDC, "Lowrance Electronics" },
+	{ 0x5D, "Adimos" },
+	{ 0x5E, "SiGe Semiconductor" },
+	{ 0xDF, "Fodus Communications" },
+	{ 0xE0, "Credence Systems Corp." },
+	{ 0x61, "Genesis Microchip Inc." },
+	{ 0x62, "Vihana, Inc." },
+	{ 0xE3, "WIS Technologies" },
+	{ 0x64, "GateChange Technologies" },
+	{ 0xE5, "High Density Devices AS" },
+	{ 0xE6, "Synopsys" },
+	{ 0x67, "Gigaram" },
+	{ 0x68, "Enigma Semiconductor Inc." },
+	{ 0xE9, "Century Micro Inc." },
+	{ 0xEA, "Icera Semiconductor" },
+	{ 0x6B, "Mediaworks Integrated Systems" },
+	{ 0xEC, "O’Neil Product Development" },
+	{ 0x6D, "Supreme Top Technology Ltd." },
+	{ 0x6E, "MicroDisplay Corporation" },
+	{ 0xEF, "Team Group Inc." },
+	{ 0x70, "Sinett Corporation" },
+	{ 0xF1, "Toshiba Corporation" },
+	{ 0xF2, "Tensilica" },
+	{ 0x73, "SiRF Technology" },
+	{ 0xF4, "Bacoc Inc." },
+	{ 0x75, "SMaL Camera Technologies" },
+	{ 0x76, "Thomson SC" },
+	{ 0xF7, "Airgo Networks" },
+	{ 0xF8, "Wisair Ltd." },
+	{ 0x79, "SigmaTel" },
+	{ 0x7A, "Arkados" },
+	{ 0xFB, "Compete IT gmbH Co. KG" },
+	{ 0x7C, "Eudar Technology Inc." },
+	{ 0xFD, "Focus Enhancements" },
+	{ 0xFE, "Xyratex" }
+};
+static const libjedec_vendor_pair_t libjedec_vendors_5[126] = {
+	{ 0x01, "Specular Networks" },
+	{ 0x02, "Patriot Memory (PDP Systems)" },
+	{ 0x83, "U-Chip Technology Corp." },
+	{ 0x04, "Silicon Optix" },
+	{ 0x85, "Greenfield Networks" },
+	{ 0x86, "CompuRAM GmbH" },
+	{ 0x07, "Stargen, Inc." },
+	{ 0x08, "NetCell Corporation" },
+	{ 0x89, "Excalibrus Technologies Ltd" },
+	{ 0x8A, "SCM Microsystems" },
+	{ 0x0B, "Xsigo Systems, Inc." },
+	{ 0x8C, "CHIPS & Systems Inc" },
+	{ 0x0D, "Tier 1 Multichip Solutions" },
+	{ 0x0E, "CWRL Labs" },
+	{ 0x8F, "Teradici" },
+	{ 0x10, "Gigaram, Inc." },
+	{ 0x91, "g2 Microsystems" },
+	{ 0x92, "PowerFlash Semiconductor" },
+	{ 0x13, "P.A. Semi, Inc." },
+	{ 0x94, "NovaTech Solutions, S.A." },
+	{ 0x15, "c2 Microsystems, Inc." },
+	{ 0x16, "Level5 Networks" },
+	{ 0x97, "COS Memory AG" },
+	{ 0x98, "Innovasic Semiconductor" },
+	{ 0x19, "02IC Co. Ltd" },
+	{ 0x1A, "Tabula, Inc." },
+	{ 0x9B, "Crucial Technology" },
+	{ 0x1C, "Chelsio Communications" },
+	{ 0x9D, "Solarflare Communications" },
+	{ 0x9E, "Xambala Inc." },
+	{ 0x1F, "EADS Astrium" },
+	{ 0x20, "Terra Semiconductor, Inc." },
+	{ 0xA1, "Imaging Works, Inc." },
+	{ 0xA2, "Astute Networks, Inc." },
+	{ 0x23, "Tzero" },
+	{ 0xA4, "Emulex" },
+	{ 0x25, "Power-One" },
+	{ 0x26, "Pulse~LINK Inc." },
+	{ 0xA7, "Hon Hai Precision Industry" },
+	{ 0xA8, "White Rock Networks Inc." },
+	{ 0x29, "Telegent Systems USA, Inc." },
+	{ 0x2A, "Atrua Technologies, Inc." },
+	{ 0xAB, "Acbel Polytech Inc." },
+	{ 0x2C, "eRide Inc." },
+	{ 0xAD, "ULi Electronics Inc." },
+	{ 0xAE, "Magnum Semiconductor Inc." },
+	{ 0x2F, "neoOne Technology, Inc." },
+	{ 0xB0, "Connex Technology, Inc." },
+	{ 0x31, "Stream Processors, Inc." },
+	{ 0x32, "Focus Enhancements" },
+	{ 0xB3, "Telecis Wireless, Inc." },
+	{ 0x34, "uNav Microelectronics" },
+	{ 0xB5, "Tarari, Inc." },
+	{ 0xB6, "Ambric, Inc." },
+	{ 0x37, "Newport Media, Inc." },
+	{ 0x38, "VMTS" },
+	{ 0xB9, "Enuclia Semiconductor, Inc." },
+	{ 0xBA, "Virtium Technology Inc." },
+	{ 0x3B, "Solid State System Co., Ltd." },
+	{ 0xBC, "Kian Tech LLC" },
+	{ 0x3D, "Artimi" },
+	{ 0x3E, "Power Quotient International" },
+	{ 0xBF, "Avago Technologies" },
+	{ 0x40, "ADTechnology" },
+	{ 0xC1, "Sigma Designs" },
+	{ 0xC2, "SiCortex, Inc." },
+	{ 0x43, "Ventura Technology Group" },
+	{ 0xC4, "eASIC" },
+	{ 0x45, "M.H.S. SAS" },
+	{ 0x46, "Micro Star International" },
+	{ 0xC7, "Rapport Inc." },
+	{ 0xC8, "Makway International" },
+	{ 0x49, "Broad Reach Engineering Co." },
+	{ 0x4A, "Semiconductor Mfg Intl Corp" },
+	{ 0xCB, "SiConnect" },
+	{ 0x4C, "FCI USA Inc." },
+	{ 0xCD, "Validity Sensors" },
+	{ 0xCE, "Coney Technology Co. Ltd." },
+	{ 0x4F, "Spans Logic" },
+	{ 0xD0, "Neterion Inc." },
+	{ 0x51, "Qimonda" },
+	{ 0x52, "New Japan Radio Co. Ltd." },
+	{ 0xD3, "Velogix" },
+	{ 0x54, "Montalvo Systems" },
+	{ 0xD5, "iVivity Inc." },
+	{ 0xD6, "Walton Chaintech" },
+	{ 0x57, "AENEON" },
+	{ 0x58, "Lorom Industrial Co. Ltd." },
+	{ 0xD9, "Radiospire Networks" },
+	{ 0xDA, "Sensio Technologies, Inc." },
+	{ 0x5B, "Nethra Imaging" },
+	{ 0xDC, "Hexon Technology Pte Ltd" },
+	{ 0x5D, "CompuStocx (CSX)" },
+	{ 0x5E, "Methode Electronics, Inc." },
+	{ 0xDF, "Connect One Ltd." },
+	{ 0xE0, "Opulan Technologies" },
+	{ 0x61, "Septentrio NV" },
+	{ 0x62, "Goldenmars Technology Inc." },
+	{ 0xE3, "Kreton Corporation" },
+	{ 0x64, "Cochlear Ltd." },
+	{ 0xE5, "Altair Semiconductor" },
+	{ 0xE6, "NetEffect, Inc." },
+	{ 0x67, "Spansion, Inc." },
+	{ 0x68, "Taiwan Semiconductor Mfg" },
+	{ 0xE9, "Emphany Systems Inc." },
+	{ 0xEA, "ApaceWave Technologies" },
+	{ 0x6B, "Mobilygen Corporation" },
+	{ 0xEC, "Tego" },
+	{ 0x6D, "Cswitch Corporation" },
+	{ 0x6E, "Haier (Beijing) IC Design Co." },
+	{ 0xEF, "MetaRAM" },
+	{ 0x70, "Axel Electronics Co. Ltd." },
+	{ 0xF1, "Tilera Corporation" },
+	{ 0xF2, "Aquantia" },
+	{ 0x73, "Vivace Semiconductor" },
+	{ 0xF4, "Redpine Signals" },
+	{ 0x75, "Octalica" },
+	{ 0x76, "InterDigital Communications" },
+	{ 0xF7, "Avant Technology" },
+	{ 0xF8, "Asrock, Inc." },
+	{ 0x79, "Availink" },
+	{ 0x7A, "Quartics, Inc." },
+	{ 0xFB, "Element CXI" },
+	{ 0x7C, "Innovaciones Microelectronicas" },
+	{ 0xFD, "VeriSilicon Microelectronics" },
+	{ 0xFE, "W5 Networks" }
+};
+static const libjedec_vendor_pair_t libjedec_vendors_6[126] = {
+	{ 0x01, "MOVEKING" },
+	{ 0x02, "Mavrix Technology, Inc." },
+	{ 0x83, "CellGuide Ltd." },
+	{ 0x04, "Faraday Technology" },
+	{ 0x85, "Diablo Technologies, Inc." },
+	{ 0x86, "Jennic" },
+	{ 0x07, "Octasic" },
+	{ 0x08, "Molex Incorporated" },
+	{ 0x89, "3Leaf Networks" },
+	{ 0x8A, "Bright Micron Technology" },
+	{ 0x0B, "Netxen" },
+	{ 0x8C, "NextWave Broadband Inc." },
+	{ 0x0D, "DisplayLink" },
+	{ 0x0E, "ZMOS Technology" },
+	{ 0x8F, "Tec-Hill" },
+	{ 0x10, "Multigig, Inc." },
+	{ 0x91, "Amimon" },
+	{ 0x92, "Euphonic Technologies, Inc." },
+	{ 0x13, "BRN Phoenix" },
+	{ 0x94, "InSilica" },
+	{ 0x15, "Ember Corporation" },
+	{ 0x16, "Avexir Technologies Corporation" },
+	{ 0x97, "Echelon Corporation" },
+	{ 0x98, "Edgewater Computer Systems" },
+	{ 0x19, "XMOS Semiconductor Ltd." },
+	{ 0x1A, "GENUSION, Inc." },
+	{ 0x9B, "Memory Corp NV" },
+	{ 0x1C, "SiliconBlue Technologies" },
+	{ 0x9D, "Rambus Inc." },
+	{ 0x9E, "Andes Technology Corporation" },
+	{ 0x1F, "Coronis Systems" },
+	{ 0x20, "Achronix Semiconductor" },
+	{ 0xA1, "Siano Mobile Silicon Ltd." },
+	{ 0xA2, "Semtech Corporation" },
+	{ 0x23, "Pixelworks Inc." },
+	{ 0xA4, "Gaisler Research AB" },
+	{ 0x25, "Teranetics" },
+	{ 0x26, "Toppan Printing Co. Ltd." },
+	{ 0xA7, "Kingxcon" },
+	{ 0xA8, "Silicon Integrated Systems" },
+	{ 0x29, "I-O Data Device, Inc." },
+	{ 0x2A, "NDS Americas Inc." },
+	{ 0xAB, "Solomon Systech Limited" },
+	{ 0x2C, "On Demand Microelectronics" },
+	{ 0xAD, "Amicus Wireless Inc." },
+	{ 0xAE, "SMARDTV SNC" },
+	{ 0x2F, "Comsys Communication Ltd." },
+	{ 0xB0, "Movidia Ltd." },
+	{ 0x31, "Javad GNSS, Inc." },
+	{ 0x32, "Montage Technology Group" },
+	{ 0xB3, "Trident Microsystems" },
+	{ 0x34, "Super Talent" },
+	{ 0xB5, "Optichron, Inc." },
+	{ 0xB6, "Future Waves UK Ltd." },
+	{ 0x37, "SiBEAM, Inc." },
+	{ 0x38, "Inicore,Inc." },
+	{ 0xB9, "Virident Systems" },
+	{ 0xBA, "M2000, Inc." },
+	{ 0x3B, "ZeroG Wireless, Inc." },
+	{ 0xBC, "Gingle Technology Co. Ltd." },
+	{ 0x3D, "Space Micro Inc." },
+	{ 0x3E, "Wilocity" },
+	{ 0xBF, "Novafora, Inc." },
+	{ 0x40, "iKoa Corporation" },
+	{ 0xC1, "ASint Technology" },
+	{ 0xC2, "Ramtron" },
+	{ 0x43, "Plato Networks Inc." },
+	{ 0xC4, "IPtronics AS" },
+	{ 0x45, "Infinite-Memories" },
+	{ 0x46, "Parade Technologies Inc." },
+	{ 0xC7, "Dune Networks" },
+	{ 0xC8, "GigaDevice Semiconductor" },
+	{ 0x49, "Modu Ltd." },
+	{ 0x4A, "CEITEC" },
+	{ 0xCB, "Northrop Grumman" },
+	{ 0x4C, "XRONET Corporation" },
+	{ 0xCD, "Sicon Semiconductor AB" },
+	{ 0xCE, "Atla Electronics Co. Ltd." },
+	{ 0x4F, "TOPRAM Technology" },
+	{ 0xD0, "Silego Technology Inc." },
+	{ 0x51, "Kinglife" },
+	{ 0x52, "Ability Industries Ltd." },
+	{ 0xD3, "Silicon Power Computer & Communications" },
+	{ 0x54, "Augusta Technology, Inc." },
+	{ 0xD5, "Nantronics Semiconductors" },
+	{ 0xD6, "Hilscher Gesellschaft" },
+	{ 0x57, "Quixant Ltd." },
+	{ 0x58, "Percello Ltd." },
+	{ 0xD9, "NextIO Inc." },
+	{ 0xDA, "Scanimetrics Inc." },
+	{ 0x5B, "FS-Semi Company Ltd." },
+	{ 0xDC, "Infinera Corporation" },
+	{ 0x5D, "SandForce Inc." },
+	{ 0x5E, "Lexar Media" },
+	{ 0xDF, "Teradyne Inc." },
+	{ 0xE0, "Memory Exchange Corp." },
+	{ 0x61, "Suzhou Smartek Electronics" },
+	{ 0x62, "Avantium Corporation" },
+	{ 0xE3, "ATP Electronics Inc." },
+	{ 0x64, "Valens Semiconductor Ltd" },
+	{ 0xE5, "Agate Logic, Inc." },
+	{ 0xE6, "Netronome" },
+	{ 0x67, "Zenverge, Inc." },
+	{ 0x68, "N-trig Ltd" },
+	{ 0xE9, "SanMax Technologies Inc." },
+	{ 0xEA, "Contour Semiconductor Inc." },
+	{ 0x6B, "TwinMOS" },
+	{ 0xEC, "Silicon Systems, Inc." },
+	{ 0x6D, "V-Color Technology Inc." },
+	{ 0x6E, "Certicom Corporation" },
+	{ 0xEF, "JSC ICC Milandr" },
+	{ 0x70, "PhotoFast Global Inc." },
+	{ 0xF1, "InnoDisk Corporation" },
+	{ 0xF2, "Muscle Power" },
+	{ 0x73, "Energy Micro" },
+	{ 0xF4, "Innofidei" },
+	{ 0x75, "CopperGate Communications" },
+	{ 0x76, "Holtek Semiconductor Inc." },
+	{ 0xF7, "Myson Century, Inc." },
+	{ 0xF8, "FIDELIX" },
+	{ 0x79, "Red Digital Cinema" },
+	{ 0x7A, "Densbits Technology" },
+	{ 0xFB, "Zempro" },
+	{ 0x7C, "MoSys" },
+	{ 0xFD, "Provigent" },
+	{ 0xFE, "Triad Semiconductor, Inc." }
+};
+
+static const libjedec_vendor_pair_t libjedec_vendors_7[126] = {
+	{ 0x01, "Siklu Communication Ltd." },
+	{ 0x02, "A Force Manufacturing Ltd." },
+	{ 0x83, "Strontium" },
+	{ 0x04, "ALi Corp (Abilis Systems)" },
+	{ 0x85, "Siglead, Inc." },
+	{ 0x86, "Ubicom, Inc." },
+	{ 0x07, "Unifosa Corporation" },
+	{ 0x08, "Stretch, Inc." },
+	{ 0x89, "Lantiq Deutschland GmbH" },
+	{ 0x8A, "Visipro." },
+	{ 0x0B, "EKMemory" },
+	{ 0x8C, "Microelectronics Institute ZTE" },
+	{ 0x0D, "u-blox AG" },
+	{ 0x0E, "Carry Technology Co. Ltd." },
+	{ 0x8F, "Nokia" },
+	{ 0x10, "King Tiger Technology" },
+	{ 0x91, "Sierra Wireless" },
+	{ 0x92, "HT Micron" },
+	{ 0x13, "Albatron Technology Co. Ltd." },
+	{ 0x94, "Leica Geosystems AG" },
+	{ 0x15, "BroadLight" },
+	{ 0x16, "AEXEA" },
+	{ 0x97, "ClariPhy Communications, Inc." },
+	{ 0x98, "Green Plug" },
+	{ 0x19, "Design Art Networks" },
+	{ 0x1A, "Mach Xtreme Technology Ltd." },
+	{ 0x9B, "ATO Solutions Co. Ltd." },
+	{ 0x1C, "Ramsta" },
+	{ 0x9D, "Greenliant Systems, Ltd." },
+	{ 0x9E, "Teikon" },
+	{ 0x1F, "Antec Hadron" },
+	{ 0x20, "NavCom Technology, Inc." },
+	{ 0xA1, "Shanghai Fudan Microelectronics" },
+	{ 0xA2, "Calxeda, Inc." },
+	{ 0x23, "JSC EDC Electronics" },
+	{ 0xA4, "Kandit Technology Co. Ltd." },
+	{ 0x25, "Ramos Technology" },
+	{ 0x26, "Goldenmars Technology" },
+	{ 0xA7, "XeL Technology Inc." },
+	{ 0xA8, "Newzone Corporation" },
+	{ 0x29, "ShenZhen MercyPower Tech" },
+	{ 0x2A, "Nanjing Yihuo Technology" },
+	{ 0xAB, "Nethra Imaging Inc." },
+	{ 0x2C, "SiTel Semiconductor BV" },
+	{ 0xAD, "SolidGear Corporation" },
+	{ 0xAE, "Topower Computer Ind Co Ltd." },
+	{ 0x2F, "Wilocity" },
+	{ 0xB0, "Profichip GmbH" },
+	{ 0x31, "Gerad Technologies" },
+	{ 0x32, "Ritek Corporation" },
+	{ 0xB3, "Gomos Technology Limited" },
+	{ 0x34, "Memoright Corporation" },
+	{ 0xB5, "D-Broad, Inc." },
+	{ 0xB6, "HiSilicon Technologies" },
+	{ 0x37, "Syndiant Inc.." },
+	{ 0x38, "Enverv Inc." },
+	{ 0xB9, "Cognex" },
+	{ 0xBA, "Xinnova Technology Inc." },
+	{ 0x3B, "Ultron AG" },
+	{ 0xBC, "Concord Idea Corporation" },
+	{ 0x3D, "AIM Corporation" },
+	{ 0x3E, "Lifetime Memory Products" },
+	{ 0xBF, "Ramsway" },
+	{ 0x40, "Recore Systems B.V." },
+	{ 0xC1, "Haotian Jinshibo Science Tech" },
+	{ 0xC2, "Being Advanced Memory" },
+	{ 0x43, "Adesto Technologies" },
+	{ 0xC4, "Giantec Semiconductor, Inc." },
+	{ 0x45, "HMD Electronics AG" },
+	{ 0x46, "Gloway International (HK)" },
+	{ 0xC7, "Kingcore" },
+	{ 0xC8, "Anucell Technology Holding" },
+	{ 0x49, "Accord Software & Systems Pvt. Ltd." },
+	{ 0x4A, "Active-Semi Inc." },
+	{ 0xCB, "Denso Corporation" },
+	{ 0x4C, "TLSI Inc." },
+	{ 0xCD, "Qidan" },
+	{ 0xCE, "Mustang" },
+	{ 0x4F, "Orca Systems" },
+	{ 0xD0, "Passif Semiconductor" },
+	{ 0x51, "GigaDevice Semiconductor (Beijing) Inc." },
+	{ 0x52, "Memphis Electronic" },
+	{ 0xD3, "Beckhoff Automation GmbH" },
+	{ 0x54, "Harmony Semiconductor Corp" },
+	{ 0xD5, "Air Computers SRL" },
+	{ 0xD6, "TMT Memory" },
+	{ 0x57, "Eorex Corporation" },
+	{ 0x58, "Xingtera" },
+	{ 0xD9, "Netsol" },
+	{ 0xDA, "Bestdon Technology Co. Ltd." },
+	{ 0x5B, "Baysand Inc." },
+	{ 0xDC, "Uroad Technology Co. Ltd." },
+	{ 0x5D, "Wilk Elektronik S.A." },
+	{ 0x5E, "AAI" },
+	{ 0xDF, "Harman" },
+	{ 0xE0, "Berg Microelectronics Inc." },
+	{ 0x61, "ASSIA, Inc." },
+	{ 0x62, "Visiontek Products LLC" },
+	{ 0xE3, "OCMEMORY" },
+	{ 0x64, "Welink Solution Inc." },
+	{ 0xE5, "Shark Gaming" },
+	{ 0xE6, "Avalanche Technology" },
+	{ 0x67, "R&D Center ELVEES OJSC" },
+	{ 0x68, "KingboMars Technology Co. Ltd." },
+	{ 0xE9, "High Bridge Solutions Industria Eletronica" },
+	{ 0xEA, "Transcend Technology Co. Ltd." },
+	{ 0x6B, "Everspin Technologies" },
+	{ 0xEC, "Hon-Hai Precision" },
+	{ 0x6D, "Smart Storage Systems" },
+	{ 0x6E, "Toumaz Group" },
+	{ 0xEF, "Zentel Electronics Corporation" },
+	{ 0x70, "Panram International Corporation" },
+	{ 0xF1, "Silicon Space Technology" },
+	{ 0xF2, "LITE-ON IT Corporation" },
+	{ 0x73, "Inuitive" },
+	{ 0xF4, "HMicro" },
+	{ 0x75, "BittWare, Inc." },
+	{ 0x76, "GLOBALFOUNDRIES" },
+	{ 0xF7, "ACPI Digital Co. Ltd." },
+	{ 0xF8, "Annapurna Labs" },
+	{ 0x79, "AcSiP Technology Corporation" },
+	{ 0x7A, "Idea! Electronic Systems" },
+	{ 0xFB, "Gowe Technology Co. Ltd." },
+	{ 0x7C, "Hermes Testing Solutions, Inc." },
+	{ 0xFD, "Positivo BGH" },
+	{ 0xFE, "Intelligence Silicon Technology" }
+};
+static const libjedec_vendor_pair_t libjedec_vendors_8[126] = {
+	{ 0x01, "3D PLUS" },
+	{ 0x02, "Diehl Aerospace" },
+	{ 0x83, "Fairchild" },
+	{ 0x04, "Mercury Systems" },
+	{ 0x85, "Sonics, Inc." },
+	{ 0x86, "GE Intelligent Platforms GmbH & Co." },
+	{ 0x07, "Shenzhen Jinge Information Co. Ltd." },
+	{ 0x08, "SCWW" },
+	{ 0x89, "Silicon Motion Inc." },
+	{ 0x8A, "Anurag" },
+	{ 0x0B, "King Kong" },
+	{ 0x8C, "FROM30 Co. Ltd." },
+	{ 0x0D, "Gowin Semiconductor Corp" },
+	{ 0x0E, "Fremont Micro Devices Ltd." },
+	{ 0x8F, "Ericsson Modems" },
+	{ 0x10, "Exelis" },
+	{ 0x91, "Satixfy Ltd." },
+	{ 0x92, "Galaxy Microsystems Ltd." },
+	{ 0x13, "Gloway International Co. Ltd." },
+	{ 0x94, "Lab" },
+	{ 0x15, "Smart Energy Instruments" },
+	{ 0x16, "Approved Memory Corporation" },
+	{ 0x97, "Axell Corporation" },
+	{ 0x98, "Essencore Limited" },
+	{ 0x19, "Phytium" },
+	{ 0x1A, "Xi’an UnilC Semiconductors Co., Ltd." },
+	{ 0x9B, "Ambiq Micro" },
+	{ 0x1C, "eveRAM Technology, Inc." },
+	{ 0x9D, "Infomax" },
+	{ 0x9E, "Butterfly Network, Inc." },
+	{ 0x1F, "Shenzhen City Gcai Electronics" },
+	{ 0x20, "Stack Devices Corporation" },
+	{ 0xA1, "ADK Media Group" },
+	{ 0xA2, "TSP Global Co., Ltd." },
+	{ 0x23, "HighX" },
+	{ 0xA4, "Shenzhen Elicks Technology" },
+	{ 0x25, "ISSI/Chingis" },
+	{ 0x26, "Google, Inc." },
+	{ 0xA7, "Dasima International Development" },
+	{ 0xA8, "Leahkinn Technology Limited" },
+	{ 0x29, "HIMA Paul Hildebrandt GmbH Co KG" },
+	{ 0x2A, "Keysight Technologies" },
+	{ 0xAB, "Techcomp International (Fastable)" },
+	{ 0x2C, "Ancore Technology Corporation" },
+	{ 0xAD, "Nuvoton" },
+	{ 0xAE, "Korea Uhbele International Group Ltd." },
+	{ 0x2F, "Ikegami Tsushinki Co Ltd." },
+	{ 0xB0, "RelChip, Inc." },
+	{ 0x31, "Baikal Electronics" },
+	{ 0x32, "Nemostech Inc." },
+	{ 0xB3, "Memorysolution GmbH" },
+	{ 0x34, "Silicon Integrated Systems Corporation" },
+	{ 0xB5, "Xiede" },
+	{ 0xB6, "Multilaser Components" },
+	{ 0x37, "Flash Chi" },
+	{ 0x38, "Jone" },
+	{ 0xB9, "GCT Semiconductor Inc." },
+	{ 0xBA, "Hong Kong Zetta Device Technology" },
+	{ 0x3B, "Unimemory Technology(s) Pte Ltd." },
+	{ 0xBC, "Cuso" },
+	{ 0x3D, "Kuso" },
+	{ 0x3E, "Uniquify Inc." },
+	{ 0xBF, "Skymedi Corporation" },
+	{ 0x40, "Core Chance Co. Ltd." },
+	{ 0xC1, "Tekism Co. Ltd." },
+	{ 0xC2, "Seagate Technology PLC" },
+	{ 0x43, "Hong Kong Gaia Group Co. Limited" },
+	{ 0xC4, "Gigacom Semiconductor LLC" },
+	{ 0x45, "V2 Technologies" },
+	{ 0x46, "TLi" },
+	{ 0xC7, "Neotion" },
+	{ 0xC8, "Lenovo" },
+	{ 0x49, "Shenzhen Zhongteng Electronic Corp. Ltd." },
+	{ 0x4A, "Compound Photonics" },
+	{ 0xCB, "in2H2 inc" },
+	{ 0x4C, "Shenzhen Pango Microsystems Co. Ltd" },
+	{ 0xCD, "Vasekey" },
+	{ 0xCE, "Cal-Comp Industria de Semicondutores" },
+	{ 0x4F, "Eyenix Co., Ltd." },
+	{ 0xD0, "Heoriady" },
+	{ 0x51, "Accelerated Memory Production Inc." },
+	{ 0x52, "INVECAS, Inc." },
+	{ 0xD3, "AP Memory" },
+	{ 0x54, "Douqi Technology" },
+	{ 0xD5, "Etron Technology, Inc." },
+	{ 0xD6, "Indie Semiconductor" },
+	{ 0x57, "Socionext Inc." },
+	{ 0x58, "HGST" },
+	{ 0xD9, "EVGA" },
+	{ 0xDA, "Audience Inc." },
+	{ 0x5B, "EpicGear" },
+	{ 0xDC, "Vitesse Enterprise Co." },
+	{ 0x5D, "Foxtronn International Corporation" },
+	{ 0x5E, "Bretelon Inc." },
+	{ 0xDF, "Graphcore" },
+	{ 0xE0, "Eoplex Inc" },
+	{ 0x61, "MaxLinear, Inc." },
+	{ 0x62, "ETA Devices" },
+	{ 0xE3, "LOKI" },
+	{ 0x64, "IMS Electronics Co., Ltd." },
+	{ 0xE5, "Dosilicon Co., Ltd." },
+	{ 0xE6, "Dolphin Integration" },
+	{ 0x67, "Shenzhen Mic Electronics" },
+	{ 0x68, "Boya Microelectronics Inc." },
+	{ 0xE9, "Geniachip (Roche)" },
+	{ 0xEA, "Axign" },
+	{ 0x6B, "Kingred Electronic Technology Ltd." },
+	{ 0xEC, "Chao Yue Zhuo Computer Business Dept." },
+	{ 0x6D, "Guangzhou Si Nuo Electronic Technology." },
+	{ 0x6E, "Crocus Technology Inc." },
+	{ 0xEF, "Creative Chips GmbH" },
+	{ 0x70, "GE Aviation Systems LLC." },
+	{ 0xF1, "Asgard" },
+	{ 0xF2, "Good Wealth Technology Ltd." },
+	{ 0x73, "TriCor Technologies" },
+	{ 0xF4, "Nova-Systems GmbH" },
+	{ 0x75, "JUHOR" },
+	{ 0x76, "Zhuhai Douke Commerce Co. Ltd." },
+	{ 0xF7, "DSL Memory" },
+	{ 0xF8, "Anvo-Systems Dresden GmbH" },
+	{ 0x79, "Realtek" },
+	{ 0x7A, "AltoBeam" },
+	{ 0xFB, "Wave Computing" },
+	{ 0x7C, "Beijing TrustNet Technology Co Ltd" },
+	{ 0xFD, "Innovium, Inc." },
+	{ 0xFE, "Starsway Technology Limited" }
+};
+
+static const libjedec_vendor_pair_t libjedec_vendors_9[68] = {
+	{ 0x01, "Weltronics Co. LTD" },
+	{ 0x02, "VMware, Inc." },
+	{ 0x83, "Hewlett Packard Enterprise" },
+	{ 0x04, "INTENSO" },
+	{ 0x85, "Puya Semiconductor" },
+	{ 0x86, "MEMORFI" },
+	{ 0x07, "MSC Technologies GmbH" },
+	{ 0x08, "Txrui" },
+	{ 0x89, "SiFive, Inc." },
+	{ 0x8A, "Spreadtrum Communications" },
+	{ 0x0B, "XTX Technology Limited" },
+	{ 0x8C, "UMAX Technology" },
+	{ 0x0D, "Shenzhen Yong Sheng Technology" },
+	{ 0x0E, "SNOAMOO (Shenzhen Kai Zhuo Yue)" },
+	{ 0x8F, "Daten Tecnologia LTDA" },
+	{ 0x10, "Shenzhen XinRuiYan Electronics" },
+	{ 0x91, "Eta Compute" },
+	{ 0x92, "Energous" },
+	{ 0x13, "Raspberry Pi Trading Ltd." },
+	{ 0x94, "Shenzhen Chixingzhe Tech Co. Ltd." },
+	{ 0x15, "Silicon Mobility" },
+	{ 0x16, "IQ-Analog Corporation" },
+	{ 0x97, "Uhnder, Inc." },
+	{ 0x98, "Impinj" },
+	{ 0x19, "DEPO Computers" },
+	{ 0x1A, "Nespeed Sysems" },
+	{ 0x9B, "Yangtze Memory Technologies Co. Ltd" },
+	{ 0x1C, "MemxPro Inc." },
+	{ 0x9D, "Tammuz Co., Ltd." },
+	{ 0x9E, "Allwinner Technology 1 0" },
+	{ 0x1F, "Shenzhen City Futian District Qing Xuan Tong Computer "
+	    "Trading Firm" },
+	{ 0x20, "XMC" },
+	{ 0xA1, "Teclast" },
+	{ 0xA2, "Maxsun" },
+	{ 0x23, "Haiguang Integrated Circuit Design" },
+	{ 0xA4, "RamCENTER Technology" },
+	{ 0x25, "Phison Electronics Corporation" },
+	{ 0x26, "Guizhou Huaxintong Semi-Conductor" },
+	{ 0xA7, "Network Intelligence" },
+	{ 0xA8, "Continental Technology (Holdings)" },
+	{ 0x29, "Guangzhou Huayan Suning Electronic" },
+	{ 0x2A, "Guangzhou Zhouji Electronic Co., Ltd." },
+	{ 0xAB, "Shenzhen Giant Hui Kang Tech Co. Ltd" },
+	{ 0x2C, "Shenzhen Yilong Innovative Co. Ltd." },
+	{ 0xAD, "Neo Forza" },
+	{ 0xAE, "Lyontek Inc." },
+	{ 0x2F, "Shanghai Kuxin Microelectronics Ltd." },
+	{ 0xB0, "Shenzhen Larix Technology Co. Ltd." },
+	{ 0x31, "Qbit Semiconductor Ltd." },
+	{ 0x32, "Insignis Technology Corporation" },
+	{ 0xB3, "Lanson Memory Co. Ltd." },
+	{ 0x34, "Shenzhen Superway Electronics Co Ltd" },
+	{ 0xB5, "Canaan-Creative Co. Ltd." },
+	{ 0xB6, "Black Diamond Memory" },
+	{ 0x37, "Shenzhen City Parker Baking Electronics" },
+	{ 0x38, "Shenzhen Baihong Technology Co. Ltd." },
+	{ 0xB9, "GEO Semiconductors" },
+	{ 0xBA, "DTG NEO Scientific Ltd." },
+	{ 0x3B, "Artery Technology Co. Ltd." },
+	{ 0xBC, "Jinyu" },
+	{ 0x3D, "ShenzhenYing Chi Technology Development" },
+	{ 0x3E, "Shenzhen Pengcheng Xin Technology" },
+	{ 0xBF, "Pegasus Semiconductor (Shanghai) Co." },
+	{ 0x40, "Mythic, Inc." },
+	{ 0xC1, "Elmos Semiconductor AG" },
+	{ 0xC2, "Kllisre" },
+	{ 0x43, "Shenzhen Yuan Chuang Wei Tech" },
+	{ 0xC4, "Shenzhen Xingmem Technology" }
+};
+
+const char *
+libjedec_vendor_string(uint_t cont, uint_t val)
+{
+	const libjedec_vendor_pair_t *pairs;
+	uint_t i, nents;
+
+	switch (cont) {
+	case 0:
+		pairs = libjedec_vendors_0;
+		nents = ARRAY_SIZE(libjedec_vendors_0);
+		break;
+	case 1:
+		pairs = libjedec_vendors_1;
+		nents = ARRAY_SIZE(libjedec_vendors_1);
+		break;
+	case 2:
+		pairs = libjedec_vendors_2;
+		nents = ARRAY_SIZE(libjedec_vendors_2);
+		break;
+	case 3:
+		pairs = libjedec_vendors_3;
+		nents = ARRAY_SIZE(libjedec_vendors_3);
+		break;
+	case 4:
+		pairs = libjedec_vendors_4;
+		nents = ARRAY_SIZE(libjedec_vendors_4);
+		break;
+	case 5:
+		pairs = libjedec_vendors_5;
+		nents = ARRAY_SIZE(libjedec_vendors_5);
+		break;
+	case 6:
+		pairs = libjedec_vendors_6;
+		nents = ARRAY_SIZE(libjedec_vendors_6);
+		break;
+	case 7:
+		pairs = libjedec_vendors_7;
+		nents = ARRAY_SIZE(libjedec_vendors_7);
+		break;
+	case 8:
+		pairs = libjedec_vendors_8;
+		nents = ARRAY_SIZE(libjedec_vendors_8);
+		break;
+	case 9:
+		pairs = libjedec_vendors_9;
+		nents = ARRAY_SIZE(libjedec_vendors_9);
+		break;
+	default:
+		return (NULL);
+	}
+
+	for (i = 0; i < nents; i++) {
+		if (pairs[i].ljp_val == val) {
+			return (pairs[i].ljp_name);
+		}
+	}
+
+	return (NULL);
+}
diff --git a/usr/src/lib/libjedec/common/libjedec.h b/usr/src/lib/libjedec/common/libjedec.h
new file mode 100644
index 0000000000..c665412582
--- /dev/null
+++ b/usr/src/lib/libjedec/common/libjedec.h
@@ -0,0 +1,33 @@
+/*
+ * This file and its contents are supplied under the terms of the
+ * Common Development and Distribution License ("CDDL"), version 1.0.
+ * You may only use this file in accordance with the terms of version
+ * 1.0 of the CDDL.
+ *
+ * A full copy of the text of the CDDL should have accompanied this
+ * source.  A copy of the CDDL is also available via the Internet at
+ * http://www.illumos.org/license/CDDL.
+ */
+
+/*
+ * Copyright (c) 2018, Joyent, Inc.
+ */
+
+#ifndef _LIBJEDEC_H
+#define	_LIBJEDEC_H
+
+/*
+ * Library routines that allow access to JEDEC JEP-106 vendor data.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern const char *libjedec_vendor_string(uint_t, uint_t);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _LIBJEDEC_H */
diff --git a/usr/src/lib/libjedec/common/mapfile-vers b/usr/src/lib/libjedec/common/mapfile-vers
new file mode 100644
index 0000000000..d19faf269a
--- /dev/null
+++ b/usr/src/lib/libjedec/common/mapfile-vers
@@ -0,0 +1,37 @@
+#
+# This file and its contents are supplied under the terms of the
+# Common Development and Distribution License ("CDDL"), version 1.0.
+# You may only use this file in accordance with the terms of version
+# 1.0 of the CDDL.
+#
+# A full copy of the text of the CDDL should have accompanied this
+# source.  A copy of the CDDL is also available via the Internet at
+# http://www.illumos.org/license/CDDL.
+#
+
+#
+# Copyright (c) 2018, Joyent, Inc.
+#
+
+#
+# MAPFILE HEADER START
+#
+# WARNING:  STOP NOW.  DO NOT MODIFY THIS FILE.
+# Object versioning must comply with the rules detailed in
+#
+#	usr/src/lib/README.mapfiles
+#
+# You should not be making modifications here until you've read the most current
+# copy of that file. If you need help, contact a gatekeeper for guidance.
+#
+# MAPFILE HEADER END
+#
+
+$mapfile_version 2
+
+SYMBOL_VERSION ILLUMOSprivate {
+    global:
+	libjedec_vendor_string;
+    local:
+	*;
+};
diff --git a/usr/src/lib/libjedec/i386/Makefile b/usr/src/lib/libjedec/i386/Makefile
new file mode 100644
index 0000000000..591d0b719d
--- /dev/null
+++ b/usr/src/lib/libjedec/i386/Makefile
@@ -0,0 +1,18 @@
+#
+# This file and its contents are supplied under the terms of the
+# Common Development and Distribution License ("CDDL"), version 1.0.
+# You may only use this file in accordance with the terms of version
+# 1.0 of the CDDL.
+#
+# A full copy of the text of the CDDL should have accompanied this
+# source.  A copy of the CDDL is also available via the Internet at
+# http://www.illumos.org/license/CDDL.
+#
+
+#
+# Copyright (c) 2018 Joyent, Inc.
+#
+
+include ../Makefile.com
+
+install: all $(ROOTLIBS) $(ROOTLINKS) $(ROOTLINT)
diff --git a/usr/src/lib/libjedec/sparc/Makefile b/usr/src/lib/libjedec/sparc/Makefile
new file mode 100644
index 0000000000..591d0b719d
--- /dev/null
+++ b/usr/src/lib/libjedec/sparc/Makefile
@@ -0,0 +1,18 @@
+#
+# This file and its contents are supplied under the terms of the
+# Common Development and Distribution License ("CDDL"), version 1.0.
+# You may only use this file in accordance with the terms of version
+# 1.0 of the CDDL.
+#
+# A full copy of the text of the CDDL should have accompanied this
+# source.  A copy of the CDDL is also available via the Internet at
+# http://www.illumos.org/license/CDDL.
+#
+
+#
+# Copyright (c) 2018 Joyent, Inc.
+#
+
+include ../Makefile.com
+
+install: all $(ROOTLIBS) $(ROOTLINKS) $(ROOTLINT)
diff --git a/usr/src/lib/libjedec/sparcv9/Makefile b/usr/src/lib/libjedec/sparcv9/Makefile
new file mode 100644
index 0000000000..22d2fd32db
--- /dev/null
+++ b/usr/src/lib/libjedec/sparcv9/Makefile
@@ -0,0 +1,19 @@
+#
+# This file and its contents are supplied under the terms of the
+# Common Development and Distribution License ("CDDL"), version 1.0.
+# You may only use this file in accordance with the terms of version
+# 1.0 of the CDDL.
+#
+# A full copy of the text of the CDDL should have accompanied this
+# source.  A copy of the CDDL is also available via the Internet at
+# http://www.illumos.org/license/CDDL.
+#
+
+#
+# Copyright (c) 2018 Joyent, Inc.
+#
+
+include ../Makefile.com
+include ../../Makefile.lib.64
+
+install: all $(ROOTLIBS64) $(ROOTLINKS64) $(ROOTLINT64)
diff --git a/usr/src/lib/libsmbios/common/mapfile-vers b/usr/src/lib/libsmbios/common/mapfile-vers
index 6df8e6d4a6..e1e063ea4b 100644
--- a/usr/src/lib/libsmbios/common/mapfile-vers
+++ b/usr/src/lib/libsmbios/common/mapfile-vers
@@ -20,7 +20,7 @@
 #
 #
 # Copyright 2015 OmniTI Computer Consulting, Inc.  All rights reserved.
-# Copyright (c) 2017, Joyent, Inc.
+# Copyright (c) 2018, Joyent, Inc.
 # Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved.
 #
 
@@ -107,6 +107,8 @@ SYMBOL_VERSION SUNWprivate_1.1 {
 	smbios_info_processor;
 	smbios_info_extprocessor;
 	smbios_info_slot;
+	smbios_info_slot_peers;
+	smbios_info_slot_peers_free;
 	smbios_info_smbios;
 	smbios_info_smbios_version;
 	smbios_info_strtab;
@@ -125,9 +127,12 @@ SYMBOL_VERSION SUNWprivate_1.1 {
 	smbios_memarray_ecc_desc;
 	smbios_memarray_loc_desc;
 	smbios_memarray_use_desc;
+	smbios_memdevice_op_capab_desc;
+	smbios_memdevice_op_capab_name;
 	smbios_memdevice_flag_desc;
 	smbios_memdevice_flag_name;
 	smbios_memdevice_form_desc;
+	smbios_memdevice_memtech_desc;
 	smbios_memdevice_type_desc;
 	smbios_memdevice_rank_desc;
 	smbios_open;
diff --git a/usr/src/lib/libsmbios/common/smb_lib.c b/usr/src/lib/libsmbios/common/smb_lib.c
index 6c1f375004..55ffee66cd 100644
--- a/usr/src/lib/libsmbios/common/smb_lib.c
+++ b/usr/src/lib/libsmbios/common/smb_lib.c
@@ -23,6 +23,7 @@
 /*
  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
+ * Copyright (c) 2018, Joyent, Inc.
  */
 
 #include <sys/types.h>
@@ -109,8 +110,9 @@ smb_biosopen(int fd, int version, int flags, int *errp)
 	smbios_entry_t *ep = alloca(SMB_ENTRY_MAXLEN);
 	smbios_entry_point_t ep_type;
 	smbios_hdl_t *shp = NULL;
-	size_t elen, pgsize, pgmask, pgoff;
+	size_t pgsize, pgmask, pgoff;
 	void *stbuf, *bios, *p, *q;
+	void *smb2, *smb3;
 	di_node_t root;
 	int64_t *val64;
 	uint32_t smbe_stlen;
@@ -135,41 +137,75 @@ smb_biosopen(int fd, int version, int flags, int *errp)
 
 	q = (void *)((uintptr_t)bios + SMB_RANGE_LIMIT - SMB_RANGE_START + 1);
 
+	smb2 = smb3 = NULL;
 	for (p = bios; p < q; p = (void *)((uintptr_t)p + SMB_SCAN_STEP)) {
-		if (strncmp(p, SMB_ENTRY_EANCHOR, SMB_ENTRY_EANCHORLEN) == 0) {
-			ep_type = SMBIOS_ENTRY_POINT_21;
-			elen = MIN(ep->ep21.smbe_elen, SMB_ENTRY_MAXLEN);
+		if (smb2 != NULL && smb3 != NULL)
 			break;
-		}
-		if (strncmp(p, SMB3_ENTRY_EANCHOR,
+		if (smb3 == NULL && strncmp(p, SMB3_ENTRY_EANCHOR,
 		    SMB3_ENTRY_EANCHORLEN) == 0) {
-			ep_type = SMBIOS_ENTRY_POINT_30;
-			elen = MIN(ep->ep30.smbe_elen, SMB_ENTRY_MAXLEN);
-			break;
+			smb3 = p;
+		} else if (smb2 == NULL && strncmp(p, SMB_ENTRY_EANCHOR,
+		    SMB_ENTRY_EANCHORLEN) == 0) {
+			smb2 = p;
 		}
 	}
 
-	if (p >= q) {
+	/*
+	 * While they're not supposed to (as per the SMBIOS 3.2 spec), some
+	 * vendors end up having a newer version in one of the two entry points
+	 * than the other. If we found multiple tables then we will prefer the
+	 * one with the newer version. If they're equivalent, we prefer the
+	 * 32-bit version. If only one is present, then we use that.
+	 */
+	if (smb2 != NULL && smb3 != NULL) {
+		uint8_t smb2maj, smb2min, smb3maj, smb3min;
+
+		bcopy(smb2, ep, sizeof (smbios_entry_t));
+		smb2maj = ep->ep21.smbe_major;
+		smb2min = ep->ep21.smbe_minor;
+		bcopy(smb3, ep, sizeof (smbios_entry_t));
+		smb3maj = ep->ep30.smbe_major;
+		smb3min = ep->ep30.smbe_minor;
+
+		if (smb3maj > smb2maj ||
+		    (smb3maj == smb2maj && smb3min > smb2min)) {
+			ep_type = SMBIOS_ENTRY_POINT_30;
+			p = smb3;
+		} else {
+			ep_type = SMBIOS_ENTRY_POINT_21;
+			p = smb2;
+		}
+	} else if (smb3 != NULL) {
+		ep_type = SMBIOS_ENTRY_POINT_30;
+		p = smb3;
+	} else if (smb2 != NULL) {
+		ep_type = SMBIOS_ENTRY_POINT_21;
+		p = smb2;
+	} else {
 		(void) munmap(bios, SMB_RANGE_LIMIT - SMB_RANGE_START + 1);
 		return (smb_open_error(NULL, errp, ESMB_NOTFOUND));
 	}
 
 	bcopy(p, ep, sizeof (smbios_entry_t));
-	bcopy(p, ep, elen);
-	(void) munmap(bios, SMB_RANGE_LIMIT - SMB_RANGE_START + 1);
 
 	switch (ep_type) {
 	case SMBIOS_ENTRY_POINT_21:
+		ep->ep21.smbe_elen = MIN(ep->ep21.smbe_elen, SMB_ENTRY_MAXLEN);
+		bcopy(p, ep, ep->ep21.smbe_elen);
 		smbe_stlen = ep->ep21.smbe_stlen;
 		smbe_staddr = ep->ep21.smbe_staddr;
 		break;
 	case SMBIOS_ENTRY_POINT_30:
+		ep->ep30.smbe_elen = MIN(ep->ep30.smbe_elen, SMB_ENTRY_MAXLEN);
+		bcopy(p, ep, ep->ep30.smbe_elen);
 		smbe_stlen = ep->ep30.smbe_stlen;
 		smbe_staddr = ep->ep30.smbe_staddr;
 		break;
 	default:
+		(void) munmap(bios, SMB_RANGE_LIMIT - SMB_RANGE_START + 1);
 		return (smb_open_error(NULL, errp, ESMB_VERSION));
 	}
+	(void) munmap(bios, SMB_RANGE_LIMIT - SMB_RANGE_START + 1);
 
 	pgsize = getpagesize();
 	pgmask = ~(pgsize - 1);
diff --git a/usr/src/pkg/manifests/system-library.mf b/usr/src/pkg/manifests/system-library.mf
index e4864bf0a7..7ee57036d1 100644
--- a/usr/src/pkg/manifests/system-library.mf
+++ b/usr/src/pkg/manifests/system-library.mf
@@ -360,6 +360,7 @@ file path=usr/lib/$(ARCH64)/libike.so.1
 file path=usr/lib/$(ARCH64)/libipmi.so.1
 file path=usr/lib/$(ARCH64)/libipp.so.1
 file path=usr/lib/$(ARCH64)/libipsecutil.so.1
+file path=usr/lib/$(ARCH64)/libjedec.so.1
 file path=usr/lib/$(ARCH64)/libkvm.so.1
 file path=usr/lib/$(ARCH64)/libl.so.1
 file path=usr/lib/$(ARCH64)/libldap.so.5
@@ -437,6 +438,7 @@ file path=usr/lib/libinetsvc.so.1
 file path=usr/lib/libipmi.so.1
 file path=usr/lib/libipp.so.1
 file path=usr/lib/libipsecutil.so.1
+file path=usr/lib/libjedec.so.1
 file path=usr/lib/libkvm.so.1
 file path=usr/lib/libl.so.1
 file path=usr/lib/libldap.so.5
diff --git a/usr/src/pkg/manifests/system-test-utiltest.mf b/usr/src/pkg/manifests/system-test-utiltest.mf
index 6533f742c5..f0ca8412e8 100644
--- a/usr/src/pkg/manifests/system-test-utiltest.mf
+++ b/usr/src/pkg/manifests/system-test-utiltest.mf
@@ -380,6 +380,7 @@ file path=opt/util-tests/tests/files/test7 mode=0444
 file path=opt/util-tests/tests/files/testnl mode=0444
 file path=opt/util-tests/tests/grep_test mode=0555
 file path=opt/util-tests/tests/iconv_test mode=0555
+file path=opt/util-tests/tests/libjedec_test mode=0555
 file path=opt/util-tests/tests/libnvpair_json/json_00_blank mode=0555
 file path=opt/util-tests/tests/libnvpair_json/json_01_boolean mode=0555
 file path=opt/util-tests/tests/libnvpair_json/json_02_numbers mode=0555
@@ -423,6 +424,7 @@ file path=opt/util-tests/tests/mergeq/mqt mode=0555
 file path=opt/util-tests/tests/mergeq/wqt mode=0555
 file path=opt/util-tests/tests/printf_test mode=0555
 file path=opt/util-tests/tests/set-linkprop mode=0555
+file path=opt/util-tests/tests/smbios mode=0555
 file path=opt/util-tests/tests/xargs_test mode=0555
 license lic_CDDL license=lic_CDDL
 license usr/src/lib/libdemangle/THIRDPARTYLICENSE \
diff --git a/usr/src/test/util-tests/runfiles/default.run b/usr/src/test/util-tests/runfiles/default.run
index bbe8d78d97..d60a3707f3 100644
--- a/usr/src/test/util-tests/runfiles/default.run
+++ b/usr/src/test/util-tests/runfiles/default.run
@@ -28,6 +28,8 @@ outputdir = /var/tmp/test_results
 [/opt/util-tests/tests/allowed-ips]
 [/opt/util-tests/tests/set-linkprop]
 [/opt/util-tests/tests/libsff/libsff]
+[/opt/util-tests/tests/libjedec_test]
+[/opt/util-tests/tests/smbios]
 
 [/opt/util-tests/tests/xargs_test]
 
diff --git a/usr/src/test/util-tests/tests/Makefile b/usr/src/test/util-tests/tests/Makefile
index 38fc1cd246..2cd2aa2b4e 100644
--- a/usr/src/test/util-tests/tests/Makefile
+++ b/usr/src/test/util-tests/tests/Makefile
@@ -18,6 +18,6 @@
 #
 
 SUBDIRS = date dis dladm iconv libnvpair_json libsff printf xargs grep_xpg4
-SUBDIRS += demangle mergeq workq chown ctf
+SUBDIRS += demangle mergeq workq chown ctf smbios libjedec
 
 include $(SRC)/test/Makefile.com
diff --git a/usr/src/test/util-tests/tests/libjedec/Makefile b/usr/src/test/util-tests/tests/libjedec/Makefile
new file mode 100644
index 0000000000..41085691c8
--- /dev/null
+++ b/usr/src/test/util-tests/tests/libjedec/Makefile
@@ -0,0 +1,58 @@
+#
+# This file and its contents are supplied under the terms of the
+# Common Development and Distribution License ("CDDL"), version 1.0.
+# You may only use this file in accordance with the terms of version
+# 1.0 of the CDDL.
+#
+# A full copy of the text of the CDDL should have accompanied this
+# source.  A copy of the CDDL is also available via the Internet at
+# http://www.illumos.org/license/CDDL.
+#
+
+#
+# Copyright (c) 2018, Joyent, Inc.
+#
+
+include $(SRC)/Makefile.master
+
+ROOTOPTPKG = $(ROOT)/opt/util-tests
+TESTDIR = $(ROOTOPTPKG)/tests/
+
+PROGS = libjedec_test
+
+LINTS = $(PROGS:%=%.ln)
+
+include $(SRC)/cmd/Makefile.cmd
+include $(SRC)/test/Makefile.com
+
+CMDS = $(PROGS:%=$(TESTDIR)/%)
+$(CMDS) := FILEMODE = 0555
+
+#
+# Different tests require different sets of libraries. If we try and use
+# the same set, we'll get guidance errors from ld.
+#
+LDLIBS += -ljedec
+
+all: $(PROGS)
+
+install: all $(CMDS) $(OUTFILES)
+
+lint:
+
+clobber: clean
+	-$(RM) $(PROGS) $(LINTS)
+
+clean:
+
+$(CMDS): $(TESTDIR) $(PROG)
+
+$(TESTDIR):
+	$(INS.dir)
+
+$(TESTDIR)/%: %
+	$(INS.file)
+
+%: %.c
+	$(LINK.c) -o $@ $< $(LDLIBS)
+	$(POST_PROCESS)
diff --git a/usr/src/test/util-tests/tests/libjedec/libjedec_test.c b/usr/src/test/util-tests/tests/libjedec/libjedec_test.c
new file mode 100644
index 0000000000..757b80effb
--- /dev/null
+++ b/usr/src/test/util-tests/tests/libjedec/libjedec_test.c
@@ -0,0 +1,97 @@
+/*
+ * This file and its contents are supplied under the terms of the
+ * Common Development and Distribution License ("CDDL"), version 1.0.
+ * You may only use this file in accordance with the terms of version
+ * 1.0 of the CDDL.
+ *
+ * A full copy of the text of the CDDL should have accompanied this
+ * source.  A copy of the CDDL is also available via the Internet at
+ * http://www.illumos.org/license/CDDL.
+ */
+
+/*
+ * Copyright (c) 2018, Joyent, Inc.
+ */
+
+/*
+ * Test basic functionality of libjedec.
+ */
+
+#include <sys/types.h>
+#include <sys/sysmacros.h>
+#include <libjedec.h>
+#include <stdio.h>
+#include <strings.h>
+
+/*
+ * Table of various values and expected vendors.
+ */
+typedef struct {
+	uint_t		ljtt_cont;
+	uint_t		ljtt_vendor;
+	const char	*ljtt_exp;
+} libjedec_test_t;
+
+static const libjedec_test_t libjedec_expects[] = {
+	{ 0x00, 0x01, "AMD" },
+	{ 0x00, 0x19, "Xicor" },
+	{ 0x00, 0x89, "Intel" },
+	{ 0x00, 0xFE, "Numonyx Corporation" },
+	{ 0x01, 0x15, "Hughes Aircraft" },
+	{ 0x01, 0xF2, "Yamaha Corporation" },
+	{ 0x02, 0x9E, "Corsair" },
+	{ 0x02, 0x3E, "West Bay Semiconductor" },
+	{ 0x02, 0xF8, "Galaxy Power" },
+	{ 0x03, 0x26, "BOPS" },
+	{ 0x03, 0x6B, "NVIDIA" },
+	{ 0x03, 0x7A, "Astec International" },
+	{ 0x04, 0x07, "Dotcast" },
+	{ 0x04, 0x40, "Bandspeed" },
+	{ 0x04, 0x6D, "Supreme Top Technology Ltd." },
+	{ 0x05, 0x2A, "Atrua Technologies, Inc." },
+	{ 0x05, 0x52, "New Japan Radio Co. Ltd." },
+	{ 0x05, 0xEF, "MetaRAM" },
+	{ 0x06, 0x0B, "Netxen" },
+	{ 0x06, 0xF2, "Muscle Power" },
+	{ 0x07, 0x9E, "Teikon" },
+	{ 0x07, 0xCE, "Mustang" },
+	{ 0x08, 0x1F, "Shenzhen City Gcai Electronics" },
+	{ 0x08, 0xF1, "Asgard" },
+	{ 0x09, 0x13, "Raspberry Pi Trading Ltd." },
+	/* Various Failure cases */
+	{ 0x00, 0x05, NULL },
+	{ 0x09, 0xFE, NULL },
+	{ 0x20, 0x01, NULL }
+};
+
+int
+main(void)
+{
+	uint_t i, errs = 0;
+
+	for (i = 0; i < ARRAY_SIZE(libjedec_expects); i++) {
+		const char *out;
+
+		out = libjedec_vendor_string(libjedec_expects[i].ljtt_cont,
+		    libjedec_expects[i].ljtt_vendor);
+		if (out == NULL && libjedec_expects[i].ljtt_exp != NULL) {
+			errs++;
+			(void) fprintf(stderr, "test %u failed, expected %s, "
+			    "but lookup failed\n", i,
+			    libjedec_expects[i].ljtt_vendor);
+		} else if (out != NULL && libjedec_expects[i].ljtt_exp ==
+		    NULL) {
+			errs++;
+			(void) fprintf(stderr, "test %u failed, expected "
+			    "lookup failure, but it succeeded with %s\n", i,
+			    out);
+		} else if (strcmp(out, libjedec_expects[i].ljtt_exp) != 0) {
+			errs++;
+			(void) fprintf(stderr, "test %u failed, expected %s, "
+			    "found %s\n", i, libjedec_expects[i].ljtt_exp,
+			    out);
+		}
+	}
+
+	return (errs);
+}
diff --git a/usr/src/test/util-tests/tests/smbios/Makefile b/usr/src/test/util-tests/tests/smbios/Makefile
new file mode 100644
index 0000000000..5016e81a6d
--- /dev/null
+++ b/usr/src/test/util-tests/tests/smbios/Makefile
@@ -0,0 +1,55 @@
+#
+# This file and its contents are supplied under the terms of the
+# Common Development and Distribution License ("CDDL"), version 1.0.
+# You may only use this file in accordance with the terms of version
+# 1.0 of the CDDL.
+#
+# A full copy of the text of the CDDL should have accompanied this
+# source.  A copy of the CDDL is also available via the Internet at
+# http://www.illumos.org/license/CDDL.
+#
+
+#
+# Copyright (c) 2018, Joyent, Inc.
+#
+
+include $(SRC)/Makefile.master
+
+ROOTOPTPKG = $(ROOT)/opt/util-tests
+TESTDIR = $(ROOTOPTPKG)/tests/
+
+PROGS = smbios
+
+LINTS = $(PROGS:%=%.ln)
+
+include $(SRC)/cmd/Makefile.cmd
+include $(SRC)/test/Makefile.com
+
+CMDS = $(PROGS:%=$(TESTDIR)/%)
+$(CMDS) := FILEMODE = 0555
+
+LDLIBS += -lsmbios -lumem
+CFLAGS += -_gcc=-Wall -_gcc=-Wextra -_gcc=-Wno-unknown-pragmas
+
+all: $(PROGS)
+
+install: all $(CMDS) $(OUTFILES)
+
+clobber: clean
+	-$(RM) $(PROGS) $(LINTS)
+
+lint:
+
+clean:
+
+$(CMDS): $(TESTDIR) $(PROG)
+
+$(TESTDIR):
+	$(INS.dir)
+
+$(TESTDIR)/%: %
+	$(INS.file)
+
+%: %.c
+	$(LINK.c) -o $@ $< $(LDLIBS)
+	$(POST_PROCESS)
diff --git a/usr/src/test/util-tests/tests/smbios/smbios.c b/usr/src/test/util-tests/tests/smbios/smbios.c
new file mode 100644
index 0000000000..96b887c3cc
--- /dev/null
+++ b/usr/src/test/util-tests/tests/smbios/smbios.c
@@ -0,0 +1,411 @@
+/*
+ * This file and its contents are supplied under the terms of the
+ * Common Development and Distribution License ("CDDL"), version 1.0.
+ * You may only use this file in accordance with the terms of version
+ * 1.0 of the CDDL.
+ *
+ * A full copy of the text of the CDDL should have accompanied this
+ * source.  A copy of the CDDL is also available via the Internet at
+ * http://www.illumos.org/license/CDDL.
+ */
+
+/*
+ * Copyright (c) 2018, Joyent, Inc.
+ */
+
+/*
+ * Primordial SMBIOS test suite. At the moment, the purpose of this is just to
+ * test the recent SMBIOS 3.2 additions specific to the variable length slots.
+ * This should be evolved into a much fuller test suite.
+ */
+
+#include <smbios.h>
+#include <umem.h>
+#include <stdint.h>
+#include <endian.h>
+#include <stdio.h>
+#include <err.h>
+
+#include <sys/smbios.h>
+#include <sys/smbios_impl.h>
+
+static const char *smbios_test_name = "The One Slot";
+
+/*
+ * Number of bytes we allocate at a given time for an SMBIOS table.
+ */
+#define	SMBIOS_TEST_ALLOC_SIZE	1024
+
+typedef struct smbios_test_table {
+	smbios_entry_point_t	stt_type;
+	void			*stt_data;
+	size_t			stt_buflen;
+	size_t			stt_offset;
+	uint_t			stt_nents;
+	uint_t			stt_version;
+	uint_t			stt_nextid;
+	smbios_entry_t		stt_entry;
+} smbios_test_table_t;
+
+const char *
+_umem_debug_init(void)
+{
+	return ("default,verbose");
+}
+
+const char *
+_umem_logging_init(void)
+{
+	return ("fail,contents");
+}
+
+static smbios_test_table_t *
+smbios_test_table_init(smbios_entry_point_t type, uint_t version)
+{
+	smbios_test_table_t *table;
+
+	if (type != SMBIOS_ENTRY_POINT_30) {
+		abort();
+	}
+
+	table = umem_zalloc(sizeof (smbios_test_table_t), UMEM_DEFAULT);
+	if (table == NULL) {
+		return (NULL);
+	}
+
+	table->stt_data = umem_zalloc(SMBIOS_TEST_ALLOC_SIZE, UMEM_DEFAULT);
+	if (table->stt_data == NULL) {
+		umem_free(table, sizeof (smbios_test_table_t));
+		return (NULL);
+	}
+	table->stt_buflen = SMBIOS_TEST_ALLOC_SIZE;
+	table->stt_type = type;
+	table->stt_version = version;
+	table->stt_nextid = 1;
+
+	return (table);
+}
+
+static void *
+smbios_test_table_append_common(smbios_test_table_t *table, const void *buf,
+    size_t len)
+{
+	void *start;
+
+	if (SIZE_MAX - table->stt_offset < len)
+		abort();
+
+	if (len + table->stt_offset >= table->stt_buflen) {
+		void *newbuf;
+		size_t newlen = table->stt_buflen + SMBIOS_TEST_ALLOC_SIZE;
+
+		while (len + table->stt_offset >= newlen) {
+			newlen += SMBIOS_TEST_ALLOC_SIZE;
+		}
+
+		newbuf = umem_zalloc(newlen, UMEM_DEFAULT);
+		if (newbuf == NULL) {
+			err(EXIT_FAILURE, "failed to umem_zalloc for %lu bytes",
+			    newlen);
+		}
+
+		(void) memcpy(newbuf, table->stt_data, table->stt_buflen);
+		umem_free(table->stt_data, table->stt_buflen);
+		table->stt_data = newbuf;
+		table->stt_buflen = newlen;
+	}
+
+	start = (void *)((uintptr_t)table->stt_data + table->stt_offset);
+	(void) memcpy(start, buf, len);
+	table->stt_offset += len;
+
+	return (start);
+}
+
+static void
+smbios_test_table_append_raw(smbios_test_table_t *table, const void *buf,
+    size_t len)
+{
+	(void) smbios_test_table_append_common(table, buf, len);
+}
+
+static void
+smbios_test_table_append_string(smbios_test_table_t *table, const char *str)
+{
+	size_t len = strlen(str) + 1;
+	(void) smbios_test_table_append_common(table, str, len);
+}
+
+static uint16_t
+smbios_test_table_append(smbios_test_table_t *table, const void *buf,
+    size_t len)
+{
+	smb_header_t *hdr;
+	uint16_t id;
+
+	hdr = smbios_test_table_append_common(table, buf, len);
+	table->stt_nents++;
+
+	id = table->stt_nextid;
+	hdr->smbh_hdl = htole16(table->stt_nextid);
+	table->stt_nextid++;
+
+	return (id);
+}
+
+static uint8_t
+smbios_test_table_checksum(const uint8_t *buf, size_t len)
+{
+	uint8_t sum;
+	size_t i;
+
+	for (i = 0, sum = 0; i < len; i++) {
+		sum += buf[i];
+	}
+
+	if (sum == 0)
+		return (0);
+
+	return ((uint8_t)(0x100 - sum));
+}
+
+static void
+smbios_test_table_snapshot(smbios_test_table_t *table, smbios_entry_t **entryp,
+    void **bufp, size_t *lenp)
+{
+	smbios_30_entry_t *ent30;
+
+	switch (table->stt_type) {
+	case SMBIOS_ENTRY_POINT_30:
+		ent30 = &table->stt_entry.ep30;
+
+		(void) memcpy(ent30->smbe_eanchor, SMB3_ENTRY_EANCHOR,
+		    sizeof (ent30->smbe_eanchor));
+		ent30->smbe_ecksum = 0;
+		ent30->smbe_elen = sizeof (*ent30);
+		ent30->smbe_major = (table->stt_version >> 8) & 0xff;
+		ent30->smbe_minor = table->stt_version & 0xff;
+		ent30->smbe_docrev = 0;
+		ent30->smbe_revision = 1;
+		ent30->smbe_reserved = 0;
+		ent30->smbe_stlen = htole32(table->stt_offset);
+		ent30->smbe_staddr = htole64(P2ROUNDUP(sizeof (*ent30), 16));
+
+		ent30->smbe_ecksum = smbios_test_table_checksum((void *)ent30,
+		    sizeof (*ent30));
+		break;
+	default:
+		abort();
+	}
+
+	*entryp = &table->stt_entry;
+	*bufp = table->stt_data;
+	*lenp = table->stt_offset;
+}
+
+static void
+smbios_test_table_fini(smbios_test_table_t *table)
+{
+	if (table == NULL) {
+		return;
+	}
+
+	if (table->stt_data != NULL) {
+		umem_free(table->stt_data, table->stt_buflen);
+	}
+
+	umem_free(table, sizeof (smbios_test_table_t));
+}
+
+static void
+smbios_test_mktable(smbios_test_table_t *table)
+{
+	smb_slot_t slot;
+	smb_slot_peer_t peers[2];
+	smb_header_t eot;
+	uint8_t endstring = 0;
+
+	slot.smbsl_hdr.smbh_type = SMB_TYPE_SLOT;
+	slot.smbsl_hdr.smbh_len = sizeof (smb_slot_t) + sizeof (peers);
+
+	slot.smbsl_name = 1;
+	slot.smbsl_type = SMB_SLT_PCIE3G16;
+	slot.smbsl_width = SMB_SLW_16X;
+	slot.smbsl_length = SMB_SLL_SHORT;
+	slot.smbsl_id = htole16(1);
+	slot.smbsl_ch1 = SMB_SLCH1_33V;
+	slot.smbsl_ch2 = SMB_SLCH2_PME;
+	slot.smbsl_sg = htole16(1);
+	slot.smbsl_bus = 0x42;
+	slot.smbsl_df = 0x23;
+	slot.smbsl_dbw = SMB_SLW_16X;
+	slot.smbsl_npeers = 2;
+	peers[0].smbspb_group_no = htole16(1);
+	peers[0].smbspb_bus = 0x42;
+	peers[0].smbspb_df = 0x42;
+	peers[0].smbspb_width = SMB_SLW_8X;
+
+	peers[1].smbspb_group_no = htole16(1);
+	peers[1].smbspb_bus = 0x23;
+	peers[1].smbspb_df = 0x31;
+	peers[1].smbspb_width = SMB_SLW_8X;
+
+	(void) smbios_test_table_append(table, &slot, sizeof (slot));
+	(void) smbios_test_table_append_raw(table, peers, sizeof (peers));
+	(void) smbios_test_table_append_string(table, smbios_test_name);
+	(void) smbios_test_table_append_raw(table, &endstring,
+	    sizeof (endstring));
+
+	bzero(&eot, sizeof (eot));
+	eot.smbh_type = SMB_TYPE_EOT;
+	eot.smbh_len = 4;
+	(void) smbios_test_table_append(table, &eot, sizeof (eot));
+	(void) smbios_test_table_append_raw(table, &endstring,
+	    sizeof (endstring));
+	(void) smbios_test_table_append_raw(table, &endstring,
+	    sizeof (endstring));
+}
+
+static void
+smbios_test_verify_table(smbios_hdl_t *hdl)
+{
+	smbios_struct_t sp;
+	smbios_slot_t slot;
+	uint_t npeers;
+	smbios_slot_peer_t *peers;
+	uint_t errs = 0;
+
+	if (smbios_lookup_type(hdl, SMB_TYPE_SLOT, &sp) == -1) {
+		errx(EXIT_FAILURE, "failed to lookup SMBIOS slot: %s",
+		    smbios_errmsg(smbios_errno(hdl)));
+	}
+
+	if (smbios_info_slot(hdl, sp.smbstr_id, &slot) != 0) {
+		errx(EXIT_FAILURE, "failed to get SMBIOS slot info: %s",
+		    smbios_errmsg(smbios_errno(hdl)));
+	}
+
+	/*
+	 * Verify everything we'd expect about the slot.
+	 */
+	if (strcmp(slot.smbl_name, smbios_test_name) != 0) {
+		warnx("slot name mismatch, expected %s, found %s",
+		    smbios_test_name, slot.smbl_name);
+		errs++;
+	}
+
+	if (slot.smbl_type != SMB_SLT_PCIE3G16) {
+		warnx("incorrect slot type, found %u", slot.smbl_type);
+		errs++;
+	}
+
+	if (slot.smbl_width != SMB_SLW_16X) {
+		warnx("incorrect slot width, found %u", slot.smbl_width);
+		errs++;
+	}
+
+	if (slot.smbl_length != SMB_SLL_SHORT) {
+		warnx("incorrect slot length, found %u", slot.smbl_length);
+		errs++;
+	}
+
+	if (slot.smbl_dbw != SMB_SLW_16X) {
+		warnx("incorrect slot data bus width, found %u", slot.smbl_dbw);
+		errs++;
+	}
+
+	if (slot.smbl_npeers != 2) {
+		warnx("incorrect number of slot peers, found %u",
+		    slot.smbl_npeers);
+		errs++;
+	}
+
+	if (smbios_info_slot_peers(hdl, sp.smbstr_id, &npeers, &peers) != 0) {
+		errx(EXIT_FAILURE, "failed to get SMBIOS peer info: %s",
+		    smbios_errmsg(smbios_errno(hdl)));
+	}
+
+	if (npeers != 2) {
+		errx(EXIT_FAILURE, "got wrong number of slot peers: %u\n",
+		    npeers);
+	}
+
+	if (peers[0].smblp_group != 1) {
+		warnx("incorrect group for peer 0: %u", peers[0].smblp_group);
+		errs++;
+	}
+
+	if (peers[0].smblp_data_width != SMB_SLW_8X) {
+		warnx("incorrect data width for peer 0: %u",
+		    peers[0].smblp_data_width);
+		errs++;
+	}
+
+	if (peers[0].smblp_device != (0x42 >> 3)) {
+		warnx("incorrect PCI device for peer 0: %u",
+		    peers[0].smblp_device);
+		errs++;
+	}
+
+	if (peers[0].smblp_function != (0x42 & 0x7)) {
+		warnx("incorrect PCI function for peer 0: %u",
+		    peers[0].smblp_function);
+		errs++;
+	}
+
+	if (peers[1].smblp_group != 1) {
+		warnx("incorrect group for peer 1: %u", peers[1].smblp_group);
+		errs++;
+	}
+
+	if (peers[1].smblp_device != (0x31 >> 3)) {
+		warnx("incorrect PCI device for peer 1: %u",
+		    peers[1].smblp_device);
+		errs++;
+	}
+
+	if (peers[1].smblp_function != (0x31 & 0x7)) {
+		warnx("incorrect PCI function for peer 1: %u",
+		    peers[1].smblp_function);
+		errs++;
+	}
+
+	if (peers[1].smblp_data_width != SMB_SLW_8X) {
+		warnx("incorrect data width for peer 1: %u",
+		    peers[1].smblp_data_width);
+		errs++;
+	}
+
+	smbios_info_slot_peers_free(hdl, npeers, peers);
+
+	if (errs > 0) {
+		errx(EXIT_FAILURE, "encountered fatal errors");
+	}
+}
+
+int
+main(void)
+{
+	void *buf;
+	size_t len;
+	smbios_test_table_t *table;
+	smbios_entry_t *entry;
+	smbios_hdl_t *hdl;
+	int err = 0;
+
+	table = smbios_test_table_init(SMBIOS_ENTRY_POINT_30, SMB_VERSION_32);
+	smbios_test_mktable(table);
+	smbios_test_table_snapshot(table, &entry, &buf, &len);
+
+	hdl = smbios_bufopen(entry, buf, len, SMB_VERSION_32, SMB_FL_DEBUG,
+	    &err);
+	if (hdl == NULL) {
+		errx(EXIT_FAILURE, "failed to create fake smbios table: %s",
+		    smbios_errmsg(err));
+	}
+	smbios_test_verify_table(hdl);
+	smbios_close(hdl);
+	smbios_test_table_fini(table);
+
+	return (0);
+}
diff --git a/usr/src/uts/common/sys/smbios.h b/usr/src/uts/common/sys/smbios.h
index d28141e668..43163a7507 100644
--- a/usr/src/uts/common/sys/smbios.h
+++ b/usr/src/uts/common/sys/smbios.h
@@ -526,6 +526,10 @@ typedef struct smbios_processor {
 #define	SMB_PRU_LGA36471	0x36	/* LGA3647-1 */
 #define	SMB_PRU_SP3		0x37	/* socket SP3 */
 #define	SMB_PRU_SP3r2		0x38	/* socket SP3r2 */
+#define	SMB_PRU_LGA2066		0x39	/* Socket LGA2066 */
+#define	SMB_PRU_BGA1392		0x3A	/* Socket BGA1392 */
+#define	SMB_PRU_BGA1510		0x3B	/* Socket BGA1510 */
+#define	SMB_PRU_BGA1528		0x3C	/* Socket BGA1528 */
 
 #define	SMB_PRC_RESERVED	0x0001	/* reserved */
 #define	SMB_PRC_UNKNOWN		0x0002	/* unknown */
@@ -707,6 +711,7 @@ typedef struct smbios_processor {
 #define	SMB_PRF_ZARCH		0xCC	/* z/Architecture */
 #define	SMB_PRF_CORE_I5		0xCD	/* Intel Core i5 */
 #define	SMB_PRF_CORE_I3		0xCE	/* Intel Core i3 */
+#define	SMB_PRF_CORE_I9		0xCF	/* Intel Core i9 */
 #define	SMB_PRF_C7M		0xD2	/* VIA C7-M */
 #define	SMB_PRF_C7D		0xD3	/* VIA C7-D */
 #define	SMB_PRF_C7		0xD4	/* VIA C7 */
@@ -872,6 +877,7 @@ typedef struct smbios_port {
 #define	SMB_POC_BNC		0x20		/* BNC */
 #define	SMB_POC_1394		0x21		/* 1394 */
 #define	SMB_POC_SATA		0x22		/* SAS/SATA plug receptacle */
+#define	SMB_POC_USB_C		0x23		/* USB Type-C receptacle */
 #define	SMB_POC_PC98		0xA0		/* PC-98 */
 #define	SMB_POC_PC98HR		0xA1		/* PC-98Hireso */
 #define	SMB_POC_PCH98		0xA2		/* PC-H98 */
@@ -913,6 +919,8 @@ typedef struct smbios_port {
 #define	SMB_POT_NETWORK		0x1F		/* Network port */
 #define	SMB_POT_SATA		0x20		/* SATA */
 #define	SMB_POT_SAS		0x21		/* SAS */
+#define	SMB_POT_MFDP		0x22	/* MFDP (Multi-Function Display Port) */
+#define	SMB_POT_THUNDERBOLT	0x23		/* Thunderbolt */
 #define	SMB_POT_8251		0xA0		/* 8251 compatible */
 #define	SMB_POT_8251F		0xA1		/* 8251 FIFO compatible */
 #define	SMB_POT_OTHER		0xFF		/* other */
@@ -933,6 +941,8 @@ typedef struct smbios_slot {
 	uint16_t smbl_sg;		/* segment group number */
 	uint8_t smbl_bus;		/* bus number */
 	uint8_t smbl_df;		/* device/function number */
+	uint8_t smbl_dbw;		/* data bus width */
+	uint8_t smbl_npeers;		/* PCIe bifurcation peers */
 } smbios_slot_t;
 
 #define	SMB_SLT_OTHER		0x01	/* other */
@@ -1036,6 +1046,21 @@ typedef struct smbios_slot {
 #define	SMB_SLCH2_PME		0x01	/* slot supports PME# signal */
 #define	SMB_SLCH2_HOTPLUG	0x02	/* slot supports hot-plug devices */
 #define	SMB_SLCH2_SMBUS		0x04	/* slot supports SMBus signal */
+#define	SMB_SLCH2_BIFUR		0x08	/* slot supports PCIe bifurcation */
+
+/*
+ * SMBIOS 7.10.9 Slot Peer Devices
+ *
+ * This structure represents an optional peer device that may be part of an
+ * SMBIOS 3.2 slot.
+ */
+typedef struct smbios_slot_peer {
+	uint16_t smblp_group;		/* peer segment group number */
+	uint8_t smblp_bus;		/* peer bus number */
+	uint8_t smblp_device;		/* peer device number */
+	uint8_t smblp_function;		/* peer function number */
+	uint8_t	smblp_data_width;	/* peer data bus width */
+} smbios_slot_peer_t;
 
 /*
  * SMBIOS On-Board Device Information.  See DSP0134 Section 7.11 for more
@@ -1189,6 +1214,17 @@ typedef struct smbios_memdevice {
 	uint16_t smbmd_minvolt;		/* minimum voltage */
 	uint16_t smbmd_maxvolt;		/* maximum voltage */
 	uint16_t smbmd_confvolt;	/* configured voltage */
+	uint8_t smbmd_memtech;		/* memory technology */
+	uint32_t smbmd_opcap_flags;	/* operating mode capability */
+	const char *smbmd_firmware_rev;	/* firmware rev */
+	uint16_t smbmd_modmfg_id;	/* JEDEC module mfg id */
+	uint16_t smbmd_modprod_id;	/* JEDEC module product id */
+	uint16_t smbmd_cntrlmfg_id;	/* JEDEC controller mfg id */
+	uint16_t smbmd_cntrlprod_id;	/* JEDEC controller prod id */
+	uint64_t smbmd_nvsize;		/* non-volatile size in bytes */
+	uint64_t smbmd_volatile_size;	/* volatile size in bytes */
+	uint64_t smbmd_cache_size;	/* cache size in bytes */
+	uint64_t smbmd_logical_size;	/* logical size in bytes */
 } smbios_memdevice_t;
 
 #define	SMB_MDFF_OTHER		0x01	/* other */
@@ -1234,6 +1270,7 @@ typedef struct smbios_memdevice {
 #define	SMB_MDT_LPDDR2		0x1C	/* LPDDR2 */
 #define	SMB_MDT_LPDDR3		0x1D	/* LPDDR3 */
 #define	SMB_MDT_LPDDR4		0x1E	/* LPDDR4 */
+#define	SMB_MDT_LOGNV		0x1F	/* Logical non-volatile device */
 
 #define	SMB_MDF_OTHER		0x0002	/* other */
 #define	SMB_MDF_UNKNOWN		0x0004	/* unknown */
@@ -1256,6 +1293,20 @@ typedef struct smbios_memdevice {
 #define	SMB_MDR_QUAD		0x04	/* quad */
 #define	SMB_MDR_OCTAL		0x08	/* octal */
 
+#define	SMB_MTECH_OTHER		0x01	/* other */
+#define	SMB_MTECH_UNKNOWN	0x02	/* unknown */
+#define	SMB_MTECH_DRAM		0x03	/* DRAM */
+#define	SMB_MTECH_NVDIMM_N	0x04	/* NVDIMM-N */
+#define	SMB_MTECH_NVDIMM_F	0x05	/* NVDIMM-F */
+#define	SMB_MTECH_NVDIMM_P	0x06	/* NVDIMM-P */
+#define	SMB_MTECH_INTCPM	0x07	/* Intel persistent memory */
+
+#define	SMB_MOMC_OTHER		0x01	/* other */
+#define	SMB_MOMC_UNKNOWN	0x02	/* unknown */
+#define	SMB_MOMC_VOLATILE	0x04	/* Volatile memory */
+#define	SMB_MOMC_BYTE_PM	0x08	/* Byte-accessible persistent memory */
+#define	SMB_MOMC_BLOCK_PM	0x10	/* Block-accessible persistent memory */
+
 /*
  * SMBIOS Memory Array Mapped Address.  See DSP0134 Section 7.20 for more
  * information.  We convert start/end addresses into addr/size for convenience.
@@ -1626,7 +1677,8 @@ typedef struct smbios_memdevice_ext {
 #define	SMB_VERSION_28	0x0208		/* SMBIOS encoding for DMTF spec 2.8 */
 #define	SMB_VERSION_30	0x0300		/* SMBIOS encoding for DMTF spec 3.0 */
 #define	SMB_VERSION_31	0x0301		/* SMBIOS encoding for DMTF spec 3.1 */
-#define	SMB_VERSION	SMB_VERSION_31	/* SMBIOS latest version definitions */
+#define	SMB_VERSION_32	0x0302		/* SMBIOS encoding for DMTF spec 3.2 */
+#define	SMB_VERSION	SMB_VERSION_32	/* SMBIOS latest version definitions */
 
 #define	SMB_O_NOCKSUM	0x1		/* do not verify header checksums */
 #define	SMB_O_NOVERS	0x2		/* do not verify header versions */
@@ -1686,6 +1738,10 @@ extern int smbios_info_cache(smbios_hdl_t *, id_t, smbios_cache_t *);
 extern int smbios_info_port(smbios_hdl_t *, id_t, smbios_port_t *);
 extern int smbios_info_extport(smbios_hdl_t *, id_t, smbios_port_ext_t *);
 extern int smbios_info_slot(smbios_hdl_t *, id_t, smbios_slot_t *);
+extern int smbios_info_slot_peers(smbios_hdl_t *, id_t, uint_t *,
+    smbios_slot_peer_t **);
+extern void smbios_info_slot_peers_free(smbios_hdl_t *, uint_t,
+    smbios_slot_peer_t *);
 extern int smbios_info_obdevs(smbios_hdl_t *, id_t, int, smbios_obdev_t *);
 extern int smbios_info_obdevs_ext(smbios_hdl_t *, id_t, smbios_obdev_ext_t *);
 extern int smbios_info_strtab(smbios_hdl_t *, id_t, int, const char *[]);
@@ -1785,6 +1841,9 @@ extern const char *smbios_memdevice_type_desc(uint_t);
 extern const char *smbios_memdevice_flag_name(uint_t);
 extern const char *smbios_memdevice_flag_desc(uint_t);
 extern const char *smbios_memdevice_rank_desc(uint_t);
+extern const char *smbios_memdevice_memtech_desc(uint_t);
+extern const char *smbios_memdevice_op_capab_name(uint_t);
+extern const char *smbios_memdevice_op_capab_desc(uint_t);
 
 extern const char *smbios_onboard_type_desc(uint_t);
 
diff --git a/usr/src/uts/common/sys/smbios_impl.h b/usr/src/uts/common/sys/smbios_impl.h
index 66edfb027a..df61892a82 100644
--- a/usr/src/uts/common/sys/smbios_impl.h
+++ b/usr/src/uts/common/sys/smbios_impl.h
@@ -21,7 +21,7 @@
 
 /*
  * Copyright 2015 OmniTI Computer Consulting, Inc.  All rights reserved.
- * Copyright (c) 2017, Joyent, Inc.
+ * Copyright (c) 2018, Joyent, Inc.
  * Copyright 2010 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
  */
@@ -201,8 +201,8 @@ typedef struct smb_cache {
 #define	SMB_CACHE_SIZE(s)	(((s) & 0x8000) ? \
 	((uint32_t)((s) & 0x7FFF) * 64 * 1024) : ((uint32_t)(s) * 1024))
 
-#define	SMB_CACHE_EXT_SIZE(s)	(((s) & 0x80000000U) ? 	\
-	((uint64_t)((s) & 0x7FFFFFFFULL) * 64ULL * 1024ULL) : 	\
+#define	SMB_CACHE_EXT_SIZE(s)	(((s) & 0x80000000U) ?	\
+	((uint64_t)((s) & 0x7FFFFFFFULL) * 64ULL * 1024ULL) :	\
 	((uint64_t)(s) * 1024ULL))
 
 #define	SMB_CACHE_CFG_MODE(c)		(((c) >> 8) & 3)
@@ -226,6 +226,13 @@ typedef struct smb_port {
 /*
  * SMBIOS implementation structure for SMB_TYPE_SLOT.
  */
+typedef struct smb_slot_peer {
+	uint16_t smbspb_group_no;	/* segment group number */
+	uint8_t smbspb_bus;		/* bus number */
+	uint8_t smbspb_df;		/* device/function number */
+	uint8_t smbspb_width;		/* electrical width */
+} smb_slot_peer_t;
+
 typedef struct smb_slot {
 	smb_header_t smbsl_hdr;		/* structure header */
 	uint8_t smbsl_name;		/* reference designation */
@@ -239,6 +246,10 @@ typedef struct smb_slot {
 	uint16_t smbsl_sg;		/* segment group number */
 	uint8_t smbsl_bus;		/* bus number */
 	uint8_t smbsl_df;		/* device/function number */
+	/* Added in SMBIOS 3.2+ */
+	uint8_t	smbsl_dbw;		/* Data bus width */
+	uint8_t	smbsl_npeers;		/* Peer bdf groups */
+	smb_slot_peer_t smbsl_peers[];	/* bifurcation peers */
 } smb_slot_t;
 
 /*
@@ -343,6 +354,18 @@ typedef struct smb_memdevice {
 	uint16_t smbmdev_minvolt;	/* minimum voltage */
 	uint16_t smbmdev_maxvolt;	/* maximum voltage */
 	uint16_t smbmdev_confvolt;	/* configured voltage */
+	/* Added in SMBIOS 3.2 */
+	uint8_t smbmdev_memtech;	/* memory technology */
+	uint16_t smbmdev_opmode;	/* memory operating mode capability */
+	uint8_t smbmdev_fwver;		/* firmware version */
+	uint16_t smbmdev_modulemfgid;	/* module manufacturer ID */
+	uint16_t smbmdev_moduleprodid;	/* module product ID */
+	uint16_t smbmdev_memsysmfgid;	/* memory controller manufacturer id */
+	uint16_t smbmdev_memsysprodid;	/* memory controller product id */
+	uint64_t smbmdev_nvsize;	/* non-volatile memory size */
+	uint64_t smbmdev_volsize;	/* volatile memory size */
+	uint64_t smbmdev_cachesize;	/* cache size */
+	uint64_t smbmdev_logicalsize;	/* logical size */
 } smb_memdevice_t;
 
 #define	SMB_MDS_KBYTES		0x8000	/* size in specified in kilobytes */
@@ -627,7 +650,7 @@ typedef struct smb_struct {
 	const smb_header_t *smbst_hdr;	/* address of raw structure data */
 	const uchar_t *smbst_str;	/* address of string data (if any) */
 	const uchar_t *smbst_end;	/* address of 0x0000 ending tag */
-	struct smb_struct *smbst_next; 	/* next structure in hash chain */
+	struct smb_struct *smbst_next;	/* next structure in hash chain */
 	uint16_t *smbst_strtab;		/* string index -> offset table */
 	uint_t smbst_strtablen;		/* length of smbst_strtab */
 } smb_struct_t;
@@ -788,6 +811,20 @@ typedef struct smb_base_cache {
 	uint8_t smbba_flags;		/* cache flags (SMB_CAF_*) */
 } smb_base_cache_t;
 
+typedef struct smb_base_slot {
+	const char *smbbl_name;		/* reference designation */
+	uint8_t smbbl_type;		/* slot type */
+	uint8_t smbbl_width;		/* slot data bus width */
+	uint8_t smbbl_usage;		/* current usage */
+	uint8_t smbbl_length;		/* slot length */
+	uint16_t smbbl_id;		/* slot ID */
+	uint8_t smbbl_ch1;		/* slot characteristics 1 */
+	uint8_t smbbl_ch2;		/* slot characteristics 2 */
+	uint16_t smbbl_sg;		/* segment group number */
+	uint8_t smbbl_bus;		/* bus number */
+	uint8_t smbbl_df;		/* device/function number */
+} smb_base_slot_t;
+
 #ifdef	__cplusplus
 }
 #endif
diff --git a/usr/src/uts/i86pc/os/smb_dev.c b/usr/src/uts/i86pc/os/smb_dev.c
index 3cab78a7ea..11567548ea 100644
--- a/usr/src/uts/i86pc/os/smb_dev.c
+++ b/usr/src/uts/i86pc/os/smb_dev.c
@@ -23,6 +23,7 @@
 /*
  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
+ * Copyright (c) 2018, Joyent, Inc.
  */
 
 /*
@@ -64,10 +65,11 @@ smbios_open(const char *file, int version, int flags, int *errp)
 	smbios_hdl_t *shp = NULL;
 	smbios_entry_t *ep;
 	caddr_t stbuf, bios, p, q;
+	caddr_t smb2, smb3;
 	uint64_t startaddr, startoff = 0;
 	size_t bioslen;
 	uint_t smbe_stlen;
-	smbios_entry_point_t ep_type = SMBIOS_ENTRY_POINT_21;
+	smbios_entry_point_t ep_type;
 	uint8_t smbe_major, smbe_minor;
 	int err;
 
@@ -96,24 +98,60 @@ smbios_open(const char *file, int version, int flags, int *errp)
 	 */
 	p = bios + startoff;
 	q = bios + bioslen - startoff;
+	smb2 = smb3 = NULL;
 	while (p < q) {
-		err = strncmp(p, SMB3_ENTRY_EANCHOR, SMB3_ENTRY_EANCHORLEN);
-		if (err == 0) {
-			ep_type = SMBIOS_ENTRY_POINT_30;
+		if (smb2 != NULL && smb3 != NULL)
 			break;
+
+		if (smb3 == NULL && strncmp(p, SMB3_ENTRY_EANCHOR,
+		    SMB3_ENTRY_EANCHORLEN) == 0) {
+			smb3 = p;
+		} else if (smb2 == NULL && strncmp(p, SMB_ENTRY_EANCHOR,
+		    SMB_ENTRY_EANCHORLEN) == 0) {
+			smb2 = p;
 		}
 
-		if (strncmp(p, SMB_ENTRY_EANCHOR, SMB_ENTRY_EANCHORLEN) == 0)
-			break;
 		p += SMB_SCAN_STEP;
 	}
 
-	if (p >= q) {
+	if (smb2 == NULL && smb3 == NULL) {
 		psm_unmap_phys(bios, bioslen);
 		return (smb_open_error(shp, errp, ESMB_NOTFOUND));
 	}
 
+	/*
+	 * While they're not supposed to (as per the SMBIOS 3.2 spec), some
+	 * vendors end up having a newer version in one of the two entry points
+	 * than the other. If we found multiple tables then we will prefer the
+	 * one with the newer version. If they're equivalent, we prefer the
+	 * 32-bit version. If only one is present, then we use that.
+	 */
 	ep = smb_alloc(SMB_ENTRY_MAXLEN);
+	if (smb2 != NULL && smb3 != NULL) {
+		uint8_t smb2maj, smb2min, smb3maj, smb3min;
+
+		bcopy(smb2, ep, sizeof (smbios_entry_t));
+		smb2maj = ep->ep21.smbe_major;
+		smb2min = ep->ep21.smbe_minor;
+		bcopy(smb3, ep, sizeof (smbios_entry_t));
+		smb3maj = ep->ep30.smbe_major;
+		smb3min = ep->ep30.smbe_minor;
+
+		if (smb3maj > smb2maj ||
+		    (smb3maj == smb2maj && smb3min > smb2min)) {
+			ep_type = SMBIOS_ENTRY_POINT_30;
+			p = smb3;
+		} else {
+			ep_type = SMBIOS_ENTRY_POINT_21;
+			p = smb2;
+		}
+	} else if (smb3 != NULL) {
+		ep_type = SMBIOS_ENTRY_POINT_30;
+		p = smb3;
+	} else if (smb2 != NULL) {
+		ep_type = SMBIOS_ENTRY_POINT_21;
+		p = smb2;
+	}
 	bcopy(p, ep, sizeof (smbios_entry_t));
 	if (ep_type == SMBIOS_ENTRY_POINT_21) {
 		ep->ep21.smbe_elen = MIN(ep->ep21.smbe_elen, SMB_ENTRY_MAXLEN);