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authorToomas Soome <tsoome@me.com>2019-01-20 22:13:06 +0200
committerToomas Soome <tsoome@me.com>2019-04-24 10:13:18 +0300
commit296f12dc4bd61fe5e3b1200d2cdf217ed82119a1 (patch)
tree9ac5a0221dbe7f325d798103159cdf3a456a0dfe
parent2002b186f847595188b1fb0b8dd800370aa6107c (diff)
downloadillumos-joyent-296f12dc4bd61fe5e3b1200d2cdf217ed82119a1.tar.gz
10792 pcie: NULL pointer errors
Reviewed by: Robert Mustacchi <rm@joyent.com> Reviewed by: Patrick Mooney <patrick.mooney@joyent.com> Approved by: Dan McDonald <danmcd@joyent.com>
-rw-r--r--usr/src/uts/common/io/pciex/hotplug/pcishpc.c10
-rw-r--r--usr/src/uts/common/io/pciex/pcie.c12
-rw-r--r--usr/src/uts/common/io/pciex/pcie_fault.c60
-rw-r--r--usr/src/uts/common/io/pciex/pciev.c10
-rw-r--r--usr/src/uts/common/sys/pciev.h2
5 files changed, 52 insertions, 42 deletions
diff --git a/usr/src/uts/common/io/pciex/hotplug/pcishpc.c b/usr/src/uts/common/io/pciex/hotplug/pcishpc.c
index 98aa69e140..22e7418096 100644
--- a/usr/src/uts/common/io/pciex/hotplug/pcishpc.c
+++ b/usr/src/uts/common/io/pciex/hotplug/pcishpc.c
@@ -367,10 +367,10 @@ pcishpc_slot_get_property(pcie_hp_slot_t *slot_p, ddi_hp_property_t *arg,
ddi_hp_property32_t request32, result32;
#endif
pcie_hp_ctrl_t *ctrl_p = slot_p->hs_ctrl;
- nvlist_t *prop_list;
+ nvlist_t *prop_list;
nvlist_t *prop_rlist; /* nvlist for return values */
- nvpair_t *prop_pair;
- char *name, *value;
+ nvpair_t *prop_pair;
+ char *name, *value;
int ret = DDI_SUCCESS;
int i, n;
boolean_t get_all_prop = B_FALSE;
@@ -1920,7 +1920,7 @@ pcishpc_set_slot_name(pcie_hp_ctrl_t *ctrl_p, int slot)
/*
* construct the slot_name:
- * if "slot-names" property exists then use that name
+ * if "slot-names" property exists then use that name
* else if valid slot number exists then it is "pci<slot-num>".
* else it will be "pci<sec-bus-number>dev<dev-number>"
*/
@@ -1968,7 +1968,7 @@ pcishpc_set_slot_name(pcie_hp_ctrl_t *ctrl_p, int slot)
* before ours.
*/
while (slots_before) {
- while (*s != NULL)
+ while (*s != '\0')
s++;
s++;
slots_before--;
diff --git a/usr/src/uts/common/io/pciex/pcie.c b/usr/src/uts/common/io/pciex/pcie.c
index 95eaa5837f..4ea5cd9778 100644
--- a/usr/src/uts/common/io/pciex/pcie.c
+++ b/usr/src/uts/common/io/pciex/pcie.c
@@ -932,7 +932,7 @@ void
pcie_rc_fini_bus(dev_info_t *dip)
{
pcie_bus_t *bus_p = PCIE_DIP2DOWNBUS(dip);
- ndi_set_bus_private(dip, B_FALSE, NULL, NULL);
+ ndi_set_bus_private(dip, B_FALSE, 0, NULL);
kmem_free(PCIE_BUS2DOM(bus_p), sizeof (pcie_domain_t));
kmem_free(bus_p, sizeof (pcie_bus_t));
}
@@ -1270,7 +1270,7 @@ pcie_fini_bus(dev_info_t *dip, uint8_t flags)
"hotplug-capable");
}
- ndi_set_bus_private(dip, B_TRUE, NULL, NULL);
+ ndi_set_bus_private(dip, B_TRUE, 0, NULL);
kmem_free(bus_p, sizeof (pcie_bus_t));
}
}
@@ -1798,7 +1798,7 @@ pcie_init_root_port_mps(dev_info_t *dip)
(void) pcie_get_fabric_mps(ddi_get_parent(dip),
ddi_get_child(dip), &max_supported);
- rp_cap = PCI_CAP_GET16(bus_p->bus_cfg_hdl, NULL,
+ rp_cap = PCI_CAP_GET16(bus_p->bus_cfg_hdl, 0,
bus_p->bus_pcie_off, PCIE_DEVCAP) &
PCIE_DEVCAP_MAX_PAYLOAD_MASK;
@@ -1991,7 +1991,7 @@ pcie_get_max_supported(dev_info_t *dip, void *arg)
goto fail3;
}
- max_supported = PCI_CAP_GET16(config_handle, NULL, cap_ptr,
+ max_supported = PCI_CAP_GET16(config_handle, 0, cap_ptr,
PCIE_DEVCAP) & PCIE_DEVCAP_MAX_PAYLOAD_MASK;
PCIE_DBG("PCIE MPS: %s: MPS Capabilities %x\n", ddi_driver_name(dip),
@@ -2039,7 +2039,7 @@ pcie_root_port(dev_info_t *dip)
continue;
}
- port_type = PCI_CAP_GET16(config_handle, NULL, cap_ptr,
+ port_type = PCI_CAP_GET16(config_handle, 0, cap_ptr,
PCIE_PCIECAP) & PCIE_PCIECAP_DEV_TYPE_MASK;
pci_config_teardown(&config_handle);
@@ -2349,7 +2349,7 @@ pcie_ari_get_next_function(dev_info_t *dip, int *func)
return (DDI_FAILURE);
}
- val = PCI_CAP_GET32(handle, NULL, cap_ptr, PCIE_ARI_CAP);
+ val = PCI_CAP_GET32(handle, 0, cap_ptr, PCIE_ARI_CAP);
next_function = (val >> PCIE_ARI_CAP_NEXT_FUNC_SHIFT) &
PCIE_ARI_CAP_NEXT_FUNC_MASK;
diff --git a/usr/src/uts/common/io/pciex/pcie_fault.c b/usr/src/uts/common/io/pciex/pcie_fault.c
index f4a2e9190e..a8c02caa9c 100644
--- a/usr/src/uts/common/io/pciex/pcie_fault.c
+++ b/usr/src/uts/common/io/pciex/pcie_fault.c
@@ -164,7 +164,8 @@ int pcie_disable_scan = 0; /* Disable fabric scan */
/* Inform interested parties that error handling is about to begin. */
/* ARGSUSED */
void
-pf_eh_enter(pcie_bus_t *bus_p) {
+pf_eh_enter(pcie_bus_t *bus_p)
+{
}
/* Inform interested parties that error handling has ended. */
@@ -304,7 +305,8 @@ done:
}
void
-pcie_force_fullscan() {
+pcie_force_fullscan(void)
+{
pcie_full_scan = B_TRUE;
}
@@ -1185,7 +1187,7 @@ const pf_fab_err_tbl_t pcie_pcie_tbl[] = {
{PCIE_AER_UCE_UR, pf_analyse_ca_ur,
PF_AFFECTED_SELF, 0},
- {NULL, NULL, NULL, NULL}
+ {0, NULL, 0, 0}
};
const pf_fab_err_tbl_t pcie_rp_tbl[] = {
@@ -1226,7 +1228,7 @@ const pf_fab_err_tbl_t pcie_rp_tbl[] = {
{PCIE_AER_UCE_UR, pf_no_panic,
PF_AFFECTED_AER, PF_AFFECTED_CHILDREN},
- {NULL, NULL, NULL, NULL}
+ {0, NULL, 0, 0}
};
const pf_fab_err_tbl_t pcie_sw_tbl[] = {
@@ -1267,7 +1269,7 @@ const pf_fab_err_tbl_t pcie_sw_tbl[] = {
{PCIE_AER_UCE_UR, pf_analyse_ca_ur,
PF_AFFECTED_AER, PF_AFFECTED_SELF | PF_AFFECTED_CHILDREN},
- {NULL, NULL, NULL, NULL}
+ {0, NULL, 0, 0}
};
const pf_fab_err_tbl_t pcie_pcie_bdg_tbl[] = {
@@ -1310,7 +1312,7 @@ const pf_fab_err_tbl_t pcie_pcie_bdg_tbl[] = {
{PCIE_AER_SUCE_INTERNAL_ERR, pf_panic,
PF_AFFECTED_SELF | PF_AFFECTED_CHILDREN, 0},
- {NULL, NULL, NULL, NULL}
+ {0, NULL, 0, 0}
};
const pf_fab_err_tbl_t pcie_pci_bdg_tbl[] = {
@@ -1332,7 +1334,7 @@ const pf_fab_err_tbl_t pcie_pci_bdg_tbl[] = {
{PCI_STAT_S_TARG_AB, pf_analyse_pci,
PF_AFFECTED_SELF, 0},
- {NULL, NULL, NULL, NULL}
+ {0, NULL, 0, 0}
};
const pf_fab_err_tbl_t pcie_pci_tbl[] = {
@@ -1354,7 +1356,7 @@ const pf_fab_err_tbl_t pcie_pci_tbl[] = {
{PCI_STAT_S_TARG_AB, pf_analyse_pci,
PF_AFFECTED_SELF, 0},
- {NULL, NULL, NULL, NULL}
+ {0, NULL, 0, 0}
};
#define PF_MASKED_AER_ERR(pfd_p) \
@@ -1470,7 +1472,7 @@ pf_analyse_error_tbl(ddi_fm_error_t *derr, pf_impl_t *impl,
uint16_t flags;
uint32_t bit;
- for (row = tbl; err_reg && (row->bit != NULL); row++) {
+ for (row = tbl; err_reg && (row->bit != 0); row++) {
bit = row->bit;
if (!(err_reg & bit))
continue;
@@ -2165,7 +2167,8 @@ pf_matched_in_rc(pf_data_t *dq_head_p, pf_data_t *pfd_p,
*/
static void
pf_pci_find_trans_type(pf_data_t *pfd_p, uint64_t *addr, uint32_t *trans_type,
- pcie_req_id_t *bdf) {
+ pcie_req_id_t *bdf)
+{
pf_data_t *rc_pfd_p;
/* Could be DMA or PIO. Find out by look at error type. */
@@ -2216,7 +2219,8 @@ pf_pci_find_trans_type(pf_data_t *pfd_p, uint64_t *addr, uint32_t *trans_type,
*/
/* ARGSUSED */
int
-pf_pci_decode(pf_data_t *pfd_p, uint16_t *cmd) {
+pf_pci_decode(pf_data_t *pfd_p, uint16_t *cmd)
+{
pcix_attr_t *attr;
uint64_t addr;
uint32_t trans_type;
@@ -2299,7 +2303,7 @@ pf_hdl_lookup(dev_info_t *dip, uint64_t ena, uint32_t flag, uint64_t addr,
ddi_fm_error_t derr;
/* If we don't know the addr or rid just return with NOTFOUND */
- if ((addr == NULL) && !PCIE_CHECK_VALID_BDF(bdf))
+ if ((addr == 0) && !PCIE_CHECK_VALID_BDF(bdf))
return (PF_HDL_NOTFOUND);
/*
@@ -2415,7 +2419,8 @@ done:
static int
pf_hdl_compare(dev_info_t *dip, ddi_fm_error_t *derr, uint32_t flag,
- uint64_t addr, pcie_req_id_t bdf, ndi_fmc_t *fcp) {
+ uint64_t addr, pcie_req_id_t bdf, ndi_fmc_t *fcp)
+{
ndi_fmcentry_t *fep;
int found = 0;
int status;
@@ -2430,17 +2435,21 @@ pf_hdl_compare(dev_info_t *dip, ddi_fm_error_t *derr, uint32_t flag,
* subsequent error handling, we block
* attempts to free the cache entry.
*/
- compare_func = (flag == ACC_HANDLE) ?
- i_ddi_fm_acc_err_cf_get((ddi_acc_handle_t)
- fep->fce_resource) :
- i_ddi_fm_dma_err_cf_get((ddi_dma_handle_t)
- fep->fce_resource);
+ if (flag == ACC_HANDLE) {
+ compare_func =
+ i_ddi_fm_acc_err_cf_get((ddi_acc_handle_t)
+ fep->fce_resource);
+ } else {
+ compare_func =
+ i_ddi_fm_dma_err_cf_get((ddi_dma_handle_t)
+ fep->fce_resource);
+ }
if (compare_func == NULL) /* unbound or not FLAGERR */
continue;
status = compare_func(dip, fep->fce_resource,
- (void *)&addr, (void *)&bdf);
+ (void *)&addr, (void *)&bdf);
if (status == DDI_FM_NONFATAL) {
found++;
@@ -2469,7 +2478,7 @@ pf_hdl_compare(dev_info_t *dip, ddi_fm_error_t *derr, uint32_t flag,
* If a handler isn't found and we know this is the right device mark
* them all failed.
*/
- if ((addr != NULL) && PCIE_CHECK_VALID_BDF(bdf) && (found == 0)) {
+ if ((addr != 0) && PCIE_CHECK_VALID_BDF(bdf) && (found == 0)) {
status = pf_hdl_compare(dip, derr, flag, addr, bdf, fcp);
if (status == PF_HDL_FOUND)
found++;
@@ -2490,7 +2499,7 @@ pf_hdl_compare(dev_info_t *dip, ddi_fm_error_t *derr, uint32_t flag,
/* ARGSUSED */
static int
pf_log_hdl_lookup(dev_info_t *rpdip, ddi_fm_error_t *derr, pf_data_t *pfd_p,
- boolean_t is_primary)
+ boolean_t is_primary)
{
/*
* Disabling this function temporarily until errors can be handled
@@ -2537,7 +2546,8 @@ pf_log_hdl_lookup(dev_info_t *rpdip, ddi_fm_error_t *derr, pf_data_t *pfd_p,
* accessed via the bus_p.
*/
int
-pf_tlp_decode(pcie_bus_t *bus_p, pf_pcie_adv_err_regs_t *adv_reg_p) {
+pf_tlp_decode(pcie_bus_t *bus_p, pf_pcie_adv_err_regs_t *adv_reg_p)
+{
pcie_tlp_hdr_t *tlp_hdr = (pcie_tlp_hdr_t *)adv_reg_p->pcie_ue_hdr;
pcie_req_id_t my_bdf, tlp_bdf, flt_bdf = PCIE_INVALID_BDF;
uint64_t flt_addr = 0;
@@ -2572,7 +2582,7 @@ pf_tlp_decode(pcie_bus_t *bus_p, pf_pcie_adv_err_regs_t *adv_reg_p) {
flt_bdf = tlp_bdf;
} else if (PCIE_IS_ROOT(bus_p) &&
(PF_FIRST_AER_ERR(PCIE_AER_UCE_PTLP, adv_reg_p) ||
- (PF_FIRST_AER_ERR(PCIE_AER_UCE_CA, adv_reg_p)))) {
+ (PF_FIRST_AER_ERR(PCIE_AER_UCE_CA, adv_reg_p)))) {
flt_trans_type = PF_ADDR_DMA;
flt_bdf = tlp_bdf;
} else {
@@ -2591,7 +2601,7 @@ pf_tlp_decode(pcie_bus_t *bus_p, pf_pcie_adv_err_regs_t *adv_reg_p) {
{
pcie_cpl_t *cpl_tlp = (pcie_cpl_t *)&adv_reg_p->pcie_ue_hdr[1];
- flt_addr = NULL;
+ flt_addr = 0;
flt_bdf = (cpl_tlp->rid > cpl_tlp->cid) ? cpl_tlp->rid :
cpl_tlp->cid;
@@ -3220,7 +3230,7 @@ pf_find_busp_by_saer(pf_impl_t *impl, pf_data_t *pfd_p)
addr = reg_p->pcie_sue_tgt_addr;
bdf = reg_p->pcie_sue_tgt_bdf;
- if (addr != NULL) {
+ if (addr != 0) {
temp_bus_p = pf_find_busp_by_addr(impl, addr);
} else if (PCIE_CHECK_VALID_BDF(bdf)) {
temp_bus_p = pf_find_busp_by_bdf(impl, bdf);
diff --git a/usr/src/uts/common/io/pciex/pciev.c b/usr/src/uts/common/io/pciex/pciev.c
index b442aae5b5..18794318dd 100644
--- a/usr/src/uts/common/io/pciex/pciev.c
+++ b/usr/src/uts/common/io/pciex/pciev.c
@@ -124,8 +124,8 @@ pcie_bdf_list_remove(pcie_req_id_t bdf, pcie_req_id_list_t **rlist_p)
void
pcie_cache_domain_info(pcie_bus_t *bus_p)
{
- boolean_t assigned = PCIE_IS_ASSIGNED(bus_p);
- boolean_t fma_dom = PCIE_ASSIGNED_TO_FMA_DOM(bus_p);
+ boolean_t assigned = PCIE_IS_ASSIGNED(bus_p);
+ boolean_t fma_dom = PCIE_ASSIGNED_TO_FMA_DOM(bus_p);
uint_t domain_id = PCIE_DOMAIN_ID_GET(bus_p);
pcie_req_id_t bdf = bus_p->bus_bdf;
dev_info_t *pdip;
@@ -163,8 +163,8 @@ pcie_cache_domain_info(pcie_bus_t *bus_p)
void
pcie_uncache_domain_info(pcie_bus_t *bus_p)
{
- boolean_t assigned = PCIE_IS_ASSIGNED(bus_p);
- boolean_t fma_dom = PCIE_ASSIGNED_TO_FMA_DOM(bus_p);
+ boolean_t assigned = PCIE_IS_ASSIGNED(bus_p);
+ boolean_t fma_dom = PCIE_ASSIGNED_TO_FMA_DOM(bus_p);
uint_t domain_id = PCIE_DOMAIN_ID_GET(bus_p);
pcie_domain_t *dom_p = PCIE_BUS2DOM(bus_p), *pdom_p;
pcie_bus_t *pbus_p;
@@ -176,7 +176,7 @@ pcie_uncache_domain_info(pcie_bus_t *bus_p)
/* Clear the domain information */
if (domain_id) {
- PCIE_DOMAIN_ID_SET(bus_p, NULL);
+ PCIE_DOMAIN_ID_SET(bus_p, 0);
PCIE_DOMAIN_ID_DECR_REF_COUNT(bus_p);
}
diff --git a/usr/src/uts/common/sys/pciev.h b/usr/src/uts/common/sys/pciev.h
index 89b6b1dfa7..256a68a7b4 100644
--- a/usr/src/uts/common/sys/pciev.h
+++ b/usr/src/uts/common/sys/pciev.h
@@ -154,7 +154,7 @@ extern void pcie_fini_dom(dev_info_t *);
/* Following macros are only valid for leaf devices */
#define PCIE_DOMAIN_ID_GET(bus_p) \
((uint_t)(PCIE_IS_ASSIGNED(bus_p) \
- ? PCIE_BUS2DOM(bus_p)->domain.id.domain_id : NULL))
+ ? PCIE_BUS2DOM(bus_p)->domain.id.domain_id : 0))
#define PCIE_DOMAIN_ID_SET(bus_p, new_id) \
if (!PCIE_IS_BDG(bus_p)) \
PCIE_BUS2DOM(bus_p)->domain.id.domain_id = (uint_t)(new_id)