diff options
| author | Richard Lowe <richlowe@richlowe.net> | 2021-05-29 22:23:43 -0500 |
|---|---|---|
| committer | Richard Lowe <richlowe@richlowe.net> | 2021-08-16 12:45:35 -0500 |
| commit | 86ef0a63e1cfa5dc98606efef379365acca98063 (patch) | |
| tree | 4b4e8af476fdbdceb532d0538104c2ea231e83b8 | |
| parent | 755ccbcfa27de6aa07ebf138548b68dc6a9ae02d (diff) | |
| download | illumos-joyent-86ef0a63e1cfa5dc98606efef379365acca98063.tar.gz | |
13939 it's time the 32bit intel kernel was (x)86'd
Reviewed by: Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org>
Reviewed by: Patrick Mooney <pmooney@pfmooney.com>
Approved by: Garret D'Amore <garrett@damore.org>
136 files changed, 984 insertions, 4551 deletions
diff --git a/usr/src/cmd/mdb/intel/amd64/Makefile.libstand b/usr/src/cmd/mdb/intel/amd64/Makefile.libstand deleted file mode 100644 index a579d981ae..0000000000 --- a/usr/src/cmd/mdb/intel/amd64/Makefile.libstand +++ /dev/null @@ -1,28 +0,0 @@ -# -# CDDL HEADER START -# -# The contents of this file are subject to the terms of the -# Common Development and Distribution License, Version 1.0 only -# (the "License"). You may not use this file except in compliance -# with the License. -# -# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE -# or http://www.opensolaris.org/os/licensing. -# See the License for the specific language governing permissions -# and limitations under the License. -# -# When distributing Covered Code, include this CDDL HEADER in each -# file and include the License file at usr/src/OPENSOLARIS.LICENSE. -# If applicable, add the following below this CDDL HEADER, with the -# fields enclosed by brackets "[]" replaced with your own identifying -# information: Portions Copyright [yyyy] [name of copyright owner] -# -# CDDL HEADER END -# -# -# Copyright 2004 Sun Microsystems, Inc. All rights reserved. -# Use is subject to license terms. -# -# ident "%Z%%M% %I% %E% SMI" -# - diff --git a/usr/src/cmd/mdb/intel/ia32/Makefile.kmdb b/usr/src/cmd/mdb/intel/ia32/Makefile.kmdb deleted file mode 100644 index 03ea80eb9e..0000000000 --- a/usr/src/cmd/mdb/intel/ia32/Makefile.kmdb +++ /dev/null @@ -1,35 +0,0 @@ -# -# CDDL HEADER START -# -# The contents of this file are subject to the terms of the -# Common Development and Distribution License (the "License"). -# You may not use this file except in compliance with the License. -# -# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE -# or http://www.opensolaris.org/os/licensing. -# See the License for the specific language governing permissions -# and limitations under the License. -# -# When distributing Covered Code, include this CDDL HEADER in each -# file and include the License file at usr/src/OPENSOLARIS.LICENSE. -# If applicable, add the following below this CDDL HEADER, with the -# fields enclosed by brackets "[]" replaced with your own identifying -# information: Portions Copyright [yyyy] [name of copyright owner] -# -# CDDL HEADER END -# -# -# Copyright 2007 Sun Microsystems, Inc. All rights reserved. -# Use is subject to license terms. -# -# Copyright 2018 Joyent, Inc. - -KMDBML += \ - kaif_invoke.s \ - kmdb_start.s - -KMDBSRCS += \ - mdb_ia32util.c \ - kmdb_makecontext.c - -SACPPFLAGS = -D__$(MACH) diff --git a/usr/src/cmd/mdb/intel/ia32/krtld/Makefile b/usr/src/cmd/mdb/intel/ia32/krtld/Makefile deleted file mode 100644 index cff868799d..0000000000 --- a/usr/src/cmd/mdb/intel/ia32/krtld/Makefile +++ /dev/null @@ -1,35 +0,0 @@ -# -# CDDL HEADER START -# -# The contents of this file are subject to the terms of the -# Common Development and Distribution License, Version 1.0 only -# (the "License"). You may not use this file except in compliance -# with the License. -# -# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE -# or http://www.opensolaris.org/os/licensing. -# See the License for the specific language governing permissions -# and limitations under the License. -# -# When distributing Covered Code, include this CDDL HEADER in each -# file and include the License file at usr/src/OPENSOLARIS.LICENSE. -# If applicable, add the following below this CDDL HEADER, with the -# fields enclosed by brackets "[]" replaced with your own identifying -# information: Portions Copyright [yyyy] [name of copyright owner] -# -# CDDL HEADER END -# -# -# Copyright (c) 1998-1999 by Sun Microsystems, Inc. -# All rights reserved. -# -#ident "%Z%%M% %I% %E% SMI" - -MODULE = krtld.so -MDBTGT = kvm - -MODSRCS = krtld.c - -include ../../../../Makefile.cmd -include ../../Makefile.ia32 -include ../../../Makefile.module diff --git a/usr/src/cmd/mdb/intel/ia32/nca/Makefile b/usr/src/cmd/mdb/intel/ia32/nca/Makefile deleted file mode 100644 index 75a8816422..0000000000 --- a/usr/src/cmd/mdb/intel/ia32/nca/Makefile +++ /dev/null @@ -1,35 +0,0 @@ -# -# CDDL HEADER START -# -# The contents of this file are subject to the terms of the -# Common Development and Distribution License, Version 1.0 only -# (the "License"). You may not use this file except in compliance -# with the License. -# -# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE -# or http://www.opensolaris.org/os/licensing. -# See the License for the specific language governing permissions -# and limitations under the License. -# -# When distributing Covered Code, include this CDDL HEADER in each -# file and include the License file at usr/src/OPENSOLARIS.LICENSE. -# If applicable, add the following below this CDDL HEADER, with the -# fields enclosed by brackets "[]" replaced with your own identifying -# information: Portions Copyright [yyyy] [name of copyright owner] -# -# CDDL HEADER END -# -# -# Copyright (c) 2000 by Sun Microsystems, Inc. -# All rights reserved. -# -#ident "%Z%%M% %I% %E% SMI" - -MODULE = nca.so -MDBTGT = kvm - -MODSRCS = nca.c - -include ../../../../Makefile.cmd -include ../../Makefile.ia32 -include ../../../Makefile.module diff --git a/usr/src/uts/common/conf/param.c b/usr/src/uts/common/conf/param.c index 045a3872fc..657645e090 100644 --- a/usr/src/uts/common/conf/param.c +++ b/usr/src/uts/common/conf/param.c @@ -537,12 +537,6 @@ char architecture[] = "sparcv9"; char architecture_32[] = "sparc"; char hw_provider[] = "Oracle Corporation"; -#elif defined(__i386) - -char architecture[] = "i386"; -char architecture_32[] = "i386"; -char hw_provider[SYS_NMLN] = ""; - #elif defined(__amd64) char architecture[] = "amd64"; diff --git a/usr/src/uts/common/crypto/io/dca.c b/usr/src/uts/common/crypto/io/dca.c index 015112ade4..65e967d313 100644 --- a/usr/src/uts/common/crypto/io/dca.c +++ b/usr/src/uts/common/crypto/io/dca.c @@ -463,13 +463,11 @@ static struct ddi_device_acc_attr dca_devattr = { DDI_STRICTORDER_ACC }; -#if !defined(i386) && !defined(__i386) static struct ddi_device_acc_attr dca_bufattr = { DDI_DEVICE_ATTR_V0, DDI_NEVERSWAP_ACC, DDI_STRICTORDER_ACC }; -#endif static struct ddi_dma_attr dca_dmaattr = { DMA_ATTR_V0, /* dma_attr_version */ @@ -481,7 +479,7 @@ static struct ddi_dma_attr dca_dmaattr = { 0x1, /* dma_attr_minxfer */ 0x00ffffffUL, /* dma_attr_maxxfer */ 0xffffffffUL, /* dma_attr_seg */ -#if defined(i386) || defined(__i386) || defined(__amd64) +#if defined(__x86) 512, /* dma_attr_sgllen */ #else 1, /* dma_attr_sgllen */ @@ -1667,24 +1665,6 @@ dca_newreq(dca_t *dca) * for driver hardening, allocate in whole pages. */ size = ROUNDUP(MAXPACKET, dca->dca_pagesize); -#if defined(i386) || defined(__i386) - /* - * Use kmem_alloc instead of ddi_dma_mem_alloc here since the latter - * may fail on x86 platform if a physically contiguous memory chunk - * cannot be found. From initial testing, we did not see performance - * degradation as seen on Sparc. - */ - if ((reqp->dr_ibuf_kaddr = kmem_alloc(size, KM_SLEEP)) == NULL) { - dca_error(dca, "unable to alloc request ibuf memory"); - dca_destroyreq(reqp); - return (NULL); - } - if ((reqp->dr_obuf_kaddr = kmem_alloc(size, KM_SLEEP)) == NULL) { - dca_error(dca, "unable to alloc request obuf memory"); - dca_destroyreq(reqp); - return (NULL); - } -#else /* * We could kmem_alloc for Sparc too. However, it gives worse * performance when transferring more than one page data. For example, @@ -1711,7 +1691,6 @@ dca_newreq(dca_t *dca) dca_destroyreq(reqp); return (NULL); } -#endif /* Skip the used portion in the context page */ reqp->dr_offset = CTX_MAXLENGTH; @@ -1745,10 +1724,6 @@ dca_newreq(dca_t *dca) void dca_destroyreq(dca_request_t *reqp) { -#if defined(i386) || defined(__i386) - dca_t *dca = reqp->dr_dca; - size_t size = ROUNDUP(MAXPACKET, dca->dca_pagesize); -#endif /* * Clean up DMA for the context structure. @@ -1768,19 +1743,6 @@ dca_destroyreq(dca_request_t *reqp) /* * Clean up DMA for the scratch buffer. */ -#if defined(i386) || defined(__i386) - if (reqp->dr_ibuf_dmah) { - (void) ddi_dma_unbind_handle(reqp->dr_ibuf_dmah); - ddi_dma_free_handle(&reqp->dr_ibuf_dmah); - } - if (reqp->dr_obuf_dmah) { - (void) ddi_dma_unbind_handle(reqp->dr_obuf_dmah); - ddi_dma_free_handle(&reqp->dr_obuf_dmah); - } - - kmem_free(reqp->dr_ibuf_kaddr, size); - kmem_free(reqp->dr_obuf_kaddr, size); -#else if (reqp->dr_ibuf_paddr) { (void) ddi_dma_unbind_handle(reqp->dr_ibuf_dmah); } @@ -1801,7 +1763,6 @@ dca_destroyreq(dca_request_t *reqp) if (reqp->dr_obuf_dmah) { ddi_dma_free_handle(&reqp->dr_obuf_dmah); } -#endif /* * These two DMA handles should have been unbinded in * dca_unbindchains() function diff --git a/usr/src/uts/common/crypto/io/dca_3des.c b/usr/src/uts/common/crypto/io/dca_3des.c index 1d2cf0b90f..01c1ee4bb0 100644 --- a/usr/src/uts/common/crypto/io/dca_3des.c +++ b/usr/src/uts/common/crypto/io/dca_3des.c @@ -38,7 +38,7 @@ #include <sys/crypto/spi.h> #include <sys/crypto/dca.h> -#if defined(__i386) || defined(__amd64) +#if defined(__x86) #include <sys/byteorder.h> #define UNALIGNED_POINTERS_PERMITTED #endif diff --git a/usr/src/uts/common/disp/thread.c b/usr/src/uts/common/disp/thread.c index 6ffb8bc2e9..dd0d4b9533 100644 --- a/usr/src/uts/common/disp/thread.c +++ b/usr/src/uts/common/disp/thread.c @@ -182,7 +182,7 @@ thread_init(void) mutex_init(lp, NULL, MUTEX_DEFAULT, NULL); } -#if defined(__i386) || defined(__amd64) +#if defined(__x86) thread_cache = kmem_cache_create("thread_cache", sizeof (kthread_t), PTR24_ALIGN, NULL, NULL, NULL, NULL, NULL, 0); @@ -1528,7 +1528,7 @@ thread_create_intr(struct cpu *cp) tp->t_bind_cpu = PBIND_NONE; /* no USER-requested binding */ tp->t_bind_pset = PS_NONE; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) tp->t_stk -= STACK_ALIGN; *(tp->t_stk) = 0; /* terminate intr thread stack */ #endif @@ -2128,7 +2128,7 @@ stkinfo_end(kthread_t *t) /* search until no pattern in the stack */ if (t->t_stk > t->t_stkbase) { /* stack grows down */ -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /* * 6 longs are pushed on stack, see thread_load(). Skip * them, so if kthread has never run, percent is zero. diff --git a/usr/src/uts/common/disp/thread_intr.c b/usr/src/uts/common/disp/thread_intr.c index 67ccc6922f..2bd8867111 100644 --- a/usr/src/uts/common/disp/thread_intr.c +++ b/usr/src/uts/common/disp/thread_intr.c @@ -24,18 +24,6 @@ * Use is subject to license terms. */ -/* - * FILE NOTICE BEGIN - * - * This file should not be modified. If you wish to modify it or have it - * modified, please contact Sun Microsystems at <LFI149367@-sun-.-com-> - * (without anti-spam dashes) - * - * FILE NOTICE END - */ - -#pragma ident "%Z%%M% %I% %E% SMI" - #include <sys/cpuvar.h> #include <sys/stack.h> #include <vm/seg_kp.h> @@ -84,7 +72,7 @@ thread_create_intr(cpu_t *cp) tp->t_bind_cpu = PBIND_NONE; /* no USER-requested binding */ tp->t_bind_pset = PS_NONE; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) tp->t_stk -= STACK_ALIGN; *(tp->t_stk) = 0; /* terminate intr thread stack */ #endif @@ -110,6 +98,6 @@ cpu_intr_alloc(cpu_t *cp, int n) thread_create_intr(cp); cp->cpu_intr_stack = (caddr_t)segkp_get(segkp, INTR_STACK_SIZE, - KPD_HASREDZONE | KPD_NO_ANON | KPD_LOCKED) + - INTR_STACK_SIZE - SA(MINFRAME); + KPD_HASREDZONE | KPD_NO_ANON | KPD_LOCKED) + + INTR_STACK_SIZE - SA(MINFRAME); } diff --git a/usr/src/uts/common/exec/elf/elf.c b/usr/src/uts/common/exec/elf/elf.c index 84b6aac489..c3f2720d05 100644 --- a/usr/src/uts/common/exec/elf/elf.c +++ b/usr/src/uts/common/exec/elf/elf.c @@ -375,7 +375,7 @@ elfexec(vnode_t *vp, execa_t *uap, uarg_t *args, intpdata_t *idatap, } else { args->to_model = DATAMODEL_LP64; args->stk_prot &= ~PROT_EXEC; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) args->dat_prot &= ~PROT_EXEC; #endif *execsz = btopr(SINCR) + btopr(SSIZE) + btopr(NCARGS64-1); @@ -1998,7 +1998,7 @@ top: #if defined(__sparc) ehdr->e_ident[EI_DATA] = ELFDATA2MSB; ehdr->e_machine = EM_SPARC; -#elif defined(__i386) || defined(__i386_COMPAT) +#elif defined(__i386_COMPAT) ehdr->e_ident[EI_DATA] = ELFDATA2LSB; ehdr->e_machine = EM_386; #else diff --git a/usr/src/uts/common/exec/elf/elf_notes.c b/usr/src/uts/common/exec/elf/elf_notes.c index 1b6ba38dad..62c3025b65 100644 --- a/usr/src/uts/common/exec/elf/elf_notes.c +++ b/usr/src/uts/common/exec/elf/elf_notes.c @@ -66,7 +66,7 @@ #include <sys/machelf.h> #include <sys/sunddi.h> #include "elf_impl.h" -#if defined(__i386) || defined(__i386_COMPAT) +#if defined(__i386_COMPAT) #include <sys/sysi86.h> #endif @@ -129,13 +129,13 @@ setup_note_header(Phdr *v, proc_t *p) kmem_free(pcrp, size); -#if defined(__i386) || defined(__i386_COMPAT) +#if defined(__i386_COMPAT) mutex_enter(&p->p_ldtlock); size = prnldt(p) * sizeof (struct ssd); mutex_exit(&p->p_ldtlock); if (size != 0) v[0].p_filesz += sizeof (Note) + roundup(size, sizeof (Word)); -#endif /* __i386 || __i386_COMPAT */ +#endif /* __i386_COMPAT */ if ((size = prhasx(p)? prgetprxregsize(p) : 0) != 0) v[0].p_filesz += nlwp * sizeof (Note) @@ -218,10 +218,10 @@ write_elfnotes(proc_t *p, int sig, vnode_t *vp, offset_t offset, int fd; vnode_t *vroot; -#if defined(__i386) || defined(__i386_COMPAT) +#if defined(__i386_COMPAT) struct ssd *ssd; size_t ssdsize; -#endif /* __i386 || __i386_COMPAT */ +#endif /* __i386_COMPAT */ bigsize = MAX(bigsize, priv_get_implinfo_size()); @@ -447,7 +447,7 @@ write_elfnotes(proc_t *p, int sig, vnode_t *vp, offset_t offset, VN_RELE(vroot); -#if defined(__i386) || defined(__i386_COMPAT) +#if defined(__i386_COMPAT) mutex_enter(&p->p_ldtlock); ssdsize = prnldt(p) * sizeof (struct ssd); if (ssdsize != 0) { @@ -460,7 +460,7 @@ write_elfnotes(proc_t *p, int sig, vnode_t *vp, offset_t offset, mutex_exit(&p->p_ldtlock); if (error) goto done; -#endif /* __i386 || defined(__i386_COMPAT) */ +#endif /* defined(__i386_COMPAT) */ nlwp = p->p_lwpcnt; nzomb = p->p_zombcnt; diff --git a/usr/src/uts/common/exec/java/java.c b/usr/src/uts/common/exec/java/java.c index fdc327dcbb..224a87599e 100644 --- a/usr/src/uts/common/exec/java/java.c +++ b/usr/src/uts/common/exec/java/java.c @@ -55,7 +55,7 @@ */ #if defined(__sparc) char *jexec = "/usr/java/jre/lib/sparc/jexec"; -#elif defined(__i386) || defined(__i386_COMPAT) +#elif defined(__x86) char *jexec = "/usr/java/jre/lib/i386/jexec"; #else #error "Unknown ISA" diff --git a/usr/src/uts/common/exec/shbin/shbin.c b/usr/src/uts/common/exec/shbin/shbin.c index ee5060a07e..f9245460d7 100644 --- a/usr/src/uts/common/exec/shbin/shbin.c +++ b/usr/src/uts/common/exec/shbin/shbin.c @@ -79,11 +79,9 @@ static char *shell_list[] = #if defined(__sparc) "/usr/bin/sparcv9/ksh93", "/usr/bin/sparcv7/ksh93", -#elif defined(__amd64) +#elif defined(__x86) "/usr/bin/amd64/ksh93", "/usr/bin/i86/ksh93", -#elif defined(__i386) - "/usr/bin/i86/ksh93", #else #error "Unrecognized platform/CPU (use /usr/bin/ksh93 when in doubt)." #endif diff --git a/usr/src/uts/common/fs/proc/prioctl.c b/usr/src/uts/common/fs/proc/prioctl.c index 630ab0b2e3..89b68f04d5 100644 --- a/usr/src/uts/common/fs/proc/prioctl.c +++ b/usr/src/uts/common/fs/proc/prioctl.c @@ -71,7 +71,7 @@ #include <sys/ctfs_impl.h> #include <sys/ctfs.h> -#if defined(__i386) || defined(__i386_COMPAT) +#if defined(__i386_COMPAT) #include <sys/sysi86.h> #endif @@ -133,6 +133,7 @@ prctioctl(prnode_t *pnp, int cmd, intptr_t arg, int flag, cred_t *cr) /* * Control operations (lots). */ +/* BEGIN CSTYLED */ /*ARGSUSED*/ #ifdef _SYSCALL32_IMPL static int @@ -144,6 +145,7 @@ prioctl(struct vnode *vp, int cmd, intptr_t arg, int flag, cred_t *cr, int *rvalp, caller_context_t *ct) #endif /* _SYSCALL32_IMPL */ { +/* END CSTYLED */ int nsig = PROC_IS_BRANDED(curproc)? BROP(curproc)->b_nsig : NSIG; caddr_t cmaddr = (caddr_t)arg; proc_t *p; @@ -275,11 +277,11 @@ prioctl(struct vnode *vp, int cmd, intptr_t arg, int flag, cred_t *cr, case PIOCAUXV: break; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) case PIOCNLDT: case PIOCLDT: break; -#endif /* __i386 || __amd64 */ +#endif /* __x86 */ #if defined(__sparc) case PIOCGWIN: @@ -1235,7 +1237,7 @@ startover: break; } -#if defined(__i386) || defined(__amd64) +#if defined(__x86) case PIOCNLDT: /* get number of LDT entries */ { int n; @@ -1290,7 +1292,7 @@ startover: kmem_free(ssd, (n+1) * sizeof (*ssd)); break; } -#endif /* __i386 || __amd64 */ +#endif /* __x86 */ #if defined(__sparc) case PIOCGWIN: /* get gwindows_t (see sys/reg.h) */ @@ -1830,11 +1832,11 @@ prioctl32(struct vnode *vp, int cmd, intptr_t arg, int flag, cred_t *cr, case PIOCAUXV: break; -#if defined(__i386) || defined(__i386_COMPAT) +#if defined(__i386_COMPAT) case PIOCNLDT: case PIOCLDT: break; -#endif /* __i386 || __i386_COMPAT */ +#endif /* __i386_COMPAT */ #if defined(__sparc) case PIOCGWIN: @@ -2867,7 +2869,7 @@ startover: break; } -#if defined(__i386) || defined(__i386_COMPAT) +#if defined(__i386_COMPAT) case PIOCNLDT: /* get number of LDT entries */ { int n; @@ -2922,7 +2924,7 @@ startover: kmem_free(ssd, (n+1) * sizeof (*ssd)); break; } -#endif /* __i386 || __i386_COMPAT */ +#endif /* __i386_COMPAT */ #if defined(__sparc) case PIOCGWIN: /* get gwindows_t (see sys/reg.h) */ diff --git a/usr/src/uts/common/fs/zfs/arc.c b/usr/src/uts/common/fs/zfs/arc.c index 388deebf59..24b578c208 100644 --- a/usr/src/uts/common/fs/zfs/arc.c +++ b/usr/src/uts/common/fs/zfs/arc.c @@ -4621,25 +4621,6 @@ arc_available_memory(void) r = FMR_PAGES_PP_MAXIMUM; } -#if defined(__i386) - /* - * If we're on an i386 platform, it's possible that we'll exhaust the - * kernel heap space before we ever run out of available physical - * memory. Most checks of the size of the heap_area compare against - * tune.t_minarmem, which is the minimum available real memory that we - * can have in the system. However, this is generally fixed at 25 pages - * which is so low that it's useless. In this comparison, we seek to - * calculate the total heap-size, and reclaim if more than 3/4ths of the - * heap is allocated. (Or, in the calculation, if less than 1/4th is - * free) - */ - n = (int64_t)vmem_size(heap_arena, VMEM_FREE) - - (vmem_size(heap_arena, VMEM_FREE | VMEM_ALLOC) >> 2); - if (n < lowest) { - lowest = n; - r = FMR_HEAP_ARENA; - } -#endif /* * If zio data pages are being allocated out of a separate heap segment, @@ -4702,12 +4683,6 @@ arc_kmem_reap_soon(void) */ dnlc_reduce_cache((void *)(uintptr_t)arc_reduce_dnlc_percent); } -#if defined(__i386) - /* - * Reclaim unused memory from all kmem caches. - */ - kmem_reap(); -#endif #endif for (i = 0; i < SPA_MAXBLOCKSIZE >> SPA_MINBLOCKSHIFT; i++) { @@ -6796,10 +6771,6 @@ arc_memory_throttle(spa_t *spa, uint64_t reserve, uint64_t txg) #ifdef _KERNEL uint64_t available_memory = ptob(freemem); -#if defined(__i386) - available_memory = - MIN(available_memory, vmem_size(heap_arena, VMEM_FREE)); -#endif if (freemem > physmem * arc_lotsfree_percent / 100) return (0); diff --git a/usr/src/uts/common/inet/ip/ip.c b/usr/src/uts/common/inet/ip/ip.c index b073fe0895..4a771a8256 100644 --- a/usr/src/uts/common/inet/ip/ip.c +++ b/usr/src/uts/common/inet/ip/ip.c @@ -5792,7 +5792,7 @@ ip_net_mask(ipaddr_t addr) ipaddr_t mask = 0; uchar_t *maskp = (uchar_t *)&mask; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) #define TOTALLY_BRAIN_DAMAGED_C_COMPILER #endif #ifdef TOTALLY_BRAIN_DAMAGED_C_COMPILER diff --git a/usr/src/uts/common/io/1394/adapters/hci1394_buf.c b/usr/src/uts/common/io/1394/adapters/hci1394_buf.c index 3b9e3465f7..40db81791f 100644 --- a/usr/src/uts/common/io/1394/adapters/hci1394_buf.c +++ b/usr/src/uts/common/io/1394/adapters/hci1394_buf.c @@ -24,8 +24,6 @@ * Use is subject to license terms. */ -#pragma ident "%Z%%M% %I% %E% SMI" - /* * hci1394_buf.c * These routines handle IO mapped memory. They include routines to alloc and @@ -65,7 +63,7 @@ hci1394_buf_attr_get(ddi_dma_attr_t *dma_attr) dma_attr->dma_attr_granular = 4; dma_attr->dma_attr_flags = 0; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /* XXX - Not sure why x86 wants the dma_attr_seg to be 0x7FFF?? */ dma_attr->dma_attr_seg = (uint64_t)0x7FFF; #endif diff --git a/usr/src/uts/common/io/busra.c b/usr/src/uts/common/io/busra.c index ada50d3fff..e589807aad 100644 --- a/usr/src/uts/common/io/busra.c +++ b/usr/src/uts/common/io/busra.c @@ -77,7 +77,7 @@ kmutex_t ra_lock; struct ra_resource { struct ra_resource *ra_next; uint64_t ra_base; - uint64_t ra_len; + uint64_t ra_len; }; /* @@ -193,7 +193,6 @@ _fini() int _info(struct modinfo *modinfop) - { return (mod_info(&modlinkage, modinfop)); } @@ -246,7 +245,7 @@ ndi_ra_map_destroy(dev_info_t *dip, char *type) { struct ra_dip_type *dipmap; struct ra_dip_type **backdip; - struct ra_type_map **backtype, *typemap; + struct ra_type_map **backtype, *typemap; struct ra_resource *range; mutex_enter(&ra_lock); @@ -489,7 +488,7 @@ isnot_pow2(uint64_t value) static void adjust_link(struct ra_resource **backp, struct ra_resource *mapp, - uint64_t base, uint64_t len) + uint64_t base, uint64_t len) { struct ra_resource *newmap; uint64_t newlen; @@ -843,7 +842,7 @@ isa_resource_setup() /* initialize the interrupt space */ (void) ndi_ra_free(usedpdip, 0, 16, NDI_RA_TYPE_INTR, 0); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) bzero(&req, sizeof (req)); req.ra_addr = 2; /* 2 == 9 so never allow */ req.ra_len = 1; diff --git a/usr/src/uts/common/io/cardbus/cardbus.c b/usr/src/uts/common/io/cardbus/cardbus.c index ae82907c87..643549b5dc 100644 --- a/usr/src/uts/common/io/cardbus/cardbus.c +++ b/usr/src/uts/common/io/cardbus/cardbus.c @@ -58,7 +58,7 @@ #ifdef sparc #include <sys/ddi_subrdefs.h> -#elif defined(__x86) || defined(__amd64) +#elif defined(__x86) #include <sys/pci_intr_lib.h> #include <sys/mach_intr.h> #endif @@ -1092,7 +1092,7 @@ cardbus_init_child_regs(dev_info_t *child) { ddi_acc_handle_t config_handle; uint16_t command_preserve, command; -#if !defined(__i386) && !defined(__amd64) +#if !defined(__x86) uint8_t bcr; #endif uint8_t header_type; @@ -1139,7 +1139,7 @@ cardbus_init_child_regs(dev_info_t *child) pci_config_put16(config_handle, PCI_CONF_COMM, command); command = pci_config_get16(config_handle, PCI_CONF_COMM); -#if !defined(__i386) && !defined(__amd64) +#if !defined(__x86) /* * If the device has a bus control register then program it * based on the settings in the command register. @@ -1265,7 +1265,7 @@ cardbus_initchild(dev_info_t *rdip, dev_info_t *dip, dev_info_t *child, kmem_zalloc(sizeof (struct cardbus_parent_private_data), KM_SLEEP); -#elif defined(__x86) || defined(__amd64) +#elif defined(__x86) ppd = (struct cardbus_parent_private_data *) kmem_zalloc(sizeof (struct cardbus_parent_private_data) + sizeof (struct intrspec), KM_SLEEP); @@ -1369,7 +1369,7 @@ cardbus_removechild(dev_info_t *dip) ppd->ppd.par_nreg * sizeof (struct regspec)); #ifdef sparc kmem_free(ppd, sizeof (struct cardbus_parent_private_data)); -#elif defined(__x86) || defined(__amd64) +#elif defined(__x86) kmem_free(ppd, sizeof (struct cardbus_parent_private_data) + sizeof (struct intrspec)); #endif diff --git a/usr/src/uts/common/io/cardbus/cardbus_cfg.c b/usr/src/uts/common/io/cardbus/cardbus_cfg.c index c380a96c0e..e9027091e3 100644 --- a/usr/src/uts/common/io/cardbus/cardbus_cfg.c +++ b/usr/src/uts/common/io/cardbus/cardbus_cfg.c @@ -28,8 +28,6 @@ * From "@(#)pcicfg.c 1.31 99/06/18 SMI" */ -#pragma ident "%Z%%M% %I% %E% SMI" - /* * Cardbus configurator */ @@ -1264,7 +1262,7 @@ cardbus_allocate_chunk(dev_info_t *dip, uint8_t type, uint8_t sec_bus) io_request->ra_len += cardbus_min_spare_io; if (io_request->ra_len) { -#if defined(__x86) || defined(__amd64) +#if defined(__x86) io_request->ra_boundbase = 0x1000; io_request->ra_boundlen = 0xefff; #else @@ -3229,7 +3227,7 @@ cardbus_config_setup(dev_info_t *dip, ddi_acc_handle_t *handle) cardbus_err(dip, 8, "cardbus_config_setup PCICFG_NODEVICE\n"); ret = PCICFG_NODEVICE; -#elif defined(__x86) || defined(__amd64) +#elif defined(__x86) if (ddi_get16(*handle, (uint16_t *)cfgaddr) == 0xffff) { cardbus_err(dip, 8, "cardbus_config_setup PCICFG_NODEVICE\n"); diff --git a/usr/src/uts/common/io/cmlb.c b/usr/src/uts/common/io/cmlb.c index f4ae9f3ed5..7d88643ada 100644 --- a/usr/src/uts/common/io/cmlb.c +++ b/usr/src/uts/common/io/cmlb.c @@ -42,7 +42,7 @@ #include <sys/efi_partition.h> #include <sys/cmlb.h> #include <sys/cmlb_impl.h> -#if defined(__i386) || defined(__amd64) +#if defined(__x86) #include <sys/fs/dv_node.h> #endif #include <sys/ddi_impldefs.h> @@ -110,7 +110,7 @@ static struct driver_minor_data dk_minor_data[] = { {0} }; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) #if defined(_FIRMWARE_NEEDS_FDISK) static struct driver_minor_data dk_ext_minor_data[] = { {"p5", 21, S_IFBLK}, @@ -180,7 +180,7 @@ static struct driver_minor_data dk_ext_minor_data[] = { {0} }; #endif /* defined(_FIRMWARE_NEEDS_FDISK) */ -#endif /* if defined(__i386) || defined(__amd64) */ +#endif /* if defined(__x86) */ static struct driver_minor_data dk_minor_data_efi[] = { {"a", 0, S_IFBLK}, @@ -315,7 +315,7 @@ static int cmlb_create_minor_nodes(struct cmlb_lun *cl); static int cmlb_check_update_blockcount(struct cmlb_lun *cl, void *tg_cookie); static boolean_t cmlb_check_efi_mbr(uchar_t *buf, boolean_t *is_mbr); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) static int cmlb_update_fdisk_and_vtoc(struct cmlb_lun *cl, void *tg_cookie); #endif @@ -353,7 +353,7 @@ static int cmlb_dkio_set_mboot(struct cmlb_lun *cl, caddr_t arg, int flag, static int cmlb_dkio_partition(struct cmlb_lun *cl, caddr_t arg, int flag, void *tg_cookie); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) static int cmlb_dkio_set_ext_part(struct cmlb_lun *cl, caddr_t arg, int flag, void *tg_cookie); static int cmlb_validate_ext_part(struct cmlb_lun *cl, int part, int epart, @@ -711,7 +711,7 @@ cmlb_attach(dev_info_t *devi, cmlb_tg_ops_t *tgopsp, int device_type, cl->cl_alter_behavior = alter_behavior; cl->cl_reserved = -1; cl->cl_msglog_flag |= CMLB_ALLOW_2TB_WARN; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) cl->cl_logical_drive_count = 0; #endif @@ -1045,7 +1045,7 @@ cmlb_partinfo(cmlb_handle_t cmlbhandle, int part, diskaddr_t *nblocksp, struct cmlb_lun *cl = (struct cmlb_lun *)cmlbhandle; int rval; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) int ext_part; #endif @@ -1085,7 +1085,7 @@ cmlb_partinfo(cmlb_handle_t cmlbhandle, int part, diskaddr_t *nblocksp, /* consistent with behavior of sd for getting minor name */ if (partnamep != NULL) { -#if defined(__i386) || defined(__amd64) +#if defined(__x86) #if defined(_FIRMWARE_NEEDS_FDISK) if (part > FDISK_P4) { ext_part = part-FDISK_P4-1; @@ -1179,12 +1179,12 @@ cmlb_ioctl(cmlb_handle_t cmlbhandle, dev_t dev, int cmd, intptr_t arg, case DKIOCSGEOM: case DKIOCSETEFI: case DKIOCSMBOOT: -#if defined(__i386) || defined(__amd64) +#if defined(__x86) case DKIOCSETEXTPART: #endif break; case DKIOCSVTOC: -#if defined(__i386) || defined(__amd64) +#if defined(__x86) case DKIOCPARTINFO: #endif if (cl->cl_blockcount > CMLB_OLDVTOC_LIMIT) { @@ -1296,7 +1296,7 @@ cmlb_ioctl(cmlb_handle_t cmlbhandle, dev_t dev, int cmd, intptr_t arg, break; case DKIOCG_PHYGEOM: cmlb_dbg(CMLB_TRACE, cl, "DKIOCG_PHYGEOM\n"); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) err = cmlb_dkio_get_phygeom(cl, (caddr_t)arg, flag, tg_cookie); #else err = ENOTTY; @@ -1304,7 +1304,7 @@ cmlb_ioctl(cmlb_handle_t cmlbhandle, dev_t dev, int cmd, intptr_t arg, break; case DKIOCG_VIRTGEOM: cmlb_dbg(CMLB_TRACE, cl, "DKIOCG_VIRTGEOM\n"); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) err = cmlb_dkio_get_virtgeom(cl, (caddr_t)arg, flag); #else err = ENOTTY; @@ -1312,7 +1312,7 @@ cmlb_ioctl(cmlb_handle_t cmlbhandle, dev_t dev, int cmd, intptr_t arg, break; case DKIOCPARTINFO: cmlb_dbg(CMLB_TRACE, cl, "DKIOCPARTINFO"); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) err = cmlb_dkio_partinfo(cl, dev, (caddr_t)arg, flag); #else err = ENOTTY; @@ -1320,13 +1320,13 @@ cmlb_ioctl(cmlb_handle_t cmlbhandle, dev_t dev, int cmd, intptr_t arg, break; case DKIOCEXTPARTINFO: cmlb_dbg(CMLB_TRACE, cl, "DKIOCPARTINFO"); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) err = cmlb_dkio_extpartinfo(cl, dev, (caddr_t)arg, flag); #else err = ENOTTY; #endif break; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) case DKIOCSETEXTPART: cmlb_dbg(CMLB_TRACE, cl, "DKIOCSETEXTPART"); err = cmlb_dkio_set_ext_part(cl, (caddr_t)arg, flag, tg_cookie); @@ -2055,7 +2055,7 @@ cmlb_resync_geom_caches(struct cmlb_lun *cl, diskaddr_t capacity, } -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /* * Function: cmlb_update_ext_minor_nodes * @@ -2400,7 +2400,7 @@ cmlb_read_fdisk(struct cmlb_lun *cl, diskaddr_t capacity, void *tg_cookie) uint_t solaris_offset; /* offset to solaris part. */ daddr_t solaris_size; /* size of solaris partition */ uint32_t blocksize; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) struct ipart eparts[2]; struct ipart *efdp1 = &eparts[0]; struct ipart *efdp2 = &eparts[1]; @@ -2522,7 +2522,7 @@ cmlb_read_fdisk(struct cmlb_lun *cl, diskaddr_t capacity, void *tg_cookie) uint32_t relsect; uint32_t numsect; uchar_t systid; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /* * Stores relative block offset from the beginning of the * Extended Partition. @@ -2546,7 +2546,7 @@ cmlb_read_fdisk(struct cmlb_lun *cl, diskaddr_t capacity, void *tg_cookie) cl->cl_fmap[i].fmap_nblk = numsect; cl->cl_fmap[i].fmap_systid = LE_8(fdp->systid); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /* Support only one extended partition per LUN */ if ((fdp->systid == EXTDOS || fdp->systid == FDISK_EXTLBA) && (ext_part_exists == 0)) { @@ -2642,7 +2642,7 @@ cmlb_read_fdisk(struct cmlb_lun *cl, diskaddr_t capacity, void *tg_cookie) * then use the first inactive solaris partition id */ if ((uidx == -1) || (fdp->bootid == ACTIVE)) { -#if defined(__i386) || defined(__amd64) +#if defined(__x86) if (fdp->systid != SUNIXOS || (fdp->systid == SUNIXOS && (cmlb_is_linux_swap(cl, relsect, @@ -2651,12 +2651,12 @@ cmlb_read_fdisk(struct cmlb_lun *cl, diskaddr_t capacity, void *tg_cookie) uidx = i; solaris_offset = relsect; solaris_size = numsect; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) } #endif } } -#if defined(__i386) || defined(__amd64) +#if defined(__x86) if (ld_count < cl->cl_logical_drive_count) { /* * Some/all logical drives were deleted. Clear out @@ -3083,7 +3083,7 @@ cmlb_uselabel(struct cmlb_lun *cl, struct dk_label *labp, int flags) cl->cl_dkg_skew = labp->dkl_skew; #endif -#if defined(__i386) || defined(__amd64) +#if defined(__x86) cl->cl_g.dkg_apc = labp->dkl_apc; #endif @@ -3146,7 +3146,7 @@ cmlb_uselabel(struct cmlb_lun *cl, struct dk_label *labp, int flags) label_capacity = (cl->cl_g.dkg_ncyl * track_capacity); if (cl->cl_g.dkg_acyl) { -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /* we may have > 1 alts cylinder */ label_capacity += (track_capacity * cl->cl_g.dkg_acyl); #else @@ -3641,7 +3641,7 @@ cmlb_dkio_get_geometry(struct cmlb_lun *cl, caddr_t arg, int flag, return (rval); } -#if defined(__i386) || defined(__amd64) +#if defined(__x86) if (cl->cl_solaris_size == 0) { mutex_exit(CMLB_MUTEX(cl)); return (EIO); @@ -3706,7 +3706,7 @@ cmlb_dkio_set_geometry(struct cmlb_lun *cl, caddr_t arg, int flag) int i; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) if (cl->cl_solaris_size == 0) { return (EIO); } @@ -3730,7 +3730,7 @@ cmlb_dkio_set_geometry(struct cmlb_lun *cl, caddr_t arg, int flag) lp = &cl->cl_map[i]; cl->cl_offset[i] = cl->cl_g.dkg_nhead * cl->cl_g.dkg_nsect * lp->dkl_cylno; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) cl->cl_offset[i] += cl->cl_solaris_offset; #endif } @@ -3780,7 +3780,7 @@ cmlb_dkio_get_partition(struct cmlb_lun *cl, caddr_t arg, int flag, } mutex_exit(CMLB_MUTEX(cl)); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) if (cl->cl_solaris_size == 0) { return (EIO); } @@ -3916,7 +3916,7 @@ cmlb_dkio_set_partition(struct cmlb_lun *cl, caddr_t arg, int flag) vp->p_size = lp->dkl_nblk; vp++; #endif /* defined(_SUNOS_VTOC_16) */ -#if defined(__i386) || defined(__amd64) +#if defined(__x86) cl->cl_offset[i] += cl->cl_solaris_offset; #endif } @@ -4389,7 +4389,7 @@ cmlb_dkio_set_vtoc(struct cmlb_lun *cl, dev_t dev, caddr_t arg, int flag, return (EOVERFLOW); } -#if defined(__i386) || defined(__amd64) +#if defined(__x86) if (cl->cl_tgt_blocksize != cl->cl_sys_blocksize) { mutex_exit(CMLB_MUTEX(cl)); return (EINVAL); @@ -4478,7 +4478,7 @@ cmlb_dkio_set_extvtoc(struct cmlb_lun *cl, dev_t dev, caddr_t arg, int flag, internal = VOID2BOOLEAN( (cl->cl_alter_behavior & (CMLB_INTERNAL_MINOR_NODES)) != 0); mutex_enter(CMLB_MUTEX(cl)); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) if (cl->cl_tgt_blocksize != cl->cl_sys_blocksize) { mutex_exit(CMLB_MUTEX(cl)); return (EINVAL); @@ -4792,7 +4792,7 @@ cmlb_set_vtoc(struct cmlb_lun *cl, struct dk_label *dkl, void *tg_cookie) int cyl; int rval; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) label_addr = cl->cl_solaris_offset + DK_LABEL_LOC; #else /* Write the primary label at block 0 of the solaris partition. */ @@ -4827,7 +4827,7 @@ cmlb_set_vtoc(struct cmlb_lun *cl, struct dk_label *dkl, void *tg_cookie) blk = (diskaddr_t)( (cyl * ((dkl->dkl_nhead * dkl->dkl_nsect) - dkl->dkl_apc)) + (head * dkl->dkl_nsect) + sec); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) blk += cl->cl_solaris_offset; #endif rval = DK_TG_WRITE(cl, dkl, blk, cl->cl_sys_blocksize, @@ -5165,7 +5165,7 @@ cmlb_dkio_set_mboot(struct cmlb_lun *cl, caddr_t arg, int flag, void *tg_cookie) rval = DK_TG_WRITE(cl, mboot, 0, cl->cl_sys_blocksize, tg_cookie); mutex_enter(CMLB_MUTEX(cl)); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) if (rval == 0) { /* * mboot has been written successfully. @@ -5200,7 +5200,7 @@ cmlb_dkio_set_mboot(struct cmlb_lun *cl, caddr_t arg, int flag, void *tg_cookie) } -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /*ARGSUSED*/ static int cmlb_dkio_set_ext_part(struct cmlb_lun *cl, caddr_t arg, int flag, @@ -5362,7 +5362,7 @@ cmlb_setup_default_geometry(struct cmlb_lun *cl, void *tg_cookie) } -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /* * Function: cmlb_update_fdisk_and_vtoc * @@ -5492,7 +5492,7 @@ no_solaris_partition: } #endif -#if defined(__i386) || defined(__amd64) +#if defined(__x86) static int cmlb_dkio_get_virtgeom(struct cmlb_lun *cl, caddr_t arg, int flag) { @@ -5533,7 +5533,7 @@ cmlb_dkio_get_virtgeom(struct cmlb_lun *cl, caddr_t arg, int flag) } #endif -#if defined(__i386) || defined(__amd64) +#if defined(__x86) static int cmlb_dkio_get_phygeom(struct cmlb_lun *cl, caddr_t arg, int flag, void *tg_cookie) @@ -5614,7 +5614,7 @@ cmlb_dkio_get_phygeom(struct cmlb_lun *cl, caddr_t arg, int flag, } #endif -#if defined(__i386) || defined(__amd64) +#if defined(__x86) static int cmlb_dkio_partinfo(struct cmlb_lun *cl, dev_t dev, caddr_t arg, int flag) { diff --git a/usr/src/uts/common/io/hxge/hxge_main.c b/usr/src/uts/common/io/hxge/hxge_main.c index 39683c9bb1..4978999727 100644 --- a/usr/src/uts/common/io/hxge/hxge_main.c +++ b/usr/src/uts/common/io/hxge/hxge_main.c @@ -2341,12 +2341,7 @@ hxge_dma_mem_alloc(p_hxge_t hxgep, dma_method_t method, } dma_p->kaddrp = kaddrp; -#if defined(__i386) - dma_p->ioaddr_pp = - (unsigned char *)(uint32_t)dma_p->dma_cookie.dmac_laddress; -#else dma_p->ioaddr_pp = (unsigned char *) dma_p->dma_cookie.dmac_laddress; -#endif HPI_DMA_ACC_HANDLE_SET(dma_p, dma_p->acc_handle); diff --git a/usr/src/uts/common/io/hxge/hxge_ndd.c b/usr/src/uts/common/io/hxge/hxge_ndd.c index 7f80be216b..0966e718f7 100644 --- a/usr/src/uts/common/io/hxge/hxge_ndd.c +++ b/usr/src/uts/common/io/hxge/hxge_ndd.c @@ -110,7 +110,7 @@ static int hxge_param_dump_ptrs(p_hxge_t hxgep, queue_t *q, */ static hxge_param_t hxge_param_arr[] = { - /* min max value old hw-name conf-name */ + /* min max value old hw-name conf-name */ {hxge_param_get_generic, NULL, HXGE_PARAM_READ, 0, 999, 1000, 0, "instance", "instance"}, @@ -257,12 +257,7 @@ hxge_get_param_soft_properties(p_hxge_t hxgep) if (prop_len > HXGE_PARAM_ARRAY_INIT_SIZE) prop_len = HXGE_PARAM_ARRAY_INIT_SIZE; -#if defined(__i386) - cfg_value = - (uint64_t *)(int32_t)param_arr[i].value; -#else cfg_value = (uint64_t *)param_arr[i].value; -#endif for (j = 0; j < prop_len; j++) { cfg_value[j] = int_prop_val[j]; } @@ -410,19 +405,10 @@ hxge_init_param(p_hxge_t hxgep) (param_arr[i].type & HXGE_PARAM_PROP_ARR64)) { alloc_count = HXGE_PARAM_ARRAY_INIT_SIZE; alloc_size = alloc_count * sizeof (uint64_t); -#if defined(__i386) - param_arr[i].value = - (uint64_t)(uint32_t)KMEM_ZALLOC(alloc_size, - KM_SLEEP); - param_arr[i].old_value = - (uint64_t)(uint32_t)KMEM_ZALLOC(alloc_size, - KM_SLEEP); -#else param_arr[i].value = (uint64_t)KMEM_ZALLOC(alloc_size, KM_SLEEP); param_arr[i].old_value = (uint64_t)KMEM_ZALLOC(alloc_size, KM_SLEEP); -#endif param_arr[i].type |= (alloc_count << HXGE_PARAM_ARRAY_ALLOC_SHIFT); } @@ -465,17 +451,10 @@ hxge_destroy_param(p_hxge_t hxgep) HXGE_PARAM_ARRAY_ALLOC_SHIFT); free_count = HXGE_PARAM_ARRAY_INIT_SIZE; free_size = sizeof (uint64_t) * free_count; -#if defined(__i386) - KMEM_FREE((void *)(uint32_t) - hxgep->param_arr[i].value, free_size); - KMEM_FREE((void *)(uint32_t) - hxgep->param_arr[i].old_value, free_size); -#else KMEM_FREE((void *) hxgep->param_arr[i].value, free_size); KMEM_FREE((void *) hxgep->param_arr[i].old_value, free_size); -#endif } } @@ -602,7 +581,7 @@ hxge_mk_mblk_tail_space(p_mblk_t mp, p_mblk_t *nmp, size_t size) /* ARGSUSED */ int hxge_param_set_generic(p_hxge_t hxgep, queue_t *q, mblk_t *mp, - char *value, caddr_t cp) + char *value, caddr_t cp) { char *end; uint32_t new_value; @@ -622,7 +601,7 @@ hxge_param_set_generic(p_hxge_t hxgep, queue_t *q, mblk_t *mp, /* ARGSUSED */ int hxge_param_set_mac(p_hxge_t hxgep, queue_t *q, mblk_t *mp, - char *value, caddr_t cp) + char *value, caddr_t cp) { char *end; uint32_t new_value; @@ -661,7 +640,7 @@ hxge_param_set_mac(p_hxge_t hxgep, queue_t *q, mblk_t *mp, /* ARGSUSED */ int hxge_param_rx_intr_pkts(p_hxge_t hxgep, queue_t *q, - mblk_t *mp, char *value, caddr_t cp) + mblk_t *mp, char *value, caddr_t cp) { char *end; uint32_t cfg_value; @@ -692,7 +671,7 @@ hxge_param_rx_intr_pkts(p_hxge_t hxgep, queue_t *q, /* ARGSUSED */ int hxge_param_rx_intr_time(p_hxge_t hxgep, queue_t *q, - mblk_t *mp, char *value, caddr_t cp) + mblk_t *mp, char *value, caddr_t cp) { char *end; uint32_t cfg_value; @@ -731,7 +710,7 @@ hxge_param_set_vlan_ids(p_hxge_t hxgep, queue_t *q, mblk_t *mp, char *value, uint32_t cfg_it = B_FALSE; uint32_t *val_ptr, *old_val_ptr; hxge_param_map_t *vmap, *old_map; - p_hxge_class_pt_cfg_t p_class_cfgp; + p_hxge_class_pt_cfg_t p_class_cfgp; uint64_t cfgd_vlans; int i, inc = 0, cfg_position; hxge_mv_cfg_t *vlan_tbl; @@ -768,13 +747,8 @@ hxge_param_set_vlan_ids(p_hxge_t hxgep, queue_t *q, mblk_t *mp, char *value, HXGE_DEBUG_MSG((hxgep, NDD_CTL, " hxge_param_set_vlan_ids id %d", vmap->param_id)); -#if defined(__i386) - val_ptr = (uint32_t *)(uint32_t)pa->value; - old_val_ptr = (uint32_t *)(uint32_t)pa->old_value; -#else val_ptr = (uint32_t *)pa->value; old_val_ptr = (uint32_t *)pa->old_value; -#endif /* Search to see if this vlan id is already configured */ for (i = 0; i < cfgd_vlans; i++) { @@ -841,7 +815,7 @@ hxge_param_get_vlan_ids(p_hxge_t hxgep, queue_t *q, mblk_t *mp, caddr_t cp) uint32_t *val_ptr; hxge_param_map_t *vmap; p_hxge_param_t pa = (p_hxge_param_t)cp; - p_hxge_class_pt_cfg_t p_class_cfgp; + p_hxge_class_pt_cfg_t p_class_cfgp; uint64_t cfgd_vlans = 0; int buff_alloc_size = HXGE_NDD_INFODUMP_BUFF_SIZE * 32; @@ -865,11 +839,7 @@ hxge_param_get_vlan_ids(p_hxge_t hxgep, queue_t *q, mblk_t *mp, caddr_t cp) ((mblk_t *)np)->b_wptr += print_len; buf_len -= print_len; -#if defined(__i386) - val_ptr = (uint32_t *)(uint32_t)pa->value; -#else val_ptr = (uint32_t *)pa->value; -#endif for (i = 0; i < cfgd_vlans; i++) { vmap = (hxge_param_map_t *)&val_ptr[i]; @@ -889,7 +859,7 @@ hxge_param_get_vlan_ids(p_hxge_t hxgep, queue_t *q, mblk_t *mp, caddr_t cp) /* ARGSUSED */ static int hxge_param_tcam_enable(p_hxge_t hxgep, queue_t *q, - mblk_t *mp, char *value, caddr_t cp) + mblk_t *mp, char *value, caddr_t cp) { uint32_t status = 0, cfg_value; p_hxge_param_t pa = (p_hxge_param_t)cp; @@ -919,7 +889,7 @@ hxge_param_tcam_enable(p_hxge_t hxgep, queue_t *q, /* ARGSUSED */ static int hxge_param_set_ether_usr(p_hxge_t hxgep, queue_t *q, - mblk_t *mp, char *value, caddr_t cp) + mblk_t *mp, char *value, caddr_t cp) { char *end; uint32_t status = 0, cfg_value; @@ -962,7 +932,7 @@ hxge_class_name_2value(p_hxge_t hxgep, char *name) /* ARGSUSED */ int hxge_param_set_ip_opt(p_hxge_t hxgep, queue_t *q, - mblk_t *mp, char *value, caddr_t cp) + mblk_t *mp, char *value, caddr_t cp) { char *end; uint32_t status, cfg_value; @@ -1030,7 +1000,7 @@ hxge_param_get_ip_opt(p_hxge_t hxgep, queue_t *q, mblk_t *mp, caddr_t cp) /* ARGSUSED */ static int hxge_param_pfc_hash_init(p_hxge_t hxgep, queue_t *q, mblk_t *mp, - char *value, caddr_t cp) + char *value, caddr_t cp) { char *end; uint32_t status, cfg_value; @@ -1067,7 +1037,7 @@ hxge_param_pfc_hash_init(p_hxge_t hxgep, queue_t *q, mblk_t *mp, /* ARGSUSED */ static int hxge_param_set_hxge_debug_flag(p_hxge_t hxgep, queue_t *q, - mblk_t *mp, char *value, caddr_t cp) + mblk_t *mp, char *value, caddr_t cp) { char *end; uint32_t status = 0; @@ -1123,7 +1093,7 @@ hxge_param_get_debug_flag(p_hxge_t hxgep, queue_t *q, p_mblk_t mp, caddr_t cp) /* ARGSUSED */ static int hxge_param_set_hpi_debug_flag(p_hxge_t hxgep, queue_t *q, - mblk_t *mp, char *value, caddr_t cp) + mblk_t *mp, char *value, caddr_t cp) { char *end; uint32_t status = 0; @@ -1225,11 +1195,7 @@ hxge_param_dump_ptrs(p_hxge_t hxgep, queue_t *q, p_mblk_t mp, caddr_t cp) ADVANCE_PRINT_BUFFER(np, print_len, buf_len); block = 0; -#if defined(__i386) - base = (uint64_t)(uint32_t)hxgep->dev_regs->hxge_regp; -#else base = (uint64_t)hxgep->dev_regs->hxge_regp; -#endif while (reg_block[block].offset != ALL_FF_32) { print_len = snprintf((char *)((mblk_t *)np)->b_wptr, buf_len, "%9s\t 0x%llx\n", reg_block[block].name, @@ -1277,7 +1243,7 @@ hxge_param_dump_ptrs(p_hxge_t hxgep, queue_t *q, p_mblk_t mp, caddr_t cp) */ boolean_t hxge_nd_load(caddr_t *pparam, char *name, - pfi_t get_pfi, pfi_t set_pfi, caddr_t data) + pfi_t get_pfi, pfi_t set_pfi, caddr_t data) { ND *nd; NDE *nde; @@ -1518,7 +1484,7 @@ hxge_get_default(p_hxge_t hxgep, queue_t *q, p_mblk_t mp, caddr_t data) /* ARGSUSED */ int hxge_set_default(p_hxge_t hxgep, queue_t *q, p_mblk_t mp, char *value, - caddr_t data) + caddr_t data) { return (EACCES); } diff --git a/usr/src/uts/common/io/hxge/hxge_rxdma.c b/usr/src/uts/common/io/hxge/hxge_rxdma.c index 92e9df2b02..7610be9afc 100644 --- a/usr/src/uts/common/io/hxge/hxge_rxdma.c +++ b/usr/src/uts/common/io/hxge/hxge_rxdma.c @@ -351,11 +351,7 @@ hxge_rxbuf_pp_to_vp(p_hxge_t hxgep, p_rx_rbr_ring_t rbr_p, "==> hxge_rxbuf_pp_to_vp: buf_pp $%p btype %d", pkt_buf_addr_pp, pktbufsz_type)); -#if defined(__i386) - pktbuf_pp = (uint64_t)(uint32_t)pkt_buf_addr_pp; -#else pktbuf_pp = (uint64_t)pkt_buf_addr_pp; -#endif switch (pktbufsz_type) { case 0: @@ -548,13 +544,8 @@ found_index: "block_index %d ", total_index, dvma_addr, offset, block_size, block_index)); -#if defined(__i386) - *pkt_buf_addr_p = (uint64_t *)((uint32_t)bufinfo[anchor_index].kaddr + - (uint32_t)offset); -#else *pkt_buf_addr_p = (uint64_t *)((uint64_t)bufinfo[anchor_index].kaddr + offset); -#endif HXGE_DEBUG_MSG((hxgep, RX2_CTL, "==> hxge_rxbuf_pp_to_vp: " @@ -1697,13 +1688,8 @@ hxge_receive_packet(p_hxge_t hxgep, p_rx_rcr_ring_t rcr_p, pktbufsz_type = ((rcr_entry & RCR_PKTBUFSZ_MASK) >> RCR_PKTBUFSZ_SHIFT); -#if defined(__i386) - pkt_buf_addr_pp = (uint64_t *)(uint32_t)((rcr_entry & - RCR_PKT_BUF_ADDR_MASK) << RCR_PKT_BUF_ADDR_SHIFT); -#else pkt_buf_addr_pp = (uint64_t *)((rcr_entry & RCR_PKT_BUF_ADDR_MASK) << RCR_PKT_BUF_ADDR_SHIFT); -#endif HXGE_DEBUG_MSG((hxgep, RX2_CTL, "==> hxge_receive_packet: entryp $%p entry 0x%0llx " @@ -1733,13 +1719,8 @@ hxge_receive_packet(p_hxge_t hxgep, p_rx_rcr_ring_t rcr_p, } /* shift 6 bits to get the full io address */ -#if defined(__i386) - pkt_buf_addr_pp = (uint64_t *)((uint32_t)pkt_buf_addr_pp << - RCR_PKT_BUF_ADDR_SHIFT_FULL); -#else pkt_buf_addr_pp = (uint64_t *)((uint64_t)pkt_buf_addr_pp << RCR_PKT_BUF_ADDR_SHIFT_FULL); -#endif HXGE_DEBUG_MSG((hxgep, RX2_CTL, "==> (rbr) hxge_receive_packet: entry 0x%0llx " "full pkt_buf_addr_pp $%p l2_len %d", @@ -2746,13 +2727,8 @@ hxge_map_rxdma_channel_cfg_ring(p_hxge_t hxgep, uint16_t dma_channel, rcrp->comp_wt_index = 0; rcrp->rcr_desc_rd_head_p = rcrp->rcr_desc_first_p = (p_rcr_entry_t)DMA_COMMON_VPTR(rcrp->rcr_desc); -#if defined(__i386) - rcrp->rcr_desc_rd_head_pp = rcrp->rcr_desc_first_pp = - (p_rcr_entry_t)(uint32_t)DMA_COMMON_IOADDR(rcrp->rcr_desc); -#else rcrp->rcr_desc_rd_head_pp = rcrp->rcr_desc_first_pp = (p_rcr_entry_t)DMA_COMMON_IOADDR(rcrp->rcr_desc); -#endif rcrp->rcr_desc_last_p = rcrp->rcr_desc_rd_head_p + (hxge_port_rcr_size - 1); rcrp->rcr_desc_last_pp = rcrp->rcr_desc_rd_head_pp + @@ -2960,19 +2936,11 @@ hxge_map_rxdma_channel_buf_ring(p_hxge_t hxgep, uint16_t channel, for (i = 0; i < rbrp->num_blocks; i++, dma_bufp++) { bsize = dma_bufp->block_size; nblocks = dma_bufp->nblocks; -#if defined(__i386) - ring_info->buffer[i].dvma_addr = (uint32_t)dma_bufp->ioaddr_pp; -#else ring_info->buffer[i].dvma_addr = (uint64_t)dma_bufp->ioaddr_pp; -#endif ring_info->buffer[i].buf_index = i; ring_info->buffer[i].buf_size = dma_bufp->alength; ring_info->buffer[i].start_index = index; -#if defined(__i386) - ring_info->buffer[i].kaddr = (uint32_t)dma_bufp->kaddrp; -#else ring_info->buffer[i].kaddr = (uint64_t)dma_bufp->kaddrp; -#endif HXGE_DEBUG_MSG((hxgep, MEM2_CTL, " hxge_map_rxdma_channel_buf_ring: map channel %d " @@ -3641,13 +3609,8 @@ hxge_rxdma_fatal_err_recover(p_hxge_t hxgep, uint16_t channel) rcrp->comp_wt_index = 0; rcrp->rcr_desc_rd_head_p = rcrp->rcr_desc_first_p = (p_rcr_entry_t)DMA_COMMON_VPTR(rcrp->rcr_desc); -#if defined(__i386) - rcrp->rcr_desc_rd_head_pp = rcrp->rcr_desc_first_pp = - (p_rcr_entry_t)(uint32_t)DMA_COMMON_IOADDR(rcrp->rcr_desc); -#else rcrp->rcr_desc_rd_head_pp = rcrp->rcr_desc_first_pp = (p_rcr_entry_t)DMA_COMMON_IOADDR(rcrp->rcr_desc); -#endif rcrp->rcr_desc_last_p = rcrp->rcr_desc_rd_head_p + (hxge_port_rcr_size - 1); diff --git a/usr/src/uts/common/io/hxge/hxge_send.c b/usr/src/uts/common/io/hxge/hxge_send.c index b59757011e..08e64bb6fe 100644 --- a/usr/src/uts/common/io/hxge/hxge_send.c +++ b/usr/src/uts/common/io/hxge/hxge_send.c @@ -63,7 +63,7 @@ hxge_tx_ring_dispatch(p_tx_ring_t ring) mblk_t * hxge_tx_ring_send(void *arg, mblk_t *mp) { - p_hxge_ring_handle_t rhp = (p_hxge_ring_handle_t)arg; + p_hxge_ring_handle_t rhp = (p_hxge_ring_handle_t)arg; p_hxge_t hxgep; p_tx_ring_t tx_ring_p; int status; @@ -87,48 +87,48 @@ hxge_tx_ring_send(void *arg, mblk_t *mp) static int hxge_start(p_hxge_t hxgep, p_tx_ring_t tx_ring_p, p_mblk_t mp) { - int dma_status, status = 0; - p_tx_desc_t tx_desc_ring_vp; + int dma_status, status = 0; + p_tx_desc_t tx_desc_ring_vp; hpi_handle_t hpi_desc_handle; - hxge_os_dma_handle_t tx_desc_dma_handle; - p_tx_desc_t tx_desc_p; - p_tx_msg_t tx_msg_ring; - p_tx_msg_t tx_msg_p; + hxge_os_dma_handle_t tx_desc_dma_handle; + p_tx_desc_t tx_desc_p; + p_tx_msg_t tx_msg_ring; + p_tx_msg_t tx_msg_p; tx_desc_t tx_desc, *tmp_desc_p; tx_desc_t sop_tx_desc, *sop_tx_desc_p; p_tx_pkt_header_t hdrp; p_tx_pkt_hdr_all_t pkthdrp; uint8_t npads = 0; - uint64_t dma_ioaddr; + uint64_t dma_ioaddr; uint32_t dma_flags; int last_bidx; - uint8_t *b_rptr; - caddr_t kaddr; + uint8_t *b_rptr; + caddr_t kaddr; uint32_t nmblks; uint32_t ngathers; uint32_t clen; - int len; + int len; uint32_t pkt_len, pack_len, min_len; uint32_t bcopy_thresh; - int i, cur_index, sop_index; + int i, cur_index, sop_index; uint16_t tail_index; boolean_t tail_wrap = B_FALSE; hxge_dma_common_t desc_area; - hxge_os_dma_handle_t dma_handle; - ddi_dma_cookie_t dma_cookie; + hxge_os_dma_handle_t dma_handle; + ddi_dma_cookie_t dma_cookie; hpi_handle_t hpi_handle; - p_mblk_t nmp; + p_mblk_t nmp; p_mblk_t t_mp; - uint32_t ncookies; - boolean_t good_packet; - boolean_t mark_mode = B_FALSE; - p_hxge_stats_t statsp; + uint32_t ncookies; + boolean_t good_packet; + boolean_t mark_mode = B_FALSE; + p_hxge_stats_t statsp; p_hxge_tx_ring_stats_t tdc_stats; - t_uscalar_t start_offset = 0; - t_uscalar_t stuff_offset = 0; - t_uscalar_t end_offset = 0; - t_uscalar_t value = 0; - t_uscalar_t cksum_flags = 0; + t_uscalar_t start_offset = 0; + t_uscalar_t stuff_offset = 0; + t_uscalar_t end_offset = 0; + t_uscalar_t value = 0; + t_uscalar_t cksum_flags = 0; boolean_t cksum_on = B_FALSE; uint32_t boff = 0; uint64_t tot_xfer_len = 0, tmp_len = 0; @@ -136,8 +136,8 @@ hxge_start(p_hxge_t hxgep, p_tx_ring_t tx_ring_p, p_mblk_t mp) tdc_tdr_kick_t kick; uint32_t offset; #ifdef HXGE_DEBUG - p_tx_desc_t tx_desc_ring_pp; - p_tx_desc_t tx_desc_pp; + p_tx_desc_t tx_desc_ring_pp; + p_tx_desc_t tx_desc_pp; tx_desc_t *save_desc_p; int dump_len; int sad_len; @@ -243,12 +243,8 @@ start_again: hpi_desc_handle.hxgep = hxgep; tx_desc_ring_vp = (p_tx_desc_t)DMA_COMMON_VPTR(desc_area); #ifdef HXGE_DEBUG -#if defined(__i386) - tx_desc_ring_pp = (p_tx_desc_t)(uint32_t)DMA_COMMON_IOADDR(desc_area); -#else tx_desc_ring_pp = (p_tx_desc_t)DMA_COMMON_IOADDR(desc_area); #endif -#endif tx_desc_dma_handle = (hxge_os_dma_handle_t)DMA_COMMON_HANDLE(desc_area); tx_msg_ring = tx_ring_p->tx_msg_ring; @@ -311,11 +307,7 @@ start_again: tx_desc_pp = &tx_desc_ring_pp[i]; #endif tx_msg_p = &tx_msg_ring[i]; -#if defined(__i386) - hpi_desc_handle.regp = (uint32_t)tx_desc_p; -#else hpi_desc_handle.regp = (uint64_t)tx_desc_p; -#endif if (!header_set && ((!hxge_tx_use_bcopy && (len > TX_BCOPY_SIZE)) || (len >= bcopy_thresh))) { @@ -460,11 +452,7 @@ start_again: "==> hxge_start(12_1): " "USE DVMA: len %d clen %d ngathers %d", len, clen, ngathers)); -#if defined(__i386) - hpi_desc_handle.regp = (uint32_t)tx_desc_p; -#else hpi_desc_handle.regp = (uint64_t)tx_desc_p; -#endif while (ncookies > 1) { ngathers++; /* @@ -504,11 +492,7 @@ start_again: tx_desc_p = &tx_desc_ring_vp[i]; hpi_desc_handle.regp = -#if defined(__i386) - (uint32_t)tx_desc_p; -#else - (uint64_t)tx_desc_p; -#endif + (uint64_t)tx_desc_p; tx_msg_p = &tx_msg_ring[i]; tx_msg_p->flags.dma_type = USE_NONE; tx_desc.value = 0; @@ -533,11 +517,7 @@ start_again: nmp = nmp->b_cont; hxge_start_control_header_only: -#if defined(__i386) - hpi_desc_handle.regp = (uint32_t)tx_desc_p; -#else hpi_desc_handle.regp = (uint64_t)tx_desc_p; -#endif ngathers++; if (ngathers == 1) { @@ -606,11 +586,7 @@ hxge_start_control_header_only: tx_msg_p->tx_message = mp; tx_desc_p = &tx_desc_ring_vp[sop_index]; -#if defined(__i386) - hpi_desc_handle.regp = (uint32_t)tx_desc_p; -#else hpi_desc_handle.regp = (uint64_t)tx_desc_p; -#endif pkthdrp = (p_tx_pkt_hdr_all_t)hdrp; pkthdrp->reserved = 0; @@ -801,11 +777,7 @@ hxge_start_fail2: HXGE_DEBUG_MSG((hxgep, TX_CTL, "==> hxge_start: clean up")); for (i = 0; i < ngathers; i++) { tx_desc_p = &tx_desc_ring_vp[cur_index]; -#if defined(__i386) - hpi_handle.regp = (uint32_t)tx_desc_p; -#else hpi_handle.regp = (uint64_t)tx_desc_p; -#endif tx_msg_p = &tx_msg_ring[cur_index]; (void) hpi_txdma_desc_set_zero(hpi_handle, 1); if (tx_msg_p->flags.dma_type == USE_DVMA) { diff --git a/usr/src/uts/common/io/i8042.c b/usr/src/uts/common/io/i8042.c index 23489be575..cebfe4cf6c 100644 --- a/usr/src/uts/common/io/i8042.c +++ b/usr/src/uts/common/io/i8042.c @@ -86,7 +86,7 @@ #if defined(__sparc) #define I8042_CMD_DISABLE_ALL 0x34 #define I8042_CMD_ENABLE_ALL 0x07 -#elif defined(__i386) || defined(__amd64) +#elif defined(__x86) #define I8042_CMD_DISABLE_ALL 0x74 #define I8042_CMD_ENABLE_ALL 0x47 #endif @@ -346,7 +346,7 @@ static struct dev_ops i8042_ops = { extern struct mod_ops mod_driverops; static struct modldrv modldrv = { - &mod_driverops, /* Type of module. This one is a driver */ + &mod_driverops, /* Type of module. This one is a driver */ "i8042 nexus driver", /* Name of module. */ &i8042_ops, /* driver ops */ }; @@ -1456,7 +1456,7 @@ i8042_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, static int i8042_ctlops(dev_info_t *dip, dev_info_t *rdip, - ddi_ctl_enum_t op, void *arg, void *result) + ddi_ctl_enum_t op, void *arg, void *result) { int *iprop; unsigned int iprop_len; @@ -1507,7 +1507,7 @@ i8042_ctlops(dev_info_t *dip, dev_info_t *rdip, /* NOTREACHED */ } -#if defined(__i386) || defined(__amd64) +#if defined(__x86) static dev_info_t * i8042_devi_findchild_by_node_name(dev_info_t *pdip, char *nodename) { @@ -1587,7 +1587,7 @@ static int i8042_bus_config(dev_info_t *parent, uint_t flags, ddi_bus_config_op_t op, void *arg, dev_info_t **childp) { -#if defined(__i386) || defined(__amd64) +#if defined(__x86) int nodes_needed = 0; int circ; diff --git a/usr/src/uts/common/io/kb8042/kb8042.c b/usr/src/uts/common/io/kb8042/kb8042.c index 2a599fdc8f..ea33a83c58 100644 --- a/usr/src/uts/common/io/kb8042/kb8042.c +++ b/usr/src/uts/common/io/kb8042/kb8042.c @@ -1516,7 +1516,7 @@ kb8042_get_initial_leds( int *initial_leds, int *initial_led_mask) { -#if defined(__i386) || defined(__amd64) +#if defined(__x86) extern caddr_t p0_va; uint8_t bios_kb_flag; diff --git a/usr/src/uts/common/io/mem.c b/usr/src/uts/common/io/mem.c index 950fab1272..96262bfe1a 100644 --- a/usr/src/uts/common/io/mem.c +++ b/usr/src/uts/common/io/mem.c @@ -353,7 +353,7 @@ mmpagelock(struct as *as, caddr_t va) #define NEED_LOCK_KVADDR(kva) mmpagelock(&kas, kva) -#else /* __i386, __amd64 */ +#else #define NEED_LOCK_KVADDR(va) 0 diff --git a/usr/src/uts/common/io/myri10ge/drv/myri10ge.c b/usr/src/uts/common/io/myri10ge/drv/myri10ge.c index 6b89f71d52..ae9ee3efd9 100644 --- a/usr/src/uts/common/io/myri10ge/drv/myri10ge.c +++ b/usr/src/uts/common/io/myri10ge/drv/myri10ge.c @@ -3687,26 +3687,9 @@ myri10ge_send_wrapper(void *arg, mblk_t *mp) struct myri10ge_slice_state *ss = arg; int err = 0; mcp_kreq_ether_send_t *req_list; -#if defined(__i386) - /* - * We need about 2.5KB of scratch space to handle transmits. - * i86pc has only 8KB of kernel stack space, so we malloc the - * scratch space there rather than keeping it on the stack. - */ - size_t req_size, tx_info_size; - struct myri10ge_tx_buffer_state *tx_info; - caddr_t req_bytes; - - req_size = sizeof (*req_list) * (MYRI10GE_MAX_SEND_DESC_TSO + 4) - + 8; - req_bytes = kmem_alloc(req_size, KM_SLEEP); - tx_info_size = sizeof (*tx_info) * (MYRI10GE_MAX_SEND_DESC_TSO + 1); - tx_info = kmem_alloc(tx_info_size, KM_SLEEP); -#else char req_bytes[sizeof (*req_list) * (MYRI10GE_MAX_SEND_DESC_TSO + 4) + 8]; struct myri10ge_tx_buffer_state tx_info[MYRI10GE_MAX_SEND_DESC_TSO + 1]; -#endif /* ensure req_list entries are aligned to 8 bytes */ req_list = (struct mcp_kreq_ether_send *) @@ -3714,10 +3697,6 @@ myri10ge_send_wrapper(void *arg, mblk_t *mp) err = myri10ge_send(ss, mp, req_list, tx_info); -#if defined(__i386) - kmem_free(tx_info, tx_info_size); - kmem_free(req_bytes, req_size); -#endif if (err) return (mp); else diff --git a/usr/src/uts/common/io/net80211/net80211_crypto_ccmp.c b/usr/src/uts/common/io/net80211/net80211_crypto_ccmp.c index 679b62cace..b7f4885a72 100644 --- a/usr/src/uts/common/io/net80211/net80211_crypto_ccmp.c +++ b/usr/src/uts/common/io/net80211/net80211_crypto_ccmp.c @@ -251,7 +251,7 @@ aes_ccm_encrypt(CK_AES_CCM_PARAMS *cmparam, const uint8_t *key, int keylen, mech.cm_param = (caddr_t)cmparam; mech.cm_param_len = sizeof (CK_AES_CCM_PARAMS); -#if defined(__amd64) || defined(__sparc) +#if defined(_LP64) ieee80211_dbg(IEEE80211_MSG_CRYPTO, "cm_type=%lx", mech.cm_type); #else ieee80211_dbg(IEEE80211_MSG_CRYPTO, "cm_type=%llx", mech.cm_type); @@ -304,7 +304,7 @@ aes_ccm_decrypt(CK_AES_CCM_PARAMS *cmparam, const uint8_t *key, int keylen, mech.cm_param = (caddr_t)cmparam; mech.cm_param_len = sizeof (CK_AES_CCM_PARAMS); -#if defined(__amd64) || defined(__sparc) +#if defined(_LP64) ieee80211_dbg(IEEE80211_MSG_CRYPTO, "cm_type=%lx", mech.cm_type); #else ieee80211_dbg(IEEE80211_MSG_CRYPTO, "cm_type=%llx", mech.cm_type); diff --git a/usr/src/uts/common/io/nxge/npi/npi_ipp.c b/usr/src/uts/common/io/nxge/npi/npi_ipp.c index 5f48bcacaa..e3a529b445 100644 --- a/usr/src/uts/common/io/nxge/npi/npi_ipp.c +++ b/usr/src/uts/common/io/nxge/npi/npi_ipp.c @@ -23,8 +23,6 @@ * Use is subject to license terms. */ -#pragma ident "%Z%%M% %I% %E% SMI" - #include <npi_ipp.h> uint64_t ipp_fzc_offset[] = { @@ -111,7 +109,7 @@ npi_status_t npi_ipp_dump_regs(npi_handle_t handle, uint8_t port) { uint64_t value, offset; - int num_regs, i; + int num_regs, i; ASSERT(IS_PORT_NUM_VALID(port)); @@ -121,11 +119,7 @@ npi_ipp_dump_regs(npi_handle_t handle, uint8_t port) num_regs = sizeof (ipp_fzc_offset) / sizeof (uint64_t); for (i = 0; i < num_regs; i++) { offset = IPP_REG_ADDR(port, ipp_fzc_offset[i]); -#if defined(__i386) - NXGE_REG_RD64(handle, (uint32_t)offset, &value); -#else NXGE_REG_RD64(handle, offset, &value); -#endif NPI_REG_DUMP_MSG((handle.function, NPI_REG_CTL, "0x%08llx " "%s\t 0x%08llx \n", offset, ipp_fzc_name[i], value)); @@ -141,7 +135,7 @@ void npi_ipp_read_regs(npi_handle_t handle, uint8_t port) { uint64_t value, offset; - int num_regs, i; + int num_regs, i; ASSERT(IS_PORT_NUM_VALID(port)); @@ -151,11 +145,7 @@ npi_ipp_read_regs(npi_handle_t handle, uint8_t port) num_regs = sizeof (ipp_fzc_offset) / sizeof (uint64_t); for (i = 0; i < num_regs; i++) { offset = IPP_REG_ADDR(port, ipp_fzc_offset[i]); -#if defined(__i386) - NXGE_REG_RD64(handle, (uint32_t)offset, &value); -#else NXGE_REG_RD64(handle, offset, &value); -#endif } } @@ -197,7 +187,7 @@ npi_ipp_reset(npi_handle_t handle, uint8_t portn) */ npi_status_t npi_ipp_config(npi_handle_t handle, config_op_t op, uint8_t portn, - ipp_config_t config) + ipp_config_t config) { uint64_t val = 0; @@ -278,7 +268,7 @@ npi_ipp_set_max_pktsize(npi_handle_t handle, uint8_t portn, uint32_t bytes) */ npi_status_t npi_ipp_iconfig(npi_handle_t handle, config_op_t op, uint8_t portn, - ipp_iconfig_t iconfig) + ipp_iconfig_t iconfig) { uint64_t val = 0; @@ -392,7 +382,7 @@ npi_ipp_get_dfifo_wr_ptr(npi_handle_t handle, uint8_t portn, uint16_t *wr_ptr) npi_status_t npi_ipp_write_pfifo(npi_handle_t handle, uint8_t portn, uint8_t addr, - uint32_t d0, uint32_t d1, uint32_t d2, uint32_t d3, uint32_t d4) + uint32_t d0, uint32_t d1, uint32_t d2, uint32_t d3, uint32_t d4) { uint64_t val; @@ -424,8 +414,8 @@ npi_ipp_write_pfifo(npi_handle_t handle, uint8_t portn, uint8_t addr, npi_status_t npi_ipp_read_pfifo(npi_handle_t handle, uint8_t portn, uint8_t addr, - uint32_t *d0, uint32_t *d1, uint32_t *d2, uint32_t *d3, - uint32_t *d4) + uint32_t *d0, uint32_t *d1, uint32_t *d2, uint32_t *d3, + uint32_t *d4) { ASSERT(IS_PORT_NUM_VALID(portn)); @@ -448,7 +438,7 @@ npi_ipp_read_pfifo(npi_handle_t handle, uint8_t portn, uint8_t addr, npi_status_t npi_ipp_write_dfifo(npi_handle_t handle, uint8_t portn, uint16_t addr, - uint32_t d0, uint32_t d1, uint32_t d2, uint32_t d3, uint32_t d4) + uint32_t d0, uint32_t d1, uint32_t d2, uint32_t d3, uint32_t d4) { uint64_t val; @@ -480,8 +470,8 @@ npi_ipp_write_dfifo(npi_handle_t handle, uint8_t portn, uint16_t addr, npi_status_t npi_ipp_read_dfifo(npi_handle_t handle, uint8_t portn, uint16_t addr, - uint32_t *d0, uint32_t *d1, uint32_t *d2, uint32_t *d3, - uint32_t *d4) + uint32_t *d0, uint32_t *d1, uint32_t *d2, uint32_t *d3, + uint32_t *d4) { ASSERT(IS_PORT_NUM_VALID(portn)); @@ -517,7 +507,7 @@ npi_ipp_get_ecc_syndrome(npi_handle_t handle, uint8_t portn, uint16_t *syndrome) npi_status_t npi_ipp_get_dfifo_eopm_rdptr(npi_handle_t handle, uint8_t portn, - uint16_t *rdptr) + uint16_t *rdptr) { uint64_t val; diff --git a/usr/src/uts/common/io/nxge/npi/npi_mac.c b/usr/src/uts/common/io/nxge/npi/npi_mac.c index d36f9d913f..e05964a0ac 100644 --- a/usr/src/uts/common/io/nxge/npi/npi_mac.c +++ b/usr/src/uts/common/io/nxge/npi/npi_mac.c @@ -516,12 +516,7 @@ npi_mac_dump_regs(npi_handle_t handle, uint8_t port) "\nXMAC Register Dump for port %d\n", port)); for (i = 0; i < num_regs; i++) { -#if defined(__i386) - XMAC_REG_RD(handle, port, (uint32_t)xmac_offset[i], - &value); -#else XMAC_REG_RD(handle, port, xmac_offset[i], &value); -#endif NPI_REG_DUMP_MSG((handle.function, NPI_REG_CTL, "%08llx %s\t %08llx \n", (XMAC_REG_ADDR((port), (xmac_offset[i]))), @@ -540,12 +535,7 @@ npi_mac_dump_regs(npi_handle_t handle, uint8_t port) "\nBMAC Register Dump for port %d\n", port)); for (i = 0; i < num_regs; i++) { -#if defined(__i386) - BMAC_REG_RD(handle, port, (uint32_t)bmac_offset[i], - &value); -#else BMAC_REG_RD(handle, port, bmac_offset[i], &value); -#endif NPI_REG_DUMP_MSG((handle.function, NPI_REG_CTL, "%08llx %s\t %08llx \n", (BMAC_REG_ADDR((port), (bmac_offset[i]))), @@ -638,7 +628,7 @@ npi_mac_mif_link_intr_disable(npi_handle_t handle, uint8_t portn) npi_status_t npi_mac_hashtab_entry(npi_handle_t handle, io_op_t op, uint8_t portn, - uint8_t entryn, uint16_t *data) + uint8_t entryn, uint16_t *data) { uint64_t val; @@ -679,7 +669,7 @@ npi_mac_hashtab_entry(npi_handle_t handle, io_op_t op, uint8_t portn, npi_status_t npi_mac_hostinfo_entry(npi_handle_t handle, io_op_t op, uint8_t portn, - uint8_t entryn, hostinfo_t *hostinfo) + uint8_t entryn, hostinfo_t *hostinfo) { ASSERT((op == OP_GET) || (op == OP_SET)); ASSERT(IS_PORT_NUM_VALID(portn)); @@ -813,7 +803,7 @@ npi_mac_altaddr_disable(npi_handle_t handle, uint8_t portn, uint8_t addrn) npi_status_t npi_mac_altaddr_entry(npi_handle_t handle, io_op_t op, uint8_t portn, - uint8_t entryn, npi_mac_addr_t *data) + uint8_t entryn, npi_mac_addr_t *data) { uint64_t val0, val1, val2; @@ -889,7 +879,7 @@ npi_mac_altaddr_entry(npi_handle_t handle, io_op_t op, uint8_t portn, npi_status_t npi_mac_port_attr(npi_handle_t handle, io_op_t op, uint8_t portn, - npi_attr_t *attrp) + npi_attr_t *attrp) { uint64_t val = 0; uint32_t attr; @@ -1805,7 +1795,7 @@ npi_xmac_reset(npi_handle_t handle, uint8_t portn, npi_mac_reset_t mode) npi_status_t npi_xmac_xif_config(npi_handle_t handle, config_op_t op, uint8_t portn, - xmac_xif_config_t config) + xmac_xif_config_t config) { uint64_t val = 0; @@ -1940,7 +1930,7 @@ npi_xmac_xif_config(npi_handle_t handle, config_op_t op, uint8_t portn, npi_status_t npi_xmac_tx_config(npi_handle_t handle, config_op_t op, uint8_t portn, - xmac_tx_config_t config) + xmac_tx_config_t config) { uint64_t val = 0; @@ -2023,7 +2013,7 @@ npi_xmac_tx_config(npi_handle_t handle, config_op_t op, uint8_t portn, npi_status_t npi_xmac_rx_config(npi_handle_t handle, config_op_t op, uint8_t portn, - xmac_rx_config_t config) + xmac_rx_config_t config) { uint64_t val = 0; @@ -2169,7 +2159,7 @@ npi_xmac_rx_config(npi_handle_t handle, config_op_t op, uint8_t portn, npi_status_t npi_xmac_tx_iconfig(npi_handle_t handle, config_op_t op, uint8_t portn, - xmac_tx_iconfig_t iconfig) + xmac_tx_iconfig_t iconfig) { uint64_t val = 0; @@ -2219,7 +2209,7 @@ npi_xmac_tx_iconfig(npi_handle_t handle, config_op_t op, uint8_t portn, npi_status_t npi_xmac_rx_iconfig(npi_handle_t handle, config_op_t op, uint8_t portn, - xmac_rx_iconfig_t iconfig) + xmac_rx_iconfig_t iconfig) { uint64_t val = 0; @@ -2269,7 +2259,7 @@ npi_xmac_rx_iconfig(npi_handle_t handle, config_op_t op, uint8_t portn, npi_status_t npi_xmac_ctl_iconfig(npi_handle_t handle, config_op_t op, uint8_t portn, - xmac_ctl_iconfig_t iconfig) + xmac_ctl_iconfig_t iconfig) { uint64_t val = 0; @@ -2320,7 +2310,7 @@ npi_xmac_ctl_iconfig(npi_handle_t handle, config_op_t op, uint8_t portn, npi_status_t npi_xmac_tx_get_istatus(npi_handle_t handle, uint8_t portn, - xmac_tx_iconfig_t *istatus) + xmac_tx_iconfig_t *istatus) { uint64_t val; @@ -2334,7 +2324,7 @@ npi_xmac_tx_get_istatus(npi_handle_t handle, uint8_t portn, npi_status_t npi_xmac_rx_get_istatus(npi_handle_t handle, uint8_t portn, - xmac_rx_iconfig_t *istatus) + xmac_rx_iconfig_t *istatus) { uint64_t val; @@ -2348,7 +2338,7 @@ npi_xmac_rx_get_istatus(npi_handle_t handle, uint8_t portn, npi_status_t npi_xmac_ctl_get_istatus(npi_handle_t handle, uint8_t portn, - xmac_ctl_iconfig_t *istatus) + xmac_ctl_iconfig_t *istatus) { uint64_t val; @@ -2416,7 +2406,7 @@ npi_xmac_xpcs_disable(npi_handle_t handle, uint8_t portn) npi_status_t npi_xmac_xpcs_read(npi_handle_t handle, uint8_t portn, uint8_t xpcs_reg, - uint32_t *value) + uint32_t *value) { uint32_t reg; uint64_t val; @@ -2496,7 +2486,7 @@ npi_xmac_xpcs_read(npi_handle_t handle, uint8_t portn, uint8_t xpcs_reg, npi_status_t npi_xmac_xpcs_write(npi_handle_t handle, uint8_t portn, uint8_t xpcs_reg, - uint32_t value) + uint32_t value) { uint32_t reg; uint64_t val; @@ -2609,7 +2599,7 @@ npi_mac_pcs_reset(npi_handle_t handle, uint8_t portn) npi_status_t npi_mac_get_link_status(npi_handle_t handle, uint8_t portn, - boolean_t *link_up) + boolean_t *link_up) { uint64_t val; @@ -2628,7 +2618,7 @@ npi_mac_get_link_status(npi_handle_t handle, uint8_t portn, npi_status_t npi_bmac_tx_config(npi_handle_t handle, config_op_t op, uint8_t portn, - bmac_tx_config_t config) + bmac_tx_config_t config) { uint64_t val = 0; @@ -2694,7 +2684,7 @@ npi_bmac_tx_config(npi_handle_t handle, config_op_t op, uint8_t portn, npi_status_t npi_bmac_rx_config(npi_handle_t handle, config_op_t op, uint8_t portn, - bmac_rx_config_t config) + bmac_rx_config_t config) { uint64_t val = 0; @@ -2808,7 +2798,7 @@ npi_bmac_rx_config(npi_handle_t handle, config_op_t op, uint8_t portn, npi_status_t npi_bmac_rx_iconfig(npi_handle_t handle, config_op_t op, uint8_t portn, - bmac_rx_iconfig_t iconfig) + bmac_rx_iconfig_t iconfig) { uint64_t val = 0; @@ -2858,7 +2848,7 @@ npi_bmac_rx_iconfig(npi_handle_t handle, config_op_t op, uint8_t portn, npi_status_t npi_bmac_xif_config(npi_handle_t handle, config_op_t op, uint8_t portn, - bmac_xif_config_t config) + bmac_xif_config_t config) { uint64_t val = 0; @@ -2956,7 +2946,7 @@ npi_bmac_xif_config(npi_handle_t handle, config_op_t op, uint8_t portn, npi_status_t npi_bmac_tx_iconfig(npi_handle_t handle, config_op_t op, uint8_t portn, - bmac_tx_iconfig_t iconfig) + bmac_tx_iconfig_t iconfig) { uint64_t val = 0; @@ -3006,7 +2996,7 @@ npi_bmac_tx_iconfig(npi_handle_t handle, config_op_t op, uint8_t portn, npi_status_t npi_bmac_ctl_iconfig(npi_handle_t handle, config_op_t op, uint8_t portn, - bmac_ctl_iconfig_t iconfig) + bmac_ctl_iconfig_t iconfig) { uint64_t val = 0; @@ -3056,7 +3046,7 @@ npi_bmac_ctl_iconfig(npi_handle_t handle, config_op_t op, uint8_t portn, npi_status_t npi_bmac_tx_get_istatus(npi_handle_t handle, uint8_t portn, - bmac_tx_iconfig_t *istatus) + bmac_tx_iconfig_t *istatus) { uint64_t val = 0; @@ -3070,7 +3060,7 @@ npi_bmac_tx_get_istatus(npi_handle_t handle, uint8_t portn, npi_status_t npi_bmac_rx_get_istatus(npi_handle_t handle, uint8_t portn, - bmac_rx_iconfig_t *istatus) + bmac_rx_iconfig_t *istatus) { uint64_t val = 0; @@ -3084,7 +3074,7 @@ npi_bmac_rx_get_istatus(npi_handle_t handle, uint8_t portn, npi_status_t npi_bmac_ctl_get_istatus(npi_handle_t handle, uint8_t portn, - bmac_ctl_iconfig_t *istatus) + bmac_ctl_iconfig_t *istatus) { uint64_t val = 0; @@ -3098,7 +3088,7 @@ npi_bmac_ctl_get_istatus(npi_handle_t handle, uint8_t portn, npi_status_t npi_mac_mif_mdio_read(npi_handle_t handle, uint8_t portn, uint8_t device, - uint16_t xcvr_reg, uint16_t *value) + uint16_t xcvr_reg, uint16_t *value) { mif_frame_t frame; uint_t delay; @@ -3160,7 +3150,7 @@ npi_mac_mif_mdio_read(npi_handle_t handle, uint8_t portn, uint8_t device, npi_status_t npi_mac_mif_mii_read(npi_handle_t handle, uint8_t portn, uint8_t xcvr_reg, - uint16_t *value) + uint16_t *value) { mif_frame_t frame; uint_t delay; @@ -3189,7 +3179,7 @@ npi_mac_mif_mii_read(npi_handle_t handle, uint8_t portn, uint8_t xcvr_reg, npi_status_t npi_mac_mif_mdio_write(npi_handle_t handle, uint8_t portn, uint8_t device, - uint16_t xcvr_reg, uint16_t value) + uint16_t xcvr_reg, uint16_t value) { mif_frame_t frame; uint_t delay; @@ -3247,7 +3237,7 @@ npi_mac_mif_mdio_write(npi_handle_t handle, uint8_t portn, uint8_t device, npi_status_t npi_mac_mif_mii_write(npi_handle_t handle, uint8_t portn, uint8_t xcvr_reg, - uint16_t value) + uint16_t value) { mif_frame_t frame; uint_t delay; @@ -3276,7 +3266,7 @@ npi_mac_mif_mii_write(npi_handle_t handle, uint8_t portn, uint8_t xcvr_reg, npi_status_t npi_mac_pcs_mii_read(npi_handle_t handle, uint8_t portn, uint8_t xcvr_reg, - uint16_t *value) + uint16_t *value) { pcs_anar_t pcs_anar; pcs_anar_t pcs_anlpar; @@ -3361,7 +3351,7 @@ npi_mac_pcs_mii_read(npi_handle_t handle, uint8_t portn, uint8_t xcvr_reg, npi_status_t npi_mac_pcs_mii_write(npi_handle_t handle, uint8_t portn, uint8_t xcvr_reg, - uint16_t value) + uint16_t value) { pcs_anar_t pcs_anar; mii_anar_t anar; @@ -3406,7 +3396,7 @@ npi_mac_pcs_mii_write(npi_handle_t handle, uint8_t portn, uint8_t xcvr_reg, npi_status_t npi_mac_mif_link_intr_enable(npi_handle_t handle, uint8_t portn, - uint8_t xcvr_reg, uint16_t mask) + uint8_t xcvr_reg, uint16_t mask) { mif_cfg_t mif_cfg; @@ -3425,7 +3415,7 @@ npi_mac_mif_link_intr_enable(npi_handle_t handle, uint8_t portn, mif_cfg.bits.w0.phy_addr = portn; /* Port number */ mif_cfg.bits.w0.reg_addr = xcvr_reg; /* Register address */ - mif_cfg.bits.w0.indirect_md = 0; /* Clause 22 */ + mif_cfg.bits.w0.indirect_md = 0; /* Clause 22 */ mif_cfg.bits.w0.poll_en = 1; MIF_REG_WR(handle, MIF_MASK_REG, ~mask); @@ -3438,7 +3428,7 @@ npi_mac_mif_link_intr_enable(npi_handle_t handle, uint8_t portn, npi_status_t npi_mac_mif_mdio_link_intr_enable(npi_handle_t handle, uint8_t portn, - uint8_t device, uint16_t xcvr_reg, uint16_t mask) + uint8_t device, uint16_t xcvr_reg, uint16_t mask) { mif_cfg_t mif_cfg; mif_frame_t frame; @@ -3465,7 +3455,7 @@ npi_mac_mif_mdio_link_intr_enable(npi_handle_t handle, uint8_t portn, mif_cfg.bits.w0.phy_addr = portn; /* Port number */ mif_cfg.bits.w0.reg_addr = device; /* Register address */ - mif_cfg.bits.w0.indirect_md = 1; /* Clause 45 */ + mif_cfg.bits.w0.indirect_md = 1; /* Clause 45 */ mif_cfg.bits.w0.poll_en = 1; MIF_REG_WR(handle, MIF_MASK_REG, ~mask); diff --git a/usr/src/uts/common/io/nxge/npi/npi_txdma.c b/usr/src/uts/common/io/nxge/npi/npi_txdma.c index cce386ee30..74e3d5ec49 100644 --- a/usr/src/uts/common/io/nxge/npi/npi_txdma.c +++ b/usr/src/uts/common/io/nxge/npi/npi_txdma.c @@ -23,8 +23,6 @@ * Use is subject to license terms. */ -#pragma ident "%Z%%M% %I% %E% SMI" - #include <npi_txdma.h> #include <npi_tx_rd64.h> #include <npi_tx_wr64.h> @@ -130,7 +128,7 @@ npi_txdma_dump_tdc_regs(npi_handle_t handle, uint8_t tdc) { uint64_t value, offset; - int num_regs, i; + int num_regs, i; ASSERT(TXDMA_CHANNEL_VALID(tdc)); if (!TXDMA_CHANNEL_VALID(tdc)) { @@ -188,11 +186,7 @@ npi_txdma_dump_fzc_regs(npi_handle_t handle) num_regs = NUM_TX_FZC_REGS; for (i = 0; i < num_regs; i++) { -#if defined(__i386) - NXGE_REG_RD64(handle, (uint32_t)tx_fzc_offset[i], &value); -#else NXGE_REG_RD64(handle, tx_fzc_offset[i], &value); -#endif NPI_REG_DUMP_MSG((handle.function, NPI_REG_CTL, "0x%08llx " "%s\t 0x%08llx \n", tx_fzc_offset[i], @@ -208,7 +202,7 @@ npi_status_t npi_txdma_tdc_regs_zero(npi_handle_t handle, uint8_t tdc) { uint64_t value; - int num_regs, i; + int num_regs, i; ASSERT(TXDMA_CHANNEL_VALID(tdc)); if (!TXDMA_CHANNEL_VALID(tdc)) { @@ -279,7 +273,7 @@ npi_txdma_mode32_set(npi_handle_t handle, boolean_t mode_enable) * handle - NPI handle * cfgp - pointer to NPI defined data structure: * - page valid - * - mask + * - mask * - value * - relocation * channel - hardware TXDMA channel from 0 to 23. @@ -295,7 +289,7 @@ npi_txdma_mode32_set(npi_handle_t handle, boolean_t mode_enable) */ npi_status_t npi_txdma_log_page_set(npi_handle_t handle, uint8_t channel, - p_dma_log_page_t cfgp) + p_dma_log_page_t cfgp) { log_page_vld_t vld; int status; @@ -372,7 +366,7 @@ npi_txdma_log_page_set(npi_handle_t handle, uint8_t channel, * handle - NPI handle * cfgp - Get the following values (NPI defined structure): * - page valid - * - mask + * - mask * - value * - relocation * channel - hardware TXDMA channel from 0 to 23. @@ -388,7 +382,7 @@ npi_txdma_log_page_set(npi_handle_t handle, uint8_t channel, */ npi_status_t npi_txdma_log_page_get(npi_handle_t handle, uint8_t channel, - p_dma_log_page_t cfgp) + p_dma_log_page_t cfgp) { log_page_vld_t vld; int status; @@ -458,7 +452,7 @@ npi_txdma_log_page_get(npi_handle_t handle, uint8_t channel, */ npi_status_t npi_txdma_log_page_handle_set(npi_handle_t handle, uint8_t channel, - p_log_page_hdl_t hdl_p) + p_log_page_hdl_t hdl_p) { int status = NPI_SUCCESS; @@ -506,8 +500,8 @@ npi_txdma_log_page_handle_set(npi_handle_t handle, uint8_t channel, */ npi_status_t npi_txdma_log_page_config(npi_handle_t handle, io_op_t op_mode, - txdma_log_cfg_t type, uint8_t channel, - p_dma_log_page_t cfgp) + txdma_log_cfg_t type, uint8_t channel, + p_dma_log_page_t cfgp) { int status = NPI_SUCCESS; uint64_t val; @@ -666,7 +660,7 @@ npi_txdma_log_page_config(npi_handle_t handle, io_op_t op_mode, */ npi_status_t npi_txdma_log_page_vld_config(npi_handle_t handle, io_op_t op_mode, - uint8_t channel, p_log_page_vld_t vld_p) + uint8_t channel, p_log_page_vld_t vld_p) { int status = NPI_SUCCESS; log_page_vld_t vld; @@ -896,7 +890,7 @@ npi_txdma_channel_mbox_enable(npi_handle_t handle, uint8_t channel) * handle - NPI handle (virtualization flag must be defined). * control - NPI defined control type supported * - TXDMA_INIT_RESET - * - TXDMA_INIT_START + * - TXDMA_INIT_START * - TXDMA_RESET * - TXDMA_START * - TXDMA_STOP @@ -917,7 +911,7 @@ npi_txdma_channel_mbox_enable(npi_handle_t handle, uint8_t channel) */ npi_status_t npi_txdma_channel_control(npi_handle_t handle, txdma_cs_cntl_t control, - uint8_t channel) + uint8_t channel) { int status = NPI_SUCCESS; tx_cs_t cs; @@ -1034,7 +1028,7 @@ npi_txdma_channel_control(npi_handle_t handle, txdma_cs_cntl_t control, */ npi_status_t npi_txdma_control_status(npi_handle_t handle, io_op_t op_mode, - uint8_t channel, p_tx_cs_t cs_p) + uint8_t channel, p_tx_cs_t cs_p) { int status = NPI_SUCCESS; tx_cs_t txcs; @@ -1099,7 +1093,7 @@ npi_txdma_control_status(npi_handle_t handle, io_op_t op_mode, */ npi_status_t npi_txdma_event_mask(npi_handle_t handle, io_op_t op_mode, - uint8_t channel, p_tx_dma_ent_msk_t mask_p) + uint8_t channel, p_tx_dma_ent_msk_t mask_p) { int status = NPI_SUCCESS; tx_dma_ent_msk_t mask; @@ -1165,7 +1159,7 @@ npi_txdma_event_mask(npi_handle_t handle, io_op_t op_mode, */ npi_status_t npi_txdma_event_mask_config(npi_handle_t handle, io_op_t op_mode, - uint8_t channel, txdma_ent_msk_cfg_t *mask_cfgp) + uint8_t channel, txdma_ent_msk_cfg_t *mask_cfgp) { int status = NPI_SUCCESS; uint64_t configuration = *mask_cfgp; @@ -1312,7 +1306,7 @@ npi_txdma_event_mask_mk_in(npi_handle_t handle, uint8_t channel) */ npi_status_t npi_txdma_ring_addr_set(npi_handle_t handle, uint8_t channel, - uint64_t start_addr, uint32_t len) + uint64_t start_addr, uint32_t len) { int status = NPI_SUCCESS; tx_rng_cfig_t cfg; @@ -1358,7 +1352,7 @@ npi_txdma_ring_addr_set(npi_handle_t handle, uint8_t channel, */ npi_status_t npi_txdma_ring_config(npi_handle_t handle, io_op_t op_mode, - uint8_t channel, uint64_t *reg_data) + uint8_t channel, uint64_t *reg_data) { int status = NPI_SUCCESS; @@ -1416,7 +1410,7 @@ npi_txdma_ring_config(npi_handle_t handle, io_op_t op_mode, */ npi_status_t npi_txdma_mbox_config(npi_handle_t handle, io_op_t op_mode, - uint8_t channel, uint64_t *mbox_addr) + uint8_t channel, uint64_t *mbox_addr) { int status = NPI_SUCCESS; txdma_mbh_t mh; @@ -1489,9 +1483,9 @@ npi_txdma_mbox_config(npi_handle_t handle, io_op_t op_mode, */ npi_status_t npi_txdma_desc_gather_set(npi_handle_t handle, - p_tx_desc_t desc_p, uint8_t gather_index, - boolean_t mark, uint8_t ngathers, - uint64_t dma_ioaddr, uint32_t transfer_len) + p_tx_desc_t desc_p, uint8_t gather_index, + boolean_t mark, uint8_t ngathers, + uint64_t dma_ioaddr, uint32_t transfer_len) { int status; @@ -1551,9 +1545,9 @@ npi_txdma_desc_gather_set(npi_handle_t handle, */ npi_status_t npi_txdma_desc_gather_sop_set(npi_handle_t handle, - p_tx_desc_t desc_p, - boolean_t mark_mode, - uint8_t ngathers) + p_tx_desc_t desc_p, + boolean_t mark_mode, + uint8_t ngathers) { int status = NPI_SUCCESS; @@ -1567,10 +1561,10 @@ npi_txdma_desc_gather_sop_set(npi_handle_t handle, } npi_status_t npi_txdma_desc_gather_sop_set_1(npi_handle_t handle, - p_tx_desc_t desc_p, - boolean_t mark_mode, - uint8_t ngathers, - uint32_t extra) + p_tx_desc_t desc_p, + boolean_t mark_mode, + uint8_t ngathers, + uint32_t extra) { int status = NPI_SUCCESS; @@ -1586,8 +1580,8 @@ npi_txdma_desc_gather_sop_set_1(npi_handle_t handle, npi_status_t npi_txdma_desc_set_xfer_len(npi_handle_t handle, - p_tx_desc_t desc_p, - uint32_t transfer_len) + p_tx_desc_t desc_p, + uint32_t transfer_len) { int status = NPI_SUCCESS; @@ -1622,7 +1616,7 @@ npi_txdma_desc_set_zero(npi_handle_t handle, uint16_t entries) npi_status_t npi_txdma_desc_mem_get(npi_handle_t handle, uint16_t index, - p_tx_desc_t desc_p) + p_tx_desc_t desc_p) { int status = NPI_SUCCESS; @@ -1655,7 +1649,7 @@ npi_txdma_desc_mem_get(npi_handle_t handle, uint16_t index, */ npi_status_t npi_txdma_desc_kick_reg_set(npi_handle_t handle, uint8_t channel, - uint16_t tail_index, boolean_t wrap) + uint16_t tail_index, boolean_t wrap) { int status = NPI_SUCCESS; tx_ring_kick_t kick; @@ -1708,7 +1702,7 @@ npi_txdma_desc_kick_reg_set(npi_handle_t handle, uint8_t channel, */ npi_status_t npi_txdma_desc_kick_reg_get(npi_handle_t handle, uint8_t channel, - p_tx_ring_kick_t kick_p) + p_tx_ring_kick_t kick_p) { int status = NPI_SUCCESS; @@ -1748,7 +1742,7 @@ npi_txdma_desc_kick_reg_get(npi_handle_t handle, uint8_t channel, */ npi_status_t npi_txdma_ring_head_get(npi_handle_t handle, uint8_t channel, - p_tx_ring_hdl_t hdl_p) + p_tx_ring_hdl_t hdl_p) { int status = NPI_SUCCESS; @@ -1769,7 +1763,7 @@ npi_txdma_ring_head_get(npi_handle_t handle, uint8_t channel, /*ARGSUSED*/ npi_status_t npi_txdma_channel_mbox_get(npi_handle_t handle, uint8_t channel, - p_txdma_mailbox_t mbox_p) + p_txdma_mailbox_t mbox_p) { int status = NPI_SUCCESS; @@ -1779,7 +1773,7 @@ npi_txdma_channel_mbox_get(npi_handle_t handle, uint8_t channel, npi_status_t npi_txdma_channel_pre_state_get(npi_handle_t handle, uint8_t channel, - p_tx_dma_pre_st_t prep) + p_tx_dma_pre_st_t prep) { int status = NPI_SUCCESS; @@ -1799,7 +1793,7 @@ npi_txdma_channel_pre_state_get(npi_handle_t handle, uint8_t channel, npi_status_t npi_txdma_ring_error_get(npi_handle_t handle, uint8_t channel, - p_txdma_ring_errlog_t ring_errlog_p) + p_txdma_ring_errlog_t ring_errlog_p) { tx_rng_err_logh_t logh; tx_rng_err_logl_t logl; @@ -1915,7 +1909,7 @@ void npi_txdma_dump_desc_one(npi_handle_t handle, p_tx_desc_t desc_p, int desc_index) { - tx_desc_t desc, *desp; + tx_desc_t desc, *desp; #ifdef NXGE_DEBUG uint64_t sad; int xfer_len; @@ -1977,7 +1971,7 @@ npi_txdma_dump_hdr(npi_handle_t handle, p_tx_pkt_header_t hdrp) npi_status_t npi_txdma_inj_int_error_set(npi_handle_t handle, uint8_t channel, - p_tdmc_intr_dbg_t erp) + p_tdmc_intr_dbg_t erp) { int status = NPI_SUCCESS; diff --git a/usr/src/uts/common/io/nxge/nxge_fflp.c b/usr/src/uts/common/io/nxge/nxge_fflp.c index cb6eb78b15..8fc70d7b1b 100644 --- a/usr/src/uts/common/io/nxge/nxge_fflp.c +++ b/usr/src/uts/common/io/nxge/nxge_fflp.c @@ -627,7 +627,7 @@ nxge_fflp_hw_reset(p_nxge_t nxgep) nxge_status_t nxge_cfg_ip_cls_flow_key(p_nxge_t nxgep, tcam_class_t l3_class, - uint32_t class_config) + uint32_t class_config) { flow_key_cfg_t fcfg; npi_handle_t handle; @@ -667,7 +667,7 @@ nxge_cfg_ip_cls_flow_key(p_nxge_t nxgep, tcam_class_t l3_class, nxge_status_t nxge_cfg_ip_cls_flow_key_get(p_nxge_t nxgep, tcam_class_t l3_class, - uint32_t *class_config) + uint32_t *class_config) { flow_key_cfg_t fcfg; npi_handle_t handle; @@ -713,7 +713,7 @@ nxge_cfg_ip_cls_flow_key_get(p_nxge_t nxgep, tcam_class_t l3_class, static nxge_status_t nxge_cfg_tcam_ip_class_get(p_nxge_t nxgep, tcam_class_t class, - uint32_t *class_config) + uint32_t *class_config) { npi_status_t rs = NPI_SUCCESS; tcam_key_cfg_t cfg; @@ -745,7 +745,7 @@ nxge_cfg_tcam_ip_class_get(p_nxge_t nxgep, tcam_class_t class, static nxge_status_t nxge_cfg_tcam_ip_class(p_nxge_t nxgep, tcam_class_t class, - uint32_t class_config) + uint32_t class_config) { npi_status_t rs = NPI_SUCCESS; tcam_key_cfg_t cfg; @@ -904,7 +904,7 @@ nxge_get_rdc_offset(p_nxge_t nxgep, uint8_t class, uint64_t cookie) /* ARGSUSED */ static void nxge_fill_tcam_entry_udp(p_nxge_t nxgep, flow_spec_t *flow_spec, - tcam_entry_t *tcam_ptr) + tcam_entry_t *tcam_ptr) { #define fspec_key (flow_spec->uh.udpip4spec) #define fspec_mask (flow_spec->um.udpip4spec) @@ -931,7 +931,7 @@ nxge_fill_tcam_entry_udp(p_nxge_t nxgep, flow_spec_t *flow_spec, static void nxge_fill_tcam_entry_udp_ipv6(p_nxge_t nxgep, flow_spec_t *flow_spec, - tcam_entry_t *tcam_ptr) + tcam_entry_t *tcam_ptr) { p_nxge_class_pt_cfg_t p_class_cfgp; #define fspec_key (flow_spec->uh.udpip6spec) @@ -964,7 +964,7 @@ nxge_fill_tcam_entry_udp_ipv6(p_nxge_t nxgep, flow_spec_t *flow_spec, /* ARGSUSED */ static void nxge_fill_tcam_entry_tcp(p_nxge_t nxgep, flow_spec_t *flow_spec, - tcam_entry_t *tcam_ptr) + tcam_entry_t *tcam_ptr) { #define fspec_key (flow_spec->uh.tcpip4spec) #define fspec_mask (flow_spec->um.tcpip4spec) @@ -990,7 +990,7 @@ nxge_fill_tcam_entry_tcp(p_nxge_t nxgep, flow_spec_t *flow_spec, /* ARGSUSED */ static void nxge_fill_tcam_entry_sctp(p_nxge_t nxgep, flow_spec_t *flow_spec, - tcam_entry_t *tcam_ptr) + tcam_entry_t *tcam_ptr) { #define fspec_key (flow_spec->uh.tcpip4spec) #define fspec_mask (flow_spec->um.tcpip4spec) @@ -1015,7 +1015,7 @@ nxge_fill_tcam_entry_sctp(p_nxge_t nxgep, flow_spec_t *flow_spec, static void nxge_fill_tcam_entry_tcp_ipv6(p_nxge_t nxgep, flow_spec_t *flow_spec, - tcam_entry_t *tcam_ptr) + tcam_entry_t *tcam_ptr) { p_nxge_class_pt_cfg_t p_class_cfgp; #define fspec_key (flow_spec->uh.tcpip6spec) @@ -1047,7 +1047,7 @@ nxge_fill_tcam_entry_tcp_ipv6(p_nxge_t nxgep, flow_spec_t *flow_spec, static void nxge_fill_tcam_entry_sctp_ipv6(p_nxge_t nxgep, flow_spec_t *flow_spec, - tcam_entry_t *tcam_ptr) + tcam_entry_t *tcam_ptr) { p_nxge_class_pt_cfg_t p_class_cfgp; #define fspec_key (flow_spec->uh.tcpip6spec) @@ -1081,7 +1081,7 @@ nxge_fill_tcam_entry_sctp_ipv6(p_nxge_t nxgep, flow_spec_t *flow_spec, /* ARGSUSED */ static void nxge_fill_tcam_entry_ah_esp(p_nxge_t nxgep, flow_spec_t *flow_spec, - tcam_entry_t *tcam_ptr) + tcam_entry_t *tcam_ptr) { #define fspec_key (flow_spec->uh.ahip4spec) #define fspec_mask (flow_spec->um.ahip4spec) @@ -1113,7 +1113,7 @@ nxge_fill_tcam_entry_ah_esp(p_nxge_t nxgep, flow_spec_t *flow_spec, static void nxge_fill_tcam_entry_ah_esp_ipv6(p_nxge_t nxgep, flow_spec_t *flow_spec, - tcam_entry_t *tcam_ptr) + tcam_entry_t *tcam_ptr) { p_nxge_class_pt_cfg_t p_class_cfgp; #define fspec_key (flow_spec->uh.ahip6spec) @@ -1150,7 +1150,7 @@ nxge_fill_tcam_entry_ah_esp_ipv6(p_nxge_t nxgep, flow_spec_t *flow_spec, /* ARGSUSED */ static void nxge_fill_tcam_entry_ip_usr(p_nxge_t nxgep, flow_spec_t *flow_spec, - tcam_entry_t *tcam_ptr, tcam_class_t class) + tcam_entry_t *tcam_ptr, tcam_class_t class) { #define fspec_key (flow_spec->uh.ip_usr_spec) #define fspec_mask (flow_spec->um.ip_usr_spec) @@ -1180,7 +1180,7 @@ nxge_fill_tcam_entry_ip_usr(p_nxge_t nxgep, flow_spec_t *flow_spec, nxge_status_t nxge_flow_get_hash(p_nxge_t nxgep, flow_resource_t *flow_res, - uint32_t *H1, uint16_t *H2) + uint32_t *H1, uint16_t *H2) { flow_spec_t *flow_spec; uint32_t class_cfg; @@ -1794,7 +1794,7 @@ nxge_fflp_config_llc_snap_disable(p_nxge_t nxgep) nxge_status_t nxge_fflp_ip_usr_class_config(p_nxge_t nxgep, tcam_class_t class, - uint32_t config) + uint32_t config) { npi_status_t rs = NPI_SUCCESS; npi_handle_t handle = nxgep->npi_reg_handle; @@ -1875,7 +1875,7 @@ nxge_fflp_ip_class_config(p_nxge_t nxgep, tcam_class_t class, uint32_t config) nxge_status_t nxge_fflp_ip_class_config_get(p_nxge_t nxgep, tcam_class_t class, - uint32_t *config) + uint32_t *config) { uint32_t t_class_config, f_class_config; int t_status = NXGE_OK; @@ -2028,11 +2028,7 @@ nxge_fflp_update_hw(p_nxge_t nxgep) /* configure vlan tables */ pa = (p_nxge_param_t)&nxgep->param_arr[param_vlan_2rdc_grp]; -#if defined(__i386) - val_ptr = (uint64_t *)(uint32_t)pa->value; -#else val_ptr = (uint64_t *)pa->value; -#endif cfgd_vlans = ((pa->type & NXGE_PARAM_ARRAY_CNT_MASK) >> NXGE_PARAM_ARRAY_CNT_SHIFT); @@ -2052,11 +2048,7 @@ nxge_fflp_update_hw(p_nxge_t nxgep) /* config MAC addresses */ num_macs = p_cfgp->max_macs; pa = (p_nxge_param_t)&nxgep->param_arr[param_mac_2rdc_grp]; -#if defined(__i386) - val_ptr = (uint64_t *)(uint32_t)pa->value; -#else val_ptr = (uint64_t *)pa->value; -#endif for (alt_mac = 0; alt_mac < num_macs; alt_mac++) { if (p_class_cfgp->mac_host_info[alt_mac].flag) { @@ -2261,10 +2253,11 @@ nxge_fflp_handle_sys_errors(p_nxge_t nxgep) } int -nxge_get_valid_tcam_cnt(p_nxge_t nxgep) { +nxge_get_valid_tcam_cnt(p_nxge_t nxgep) +{ return ((nxgep->classifier.fragment_bug == 1) ? - nxgep->classifier.tcam_entry_cnt - 1 : - nxgep->classifier.tcam_entry_cnt); + nxgep->classifier.tcam_entry_cnt - 1 : + nxgep->classifier.tcam_entry_cnt); } int @@ -2399,7 +2392,8 @@ nxge_tcam_get_index(p_nxge_t nxgep, uint16_t index) } static uint32_t -nxge_tcam_cls_to_flow(uint32_t class_code) { +nxge_tcam_cls_to_flow(uint32_t class_code) +{ switch (class_code) { case TCAM_CLASS_TCP_IPV4: return (FSPEC_TCPIP4); @@ -2433,7 +2427,7 @@ nxge_tcam_cls_to_flow(uint32_t class_code) { void nxge_get_tcam_entry(p_nxge_t nxgep, flow_resource_t *fs) { - uint16_t index; + uint16_t index; tcam_flow_spec_t *tcam_ep; tcam_entry_t *tp; flow_spec_t *fspec; @@ -2515,7 +2509,7 @@ void nxge_del_tcam_entry(p_nxge_t nxgep, uint32_t location) { npi_status_t rs = NPI_SUCCESS; - uint16_t index; + uint16_t index; tcam_flow_spec_t *tcam_ep; tcam_entry_t *tp; tcam_class_t class; @@ -2616,7 +2610,7 @@ nxge_iptun_pkt_type_to_pid(uint8_t pkt_type) static npi_status_t nxge_set_iptun_usr_cls_reg(p_nxge_t nxgep, uint64_t class, - iptun_cfg_t *iptunp) + iptun_cfg_t *iptunp) { npi_handle_t handle = nxgep->npi_reg_handle; npi_status_t rs = NPI_SUCCESS; @@ -2646,7 +2640,7 @@ nxge_set_iptun_usr_cls_reg(p_nxge_t nxgep, uint64_t class, void nxge_add_iptun_class(p_nxge_t nxgep, iptun_cfg_t *iptunp, - uint8_t *cls_idp) + uint8_t *cls_idp) { int i, add_cls; uint8_t pid; diff --git a/usr/src/uts/common/io/nxge/nxge_fzc.c b/usr/src/uts/common/io/nxge/nxge_fzc.c index 4205a0170a..8350f00f81 100644 --- a/usr/src/uts/common/io/nxge/nxge_fzc.c +++ b/usr/src/uts/common/io/nxge/nxge_fzc.c @@ -268,8 +268,8 @@ nxge_fzc_intr_sid_set(p_nxge_t nxgep) * guest domain, who cannot access these registers. * * Arguments: - * nxgep - * channel The channel to initialize. + * nxgep + * channel The channel to initialize. * * NPI_NXGE function calls: * nxge_init_fzc_rdc_pages() @@ -377,8 +377,8 @@ nxge_init_fzc_rdc(p_nxge_t nxgep, uint16_t channel) * Initialize all per-channel FZC_DMC registers. * * Arguments: - * nxgep - * channel The channel to start + * nxgep + * channel The channel to start * * NPI_NXGE function calls: * nxge_init_hv_fzc_rxdma_channel_pages() @@ -454,10 +454,10 @@ nxge_init_fzc_rxdma_channel(p_nxge_t nxgep, uint16_t channel) * a guest domain, to whom this RDC has been loaned. * * Arguments: - * nxgep - * channel The channel to initialize. - * page0 Logical page 0 definition. - * page1 Logical page 1 definition. + * nxgep + * channel The channel to initialize. + * page0 Logical page 0 definition. + * page1 Logical page 1 definition. * * Notes: * I think that this function can be called from any @@ -531,7 +531,7 @@ nxge_init_fzc_rdc_pages( /*ARGSUSED*/ nxge_status_t nxge_init_fzc_rxdma_channel_pages(p_nxge_t nxgep, - uint16_t channel, p_rx_rbr_ring_t rbrp) + uint16_t channel, p_rx_rbr_ring_t rbrp) { npi_handle_t handle; dma_log_page_t cfg; @@ -587,7 +587,7 @@ nxge_init_fzc_rxdma_channel_pages(p_nxge_t nxgep, /*ARGSUSED*/ nxge_status_t nxge_init_fzc_rxdma_channel_red(p_nxge_t nxgep, - uint16_t channel, p_rx_rcr_ring_t rcr_p) + uint16_t channel, p_rx_rcr_ring_t rcr_p) { npi_handle_t handle; rdc_red_para_t red; @@ -626,8 +626,8 @@ nxge_init_fzc_rxdma_channel_red(p_nxge_t nxgep, * guest domain, who cannot access these registers. * * Arguments: - * nxgep - * channel The channel to initialize. + * nxgep + * channel The channel to initialize. * * NPI_NXGE function calls: * nxge_init_fzc_tdc_pages() @@ -709,7 +709,7 @@ nxge_init_fzc_tdc(p_nxge_t nxgep, uint16_t channel) /*ARGSUSED*/ nxge_status_t nxge_init_fzc_txdma_channel(p_nxge_t nxgep, uint16_t channel, - p_tx_ring_t tx_ring_p, p_tx_mbox_t mbox_p) + p_tx_ring_t tx_ring_p, p_tx_mbox_t mbox_p) { nxge_status_t status = NXGE_OK; @@ -791,14 +791,6 @@ nxge_init_fzc_rx_common(p_nxge_t nxgep) if (rs != NPI_SUCCESS) return (NXGE_ERROR | rs); -#if defined(__i386) - rs = npi_rxdma_cfg_32bitmode_enable(handle); - if (rs != NPI_SUCCESS) - return (NXGE_ERROR | rs); - rs = npi_txdma_mode32_set(handle, B_TRUE); - if (rs != NPI_SUCCESS) - return (NXGE_ERROR | rs); -#endif /* * Enable WRED and program an initial value. @@ -970,10 +962,10 @@ nxge_init_fzc_rxdma_port(p_nxge_t nxgep) npi_handle_t handle; p_nxge_dma_pt_cfg_t p_all_cfgp; p_nxge_hw_pt_cfg_t p_cfgp; - hostinfo_t hostinfo; + hostinfo_t hostinfo; int i; npi_status_t rs = NPI_SUCCESS; - p_nxge_class_pt_cfg_t p_class_cfgp; + p_nxge_class_pt_cfg_t p_class_cfgp; NXGE_DEBUG_MSG((nxgep, DMA_CTL, "==> nxge_init_fzc_rxdma_port")); p_all_cfgp = (p_nxge_dma_pt_cfg_t)&nxgep->pt_config; @@ -1050,10 +1042,10 @@ nxge_fzc_dmc_def_port_rdc(p_nxge_t nxgep, uint8_t port, uint16_t rdc) * a guest domain, to whom this TDC has been loaned. * * Arguments: - * nxgep - * channel The channel to initialize. - * page0 Logical page 0 definition. - * page1 Logical page 1 definition. + * nxgep + * channel The channel to initialize. + * page0 Logical page 0 definition. + * page1 Logical page 1 definition. * * Notes: * I think that this function can be called from any @@ -1126,7 +1118,7 @@ nxge_init_fzc_tdc_pages( nxge_status_t nxge_init_fzc_txdma_channel_pages(p_nxge_t nxgep, uint16_t channel, - p_tx_ring_t tx_ring_p) + p_tx_ring_t tx_ring_p) { npi_handle_t handle; dma_log_page_t cfg; @@ -1195,7 +1187,7 @@ nxge_init_fzc_txdma_channel_pages(p_nxge_t nxgep, uint16_t channel, nxge_status_t nxge_init_fzc_txdma_channel_drr(p_nxge_t nxgep, uint16_t channel, - p_tx_ring_t tx_ring_p) + p_tx_ring_t tx_ring_p) { npi_status_t rs = NPI_SUCCESS; npi_handle_t handle; @@ -1231,9 +1223,9 @@ nxge_fzc_sys_err_mask_set(p_nxge_t nxgep, uint64_t mask) * Configure a TDC's logical pages. * * Arguments: - * nxgep - * channel The channel to initialize. - * tx_ring_p The transmit ring. + * nxgep + * channel The channel to initialize. + * tx_ring_p The transmit ring. * * Notes: * I think that this function can be called from any @@ -1249,7 +1241,7 @@ nxge_fzc_sys_err_mask_set(p_nxge_t nxgep, uint64_t mask) #if defined(sun4v) && defined(NIU_LP_WORKAROUND) nxge_status_t nxge_init_hv_fzc_txdma_channel_pages(p_nxge_t nxgep, uint16_t channel, - p_tx_ring_t tx_ring_p) + p_tx_ring_t tx_ring_p) { int err; uint64_t hverr; @@ -1390,7 +1382,7 @@ nxge_init_hv_fzc_txdma_channel_pages(p_nxge_t nxgep, uint16_t channel, /*ARGSUSED*/ nxge_status_t nxge_init_hv_fzc_rxdma_channel_pages(p_nxge_t nxgep, - uint16_t channel, p_rx_rbr_ring_t rbrp) + uint16_t channel, p_rx_rbr_ring_t rbrp) { int err; uint64_t hverr; diff --git a/usr/src/uts/common/io/nxge/nxge_mac.c b/usr/src/uts/common/io/nxge/nxge_mac.c index f1cd6511c4..a045316e3f 100644 --- a/usr/src/uts/common/io/nxge/nxge_mac.c +++ b/usr/src/uts/common/io/nxge/nxge_mac.c @@ -4830,21 +4830,13 @@ nxge_mii_xcvr_init(p_nxge_t nxgep) bmcr.value = 0; bmcr.bits.reset = 1; if ((status = nxge_mii_write(nxgep, xcvr_portn, -#if defined(__i386) - (uint8_t)(uint32_t)&mii_regs->bmcr, -#else (uint8_t)(uint64_t)&mii_regs->bmcr, -#endif bmcr.value)) != NXGE_OK) goto fail; do { drv_usecwait(500); if ((status = nxge_mii_read(nxgep, xcvr_portn, -#if defined(__i386) - (uint8_t)(uint32_t)&mii_regs->bmcr, -#else (uint8_t)(uint64_t)&mii_regs->bmcr, -#endif &bmcr.value)) != NXGE_OK) goto fail; delay++; @@ -4855,11 +4847,7 @@ nxge_mii_xcvr_init(p_nxge_t nxgep) } if ((status = nxge_mii_read(nxgep, xcvr_portn, -#if defined(__i386) - (uint8_t)(uint32_t)(&mii_regs->bmsr), -#else (uint8_t)(uint64_t)(&mii_regs->bmsr), -#endif &bmsr.value)) != NXGE_OK) goto fail; @@ -4904,11 +4892,7 @@ nxge_mii_xcvr_init(p_nxge_t nxgep) */ if (bmsr.bits.extend_status) { if ((status = nxge_mii_read(nxgep, xcvr_portn, -#if defined(__i386) - (uint8_t)(uint32_t)(&mii_regs->esr), -#else (uint8_t)(uint64_t)(&mii_regs->esr), -#endif &esr.value)) != NXGE_OK) goto fail; param_arr[param_anar_1000fdx].value &= esr.bits.link_1000fdx; @@ -4943,11 +4927,7 @@ nxge_mii_xcvr_init(p_nxge_t nxgep) */ bmcr.value = 0; if ((status = nxge_mii_write(nxgep, xcvr_portn, -#if defined(__i386) - (uint8_t)(uint32_t)(&mii_regs->bmcr), -#else (uint8_t)(uint64_t)(&mii_regs->bmcr), -#endif bmcr.value)) != NXGE_OK) goto fail; @@ -5000,11 +4980,7 @@ nxge_mii_xcvr_init(p_nxge_t nxgep) /* Write to the auto-negotiation advertisement register */ if ((status = nxge_mii_write(nxgep, xcvr_portn, -#if defined(__i386) - (uint8_t)(uint32_t)(&mii_regs->anar), -#else (uint8_t)(uint64_t)(&mii_regs->anar), -#endif anar.value)) != NXGE_OK) goto fail; if (bmsr.bits.extend_status) { @@ -5018,11 +4994,7 @@ nxge_mii_xcvr_init(p_nxge_t nxgep) gcr.bits.link_1000hdx = param_arr[param_anar_1000hdx].value; if ((status = nxge_mii_write(nxgep, xcvr_portn, -#if defined(__i386) - (uint8_t)(uint32_t)(&mii_regs->gcr), -#else (uint8_t)(uint64_t)(&mii_regs->gcr), -#endif gcr.value)) != NXGE_OK) goto fail; } @@ -5048,11 +5020,7 @@ nxge_mii_xcvr_init(p_nxge_t nxgep) gcr.bits.master = param_arr[param_master_cfg_value].value; if ((status = nxge_mii_write(nxgep, xcvr_portn, -#if defined(__i386) - (uint8_t)(uint32_t)(&mii_regs->gcr), -#else (uint8_t)(uint64_t)(&mii_regs->gcr), -#endif gcr.value)) != NXGE_OK) goto fail; if (param_arr[param_anar_1000fdx].value) { @@ -5095,11 +5063,7 @@ nxge_mii_xcvr_init(p_nxge_t nxgep) gcr.bits.ms_mode_en = 1; gcr.bits.master = 1; if ((status = nxge_mii_write(nxgep, xcvr_portn, -#if defined(__i386) - (uint8_t)(uint32_t)(&mii_regs->gcr), -#else (uint8_t)(uint64_t)(&mii_regs->gcr), -#endif gcr.value)) != NXGE_OK) goto fail; bmcr.value = 0; @@ -5123,20 +5087,12 @@ nxge_mii_xcvr_init(p_nxge_t nxgep) } if ((status = nxge_mii_write(nxgep, xcvr_portn, -#if defined(__i386) - (uint8_t)(uint32_t)(&mii_regs->bmcr), -#else (uint8_t)(uint64_t)(&mii_regs->bmcr), -#endif bmcr.value)) != NXGE_OK) goto fail; if ((status = nxge_mii_read(nxgep, xcvr_portn, -#if defined(__i386) - (uint8_t)(uint32_t)(&mii_regs->bmcr), -#else (uint8_t)(uint64_t)(&mii_regs->bmcr), -#endif &bmcr.value)) != NXGE_OK) goto fail; NXGE_DEBUG_MSG((nxgep, MAC_CTL, "bmcr = 0x%04X", bmcr.value)); @@ -5147,11 +5103,7 @@ nxge_mii_xcvr_init(p_nxge_t nxgep) nxgep->soft_bmsr.value = 0; if ((status = nxge_mii_read(nxgep, xcvr_portn, -#if defined(__i386) - (uint8_t)(uint32_t)(&mii_regs->bmsr), -#else (uint8_t)(uint64_t)(&mii_regs->bmsr), -#endif &nxgep->bmsr.value)) != NXGE_OK) goto fail; @@ -5199,29 +5151,15 @@ nxge_mii_xcvr_fiber_init(p_nxge_t nxgep) bmcr.value = 0; bmcr.bits.reset = 1; -#if defined(__i386) - - if ((status = nxge_mii_write(nxgep, xcvr_portn, - (uint8_t)(uint32_t)(&mii_regs->bmcr), bmcr.value)) != NXGE_OK) - goto fail; -#else if ((status = nxge_mii_write(nxgep, xcvr_portn, (uint8_t)(uint64_t)(&mii_regs->bmcr), bmcr.value)) != NXGE_OK) goto fail; -#endif do { drv_usecwait(500); -#if defined(__i386) - if ((status = nxge_mii_read(nxgep, xcvr_portn, - (uint8_t)(uint32_t)(&mii_regs->bmcr), &bmcr.value)) - != NXGE_OK) - goto fail; -#else if ((status = nxge_mii_read(nxgep, xcvr_portn, (uint8_t)(uint64_t)(&mii_regs->bmcr), &bmcr.value)) != NXGE_OK) goto fail; -#endif delay++; } while ((bmcr.bits.reset) && (delay < 1000)); if (delay == 1000) { @@ -5229,15 +5167,9 @@ nxge_mii_xcvr_fiber_init(p_nxge_t nxgep) goto fail; } -#if defined(__i386) - if ((status = nxge_mii_read(nxgep, xcvr_portn, - (uint8_t)(uint32_t)(&mii_regs->bmsr), &bmsr.value)) != NXGE_OK) - goto fail; -#else if ((status = nxge_mii_read(nxgep, xcvr_portn, (uint8_t)(uint64_t)(&mii_regs->bmsr), &bmsr.value)) != NXGE_OK) goto fail; -#endif param_arr[param_autoneg].value &= bmsr.bits.auto_neg_able; param_arr[param_anar_100T4].value = 0; @@ -5278,17 +5210,10 @@ nxge_mii_xcvr_fiber_init(p_nxge_t nxgep) * running a Gigibit phy. */ if (bmsr.bits.extend_status) { -#if defined(__i386) - if ((status = nxge_mii_read(nxgep, xcvr_portn, - (uint8_t)(uint32_t)(&mii_regs->esr), &esr.value)) != - NXGE_OK) - goto fail; -#else if ((status = nxge_mii_read(nxgep, xcvr_portn, (uint8_t)(uint64_t)(&mii_regs->esr), &esr.value)) != NXGE_OK) goto fail; -#endif param_arr[param_anar_1000fdx].value &= esr.bits.link_1000fdx; param_arr[param_anar_1000hdx].value = 0; @@ -5321,15 +5246,9 @@ nxge_mii_xcvr_fiber_init(p_nxge_t nxgep) * Switch off Auto-negotiation, 100M and full duplex. */ bmcr.value = 0; -#if defined(__i386) - if ((status = nxge_mii_write(nxgep, xcvr_portn, - (uint8_t)(uint32_t)(&mii_regs->bmcr), bmcr.value)) != NXGE_OK) - goto fail; -#else if ((status = nxge_mii_write(nxgep, xcvr_portn, (uint8_t)(uint64_t)(&mii_regs->bmcr), bmcr.value)) != NXGE_OK) goto fail; -#endif if ((statsp->port_stats.lb_mode == nxge_lb_phy) || (statsp->port_stats.lb_mode == nxge_lb_phy1000)) { @@ -5365,47 +5284,27 @@ nxge_mii_xcvr_fiber_init(p_nxge_t nxgep) gcr.value = 0; gcr.bits.ms_mode_en = 1; gcr.bits.master = 1; -#if defined(__i386) - if ((status = nxge_mii_write(nxgep, xcvr_portn, - (uint8_t)(uint32_t)(&mii_regs->gcr), - gcr.value)) != NXGE_OK) - goto fail; -#else if ((status = nxge_mii_write(nxgep, xcvr_portn, (uint8_t)(uint64_t)(&mii_regs->gcr), gcr.value)) != NXGE_OK) goto fail; -#endif bmcr.value = 0; bmcr.bits.speed_1000_sel = 1; statsp->mac_stats.link_speed = 1000; } -#if defined(__i386) - if ((status = nxge_mii_write(nxgep, xcvr_portn, - (uint8_t)(uint32_t)(&mii_regs->bmcr), - bmcr.value)) != NXGE_OK) - goto fail; -#else if ((status = nxge_mii_write(nxgep, xcvr_portn, (uint8_t)(uint64_t)(&mii_regs->bmcr), bmcr.value)) != NXGE_OK) goto fail; -#endif NXGE_DEBUG_MSG((nxgep, MAC_CTL, "nxge_mii_xcvr_fiber_init: value wrote bmcr = 0x%x", bmcr.value)); -#if defined(__i386) - if ((status = nxge_mii_read(nxgep, xcvr_portn, - (uint8_t)(uint32_t)(&mii_regs->bmcr), &bmcr.value)) != NXGE_OK) - goto fail; -#else if ((status = nxge_mii_read(nxgep, xcvr_portn, (uint8_t)(uint64_t)(&mii_regs->bmcr), &bmcr.value)) != NXGE_OK) goto fail; -#endif NXGE_DEBUG_MSG((nxgep, MAC_CTL, "nxge_mii_xcvr_fiber_init: read bmcr = 0x%04X", bmcr.value)); @@ -5414,17 +5313,10 @@ nxge_mii_xcvr_fiber_init(p_nxge_t nxgep) * Initialize the xcvr status kept in the context structure. */ nxgep->soft_bmsr.value = 0; -#if defined(__i386) - if ((status = nxge_mii_read(nxgep, xcvr_portn, - (uint8_t)(uint32_t)(&mii_regs->bmsr), - &nxgep->bmsr.value)) != NXGE_OK) - goto fail; -#else if ((status = nxge_mii_read(nxgep, xcvr_portn, (uint8_t)(uint64_t)(&mii_regs->bmsr), &nxgep->bmsr.value)) != NXGE_OK) goto fail; -#endif statsp->mac_stats.xcvr_inits++; nxgep->bmsr.value = 0; @@ -5695,29 +5587,17 @@ nxge_mii_check(p_nxge_t nxgep, mii_bmsr_t bmsr, mii_bmsr_t bmsr_ints, param_arr[param_autoneg].value) { if ((status = nxge_mii_read(nxgep, statsp->mac_stats.xcvr_portn, -#if defined(__i386) - (uint8_t)(uint32_t)(&mii_regs->anar), -#else (uint8_t)(uint64_t)(&mii_regs->anar), -#endif &anar.value)) != NXGE_OK) goto fail; if ((status = nxge_mii_read(nxgep, statsp->mac_stats.xcvr_portn, -#if defined(__i386) - (uint8_t)(uint32_t)(&mii_regs->anlpar), -#else (uint8_t)(uint64_t)(&mii_regs->anlpar), -#endif &anlpar.value)) != NXGE_OK) goto fail; if ((status = nxge_mii_read(nxgep, statsp->mac_stats.xcvr_portn, -#if defined(__i386) - (uint8_t)(uint32_t)(&mii_regs->aner), -#else (uint8_t)(uint64_t)(&mii_regs->aner), -#endif &aner.value)) != NXGE_OK) goto fail; statsp->mac_stats.lp_cap_autoneg = aner.bits.lp_an_able; @@ -5736,11 +5616,7 @@ nxge_mii_check(p_nxge_t nxgep, mii_bmsr_t bmsr, mii_bmsr_t bmsr_ints, param_arr[param_anar_1000hdx].value) { if ((status = nxge_mii_read(nxgep, statsp->mac_stats.xcvr_portn, -#if defined(__i386) - (uint8_t)(uint32_t)(&mii_regs->gsr), -#else (uint8_t)(uint64_t)(&mii_regs->gsr), -#endif &gsr.value)) != NXGE_OK) goto fail; statsp->mac_stats.lp_cap_1000fdx = @@ -6069,11 +5945,7 @@ nxge_check_mii_link(p_nxge_t nxgep) bmsr_data.value = 0; if ((status = nxge_mii_read(nxgep, nxgep->statsp->mac_stats.xcvr_portn, -#if defined(__i386) - (uint8_t)(uint32_t)(&mii_regs->bmsr), -#else (uint8_t)(uint64_t)(&mii_regs->bmsr), -#endif &bmsr_data.value)) != NXGE_OK) { goto fail; } @@ -6086,20 +5958,12 @@ nxge_check_mii_link(p_nxge_t nxgep) if (nxgep->param_arr[param_autoneg].value) { if ((status = nxge_mii_read(nxgep, nxgep->statsp->mac_stats.xcvr_portn, -#if defined(__i386) - (uint8_t)(uint32_t)(&mii_regs->gsr), -#else (uint8_t)(uint64_t)(&mii_regs->gsr), -#endif &gsr.value)) != NXGE_OK) goto fail; if ((status = nxge_mii_read(nxgep, nxgep->statsp->mac_stats.xcvr_portn, -#if defined(__i386) - (uint8_t)(uint32_t)(&mii_regs->anlpar), -#else (uint8_t)(uint64_t)(&mii_regs->anlpar), -#endif &anlpar.value)) != NXGE_OK) goto fail; if (nxgep->mac.portmode != PORT_1G_RGMII_FIBER) { @@ -8544,31 +8408,16 @@ nxge_mii_get_link_mode(p_nxge_t nxgep) mii_regs = NULL; mode.value = 0; mode.bits.shadow = NXGE_MII_MODE_CONTROL_REG; -#if defined(__i386) - if ((status = nxge_mii_write(nxgep, xcvr_portn, - (uint8_t)(uint32_t)(&mii_regs->shadow), - mode.value)) != NXGE_OK) { - goto fail; -#else if ((status = nxge_mii_write(nxgep, xcvr_portn, (uint8_t)(uint64_t)(&mii_regs->shadow), mode.value)) != NXGE_OK) { goto fail; -#endif - } -#if defined(__i386) - if ((status = nxge_mii_read(nxgep, xcvr_portn, - (uint8_t)(uint32_t)(&mii_regs->shadow), - &mode.value)) != NXGE_OK) { - goto fail; } -#else if ((status = nxge_mii_read(nxgep, xcvr_portn, (uint8_t)(uint64_t)(&mii_regs->shadow), &mode.value)) != NXGE_OK) { goto fail; } -#endif if (mode.bits.mode == NXGE_MODE_SELECT_FIBER) { nxgep->mac.portmode = PORT_1G_RGMII_FIBER; @@ -8804,50 +8653,27 @@ nxge_mii_dump(p_nxge_t nxgep) mii_regs = NULL; -#if defined(__i386) - (void) nxge_mii_read(nxgep, nxgep->statsp->mac_stats.xcvr_portn, - (uint8_t)(uint32_t)(&mii_regs->bmcr), &bmcr.value); -#else (void) nxge_mii_read(nxgep, nxgep->statsp->mac_stats.xcvr_portn, (uint8_t)(uint64_t)(&mii_regs->bmcr), &bmcr.value); -#endif NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, "nxge_mii_dump: bmcr (0) xcvr 0x%x value 0x%x", xcvr_portn, bmcr.value)); -#if defined(__i386) - (void) nxge_mii_read(nxgep, - nxgep->statsp->mac_stats.xcvr_portn, - (uint8_t)(uint32_t)(&mii_regs->bmsr), &bmsr.value); -#else (void) nxge_mii_read(nxgep, nxgep->statsp->mac_stats.xcvr_portn, (uint8_t)(uint64_t)(&mii_regs->bmsr), &bmsr.value); -#endif NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, "nxge_mii_dump: bmsr (1) xcvr 0x%x value 0x%x", xcvr_portn, bmsr.value)); -#if defined(__i386) - (void) nxge_mii_read(nxgep, - nxgep->statsp->mac_stats.xcvr_portn, - (uint8_t)(uint32_t)(&mii_regs->idr1), &idr1.value); -#else (void) nxge_mii_read(nxgep, nxgep->statsp->mac_stats.xcvr_portn, (uint8_t)(uint64_t)(&mii_regs->idr1), &idr1.value); -#endif -#if defined(__i386) - (void) nxge_mii_read(nxgep, - nxgep->statsp->mac_stats.xcvr_portn, - (uint8_t)(uint32_t)(&mii_regs->idr2), &idr2.value); -#else (void) nxge_mii_read(nxgep, nxgep->statsp->mac_stats.xcvr_portn, (uint8_t)(uint64_t)(&mii_regs->idr2), &idr2.value); -#endif NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, "nxge_mii_dump: idr1 (2) xcvr 0x%x value 0x%x", @@ -8860,19 +8686,11 @@ nxge_mii_dump(p_nxge_t nxgep) mode.value = 0; mode.bits.shadow = NXGE_MII_MODE_CONTROL_REG; -#if defined(__i386) - (void) nxge_mii_write(nxgep, xcvr_portn, - (uint8_t)(uint32_t)(&mii_regs->shadow), mode.value); - - (void) nxge_mii_read(nxgep, xcvr_portn, - (uint8_t)(uint32_t)(&mii_regs->shadow), &mode.value); -#else (void) nxge_mii_write(nxgep, xcvr_portn, (uint8_t)(uint64_t)(&mii_regs->shadow), mode.value); (void) nxge_mii_read(nxgep, xcvr_portn, (uint8_t)(uint64_t)(&mii_regs->shadow), &mode.value); -#endif NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, "nxge_mii_dump: mode control xcvr 0x%x value 0x%x", diff --git a/usr/src/uts/common/io/nxge/nxge_main.c b/usr/src/uts/common/io/nxge/nxge_main.c index 441bbca23c..26da4c5af0 100644 --- a/usr/src/uts/common/io/nxge/nxge_main.c +++ b/usr/src/uts/common/io/nxge/nxge_main.c @@ -31,9 +31,9 @@ #include <sys/nxge/nxge_rxdma.h> #include <sys/pcie.h> -uint32_t nxge_use_partition = 0; /* debug partition flag */ -uint32_t nxge_dma_obp_props_only = 1; /* use obp published props */ -uint32_t nxge_use_rdc_intr = 1; /* debug to assign rdc intr */ +uint32_t nxge_use_partition = 0; /* debug partition flag */ +uint32_t nxge_dma_obp_props_only = 1; /* use obp published props */ +uint32_t nxge_use_rdc_intr = 1; /* debug to assign rdc intr */ /* * PSARC/2007/453 MSI-X interrupt limit override */ @@ -92,16 +92,16 @@ uint32_t nxge_cksum_offload = 0; * Globals: tunable parameters (/etc/system or adb) * */ -uint32_t nxge_rbr_size = NXGE_RBR_RBB_DEFAULT; -uint32_t nxge_rbr_spare_size = 0; -uint32_t nxge_rcr_size = NXGE_RCR_DEFAULT; +uint32_t nxge_rbr_size = NXGE_RBR_RBB_DEFAULT; +uint32_t nxge_rbr_spare_size = 0; +uint32_t nxge_rcr_size = NXGE_RCR_DEFAULT; uint16_t nxge_rdc_buf_offset = SW_OFFSET_NO_OFFSET; -uint32_t nxge_tx_ring_size = NXGE_TX_RING_DEFAULT; -boolean_t nxge_no_msg = B_TRUE; /* control message display */ -uint32_t nxge_no_link_notify = 0; /* control DL_NOTIFY */ -uint32_t nxge_bcopy_thresh = TX_BCOPY_MAX; -uint32_t nxge_dvma_thresh = TX_FASTDVMA_MIN; -uint32_t nxge_dma_stream_thresh = TX_STREAM_MIN; +uint32_t nxge_tx_ring_size = NXGE_TX_RING_DEFAULT; +boolean_t nxge_no_msg = B_TRUE; /* control message display */ +uint32_t nxge_no_link_notify = 0; /* control DL_NOTIFY */ +uint32_t nxge_bcopy_thresh = TX_BCOPY_MAX; +uint32_t nxge_dvma_thresh = TX_FASTDVMA_MIN; +uint32_t nxge_dma_stream_thresh = TX_STREAM_MIN; uint32_t nxge_jumbo_mtu = TX_JUMBO_MTU; nxge_tx_mode_t nxge_tx_scheme = NXGE_USE_SERIAL; @@ -127,14 +127,7 @@ nxge_rxbuf_threshold_t nxge_rx_threshold_hi = NXGE_RX_COPY_6; nxge_rxbuf_type_t nxge_rx_buf_size_type = RCR_PKTBUFSZ_0; nxge_rxbuf_threshold_t nxge_rx_threshold_lo = NXGE_RX_COPY_3; -/* Use kmem_alloc() to allocate data buffers. */ -#if defined(__sparc) uint32_t nxge_use_kmem_alloc = 1; -#elif defined(__i386) -uint32_t nxge_use_kmem_alloc = 0; -#else -uint32_t nxge_use_kmem_alloc = 1; -#endif rtrace_t npi_rtracebuf; @@ -394,12 +387,12 @@ uint64_t nxge_debug_level; * devices present in the system. The lock exists to guarantee * mutually exclusive access to the list. */ -void *nxge_list = NULL; +void *nxge_list = NULL; void *nxge_hw_list = NULL; -nxge_os_mutex_t nxge_common_lock; -nxge_os_mutex_t nxgedebuglock; +nxge_os_mutex_t nxge_common_lock; +nxge_os_mutex_t nxgedebuglock; -extern uint64_t npi_debug_level; +extern uint64_t npi_debug_level; extern nxge_status_t nxge_ldgv_init(p_nxge_t, int *, int *); extern nxge_status_t nxge_ldgv_init_n2(p_nxge_t, int *, int *); @@ -764,7 +757,7 @@ nxge_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) &prop_len) != DDI_PROP_SUCCESS) { goto nxge_attach_fail5; } - if (prop_len != ETHERADDRL) { + if (prop_len != ETHERADDRL) { ddi_prop_free(prop_val); goto nxge_attach_fail5; } @@ -920,9 +913,9 @@ nxge_attach_exit: static int nxge_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) { - int status = DDI_SUCCESS; - int instance; - p_nxge_t nxgep = NULL; + int status = DDI_SUCCESS; + int instance; + p_nxge_t nxgep = NULL; NXGE_DEBUG_MSG((nxgep, DDI_CTL, "==> nxge_detach")); instance = ddi_get_instance(dip); @@ -1185,11 +1178,11 @@ static nxge_status_t nxge_map_regs(p_nxge_t nxgep) { int ddi_status = DDI_SUCCESS; - p_dev_regs_t dev_regs; + p_dev_regs_t dev_regs; char buf[MAXPATHLEN + 1]; - char *devname; + char *devname; #ifdef NXGE_DEBUG - char *sysname; + char *sysname; #endif off_t regsize; nxge_status_t status = NXGE_OK; @@ -1237,8 +1230,8 @@ nxge_map_regs(p_nxge_t nxgep) nxgep->function_num)); } else { int *prop_val; - uint_t prop_len; - uint8_t func_num; + uint_t prop_len; + uint8_t func_num; if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, nxgep->dip, 0, "reg", @@ -1989,7 +1982,7 @@ nxge_test_map_regs(p_nxge_t nxgep) NXGE_DEBUG_MSG((nxgep, DDI_CTL, "PCI BAR: base 0x%x base14 0x%x base 18 0x%x " "bar1c 0x%x", - NXGE_PIO_READ32(cfg_handle, &cfg_ptr->base, 0), + NXGE_PIO_READ32(cfg_handle, &cfg_ptr->base, 0), NXGE_PIO_READ32(cfg_handle, &cfg_ptr->base14, 0), NXGE_PIO_READ32(cfg_handle, &cfg_ptr->base18, 0), NXGE_PIO_READ32(cfg_handle, &cfg_ptr->base1c, 0))); @@ -2010,9 +2003,9 @@ nxge_test_map_regs(p_nxge_t nxgep) "first 0x%llx second 0x%llx third 0x%llx " "last 0x%llx ", NXGE_PIO_READ64(dev_handle, - (uint64_t *)(dev_ptr + 0), 0), + (uint64_t *)(dev_ptr + 0), 0), NXGE_PIO_READ64(dev_handle, - (uint64_t *)(dev_ptr + 8), 0), + (uint64_t *)(dev_ptr + 8), 0), NXGE_PIO_READ64(dev_handle, (uint64_t *)(dev_ptr + 16), 0), NXGE_PIO_READ64(cfg_handle, @@ -2100,10 +2093,10 @@ nxge_destroy_dev(p_nxge_t nxgep) static nxge_status_t nxge_setup_system_dma_pages(p_nxge_t nxgep) { - int ddi_status = DDI_SUCCESS; - uint_t count; - ddi_dma_cookie_t cookie; - uint_t iommu_pagesize; + int ddi_status = DDI_SUCCESS; + uint_t count; + ddi_dma_cookie_t cookie; + uint_t iommu_pagesize; nxge_status_t status = NXGE_OK; NXGE_ERROR_MSG((nxgep, DDI_CTL, "==> nxge_setup_system_dma_pages")); @@ -2255,7 +2248,7 @@ nxge_alloc_rx_mem_pool(p_nxge_t nxgep) p_nxge_dma_common_t *dma_buf_p; p_nxge_dma_pool_t dma_cntl_poolp; p_nxge_dma_common_t *dma_cntl_p; - uint32_t *num_chunks; /* per dma */ + uint32_t *num_chunks; /* per dma */ nxge_status_t status = NXGE_OK; uint32_t nxge_port_rbr_size; @@ -2432,8 +2425,8 @@ nxge_alloc_rx_mem_pool_exit: * Allocate buffers for an RDC. * * Arguments: - * nxgep - * channel The channel to map into our kernel space. + * nxgep + * channel The channel to map into our kernel space. * * Notes: * @@ -2460,7 +2453,7 @@ nxge_alloc_rxb( nxge_dma_common_t **data; nxge_dma_common_t **control; - uint32_t *num_chunks; + uint32_t *num_chunks; NXGE_DEBUG_MSG((nxgep, DMA_CTL, "==> nxge_alloc_rbb")); @@ -2515,7 +2508,7 @@ nxge_free_rxb( { nxge_dma_common_t *data; nxge_dma_common_t *control; - uint32_t num_chunks; + uint32_t num_chunks; NXGE_DEBUG_MSG((nxgep, DMA_CTL, "==> nxge_alloc_rbb")); @@ -2590,10 +2583,10 @@ nxge_free_rx_mem_pool(p_nxge_t nxgep) static nxge_status_t nxge_alloc_rx_buf_dma(p_nxge_t nxgep, uint16_t dma_channel, - p_nxge_dma_common_t *dmap, - size_t alloc_size, size_t block_size, uint32_t *num_chunks) + p_nxge_dma_common_t *dmap, + size_t alloc_size, size_t block_size, uint32_t *num_chunks) { - p_nxge_dma_common_t rx_dmap; + p_nxge_dma_common_t rx_dmap; nxge_status_t status = NXGE_OK; size_t total_alloc_size; size_t allocated = 0; @@ -2629,7 +2622,7 @@ nxge_alloc_rx_buf_dma(p_nxge_t nxgep, uint16_t dma_channel, /* For Neptune, use kmem_alloc if the kmem flag is set. */ if (nxgep->niu_type != N2_NIU && nxge_use_kmem_alloc) { use_kmem_alloc = B_TRUE; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) size_index = 0; #endif NXGE_DEBUG_MSG((nxgep, MEM2_CTL, @@ -2772,7 +2765,7 @@ static nxge_status_t nxge_alloc_rx_cntl_dma(p_nxge_t nxgep, uint16_t dma_channel, p_nxge_dma_common_t *dmap, size_t size) { - p_nxge_dma_common_t rx_dmap; + p_nxge_dma_common_t rx_dmap; nxge_status_t status = NXGE_OK; NXGE_DEBUG_MSG((nxgep, DMA_CTL, "==> nxge_alloc_rx_cntl_dma")); @@ -2884,8 +2877,8 @@ nxge_tdc_sizes( * Allocate buffers for an TDC. * * Arguments: - * nxgep - * channel The channel to map into our kernel space. + * nxgep + * channel The channel to map into our kernel space. * * Notes: * @@ -2909,7 +2902,7 @@ nxge_alloc_txb( { nxge_dma_common_t **dma_buf_p; nxge_dma_common_t **dma_cntl_p; - uint32_t *num_chunks; + uint32_t *num_chunks; nxge_status_t status = NXGE_OK; nxge_tdc_sizes_t sizes; @@ -2969,7 +2962,7 @@ nxge_free_txb( { nxge_dma_common_t *data; nxge_dma_common_t *control; - uint32_t num_chunks; + uint32_t num_chunks; NXGE_DEBUG_MSG((nxgep, DMA_CTL, "==> nxge_free_txb")); @@ -2998,7 +2991,7 @@ nxge_free_txb( * The per-channel (TDC) data structures are allocated when needed. * * Arguments: - * nxgep + * nxgep * * Notes: * @@ -3099,7 +3092,7 @@ nxge_alloc_tx_buf_dma(p_nxge_t nxgep, uint16_t dma_channel, p_nxge_dma_common_t *dmap, size_t alloc_size, size_t block_size, uint32_t *num_chunks) { - p_nxge_dma_common_t tx_dmap; + p_nxge_dma_common_t tx_dmap; nxge_status_t status = NXGE_OK; size_t total_alloc_size; size_t allocated = 0; @@ -3214,7 +3207,7 @@ nxge_status_t nxge_alloc_tx_cntl_dma(p_nxge_t nxgep, uint16_t dma_channel, p_nxge_dma_common_t *dmap, size_t size) { - p_nxge_dma_common_t tx_dmap; + p_nxge_dma_common_t tx_dmap; nxge_status_t status = NXGE_OK; NXGE_DEBUG_MSG((nxgep, DMA_CTL, "==> nxge_alloc_tx_cntl_dma")); @@ -3269,7 +3262,7 @@ nxge_free_tx_cntl_dma(p_nxge_t nxgep, p_nxge_dma_common_t dmap) * is stopped. * * Arguments: - * nxgep + * nxgep * * Notes: * @@ -3332,11 +3325,11 @@ nxge_free_tx_mem_pool(p_nxge_t nxgep) /*ARGSUSED*/ static nxge_status_t nxge_dma_mem_alloc(p_nxge_t nxgep, dma_method_t method, - struct ddi_dma_attr *dma_attrp, - size_t length, ddi_device_acc_attr_t *acc_attr_p, uint_t xfer_flags, - p_nxge_dma_common_t dma_p) + struct ddi_dma_attr *dma_attrp, + size_t length, ddi_device_acc_attr_t *acc_attr_p, uint_t xfer_flags, + p_nxge_dma_common_t dma_p) { - caddr_t kaddrp; + caddr_t kaddrp; int ddi_status = DDI_SUCCESS; boolean_t contig_alloc_type; boolean_t kmem_alloc_type; @@ -3568,18 +3561,9 @@ nxge_dma_mem_alloc(p_nxge_t nxgep, dma_method_t method, dma_p->kaddrp = kaddrp; dma_p->last_kaddrp = (unsigned char *)kaddrp + dma_p->alength - RXBUF_64B_ALIGNED; -#if defined(__i386) - dma_p->ioaddr_pp = - (unsigned char *)(uint32_t)dma_p->dma_cookie.dmac_laddress; -#else dma_p->ioaddr_pp = (unsigned char *)dma_p->dma_cookie.dmac_laddress; -#endif dma_p->last_ioaddr_pp = -#if defined(__i386) - (unsigned char *)(uint32_t)dma_p->dma_cookie.dmac_laddress + -#else (unsigned char *)dma_p->dma_cookie.dmac_laddress + -#endif dma_p->alength - RXBUF_64B_ALIGNED; NPI_DMA_ACC_HANDLE_SET(dma_p, dma_p->acc_handle); @@ -3728,11 +3712,7 @@ nxge_dma_free_rx_data_buf(p_nxge_dma_common_t dma_p) dma_p->kmem_alloc_type, dma_p->orig_alength, dma_p->alength, dma_p->alength)); -#if defined(__i386) - kaddr = (uint64_t)(uint32_t)dma_p->kaddrp; -#else kaddr = (uint64_t)dma_p->kaddrp; -#endif buf_size = dma_p->orig_alength; NXGE_DEBUG_MSG((NULL, DMA_CTL, "nxge_dma_free_rx_data_buf: free dmap $%p " @@ -3759,7 +3739,7 @@ nxge_dma_free_rx_data_buf(p_nxge_dma_common_t dma_p) static int nxge_m_start(void *arg) { - p_nxge_t nxgep = (p_nxge_t)arg; + p_nxge_t nxgep = (p_nxge_t)arg; NXGE_DEBUG_MSG((nxgep, NXGE_CTL, "==> nxge_m_start")); @@ -3874,7 +3854,7 @@ nxge_check_groups_stopped(p_nxge_t nxgep) static void nxge_m_stop(void *arg) { - p_nxge_t nxgep = (p_nxge_t)arg; + p_nxge_t nxgep = (p_nxge_t)arg; boolean_t groups_stopped; NXGE_DEBUG_MSG((nxgep, NXGE_CTL, "==> nxge_m_stop")); @@ -3940,8 +3920,8 @@ nxge_m_stop(void *arg) static int nxge_m_multicst(void *arg, boolean_t add, const uint8_t *mca) { - p_nxge_t nxgep = (p_nxge_t)arg; - struct ether_addr addrp; + p_nxge_t nxgep = (p_nxge_t)arg; + struct ether_addr addrp; NXGE_DEBUG_MSG((nxgep, MAC_CTL, "==> nxge_m_multicst: add %d", add)); @@ -3969,7 +3949,7 @@ nxge_m_multicst(void *arg, boolean_t add, const uint8_t *mca) static int nxge_m_promisc(void *arg, boolean_t on) { - p_nxge_t nxgep = (p_nxge_t)arg; + p_nxge_t nxgep = (p_nxge_t)arg; NXGE_DEBUG_MSG((nxgep, MAC_CTL, "==> nxge_m_promisc: on %d", on)); @@ -3987,13 +3967,13 @@ nxge_m_promisc(void *arg, boolean_t on) } static void -nxge_m_ioctl(void *arg, queue_t *wq, mblk_t *mp) +nxge_m_ioctl(void *arg, queue_t *wq, mblk_t *mp) { - p_nxge_t nxgep = (p_nxge_t)arg; - struct iocblk *iocp; - boolean_t need_privilege; - int err; - int cmd; + p_nxge_t nxgep = (p_nxge_t)arg; + struct iocblk *iocp; + boolean_t need_privilege; + int err; + int cmd; NXGE_DEBUG_MSG((nxgep, NXGE_CTL, "==> nxge_m_ioctl")); @@ -4136,7 +4116,7 @@ nxge_mmac_kstat_update(p_nxge_t nxgep, int slot, boolean_t factory) */ static int nxge_altmac_set(p_nxge_t nxgep, uint8_t *maddr, int slot, - int rdctbl, boolean_t usetbl) + int rdctbl, boolean_t usetbl) { uint8_t addrn; uint8_t portn; @@ -4197,11 +4177,11 @@ nxge_altmac_set(p_nxge_t nxgep, uint8_t *maddr, int slot, /* * nxeg_m_mmac_add_g() - find an unused address slot, set the address * value to the one specified, enable the port to start filtering on - * the new MAC address. Returns 0 on success. + * the new MAC address. Returns 0 on success. */ int nxge_m_mmac_add_g(void *arg, const uint8_t *maddr, int rdctbl, - boolean_t usetbl) + boolean_t usetbl) { p_nxge_t nxgep = arg; int slot; @@ -4230,13 +4210,13 @@ nxge_m_mmac_add_g(void *arg, const uint8_t *maddr, int rdctbl, } /* - * Search for the first available slot. Because naddrfree + * Search for the first available slot. Because naddrfree * is not zero, we are guaranteed to find one. * Each of the first two ports of Neptune has 16 alternate * MAC slots but only the first 7 (of 15) slots have assigned factory * MAC addresses. We first search among the slots without bundled * factory MACs. If we fail to find one in that range, then we - * search the slots with bundled factory MACs. A factory MAC + * search the slots with bundled factory MACs. A factory MAC * will be wasted while the slot is used with a user MAC address. * But the slot could be used by factory MAC again after calling * nxge_m_mmac_remove and nxge_m_mmac_reserve. @@ -4418,7 +4398,7 @@ nxge_m_getcapab(void *arg, mac_capab_t cap, void *cap_data) mutex_enter(nxgep->genlock); if (cap_rings->mr_type == MAC_RING_TYPE_RX) { - if (isLDOMguest(nxgep)) { + if (isLDOMguest(nxgep)) { cap_rings->mr_group_type = MAC_GROUP_TYPE_STATIC; cap_rings->mr_rnum = @@ -4697,7 +4677,7 @@ static int nxge_m_getprop(void *barg, const char *pr_name, mac_prop_id_t pr_num, uint_t pr_valsize, void *pr_val) { - nxge_t *nxgep = barg; + nxge_t *nxgep = barg; p_nxge_param_t param_arr = nxgep->param_arr; p_nxge_stats_t statsp = nxgep->statsp; @@ -4864,7 +4844,7 @@ nxge_priv_propinfo(const char *pr_name, mac_prop_info_handle_t prh) (void) snprintf(valstr, sizeof (valstr), "%d", RXDMA_RCR_PTHRES_DEFAULT); - } else if (strcmp(pr_name, "_class_opt_ipv4_tcp") == 0 || + } else if (strcmp(pr_name, "_class_opt_ipv4_tcp") == 0 || strcmp(pr_name, "_class_opt_ipv4_udp") == 0 || strcmp(pr_name, "_class_opt_ipv4_ah") == 0 || strcmp(pr_name, "_class_opt_ipv4_sctp") == 0 || @@ -4878,7 +4858,7 @@ nxge_priv_propinfo(const char *pr_name, mac_prop_info_handle_t prh) } else if (strcmp(pr_name, "_soft_lso_enable") == 0) { (void) snprintf(valstr, sizeof (valstr), "%d", 0); - } else if (strcmp(pr_name, "_adv_10gfdx_cap") == 0) { + } else if (strcmp(pr_name, "_adv_10gfdx_cap") == 0) { (void) snprintf(valstr, sizeof (valstr), "%d", 1); } else if (strcmp(pr_name, "_adv_pause_cap") == 0) { @@ -5440,7 +5420,7 @@ DDI_DEFINE_STREAM_OPS(nxge_dev_ops, nulldev, nulldev, nxge_attach, nxge_detach, /* * Module linkage information for the kernel. */ -static struct modldrv nxge_modldrv = { +static struct modldrv nxge_modldrv = { &mod_driverops, NXGE_DESC_VER, &nxge_dev_ops @@ -5579,7 +5559,7 @@ nxge_rx_ring_start(mac_ring_driver_t rdriver, uint64_t mr_gen_num) int i; channel = nxgep->pt_config.hw_config.start_rdc + rhp->index; - ring = nxgep->rx_rcr_rings->rcr_rings[channel]; + ring = nxgep->rx_rcr_rings->rcr_rings[channel]; MUTEX_ENTER(&ring->lock); @@ -5616,7 +5596,7 @@ nxge_rx_ring_stop(mac_ring_driver_t rdriver) p_rx_rcr_ring_t ring; channel = nxgep->pt_config.hw_config.start_rdc + rhp->index; - ring = nxgep->rx_rcr_rings->rcr_rings[channel]; + ring = nxgep->rx_rcr_rings->rcr_rings[channel]; MUTEX_ENTER(&ring->lock); ASSERT(ring->started == B_TRUE); @@ -6664,7 +6644,7 @@ static int nxge_init_common_dev(p_nxge_t nxgep) { p_nxge_hw_list_t hw_p; - dev_info_t *p_dip; + dev_info_t *p_dip; ASSERT(nxgep != NULL); @@ -6785,7 +6765,7 @@ nxge_uninit_common_dev(p_nxge_t nxgep) p_nxge_hw_list_t hw_p, h_hw_p; p_nxge_dma_pt_cfg_t p_dma_cfgp; p_nxge_hw_pt_cfg_t p_cfgp; - dev_info_t *p_dip; + dev_info_t *p_dip; ASSERT(nxgep != NULL); diff --git a/usr/src/uts/common/io/nxge/nxge_ndd.c b/usr/src/uts/common/io/nxge/nxge_ndd.c index 3243bbdba9..5b2c6a082a 100644 --- a/usr/src/uts/common/io/nxge/nxge_ndd.c +++ b/usr/src/uts/common/io/nxge/nxge_ndd.c @@ -61,7 +61,7 @@ extern uint64_t npi_debug_level; #define SET_RX_INTR_PKTS 2 #define BASE_ANY 0 -#define BASE_BINARY 2 +#define BASE_BINARY 2 #define BASE_HEX 16 #define BASE_DECIMAL 10 #define ALL_FF_64 0xFFFFFFFFFFFFFFFFULL @@ -538,15 +538,15 @@ static nxge_param_t nxge_param_arr[] = { 0, 0x0fffffff, 0x0fffffff, 0, "end", "end"}, }; -extern void *nxge_list; +extern void *nxge_list; void nxge_get_param_soft_properties(p_nxge_t nxgep) { - p_nxge_param_t param_arr; - uint_t prop_len; - int i, j; + p_nxge_param_t param_arr; + uint_t prop_len; + int i, j; uint32_t param_count; uint32_t *int_prop_val; @@ -571,12 +571,7 @@ nxge_get_param_soft_properties(p_nxge_t nxgep) if (prop_len > NXGE_PARAM_ARRAY_INIT_SIZE) prop_len = NXGE_PARAM_ARRAY_INIT_SIZE; -#if defined(__i386) - cfg_value = - (uint32_t *)(int32_t)param_arr[i].value; -#else cfg_value = (uint32_t *)param_arr[i].value; -#endif for (j = 0; j < prop_len; j++) { cfg_value[j] = int_prop_val[j]; } @@ -757,19 +752,9 @@ nxge_init_param(p_nxge_t nxgep) alloc_count = NXGE_PARAM_ARRAY_INIT_SIZE; alloc_size = alloc_count * sizeof (uint64_t); param_arr[i].value = -#if defined(__i386) - (uint64_t)(uint32_t)KMEM_ZALLOC(alloc_size, - KM_SLEEP); -#else - (uint64_t)KMEM_ZALLOC(alloc_size, KM_SLEEP); -#endif + (uint64_t)KMEM_ZALLOC(alloc_size, KM_SLEEP); param_arr[i].old_value = -#if defined(__i386) - (uint64_t)(uint32_t)KMEM_ZALLOC(alloc_size, - KM_SLEEP); -#else - (uint64_t)KMEM_ZALLOC(alloc_size, KM_SLEEP); -#endif + (uint64_t)KMEM_ZALLOC(alloc_size, KM_SLEEP); param_arr[i].type |= (alloc_count << NXGE_PARAM_ARRAY_ALLOC_SHIFT); } @@ -814,19 +799,9 @@ nxge_destroy_param(p_nxge_t nxgep) NXGE_PARAM_ARRAY_ALLOC_SHIFT); free_count = NXGE_PARAM_ARRAY_INIT_SIZE; free_size = sizeof (uint64_t) * free_count; -#if defined(__i386) - KMEM_FREE((void *)(uint32_t)nxgep->param_arr[i].value, - free_size); -#else KMEM_FREE((void *)nxgep->param_arr[i].value, free_size); -#endif -#if defined(__i386) - KMEM_FREE((void *)(uint32_t) - nxgep->param_arr[i].old_value, free_size); -#else KMEM_FREE((void *)nxgep->param_arr[i].old_value, free_size); -#endif } KMEM_FREE(nxgep->param_arr, sizeof (nxge_param_arr)); @@ -1040,9 +1015,9 @@ nxge_param_get_rxdma_info(p_nxge_t nxgep, queue_t *q, p_mblk_t mp, caddr_t cp) p_nxge_dma_pt_cfg_t p_dma_cfgp; p_nxge_hw_pt_cfg_t p_cfgp; int buff_alloc_size = NXGE_NDD_INFODUMP_BUFF_SIZE; - p_rx_rcr_rings_t rx_rcr_rings; + p_rx_rcr_rings_t rx_rcr_rings; p_rx_rcr_ring_t *rcr_rings; - p_rx_rbr_rings_t rx_rbr_rings; + p_rx_rbr_rings_t rx_rbr_rings; p_rx_rbr_ring_t *rbr_rings; nxge_grp_set_t *set; @@ -1366,16 +1341,8 @@ nxge_param_set_mac_rdcgrp(p_nxge_t nxgep, queue_t *q, NXGE_DEBUG_MSG((nxgep, NDD_CTL, " nxge_param_set_mac_rdcgrp mapping" " id %d grp %d", mac_map->param_id, mac_map->map_to)); -#if defined(__i386) - val_ptr = (uint32_t *)(uint32_t)pa->value; -#else val_ptr = (uint32_t *)pa->value; -#endif -#if defined(__i386) - old_val_ptr = (uint32_t *)(uint32_t)pa->old_value; -#else old_val_ptr = (uint32_t *)pa->old_value; -#endif if (val_ptr[mac_map->param_id] != cfg_value) { old_val_ptr[mac_map->param_id] = val_ptr[mac_map->param_id]; @@ -1451,16 +1418,8 @@ nxge_param_set_vlan_rdcgrp(p_nxge_t nxgep, queue_t *q, "nxge_param_set_vlan_rdcgrp mapping" " id %d grp %d", vmap->param_id, vmap->map_to)); -#if defined(__i386) - val_ptr = (uint32_t *)(uint32_t)pa->value; -#else val_ptr = (uint32_t *)pa->value; -#endif -#if defined(__i386) - old_val_ptr = (uint32_t *)(uint32_t)pa->old_value; -#else old_val_ptr = (uint32_t *)pa->old_value; -#endif /* search to see if this vlan id is already configured */ for (i = 0; i < cfgd_vlans; i++) { @@ -1528,13 +1487,13 @@ nxge_param_get_vlan_rdcgrp(p_nxge_t nxgep, queue_t *q, mblk_t *mp, caddr_t cp) { - uint_t print_len, buf_len; + uint_t print_len, buf_len; p_mblk_t np; int i; uint32_t *val_ptr; nxge_param_map_t *vmap; p_nxge_param_t pa = (p_nxge_param_t)cp; - p_nxge_class_pt_cfg_t p_class_cfgp; + p_nxge_class_pt_cfg_t p_class_cfgp; p_nxge_dma_pt_cfg_t p_dma_cfgp; p_nxge_hw_pt_cfg_t p_cfgp; uint64_t cfgd_vlans = 0; @@ -1568,11 +1527,7 @@ nxge_param_get_vlan_rdcgrp(p_nxge_t nxgep, queue_t *q, " Prefernce\n", i); ((mblk_t *)np)->b_wptr += print_len; buf_len -= print_len; -#if defined(__i386) - val_ptr = (uint32_t *)(uint32_t)pa->value; -#else val_ptr = (uint32_t *)pa->value; -#endif for (i = 0; i < cfgd_vlans; i++) { vmap = (nxge_param_map_t *)&val_ptr[i]; @@ -1602,7 +1557,7 @@ nxge_param_get_mac_rdcgrp(p_nxge_t nxgep, queue_t *q, uint_t print_len, buf_len; p_mblk_t np; int i; - p_nxge_class_pt_cfg_t p_class_cfgp; + p_nxge_class_pt_cfg_t p_class_cfgp; p_nxge_dma_pt_cfg_t p_dma_cfgp; p_nxge_hw_pt_cfg_t p_cfgp; nxge_mv_cfg_t *mac_host_info; @@ -2120,7 +2075,7 @@ nxge_param_get_debug_flag(p_nxge_t nxgep, queue_t *q, p_mblk_t mp, caddr_t cp) NXGE_DEBUG_MSG((nxgep, NDD_CTL, "==> nxge_param_get_debug_flag")); if (pa->value > 0xffffffff) - (void) mi_mpprintf(mp, "%x%x", (int)(pa->value >> 32), + (void) mi_mpprintf(mp, "%x%x", (int)(pa->value >> 32), (int)(pa->value & 0xffffffff)); else (void) mi_mpprintf(mp, "%x", (int)pa->value); @@ -2305,10 +2260,10 @@ nxge_param_dump_ptrs(p_nxge_t nxgep, queue_t *q, p_mblk_t mp, caddr_t cp) p_nxge_dma_pt_cfg_t p_dma_cfgp; p_nxge_hw_pt_cfg_t p_cfgp; int buff_alloc_size = NXGE_NDD_INFODUMP_BUFF_8K; - p_tx_ring_t *tx_rings; - p_rx_rcr_rings_t rx_rcr_rings; + p_tx_ring_t *tx_rings; + p_rx_rcr_rings_t rx_rcr_rings; p_rx_rcr_ring_t *rcr_rings; - p_rx_rbr_rings_t rx_rbr_rings; + p_rx_rbr_rings_t rx_rbr_rings; p_rx_rbr_ring_t *rbr_rings; NXGE_DEBUG_MSG((nxgep, IOC_CTL, @@ -2353,11 +2308,7 @@ nxge_param_dump_ptrs(p_nxge_t nxgep, queue_t *q, p_mblk_t mp, caddr_t cp) ADVANCE_PRINT_BUFFER(np, print_len, buf_len); block = 0; -#if defined(__i386) - base = (uint64_t)(uint32_t)nxgep->dev_regs->nxge_regp; -#else base = (uint64_t)nxgep->dev_regs->nxge_regp; -#endif while (reg_block[block].offset != ALL_FF_32) { print_len = snprintf((char *)((mblk_t *)np)->b_wptr, buf_len, "%9s\t 0x%llx\n", @@ -2457,12 +2408,12 @@ nxge_set_default(p_nxge_t nxgep, queue_t *q, p_mblk_t mp, char *value, boolean_t nxge_param_link_update(p_nxge_t nxgep) { - p_nxge_param_t param_arr; - nxge_param_index_t i; - boolean_t update_xcvr; - boolean_t update_dev; - int instance; - boolean_t status = B_TRUE; + p_nxge_param_t param_arr; + nxge_param_index_t i; + boolean_t update_xcvr; + boolean_t update_dev; + int instance; + boolean_t status = B_TRUE; NXGE_DEBUG_MSG((nxgep, NDD_CTL, "==> nxge_param_link_update")); @@ -2521,7 +2472,7 @@ nxge_param_hw_update_exit: * synchronize the adv* and en* parameters. * * See comments in <sys/dld.h> for details of the *_en_* - * parameters. The usage of ndd for setting adv parameters will + * parameters. The usage of ndd for setting adv parameters will * synchronize all the en parameters with the nxge parameters, * implicitly disabling any settings made via dladm. */ diff --git a/usr/src/uts/common/io/nxge/nxge_rxdma.c b/usr/src/uts/common/io/nxge/nxge_rxdma.c index 85ad031e85..305eef0883 100644 --- a/usr/src/uts/common/io/nxge/nxge_rxdma.c +++ b/usr/src/uts/common/io/nxge/nxge_rxdma.c @@ -406,7 +406,7 @@ nxge_init_rxdma_channel_cntl_stat(p_nxge_t nxgep, uint16_t channel, * Set the default RDC for an RDC Group (Table) * * Arguments: - * nxgep + * nxgep * rdcgrp The group to modify * rdc The new default RDC. * @@ -487,7 +487,7 @@ nxge_rxdma_cfg_port_default_rdc(p_nxge_t nxgep, uint8_t port, uint8_t rdc) nxge_status_t nxge_rxdma_cfg_rcr_threshold(p_nxge_t nxgep, uint8_t channel, - uint16_t pkts) + uint16_t pkts) { npi_status_t rs = NPI_SUCCESS; npi_handle_t handle; @@ -506,7 +506,7 @@ nxge_rxdma_cfg_rcr_threshold(p_nxge_t nxgep, uint8_t channel, nxge_status_t nxge_rxdma_cfg_rcr_timeout(p_nxge_t nxgep, uint8_t channel, - uint16_t tout, uint8_t enable) + uint16_t tout, uint8_t enable) { npi_status_t rs = NPI_SUCCESS; npi_handle_t handle; @@ -531,7 +531,7 @@ nxge_enable_rxdma_channel(p_nxge_t nxgep, uint16_t channel, p_rx_rbr_ring_t rbr_p, p_rx_rcr_ring_t rcr_p, p_rx_mbox_t mbox_p) { npi_handle_t handle; - rdc_desc_cfg_t rdc_desc; + rdc_desc_cfg_t rdc_desc; p_rcrcfig_b_t cfgb_p; npi_status_t rs = NPI_SUCCESS; @@ -697,20 +697,20 @@ nxge_rxdma_channel_rcrflush(p_nxge_t nxgep, uint8_t channel) /*ARGSUSED*/ nxge_status_t nxge_rxbuf_pp_to_vp(p_nxge_t nxgep, p_rx_rbr_ring_t rbr_p, - uint8_t pktbufsz_type, uint64_t *pkt_buf_addr_pp, - uint64_t **pkt_buf_addr_p, uint32_t *bufoffset, uint32_t *msg_index) + uint8_t pktbufsz_type, uint64_t *pkt_buf_addr_pp, + uint64_t **pkt_buf_addr_p, uint32_t *bufoffset, uint32_t *msg_index) { int bufsize; uint64_t pktbuf_pp; - uint64_t dvma_addr; - rxring_info_t *ring_info; - int base_side, end_side; - int r_index, l_index, anchor_index; - int found, search_done; + uint64_t dvma_addr; + rxring_info_t *ring_info; + int base_side, end_side; + int r_index, l_index, anchor_index; + int found, search_done; uint32_t offset, chunk_size, block_size, page_size_mask; uint32_t chunk_index, block_index, total_index; - int max_iterations, iteration; - rxbuf_index_info_t *bufinfo; + int max_iterations, iteration; + rxbuf_index_info_t *bufinfo; NXGE_DEBUG_MSG((nxgep, RX2_CTL, "==> nxge_rxbuf_pp_to_vp")); @@ -718,11 +718,7 @@ nxge_rxbuf_pp_to_vp(p_nxge_t nxgep, p_rx_rbr_ring_t rbr_p, "==> nxge_rxbuf_pp_to_vp: buf_pp $%p btype %d", pkt_buf_addr_pp, pktbufsz_type)); -#if defined(__i386) - pktbuf_pp = (uint64_t)(uint32_t)pkt_buf_addr_pp; -#else pktbuf_pp = (uint64_t)pkt_buf_addr_pp; -#endif switch (pktbufsz_type) { case 0: @@ -778,7 +774,7 @@ nxge_rxbuf_pp_to_vp(p_nxge_t nxgep, p_rx_rbr_ring_t rbr_p, * the block has been processed. * As three block sizes are supported, three hints * are kept. The idea behind the hints is that once - * the hardware uses a block for a buffer of that + * the hardware uses a block for a buffer of that * size, it will use it exclusively for that size * and will use it until it is exhausted. It is assumed * that there would a single block being used for the same @@ -816,7 +812,7 @@ nxge_rxbuf_pp_to_vp(p_nxge_t nxgep, p_rx_rbr_ring_t rbr_p, * the search algorithm uses a binary tree search * algorithm. It assumes that the information is * already sorted with increasing order - * info[0] < info[1] < info[2] .... < info[n-1] + * info[0] < info[1] < info[2] .... < info[n-1] * where n is the size of the information array */ r_index = rbr_p->num_blocks - 1; @@ -948,13 +944,8 @@ found_index: total_index, dvma_addr, offset, block_size, block_index)); -#if defined(__i386) - *pkt_buf_addr_p = (uint64_t *)((uint32_t)bufinfo[anchor_index].kaddr + - (uint32_t)offset); -#else *pkt_buf_addr_p = (uint64_t *)((uint64_t)bufinfo[anchor_index].kaddr + (uint64_t)offset); -#endif NXGE_DEBUG_MSG((nxgep, RX2_CTL, "==> nxge_rxbuf_pp_to_vp: " @@ -1159,10 +1150,10 @@ void nxge_rxdma_regs_dump(p_nxge_t nxgep, int rdc) { npi_handle_t handle; - rbr_stat_t rbr_stat; - addr44_t hd_addr; - addr44_t tail_addr; - uint16_t qlen; + rbr_stat_t rbr_stat; + addr44_t hd_addr; + addr44_t tail_addr; + uint16_t qlen; NXGE_DEBUG_MSG((nxgep, RX_CTL, "==> nxge_rxdma_regs_dump: rdc channel %d", rdc)); @@ -1172,13 +1163,8 @@ nxge_rxdma_regs_dump(p_nxge_t nxgep, int rdc) /* RBR head */ hd_addr.addr = 0; (void) npi_rxdma_rdc_rbr_head_get(handle, rdc, &hd_addr); -#if defined(__i386) - printf("nxge_rxdma_regs_dump: got hdptr $%p \n", - (void *)(uint32_t)hd_addr.addr); -#else printf("nxge_rxdma_regs_dump: got hdptr $%p \n", (void *)hd_addr.addr); -#endif /* RBR stats */ (void) npi_rxdma_rdc_rbr_stat_get(handle, rdc, &rbr_stat); @@ -1187,13 +1173,8 @@ nxge_rxdma_regs_dump(p_nxge_t nxgep, int rdc) /* RCR tail */ tail_addr.addr = 0; (void) npi_rxdma_rdc_rcr_tail_get(handle, rdc, &tail_addr); -#if defined(__i386) - printf("nxge_rxdma_regs_dump: got tail ptr $%p \n", - (void *)(uint32_t)tail_addr.addr); -#else printf("nxge_rxdma_regs_dump: got tail ptr $%p \n", (void *)tail_addr.addr); -#endif /* RCR qlen */ (void) npi_rxdma_rdc_rcr_qlen_get(handle, rdc, &qlen); @@ -1348,18 +1329,18 @@ void nxge_rxdma_fix_channel(p_nxge_t nxgep, uint16_t channel) { int ndmas; - p_rx_rbr_rings_t rx_rbr_rings; + p_rx_rbr_rings_t rx_rbr_rings; p_rx_rbr_ring_t *rbr_rings; - p_rx_rcr_rings_t rx_rcr_rings; + p_rx_rcr_rings_t rx_rcr_rings; p_rx_rcr_ring_t *rcr_rings; - p_rx_mbox_areas_t rx_mbox_areas_p; + p_rx_mbox_areas_t rx_mbox_areas_p; p_rx_mbox_t *rx_mbox_p; p_nxge_dma_pool_t dma_buf_poolp; p_nxge_dma_pool_t dma_cntl_poolp; - p_rx_rbr_ring_t rbrp; - p_rx_rcr_ring_t rcrp; - p_rx_mbox_t mboxp; - p_nxge_dma_common_t dmap; + p_rx_rbr_ring_t rbrp; + p_rx_rcr_ring_t rcrp; + p_rx_mbox_t mboxp; + p_nxge_dma_common_t dmap; nxge_status_t status = NXGE_OK; NXGE_DEBUG_MSG((nxgep, RX_CTL, "==> nxge_rxdma_fix_channel")); @@ -1509,9 +1490,9 @@ nxge_rxdma_get_rcr_ring(p_nxge_t nxgep, uint16_t channel) static p_rx_msg_t nxge_allocb(size_t size, uint32_t pri, p_nxge_dma_common_t dmabuf_p) { - p_rx_msg_t nxge_mp = NULL; + p_rx_msg_t nxge_mp = NULL; p_nxge_dma_common_t dmamsg_p; - uchar_t *buffer; + uchar_t *buffer; nxge_mp = KMEM_ZALLOC(sizeof (rx_msg_t), KM_NOSLEEP); if (nxge_mp == NULL) { @@ -2193,7 +2174,7 @@ nxge_receive_packet(p_nxge_t nxgep, uint32_t error_disp_cnt; uint32_t msg_index; p_rx_rbr_ring_t rx_rbr_p; - p_rx_msg_t *rx_msg_ring_p; + p_rx_msg_t *rx_msg_ring_p; p_rx_msg_t rx_msg_p; uint16_t sw_offset_bytes = 0, hdr_size = 0; nxge_status_t status = NXGE_OK; @@ -2222,13 +2203,8 @@ nxge_receive_packet(p_nxge_t nxgep, pktbufsz_type = ((rcr_entry & RCR_PKTBUFSZ_MASK) >> RCR_PKTBUFSZ_SHIFT); -#if defined(__i386) - pkt_buf_addr_pp = (uint64_t *)(uint32_t)((rcr_entry & - RCR_PKT_BUF_ADDR_MASK) << RCR_PKT_BUF_ADDR_SHIFT); -#else pkt_buf_addr_pp = (uint64_t *)((rcr_entry & RCR_PKT_BUF_ADDR_MASK) << RCR_PKT_BUF_ADDR_SHIFT); -#endif channel = rcr_p->rdc; @@ -2281,13 +2257,8 @@ nxge_receive_packet(p_nxge_t nxgep, l2_len -= ETHERFCSL; /* shift 6 bits to get the full io address */ -#if defined(__i386) - pkt_buf_addr_pp = (uint64_t *)((uint32_t)pkt_buf_addr_pp << - RCR_PKT_BUF_ADDR_SHIFT_FULL); -#else pkt_buf_addr_pp = (uint64_t *)((uint64_t)pkt_buf_addr_pp << RCR_PKT_BUF_ADDR_SHIFT_FULL); -#endif NXGE_DEBUG_MSG((nxgep, RX2_CTL, "==> (rbr) nxge_receive_packet: entry 0x%0llx " "full pkt_buf_addr_pp $%p l2_len %d", @@ -3137,8 +3108,8 @@ nxge_rx_err_evnts(p_nxge_t nxgep, int channel, rx_dma_ctl_stat_t cs) * This code appears to setup some Hypervisor variables. * * Arguments: - * nxgep - * channel + * nxgep + * channel * * Notes: * What does NIU_LP_WORKAROUND mean? @@ -3195,8 +3166,8 @@ nxge_rdc_hvio_setup( * Map an RDC into our kernel space. * * Arguments: - * nxgep - * channel The channel to map. + * nxgep + * channel The channel to map. * * Notes: * 1. Allocate & initialise a memory pool, if necessary. @@ -3403,13 +3374,13 @@ nxge_map_rxdma_channel_cfg_ring(p_nxge_t nxgep, uint16_t dma_channel, p_nxge_dma_common_t *dma_cntl_p, p_rx_rbr_ring_t *rbr_p, p_rx_rcr_ring_t *rcr_p, p_rx_mbox_t *rx_mbox_p) { - p_rx_rbr_ring_t rbrp; - p_rx_rcr_ring_t rcrp; - p_rx_mbox_t mboxp; - p_nxge_dma_common_t cntl_dmap; - p_nxge_dma_common_t dmap; - p_rx_msg_t *rx_msg_ring; - p_rx_msg_t rx_msg_p; + p_rx_rbr_ring_t rbrp; + p_rx_rcr_ring_t rcrp; + p_rx_mbox_t mboxp; + p_nxge_dma_common_t cntl_dmap; + p_nxge_dma_common_t dmap; + p_rx_msg_t *rx_msg_ring; + p_rx_msg_t rx_msg_p; p_rbr_cfig_a_t rcfga_p; p_rbr_cfig_b_t rcfgb_p; p_rcrcfig_a_t cfga_p; @@ -3422,7 +3393,7 @@ nxge_map_rxdma_channel_cfg_ring(p_nxge_t nxgep, uint16_t dma_channel, uint32_t bkaddr; nxge_status_t status = NXGE_OK; int i; - uint32_t nxge_port_rcr_size; + uint32_t nxge_port_rcr_size; NXGE_DEBUG_MSG((nxgep, MEM2_CTL, "==> nxge_map_rxdma_channel_cfg_ring")); @@ -3597,13 +3568,8 @@ nxge_map_rxdma_channel_cfg_ring(p_nxge_t nxgep, uint16_t dma_channel, rcrp->comp_wt_index = 0; rcrp->rcr_desc_rd_head_p = rcrp->rcr_desc_first_p = (p_rcr_entry_t)DMA_COMMON_VPTR(rcrp->rcr_desc); -#if defined(__i386) - rcrp->rcr_desc_rd_head_pp = rcrp->rcr_desc_first_pp = - (p_rcr_entry_t)(uint32_t)DMA_COMMON_IOADDR(rcrp->rcr_desc); -#else rcrp->rcr_desc_rd_head_pp = rcrp->rcr_desc_first_pp = (p_rcr_entry_t)DMA_COMMON_IOADDR(rcrp->rcr_desc); -#endif rcrp->rcr_desc_last_p = rcrp->rcr_desc_rd_head_p + (nxge_port_rcr_size - 1); @@ -3757,11 +3723,11 @@ nxge_map_rxdma_channel_buf_ring(p_nxge_t nxgep, uint16_t channel, p_nxge_dma_common_t *dma_buf_p, p_rx_rbr_ring_t *rbr_p, uint32_t num_chunks) { - p_rx_rbr_ring_t rbrp; - p_nxge_dma_common_t dma_bufp, tmp_bufp; - p_rx_msg_t *rx_msg_ring; - p_rx_msg_t rx_msg_p; - p_mblk_t mblk_p; + p_rx_rbr_ring_t rbrp; + p_nxge_dma_common_t dma_bufp, tmp_bufp; + p_rx_msg_t *rx_msg_ring; + p_rx_msg_t rx_msg_p; + p_mblk_t mblk_p; rxring_info_t *ring_info; nxge_status_t status = NXGE_OK; @@ -3853,24 +3819,16 @@ nxge_map_rxdma_channel_buf_ring(p_nxge_t nxgep, uint16_t channel, rbrp->block_size, nxgep->rx_default_block_size, nxge_rbr_size, nxge_rbr_spare_size)); - /* Map in buffers from the buffer pool. */ + /* Map in buffers from the buffer pool. */ index = 0; for (i = 0; i < rbrp->num_blocks; i++, dma_bufp++) { bsize = dma_bufp->block_size; nblocks = dma_bufp->nblocks; -#if defined(__i386) - ring_info->buffer[i].dvma_addr = (uint32_t)dma_bufp->ioaddr_pp; -#else ring_info->buffer[i].dvma_addr = (uint64_t)dma_bufp->ioaddr_pp; -#endif ring_info->buffer[i].buf_index = i; ring_info->buffer[i].buf_size = dma_bufp->alength; ring_info->buffer[i].start_index = index; -#if defined(__i386) - ring_info->buffer[i].kaddr = (uint32_t)dma_bufp->kaddrp; -#else ring_info->buffer[i].kaddr = (uint64_t)dma_bufp->kaddrp; -#endif NXGE_DEBUG_MSG((nxgep, MEM2_CTL, " nxge_map_rxdma_channel_buf_ring: map channel %d " @@ -3984,9 +3942,9 @@ static void nxge_unmap_rxdma_channel_buf_ring(p_nxge_t nxgep, p_rx_rbr_ring_t rbr_p) { - p_rx_msg_t *rx_msg_ring; - p_rx_msg_t rx_msg_p; - rxring_info_t *ring_info; + p_rx_msg_t *rx_msg_ring; + p_rx_msg_t rx_msg_p; + rxring_info_t *ring_info; int i; uint32_t size; #ifdef NXGE_DEBUG @@ -4083,7 +4041,7 @@ nxge_unmap_rxdma_channel_buf_ring(p_nxge_t nxgep, * nxge_rxdma_hw_start_common * * Arguments: - * nxgep + * nxgep * * Notes: * @@ -4125,11 +4083,11 @@ static nxge_status_t nxge_rxdma_hw_start(p_nxge_t nxgep, int channel) { int i, ndmas; - p_rx_rbr_rings_t rx_rbr_rings; + p_rx_rbr_rings_t rx_rbr_rings; p_rx_rbr_ring_t *rbr_rings; - p_rx_rcr_rings_t rx_rcr_rings; + p_rx_rcr_rings_t rx_rcr_rings; p_rx_rcr_ring_t *rcr_rings; - p_rx_mbox_areas_t rx_mbox_areas_p; + p_rx_mbox_areas_t rx_mbox_areas_p; p_rx_mbox_t *rx_mbox_p; nxge_status_t status = NXGE_OK; @@ -4189,8 +4147,8 @@ nxge_rxdma_hw_start(p_nxge_t nxgep, int channel) static void nxge_rxdma_hw_stop(p_nxge_t nxgep, int channel) { - p_rx_rbr_rings_t rx_rbr_rings; - p_rx_rcr_rings_t rx_rcr_rings; + p_rx_rbr_rings_t rx_rbr_rings; + p_rx_rcr_rings_t rx_rcr_rings; NXGE_DEBUG_MSG((nxgep, MEM2_CTL, "==> nxge_rxdma_hw_stop")); @@ -4218,7 +4176,6 @@ nxge_rxdma_hw_stop(p_nxge_t nxgep, int channel) static nxge_status_t nxge_rxdma_start_channel(p_nxge_t nxgep, uint16_t channel, p_rx_rbr_ring_t rbr_p, p_rx_rcr_ring_t rcr_p, p_rx_mbox_t mbox_p) - { npi_handle_t handle; npi_status_t rs = NPI_SUCCESS; @@ -4231,8 +4188,8 @@ nxge_rxdma_start_channel(p_nxge_t nxgep, uint16_t channel, handle = NXGE_DEV_NPI_HANDLE(nxgep); NXGE_DEBUG_MSG((nxgep, MEM2_CTL, "nxge_rxdma_start_channel: " - "npi handle addr $%p acc $%p", - nxgep->npi_handle.regp, nxgep->npi_handle.regh)); + "npi handle addr $%p acc $%p", + nxgep->npi_handle.regp, nxgep->npi_handle.regh)); /* Reset RXDMA channel, but not if you're a guest. */ if (!isLDOMguest(nxgep)) { @@ -4264,14 +4221,14 @@ nxge_rxdma_start_channel(p_nxge_t nxgep, uint16_t channel, status = nxge_init_fzc_rxdma_channel(nxgep, channel); if (status != NXGE_OK) { NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, - "==> nxge_rxdma_start_channel: " - "init fzc rxdma failed (0x%08x channel %d)", - status, channel)); + "==> nxge_rxdma_start_channel: " + "init fzc rxdma failed (0x%08x channel %d)", + status, channel)); return (status); } NXGE_DEBUG_MSG((nxgep, MEM2_CTL, - "==> nxge_rxdma_start_channel: fzc done")); + "==> nxge_rxdma_start_channel: fzc done")); } /* Set up the interrupt event masks. */ @@ -4281,17 +4238,17 @@ nxge_rxdma_start_channel(p_nxge_t nxgep, uint16_t channel, &ent_mask); if (rs != NPI_SUCCESS) { NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, - "==> nxge_rxdma_start_channel: " - "init rxdma event masks failed " - "(0x%08x channel %d)", - status, channel)); + "==> nxge_rxdma_start_channel: " + "init rxdma event masks failed " + "(0x%08x channel %d)", + status, channel)); return (NXGE_ERROR | rs); } NXGE_DEBUG_MSG((nxgep, MEM2_CTL, - "==> nxge_rxdma_start_channel: " - "event done: channel %d (mask 0x%016llx)", - channel, ent_mask.value)); + "==> nxge_rxdma_start_channel: " + "event done: channel %d (mask 0x%016llx)", + channel, ent_mask.value)); /* Initialize the receive DMA control and status register */ cs.value = 0; @@ -4301,17 +4258,17 @@ nxge_rxdma_start_channel(p_nxge_t nxgep, uint16_t channel, cs.bits.hdw.rbr_empty = 1; status = nxge_init_rxdma_channel_cntl_stat(nxgep, channel, &cs); NXGE_DEBUG_MSG((nxgep, MEM2_CTL, "==> nxge_rxdma_start_channel: " - "channel %d rx_dma_cntl_stat 0x%0016llx", channel, cs.value)); + "channel %d rx_dma_cntl_stat 0x%0016llx", channel, cs.value)); if (status != NXGE_OK) { NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, - "==> nxge_rxdma_start_channel: " - "init rxdma control register failed (0x%08x channel %d", - status, channel)); + "==> nxge_rxdma_start_channel: " + "init rxdma control register failed (0x%08x channel %d", + status, channel)); return (status); } NXGE_DEBUG_MSG((nxgep, MEM2_CTL, "==> nxge_rxdma_start_channel: " - "control done - channel %d cs 0x%016llx", channel, cs.value)); + "control done - channel %d cs 0x%016llx", channel, cs.value)); /* * Load RXDMA descriptors, buffers, mailbox, @@ -4346,19 +4303,19 @@ nxge_rxdma_start_channel(p_nxge_t nxgep, uint16_t channel, ent_mask.value = 0; ent_mask.value |= (RX_DMA_ENT_MSK_WRED_DROP_MASK | - RX_DMA_ENT_MSK_PTDROP_PKT_MASK); + RX_DMA_ENT_MSK_PTDROP_PKT_MASK); rs = npi_rxdma_event_mask(handle, OP_SET, channel, - &ent_mask); + &ent_mask); if (rs != NPI_SUCCESS) { NXGE_DEBUG_MSG((nxgep, MEM2_CTL, - "==> nxge_rxdma_start_channel: " - "init rxdma event masks failed (0x%08x channel %d)", - status, channel)); + "==> nxge_rxdma_start_channel: " + "init rxdma event masks failed (0x%08x channel %d)", + status, channel)); return (NXGE_ERROR | rs); } NXGE_DEBUG_MSG((nxgep, MEM2_CTL, "==> nxge_rxdma_start_channel: " - "control done - channel %d cs 0x%016llx", channel, cs.value)); + "control done - channel %d cs 0x%016llx", channel, cs.value)); NXGE_DEBUG_MSG((nxgep, MEM2_CTL, "<== nxge_rxdma_start_channel")); @@ -4553,7 +4510,7 @@ nxge_rxdma_handle_sys_errors(p_nxge_t nxgep) static nxge_status_t nxge_rxdma_handle_port_errors(p_nxge_t nxgep, uint32_t ipp_status, - uint32_t zcp_status) + uint32_t zcp_status) { boolean_t rxport_fatal = B_FALSE; p_nxge_rdc_sys_stats_t statsp; @@ -4669,13 +4626,8 @@ nxge_rxdma_fatal_err_recover(p_nxge_t nxgep, uint16_t channel) rcrp->comp_wt_index = 0; rcrp->rcr_desc_rd_head_p = rcrp->rcr_desc_first_p = (p_rcr_entry_t)DMA_COMMON_VPTR(rcrp->rcr_desc); -#if defined(__i386) - rcrp->rcr_desc_rd_head_pp = rcrp->rcr_desc_first_pp = - (p_rcr_entry_t)(uint32_t)DMA_COMMON_IOADDR(rcrp->rcr_desc); -#else rcrp->rcr_desc_rd_head_pp = rcrp->rcr_desc_first_pp = (p_rcr_entry_t)DMA_COMMON_IOADDR(rcrp->rcr_desc); -#endif rcrp->rcr_desc_last_p = rcrp->rcr_desc_rd_head_p + (nxge_port_rcr_size - 1); @@ -4877,13 +4829,8 @@ nxge_rxdma_inject_err(p_nxge_t nxgep, uint32_t err_id, uint8_t chan) cs.bits.hdw.rbrlogpage = 1; else if (err_id == NXGE_FM_EREPORT_RDMC_CFIGLOGPAGE) cs.bits.hdw.cfiglogpage = 1; -#if defined(__i386) - cmn_err(CE_NOTE, "!Write 0x%llx to RX_DMA_CTL_STAT_DBG_REG\n", - cs.value); -#else cmn_err(CE_NOTE, "!Write 0x%lx to RX_DMA_CTL_STAT_DBG_REG\n", cs.value); -#endif RXDMA_REG_WRITE64(nxgep->npi_handle, RX_DMA_CTL_STAT_DBG_REG, chan, cs.value); break; @@ -4897,15 +4844,9 @@ nxge_rxdma_inject_err(p_nxge_t nxgep, uint32_t err_id, uint8_t chan) cdfs.bits.ldw.zcp_eop_err = (1 << nxgep->mac.portnum); else if (err_id == NXGE_FM_EREPORT_RDMC_IPP_EOP_ERR) cdfs.bits.ldw.ipp_eop_err = (1 << nxgep->mac.portnum); -#if defined(__i386) - cmn_err(CE_NOTE, - "!Write 0x%llx to RX_CTL_DAT_FIFO_STAT_DBG_REG\n", - cdfs.value); -#else cmn_err(CE_NOTE, "!Write 0x%lx to RX_CTL_DAT_FIFO_STAT_DBG_REG\n", cdfs.value); -#endif NXGE_REG_WR64(nxgep->npi_handle, RX_CTL_DAT_FIFO_STAT_DBG_REG, cdfs.value); break; @@ -4919,7 +4860,7 @@ nxge_rxdma_inject_err(p_nxge_t nxgep, uint32_t err_id, uint8_t chan) static void nxge_rxdma_databuf_free(p_rx_rbr_ring_t rbr_p) { - rxring_info_t *ring_info; + rxring_info_t *ring_info; int index; uint32_t chunk_size; uint64_t kaddr; @@ -4983,11 +4924,7 @@ nxge_free_buf(buf_alloc_type_t alloc_type, uint64_t kaddr, uint32_t buf_size) NXGE_DEBUG_MSG((NULL, DMA_CTL, "==> nxge_free_buf: freeing kmem $%p size %d", kaddr, buf_size)); -#if defined(__i386) - KMEM_FREE((void *)(uint32_t)kaddr, buf_size); -#else KMEM_FREE((void *)kaddr, buf_size); -#endif break; #if defined(sun4v) && defined(NIU_LP_WORKAROUND) diff --git a/usr/src/uts/common/io/nxge/nxge_send.c b/usr/src/uts/common/io/nxge/nxge_send.c index 94553c6352..303d7385dd 100644 --- a/usr/src/uts/common/io/nxge/nxge_send.c +++ b/usr/src/uts/common/io/nxge/nxge_send.c @@ -45,9 +45,9 @@ static void nxge_hcksum_retrieve(mblk_t *, static uint32_t nxge_csgen(uint16_t *, int); extern uint32_t nxge_reclaim_pending; -extern uint32_t nxge_bcopy_thresh; -extern uint32_t nxge_dvma_thresh; -extern uint32_t nxge_dma_stream_thresh; +extern uint32_t nxge_bcopy_thresh; +extern uint32_t nxge_dvma_thresh; +extern uint32_t nxge_dma_stream_thresh; extern uint32_t nxge_tx_minfree; extern uint32_t nxge_tx_intr_thres; extern uint32_t nxge_tx_max_gathers; @@ -135,56 +135,56 @@ nxge_tx_ring_send(void *arg, mblk_t *mp) int nxge_start(p_nxge_t nxgep, p_tx_ring_t tx_ring_p, p_mblk_t mp) { - int dma_status, status = 0; - p_tx_desc_t tx_desc_ring_vp; + int dma_status, status = 0; + p_tx_desc_t tx_desc_ring_vp; npi_handle_t npi_desc_handle; - nxge_os_dma_handle_t tx_desc_dma_handle; - p_tx_desc_t tx_desc_p; - p_tx_msg_t tx_msg_ring; - p_tx_msg_t tx_msg_p = NULL; + nxge_os_dma_handle_t tx_desc_dma_handle; + p_tx_desc_t tx_desc_p; + p_tx_msg_t tx_msg_ring; + p_tx_msg_t tx_msg_p = NULL; tx_desc_t tx_desc, *tmp_desc_p; tx_desc_t sop_tx_desc, *sop_tx_desc_p; p_tx_pkt_header_t hdrp = NULL; tx_pkt_hdr_all_t tmp_hdrp; p_tx_pkt_hdr_all_t pkthdrp; uint8_t npads = 0; - uint64_t dma_ioaddr; + uint64_t dma_ioaddr; uint32_t dma_flags; int last_bidx; - uint8_t *b_rptr; - caddr_t kaddr; + uint8_t *b_rptr; + caddr_t kaddr; uint32_t nmblks; uint32_t ngathers; uint32_t clen; - int len; + int len; uint32_t pkt_len, pack_len, min_len; uint32_t bcopy_thresh; - int i, cur_index, sop_index; + int i, cur_index, sop_index; uint16_t tail_index; boolean_t tail_wrap = B_FALSE; nxge_dma_common_t desc_area; - nxge_os_dma_handle_t dma_handle; - ddi_dma_cookie_t dma_cookie; + nxge_os_dma_handle_t dma_handle; + ddi_dma_cookie_t dma_cookie; npi_handle_t npi_handle; - p_mblk_t nmp; + p_mblk_t nmp; p_mblk_t t_mp; - uint32_t ncookies; - boolean_t good_packet; - boolean_t mark_mode = B_FALSE; - p_nxge_stats_t statsp; + uint32_t ncookies; + boolean_t good_packet; + boolean_t mark_mode = B_FALSE; + p_nxge_stats_t statsp; p_nxge_tx_ring_stats_t tdc_stats; - t_uscalar_t start_offset = 0; - t_uscalar_t stuff_offset = 0; - t_uscalar_t end_offset = 0; - t_uscalar_t value = 0; - t_uscalar_t cksum_flags = 0; + t_uscalar_t start_offset = 0; + t_uscalar_t stuff_offset = 0; + t_uscalar_t end_offset = 0; + t_uscalar_t value = 0; + t_uscalar_t cksum_flags = 0; boolean_t cksum_on = B_FALSE; uint32_t boff = 0; uint64_t tot_xfer_len = 0; boolean_t header_set = B_FALSE; #ifdef NXGE_DEBUG - p_tx_desc_t tx_desc_ring_pp; - p_tx_desc_t tx_desc_pp; + p_tx_desc_t tx_desc_ring_pp; + p_tx_desc_t tx_desc_pp; tx_desc_t *save_desc_p; int dump_len; int sad_len; @@ -192,11 +192,11 @@ nxge_start(p_nxge_t nxgep, p_tx_ring_t tx_ring_p, p_mblk_t mp) int xfer_len; uint32_t msgsize; #endif - p_mblk_t mp_chain = NULL; + p_mblk_t mp_chain = NULL; boolean_t is_lso = B_FALSE; boolean_t lso_again; int cur_index_lso; - p_mblk_t nmp_lso_save = NULL; + p_mblk_t nmp_lso_save = NULL; uint32_t lso_ngathers; boolean_t lso_tail_wrap = B_FALSE; @@ -483,11 +483,7 @@ start_again: tx_desc_pp = &tx_desc_ring_pp[i]; #endif tx_msg_p = &tx_msg_ring[i]; -#if defined(__i386) - npi_desc_handle.regp = (uint32_t)tx_desc_p; -#else npi_desc_handle.regp = (uint64_t)tx_desc_p; -#endif if (!header_set && ((!nxge_tx_use_bcopy && (len > TX_BCOPY_SIZE)) || (len >= bcopy_thresh))) { @@ -654,11 +650,7 @@ start_again: "ngathers %d", len, clen, ngathers)); -#if defined(__i386) - npi_desc_handle.regp = (uint32_t)tx_desc_p; -#else npi_desc_handle.regp = (uint64_t)tx_desc_p; -#endif while (ncookies > 1) { ngathers++; /* @@ -705,13 +697,8 @@ start_again: tx_ring_p->tx_wrap_mask); tx_desc_p = &tx_desc_ring_vp[i]; -#if defined(__i386) - npi_desc_handle.regp = - (uint32_t)tx_desc_p; -#else npi_desc_handle.regp = (uint64_t)tx_desc_p; -#endif tx_msg_p = &tx_msg_ring[i]; tx_msg_p->flags.dma_type = USE_NONE; tx_desc.value = 0; @@ -745,11 +732,7 @@ start_again: } nmp = nmp->b_cont; nxge_start_control_header_only: -#if defined(__i386) - npi_desc_handle.regp = (uint32_t)tx_desc_p; -#else npi_desc_handle.regp = (uint64_t)tx_desc_p; -#endif ngathers++; if (ngathers == 1) { @@ -834,11 +817,7 @@ nxge_start_control_header_only: tx_msg_p->tx_message = mp; tx_desc_p = &tx_desc_ring_vp[sop_index]; -#if defined(__i386) - npi_desc_handle.regp = (uint32_t)tx_desc_p; -#else npi_desc_handle.regp = (uint64_t)tx_desc_p; -#endif pkthdrp = (p_tx_pkt_hdr_all_t)hdrp; pkthdrp->reserved = 0; @@ -1132,11 +1111,7 @@ nxge_start_fail2: NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: clean up")); for (i = 0; i < ngathers; i++) { tx_desc_p = &tx_desc_ring_vp[cur_index]; -#if defined(__i386) - npi_handle.regp = (uint32_t)tx_desc_p; -#else npi_handle.regp = (uint64_t)tx_desc_p; -#endif tx_msg_p = &tx_msg_ring[cur_index]; (void) npi_txdma_desc_set_zero(npi_handle, 1); if (tx_msg_p->flags.dma_type == USE_DVMA) { diff --git a/usr/src/uts/common/io/nxge/nxge_txc.c b/usr/src/uts/common/io/nxge/nxge_txc.c index c143866574..417119c4d0 100644 --- a/usr/src/uts/common/io/nxge/nxge_txc.c +++ b/usr/src/uts/common/io/nxge/nxge_txc.c @@ -30,7 +30,7 @@ static nxge_status_t nxge_txc_handle_port_errors(p_nxge_t, uint32_t); static void nxge_txc_inject_port_err(uint8_t, txc_int_stat_dbg_t *, - uint8_t istats); + uint8_t istats); extern nxge_status_t nxge_tx_port_fatal_err_recover(p_nxge_t); nxge_status_t @@ -123,8 +123,8 @@ fail: * Bind a TDC to a port. * * Arguments: - * nxgep - * channel The channel to bind. + * nxgep + * channel The channel to bind. * * Notes: * @@ -225,8 +225,8 @@ fail: * Unbind a TDC from a port. * * Arguments: - * nxgep - * channel The channel to unbind. + * nxgep + * channel The channel to unbind. * * Notes: * @@ -535,13 +535,8 @@ nxge_txc_inject_err(p_nxge_t nxgep, uint32_t err_id) ro_ecc_ctl.bits.ldw.single_bit_err = 1; else ro_ecc_ctl.bits.ldw.double_bit_err = 1; -#if defined(__i386) - cmn_err(CE_NOTE, "!Write 0x%llx to TXC_ROECC_CTL_REG\n", - ro_ecc_ctl.value); -#else cmn_err(CE_NOTE, "!Write 0x%lx to TXC_ROECC_CTL_REG\n", ro_ecc_ctl.value); -#endif TXC_FZC_CNTL_REG_WRITE64(nxgep->npi_handle, TXC_ROECC_CTL_REG, portn, ro_ecc_ctl.value); break; @@ -554,13 +549,8 @@ nxge_txc_inject_err(p_nxge_t nxgep, uint32_t err_id) sf_ecc_ctl.bits.ldw.single_bit_err = 1; else sf_ecc_ctl.bits.ldw.double_bit_err = 1; -#if defined(__i386) - cmn_err(CE_NOTE, "!Write 0x%llx to TXC_SFECC_CTL_REG\n", - sf_ecc_ctl.value); -#else cmn_err(CE_NOTE, "!Write 0x%lx to TXC_SFECC_CTL_REG\n", sf_ecc_ctl.value); -#endif TXC_FZC_CNTL_REG_WRITE64(nxgep->npi_handle, TXC_SFECC_CTL_REG, portn, sf_ecc_ctl.value); break; @@ -569,13 +559,8 @@ nxge_txc_inject_err(p_nxge_t nxgep, uint32_t err_id) &txcs.value); nxge_txc_inject_port_err(portn, &txcs, TXC_INT_STAT_REORDER_ERR); -#if defined(__i386) - cmn_err(CE_NOTE, "!Write 0x%llx to TXC_INT_STAT_DBG_REG\n", - txcs.value); -#else cmn_err(CE_NOTE, "!Write 0x%lx to TXC_INT_STAT_DBG_REG\n", txcs.value); -#endif NXGE_REG_WR64(nxgep->npi_handle, TXC_INT_STAT_DBG_REG, txcs.value); break; @@ -587,7 +572,7 @@ nxge_txc_inject_err(p_nxge_t nxgep, uint32_t err_id) static void nxge_txc_inject_port_err(uint8_t portn, txc_int_stat_dbg_t *txcs, - uint8_t istats) + uint8_t istats) { switch (portn) { case 0: diff --git a/usr/src/uts/common/io/nxge/nxge_txdma.c b/usr/src/uts/common/io/nxge/nxge_txdma.c index 00a509a191..ddbcce5f7e 100644 --- a/usr/src/uts/common/io/nxge/nxge_txdma.c +++ b/usr/src/uts/common/io/nxge/nxge_txdma.c @@ -31,23 +31,23 @@ #include <npi_tx_wr64.h> #include <sys/llc1.h> -uint32_t nxge_reclaim_pending = TXDMA_RECLAIM_PENDING_DEFAULT; +uint32_t nxge_reclaim_pending = TXDMA_RECLAIM_PENDING_DEFAULT; uint32_t nxge_tx_minfree = 64; uint32_t nxge_tx_intr_thres = 0; uint32_t nxge_tx_max_gathers = TX_MAX_GATHER_POINTERS; uint32_t nxge_tx_tiny_pack = 1; uint32_t nxge_tx_use_bcopy = 1; -extern uint32_t nxge_tx_ring_size; -extern uint32_t nxge_bcopy_thresh; -extern uint32_t nxge_dvma_thresh; -extern uint32_t nxge_dma_stream_thresh; -extern dma_method_t nxge_force_dma; +extern uint32_t nxge_tx_ring_size; +extern uint32_t nxge_bcopy_thresh; +extern uint32_t nxge_dvma_thresh; +extern uint32_t nxge_dma_stream_thresh; +extern dma_method_t nxge_force_dma; extern uint32_t nxge_cksum_offload; /* Device register access attributes for PIO. */ extern ddi_device_acc_attr_t nxge_dev_reg_acc_attr; -/* Device descriptor access attributes for DMA. */ +/* Device descriptor access attributes for DMA. */ extern ddi_device_acc_attr_t nxge_dev_desc_dma_acc_attr; /* Device buffer access attributes for DMA. */ extern ddi_device_acc_attr_t nxge_dev_buf_dma_acc_attr; @@ -220,7 +220,7 @@ nxge_uninit_txdma_channel_exit: void nxge_setup_dma_common(p_nxge_dma_common_t dest_p, p_nxge_dma_common_t src_p, - uint32_t entries, uint32_t size) + uint32_t entries, uint32_t size) { size_t tsize; *dest_p = *src_p; @@ -242,9 +242,9 @@ nxge_setup_dma_common(p_nxge_dma_common_t dest_p, p_nxge_dma_common_t src_p, * Reset a TDC. * * Arguments: - * nxgep - * channel The channel to reset. - * reg_data The current TX_CS. + * nxgep + * channel The channel to reset. + * reg_data The current TX_CS. * * Notes: * @@ -297,9 +297,9 @@ nxge_reset_txdma_channel(p_nxge_t nxgep, uint16_t channel, uint64_t reg_data) * Enable interrupts for a set of events. * * Arguments: - * nxgep - * channel The channel to map. - * mask_p The events to enable. + * nxgep + * channel The channel to map. + * mask_p The events to enable. * * Notes: * @@ -314,7 +314,7 @@ nxge_reset_txdma_channel(p_nxge_t nxgep, uint16_t channel, uint64_t reg_data) */ nxge_status_t nxge_init_txdma_channel_event_mask(p_nxge_t nxgep, uint16_t channel, - p_tx_dma_ent_msk_t mask_p) + p_tx_dma_ent_msk_t mask_p) { npi_handle_t handle; npi_status_t rs = NPI_SUCCESS; @@ -338,8 +338,8 @@ nxge_init_txdma_channel_event_mask(p_nxge_t nxgep, uint16_t channel, * Stop a TDC. If at first we don't succeed, inject an error. * * Arguments: - * nxgep - * channel The channel to stop. + * nxgep + * channel The channel to stop. * * Notes: * @@ -354,7 +354,7 @@ nxge_init_txdma_channel_event_mask(p_nxge_t nxgep, uint16_t channel, */ nxge_status_t nxge_init_txdma_channel_cntl_stat(p_nxge_t nxgep, uint16_t channel, - uint64_t reg_data) + uint64_t reg_data) { npi_handle_t handle; npi_status_t rs = NPI_SUCCESS; @@ -380,10 +380,10 @@ nxge_init_txdma_channel_cntl_stat(p_nxge_t nxgep, uint16_t channel, * Enable a TDC. * * Arguments: - * nxgep - * channel The channel to enable. - * tx_desc_p channel's transmit descriptor ring. - * mbox_p channel's mailbox, + * nxgep + * channel The channel to enable. + * tx_desc_p channel's transmit descriptor ring. + * mbox_p channel's mailbox, * * Notes: * @@ -403,7 +403,7 @@ nxge_init_txdma_channel_cntl_stat(p_nxge_t nxgep, uint16_t channel, */ nxge_status_t nxge_enable_txdma_channel(p_nxge_t nxgep, - uint16_t channel, p_tx_ring_t tx_desc_p, p_tx_mbox_t mbox_p) + uint16_t channel, p_tx_ring_t tx_desc_p, p_tx_mbox_t mbox_p) { npi_handle_t handle; npi_status_t rs = NPI_SUCCESS; @@ -451,21 +451,21 @@ nxge_enable_txdma_channel(p_nxge_t nxgep, void nxge_fill_tx_hdr(p_mblk_t mp, boolean_t fill_len, - boolean_t l4_cksum, int pkt_len, uint8_t npads, - p_tx_pkt_hdr_all_t pkthdrp, - t_uscalar_t start_offset, - t_uscalar_t stuff_offset) + boolean_t l4_cksum, int pkt_len, uint8_t npads, + p_tx_pkt_hdr_all_t pkthdrp, + t_uscalar_t start_offset, + t_uscalar_t stuff_offset) { p_tx_pkt_header_t hdrp; - p_mblk_t nmp; + p_mblk_t nmp; uint64_t tmp; - size_t mblk_len; - size_t iph_len; - size_t hdrs_size; + size_t mblk_len; + size_t iph_len; + size_t hdrs_size; uint8_t hdrs_buf[sizeof (struct ether_header) + 64 + sizeof (uint32_t)]; uint8_t *cursor; - uint8_t *ip_buf; + uint8_t *ip_buf; uint16_t eth_type; uint8_t ipproto; boolean_t is_vlan = B_FALSE; @@ -744,7 +744,7 @@ fill_tx_header_done: p_mblk_t nxge_tx_pkt_header_reserve(p_mblk_t mp, uint8_t *npads) { - p_mblk_t newmp = NULL; + p_mblk_t newmp = NULL; if ((newmp = allocb(TX_PKT_HEADER_SIZE, BPRI_MED)) == NULL) { NXGE_DEBUG_MSG((NULL, TX_CTL, @@ -772,11 +772,11 @@ nxge_tx_pkt_header_reserve(p_mblk_t mp, uint8_t *npads) int nxge_tx_pkt_nmblocks(p_mblk_t mp, int *tot_xfer_len_p) { - uint_t nmblks; + uint_t nmblks; ssize_t len; - uint_t pkt_len; - p_mblk_t nmp, bmp, tmp; - uint8_t *b_wptr; + uint_t pkt_len; + p_mblk_t nmp, bmp, tmp; + uint8_t *b_wptr; NXGE_DEBUG_MSG((NULL, TX_CTL, "==> nxge_tx_pkt_nmblocks: mp $%p rptr $%p wptr $%p " @@ -900,18 +900,18 @@ nxge_tx_pkt_nmblocks(p_mblk_t mp, int *tot_xfer_len_p) boolean_t nxge_txdma_reclaim(p_nxge_t nxgep, p_tx_ring_t tx_ring_p, int nmblks) { - boolean_t status = B_TRUE; + boolean_t status = B_TRUE; p_nxge_dma_common_t tx_desc_dma_p; nxge_dma_common_t desc_area; - p_tx_desc_t tx_desc_ring_vp; - p_tx_desc_t tx_desc_p; - p_tx_desc_t tx_desc_pp; - tx_desc_t r_tx_desc; - p_tx_msg_t tx_msg_ring; - p_tx_msg_t tx_msg_p; + p_tx_desc_t tx_desc_ring_vp; + p_tx_desc_t tx_desc_p; + p_tx_desc_t tx_desc_pp; + tx_desc_t r_tx_desc; + p_tx_msg_t tx_msg_ring; + p_tx_msg_t tx_msg_p; npi_handle_t handle; tx_ring_hdl_t tx_head; - uint32_t pkt_len; + uint32_t pkt_len; uint_t tx_rd_index; uint16_t head_index, tail_index; uint8_t tdc; @@ -924,7 +924,7 @@ nxge_txdma_reclaim(p_nxge_t nxgep, p_tx_ring_t tx_ring_p, int nmblks) status = ((tx_ring_p->descs_pending < nxge_reclaim_pending) && (nmblks != 0)); NXGE_DEBUG_MSG((nxgep, TX_CTL, - "==> nxge_txdma_reclaim: pending %d reclaim %d nmblks %d", + "==> nxge_txdma_reclaim: pending %d reclaim %d nmblks %d", tx_ring_p->descs_pending, nxge_reclaim_pending, nmblks)); if (!status) { @@ -1103,8 +1103,8 @@ nxge_txdma_reclaim(p_nxge_t nxgep, p_tx_ring_t tx_ring_p, int nmblks) * Process a TDC interrupt * * Arguments: - * arg1 A Logical Device state Vector (LSV) data structure. - * arg2 nxge_t * + * arg1 A Logical Device state Vector (LSV) data structure. + * arg2 nxge_t * * * Notes: * @@ -1132,11 +1132,11 @@ nxge_tx_intr(char *arg1, char *arg2) uint32_t vindex; npi_handle_t handle; tx_cs_t cs; - p_tx_ring_t *tx_rings; - p_tx_ring_t tx_ring_p; + p_tx_ring_t *tx_rings; + p_tx_ring_t tx_ring_p; npi_status_t rs = NPI_SUCCESS; - uint_t serviced = DDI_INTR_UNCLAIMED; - nxge_status_t status = NXGE_OK; + uint_t serviced = DDI_INTR_UNCLAIMED; + nxge_status_t status = NXGE_OK; if (ldvp == NULL) { NXGE_DEBUG_MSG((NULL, INT_CTL, @@ -1291,8 +1291,8 @@ nxge_txdma_channel_disable( * Toggle all TDCs on (enable) or off (disable). * * Arguments: - * nxgep - * enable Enable or disable a TDC. + * nxgep + * enable Enable or disable a TDC. * * Notes: * @@ -1401,8 +1401,8 @@ nxge_txdma_disable_channel(p_nxge_t nxgep, uint16_t channel) * Stop a TDC. If at first we don't succeed, inject an error. * * Arguments: - * nxgep - * channel The channel to stop. + * nxgep + * channel The channel to stop. * * Notes: * @@ -1640,7 +1640,7 @@ nxge_txdma_hw_kick_channel(p_nxge_t nxgep, p_tx_ring_t ring_p, uint16_t channel) * Check the state of all TDCs belonging to nxgep. * * Arguments: - * nxgep + * nxgep * * Notes: * Called by nxge_hw.c:nxge_check_hw_state(). @@ -1682,9 +1682,9 @@ nxge_check_tx_hang_exit: * Reset a TDC. * * Arguments: - * nxgep - * channel The channel to reset. - * reg_data The current TX_CS. + * nxgep + * channel The channel to reset. + * reg_data The current TX_CS. * * Notes: * Called by nxge_check_tx_hang() @@ -1754,9 +1754,9 @@ nxge_txdma_hung(p_nxge_t nxgep) * Reset a TDC. * * Arguments: - * nxgep - * ring <channel>'s ring. - * channel The channel to reset. + * nxgep + * ring <channel>'s ring. + * channel The channel to reset. * * Notes: * Called by nxge_txdma.c:nxge_txdma_hung() @@ -1838,9 +1838,9 @@ nxge_txdma_channel_hung(p_nxge_t nxgep, p_tx_ring_t tx_ring_p, uint16_t channel) * Disable a TDC. * * Arguments: - * nxgep - * channel The channel to reset. - * reg_data The current TX_CS. + * nxgep + * channel The channel to reset. + * reg_data The current TX_CS. * * Notes: * Called by nxge_check_tx_hang() @@ -1890,8 +1890,8 @@ nxge_fixup_hung_txdma_rings(p_nxge_t nxgep) * 'Fix' a hung TDC. * * Arguments: - * nxgep - * channel The channel to fix. + * nxgep + * channel The channel to fix. * * Notes: * Called by nxge_fixup_hung_txdma_rings() @@ -1941,7 +1941,7 @@ nxge_txdma_fix_hung_channel(p_nxge_t nxgep, uint16_t channel) /*ARGSUSED*/ void nxge_txdma_fixup_hung_channel(p_nxge_t nxgep, p_tx_ring_t ring_p, - uint16_t channel) + uint16_t channel) { npi_handle_t handle; tdmc_intr_dbg_t intr_dbg; @@ -2092,9 +2092,9 @@ void nxge_txdma_regs_dump(p_nxge_t nxgep, int channel) { npi_handle_t handle; - tx_ring_hdl_t hdl; - tx_ring_kick_t kick; - tx_cs_t cs; + tx_ring_hdl_t hdl; + tx_ring_kick_t kick; + tx_cs_t cs; txc_control_t control; uint32_t bitmap = 0; uint32_t burst = 0; @@ -2141,11 +2141,7 @@ nxge_txdma_regs_dump(p_nxge_t nxgep, int channel) ipp_status_t status; (void) npi_ipp_get_status(handle, nxgep->function_num, &status); -#if defined(__i386) - printf("\n\tIPP status 0x%llux\n", (uint64_t)status.value); -#else printf("\n\tIPP status 0x%lux\n", (uint64_t)status.value); -#endif } } @@ -2155,8 +2151,8 @@ nxge_txdma_regs_dump(p_nxge_t nxgep, int channel) * I'm not exactly sure what this code does. * * Arguments: - * nxgep - * channel The channel to map. + * nxgep + * channel The channel to map. * * Notes: * @@ -2173,7 +2169,7 @@ nxge_tdc_hvio_setup( { nxge_dma_common_t *data; nxge_dma_common_t *control; - tx_ring_t *ring; + tx_ring_t *ring; ring = nxgep->tx_rings->rings[channel]; data = nxgep->tx_buf_pool_p->dma_buf_pool_p[channel]; @@ -2215,7 +2211,7 @@ nxge_map_txdma(p_nxge_t nxgep, int channel) { nxge_dma_common_t **pData; nxge_dma_common_t **pControl; - tx_ring_t **pRing, *ring; + tx_ring_t **pRing, *ring; tx_mbox_t **mailbox; uint32_t num_chunks; @@ -2283,11 +2279,11 @@ nxge_map_txdma(p_nxge_t nxgep, int channel) static nxge_status_t nxge_map_txdma_channel(p_nxge_t nxgep, uint16_t channel, - p_nxge_dma_common_t *dma_buf_p, - p_tx_ring_t *tx_desc_p, - uint32_t num_chunks, - p_nxge_dma_common_t *dma_cntl_p, - p_tx_mbox_t *tx_mbox_p) + p_nxge_dma_common_t *dma_buf_p, + p_tx_ring_t *tx_desc_p, + uint32_t num_chunks, + p_nxge_dma_common_t *dma_cntl_p, + p_tx_mbox_t *tx_mbox_p) { int status = NXGE_OK; @@ -2370,8 +2366,8 @@ nxge_unmap_txdma_channel(p_nxge_t nxgep, uint16_t channel) * This function allocates all of the per-channel data structures. * * Arguments: - * nxgep - * dma_channel The channel to map. + * nxgep + * dma_channel The channel to map. * dma_cntl_p * tx_ring_p dma_channel's transmit ring * tx_mbox_p dma_channel's mailbox @@ -2390,13 +2386,13 @@ nxge_unmap_txdma_channel(p_nxge_t nxgep, uint16_t channel) /*ARGSUSED*/ static void nxge_map_txdma_channel_cfg_ring(p_nxge_t nxgep, uint16_t dma_channel, - p_nxge_dma_common_t *dma_cntl_p, - p_tx_ring_t tx_ring_p, - p_tx_mbox_t *tx_mbox_p) + p_nxge_dma_common_t *dma_cntl_p, + p_tx_ring_t tx_ring_p, + p_tx_mbox_t *tx_mbox_p) { - p_tx_mbox_t mboxp; - p_nxge_dma_common_t cntl_dmap; - p_nxge_dma_common_t dmap; + p_tx_mbox_t mboxp; + p_nxge_dma_common_t cntl_dmap; + p_nxge_dma_common_t dmap; p_tx_rng_cfig_t tx_ring_cfig_p; p_tx_ring_kick_t tx_ring_kick_p; p_tx_cs_t tx_cs_p; @@ -2491,7 +2487,7 @@ nxge_map_txdma_channel_cfg_ring(p_nxge_t nxgep, uint16_t dma_channel, /*ARGSUSED*/ static void nxge_unmap_txdma_channel_cfg_ring(p_nxge_t nxgep, - p_tx_ring_t tx_ring_p, p_tx_mbox_t tx_mbox_p) + p_tx_ring_t tx_ring_p, p_tx_mbox_t tx_mbox_p) { NXGE_DEBUG_MSG((nxgep, MEM3_CTL, "==> nxge_unmap_txdma_channel_cfg_ring: channel %d", @@ -2508,8 +2504,8 @@ nxge_unmap_txdma_channel_cfg_ring(p_nxge_t nxgep, * * * Arguments: - * nxgep - * channel The channel to map. + * nxgep + * channel The channel to map. * dma_buf_p * tx_desc_p channel's descriptor ring * num_chunks @@ -2527,19 +2523,19 @@ nxge_unmap_txdma_channel_cfg_ring(p_nxge_t nxgep, */ static nxge_status_t nxge_map_txdma_channel_buf_ring(p_nxge_t nxgep, uint16_t channel, - p_nxge_dma_common_t *dma_buf_p, - p_tx_ring_t *tx_desc_p, uint32_t num_chunks) + p_nxge_dma_common_t *dma_buf_p, + p_tx_ring_t *tx_desc_p, uint32_t num_chunks) { - p_nxge_dma_common_t dma_bufp, tmp_bufp; - p_nxge_dma_common_t dmap; + p_nxge_dma_common_t dma_bufp, tmp_bufp; + p_nxge_dma_common_t dmap; nxge_os_dma_handle_t tx_buf_dma_handle; - p_tx_ring_t tx_ring_p; - p_tx_msg_t tx_msg_ring = NULL; + p_tx_ring_t tx_ring_p; + p_tx_msg_t tx_msg_ring = NULL; nxge_status_t status = NXGE_OK; int ddi_status = DDI_SUCCESS; int i, j, index = 0; uint32_t size = 0, bsize; - uint32_t nblocks, nmsgs; + uint32_t nblocks, nmsgs; char qname[TASKQ_NAMELEN]; NXGE_DEBUG_MSG((nxgep, MEM3_CTL, @@ -2698,8 +2694,8 @@ nxge_map_txdma_channel_buf_ring_exit: static void nxge_unmap_txdma_channel_buf_ring(p_nxge_t nxgep, p_tx_ring_t tx_ring_p) { - p_tx_msg_t tx_msg_ring; - p_tx_msg_t tx_msg_p; + p_tx_msg_t tx_msg_ring; + p_tx_msg_t tx_msg_p; int i; NXGE_DEBUG_MSG((nxgep, MEM3_CTL, @@ -2762,9 +2758,9 @@ nxge_unmap_txdma_channel_buf_ring(p_nxge_t nxgep, p_tx_ring_t tx_ring_p) static nxge_status_t nxge_txdma_hw_start(p_nxge_t nxgep, int channel) { - p_tx_rings_t tx_rings; - p_tx_ring_t *tx_desc_rings; - p_tx_mbox_areas_t tx_mbox_areas_p; + p_tx_rings_t tx_rings; + p_tx_ring_t *tx_desc_rings; + p_tx_mbox_areas_t tx_mbox_areas_p; p_tx_mbox_t *tx_mbox_p; nxge_status_t status = NXGE_OK; @@ -2823,10 +2819,10 @@ nxge_txdma_hw_start_exit: * Start a TDC. * * Arguments: - * nxgep - * channel The channel to start. - * tx_ring_p channel's transmit descriptor ring. - * tx_mbox_p channel' smailbox. + * nxgep + * channel The channel to start. + * tx_ring_p channel's transmit descriptor ring. + * tx_mbox_p channel' smailbox. * * Notes: * @@ -2844,12 +2840,11 @@ nxge_txdma_hw_start_exit: static nxge_status_t nxge_txdma_start_channel(p_nxge_t nxgep, uint16_t channel, p_tx_ring_t tx_ring_p, p_tx_mbox_t tx_mbox_p) - { nxge_status_t status = NXGE_OK; NXGE_DEBUG_MSG((nxgep, MEM3_CTL, - "==> nxge_txdma_start_channel (channel %d)", channel)); + "==> nxge_txdma_start_channel (channel %d)", channel)); /* * TXDMA/TXC must be in stopped state. */ @@ -2861,11 +2856,11 @@ nxge_txdma_start_channel(p_nxge_t nxgep, uint16_t channel, tx_ring_p->tx_cs.value = 0; tx_ring_p->tx_cs.bits.ldw.rst = 1; status = nxge_reset_txdma_channel(nxgep, channel, - tx_ring_p->tx_cs.value); + tx_ring_p->tx_cs.value); if (status != NXGE_OK) { NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, - "==> nxge_txdma_start_channel (channel %d)" - " reset channel failed 0x%x", channel, status)); + "==> nxge_txdma_start_channel (channel %d)" + " reset channel failed 0x%x", channel, status)); goto nxge_txdma_start_channel_exit; } @@ -2898,7 +2893,7 @@ nxge_txdma_start_channel(p_nxge_t nxgep, uint16_t channel, * enable each DMA channel. */ status = nxge_enable_txdma_channel(nxgep, channel, - tx_ring_p, tx_mbox_p); + tx_ring_p, tx_mbox_p); if (status != NXGE_OK) { goto nxge_txdma_start_channel_exit; } @@ -2915,10 +2910,10 @@ nxge_txdma_start_channel_exit: * Stop a TDC. * * Arguments: - * nxgep - * channel The channel to stop. - * tx_ring_p channel's transmit descriptor ring. - * tx_mbox_p channel' smailbox. + * nxgep + * channel The channel to stop. + * tx_ring_p channel's transmit descriptor ring. + * tx_mbox_p channel' smailbox. * * Notes: * @@ -3016,8 +3011,8 @@ nxge_txdma_stop_channel_exit: * Get the ring for a TDC. * * Arguments: - * nxgep - * channel + * nxgep + * channel * * Notes: * @@ -3069,8 +3064,8 @@ return_null: * Get the mailbox for a TDC. * * Arguments: - * nxgep - * channel + * nxgep + * channel * * Notes: * @@ -3132,10 +3127,10 @@ return_null: * Recover a TDC. * * Arguments: - * nxgep - * index The index to the TDC ring. - * ldvp Used to get the channel number ONLY. - * cs A copy of the bits from TX_CS. + * nxgep + * index The index to the TDC ring. + * ldvp Used to get the channel number ONLY. + * cs A copy of the bits from TX_CS. * * Notes: * Calling tree: @@ -3161,8 +3156,8 @@ nxge_tx_err_evnts(p_nxge_t nxgep, uint_t index, p_nxge_ldv_t ldvp, tx_cs_t cs) npi_handle_t handle; npi_status_t rs; uint8_t channel; - p_tx_ring_t *tx_rings; - p_tx_ring_t tx_ring_p; + p_tx_ring_t *tx_rings; + p_tx_ring_t tx_ring_p; p_nxge_tx_ring_stats_t tdc_stats; boolean_t txchan_fatal = B_FALSE; nxge_status_t status = NXGE_OK; @@ -3404,7 +3399,7 @@ fail: * Attempt to recover from a fatal port error. * * Arguments: - * nxgep + * nxgep * * Notes: * How would a guest do this? @@ -3601,9 +3596,9 @@ fail: * Inject an error into a TDC. * * Arguments: - * nxgep - * err_id The error to inject. - * chan The channel to inject into. + * nxgep + * err_id The error to inject. + * chan The channel to inject into. * * Notes: * This is called from nxge_main.c:nxge_err_inject() @@ -3673,13 +3668,8 @@ nxge_txdma_inject_err(p_nxge_t nxgep, uint32_t err_id, uint8_t chan) tdi.bits.ldw.conf_part_err = 1; else if (err_id == NXGE_FM_EREPORT_TDMC_PKT_PRT_ERR) tdi.bits.ldw.pkt_part_err = 1; -#if defined(__i386) - cmn_err(CE_NOTE, "!Write 0x%llx to TDMC_INTR_DBG_REG\n", - tdi.value); -#else cmn_err(CE_NOTE, "!Write 0x%lx to TDMC_INTR_DBG_REG\n", tdi.value); -#endif TXDMA_REG_WRITE64(nxgep->npi_handle, TDMC_INTR_DBG_REG, chan, tdi.value); diff --git a/usr/src/uts/common/io/nxge/nxge_zcp.c b/usr/src/uts/common/io/nxge/nxge_zcp.c index 179ff57b38..6a0283e16d 100644 --- a/usr/src/uts/common/io/nxge/nxge_zcp.c +++ b/usr/src/uts/common/io/nxge/nxge_zcp.c @@ -371,13 +371,8 @@ nxge_zcp_inject_err(p_nxge_t nxgep, uint32_t err_id) zcps.bits.ldw.slv_tt_index_err = 1; if (err_id == NXGE_FM_EREPORT_ZCP_TT_INDEX_ERR) zcps.bits.ldw.zcp_tt_index_err = 1; -#if defined(__i386) - cmn_err(CE_NOTE, "!Write 0x%llx to ZCP_INT_STAT_TEST_REG\n", - zcps.value); -#else cmn_err(CE_NOTE, "!Write 0x%lx to ZCP_INT_STAT_TEST_REG\n", zcps.value); -#endif NXGE_REG_WR64(nxgep->npi_handle, ZCP_INT_STAT_TEST_REG, zcps.value); break; diff --git a/usr/src/uts/common/io/openprom.c b/usr/src/uts/common/io/openprom.c index c21febbc14..1f519f2890 100644 --- a/usr/src/uts/common/io/openprom.c +++ b/usr/src/uts/common/io/openprom.c @@ -388,7 +388,7 @@ opromioctl_cb(void *avp, int has_changed) * and weed out unsupported commands on x86 platform */ switch (cmd) { -#if !defined(__i386) && !defined(__amd64) +#if !defined(__x86) case OPROMLISTKEYSLEN: valsize = prom_asr_list_keys_len(); opp = (struct openpromio *)kmem_zalloc( @@ -458,12 +458,12 @@ opromioctl_cb(void *avp, int has_changed) case OPROMSETOPT: case OPROMSETOPT2: -#if !defined(__i386) && !defined(__amd64) +#if !defined(__x86) if (mode & FWRITE) { node_id = options_nodeid; break; } -#endif /* !__i386 && !__amd64 */ +#endif /* !__x86 */ return (EPERM); case OPROMNEXT: @@ -488,10 +488,10 @@ opromioctl_cb(void *avp, int has_changed) case OPROMGETVERSION: case OPROMPATH2DRV: case OPROMPROM2DEVNAME: -#if !defined(__i386) && !defined(__amd64) +#if !defined(__x86) case OPROMGETFBNAME: case OPROMDEV2PROMNAME: -#endif /* !__i386 && !__amd64 */ +#endif /* !__x86 */ if ((mode & FREAD) == 0) { return (EPERM); } @@ -744,7 +744,7 @@ opromioctl_cb(void *avp, int has_changed) } (void) strcpy(opp->oprom_array, bpath); -#elif defined(__i386) || defined(__amd64) +#elif defined(__x86) extern char saved_cmdline[]; valsize = strlen(saved_cmdline) + 1; @@ -864,7 +864,7 @@ opromioctl_cb(void *avp, int has_changed) error = EFAULT; break; -#if !defined(__i386) && !defined(__amd64) +#if !defined(__x86) case OPROMGETFBNAME: /* * Return stdoutpath, if it's a frame buffer. @@ -977,7 +977,7 @@ opromioctl_cb(void *avp, int has_changed) break; } -#endif /* !__i386 && !__amd64 */ +#endif /* !__x86 */ } /* switch (cmd) */ kmem_free(opp, userbufsize + sizeof (uint_t) + 1); diff --git a/usr/src/uts/common/io/pci_intr_lib.c b/usr/src/uts/common/io/pci_intr_lib.c index b5a4ffd3ef..b065ea1b65 100644 --- a/usr/src/uts/common/io/pci_intr_lib.c +++ b/usr/src/uts/common/io/pci_intr_lib.c @@ -61,7 +61,7 @@ pci_class_val_t pci_default_pil [] = { * XXX - This is a temporary workaround and it will be removed * after x86 interrupt scalability support. */ -#if defined(__i386) || defined(__amd64) +#if defined(__x86) {0x0c0400, 0xffff00, 0x5}, /* Serial Bus, Fibre Channel */ #else {0x0c0400, 0xffff00, 0x6}, /* Serial Bus, Fibre Channel */ diff --git a/usr/src/uts/common/io/pcic.c b/usr/src/uts/common/io/pcic.c index b2bcc0e91b..ef9ad9059d 100644 --- a/usr/src/uts/common/io/pcic.c +++ b/usr/src/uts/common/io/pcic.c @@ -79,7 +79,7 @@ #include <sys/pcic_reg.h> #include <sys/pcic_var.h> -#if defined(__i386) || defined(__amd64) +#if defined(__x86) #include <sys/pci_cfgspace.h> #endif @@ -829,7 +829,7 @@ pcic_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) */ if (pcic->pc_flags & PCF_PCIBUS) { int class_code; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) pcic->pc_base = 0x1000000; pcic->pc_bound = (uint32_t)~0; pcic->pc_iobase = 0x1000; @@ -1767,7 +1767,7 @@ pcic_setup_adapter(pcicdev_t *pcic) int i; int value, flags; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) pci_regspec_t *reg; uchar_t bus, dev, func; uint_t classcode; @@ -1973,7 +1973,7 @@ pcic_setup_adapter(pcicdev_t *pcic) ddi_put8(pcic->cfg_handle, pcic->cfgaddr + PCIC_DIAG_REG, cfg); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /* * Some TI chips have 2 cardbus slots(function0 and * function1), and others may have just 1 cardbus slot. diff --git a/usr/src/uts/common/io/pciex/hotplug/pcie_hp.c b/usr/src/uts/common/io/pciex/hotplug/pcie_hp.c index 8adfb4f6f9..11d1acd54e 100644 --- a/usr/src/uts/common/io/pciex/hotplug/pcie_hp.c +++ b/usr/src/uts/common/io/pciex/hotplug/pcie_hp.c @@ -1022,7 +1022,7 @@ port_state_done: ret = DDI_ENOTSUP; } -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /* * like in attach, since hotplugging can change error registers, * we need to ensure that the proper bits are set on this port diff --git a/usr/src/uts/common/io/pciex/hotplug/pciehpc.c b/usr/src/uts/common/io/pciex/hotplug/pciehpc.c index 3e4beda495..eaf09ee4e6 100644 --- a/usr/src/uts/common/io/pciex/hotplug/pciehpc.c +++ b/usr/src/uts/common/io/pciex/hotplug/pciehpc.c @@ -165,7 +165,7 @@ pciehpc_init(dev_info_t *dip, caddr_t arg) ctrl_p->hc_ops.enable_hpc_intr = pciehpc_enable_intr; ctrl_p->hc_ops.disable_hpc_intr = pciehpc_disable_intr; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) pciehpc_update_ops(ctrl_p); #endif diff --git a/usr/src/uts/common/io/pciex/pcie.c b/usr/src/uts/common/io/pciex/pcie.c index df6b2d189b..81b31790e6 100644 --- a/usr/src/uts/common/io/pciex/pcie.c +++ b/usr/src/uts/common/io/pciex/pcie.c @@ -54,9 +54,9 @@ static void pcie_init_pfd(dev_info_t *); static void pcie_fini_pfd(dev_info_t *); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) static void pcie_check_io_mem_range(ddi_acc_handle_t, boolean_t *, boolean_t *); -#endif /* defined(__i386) || defined(__amd64) */ +#endif /* defined(__x86) */ #ifdef DEBUG uint_t pcie_debug_flags = 0; @@ -676,7 +676,7 @@ pcie_initchild(dev_info_t *cdip) reg16 = PCIE_GET(16, bus_p, PCI_CONF_COMM); tmp16 = (reg16 & pcie_command_default_fw) | pcie_command_default; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) boolean_t empty_io_range = B_FALSE; boolean_t empty_mem_range = B_FALSE; /* @@ -697,7 +697,7 @@ pcie_initchild(dev_info_t *cdip) PCIE_DBG("No Mem range found for %s, bdf 0x%x\n", ddi_driver_name(cdip), bus_p->bus_bdf); } -#endif /* defined(__i386) || defined(__amd64) */ +#endif /* defined(__x86) */ if (pcie_serr_disable_flag && PCIE_IS_PCIE(bus_p)) tmp16 &= ~PCI_COMM_SERR_ENABLE; @@ -2889,7 +2889,7 @@ pcie_dbg(char *fmt, ...) } #endif /* DEBUG */ -#if defined(__i386) || defined(__amd64) +#if defined(__x86) static void pcie_check_io_mem_range(ddi_acc_handle_t cfg_hdl, boolean_t *empty_io_range, boolean_t *empty_mem_range) @@ -2916,7 +2916,7 @@ pcie_check_io_mem_range(ddi_acc_handle_t cfg_hdl, boolean_t *empty_io_range, } } -#endif /* defined(__i386) || defined(__amd64) */ +#endif /* defined(__x86) */ boolean_t pcie_link_bw_supported(dev_info_t *dip) diff --git a/usr/src/uts/common/io/pciex/pcie_pwr.c b/usr/src/uts/common/io/pciex/pcie_pwr.c index 9aeee8d238..2ffca0de25 100644 --- a/usr/src/uts/common/io/pciex/pcie_pwr.c +++ b/usr/src/uts/common/io/pciex/pcie_pwr.c @@ -112,10 +112,10 @@ pcie_power(dev_info_t *dip, int component, int level) int pmcaps = pwr_p->pwr_pmcaps; int ret = DDI_FAILURE; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) if (dip) return (DDI_SUCCESS); -#endif /* defined(__i386) || defined(__amd64) */ +#endif /* defined(__x86) */ ASSERT(level != PM_LEVEL_UNKNOWN); /* PM should not asking for a level, which is unsupported */ @@ -277,10 +277,10 @@ pcie_bus_power(dev_info_t *dip, void *impl_arg, pm_bus_power_op_t op, int rv = DDI_SUCCESS; int level_allowed, comp; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) if (dip) return (DDI_SUCCESS); -#endif /* defined(__i386) || defined(__amd64) */ +#endif /* defined(__x86) */ switch (op) { case BUS_POWER_PRE_NOTIFICATION: @@ -853,10 +853,10 @@ pcie_pwr_resume(dev_info_t *dip) dev_info_t *cdip; pcie_pwr_t *pwr_p = NULL; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) if (dip) return (DDI_SUCCESS); -#endif /* defined(__i386) || defined(__amd64) */ +#endif /* defined(__x86) */ if (PCIE_PMINFO(dip)) pwr_p = PCIE_NEXUS_PMINFO(dip); @@ -940,10 +940,10 @@ pcie_pwr_suspend(dev_info_t *dip) int *child_counters = NULL; /* per child dip counters */ pcie_pwr_t *pwr_p = NULL; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) if (dip) return (DDI_SUCCESS); -#endif /* defined(__i386) || defined(__amd64) */ +#endif /* defined(__x86) */ if (PCIE_PMINFO(dip)) pwr_p = PCIE_NEXUS_PMINFO(dip); diff --git a/usr/src/uts/common/io/rge/rge_kstats.c b/usr/src/uts/common/io/rge/rge_kstats.c index 522606e43c..315f9621f2 100755 --- a/usr/src/uts/common/io/rge/rge_kstats.c +++ b/usr/src/uts/common/io/rge/rge_kstats.c @@ -23,8 +23,6 @@ * Use is subject to license terms. */ -#pragma ident "%Z%%M% %I% %E% SMI" - #include "rge.h" #define RGE_DBG RGE_DBG_STATS /* debug flag for this code */ @@ -55,7 +53,7 @@ static const rge_ksindex_t rge_driverinfo[] = { { 14, "chip_reset" }, { 15, "phy_reset" }, { 16, "loop_mode" }, - { -1, NULL } + { -1, NULL } }; static int @@ -93,7 +91,7 @@ rge_driverinfo_update(kstat_t *ksp, int flag) static kstat_t * rge_setup_named_kstat(rge_t *rgep, int instance, char *name, - const rge_ksindex_t *ksip, size_t size, int (*update)(kstat_t *, int)) + const rge_ksindex_t *ksip, size_t size, int (*update)(kstat_t *, int)) { kstat_t *ksp; kstat_named_t *knp; @@ -102,7 +100,7 @@ rge_setup_named_kstat(rge_t *rgep, int instance, char *name, size /= sizeof (rge_ksindex_t); ksp = kstat_create(RGE_DRIVER_NAME, instance, name, "net", - KSTAT_TYPE_NAMED, size-1, KSTAT_FLAG_PERSISTENT); + KSTAT_TYPE_NAMED, size-1, KSTAT_FLAG_PERSISTENT); if (ksp == NULL) return (NULL); @@ -137,8 +135,8 @@ void rge_init_kstats(rge_t *rgep, int instance) { rgep->rge_kstats[RGE_KSTAT_DRIVER] = rge_setup_named_kstat(rgep, - instance, "driverinfo", rge_driverinfo, - sizeof (rge_driverinfo), rge_driverinfo_update); + instance, "driverinfo", rge_driverinfo, + sizeof (rge_driverinfo), rge_driverinfo_update); } void diff --git a/usr/src/uts/common/io/rge/rge_log.c b/usr/src/uts/common/io/rge/rge_log.c index eb923d628d..b944f15723 100755 --- a/usr/src/uts/common/io/rge/rge_log.c +++ b/usr/src/uts/common/io/rge/rge_log.c @@ -24,11 +24,8 @@ * Use is subject to license terms. */ -#pragma ident "%Z%%M% %I% %E% SMI" - #include "rge.h" - /* * Global variable for default debug flags */ @@ -197,7 +194,7 @@ minidump(rge_t *rgep, const char *caption, void *dp, uint_t len) bzero(buf, sizeof (buf)); bcopy(dp, buf, nbytes); rge_log(rgep, "%08x %08x %08x %08x", - buf[0], buf[1], buf[2], buf[3]); + buf[0], buf[1], buf[2], buf[3]); dp = (caddr_t)dp + nbytes; } } @@ -210,21 +207,21 @@ rge_pkt_dump(rge_t *rgep, rge_bd_t *hrbdp, sw_rbd_t *srbdp, const char *msg) minidump(rgep, "hardware descriptor", hrbdp, sizeof (*hrbdp)); rge_log(rgep, "PCI address %lx flags_len 0x%x" - "vlan_tag 0x%x", - hrbdp->host_buf_addr, - hrbdp->flags_len, - hrbdp->vlan_tag); + "vlan_tag 0x%x", + hrbdp->host_buf_addr, + hrbdp->flags_len, + hrbdp->vlan_tag); if (srbdp != NULL) { minidump(rgep, "software descriptor", srbdp, sizeof (*srbdp)); rge_log(rgep, "PCI address %llx buffer len 0x%x token 0x%x", - srbdp->rx_buf->pbuf.cookie.dmac_laddress, - srbdp->rx_buf->pbuf.alength, - srbdp->rx_buf->pbuf.token); + srbdp->rx_buf->pbuf.cookie.dmac_laddress, + srbdp->rx_buf->pbuf.alength, + srbdp->rx_buf->pbuf.token); minidump(rgep, "packet data", srbdp->rx_buf->pbuf.mem_va, - hrbdp->flags_len & RBD_LEN_MASK); + hrbdp->flags_len & RBD_LEN_MASK); } } diff --git a/usr/src/uts/common/io/sata/impl/sata.c b/usr/src/uts/common/io/sata/impl/sata.c index e9279025e1..ac9b6df881 100644 --- a/usr/src/uts/common/io/sata/impl/sata.c +++ b/usr/src/uts/common/io/sata/impl/sata.c @@ -12920,13 +12920,8 @@ sata_show_drive_info(sata_hba_inst_t *sata_hba_inst, } if (sdinfo->satadrv_type == SATA_DTYPE_ATADISK) { -#ifdef __i386 - (void) sprintf(msg_buf, "\tcapacity = %llu sectors\n", - sdinfo->satadrv_capacity); -#else (void) sprintf(msg_buf, "\tcapacity = %lu sectors\n", sdinfo->satadrv_capacity); -#endif cmn_err(CE_CONT, "?%s", msg_buf); } } diff --git a/usr/src/uts/common/io/scsi/impl/scsi_resource.c b/usr/src/uts/common/io/scsi/impl/scsi_resource.c index 5477435026..09bdb70dc7 100644 --- a/usr/src/uts/common/io/scsi/impl/scsi_resource.c +++ b/usr/src/uts/common/io/scsi/impl/scsi_resource.c @@ -153,10 +153,10 @@ scsi_pkt2bp(struct scsi_pkt *pkt) int scsi_dma_buf_bind_attr(struct scsi_pkt_cache_wrapper *pktw, - struct buf *bp, - int dma_flags, - int (*callback)(), - caddr_t arg) + struct buf *bp, + int dma_flags, + int (*callback)(), + caddr_t arg) { struct scsi_pkt *pktp = &(pktw->pcw_pkt); int status; @@ -573,7 +573,7 @@ scsi_init_pkt(struct scsi_address *ap, struct scsi_pkt *in_pktp, "scsi_init_pkt_start: addr %p in_pktp %p cmdlen %d statuslen %d pplen %d", ap, in_pktp, cmdlen, statuslen, pplen); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) if (flags & PKT_CONSISTENT_OLD) { flags &= ~PKT_CONSISTENT_OLD; flags |= PKT_CONSISTENT; diff --git a/usr/src/uts/common/io/scsi/targets/sd.c b/usr/src/uts/common/io/scsi/targets/sd.c index 605ddae078..20ec0d6ece 100644 --- a/usr/src/uts/common/io/scsi/targets/sd.c +++ b/usr/src/uts/common/io/scsi/targets/sd.c @@ -395,7 +395,7 @@ static int sd_pl2pc[] = { * Vendor specific data name property declarations */ -#if defined(__fibre) || defined(__i386) ||defined(__amd64) +#if defined(__fibre) || defined(__x86) static sd_tunables seagate_properties = { SEAGATE_THROTTLE_VALUE, @@ -473,7 +473,7 @@ static sd_tunables pirus_properties = { #endif #if (defined(__sparc) && !defined(__fibre)) || \ - (defined(__i386) || defined(__amd64)) + (defined(__x86)) static sd_tunables elite_properties = { @@ -606,7 +606,7 @@ static sd_tunables tst_properties = { * made with an FC connection. The entries here are a legacy. */ static sd_disk_config_t sd_disk_table[] = { -#if defined(__fibre) || defined(__i386) || defined(__amd64) +#if defined(__fibre) || defined(__x86) { "SEAGATE ST34371FC", SD_CONF_BSET_THROTTLE, &seagate_properties }, { "SEAGATE ST19171FC", SD_CONF_BSET_THROTTLE, &seagate_properties }, { "SEAGATE ST39102FC", SD_CONF_BSET_THROTTLE, &seagate_properties }, @@ -729,7 +729,7 @@ static sd_disk_config_t sd_disk_table[] = { { "SYMBIOS", SD_CONF_BSET_NRR_COUNT, &symbios_properties }, #endif /* fibre or NON-sparc platforms */ #if ((defined(__sparc) && !defined(__fibre)) ||\ - (defined(__i386) || defined(__amd64))) + (defined(__x86))) { "SEAGATE ST42400N", SD_CONF_BSET_THROTTLE, &elite_properties }, { "SEAGATE ST31200N", SD_CONF_BSET_THROTTLE, &st31200n_properties }, { "SEAGATE ST41600N", SD_CONF_BSET_TUR_CHECK, NULL }, @@ -746,7 +746,7 @@ static sd_disk_config_t sd_disk_table[] = { &symbios_properties }, { "LSI", SD_CONF_BSET_THROTTLE | SD_CONF_BSET_NRR_COUNT, &lsi_properties_scsi }, -#if defined(__i386) || defined(__amd64) +#if defined(__x86) { " NEC CD-ROM DRIVE:260 ", (SD_CONF_BSET_PLAYMSF_BCD | SD_CONF_BSET_READSUB_BCD | SD_CONF_BSET_READ_TOC_ADDR_BCD @@ -758,7 +758,7 @@ static sd_disk_config_t sd_disk_table[] = { | SD_CONF_BSET_READ_TOC_ADDR_BCD | SD_CONF_BSET_NO_READ_HEADER | SD_CONF_BSET_READ_CD_XD4), NULL }, -#endif /* __i386 || __amd64 */ +#endif /* __x86 */ #endif /* sparc NON-fibre or NON-sparc platforms */ #if (defined(SD_PROP_TST)) @@ -7550,7 +7550,7 @@ sd_unit_attach(dev_info_t *devi) * The value used is base on interconnect type. * fibre = 3, parallel = 5 */ -#if defined(__i386) || defined(__amd64) +#if defined(__x86) un->un_retry_count = un->un_f_is_fibre ? 3 : 5; #else un->un_retry_count = SD_RETRY_COUNT; @@ -7597,7 +7597,7 @@ sd_unit_attach(dev_info_t *devi) * get updated later in the attach, when setting up default wide * operations for disks. */ -#if defined(__i386) || defined(__amd64) +#if defined(__x86) un->un_max_xfer_size = (uint_t)SD_DEFAULT_MAX_XFER_SIZE; un->un_partial_dma_supported = 1; #else @@ -8105,7 +8105,7 @@ sd_unit_attach(dev_info_t *devi) "is too large for a 32-bit " "kernel", capacity); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /* * 1TB disk was treated as (1T - 512)B * in the past, so that it might have @@ -8307,7 +8307,7 @@ sd_unit_attach(dev_info_t *devi) cmlb_alloc_handle(&un->un_cmlbhandle); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /* * On x86, compensate for off-by-1 legacy error */ @@ -10375,7 +10375,7 @@ sdopen(dev_t *dev_p, int flag, int otyp, cred_t *cred_p) "device not ready or invalid disk block value\n"); goto open_fail; } -#if defined(__i386) || defined(__amd64) +#if defined(__x86) } else { uchar_t *cp; /* @@ -10591,7 +10591,7 @@ sdclose(dev_t dev, int flag, int otyp, cred_t *cred_p) * only issues a Sync Cache to DVD-RAM, a newly * supported device. */ -#if defined(__i386) || defined(__amd64) +#if defined(__x86) if ((un->un_f_sync_cache_supported && un->un_f_sync_cache_required) || un->un_f_dvdram_writable_device == TRUE) { @@ -12990,7 +12990,7 @@ sd_mapblocksize_iostart(int index, struct sd_lun *un, struct buf *bp) goto done; } -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /* We do not support non-block-aligned transfers for ROD devices */ ASSERT(!ISROD(un)); #endif @@ -13787,7 +13787,7 @@ sd_initpkt_for_buf(struct buf *bp, struct scsi_pkt **pktpp) mutex_exit(SD_MUTEX(un)); -#if defined(__i386) || defined(__amd64) /* DMAFREE for x86 only */ +#if defined(__x86) /* DMAFREE for x86 only */ if (xp->xb_pkt_flags & SD_XB_DMA_FREED) { /* * Already have a scsi_pkt -- just need DMA resources. @@ -13803,7 +13803,7 @@ sd_initpkt_for_buf(struct buf *bp, struct scsi_pkt **pktpp) } else { pktp = NULL; } -#endif /* __i386 || __amd64 */ +#endif /* __x86 */ startblock = xp->xb_blkno; /* Absolute block num. */ blockcount = SD_BYTES2TGTBLOCKS(un, bp->b_bcount); @@ -13851,7 +13851,7 @@ sd_initpkt_for_buf(struct buf *bp, struct scsi_pkt **pktpp) SD_TRACE(SD_LOG_IO_CORE, un, "sd_initpkt_for_buf: exit: buf:0x%p\n", bp); -#if defined(__i386) || defined(__amd64) /* DMAFREE for x86 only */ +#if defined(__x86) /* DMAFREE for x86 only */ xp->xb_pkt_flags &= ~SD_XB_DMA_FREED; #endif @@ -14523,7 +14523,7 @@ sd_shadow_buf_alloc(struct buf *bp, size_t datalen, uint_t bflags, } bflags &= (B_READ | B_WRITE); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) new_bp = getrbuf(KM_SLEEP); new_bp->b_un.b_addr = kmem_zalloc(datalen, KM_SLEEP); new_bp->b_bcount = datalen; @@ -14637,7 +14637,7 @@ sd_shadow_buf_free(struct buf *bp) */ bp->b_iodone = NULL; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) kmem_free(bp->b_un.b_addr, bp->b_bcount); freerbuf(bp); #else @@ -14868,7 +14868,7 @@ sd_start_cmds(struct sd_lun *un, struct buf *immed_bp) struct sd_xbuf *xp; struct buf *bp; void (*statp)(kstat_io_t *); -#if defined(__i386) || defined(__amd64) /* DMAFREE for x86 only */ +#if defined(__x86) /* DMAFREE for x86 only */ void (*saved_statp)(kstat_io_t *); #endif int rval; @@ -14882,7 +14882,7 @@ sd_start_cmds(struct sd_lun *un, struct buf *immed_bp) SD_TRACE(SD_LOG_IO_CORE | SD_LOG_ERROR, un, "sd_start_cmds: entry\n"); do { -#if defined(__i386) || defined(__amd64) /* DMAFREE for x86 only */ +#if defined(__x86) /* DMAFREE for x86 only */ saved_statp = NULL; #endif @@ -14941,7 +14941,7 @@ sd_start_cmds(struct sd_lun *un, struct buf *immed_bp) kstat_runq_back_to_waitq)) { statp = kstat_waitq_to_runq; } -#if defined(__i386) || defined(__amd64) /* DMAFREE for x86 only */ +#if defined(__x86) /* DMAFREE for x86 only */ saved_statp = un->un_retry_statp; #endif un->un_retry_statp = NULL; @@ -15029,7 +15029,7 @@ sd_start_cmds(struct sd_lun *un, struct buf *immed_bp) xp = SD_GET_XBUF(bp); ASSERT(xp != NULL); -#if defined(__i386) || defined(__amd64) /* DMAFREE for x86 only */ +#if defined(__x86) /* DMAFREE for x86 only */ /* * Allocate the scsi_pkt if we need one, or attach DMA * resources if we have a scsi_pkt that needs them. The @@ -15108,7 +15108,7 @@ sd_start_cmds(struct sd_lun *un, struct buf *immed_bp) SD_TRACE(SD_LOG_IO_CORE | SD_LOG_ERROR, un, "sd_start_cmds: SD_PKT_ALLOC_FAILURE\n"); -#if defined(__i386) || defined(__amd64) /* DMAFREE for x86 only */ +#if defined(__x86) /* DMAFREE for x86 only */ if (bp == immed_bp) { /* @@ -15303,7 +15303,7 @@ got_pkt: goto exit; } -#if defined(__i386) || defined(__amd64) /* DMAFREE for x86 only */ +#if defined(__x86) /* DMAFREE for x86 only */ /* * Free the DMA resources for the scsi_pkt. This will * allow mpxio to select another path the next time @@ -16597,7 +16597,7 @@ sd_alloc_rqs(struct scsi_device *devp, struct sd_lun *un) if (un->un_f_is_fibre == TRUE) { un->un_f_arq_enabled = TRUE; } else { -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /* * Circumvent the Adaptec bug, remove this code when * the bug is fixed @@ -17051,7 +17051,7 @@ sdintr(struct scsi_pkt *pktp) goto exit; } -#if (defined(__i386) || defined(__amd64)) /* DMAFREE for x86 only */ +#if (defined(__x86)) /* DMAFREE for x86 only */ /* * We want to either retry or fail this command, so free * the DMA resources here. If we retry the command then @@ -17144,7 +17144,7 @@ sdintr(struct scsi_pkt *pktp) not_successful: -#if (defined(__i386) || defined(__amd64)) /* DMAFREE for x86 only */ +#if (defined(__x86)) /* DMAFREE for x86 only */ /* * The following is based upon knowledge of the underlying transport * and its use of DMA resources. This code should be removed when @@ -17834,7 +17834,7 @@ sense_failed: * If the request sense failed (for whatever reason), attempt * to retry the original command. */ -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /* * SD_RETRY_DELAY is conditionally compile (#if fibre) in * sddef.h for Sparc platform, and x86 uses 1 binary @@ -19384,7 +19384,7 @@ sd_pkt_status_check_condition(struct sd_lun *un, struct buf *bp, } else { SD_INFO(SD_LOG_IO_CORE, un, "sd_pkt_status_check_condition: " "ARQ,retrying request sense command\n"); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /* * The SD_RETRY_DELAY value need to be adjusted here * when SD_RETRY_DELAY change in sddef.h @@ -22571,7 +22571,7 @@ sdioctl(dev_t dev, int cmd, intptr_t arg, int flag, cred_t *cred_p, int *rval_p) case DKIOCSMBOOT: case DKIOCG_PHYGEOM: case DKIOCG_VIRTGEOM: -#if defined(__i386) || defined(__amd64) +#if defined(__x86) case DKIOCSETEXTPART: #endif /* let cmlb handle it */ @@ -22726,7 +22726,7 @@ skip_ready_valid: case DKIOCSMBOOT: case DKIOCG_PHYGEOM: case DKIOCG_VIRTGEOM: -#if defined(__i386) || defined(__amd64) +#if defined(__x86) case DKIOCSETEXTPART: #endif SD_TRACE(SD_LOG_IOCTL, un, "DKIOC %d\n", cmd); @@ -23126,7 +23126,7 @@ skip_ready_valid: case CDROMPLAYTRKIND: SD_TRACE(SD_LOG_IOCTL, un, "CDROMPLAYTRKIND\n"); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /* * not supported on ATAPI CD drives, use CDROMPLAYMSF instead */ diff --git a/usr/src/uts/common/kiconv/kiconv_ko/kiconv_ko.c b/usr/src/uts/common/kiconv/kiconv_ko/kiconv_ko.c index 7fae073313..674102f5a8 100755 --- a/usr/src/uts/common/kiconv/kiconv_ko/kiconv_ko.c +++ b/usr/src/uts/common/kiconv/kiconv_ko/kiconv_ko.c @@ -24,8 +24,6 @@ * Use is subject to license terms. */ -#pragma ident "%Z%%M% %I% %E% SMI" - #include <sys/types.h> #include <sys/param.h> #include <sys/sysmacros.h> @@ -83,7 +81,7 @@ close_fr_ko(void *s) */ static size_t kiconv_fr_euckr(void *kcd, char **inbuf, size_t *inbufleft, - char **outbuf, size_t *outbufleft, int *errno) + char **outbuf, size_t *outbufleft, int *errno) { uchar_t *ib; uchar_t *ob; @@ -169,7 +167,7 @@ kiconv_fr_euckr(void *kcd, char **inbuf, size_t *inbufleft, */ static size_t kiconvstr_fr_euckr(char *inarray, size_t *inlen, char *outarray, - size_t *outlen, int flag, int *errno) + size_t *outlen, int flag, int *errno) { uchar_t *ib; uchar_t *ob; @@ -251,7 +249,7 @@ REPLACE_INVALID: */ static size_t kiconv_fr_uhc(void *kcd, char **inbuf, size_t *inbufleft, - char **outbuf, size_t *outbufleft, int *errno) + char **outbuf, size_t *outbufleft, int *errno) { uchar_t *ib; uchar_t *ob; @@ -337,7 +335,7 @@ kiconv_fr_uhc(void *kcd, char **inbuf, size_t *inbufleft, */ static size_t kiconvstr_fr_uhc(char *inarray, size_t *inlen, char *outarray, - size_t *outlen, int flag, int *errno) + size_t *outlen, int flag, int *errno) { uchar_t *ib; uchar_t *ob; @@ -419,7 +417,7 @@ REPLACE_INVALID: */ static size_t kiconv_to_euckr(void *kcd, char **inbuf, size_t *inbytesleft, - char **outbuf, size_t *outbytesleft, int *errno) + char **outbuf, size_t *outbytesleft, int *errno) { return (kiconv_utf8_to_cck(kcd, inbuf, inbytesleft, outbuf, outbytesleft, errno, utf8_to_euckr)); @@ -430,7 +428,7 @@ kiconv_to_euckr(void *kcd, char **inbuf, size_t *inbytesleft, */ static size_t kiconv_to_uhc(void *kcd, char **inbuf, size_t *inbytesleft, - char **outbuf, size_t *outbytesleft, int *errno) + char **outbuf, size_t *outbytesleft, int *errno) { return (kiconv_utf8_to_cck(kcd, inbuf, inbytesleft, outbuf, outbytesleft, errno, utf8_to_uhc)); @@ -441,7 +439,7 @@ kiconv_to_uhc(void *kcd, char **inbuf, size_t *inbytesleft, */ static size_t kiconvstr_to_euckr(char *inarray, size_t *inlen, char *outarray, - size_t *outlen, int flag, int *errno) + size_t *outlen, int flag, int *errno) { return kiconvstr_utf8_to_cck((uchar_t *)inarray, inlen, (uchar_t *)outarray, outlen, flag, errno, utf8_to_euckr); @@ -452,7 +450,7 @@ kiconvstr_to_euckr(char *inarray, size_t *inlen, char *outarray, */ static size_t kiconvstr_to_uhc(char *inarray, size_t *inlen, char *outarray, - size_t *outlen, int flag, int *errno) + size_t *outlen, int flag, int *errno) { return kiconvstr_utf8_to_cck((uchar_t *)inarray, inlen, (uchar_t *)outarray, outlen, flag, errno, utf8_to_uhc); @@ -464,7 +462,7 @@ kiconvstr_to_uhc(char *inarray, size_t *inlen, char *outarray, */ static int8_t utf8_to_ko(uint32_t utf8, uchar_t *ob, uchar_t *obtail, size_t *ret_val, - kiconv_table_t *table, size_t nitems) + kiconv_table_t *table, size_t nitems) { size_t index; size_t kocode; @@ -512,7 +510,7 @@ utf8_to_ko(uint32_t utf8, uchar_t *ob, uchar_t *obtail, size_t *ret_val, /* ARGSUSED */ static int8_t utf8_to_uhc(uint32_t utf8, uchar_t **inbuf, uchar_t *ibtail, - uchar_t *ob, uchar_t *obtail, size_t *ret_val) + uchar_t *ob, uchar_t *obtail, size_t *ret_val) { return (utf8_to_ko(utf8, ob, obtail, ret_val, kiconv_utf8_uhc, KICONV_UTF8_UHC_MAX)); @@ -524,7 +522,7 @@ utf8_to_uhc(uint32_t utf8, uchar_t **inbuf, uchar_t *ibtail, /* ARGSUSED */ static int8_t utf8_to_euckr(uint32_t utf8, uchar_t **inbuf, uchar_t *ibtail, - uchar_t *ob, uchar_t *obtail, size_t *ret_val) + uchar_t *ob, uchar_t *obtail, size_t *ret_val) { return (utf8_to_ko(utf8, ob, obtail, ret_val, kiconv_utf8_euckr, KICONV_UTF8_EUCKR_MAX)); @@ -535,7 +533,7 @@ utf8_to_euckr(uint32_t utf8, uchar_t **inbuf, uchar_t *ibtail, */ static int8_t ko_to_utf8(uint32_t ko_val, uchar_t *ob, uchar_t *obtail, size_t *ret_val, - kiconv_table_array_t *table, size_t nitems) + kiconv_table_array_t *table, size_t nitems) { size_t index; int8_t sz; diff --git a/usr/src/uts/common/kiconv/kiconv_sc/kiconv_cck_common.c b/usr/src/uts/common/kiconv/kiconv_sc/kiconv_cck_common.c index 3de830f2d9..e0a342e26c 100755 --- a/usr/src/uts/common/kiconv/kiconv_sc/kiconv_cck_common.c +++ b/usr/src/uts/common/kiconv/kiconv_sc/kiconv_cck_common.c @@ -23,8 +23,6 @@ * Use is subject to license terms. */ -#pragma ident "%Z%%M% %I% %E% SMI" - #include <sys/types.h> #include <sys/param.h> #include <sys/sysmacros.h> @@ -38,8 +36,6 @@ #include <sys/kiconv.h> #include <sys/kiconv_cck_common.h> -/*LINTLIBRARY*/ - /* * Common kiconv_open method for UTF-8 -> CCK conversion. */ @@ -74,8 +70,8 @@ kiconv_close_to_cck(void *kcd) */ size_t kiconv_utf8_to_cck(void *kcd, char **inbuf, size_t *inbytesleft, - char **outbuf, size_t *outbytesleft, int *errno, - kiconv_utf8tocck_t ptr_utf8tocck) + char **outbuf, size_t *outbytesleft, int *errno, + kiconv_utf8tocck_t ptr_utf8tocck) { uchar_t *ib; uchar_t *ob; @@ -190,7 +186,7 @@ ILLEGAL_CHAR_ERR: size_t kiconvstr_utf8_to_cck(uchar_t *ib, size_t *inlen, uchar_t *ob, size_t *outlen, - int flag, int *errno, kiconv_utf8tocck_t ptr_utf8tocck) + int flag, int *errno, kiconv_utf8tocck_t ptr_utf8tocck) { uchar_t *ibtail; uchar_t *obtail; diff --git a/usr/src/uts/common/kiconv/kiconv_sc/kiconv_sc.c b/usr/src/uts/common/kiconv/kiconv_sc/kiconv_sc.c index ecbdd5cb3e..6fa9825a16 100755 --- a/usr/src/uts/common/kiconv/kiconv_sc/kiconv_sc.c +++ b/usr/src/uts/common/kiconv/kiconv_sc/kiconv_sc.c @@ -23,8 +23,6 @@ * Use is subject to license terms. */ -#pragma ident "%Z%%M% %I% %E% SMI" - #include <sys/types.h> #include <sys/param.h> #include <sys/sysmacros.h> @@ -92,7 +90,7 @@ close_fr_sc(void *s) */ size_t kiconv_to_gb18030(void *kcd, char **inbuf, size_t *inbytesleft, - char **outbuf, size_t *outbytesleft, int *errno) + char **outbuf, size_t *outbytesleft, int *errno) { return kiconv_utf8_to_cck(kcd, inbuf, inbytesleft, outbuf, @@ -104,7 +102,7 @@ kiconv_to_gb18030(void *kcd, char **inbuf, size_t *inbytesleft, */ size_t kiconvstr_to_gb18030(char *inarray, size_t *inlen, char *outarray, - size_t *outlen, int flag, int *errno) + size_t *outlen, int flag, int *errno) { return kiconvstr_utf8_to_cck((uchar_t *)inarray, inlen, (uchar_t *)outarray, outlen, flag, errno, utf8_to_gb18030); @@ -115,7 +113,7 @@ kiconvstr_to_gb18030(char *inarray, size_t *inlen, char *outarray, */ size_t kiconv_fr_gb18030(void *kcd, char **inbuf, size_t *inbytesleft, - char **outbuf, size_t *outbytesleft, int *errno) + char **outbuf, size_t *outbytesleft, int *errno) { uchar_t *ib; uchar_t *ob; @@ -212,7 +210,7 @@ kiconv_fr_gb18030(void *kcd, char **inbuf, size_t *inbytesleft, */ size_t kiconvstr_fr_gb18030(char *inarray, size_t *inlen, char *outarray, - size_t *outlen, int flag, int *errno) + size_t *outlen, int flag, int *errno) { uchar_t *ib; uchar_t *ob; @@ -322,7 +320,7 @@ REPLACE_INVALID: */ size_t kiconv_to_gbk(void *kcd, char **inbuf, size_t *inbytesleft, - char **outbuf, size_t *outbytesleft, int *errno) + char **outbuf, size_t *outbytesleft, int *errno) { return kiconv_utf8_to_cck(kcd, inbuf, inbytesleft, outbuf, @@ -334,7 +332,7 @@ kiconv_to_gbk(void *kcd, char **inbuf, size_t *inbytesleft, */ size_t kiconvstr_to_gbk(char *inarray, size_t *inlen, char *outarray, - size_t *outlen, int flag, int *errno) + size_t *outlen, int flag, int *errno) { return kiconvstr_utf8_to_cck((uchar_t *)inarray, inlen, (uchar_t *)outarray, outlen, flag, errno, utf8_to_gbk); @@ -345,7 +343,7 @@ kiconvstr_to_gbk(char *inarray, size_t *inlen, char *outarray, */ size_t kiconv_fr_gbk(void *kcd, char **inbuf, size_t *inbytesleft, - char **outbuf, size_t *outbytesleft, int *errno) + char **outbuf, size_t *outbytesleft, int *errno) { uchar_t *ib; uchar_t *ob; @@ -431,7 +429,7 @@ kiconv_fr_gbk(void *kcd, char **inbuf, size_t *inbytesleft, */ size_t kiconvstr_fr_gbk(char *inarray, size_t *inlen, char *outarray, - size_t *outlen, int flag, int *errno) + size_t *outlen, int flag, int *errno) { uchar_t *ib; uchar_t *ob; @@ -511,7 +509,7 @@ REPLACE_INVALID: */ size_t kiconv_to_euccn(void *kcd, char **inbuf, size_t *inbytesleft, - char **outbuf, size_t *outbytesleft, int *errno) + char **outbuf, size_t *outbytesleft, int *errno) { return kiconv_utf8_to_cck(kcd, inbuf, inbytesleft, outbuf, outbytesleft, errno, utf8_to_gb2312); @@ -522,7 +520,7 @@ kiconv_to_euccn(void *kcd, char **inbuf, size_t *inbytesleft, */ size_t kiconvstr_to_euccn(char *inarray, size_t *inlen, char *outarray, - size_t *outlen, int flag, int *errno) + size_t *outlen, int flag, int *errno) { return kiconvstr_utf8_to_cck((uchar_t *)inarray, inlen, (uchar_t *)outarray, outlen, flag, errno, utf8_to_gb2312); @@ -533,7 +531,7 @@ kiconvstr_to_euccn(char *inarray, size_t *inlen, char *outarray, */ size_t kiconv_fr_euccn(void *kcd, char **inbuf, size_t *inbytesleft, - char **outbuf, size_t *outbytesleft, int *errno) + char **outbuf, size_t *outbytesleft, int *errno) { uchar_t *ib; uchar_t *ob; @@ -695,7 +693,7 @@ REPLACE_INVALID: */ static int8_t gb2312_to_utf8(uchar_t b1, uchar_t b2, uchar_t *ob, uchar_t *obtail, - size_t *ret_val) + size_t *ret_val) { size_t index; int8_t sz; @@ -738,7 +736,7 @@ gb2312_to_utf8(uchar_t b1, uchar_t b2, uchar_t *ob, uchar_t *obtail, */ static int8_t gbk_to_utf8(uint32_t gbk_val, uchar_t *ob, uchar_t *obtail, size_t *ret_val, - boolean_t isgbk4) + boolean_t isgbk4) { size_t index; int8_t sz; @@ -800,9 +798,9 @@ gbk_to_utf8(uint32_t gbk_val, uchar_t *ob, uchar_t *obtail, size_t *ret_val, /* ARGSUSED */ static int8_t utf8_to_gb18030(uint32_t utf8, uchar_t **inbuf, uchar_t *ibtail, - uchar_t *ob, uchar_t *obtail, size_t *ret) + uchar_t *ob, uchar_t *obtail, size_t *ret) { - size_t index; + size_t index; int8_t gbklen; uint32_t gbkcode; @@ -853,9 +851,9 @@ utf8_to_gb18030(uint32_t utf8, uchar_t **inbuf, uchar_t *ibtail, /* ARGSUSED */ static int8_t utf8_to_gbk(uint32_t utf8, uchar_t **inbuf, uchar_t *ibtail, - uchar_t *ob, uchar_t *obtail, size_t *ret) + uchar_t *ob, uchar_t *obtail, size_t *ret) { - size_t index; + size_t index; int8_t gbklen; uint32_t gbkcode; @@ -894,7 +892,7 @@ utf8_to_gbk(uint32_t utf8, uchar_t **inbuf, uchar_t *ibtail, /* ARGSUSED */ static int8_t utf8_to_gb2312(uint32_t utf8, uchar_t **inbuf, uchar_t *intail, - uchar_t *ob, uchar_t *obtail, size_t *ret) + uchar_t *ob, uchar_t *obtail, size_t *ret) { size_t index; int8_t gblen; diff --git a/usr/src/uts/common/kiconv/kiconv_tc/kiconv_tc.c b/usr/src/uts/common/kiconv/kiconv_tc/kiconv_tc.c index 1c5e6e0db0..710f3d4560 100755 --- a/usr/src/uts/common/kiconv/kiconv_tc/kiconv_tc.c +++ b/usr/src/uts/common/kiconv/kiconv_tc/kiconv_tc.c @@ -23,8 +23,6 @@ * Use is subject to license terms. */ -#pragma ident "%Z%%M% %I% %E% SMI" - #include <sys/types.h> #include <sys/param.h> #include <sys/sysmacros.h> @@ -53,7 +51,7 @@ static uchar_t hkscs_special_sequence[][4] = { { 0xc3, 0x8a, 0xcc, 0x84 }, /* 0x8862 */ { 0xc3, 0x8a, 0xcc, 0x8c }, /* 0x8864 */ { 0xc3, 0xaa, 0xcc, 0x84 }, /* 0x88a3 */ - { 0xc3, 0xaa, 0xcc, 0x8c } /* 0x88a5 */ + { 0xc3, 0xaa, 0xcc, 0x8c } /* 0x88a5 */ }; /* 4 Unicode code point pair map to 1 HKSCS-2004 code point. */ @@ -132,8 +130,8 @@ close_fr_tc(void *s) */ static size_t kiconv_fr_big5_common(void *kcd, char **inbuf, size_t *inbytesleft, - char **outbuf, size_t *outbytesleft, int *errno, - kiconv_big5toutf8_t ptr_big5touf8) + char **outbuf, size_t *outbytesleft, int *errno, + kiconv_big5toutf8_t ptr_big5touf8) { uchar_t *ib; uchar_t *ob; @@ -298,7 +296,7 @@ REPLACE_INVALID: */ static size_t kiconv_fr_big5(void *kcd, char **inbuf, size_t *inbytesleft, char **outbuf, - size_t *outbytesleft, int *errno) + size_t *outbytesleft, int *errno) { return (kiconv_fr_big5_common(kcd, inbuf, inbytesleft, outbuf, outbytesleft, errno, big5_to_utf8)); @@ -332,7 +330,7 @@ kiconv_fr_big5hkscs(void *kcd, char **inbuf, size_t *inbytesleft, */ static size_t kiconvstr_fr_big5hkscs(char *inarray, size_t *inlen, char *outarray, - size_t *outlen, int flag, int *errno) + size_t *outlen, int flag, int *errno) { return kiconvstr_fr_big5_common((uchar_t *)inarray, inlen, (uchar_t *)outarray, outlen, flag, errno, big5hkscs_to_utf8); @@ -354,7 +352,7 @@ kiconv_fr_cp950hkscs(void *kcd, char **inbuf, size_t *inbytesleft, */ static size_t kiconvstr_fr_cp950hkscs(char *inarray, size_t *inlen, char *outarray, - size_t *outlen, int flag, int *errno) + size_t *outlen, int flag, int *errno) { return kiconvstr_fr_big5_common((uchar_t *)inarray, inlen, (uchar_t *)outarray, outlen, flag, errno, cp950hkscs_to_utf8); @@ -365,7 +363,7 @@ kiconvstr_fr_cp950hkscs(char *inarray, size_t *inlen, char *outarray, */ static size_t kiconv_fr_euctw(void *kcd, char **inbuf, size_t *inbytesleft, - char **outbuf, size_t *outbytesleft, int *errno) + char **outbuf, size_t *outbytesleft, int *errno) { uchar_t *ib; uchar_t *ob; @@ -464,7 +462,7 @@ kiconv_fr_euctw(void *kcd, char **inbuf, size_t *inbytesleft, */ static size_t kiconvstr_fr_euctw(char *inarray, size_t *inlen, char *outarray, - size_t *outlen, int flag, int *errno) + size_t *outlen, int flag, int *errno) { uchar_t *ib; uchar_t *ob; @@ -560,7 +558,7 @@ REPLACE_INVALID: */ static size_t kiconv_to_big5(void *kcd, char **inbuf, size_t *inbytesleft, - char **outbuf, size_t *outbytesleft, int *errno) + char **outbuf, size_t *outbytesleft, int *errno) { return kiconv_utf8_to_cck(kcd, inbuf, inbytesleft, outbuf, outbytesleft, errno, utf8_to_big5); @@ -571,7 +569,7 @@ kiconv_to_big5(void *kcd, char **inbuf, size_t *inbytesleft, */ static size_t kiconvstr_to_big5(char *inarray, size_t *inlen, char *outarray, - size_t *outlen, int flag, int *errno) + size_t *outlen, int flag, int *errno) { return kiconvstr_utf8_to_cck((uchar_t *)inarray, inlen, (uchar_t *)outarray, outlen, flag, errno, utf8_to_big5); @@ -582,7 +580,7 @@ kiconvstr_to_big5(char *inarray, size_t *inlen, char *outarray, */ static size_t kiconv_to_euctw(void *kcd, char **inbuf, size_t *inbytesleft, - char **outbuf, size_t *outbytesleft, int *errno) + char **outbuf, size_t *outbytesleft, int *errno) { return kiconv_utf8_to_cck(kcd, inbuf, inbytesleft, outbuf, outbytesleft, errno, utf8_to_euctw); @@ -593,7 +591,7 @@ kiconv_to_euctw(void *kcd, char **inbuf, size_t *inbytesleft, */ static size_t kiconvstr_to_euctw(char *inarray, size_t *inlen, char *outarray, - size_t *outlen, int flag, int *errno) + size_t *outlen, int flag, int *errno) { return kiconvstr_utf8_to_cck((uchar_t *)inarray, inlen, (uchar_t *)outarray, outlen, flag, errno, utf8_to_euctw); @@ -604,7 +602,7 @@ kiconvstr_to_euctw(char *inarray, size_t *inlen, char *outarray, */ static size_t kiconv_to_cp950hkscs(void *kcd, char **inbuf, size_t *inbytesleft, - char **outbuf, size_t *outbytesleft, int *errno) + char **outbuf, size_t *outbytesleft, int *errno) { return kiconv_utf8_to_cck(kcd, inbuf, inbytesleft, outbuf, outbytesleft, errno, utf8_to_cp950hkscs); @@ -615,7 +613,7 @@ kiconv_to_cp950hkscs(void *kcd, char **inbuf, size_t *inbytesleft, */ static size_t kiconvstr_to_cp950hkscs(char *inarray, size_t *inlen, char *outarray, - size_t *outlen, int flag, int *errno) + size_t *outlen, int flag, int *errno) { return kiconvstr_utf8_to_cck((uchar_t *)inarray, inlen, (uchar_t *)outarray, outlen, flag, errno, utf8_to_cp950hkscs); @@ -626,7 +624,7 @@ kiconvstr_to_cp950hkscs(char *inarray, size_t *inlen, char *outarray, */ static size_t kiconv_to_big5hkscs(void *kcd, char **inbuf, size_t *inbytesleft, - char **outbuf, size_t *outbytesleft, int *errno) + char **outbuf, size_t *outbytesleft, int *errno) { return kiconv_utf8_to_cck(kcd, inbuf, inbytesleft, outbuf, outbytesleft, errno, utf8_to_big5hkscs); @@ -650,7 +648,7 @@ kiconvstr_to_big5hkscs(char *inarray, size_t *inlen, char *outarray, */ static int8_t big5_to_utf8_common(uint32_t big5_val, uchar_t *ob, uchar_t *obtail, - size_t *ret_val, kiconv_table_array_t *table, size_t nitems) + size_t *ret_val, kiconv_table_array_t *table, size_t nitems) { size_t index; int8_t sz; @@ -689,7 +687,7 @@ big5_to_utf8(uint32_t big5_val, uchar_t *ob, uchar_t *obtail, size_t *ret_val) */ static int8_t cp950hkscs_to_utf8(uint32_t hkscs_val, uchar_t *ob, uchar_t *obtail, - size_t *ret_val) + size_t *ret_val) { return (big5_to_utf8_common(hkscs_val, ob, obtail, ret_val, kiconv_cp950hkscs_utf8, KICONV_CP950HKSCS_UTF8_MAX)); @@ -720,7 +718,7 @@ get_unicode_from_UDA(size_t plane_no, uchar_t b1, uchar_t b2) */ static int8_t euctw_to_utf8(size_t plane_no, uint32_t euctw_val, uchar_t *ob, - uchar_t *obtail, size_t *ret_val) + uchar_t *obtail, size_t *ret_val) { uint32_t u32; size_t index; @@ -813,7 +811,7 @@ euctw_to_utf8(size_t plane_no, uint32_t euctw_val, uchar_t *ob, */ static int8_t big5hkscs_to_utf8(uint32_t hkscs_val, uchar_t *ob, uchar_t *obtail, - size_t *ret_val) + size_t *ret_val) { size_t index; int8_t sz; @@ -856,7 +854,7 @@ big5hkscs_to_utf8(uint32_t hkscs_val, uchar_t *ob, uchar_t *obtail, /* ARGSUSED */ static int8_t utf8_to_euctw(uint32_t utf8, uchar_t **inbuf, uchar_t *ibtail, - uchar_t *ob, uchar_t *obtail, size_t *ret_val) + uchar_t *ob, uchar_t *obtail, size_t *ret_val) { size_t index; size_t plane_no; @@ -981,7 +979,7 @@ utf8_to_big5hkscs(uint32_t utf8, uchar_t **inbuf, uchar_t *ibtail, */ static int8_t utf8_to_big5_common(uint32_t utf8, uchar_t *ob, uchar_t *obtail, - size_t *ret_val, kiconv_table_t *table, size_t nitems) + size_t *ret_val, kiconv_table_t *table, size_t nitems) { size_t index; int8_t big5len; @@ -1012,7 +1010,7 @@ utf8_to_big5_common(uint32_t utf8, uchar_t *ob, uchar_t *obtail, /* ARGSUSED */ static int8_t utf8_to_big5(uint32_t utf8, uchar_t **inbuf, uchar_t *ibtail, - uchar_t *ob, uchar_t *obtail, size_t *ret_val) + uchar_t *ob, uchar_t *obtail, size_t *ret_val) { return (utf8_to_big5_common(utf8, ob, obtail, ret_val, kiconv_utf8_big5, KICONV_UTF8_BIG5_MAX)); @@ -1024,7 +1022,7 @@ utf8_to_big5(uint32_t utf8, uchar_t **inbuf, uchar_t *ibtail, /* ARGSUSED */ static int8_t utf8_to_cp950hkscs(uint32_t utf8, uchar_t **inbuf, uchar_t *ibtail, - uchar_t *ob, uchar_t *obtail, size_t *ret_val) + uchar_t *ob, uchar_t *obtail, size_t *ret_val) { return (utf8_to_big5_common(utf8, ob, obtail, ret_val, kiconv_utf8_cp950hkscs, KICONV_UTF8_CP950HKSCS)); diff --git a/usr/src/uts/common/os/cpu.c b/usr/src/uts/common/os/cpu.c index eeebaeaacc..7f7216688c 100644 --- a/usr/src/uts/common/os/cpu.c +++ b/usr/src/uts/common/os/cpu.c @@ -61,7 +61,7 @@ #include <sys/archsystm.h> #include <sys/sdt.h> #include <sys/smt.h> -#if defined(__x86) || defined(__amd64) +#if defined(__x86) #include <sys/x86_archext.h> #endif #include <sys/callo.h> diff --git a/usr/src/uts/common/os/ddi_intr_impl.c b/usr/src/uts/common/os/ddi_intr_impl.c index 215be73722..22f4548607 100644 --- a/usr/src/uts/common/os/ddi_intr_impl.c +++ b/usr/src/uts/common/os/ddi_intr_impl.c @@ -35,7 +35,7 @@ #include <sys/sunndi.h> #include <sys/ndi_impldefs.h> /* include prototypes */ -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /* * MSI-X allocation limit. */ @@ -294,7 +294,7 @@ i_ddi_intr_get_limit(dev_info_t *dip, int type, ddi_irm_pool_t *pool_p) limit = MIN(limit, nintrs); /* Impose a global MSI-X limit on x86 */ -#if defined(__i386) || defined(__amd64) +#if defined(__x86) if (type == DDI_INTR_TYPE_MSIX) limit = MIN(limit, ddi_msix_alloc_limit); #endif @@ -539,7 +539,7 @@ set_intr_affinity(ddi_intr_handle_t h, processorid_t tgt) return (ret); } -#if defined(__i386) || defined(__amd64) +#if defined(__x86) ddi_acc_handle_t i_ddi_get_pci_config_handle(dev_info_t *dip) { diff --git a/usr/src/uts/common/os/ddi_intr_irm.c b/usr/src/uts/common/os/ddi_intr_irm.c index c3c0481e7f..8faa8fea8c 100644 --- a/usr/src/uts/common/os/ddi_intr_irm.c +++ b/usr/src/uts/common/os/ddi_intr_irm.c @@ -34,7 +34,7 @@ #include <sys/sunndi.h> #include <sys/ndi_impldefs.h> /* include prototypes */ -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /* * MSI-X allocation limit. */ @@ -767,7 +767,7 @@ i_ddi_irm_set_cb(dev_info_t *dip, boolean_t has_cb_flag) /* Determine new request size */ nreq = MIN(req_p->ireq_nreq, pool_p->ipool_defsz); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /* Use the default static limit for non-IRM drivers */ if (req_p->ireq_type == DDI_INTR_TYPE_MSIX) nreq = MIN(nreq, ddi_msix_alloc_limit); diff --git a/usr/src/uts/common/os/fm.c b/usr/src/uts/common/os/fm.c index 66fe699366..842f611ec0 100644 --- a/usr/src/uts/common/os/fm.c +++ b/usr/src/uts/common/os/fm.c @@ -375,9 +375,9 @@ fm_panic(const char *format, ...) va_list ap; (void) atomic_cas_ptr((void *)&fm_panicstr, NULL, (void *)format); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) fastreboot_disable_highpil(); -#endif /* __i386 || __amd64 */ +#endif /* __x86 */ va_start(ap, format); vpanic(format, ap); va_end(ap); diff --git a/usr/src/uts/common/os/mmapobj.c b/usr/src/uts/common/os/mmapobj.c index 142c10754e..78421c9bb6 100644 --- a/usr/src/uts/common/os/mmapobj.c +++ b/usr/src/uts/common/os/mmapobj.c @@ -213,8 +213,6 @@ struct mobj_stats { #define OVERLAPS_STACK(addr, p) \ ((p->p_model == DATAMODEL_LP64) && \ (addr >= (p->p_usrstack - ((p->p_stk_ctl + PAGEOFFSET) & PAGEMASK)))) -#elif defined(__i386) -#define OVERLAPS_STACK(addr, p) 0 #endif /* lv_flags values - bitmap */ diff --git a/usr/src/uts/common/os/shm.c b/usr/src/uts/common/os/shm.c index 4f6ae11d84..8f98fcb3f0 100644 --- a/usr/src/uts/common/os/shm.c +++ b/usr/src/uts/common/os/shm.c @@ -346,7 +346,7 @@ shmat(int shmid, caddr_t uaddr, int uflags, uintptr_t *rvp) size = P2ROUNDUP(size, share_size); align_hint = share_size; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /* * For x86, we want to share as much of the page table tree * as possible. We use a large align_hint at first, but @@ -364,7 +364,7 @@ shmat(int shmid, caddr_t uaddr, int uflags, uintptr_t *rvp) while (size >= ptes_per_table * (uint64_t)align_hint) align_hint *= ptes_per_table; } -#endif /* __i386 || __amd64 */ +#endif /* __x86 */ #if defined(__sparcv9) if (addr == 0 && diff --git a/usr/src/uts/common/os/swapgeneric.c b/usr/src/uts/common/os/swapgeneric.c index 6d22fa40a6..ce64aff89a 100644 --- a/usr/src/uts/common/os/swapgeneric.c +++ b/usr/src/uts/common/os/swapgeneric.c @@ -878,7 +878,7 @@ load_bootpath_drivers(char *bootpath) #endif dip = path_to_devinfo(pathcopy); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /* * i386 does not provide stub nodes for all boot devices, * but we should be able to find the node for the parent, diff --git a/usr/src/uts/common/os/sysent.c b/usr/src/uts/common/os/sysent.c index 1858b5a693..e87e6d8d29 100644 --- a/usr/src/uts/common/os/sysent.c +++ b/usr/src/uts/common/os/sysent.c @@ -89,9 +89,9 @@ int getloadavg(int *, int); int rusagesys(int, void *, void *, void *, void *); int getpagesizes(int, size_t *, int); int gtty(int, intptr_t); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) int hrtsys(struct hrtsysa *, rval_t *); -#endif /* __i386 || __amd64 */ +#endif /* __x86 */ int ioctl(int, int, intptr_t); int kill(); int labelsys(int, void *, void *, void *, void *, void *); @@ -185,7 +185,7 @@ int statvfs(char *, struct statvfs *); int fstatvfs(int, struct statvfs *); offset_t llseek32(int32_t, uint32_t, uint32_t, int); -#if (defined(__i386) && !defined(__amd64)) || defined(__i386_COMPAT) +#if defined(__i386_COMPAT) int sysi86(short, uintptr_t, uintptr_t, uintptr_t); #endif @@ -392,19 +392,15 @@ typedef int64_t (*llfcn_t)(); /* for casting one-word returns */ #define IF_sparc(true, false) false #endif -#if defined(__i386) && !defined(__amd64) -#define IF_i386(true, false) true -#else #define IF_i386(true, false) false -#endif -#if defined(__i386) || defined(__amd64) +#if defined(__x86) #define IF_x86(true, false) true #else #define IF_x86(true, false) false #endif -#if (defined(__i386) && !defined(__amd64)) || defined(__i386_COMPAT) +#if defined(__i386_COMPAT) #define IF_386_ABI(true, false) true #else #define IF_386_ABI(true, false) false diff --git a/usr/src/uts/common/os/timers.c b/usr/src/uts/common/os/timers.c index 53be806026..cb57b60758 100644 --- a/usr/src/uts/common/os/timers.c +++ b/usr/src/uts/common/os/timers.c @@ -1211,7 +1211,7 @@ hrt2ts(hrtime_t hrt, timestruc_t *tsp) hrtime_t ts2hrt(const timestruc_t *tsp) { -#if defined(__amd64) || defined(__i386) +#if defined(__x86) /* * On modern x86 CPUs, the simple version is faster. */ @@ -1232,7 +1232,7 @@ ts2hrt(const timestruc_t *tsp) hrt = (hrt << 7) - hrt - hrt - hrt; hrt = (hrt << 9) + tsp->tv_nsec; return (hrt); -#endif /* defined(__amd64) || defined(__i386) */ +#endif /* defined(__x86) */ } /* diff --git a/usr/src/uts/common/pcmcia/nexus/pcmcia.c b/usr/src/uts/common/pcmcia/nexus/pcmcia.c index 6073b432d4..bfa248af5d 100644 --- a/usr/src/uts/common/pcmcia/nexus/pcmcia.c +++ b/usr/src/uts/common/pcmcia/nexus/pcmcia.c @@ -72,7 +72,7 @@ #ifdef sparc #include <sys/ddi_subrdefs.h> -#elif defined(__x86) || defined(__amd64) +#elif defined(__x86) #include <sys/mach_intr.h> #endif @@ -5028,7 +5028,7 @@ pcmcia_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, return (ret); } -#elif defined(__x86) || defined(__amd64) +#elif defined(__x86) static struct intrspec *pcmcia_intr_get_ispec(dev_info_t *, int, pcmcia_logical_socket_t **); diff --git a/usr/src/uts/common/syscall/lwp_create.c b/usr/src/uts/common/syscall/lwp_create.c index 361654cabb..f7a8382661 100644 --- a/usr/src/uts/common/syscall/lwp_create.c +++ b/usr/src/uts/common/syscall/lwp_create.c @@ -90,13 +90,6 @@ syslwp_create(ucontext_t *ucp, int flags, id_t *new_lwp) if (copyin(ucp, &uc, sizeof (ucontext_t))) return (set_errno(EFAULT)); sigutok(&uc.uc_sigmask, &sigmask); -#if defined(__i386) - /* - * libc stashed thrptr into unused kernel %sp. - * See setup_context() in libc. - */ - thrptr = (uint32_t)uc.uc_mcontext.gregs[ESP]; -#endif } #ifdef _SYSCALL32_IMPL else { diff --git a/usr/src/uts/common/vm/vm_anon.c b/usr/src/uts/common/vm/vm_anon.c index 6ca64f77da..6785e6b4dd 100644 --- a/usr/src/uts/common/vm/vm_anon.c +++ b/usr/src/uts/common/vm/vm_anon.c @@ -1999,7 +1999,7 @@ anon_map_getpages( uint_t vpprot; int upsize = (szc < seg->s_szc); -#if !defined(__i386) && !defined(__amd64) +#if !defined(__x86) ASSERT(seg->s_szc != 0); #endif ASSERT(szc <= seg->s_szc); diff --git a/usr/src/uts/common/vm/vm_page.c b/usr/src/uts/common/vm/vm_page.c index 89751b7b2c..d93400c343 100644 --- a/usr/src/uts/common/vm/vm_page.c +++ b/usr/src/uts/common/vm/vm_page.c @@ -1857,7 +1857,7 @@ page_create_get_something(vnode_t *vp, u_offset_t off, struct seg *seg, flags &= ~PG_MATCH_COLOR; locked = 0; -#if defined(__i386) || defined(__amd64) +#if defined(__x86) flags = page_create_update_flags_x86(flags); #endif @@ -2035,7 +2035,7 @@ page_alloc_pages(struct vnode *vp, struct seg *seg, caddr_t addr, ASSERT(basepp != NULL || ppa != NULL); ASSERT(basepp == NULL || ppa == NULL); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) while (page_chk_freelist(szc) == 0) { VM_STAT_ADD(alloc_pages[8]); if (anypgsz == 0 || --szc == 0) diff --git a/usr/src/uts/common/vm/vm_pagelist.c b/usr/src/uts/common/vm/vm_pagelist.c index 950b142588..965d939ebc 100644 --- a/usr/src/uts/common/vm/vm_pagelist.c +++ b/usr/src/uts/common/vm/vm_pagelist.c @@ -3690,7 +3690,7 @@ page_get_contig_pages(int mnode, uint_t bin, int mtype, uchar_t szc, return (NULL); } -#if defined(__i386) || defined(__amd64) +#if defined(__x86) /* * Determine the likelihood of finding/coalescing a szc page. * Return 0 if the likelihood is small otherwise return 1. diff --git a/usr/src/uts/common/xen/os/hypercall.c b/usr/src/uts/common/xen/os/hypercall.c index a906f101ea..0bd770669c 100644 --- a/usr/src/uts/common/xen/os/hypercall.c +++ b/usr/src/uts/common/xen/os/hypercall.c @@ -91,18 +91,6 @@ HYPERVISOR_set_callbacks(ulong_t event_address, ulong_t failsafe_address, event_address, failsafe_address, syscall_address)); } -#elif defined(__i386) - -long -HYPERVISOR_set_callbacks( - ulong_t event_selector, ulong_t event_address, - ulong_t failsafe_selector, ulong_t failsafe_address) -{ - return (__hypercall4(__HYPERVISOR_set_callbacks, - event_selector, event_address, - failsafe_selector, failsafe_address)); -} - #endif /* __amd64 */ long @@ -130,12 +118,6 @@ HYPERVISOR_update_descriptor(maddr_t ma, uint64_t desc) return (__hypercall2(__HYPERVISOR_update_descriptor, ma, desc)); -#elif defined(__i386) - - return (__hypercall4(__HYPERVISOR_update_descriptor, - (ulong_t)ma, (ulong_t)(ma >>32), - (ulong_t)desc, (ulong_t)(desc >> 32))); - #endif } @@ -165,12 +147,7 @@ HYPERVISOR_update_va_mapping(ulong_t va, uint64_t new_pte, ulong_t flags) return (__hypercall3_int(__HYPERVISOR_update_va_mapping, va, new_pte, flags)); -#elif defined(__i386) - - return (__hypercall4_int(__HYPERVISOR_update_va_mapping, va, - (ulong_t)new_pte, (ulong_t)(new_pte >> 32), flags)); - -#endif /* __i386 */ +#endif /* __amd64 */ } /* @@ -184,14 +161,7 @@ HYPERVISOR_set_timer_op(uint64_t timeout) return (__hypercall1(__HYPERVISOR_set_timer_op, timeout)); -#elif defined(__i386) - - uint32_t timeout_hi = (uint32_t)(timeout >> 32); - uint32_t timeout_lo = (uint32_t)timeout; - return (__hypercall2(__HYPERVISOR_set_timer_op, - (ulong_t)timeout_lo, (ulong_t)timeout_hi)); - -#endif /* __i386 */ +#endif /* __amd64 */ } /* *** __HYPERVISOR_event_channel_op_compat *** OBSOLETED */ @@ -243,13 +213,7 @@ HYPERVISOR_update_va_mapping_otherdomain(ulong_t va, return (__hypercall4_int(__HYPERVISOR_update_va_mapping_otherdomain, va, new_pte, flags, (ulong_t)domain_id)); -#elif defined(__i386) - - return (__hypercall5_int(__HYPERVISOR_update_va_mapping_otherdomain, - va, (ulong_t)new_pte, (ulong_t)(new_pte >> 32), flags, - (ulong_t)domain_id)); - -#endif /* __i386 */ +#endif /* __amd64 */ } /* diff --git a/usr/src/uts/i86pc/dboot/dboot_xen.s b/usr/src/uts/i86pc/dboot/dboot_xen.s index 5ed08ee355..def6490a63 100644 --- a/usr/src/uts/i86pc/dboot/dboot_xen.s +++ b/usr/src/uts/i86pc/dboot/dboot_xen.s @@ -29,7 +29,6 @@ #include "dboot_xboot.h" #if defined(__amd64) - ENTRY_NP(_start) /* * At entry we are passed a (start_info_t *) in %rsi. @@ -76,7 +75,6 @@ SET_SIZE(_start) #elif defined(__i386) - ENTRY_NP(_start) /* * At entry we are passed a (start_info_t *) in %esi. @@ -116,6 +114,4 @@ pushl %eax call *%esi SET_SIZE(_start) - #endif /* __i386 */ - diff --git a/usr/src/uts/i86pc/i86hvm/io/xpv/evtchn.c b/usr/src/uts/i86pc/i86hvm/io/xpv/evtchn.c index dbaa32c71e..fac932ac8b 100644 --- a/usr/src/uts/i86pc/i86hvm/io/xpv/evtchn.c +++ b/usr/src/uts/i86pc/i86hvm/io/xpv/evtchn.c @@ -53,11 +53,7 @@ static volatile ulong_t *pending_events; static volatile ulong_t *masked_events; /* log2(NBBY * sizeof (ulong)) */ -#ifdef __amd64 #define EVTCHN_SHIFT 6 -#else /* __i386 */ -#define EVTCHN_SHIFT 5 -#endif /* Atomically get and clear a ulong from memory. */ #define GET_AND_CLEAR(src, targ) { \ diff --git a/usr/src/uts/i86pc/io/amd_iommu/amd_iommu.c b/usr/src/uts/i86pc/io/amd_iommu/amd_iommu.c index 950b5e1e5b..a667868203 100644 --- a/usr/src/uts/i86pc/io/amd_iommu/amd_iommu.c +++ b/usr/src/uts/i86pc/io/amd_iommu/amd_iommu.c @@ -123,7 +123,7 @@ _init(void) { int error = ENOTSUP; -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) if (get_hwenv() != HW_NATIVE) return (ENOTSUP); diff --git a/usr/src/uts/i86pc/io/apix/apix.c b/usr/src/uts/i86pc/io/apix/apix.c index cedc49147e..6cd7952113 100644 --- a/usr/src/uts/i86pc/io/apix/apix.c +++ b/usr/src/uts/i86pc/io/apix/apix.c @@ -357,11 +357,6 @@ apix_init() apix_softinit(); -#if !defined(__amd64) - if (cpuid_have_cr8access(CPU)) - apic_have_32bit_cr8 = 1; -#endif - apic_pir_vect = apix_get_ipivect(XC_CPUPOKE_PIL, -1); /* diff --git a/usr/src/uts/i86pc/io/pcplusmp/apic.c b/usr/src/uts/i86pc/io/pcplusmp/apic.c index c987391435..ef59e58712 100644 --- a/usr/src/uts/i86pc/io/pcplusmp/apic.c +++ b/usr/src/uts/i86pc/io/pcplusmp/apic.c @@ -317,10 +317,6 @@ apic_init(void) apic_pir_vect = apic_get_ipivect(XC_CPUPOKE_PIL, -1); -#if !defined(__amd64) - if (cpuid_have_cr8access(CPU)) - apic_have_32bit_cr8 = 1; -#endif } static void diff --git a/usr/src/uts/i86pc/io/pcplusmp/apic_regops.c b/usr/src/uts/i86pc/io/pcplusmp/apic_regops.c index e0b647975d..067cb769b0 100644 --- a/usr/src/uts/i86pc/io/pcplusmp/apic_regops.c +++ b/usr/src/uts/i86pc/io/pcplusmp/apic_regops.c @@ -54,8 +54,8 @@ static void local_apic_write_int_cmd(uint32_t cpu_id, uint32_t cmd1); * xAPIC global enable X2APIC enable Description * (IA32_APIC_BASE[11]) (IA32_APIC_BASE[10]) * ----------------------------------------------------------- - * 0 0 APIC is disabled - * 0 1 Invalid + * 0 0 APIC is disabled + * 0 1 Invalid * 1 0 APIC is enabled in xAPIC mode * 1 1 APIC is enabled in X2APIC mode * ----------------------------------------------------------- @@ -75,8 +75,6 @@ apic_reg_ops_t local_apic_regs_ops = { apic_send_EOI, }; -int apic_have_32bit_cr8 = 0; - /* The default ops is local APIC (Memory Mapped IO) */ apic_reg_ops_t *apic_reg_ops = &local_apic_regs_ops; @@ -104,26 +102,13 @@ local_apic_write(uint32_t reg, uint64_t value) static int get_local_apic_pri(void) { -#if defined(__amd64) return ((int)getcr8()); -#else - if (apic_have_32bit_cr8) - return ((int)getcr8()); - return (apicadr[APIC_TASK_REG]); -#endif } static void local_apic_write_task_reg(uint64_t value) { -#if defined(__amd64) setcr8((ulong_t)(value >> APIC_IPL_SHIFT)); -#else - if (apic_have_32bit_cr8) - setcr8((ulong_t)(value >> APIC_IPL_SHIFT)); - else - apicadr[APIC_TASK_REG] = (uint32_t)value; -#endif } static void diff --git a/usr/src/uts/i86pc/io/rootnex.c b/usr/src/uts/i86pc/io/rootnex.c index a740451f43..612d37b1ff 100644 --- a/usr/src/uts/i86pc/io/rootnex.c +++ b/usr/src/uts/i86pc/io/rootnex.c @@ -76,7 +76,7 @@ #include <vm/kboot_mmu.h> #endif -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) #include <sys/immu.h> #endif @@ -87,13 +87,11 @@ */ #ifdef DEBUG int rootnex_alloc_check_parms = 1; -int rootnex_bind_check_parms = 1; int rootnex_bind_check_inuse = 1; int rootnex_unbind_verify_buffer = 0; int rootnex_sync_check_parms = 1; #else int rootnex_alloc_check_parms = 0; -int rootnex_bind_check_parms = 0; int rootnex_bind_check_inuse = 0; int rootnex_unbind_verify_buffer = 0; int rootnex_sync_check_parms = 0; @@ -120,23 +118,15 @@ int rootnex_sync_ignore_params = 0; /* * For the 64-bit kernel, pre-alloc enough cookies for a 256K buffer plus 1 - * page for alignment. For the 32-bit kernel, pre-alloc enough cookies for a - * 64K buffer plus 1 page for alignment (we have less kernel space in a 32-bit - * kernel). Allocate enough windows to handle a 256K buffer w/ at least 65 - * sgllen DMA engine, and enough copybuf buffer state pages to handle 2 pages - * (< 8K). We will still need to allocate the copy buffer during bind though - * (if we need one). These can only be modified in /etc/system before rootnex - * attach. + * page for alignment. Allocate enough windows to handle a 256K buffer w/ at + * least 65 sgllen DMA engine, and enough copybuf buffer state pages to handle + * 2 pages (< 8K). We will still need to allocate the copy buffer during bind + * though (if we need one). These can only be modified in /etc/system before + * rootnex attach. */ -#if defined(__amd64) int rootnex_prealloc_cookies = 65; int rootnex_prealloc_windows = 4; int rootnex_prealloc_copybuf = 2; -#else -int rootnex_prealloc_cookies = 33; -int rootnex_prealloc_windows = 4; -int rootnex_prealloc_copybuf = 2; -#endif /* driver global state */ static rootnex_state_t *rootnex_state; @@ -235,7 +225,7 @@ static int rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_cookie_t *cookiep, uint_t *ccountp); static int rootnex_coredma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle); -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) static void rootnex_coredma_reset_cookies(dev_info_t *dip, ddi_dma_handle_t handle); static int rootnex_coredma_get_cookies(dev_info_t *dip, ddi_dma_handle_t handle, @@ -252,7 +242,7 @@ static int rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep, uint_t *ccountp); -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) static int rootnex_coredma_hdl_setprivate(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, void *v); static void *rootnex_coredma_hdl_getprivate(dev_info_t *dip, dev_info_t *rdip, @@ -323,7 +313,7 @@ static struct modlinkage rootnex_modlinkage = { NULL }; -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) static iommulib_nexops_t iommulib_nexops = { IOMMU_NEXOPS_VERSION, "Rootnex IOMMU ops Vers 1.1", @@ -381,8 +371,6 @@ static int rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); static int rootnex_map_handle(ddi_map_req_t *mp); static void rootnex_clean_dmahdl(ddi_dma_impl_t *hp); static int rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegsize); -static int rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, - ddi_dma_attr_t *attr); static void rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, rootnex_sglinfo_t *sglinfo); static void rootnex_dvma_get_sgl(ddi_dma_obj_t *dmar_object, @@ -466,7 +454,7 @@ rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) case DDI_ATTACH: break; case DDI_RESUME: -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) return (immu_unquiesce()); #else return (DDI_SUCCESS); @@ -515,7 +503,7 @@ rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) /* Initialize rootnex event handle */ i_ddi_rootnex_init_events(dip); -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) e = iommulib_nexus_register(dip, &iommulib_nexops, &rootnex_state->r_iommulib_handle); @@ -536,7 +524,7 @@ rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) { switch (cmd) { case DDI_SUSPEND: -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) return (immu_quiesce()); #else return (DDI_SUCCESS); @@ -1875,7 +1863,7 @@ rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, ddi_dma_handle_t *handlep) { int retval = DDI_SUCCESS; -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) if (IOMMU_UNITIALIZED(rdip)) { retval = iommulib_nex_open(dip, rdip); @@ -1946,7 +1934,7 @@ rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle) int ret; ndi_fmc_remove(rdip, DMA_HANDLE, handle); -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) if (IOMMU_USED(rdip)) ret = iommulib_nexdma_freehdl(dip, rdip, handle); else @@ -1967,7 +1955,7 @@ rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip, { rootnex_sglinfo_t *sinfo; ddi_dma_obj_t *dmao; -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) struct dvmaseg *dvs; ddi_dma_cookie_t *cookie; #endif @@ -2017,20 +2005,10 @@ rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip, mutex_exit(&dma->dp_mutex); } - /* check the ddi_dma_attr arg to make sure it makes a little sense */ - if (rootnex_bind_check_parms) { - e = rootnex_valid_bind_parms(dmareq, attr); - if (e != DDI_SUCCESS) { - ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); - rootnex_clean_dmahdl(hp); - return (e); - } - } - /* save away the original bind info */ dma->dp_dma = dmareq->dmar_object; -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) if (IOMMU_USED(rdip)) { dmao = &dma->dp_dvma; e = iommulib_nexdma_mapobject(dip, rdip, handle, dmareq, dmao); @@ -2211,7 +2189,7 @@ fast: * Clean up and return an error. */ -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) if (dma->dp_dvma_used) { (void) iommulib_nexdma_unmapobject(dip, rdip, handle, @@ -2221,7 +2199,7 @@ fast: #endif e = rootnex_bind_slowpath(hp, dmareq, dma, attr, &dma->dp_dma, kmflag); -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) } #endif if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { @@ -2284,7 +2262,7 @@ rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_cookie_t *cookiep, uint_t *ccountp) { int ret; -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) if (IOMMU_USED(rdip)) ret = iommulib_nexdma_bindhdl(dip, rdip, handle, dmareq, cookiep, ccountp); @@ -2338,7 +2316,7 @@ rootnex_coredma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, rootnex_teardown_copybuf(dma); rootnex_teardown_windows(dma); -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) if (IOMMU_USED(rdip) && dma->dp_dvma_used) (void) iommulib_nexdma_unmapobject(dip, rdip, handle, &dma->dp_dvma); @@ -2377,7 +2355,7 @@ rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, { int ret; -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) if (IOMMU_USED(rdip)) ret = iommulib_nexdma_unbindhdl(dip, rdip, handle); else @@ -2390,7 +2368,7 @@ rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, return (ret); } -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) static int rootnex_coredma_get_sleep_flags(ddi_dma_handle_t handle) @@ -2666,10 +2644,6 @@ rootnex_clean_dmahdl(ddi_dma_impl_t *hp) dma->dp_partial_required = B_FALSE; dma->dp_trim_required = B_FALSE; dma->dp_sglinfo.si_copybuf_req = 0; -#if !defined(__amd64) - dma->dp_cb_remaping = B_FALSE; - dma->dp_kva = NULL; -#endif /* FMA related initialization */ hp->dmai_fault = 0; @@ -2724,28 +2698,6 @@ rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegmentsize) } /* - * rootnex_valid_bind_parms() - * Called in ddi_dma_*_bind_handle path to validate its parameters. - */ -/* ARGSUSED */ -static int -rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, ddi_dma_attr_t *attr) -{ -#if !defined(__amd64) - /* - * we only support up to a 2G-1 transfer size on 32-bit kernels so - * we can track the offset for the obsoleted interfaces. - */ - if (dmareq->dmar_object.dmao_size > 0x7FFFFFFF) { - return (DDI_DMA_TOOBIG); - } -#endif - - return (DDI_SUCCESS); -} - - -/* * rootnex_need_bounce_seg() * check to see if the buffer lives on both side of the seg. */ @@ -3073,16 +3025,7 @@ rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, } sgl[cnt].dmac_laddress = raddr; sgl[cnt].dmac_size = psize; -#if defined(__amd64) sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; -#else - /* - * save the buf offset for 32-bit kernel. used in the - * obsoleted interfaces. - */ - sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF | - (dmar_object->dmao_size - size); -#endif /* if this isn't the last cookie, go to the next one */ if ((cnt + 1) < sglinfo->si_max_pages) { cnt++; @@ -3112,15 +3055,7 @@ rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, /* save the cookie information */ sgl[cnt].dmac_laddress = raddr; sgl[cnt].dmac_size = psize; -#if defined(__amd64) sgl[cnt].dmac_type = 0; -#else - /* - * save the buf offset for 32-bit kernel. used in the - * obsoleted interfaces. - */ - sgl[cnt].dmac_type = dmar_object->dmao_size - size; -#endif /* * this page didn't need the copy buffer, it is physically @@ -3482,9 +3417,6 @@ rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, size_t max_copybuf; int cansleep; int e; -#if !defined(__amd64) - int vmflag; -#endif ASSERT(!dma->dp_dvma_used); @@ -3500,30 +3432,6 @@ rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, dma->dp_copybuf_size = MIN(sinfo->si_copybuf_req, max_copybuf); ASSERT((dma->dp_copybuf_size & MMU_PAGEOFFSET) == 0); -#if !defined(__amd64) - /* - * if we don't have kva space to copy to/from, allocate the KVA space - * now. We only do this for the 32-bit kernel. We use seg kpm space for - * the 64-bit kernel. - */ - if ((dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) || - (dmareq->dmar_object.dmao_obj.virt_obj.v_as != NULL)) { - - /* convert the sleep flags */ - if (dmareq->dmar_fp == DDI_DMA_SLEEP) { - vmflag = VM_SLEEP; - } else { - vmflag = VM_NOSLEEP; - } - - /* allocate Kernel VA space that we can bcopy to/from */ - dma->dp_kva = vmem_alloc(heap_arena, dma->dp_copybuf_size, - vmflag); - if (dma->dp_kva == NULL) { - return (DDI_DMA_NORESOURCES); - } - } -#endif /* convert the sleep flags */ if (dmareq->dmar_fp == DDI_DMA_SLEEP) { @@ -3551,12 +3459,6 @@ rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, e = i_ddi_mem_alloc(dma->dp_dip, &lattr, dma->dp_copybuf_size, cansleep, 0, NULL, &dma->dp_cbaddr, &dma->dp_cbsize, NULL); if (e != DDI_SUCCESS) { -#if !defined(__amd64) - if (dma->dp_kva != NULL) { - vmem_free(heap_arena, dma->dp_kva, - dma->dp_copybuf_size); - } -#endif return (DDI_DMA_NORESOURCES); } @@ -3728,13 +3630,6 @@ rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, dma->dp_pgmap = (rootnex_pgmap_t *)(((uintptr_t) &dma->dp_window[dma->dp_max_win] + 0x7) & ~0x7); -#if !defined(__amd64) - /* - * make sure all pm_mapped, pm_vaddr, and pm_pp are set to - * false/NULL. Should be quicker to bzero vs loop and set. - */ - bzero(dma->dp_pgmap, copy_state_size); -#endif } else { dma->dp_pgmap = NULL; } @@ -3750,28 +3645,6 @@ rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, static void rootnex_teardown_copybuf(rootnex_dma_t *dma) { -#if !defined(__amd64) - int i; - - /* - * if we allocated kernel heap VMEM space, go through all the pages and - * map out any of the ones that we're mapped into the kernel heap VMEM - * arena. Then free the VMEM space. - */ - if (dma->dp_kva != NULL) { - for (i = 0; i < dma->dp_sglinfo.si_max_pages; i++) { - if (dma->dp_pgmap[i].pm_mapped) { - hat_unload(kas.a_hat, dma->dp_pgmap[i].pm_kaddr, - MMU_PAGESIZE, HAT_UNLOAD); - dma->dp_pgmap[i].pm_mapped = B_FALSE; - } - } - - vmem_free(heap_arena, dma->dp_kva, dma->dp_copybuf_size); - } - -#endif - /* if we allocated a copy buffer, free it */ if (dma->dp_cbaddr != NULL) { i_ddi_mem_free(dma->dp_cbaddr, NULL); @@ -3816,9 +3689,6 @@ rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, window->wd_trim.tr_trim_last = B_FALSE; window->wd_trim.tr_first_copybuf_win = B_FALSE; window->wd_trim.tr_last_copybuf_win = B_FALSE; -#if !defined(__amd64) - window->wd_remap_copybuf = dma->dp_cb_remaping; -#endif } @@ -3840,11 +3710,7 @@ rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, rootnex_dma_t *dma, uint_t pidx; uint_t pcnt; off_t poff; -#if defined(__amd64) pfn_t pfn; -#else - page_t **pplist; -#endif ASSERT(dmar_object->dmao_type != DMA_OTYP_DVADDR); @@ -3871,10 +3737,8 @@ rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, rootnex_dma_t *dma, * pfn which we'll use with seg kpm. */ poff = cookie->dmac_laddress & MMU_PAGEOFFSET; -#if defined(__amd64) /* mfn_to_pfn() is a NOP on i86pc */ pfn = mfn_to_pfn(cookie->dmac_laddress >> MMU_PAGESHIFT); -#endif /* __amd64 */ /* figure out if the copybuf size is a power of 2 */ if (!ISP2(dma->dp_copybuf_size)) { @@ -3927,100 +3791,14 @@ rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, rootnex_dma_t *dma, dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)(((uintptr_t) dmar_object->dmao_obj.virt_obj.v_addr + cur_offset) & MMU_PAGEMASK); -#if !defined(__amd64) - /* - * we didn't need to, and will never need to map this - * page. - */ - dma->dp_pgmap[pidx].pm_mapped = B_FALSE; -#endif /* we don't have a kernel VA. We need one for the bcopy. */ } else { -#if defined(__amd64) /* * for the 64-bit kernel, it's easy. We use seg kpm to * get a Kernel VA for the corresponding pfn. */ dma->dp_pgmap[pidx].pm_kaddr = hat_kpm_pfn2va(pfn); -#else - /* - * for the 32-bit kernel, this is a pain. First we'll - * save away the page_t or user VA for this page. This - * is needed in rootnex_dma_win() when we switch to a - * new window which requires us to re-map the copy - * buffer. - */ - pplist = dmar_object->dmao_obj.virt_obj.v_priv; - if (dmar_object->dmao_type == DMA_OTYP_PAGES) { - dma->dp_pgmap[pidx].pm_pp = *cur_pp; - dma->dp_pgmap[pidx].pm_vaddr = NULL; - } else if (pplist != NULL) { - dma->dp_pgmap[pidx].pm_pp = pplist[pidx]; - dma->dp_pgmap[pidx].pm_vaddr = NULL; - } else { - dma->dp_pgmap[pidx].pm_pp = NULL; - dma->dp_pgmap[pidx].pm_vaddr = (caddr_t) - (((uintptr_t) - dmar_object->dmao_obj.virt_obj.v_addr + - cur_offset) & MMU_PAGEMASK); - } - - /* - * save away the page aligned virtual address which was - * allocated from the kernel heap arena (taking into - * account if we need more copy buffer than we alloced - * and use multiple windows to handle this, i.e. &,%). - * NOTE: there isn't and physical memory backing up this - * virtual address space currently. - */ - if ((*copybuf_used + MMU_PAGESIZE) <= - dma->dp_copybuf_size) { - dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) - (((uintptr_t)dma->dp_kva + *copybuf_used) & - MMU_PAGEMASK); - } else { - if (copybuf_sz_power_2) { - dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) - (((uintptr_t)dma->dp_kva + - (*copybuf_used & - (dma->dp_copybuf_size - 1))) & - MMU_PAGEMASK); - } else { - dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) - (((uintptr_t)dma->dp_kva + - (*copybuf_used % - dma->dp_copybuf_size)) & - MMU_PAGEMASK); - } - } - - /* - * if we haven't used up the available copy buffer yet, - * map the kva to the physical page. - */ - if (!dma->dp_cb_remaping && ((*copybuf_used + - MMU_PAGESIZE) <= dma->dp_copybuf_size)) { - dma->dp_pgmap[pidx].pm_mapped = B_TRUE; - if (dma->dp_pgmap[pidx].pm_pp != NULL) { - i86_pp_map(dma->dp_pgmap[pidx].pm_pp, - dma->dp_pgmap[pidx].pm_kaddr); - } else { - i86_va_map(dma->dp_pgmap[pidx].pm_vaddr, - sinfo->si_asp, - dma->dp_pgmap[pidx].pm_kaddr); - } - - /* - * we've used up the available copy buffer, this page - * will have to be mapped during rootnex_dma_win() when - * we switch to a new window which requires a re-map - * the copy buffer. (32-bit kernel only) - */ - } else { - dma->dp_pgmap[pidx].pm_mapped = B_FALSE; - } -#endif /* go to the next page_t */ if (dmar_object->dmao_type == DMA_OTYP_PAGES) { *cur_pp = (*cur_pp)->p_next; @@ -4044,16 +3822,6 @@ rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, rootnex_dma_t *dma, pcnt = mmu_btopr(cookie->dmac_size + poff); while (pcnt > 0) { -#if !defined(__amd64) - /* - * the 32-bit kernel doesn't have seg kpm, so we need - * to map in the driver buffer (if it didn't come down - * with a kernel VA) on the fly. Since this page doesn't - * use the copy buffer, it's not, or will it ever, have - * to be mapped in. - */ - dma->dp_pgmap[pidx].pm_mapped = B_FALSE; -#endif dma->dp_pgmap[pidx].pm_uses_copybuf = B_FALSE; /* @@ -4238,15 +4006,6 @@ rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, */ ASSERT(cookie->dmac_size <= MMU_PAGESIZE); - /* - * from now on, all new windows in this bind need to be re-mapped during - * ddi_dma_getwin() (32-bit kernel only). i.e. we ran out out copybuf - * space... - */ -#if !defined(__amd64) - dma->dp_cb_remaping = B_TRUE; -#endif - /* reset copybuf used */ *copybuf_used = 0; @@ -4342,10 +4101,6 @@ rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, (*windowp)->wd_trim.tr_last_pidx = pidx; (*windowp)->wd_trim.tr_last_cbaddr = dma->dp_pgmap[pidx].pm_cbaddr; -#if !defined(__amd64) - (*windowp)->wd_trim.tr_last_kaddr = - dma->dp_pgmap[pidx].pm_kaddr; -#endif } /* save the buffer offsets for the next window */ @@ -4390,9 +4145,6 @@ rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, (*windowp)->wd_trim.tr_first_paddr = ROOTNEX_PADDR_TO_RBASE(paddr); -#if !defined(__amd64) - (*windowp)->wd_trim.tr_first_kaddr = dma->dp_kva; -#endif /* account for the cookie copybuf usage in the new window */ *copybuf_used += MMU_PAGESIZE; @@ -4425,10 +4177,6 @@ rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, dma->dp_pgmap[pidx + 1].pm_cbaddr)) + poff; cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(paddr); -#if !defined(__amd64) - ASSERT(dma->dp_pgmap[pidx + 1].pm_mapped == B_FALSE); - dma->dp_pgmap[pidx + 1].pm_kaddr += MMU_PAGESIZE; -#endif } else { /* go back to the current cookie */ cookie++; @@ -4668,7 +4416,7 @@ static int rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags) { -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) if (IOMMU_USED(rdip)) { return (iommulib_nexdma_sync(dip, rdip, handle, off, len, cache_flags)); @@ -4740,21 +4488,10 @@ rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, ddi_dma_impl_t *hp; rootnex_dma_t *dma; ddi_dma_obj_t *dmao; -#if !defined(__amd64) - rootnex_sglinfo_t *sinfo; - rootnex_pgmap_t *pmap; - uint_t pidx; - uint_t pcnt; - off_t poff; - int i; -#endif hp = (ddi_dma_impl_t *)handle; dma = (rootnex_dma_t *)hp->dmai_private; -#if !defined(__amd64) - sinfo = &dma->dp_sglinfo; -#endif /* If we try and get a window which doesn't exist, return failure */ if (win >= hp->dmai_nwin) { @@ -4794,41 +4531,6 @@ rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, DDI_DMA_SYNC_FORCPU); } -#if !defined(__amd64) - /* - * before we move to the next window, if we need to re-map, unmap all - * the pages in this window. - */ - if (dma->dp_cb_remaping) { - /* - * If we switch to this window again, we'll need to map in - * on the fly next time. - */ - window->wd_remap_copybuf = B_TRUE; - - /* - * calculate the page index into the buffer where this window - * starts, and the number of pages this window takes up. - */ - pidx = (sinfo->si_buf_offset + window->wd_offset) >> - MMU_PAGESHIFT; - poff = (sinfo->si_buf_offset + window->wd_offset) & - MMU_PAGEOFFSET; - pcnt = mmu_btopr(window->wd_size + poff); - ASSERT((pidx + pcnt) <= sinfo->si_max_pages); - - /* unmap pages which are currently mapped in this window */ - for (i = 0; i < pcnt; i++) { - if (dma->dp_pgmap[pidx].pm_mapped) { - hat_unload(kas.a_hat, - dma->dp_pgmap[pidx].pm_kaddr, MMU_PAGESIZE, - HAT_UNLOAD); - dma->dp_pgmap[pidx].pm_mapped = B_FALSE; - } - pidx++; - } - } -#endif /* * Move to the new window. @@ -4842,18 +4544,9 @@ rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, if (trim->tr_trim_first) { window->wd_first_cookie->dmac_laddress = trim->tr_first_paddr; window->wd_first_cookie->dmac_size = trim->tr_first_size; -#if !defined(__amd64) - window->wd_first_cookie->dmac_type = - (window->wd_first_cookie->dmac_type & - ROOTNEX_USES_COPYBUF) + window->wd_offset; -#endif if (trim->tr_first_copybuf_win) { dma->dp_pgmap[trim->tr_first_pidx].pm_cbaddr = trim->tr_first_cbaddr; -#if !defined(__amd64) - dma->dp_pgmap[trim->tr_first_pidx].pm_kaddr = - trim->tr_first_kaddr; -#endif } } if (trim->tr_trim_last) { @@ -4862,10 +4555,6 @@ rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, if (trim->tr_last_copybuf_win) { dma->dp_pgmap[trim->tr_last_pidx].pm_cbaddr = trim->tr_last_cbaddr; -#if !defined(__amd64) - dma->dp_pgmap[trim->tr_last_pidx].pm_kaddr = - trim->tr_last_kaddr; -#endif } } @@ -4883,66 +4572,6 @@ rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, hp->dmai_curcookie = 1; hp->dmai_cookie++; -#if !defined(__amd64) - /* re-map copybuf if required for this window */ - if (dma->dp_cb_remaping) { - /* - * calculate the page index into the buffer where this - * window starts. - */ - pidx = (sinfo->si_buf_offset + window->wd_offset) >> - MMU_PAGESHIFT; - ASSERT(pidx < sinfo->si_max_pages); - - /* - * the first page can get unmapped if it's shared with the - * previous window. Even if the rest of this window is already - * mapped in, we need to still check this one. - */ - pmap = &dma->dp_pgmap[pidx]; - if ((pmap->pm_uses_copybuf) && (pmap->pm_mapped == B_FALSE)) { - if (pmap->pm_pp != NULL) { - pmap->pm_mapped = B_TRUE; - i86_pp_map(pmap->pm_pp, pmap->pm_kaddr); - } else if (pmap->pm_vaddr != NULL) { - pmap->pm_mapped = B_TRUE; - i86_va_map(pmap->pm_vaddr, sinfo->si_asp, - pmap->pm_kaddr); - } - } - pidx++; - - /* map in the rest of the pages if required */ - if (window->wd_remap_copybuf) { - window->wd_remap_copybuf = B_FALSE; - - /* figure out many pages this window takes up */ - poff = (sinfo->si_buf_offset + window->wd_offset) & - MMU_PAGEOFFSET; - pcnt = mmu_btopr(window->wd_size + poff); - ASSERT(((pidx - 1) + pcnt) <= sinfo->si_max_pages); - - /* map pages which require it */ - for (i = 1; i < pcnt; i++) { - pmap = &dma->dp_pgmap[pidx]; - if (pmap->pm_uses_copybuf) { - ASSERT(pmap->pm_mapped == B_FALSE); - if (pmap->pm_pp != NULL) { - pmap->pm_mapped = B_TRUE; - i86_pp_map(pmap->pm_pp, - pmap->pm_kaddr); - } else if (pmap->pm_vaddr != NULL) { - pmap->pm_mapped = B_TRUE; - i86_va_map(pmap->pm_vaddr, - sinfo->si_asp, - pmap->pm_kaddr); - } - } - pidx++; - } - } - } -#endif /* if the new window uses the copy buffer, sync it for the device */ if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_WRITE)) { @@ -4963,7 +4592,7 @@ rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep, uint_t *ccountp) { -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) if (IOMMU_USED(rdip)) { return (iommulib_nexdma_win(dip, rdip, handle, win, offp, lenp, cookiep, ccountp)); @@ -4974,7 +4603,7 @@ rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, cookiep, ccountp)); } -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) /*ARGSUSED*/ static int rootnex_coredma_hdl_setprivate(dev_info_t *dip, dev_info_t *rdip, @@ -5156,7 +4785,7 @@ rootnex_dma_check(dev_info_t *dip, const void *handle, const void *addr, static int rootnex_quiesce(dev_info_t *dip) { -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) return (immu_quiesce()); #else return (DDI_SUCCESS); diff --git a/usr/src/uts/i86pc/io/xsvc/xsvc.c b/usr/src/uts/i86pc/io/xsvc/xsvc.c index 734a8a6472..e8f2c0579a 100644 --- a/usr/src/uts/i86pc/io/xsvc/xsvc.c +++ b/usr/src/uts/i86pc/io/xsvc/xsvc.c @@ -836,12 +836,10 @@ xsvc_devmap(dev_t dev, devmap_cookie_t dhp, offset_t off, size_t len, * smmap32 will sign extend the offset. We need to undo that since * we are passed a physical address in off, not a offset. */ -#if defined(__amd64) if (((model & DDI_MODEL_MASK) == DDI_MODEL_ILP32) && ((off & ~0xFFFFFFFFll) == ~0xFFFFFFFFll)) { off = off & 0xFFFFFFFF; } -#endif #ifdef __xpv /* diff --git a/usr/src/uts/i86pc/os/cpr_impl.c b/usr/src/uts/i86pc/os/cpr_impl.c index 91fb583a01..4a5c71b35d 100644 --- a/usr/src/uts/i86pc/os/cpr_impl.c +++ b/usr/src/uts/i86pc/os/cpr_impl.c @@ -73,9 +73,7 @@ extern int flushes_require_xcalls; extern cpuset_t cpu_ready_set; -#if defined(__amd64) extern void *wc_long_mode_64(void); -#endif /* __amd64 */ extern int tsc_gethrtime_enable; extern void i_cpr_start_cpu(void); @@ -356,12 +354,8 @@ i_cpr_pre_resume_cpus() gdt.base = cpup->wc_gdt_base; gdt.limit = cpup->wc_gdt_limit; -#if defined(__amd64) code_length = (uint32_t)((uintptr_t)wc_long_mode_64 - (uintptr_t)wc_rm_start); -#else - code_length = 0; -#endif init_real_mode_platter(who, code_length, cpup->wc_cr4, gdt); @@ -523,10 +517,8 @@ i_cpr_power_down(int sleeptype) int ret = 0; power_req_t power_req; char *str = "i_cpr_power_down"; -#if defined(__amd64) /*LINTED*/ rm_platter_t *real_mode_platter = (rm_platter_t *)rm_platter_va; -#endif extern int cpr_suspend_succeeded; extern void kernel_wc_code(); @@ -567,7 +559,6 @@ i_cpr_power_down(int sleeptype) prt_other_cpus(); -#if defined(__amd64) PMD(PMD_SX, ("real_mode_platter->rm_cr4=%lx, getcr4()=%lx\n", (ulong_t)real_mode_platter->rm_cr4, (ulong_t)getcr4())) @@ -595,7 +586,6 @@ i_cpr_power_down(int sleeptype) PMD(PMD_SX, ("real_mode_platter->rm_longmode64_addr=%lx\n", (ulong_t)real_mode_platter->rm_longmode64_addr)) -#endif PT(PT_SC); if (wc_save_context(cpup)) { @@ -633,16 +623,11 @@ i_cpr_power_down(int sleeptype) gdt.base = cpup->wc_gdt_base; gdt.limit = cpup->wc_gdt_limit; -#if defined(__amd64) code_length = (uint32_t)((uintptr_t)wc_long_mode_64 - (uintptr_t)wc_rm_start); -#else - code_length = 0; -#endif init_real_mode_platter(0, code_length, cpup->wc_cr4, gdt); -#if defined(__amd64) PMD(PMD_SX, ("real_mode_platter->rm_cr4=%lx, getcr4()=%lx\n", (ulong_t)wcpp->rm_cr4, getcr4())) @@ -655,7 +640,6 @@ i_cpr_power_down(int sleeptype) PMD(PMD_SX, ("real_mode_platter->rm_temp_gdt[TEMPGDT_KCODE64]=%lx\n", (ulong_t)wcpp->rm_temp_gdt[TEMPGDT_KCODE64])) -#endif PMD(PMD_SX, ("gdt=%p:%x, idt=%p:%x, ldt=%lx, tr=%lx, " "kgsbase=%lx\n", (void *)wcpp->rm_gdt_base, @@ -853,11 +837,6 @@ i_cpr_restore_apic(psm_state_request_t *req) return ((*psm_state)(req)); } - -/* stop lint complaining about offset not being used in 32bit mode */ -#if !defined(__amd64) -/*ARGSUSED*/ -#endif static void init_real_mode_platter(int cpun, uint32_t offset, uint_t cr4, wc_desctbr_t gdt) { @@ -878,7 +857,6 @@ init_real_mode_platter(int cpun, uint32_t offset, uint_t cr4, wc_desctbr_t gdt) real_mode_platter->rm_gdt_base = gdt.base; real_mode_platter->rm_gdt_lim = gdt.limit; -#if defined(__amd64) if (getcr3() > 0xffffffffUL) panic("Cannot initialize CPUs; kernel's 64-bit page tables\n" "located above 4G in physical memory (@ 0x%llx).", @@ -912,7 +890,6 @@ init_real_mode_platter(int cpun, uint32_t offset, uint_t cr4, wc_desctbr_t gdt) * mapped address, we need to calculate it here. */ real_mode_platter->rm_longmode64_addr = rm_platter_pa + offset; -#endif /* __amd64 */ /* return; */ } diff --git a/usr/src/uts/i86pc/os/cpuid.c b/usr/src/uts/i86pc/os/cpuid.c index 27058ddcf4..528c62c4c4 100644 --- a/usr/src/uts/i86pc/os/cpuid.c +++ b/usr/src/uts/i86pc/os/cpuid.c @@ -5475,17 +5475,12 @@ cpuid_pass4(cpu_t *cpu, uint_t *hwcap_out) if (!is_x86_feature(x86_featureset, X86FSET_NX)) *edx &= ~CPUID_AMD_EDX_NX; -#if !defined(__amd64) - *edx &= ~CPUID_AMD_EDX_LM; -#endif /* * Now map the supported feature vector to * things that we think userland will care about. */ -#if defined(__amd64) if (*edx & CPUID_AMD_EDX_SYSC) hwcap_flags |= AV_386_AMD_SYSC; -#endif if (*edx & CPUID_AMD_EDX_MMXamd) hwcap_flags |= AV_386_AMD_MMX; if (*edx & CPUID_AMD_EDX_3DNow) @@ -5850,26 +5845,6 @@ cpuid_get_cores_per_compunit(cpu_t *cpu) return (cpu->cpu_m.mcpu_cpi->cpi_cores_per_compunit); } -/*ARGSUSED*/ -int -cpuid_have_cr8access(cpu_t *cpu) -{ -#if defined(__amd64) - return (1); -#else - struct cpuid_info *cpi; - - ASSERT(cpu != NULL); - cpi = cpu->cpu_m.mcpu_cpi; - if ((cpi->cpi_vendor == X86_VENDOR_AMD || - cpi->cpi_vendor == X86_VENDOR_HYGON) && - cpi->cpi_maxeax >= 1 && - (CPI_FEATURES_XTD_ECX(cpi) & CPUID_AMD_ECX_CR8D) != 0) - return (1); - return (0); -#endif -} - uint32_t cpuid_get_apicid(cpu_t *cpu) { @@ -6105,11 +6080,7 @@ cpuid_opteron_erratum(cpu_t *cpu, uint_t erratum) case 86: return (SH_C0(eax) || CG(eax)); case 88: -#if !defined(__amd64) - return (0); -#else return (B(eax) || SH_C0(eax)); -#endif case 89: return (cpi->cpi_family < 0x10); case 90: @@ -6122,11 +6093,7 @@ cpuid_opteron_erratum(cpu_t *cpu, uint_t erratum) case 94: return (B(eax) || SH_C0(eax) || CG(eax)); case 95: -#if !defined(__amd64) - return (0); -#else return (B(eax) || SH_C0(eax)); -#endif case 96: return (B(eax) || SH_C0(eax) || CG(eax)); case 97: @@ -6221,11 +6188,7 @@ cpuid_opteron_erratum(cpu_t *cpu, uint_t erratum) DR_B2(eax) || RB_C0(eax)); case 721: -#if defined(__amd64) return (cpi->cpi_family == 0x10 || cpi->cpi_family == 0x12); -#else - return (0); -#endif default: return (-1); @@ -7494,7 +7457,7 @@ cpuid_deadline_tsc_supported(void) } } -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) /* * Patch in versions of bcopy for high performance Intel Nhm processors * and later... @@ -7515,7 +7478,7 @@ patch_memops(uint_t vendor) } } } -#endif /* __amd64 && !__xpv */ +#endif /* !__xpv */ /* * We're being asked to tell the system how many bits are required to represent diff --git a/usr/src/uts/i86pc/os/ddi_impl.c b/usr/src/uts/i86pc/os/ddi_impl.c index e5a2aad350..e10e676c3c 100644 --- a/usr/src/uts/i86pc/os/ddi_impl.c +++ b/usr/src/uts/i86pc/os/ddi_impl.c @@ -106,7 +106,7 @@ static int peek_mem(peekpoke_ctlops_t *in_args); static int kmem_override_cache_attrs(caddr_t, size_t, uint_t); -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) extern void immu_init(void); #endif @@ -178,9 +178,6 @@ configure(void) { extern void i_ddi_init_root(); -#if defined(__i386) - extern int fpu_pentium_fdivbug; -#endif /* __i386 */ extern int fpu_ignored; /* @@ -189,12 +186,6 @@ configure(void) fpu_probe(); -#if defined(__i386) - if (fpu_pentium_fdivbug) { - printf("\ -FP hardware exhibits Pentium floating point divide problem\n"); - } -#endif /* __i386 */ if (fpu_ignored) { printf("FP hardware will not be used\n"); @@ -217,7 +208,7 @@ FP hardware exhibits Pentium floating point divide problem\n"); /* reprogram devices not set up by firmware (BIOS) */ impl_bus_reprobe(); -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) /* * Setup but don't startup the IOMMU * Startup happens later via a direct call diff --git a/usr/src/uts/i86pc/os/dtrace_subr.c b/usr/src/uts/i86pc/os/dtrace_subr.c index 53e3d4ddaa..0c797d7624 100644 --- a/usr/src/uts/i86pc/os/dtrace_subr.c +++ b/usr/src/uts/i86pc/os/dtrace_subr.c @@ -107,7 +107,6 @@ dtrace_getipl(void) void dtrace_toxic_ranges(void (*func)(uintptr_t base, uintptr_t limit)) { -#ifdef __amd64 extern uintptr_t toxic_addr; extern size_t toxic_size; @@ -116,20 +115,6 @@ dtrace_toxic_ranges(void (*func)(uintptr_t base, uintptr_t limit)) if (hole_end > hole_start) (*func)(hole_start, hole_end); (*func)(toxic_addr, toxic_addr + toxic_size); -#else - extern void *device_arena_contains(void *, size_t, size_t *); - caddr_t vaddr; - size_t len; - - for (vaddr = (caddr_t)kernelbase; vaddr < (caddr_t)KERNEL_TEXT; - vaddr += len) { - len = (caddr_t)KERNEL_TEXT - vaddr; - vaddr = device_arena_contains(vaddr, len, &len); - if (vaddr == NULL) - break; - (*func)((uintptr_t)vaddr, (uintptr_t)vaddr + len); - } -#endif (*func)(0, _userlimit); } @@ -346,7 +331,6 @@ dtrace_safe_defer_signal(void) */ if (rp->r_pc >= t->t_dtrace_scrpc + isz && rp->r_pc < t->t_dtrace_astpc) { -#ifdef __amd64 /* * If there is a scratch register and we're on the * instruction immediately after the modified instruction, @@ -369,7 +353,6 @@ dtrace_safe_defer_signal(void) break; } } -#endif rp->r_pc = t->t_dtrace_npc; t->t_dtrace_ft = 0; return (0); diff --git a/usr/src/uts/i86pc/os/fastboot.c b/usr/src/uts/i86pc/os/fastboot.c index 8f85bca6f5..bd721973d5 100644 --- a/usr/src/uts/i86pc/os/fastboot.c +++ b/usr/src/uts/i86pc/os/fastboot.c @@ -194,11 +194,7 @@ static ddi_dma_attr_t fastboot_below_1G_dma_attr = { static ddi_dma_attr_t fastboot_dma_attr = { DMA_ATTR_V0, 0x0000000008000000ULL, /* dma_attr_addr_lo: 128MB */ -#ifdef __amd64 0xFFFFFFFFFFFFFFFFULL, /* dma_attr_addr_hi: 2^64B */ -#else - 0x0000000FFFFFFFFFULL, /* dma_attr_addr_hi: 64GB */ -#endif /* __amd64 */ 0x00000000FFFFFFFFULL, /* dma_attr_count_max */ 0x0000000000001000ULL, /* dma_attr_align: 4KB */ 1, /* dma_attr_burstsize */ @@ -322,12 +318,8 @@ fastboot_map_with_size(fastboot_info_t *nk, uintptr_t vstart, paddr_t pstart, * Program with either valid bit or PTP bits. */ if (l == nk->fi_top_level) { -#ifdef __amd64 ASSERT(nk->fi_top_level == 3); table[index] = nk->fi_next_table_pa | ptp_bits; -#else - table[index] = nk->fi_next_table_pa | PT_VALID; -#endif /* __amd64 */ } else { table[index] = nk->fi_next_table_pa | ptp_bits; } @@ -605,11 +597,7 @@ fastboot_init_fields(fastboot_info_t *nk) nk->fi_shift_amt = fastboot_shift_amt_pae; nk->fi_ptes_per_table = 512; nk->fi_lpagesize = (2 << 20); /* 2M */ -#ifdef __amd64 nk->fi_top_level = 3; -#else - nk->fi_top_level = 2; -#endif /* __amd64 */ } } @@ -1227,11 +1215,7 @@ load_kernel_retry: * address as we do the copying. */ if (newkernel.fi_has_pae) { -#ifdef __amd64 size_t size = MMU_PAGESIZE * 5; -#else - size_t size = MMU_PAGESIZE * 4; -#endif /* __amd64 */ if (newkernel.fi_pagetable_size && newkernel.fi_pagetable_size < size) { diff --git a/usr/src/uts/i86pc/os/mach_kdi.c b/usr/src/uts/i86pc/os/mach_kdi.c index 60ca8c9fca..162a918221 100644 --- a/usr/src/uts/i86pc/os/mach_kdi.c +++ b/usr/src/uts/i86pc/os/mach_kdi.c @@ -147,7 +147,6 @@ kdi_slave_wait(void) * Note that kmdb entry relies on the fake cpu_t having zero cpu_idt/cpu_id. */ -#if defined(__amd64) void * boot_kdi_tmpinit(void) @@ -167,38 +166,3 @@ boot_kdi_tmpfini(void *old) { wrmsr(MSR_AMD_GSBASE, (uint64_t)old); } - -#elif defined(__i386) - -void * -boot_kdi_tmpinit(void) -{ - cpu_t *cpu = kobj_zalloc(sizeof (*cpu), KM_TMP); - uintptr_t old; - desctbr_t b_gdtr; - user_desc_t *bgdt; - - cpu->cpu_self = cpu; - - rd_gdtr(&b_gdtr); - bgdt = (user_desc_t *)(b_gdtr.dtr_base); - - set_usegd(&bgdt[GDT_BGSTMP], - cpu, sizeof (*cpu), SDT_MEMRWA, SEL_KPL, SDP_BYTES, SDP_OP32); - - /* - * Now switch %gs to point at it. - */ - old = getgs(); - setgs(KMDBGS_SEL); - - return ((void *)old); -} - -void -boot_kdi_tmpfini(void *old) -{ - setgs((uintptr_t)old); -} - -#endif /* __i386 */ diff --git a/usr/src/uts/i86pc/os/machdep.c b/usr/src/uts/i86pc/os/machdep.c index 0bcc45573a..7fe5871360 100644 --- a/usr/src/uts/i86pc/os/machdep.c +++ b/usr/src/uts/i86pc/os/machdep.c @@ -884,14 +884,10 @@ lwp_stk_init(klwp_t *lwp, caddr_t stk) * have a well-defined initial state (present, ring 3 * and of type data). */ -#if defined(__amd64) if (lwp_getdatamodel(lwp) == DATAMODEL_NATIVE) pcb->pcb_fsdesc = pcb->pcb_gsdesc = zero_udesc; else pcb->pcb_fsdesc = pcb->pcb_gsdesc = zero_u32desc; -#elif defined(__i386) - pcb->pcb_fsdesc = pcb->pcb_gsdesc = zero_udesc; -#endif /* __i386 */ lwp_installctx(lwp); return (stk); } diff --git a/usr/src/uts/i86pc/os/mlsetup.c b/usr/src/uts/i86pc/os/mlsetup.c index e1fd081cfa..3a96748a89 100644 --- a/usr/src/uts/i86pc/os/mlsetup.c +++ b/usr/src/uts/i86pc/os/mlsetup.c @@ -279,19 +279,10 @@ mlsetup(struct regs *rp) #endif /* !__xpv */ -#if defined(__i386) && !defined(__xpv) - /* - * Some i386 processors do not implement the rdtsc instruction, - * or at least they do not implement it correctly. Patch them to - * return 0. - */ - if (!is_x86_feature(x86_featureset, X86FSET_TSC)) - patch_tsc_read(TSC_NONE); -#endif /* __i386 && !__xpv */ -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) patch_memops(cpuid_getvendor(CPU)); -#endif /* __amd64 && !__xpv */ +#endif /* !__xpv */ #if !defined(__xpv) /* XXPV what, if anything, should be dorked with here under xen? */ @@ -436,11 +427,6 @@ mlsetup(struct regs *rp) #else /* __xpv */ /* Flag PLAT_DR_FEATURE_ENABLED should only be set by DR driver. */ plat_dr_options &= ~PLAT_DR_FEATURE_ENABLED; -#ifndef __amd64 - /* Only enable CPU/memory DR on 64 bits kernel. */ - plat_dr_options &= ~PLAT_DR_FEATURE_MEMORY; - plat_dr_options &= ~PLAT_DR_FEATURE_CPU; -#endif /* __amd64 */ #endif /* __xpv */ /* diff --git a/usr/src/uts/i86pc/os/mp_machdep.c b/usr/src/uts/i86pc/os/mp_machdep.c index 36c723de7d..865fa049fd 100644 --- a/usr/src/uts/i86pc/os/mp_machdep.c +++ b/usr/src/uts/i86pc/os/mp_machdep.c @@ -104,9 +104,6 @@ static int mach_cpu_create_devinfo(cpu_t *cp, dev_info_t **dipp); * External reference functions */ extern void return_instr(); -#if defined(__i386) -extern uint64_t freq_notsc(uint32_t *); -#endif extern void pc_gethrestime(timestruc_t *); extern int cpuid_get_coreid(cpu_t *); extern int cpuid_get_chipid(cpu_t *); diff --git a/usr/src/uts/i86pc/os/mp_pc.c b/usr/src/uts/i86pc/os/mp_pc.c index 331981e955..217f960875 100644 --- a/usr/src/uts/i86pc/os/mp_pc.c +++ b/usr/src/uts/i86pc/os/mp_pc.c @@ -122,16 +122,13 @@ mach_cpucontext_fini(void) HAT_UNLOAD); } -#if defined(__amd64) extern void *long_mode_64(void); -#endif /* __amd64 */ /*ARGSUSED*/ void rmp_gdt_init(rm_platter_t *rm) { -#if defined(__amd64) /* Use the kas address space for the CPU startup thread. */ if (mmu_ptob(kas.a_hat->hat_htable->ht_pfn) > 0xffffffffUL) { panic("Cannot initialize CPUs; kernel's 64-bit page tables\n" @@ -167,7 +164,6 @@ rmp_gdt_init(rm_platter_t *rm) rm->rm_longmode64_addr = rm_platter_pa + (uint32_t)((uintptr_t)long_mode_64 - (uintptr_t)real_mode_start_cpu); -#endif /* __amd64 */ } static void * @@ -190,7 +186,6 @@ mach_cpucontext_alloc_tables(struct cpu *cp) ntss = cp->cpu_tss = &ct->ct_tss; -#if defined(__amd64) uintptr_t va; size_t len; @@ -243,21 +238,6 @@ mach_cpucontext_alloc_tables(struct cpu *cp) hati_cpu_punchin(cp, (uintptr_t)ntss, PROT_READ); } -#elif defined(__i386) - - ntss->tss_esp0 = ntss->tss_esp1 = ntss->tss_esp2 = ntss->tss_esp = - (uint32_t)&ct->ct_stack1[sizeof (ct->ct_stack1)]; - - ntss->tss_ss0 = ntss->tss_ss1 = ntss->tss_ss2 = ntss->tss_ss = KDS_SEL; - - ntss->tss_eip = (uint32_t)cp->cpu_thread->t_pc; - - ntss->tss_cs = KCS_SEL; - ntss->tss_ds = ntss->tss_es = KDS_SEL; - ntss->tss_fs = KFS_SEL; - ntss->tss_gs = KGS_SEL; - -#endif /* __i386 */ /* * Set I/O bit map offset equal to size of TSS segment limit diff --git a/usr/src/uts/i86pc/os/mp_startup.c b/usr/src/uts/i86pc/os/mp_startup.c index 3c42c2d42f..0235a786a9 100644 --- a/usr/src/uts/i86pc/os/mp_startup.c +++ b/usr/src/uts/i86pc/os/mp_startup.c @@ -267,13 +267,8 @@ static void init_cpu_id_gdt(struct cpu *cp) { /* Write cpu_id into limit field of GDT for usermode retrieval */ -#if defined(__amd64) set_usegd(&cp->cpu_gdt[GDT_CPUID], SDP_SHORT, NULL, cp->cpu_id, SDT_MEMRODA, SEL_UPL, SDP_BYTES, SDP_OP32); -#elif defined(__i386) - set_usegd(&cp->cpu_gdt[GDT_CPUID], NULL, cp->cpu_id, SDT_MEMRODA, - SEL_UPL, SDP_BYTES, SDP_OP32); -#endif } #endif /* !defined(__xpv) */ @@ -352,9 +347,7 @@ mp_cpu_configure_common(int cpun, boolean_t boot) */ sp = tp->t_stk; tp->t_sp = (uintptr_t)(sp - MINFRAME); -#if defined(__amd64) tp->t_sp -= STACK_ENTRY_ALIGN; /* fake a call */ -#endif /* * Setup thread start entry point for boot or hotplug. */ @@ -421,13 +414,6 @@ mp_cpu_configure_common(int cpun, boolean_t boot) cp->cpu_gdt = kmem_zalloc(PAGESIZE, KM_SLEEP); bcopy(CPU->cpu_gdt, cp->cpu_gdt, (sizeof (*cp->cpu_gdt) * NGDT)); -#if defined(__i386) - /* - * setup kernel %gs. - */ - set_usegd(&cp->cpu_gdt[GDT_GS], cp, sizeof (struct cpu) -1, SDT_MEMRWA, - SEL_KPL, 0, 1); -#endif /* * Allocate pages for the CPU LDT. diff --git a/usr/src/uts/i86pc/os/startup.c b/usr/src/uts/i86pc/os/startup.c index 8444672a64..440ac20f71 100644 --- a/usr/src/uts/i86pc/os/startup.c +++ b/usr/src/uts/i86pc/os/startup.c @@ -168,7 +168,7 @@ static char hostid_file[] = "/etc/hostid"; void *gfx_devinfo_list; -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) extern void immu_startup(void); #endif @@ -198,29 +198,6 @@ static void layout_kernel_va(void); /* * Declare these as initialized data so we can patch them. */ -#ifdef __i386 - -/* - * Due to virtual address space limitations running in 32 bit mode, restrict - * the amount of physical memory configured to a max of PHYSMEM pages (16g). - * - * If the physical max memory size of 64g were allowed to be configured, the - * size of user virtual address space will be less than 1g. A limited user - * address space greatly reduces the range of applications that can run. - * - * If more physical memory than PHYSMEM is required, users should preferably - * run in 64 bit mode which has far looser virtual address space limitations. - * - * If 64 bit mode is not available (as in IA32) and/or more physical memory - * than PHYSMEM is required in 32 bit mode, physmem can be set to the desired - * value or to 0 (to configure all available memory) via eeprom(1M). kernelbase - * should also be carefully tuned to balance out the need of the user - * application while minimizing the risk of kernel heap exhaustion due to - * kernelbase being set too high. - */ -#define PHYSMEM 0x400000 - -#else /* __amd64 */ /* * For now we can handle memory with physical addresses up to about @@ -234,7 +211,6 @@ static void layout_kernel_va(void); #define PHYSMEM PHYSMEM_MAX64 #define AMD64_VA_HOLE_END 0xFFFF800000000000ul -#endif /* __amd64 */ pgcnt_t physmem = PHYSMEM; pgcnt_t obp_pages; /* Memory used by PROM for its text and data */ @@ -259,9 +235,7 @@ uintptr_t hole_start, hole_end; caddr_t kpm_vbase; size_t kpm_size; static int kpm_desired; -#ifdef __amd64 static uintptr_t segkpm_base = (uintptr_t)SEGKPM_BASE; -#endif /* * Configuration parameters set at boot time. @@ -285,11 +259,7 @@ char kern_bootfile[OBP_MAXPATHLEN]; * heap. The optimization of allocating zio buffers from their own segment is * only valid on 64-bit kernels. */ -#if defined(__amd64) int segzio_fromheap = 0; -#else -int segzio_fromheap = 1; -#endif /* * Give folks an escape hatch for disabling SMAP via kmdb. Doesn't work @@ -616,18 +586,11 @@ static size_t textrepl_min_gb = 10; * on 64 bit we use a predifined VA range for mapping devices in the kernel * on 32 bit the mappings are intermixed in the heap, so we use a bit map */ -#ifdef __amd64 vmem_t *device_arena; uintptr_t toxic_addr = (uintptr_t)NULL; size_t toxic_size = 1024 * 1024 * 1024; /* Sparc uses 1 gig too */ -#else /* __i386 */ - -ulong_t *toxic_bit_map; /* one bit for each 4k of VA in heap_arena */ -size_t toxic_bit_map_len = 0; /* in bits */ - -#endif /* __i386 */ int prom_debug; @@ -768,9 +731,7 @@ startup(void) * Make sure that nobody tries to use sekpm until we have * initialized it properly. */ -#if defined(__amd64) kpm_desired = 1; -#endif kpm_enable = 0; CPUSET_ONLY(cpu_ready_set, 0); /* cpu 0 is boot cpu */ @@ -1117,23 +1078,6 @@ startup_memlist(void) */ mmu_init(); -#ifdef __i386 - /* - * physmax is lowered if there is more memory than can be - * physically addressed in 32 bit (PAE/non-PAE) modes. - */ - if (mmu.pae_hat) { - if (PFN_ABOVE64G(physmax)) { - physinstalled -= (physmax - (PFN_64G - 1)); - physmax = PFN_64G - 1; - } - } else { - if (PFN_ABOVE4G(physmax)) { - physinstalled -= (physmax - (PFN_4G - 1)); - physmax = PFN_4G - 1; - } - } -#endif startup_build_mem_nodes(bootops->boot_mem->physinstalled); @@ -1400,13 +1344,11 @@ startup_memlist(void) PRM_DEBUG(valloc_sz); -#if defined(__amd64) if ((availrmem >> (30 - MMU_PAGESHIFT)) >= textrepl_min_gb && l2cache_sz <= 2 << 20) { extern size_t textrepl_size_thresh; textrepl_size_thresh = (16 << 20) - 1; } -#endif } /* @@ -1422,47 +1364,17 @@ startup_kmem(void) PRM_POINT("startup_kmem() starting..."); -#if defined(__amd64) if (eprom_kernelbase && eprom_kernelbase != KERNELBASE) cmn_err(CE_NOTE, "!kernelbase cannot be changed on 64-bit " "systems."); kernelbase = segkpm_base - KERNEL_REDZONE_SIZE; core_base = (uintptr_t)COREHEAP_BASE; core_size = (size_t)MISC_VA_BASE - COREHEAP_BASE; -#else /* __i386 */ - /* - * We configure kernelbase based on: - * - * 1. user specified kernelbase via eeprom command. Value cannot exceed - * KERNELBASE_MAX. we large page align eprom_kernelbase - * - * 2. Default to KERNELBASE and adjust to 2X less the size for page_t. - * On large memory systems we must lower kernelbase to allow - * enough room for page_t's for all of memory. - * - * The value set here, might be changed a little later. - */ - if (eprom_kernelbase) { - kernelbase = eprom_kernelbase & mmu.level_mask[1]; - if (kernelbase > KERNELBASE_MAX) - kernelbase = KERNELBASE_MAX; - } else { - kernelbase = (uintptr_t)KERNELBASE; - kernelbase -= ROUND_UP_4MEG(2 * valloc_sz); - } - ASSERT((kernelbase & mmu.level_offset[1]) == 0); - core_base = valloc_base; - core_size = 0; -#endif /* __i386 */ PRM_DEBUG(core_base); PRM_DEBUG(core_size); PRM_DEBUG(kernelbase); -#if defined(__i386) - segkp_fromheap = 1; -#endif /* __i386 */ - ekernelheap = (char *)core_base; PRM_DEBUG(ekernelheap); @@ -1479,14 +1391,10 @@ startup_kmem(void) *(uintptr_t *)&_kernelbase = kernelbase; *(uintptr_t *)&_userlimit = kernelbase; -#if defined(__amd64) *(uintptr_t *)&_userlimit -= KERNELBASE - USERLIMIT; #if !defined(__xpv) kpti_kbase = kernelbase; #endif -#else - *(uintptr_t *)&_userlimit32 = _userlimit; -#endif PRM_DEBUG(_kernelbase); PRM_DEBUG(_userlimit); PRM_DEBUG(_userlimit32); @@ -1496,17 +1404,6 @@ startup_kmem(void) layout_kernel_va(); -#if defined(__i386) - /* - * If segmap is too large we can push the bottom of the kernel heap - * higher than the base. Or worse, it could exceed the top of the - * VA space entirely, causing it to wrap around. - */ - if (kernelheap >= ekernelheap || (uintptr_t)kernelheap < kernelbase) - panic("too little address space available for kernelheap," - " use eeprom for lower kernelbase or smaller segmapsize"); -#endif /* __i386 */ - /* * Initialize the kernel heap. Note 3rd argument must be > 1st. */ @@ -1549,12 +1446,6 @@ startup_kmem(void) (npages == PHYSMEM ? "Due to virtual address space " : ""), npages, orig_npages); } -#if defined(__i386) - if (eprom_kernelbase && (eprom_kernelbase != kernelbase)) - cmn_err(CE_WARN, "kernelbase value, User specified 0x%lx, " - "System using 0x%lx", - (uintptr_t)eprom_kernelbase, (uintptr_t)kernelbase); -#endif #ifdef KERNELBASE_ABI_MIN if (kernelbase < (uintptr_t)KERNELBASE_ABI_MIN) { @@ -2076,29 +1967,12 @@ startup_vm(void) */ cpuid_pass3(CPU); -#if defined(__amd64) - /* * Create the device arena for toxic (to dtrace/kmdb) mappings. */ device_arena = vmem_create("device", (void *)toxic_addr, toxic_size, MMU_PAGESIZE, NULL, NULL, NULL, 0, VM_SLEEP); -#else /* __i386 */ - - /* - * allocate the bit map that tracks toxic pages - */ - toxic_bit_map_len = btop((ulong_t)(valloc_base - kernelbase)); - PRM_DEBUG(toxic_bit_map_len); - toxic_bit_map = - kmem_zalloc(BT_SIZEOFMAP(toxic_bit_map_len), KM_NOSLEEP); - ASSERT(toxic_bit_map != NULL); - PRM_DEBUG(toxic_bit_map); - -#endif /* __i386 */ - - /* * Now that we've got more VA, as well as the ability to allocate from * it, tell the debugger. @@ -2412,15 +2286,6 @@ post_startup(void) (void) i_ddi_attach_hw_nodes("pit_beep"); -#if defined(__i386) - /* - * Check for required functional Floating Point hardware, - * unless FP hardware explicitly disabled. - */ - if (fpu_exists && (fpu_pentium_fdivbug || fp_kind == FP_NO)) - halt("No working FP hardware found"); -#endif - maxmem = freemem; cpu_event_init_cpu(CPU); @@ -3224,9 +3089,7 @@ setx86isalist(void) tp = kmem_alloc(TBUFSIZE, KM_SLEEP); *tp = '\0'; -#if defined(__amd64) (void) strcpy(tp, "amd64 "); -#endif switch (x86_vendor) { case X86_VENDOR_Intel: @@ -3266,9 +3129,6 @@ setx86isalist(void) #undef TBUFSIZE } - -#ifdef __amd64 - void * device_arena_alloc(size_t size, int vm_flag) { @@ -3280,101 +3140,3 @@ device_arena_free(void *vaddr, size_t size) { vmem_free(device_arena, vaddr, size); } - -#else /* __i386 */ - -void * -device_arena_alloc(size_t size, int vm_flag) -{ - caddr_t vaddr; - uintptr_t v; - size_t start; - size_t end; - - vaddr = vmem_alloc(heap_arena, size, vm_flag); - if (vaddr == NULL) - return (NULL); - - v = (uintptr_t)vaddr; - ASSERT(v >= kernelbase); - ASSERT(v + size <= valloc_base); - - start = btop(v - kernelbase); - end = btop(v + size - 1 - kernelbase); - ASSERT(start < toxic_bit_map_len); - ASSERT(end < toxic_bit_map_len); - - while (start <= end) { - BT_ATOMIC_SET(toxic_bit_map, start); - ++start; - } - return (vaddr); -} - -void -device_arena_free(void *vaddr, size_t size) -{ - uintptr_t v = (uintptr_t)vaddr; - size_t start; - size_t end; - - ASSERT(v >= kernelbase); - ASSERT(v + size <= valloc_base); - - start = btop(v - kernelbase); - end = btop(v + size - 1 - kernelbase); - ASSERT(start < toxic_bit_map_len); - ASSERT(end < toxic_bit_map_len); - - while (start <= end) { - ASSERT(BT_TEST(toxic_bit_map, start) != 0); - BT_ATOMIC_CLEAR(toxic_bit_map, start); - ++start; - } - vmem_free(heap_arena, vaddr, size); -} - -/* - * returns 1st address in range that is in device arena, or NULL - * if len is not NULL it returns the length of the toxic range - */ -void * -device_arena_contains(void *vaddr, size_t size, size_t *len) -{ - uintptr_t v = (uintptr_t)vaddr; - uintptr_t eaddr = v + size; - size_t start; - size_t end; - - /* - * if called very early by kmdb, just return NULL - */ - if (toxic_bit_map == NULL) - return (NULL); - - /* - * First check if we're completely outside the bitmap range. - */ - if (v >= valloc_base || eaddr < kernelbase) - return (NULL); - - /* - * Trim ends of search to look at only what the bitmap covers. - */ - if (v < kernelbase) - v = kernelbase; - start = btop(v - kernelbase); - end = btop(eaddr - kernelbase); - if (end >= toxic_bit_map_len) - end = toxic_bit_map_len; - - if (bt_range(toxic_bit_map, &start, &end, end) == 0) - return (NULL); - - v = kernelbase + ptob(start); - if (len != NULL) - *len = ptob(end - start); - return ((void *)v); -} - -#endif /* __i386 */ diff --git a/usr/src/uts/i86pc/os/trap.c b/usr/src/uts/i86pc/os/trap.c index d0fb6acf57..d3eb318b84 100644 --- a/usr/src/uts/i86pc/os/trap.c +++ b/usr/src/uts/i86pc/os/trap.c @@ -362,8 +362,6 @@ instr_is_lcall_syscall(caddr_t pc) return (0); } -#ifdef __amd64 - /* * In the first revisions of amd64 CPUs produced by AMD, the LAHF and * SAHF instructions were not implemented in 64-bit mode. Later revisions @@ -414,7 +412,6 @@ emulate_lsahf(struct regs *rp, uchar_t instr) } rp->r_pc += LSAHFSIZE; } -#endif /* __amd64 */ #ifdef OPTERON_ERRATUM_91 @@ -482,9 +479,7 @@ trap(struct regs *rp, caddr_t addr, processorid_t cpuid) caddr_t vaddr; size_t sz; int ta; -#ifdef __amd64 uchar_t instr; -#endif ASSERT_STACK_ALIGNED(); @@ -496,42 +491,18 @@ trap(struct regs *rp, caddr_t addr, processorid_t cpuid) ASSERT(ct->t_schedflag & TS_DONT_SWAP); if (type == T_PGFLT) { - errcode = rp->r_err; - if (errcode & PF_ERR_WRITE) + if (errcode & PF_ERR_WRITE) { rw = S_WRITE; - else if ((caddr_t)rp->r_pc == addr || - (mmu.pt_nx != 0 && (errcode & PF_ERR_EXEC))) + } else if ((caddr_t)rp->r_pc == addr || + (mmu.pt_nx != 0 && (errcode & PF_ERR_EXEC))) { rw = S_EXEC; - else + } else { rw = S_READ; - -#if defined(__i386) - /* - * Pentium Pro work-around - */ - if ((errcode & PF_ERR_PROT) && pentiumpro_bug4046376) { - uint_t attr; - uint_t priv_violation; - uint_t access_violation; - - if (hat_getattr(addr < (caddr_t)kernelbase ? - curproc->p_as->a_hat : kas.a_hat, addr, &attr) - == -1) { - errcode &= ~PF_ERR_PROT; - } else { - priv_violation = (errcode & PF_ERR_USER) && - !(attr & PROT_USER); - access_violation = (errcode & PF_ERR_WRITE) && - !(attr & PROT_WRITE); - if (!priv_violation && !access_violation) - goto cleanup; - } } -#endif /* __i386 */ - - } else if (type == T_SGLSTP && lwp != NULL) + } else if (type == T_SGLSTP && lwp != NULL) { lwp->lwp_pcb.pcb_drstat = (uintptr_t)addr; + } if (tdebug) showregs(type, rp, addr); @@ -815,28 +786,6 @@ trap(struct regs *rp, caddr_t addr, processorid_t cpuid) ASSERT(!(curthread->t_flag & T_WATCHPT)); watchpage = (pr_watch_active(p) && pr_is_watchpage(addr, rw)); -#ifdef __i386 - /* - * In 32-bit mode, the lcall (system call) instruction fetches - * one word from the stack, at the stack pointer, because of the - * way the call gate is constructed. This is a bogus - * read and should not be counted as a read watchpoint. - * We work around the problem here by testing to see if - * this situation applies and, if so, simply jumping to - * the code in locore.s that fields the system call trap. - * The registers on the stack are already set up properly - * due to the match between the call gate sequence and the - * trap gate sequence. We just have to adjust the pc. - */ - if (watchpage && addr == (caddr_t)rp->r_sp && - rw == S_READ && instr_is_lcall_syscall((caddr_t)rp->r_pc)) { - extern void watch_syscall(void); - - rp->r_pc += LCALLSIZE; - watch_syscall(); /* never returns */ - /* NOTREACHED */ - } -#endif /* __i386 */ vaddr = addr; if (!watchpage || (sz = instr_size(rp, &vaddr, rw)) <= 0) fault_type = (errcode & PF_ERR_PROT)? F_PROT: F_INVAL; @@ -956,7 +905,6 @@ trap(struct regs *rp, caddr_t addr, processorid_t cpuid) ldt_rewrite_syscall(rp, p, X86FSET_ASYSC)) goto out; -#ifdef __amd64 /* * Emulate the LAHF and SAHF instructions if needed. * See the instr_is_lsahf function for details. @@ -966,7 +914,6 @@ trap(struct regs *rp, caddr_t addr, processorid_t cpuid) emulate_lsahf(rp, instr); goto out; } -#endif /*FALLTHROUGH*/ @@ -1695,10 +1642,8 @@ showregs(uint_t type, struct regs *rp, caddr_t addr) printf("cr2: %lx ", getcr2()); #if !defined(__xpv) printf("cr3: %lx ", getcr3()); -#if defined(__amd64) printf("cr8: %lx\n", getcr8()); #endif -#endif printf("\n"); dumpregs(rp); @@ -1708,7 +1653,6 @@ showregs(uint_t type, struct regs *rp, caddr_t addr) static void dumpregs(struct regs *rp) { -#if defined(__amd64) const char fmt[] = "\t%3s: %16lx %3s: %16lx %3s: %16lx\n"; printf(fmt, "rdi", rp->r_rdi, "rsi", rp->r_rsi, "rdx", rp->r_rdx); @@ -1726,21 +1670,6 @@ dumpregs(struct regs *rp) printf("\t%3s: %16lx\n", " ss", rp->r_ss); -#elif defined(__i386) - const char fmt[] = "\t%3s: %8lx %3s: %8lx %3s: %8lx %3s: %8lx\n"; - - printf(fmt, " gs", rp->r_gs, " fs", rp->r_fs, - " es", rp->r_es, " ds", rp->r_ds); - printf(fmt, "edi", rp->r_edi, "esi", rp->r_esi, - "ebp", rp->r_ebp, "esp", rp->r_esp); - printf(fmt, "ebx", rp->r_ebx, "edx", rp->r_edx, - "ecx", rp->r_ecx, "eax", rp->r_eax); - printf(fmt, "trp", rp->r_trapno, "err", rp->r_err, - "eip", rp->r_eip, " cs", rp->r_cs); - printf("\t%3s: %8lx %3s: %8lx %3s: %8lx\n", - "efl", rp->r_efl, "usp", rp->r_uesp, " ss", rp->r_ss); - -#endif /* __i386 */ } /* @@ -1760,44 +1689,13 @@ instr_is_iret(caddr_t pc) #else -#if defined(__amd64) static const uint8_t iret_insn[2] = { 0x48, 0xcf }; /* iretq */ -#elif defined(__i386) - static const uint8_t iret_insn[1] = { 0xcf }; /* iret */ -#endif /* __i386 */ return (bcmp(pc, iret_insn, sizeof (iret_insn)) == 0); #endif /* __xpv */ } -#if defined(__i386) - -/* - * Test to see if the instruction is part of __SEGREGS_POP - * - * Note carefully the appallingly awful dependency between - * the instruction sequence used in __SEGREGS_POP and these - * instructions encoded here. - */ -static int -instr_is_segregs_pop(caddr_t pc) -{ - static const uint8_t movw_0_esp_gs[4] = { 0x8e, 0x6c, 0x24, 0x0 }; - static const uint8_t movw_4_esp_fs[4] = { 0x8e, 0x64, 0x24, 0x4 }; - static const uint8_t movw_8_esp_es[4] = { 0x8e, 0x44, 0x24, 0x8 }; - static const uint8_t movw_c_esp_ds[4] = { 0x8e, 0x5c, 0x24, 0xc }; - - if (bcmp(pc, movw_0_esp_gs, sizeof (movw_0_esp_gs)) == 0 || - bcmp(pc, movw_4_esp_fs, sizeof (movw_4_esp_fs)) == 0 || - bcmp(pc, movw_8_esp_es, sizeof (movw_8_esp_es)) == 0 || - bcmp(pc, movw_c_esp_ds, sizeof (movw_c_esp_ds)) == 0) - return (1); - - return (0); -} - -#endif /* __i386 */ /* * Test to see if the instruction is part of _sys_rtt (or the KPTI trampolines @@ -1916,7 +1814,6 @@ kern_gpfault(struct regs *rp) } -#if defined(__amd64) if (trp == NULL && PCB_NEED_UPDATE_SEGS(&lwp->lwp_pcb)) { /* @@ -1935,13 +1832,6 @@ kern_gpfault(struct regs *rp) ASSERT((caddr_t)trp == (caddr_t)rp->r_sp); } -#elif defined(__i386) - - if (trp == NULL && instr_is_segregs_pop(pc)) - trp = lwptoregs(lwp); - -#endif /* __i386 */ - if (trp == NULL) return (1); @@ -1991,7 +1881,6 @@ kern_gpfault(struct regs *rp) */ #if !defined(__xpv) -#if defined(__amd64) static void dump_tss(void) @@ -2012,32 +1901,6 @@ dump_tss(void) printf(tss_fmt, "tss_ist7", (void *)tss->tss_ist7); } -#elif defined(__i386) - -static void -dump_tss(void) -{ - const char tss_fmt[] = "tss.%s:\t0x%p\n"; /* Format string */ - tss_t *tss = CPU->cpu_tss; - - printf(tss_fmt, "tss_link", (void *)(uintptr_t)tss->tss_link); - printf(tss_fmt, "tss_esp0", (void *)(uintptr_t)tss->tss_esp0); - printf(tss_fmt, "tss_ss0", (void *)(uintptr_t)tss->tss_ss0); - printf(tss_fmt, "tss_esp1", (void *)(uintptr_t)tss->tss_esp1); - printf(tss_fmt, "tss_ss1", (void *)(uintptr_t)tss->tss_ss1); - printf(tss_fmt, "tss_esp2", (void *)(uintptr_t)tss->tss_esp2); - printf(tss_fmt, "tss_ss2", (void *)(uintptr_t)tss->tss_ss2); - printf(tss_fmt, "tss_cr3", (void *)(uintptr_t)tss->tss_cr3); - printf(tss_fmt, "tss_eip", (void *)(uintptr_t)tss->tss_eip); - printf(tss_fmt, "tss_eflags", (void *)(uintptr_t)tss->tss_eflags); - printf(tss_fmt, "tss_eax", (void *)(uintptr_t)tss->tss_eax); - printf(tss_fmt, "tss_ebx", (void *)(uintptr_t)tss->tss_ebx); - printf(tss_fmt, "tss_ecx", (void *)(uintptr_t)tss->tss_ecx); - printf(tss_fmt, "tss_edx", (void *)(uintptr_t)tss->tss_edx); - printf(tss_fmt, "tss_esp", (void *)(uintptr_t)tss->tss_esp); -} - -#endif /* __amd64 */ #endif /* !__xpv */ #if defined(TRAPTRACE) @@ -2056,19 +1919,11 @@ dump_ttrace(void) uintptr_t current; int i, j, k; int n = NCPU; -#if defined(__amd64) const char banner[] = "CPU ADDRESS TIMESTAMP TYPE VC HANDLER PC\n"; /* Define format for the CPU, ADDRESS, and TIMESTAMP fields */ const char fmt1[] = "%3d %016lx %12llx"; char data1[34]; /* length of string formatted by fmt1 + 1 */ -#elif defined(__i386) - const char banner[] = - "CPU ADDRESS TIMESTAMP TYPE VC HANDLER PC\n"; - /* Define format for the CPU, ADDRESS, and TIMESTAMP fields */ - const char fmt1[] = "%3d %08lx %12llx"; - char data1[26]; /* length of string formatted by fmt1 + 1 */ -#endif /* Define format for the TYPE and VC fields */ const char fmt2[] = "%4s %3x"; const char fmt2s[] = "%4s %3s"; diff --git a/usr/src/uts/i86pc/os/xpv_platform.c b/usr/src/uts/i86pc/os/xpv_platform.c index 14bdb1ab44..6bdcffcfc9 100644 --- a/usr/src/uts/i86pc/os/xpv_platform.c +++ b/usr/src/uts/i86pc/os/xpv_platform.c @@ -194,9 +194,7 @@ xen_hvm_init(void) if (xen_bits < 0) return; -#ifdef __amd64 ASSERT(xen_bits == 64); -#endif /* * Allocate space for the shared_info page and tell Xen where it diff --git a/usr/src/uts/i86pc/sys/apic_common.h b/usr/src/uts/i86pc/sys/apic_common.h index 440f817beb..c7332391ef 100644 --- a/usr/src/uts/i86pc/sys/apic_common.h +++ b/usr/src/uts/i86pc/sys/apic_common.h @@ -71,8 +71,6 @@ extern int apic_oneshot_enable; /* Now the ones for Dynamic Interrupt distribution */ extern int apic_enable_dynamic_migration; -extern int apic_have_32bit_cr8; - extern struct psm_ops *psmops; /* diff --git a/usr/src/uts/i86pc/sys/apix.h b/usr/src/uts/i86pc/sys/apix.h index f3b775086f..a1e9c80f3e 100644 --- a/usr/src/uts/i86pc/sys/apix.h +++ b/usr/src/uts/i86pc/sys/apix.h @@ -76,11 +76,11 @@ enum { /* * Number of interrupt vectors reserved by software on each LOCAL APIC: - * 1. Dtrace + * 1. Dtrace * 2. int80 * 3. system-call * 4. fast-trap - * 5. apix-reserved + * 5. apix-reserved */ #define APIX_SW_RESERVED_VECTORS 5 @@ -246,11 +246,6 @@ extern int apic_handle_pci_pci_bridge(dev_info_t *idip, int child_devno, extern void apic_record_rdt_entry(apic_irq_t *irqptr, int irq); /* - * From apic_regops.c - */ -extern int apic_have_32bit_cr8; - -/* * apix_intr.c */ extern void apix_do_interrupt(struct regs *rp, trap_trace_rec_t *ttp); diff --git a/usr/src/uts/i86pc/vm/hat_i86.c b/usr/src/uts/i86pc/vm/hat_i86.c index 6f296841ea..6f681cb196 100644 --- a/usr/src/uts/i86pc/vm/hat_i86.c +++ b/usr/src/uts/i86pc/vm/hat_i86.c @@ -392,9 +392,9 @@ extern pfn_t memseg_get_start(struct memseg *); #define PP_SETRO(pp) PP_SETRM(pp, P_RO) #define PP_CLRRM(pp, rm) atomic_andb(&(pp->p_nrm), ~(rm)) -#define PP_CLRMOD(pp) PP_CLRRM(pp, P_MOD) -#define PP_CLRREF(pp) PP_CLRRM(pp, P_REF) -#define PP_CLRRO(pp) PP_CLRRM(pp, P_RO) +#define PP_CLRMOD(pp) PP_CLRRM(pp, P_MOD) +#define PP_CLRREF(pp) PP_CLRRM(pp, P_REF) +#define PP_CLRRO(pp) PP_CLRRM(pp, P_RO) #define PP_CLRALL(pp) PP_CLRRM(pp, P_MOD | P_REF | P_RO) /* @@ -547,10 +547,8 @@ hat_alloc(struct as *as) ht = htable_create(hat, (uintptr_t)0, TOP_LEVEL(hat), NULL); hat->hat_htable = ht; -#if defined(__amd64) if (hat->hat_flags & HAT_COPIED) goto init_done; -#endif for (r = 0; r < num_kernel_ranges; ++r) { rp = &kernel_ranges[r]; @@ -572,14 +570,6 @@ hat_alloc(struct as *as) cnt = htable_va2entry(rp->hkr_end_va, ht) - start; -#if defined(__i386) && !defined(__xpv) - if (ht->ht_flags & HTABLE_COPIED) { - bcopy(&pcp_page[start], - &hat->hat_copied_ptes[start], - cnt * sizeof (x86pte_t)); - continue; - } -#endif src = htable_lookup(kas.a_hat, va, rp->hkr_level); ASSERT(src != NULL); x86pte_copy(src, ht, start, cnt); @@ -594,10 +584,8 @@ init_done: * Pin top level page tables after initializing them */ xen_pin(hat->hat_htable->ht_pfn, mmu.max_level); -#if defined(__amd64) xen_pin(hat->hat_user_ptable, mmu.max_level); #endif -#endif XPV_ALLOW_MIGRATE(); hat_list_append(hat); @@ -706,10 +694,8 @@ hat_free_end(hat_t *hat) */ VERIFY3U(hat->hat_flags & HAT_PCP, ==, 0); xen_unpin(hat->hat_htable->ht_pfn); -#if defined(__amd64) xen_unpin(hat->hat_user_ptable); #endif -#endif /* * Make a pass through the htables freeing them all up. @@ -720,15 +706,11 @@ hat_free_end(hat_t *hat) * Decide which kmem cache the hash table came from, then free it. */ if (hat->hat_flags & HAT_COPIED) { -#if defined(__amd64) if (hat->hat_flags & HAT_COPIED_32) { cache = hat32_hash_cache; } else { cache = hat_hash_cache; } -#else - cache = hat32_hash_cache; -#endif } else { cache = hat_hash_cache; } @@ -750,9 +732,6 @@ hat_free_end(hat_t *hat) uintptr_t hat_kernelbase(uintptr_t va) { -#if defined(__i386) - va &= LEVEL_MASK(1); -#endif if (IN_VA_HOLE(va)) panic("_userlimit %p will fall in VA hole\n", (void *)va); return (va); @@ -908,7 +887,6 @@ mmu_init(void) if (!is_x86_feature(x86_featureset, X86FSET_CX8)) panic("Processor does not support cmpxchg8b instruction"); -#if defined(__amd64) mmu.num_level = 4; mmu.max_level = 3; @@ -925,29 +903,6 @@ mmu_init(void) mmu.level_shift[2] = 30; mmu.level_shift[3] = 39; -#elif defined(__i386) - - if (mmu.pae_hat) { - mmu.num_level = 3; - mmu.max_level = 2; - mmu.ptes_per_table = 512; - mmu.top_level_count = 4; - - mmu.level_shift[0] = 12; - mmu.level_shift[1] = 21; - mmu.level_shift[2] = 30; - - } else { - mmu.num_level = 2; - mmu.max_level = 1; - mmu.ptes_per_table = 1024; - mmu.top_level_count = 1024; - - mmu.level_shift[0] = 12; - mmu.level_shift[1] = 22; - } - -#endif /* __i386 */ for (i = 0; i < mmu.num_level; ++i) { mmu.level_size[i] = 1UL << mmu.level_shift[i]; @@ -978,10 +933,6 @@ mmu_init(void) for (i = 1; i < mmu.num_level; ++i) mmu.ptp_bits[i] = PT_PTPBITS; -#if defined(__i386) - mmu.ptp_bits[2] = PT_VALID; -#endif - /* * Compute how many hash table entries to have per process for htables. * We start with 1 page's worth of entries. @@ -994,7 +945,6 @@ mmu_init(void) mmu.hash_cnt >>= 1; mmu.hat32_hash_cnt = mmu.hash_cnt; -#if defined(__amd64) /* * If running in 64 bits and physical memory is large, * increase the size of the cache to cover all of memory for @@ -1003,7 +953,6 @@ mmu_init(void) #define HASH_MAX_LENGTH 4 while (mmu.hash_cnt * HASH_MAX_LENGTH < max_htables) mmu.hash_cnt <<= 1; -#endif } @@ -1013,17 +962,6 @@ mmu_init(void) void hat_init() { -#if defined(__i386) - /* - * _userlimit must be aligned correctly - */ - if ((_userlimit & LEVEL_MASK(1)) != _userlimit) { - prom_printf("hat_init(): _userlimit=%p, not aligned at %p\n", - (void *)_userlimit, (void *)LEVEL_SIZE(1)); - halt("hat_init(): Unable to continue"); - } -#endif - cv_init(&hat_list_cv, NULL, CV_DEFAULT, NULL); /* @@ -1303,30 +1241,12 @@ hat_init_finish(void) * User HATs are initialized with copies of all kernel mappings in * higher level page tables. Ensure that those entries exist. */ -#if defined(__amd64) NEXT_HKR(r, 3, kernelbase, 0); #if defined(__xpv) NEXT_HKR(r, 3, HYPERVISOR_VIRT_START, HYPERVISOR_VIRT_END); #endif -#elif defined(__i386) - -#if !defined(__xpv) - if (mmu.pae_hat) { - va = kernelbase; - if ((va & LEVEL_MASK(2)) != va) { - va = P2ROUNDUP(va, LEVEL_SIZE(2)); - NEXT_HKR(r, 1, kernelbase, va); - } - if (va != 0) - NEXT_HKR(r, 2, va, 0); - } else -#endif /* __xpv */ - NEXT_HKR(r, 1, kernelbase, 0); - -#endif /* __i386 */ - num_kernel_ranges = r; /* @@ -1382,11 +1302,7 @@ hat_init_finish(void) * for 32 bit we map from segmap_start .. ekernelheap * for 64 bit we map from segmap_start .. segmap_start + segmapsize; */ -#if defined(__i386) - size = (uintptr_t)ekernelheap - segmap_start; -#elif defined(__amd64) size = segmapsize; -#endif hat_kmap_init((uintptr_t)segmap_start, size); #if !defined(__xpv) @@ -1397,38 +1313,6 @@ hat_init_finish(void) } /* - * On 32 bit PAE mode, PTE's are 64 bits, but ordinary atomic memory references - * are 32 bit, so for safety we must use atomic_cas_64() to install these. - */ -#ifdef __i386 -static void -reload_pae32(hat_t *hat, cpu_t *cpu) -{ - x86pte_t *src; - x86pte_t *dest; - x86pte_t pte; - int i; - - /* - * Load the 4 entries of the level 2 page table into this - * cpu's range of the pcp_page and point cr3 at them. - */ - ASSERT(mmu.pae_hat); - src = hat->hat_copied_ptes; - dest = pcp_page + (cpu->cpu_id + 1) * MAX_COPIED_PTES; - for (i = 0; i < MAX_COPIED_PTES; ++i) { - for (;;) { - pte = dest[i]; - if (pte == src[i]) - break; - if (atomic_cas_64(dest + i, pte, src[i]) != src[i]) - break; - } - } -} -#endif - -/* * Update the PCP data on the CPU cpu to the one on the hat. If this is a 32-bit * process, then we must update the L2 pages and then the L3. If this is a * 64-bit process then we must update the L3 entries. @@ -1974,12 +1858,10 @@ hati_pte_map( } else { ASSERT(flags & HAT_LOAD_NOCONSIST); } -#if defined(__amd64) if (ht->ht_flags & HTABLE_COPIED) { cpu_t *cpu = CPU; hat_pcp_update(cpu, hat); } -#endif HTABLE_INC(ht->ht_valid_cnt); PGCNT_INC(hat, l); return (rv); @@ -2158,9 +2040,9 @@ hat_kmap_load( * * Flags for hat_memload/hat_devload/hat_*attr. * - * HAT_LOAD Default flags to load a translation to the page. + * HAT_LOAD Default flags to load a translation to the page. * - * HAT_LOAD_LOCK Lock down mapping resources; hat_map(), hat_memload(), + * HAT_LOAD_LOCK Lock down mapping resources; hat_map(), hat_memload(), * and hat_devload(). * * HAT_LOAD_NOCONSIST Do not add mapping to page_t mapping list. @@ -2565,11 +2447,7 @@ hati_demap_func(xc_arg_t a1, xc_arg_t a2, xc_arg_t a3) * PTEs. */ if (hat->hat_flags & HAT_COPIED) { -#if defined(__amd64) hat_pcp_update(CPU, hat); -#elif defined(__i386) - reload_pae32(hat, CPU); -#endif } mmu_flush_tlb(FLUSH_TLB_NONGLOBAL, NULL); @@ -3998,14 +3876,12 @@ hati_pageunload(struct page *pp, uint_t pg_szcd, uint_t forceflag) ++curthread->t_hatdepth; ASSERT(curthread->t_hatdepth < 16); -#if defined(__amd64) /* * clear the vpm ref. */ if (vpm_enable) { pp->p_vpmref = 0; } -#endif /* * The loop with next_size handles pages with multiple pagesize mappings */ @@ -4360,11 +4236,9 @@ hat_page_getshare(page_t *pp) { uint_t cnt; cnt = hment_mapcnt(pp); -#if defined(__amd64) if (vpm_enable && pp->p_vpmref) { cnt += 1; } -#endif return (cnt); } @@ -4600,7 +4474,7 @@ hat_mempte_remap( /* * Hat locking functions * XXX - these two functions are currently being used by hatstats - * they can be removed by using a per-as mutex for hatstats. + * they can be removed by using a per-as mutex for hatstats. */ void hat_enter(hat_t *hat) diff --git a/usr/src/uts/i86pc/vm/hat_kdi.c b/usr/src/uts/i86pc/vm/hat_kdi.c index ae0571e645..2bd38dac16 100644 --- a/usr/src/uts/i86pc/vm/hat_kdi.c +++ b/usr/src/uts/i86pc/vm/hat_kdi.c @@ -320,7 +320,6 @@ kdi_flush_caches(void) size_t kdi_range_is_nontoxic(uintptr_t va, size_t sz, int write) { -#if defined(__amd64) extern uintptr_t toxic_addr; extern size_t toxic_size; @@ -339,18 +338,4 @@ kdi_range_is_nontoxic(uintptr_t va, size_t sz, int write) return (va < hole_start ? hole_start - va : 0); return (sz); - -#elif defined(__i386) - extern void *device_arena_contains(void *, size_t, size_t *); - uintptr_t v; - - v = (uintptr_t)device_arena_contains((void *)va, sz, NULL); - if (v == 0) - return (sz); - else if (v <= va) - return (0); - else - return (v - va); - -#endif /* __i386 */ } diff --git a/usr/src/uts/i86pc/vm/hment.c b/usr/src/uts/i86pc/vm/hment.c index d00d756828..bb18b5c462 100644 --- a/usr/src/uts/i86pc/vm/hment.c +++ b/usr/src/uts/i86pc/vm/hment.c @@ -23,8 +23,6 @@ * Use is subject to license terms. */ -#pragma ident "%Z%%M% %I% %E% SMI" - #include <sys/types.h> #include <sys/sysmacros.h> #include <sys/kmem.h> @@ -53,9 +51,7 @@ struct hment { pfn_t hm_pfn; /* mapping page frame number */ uint16_t hm_entry; /* index of pte in htable */ uint16_t hm_pad; /* explicitly expose compiler padding */ -#ifdef __amd64 uint32_t hm_pad2; /* explicitly expose compiler padding */ -#endif }; /* @@ -92,7 +88,7 @@ static avl_tree_t *hment_table; * adding the pfn of the page table into both the high bits. * The shift by 9 corresponds to the range of values for entry (0..511). */ -#define HMENT_HASH(pfn, entry) (uint32_t) \ +#define HMENT_HASH(pfn, entry) (uint32_t) \ ((((pfn) << 9) + entry + pfn) & (hment_hash_entries - 1)) /* diff --git a/usr/src/uts/i86pc/vm/htable.c b/usr/src/uts/i86pc/vm/htable.c index b201d8cfc4..d25a294a58 100644 --- a/usr/src/uts/i86pc/vm/htable.c +++ b/usr/src/uts/i86pc/vm/htable.c @@ -671,7 +671,7 @@ htable_steal(uint_t cnt, boolean_t reap) if (ht->ht_hat == NULL) continue; ASSERT(ht->ht_hat == hat); -#if defined(__xpv) && defined(__amd64) +#if defined(__xpv) ASSERT(!(ht->ht_flags & HTABLE_COPIED)); if (ht->ht_level == mmu.max_level) { ptable_free(hat->hat_user_ptable); @@ -870,7 +870,7 @@ htable_alloc( if (is_bare) { ptable_free(ht->ht_pfn); ht->ht_pfn = PFN_INVALID; -#if defined(__xpv) && defined(__amd64) +#if defined(__xpv) /* * make stolen page table writable again in kpm */ @@ -891,7 +891,7 @@ htable_alloc( if (ht == NULL) panic("htable_alloc(): couldn't steal\n"); -#if defined(__amd64) && defined(__xpv) +#if defined(__xpv) /* * Under the 64-bit hypervisor, we have 2 top level page tables. * If this allocation fails, we'll resort to stealing. @@ -960,7 +960,7 @@ htable_alloc( if (need_to_zero) x86pte_zero(ht, 0, mmu.ptes_per_table); -#if defined(__amd64) && defined(__xpv) +#if defined(__xpv) if (!is_bare && kpm_vbase) { (void) xen_kpm_page(ht->ht_pfn, PT_VALID); if (level == mmu.max_level) @@ -1006,7 +1006,7 @@ htable_free(htable_t *ht) ASSERT(ht->ht_pfn != PFN_INVALID); } else if (!(ht->ht_flags & HTABLE_COPIED)) { ptable_free(ht->ht_pfn); -#if defined(__amd64) && defined(__xpv) +#if defined(__xpv) if (ht->ht_level == mmu.max_level && hat != NULL) { ptable_free(hat->hat_user_ptable); hat->hat_user_ptable = PFN_INVALID; @@ -1158,12 +1158,7 @@ link_ptp(htable_t *higher, htable_t *new, uintptr_t vaddr) * * We also need to do this for the kernel hat on PAE 32 bit kernel. */ - if ( -#ifdef __i386 - (higher->ht_hat == kas.a_hat && - higher->ht_level == higher->ht_hat->hat_max_level) || -#endif - (higher->ht_flags & HTABLE_COPIED)) + if ((higher->ht_flags & HTABLE_COPIED) != 0) hat_tlb_inval(higher->ht_hat, DEMAP_ALL_ADDR); } @@ -1297,7 +1292,6 @@ htable_lookup(hat_t *hat, uintptr_t vaddr, level_t level) ASSERT(level <= TOP_LEVEL(hat)); if (level == TOP_LEVEL(hat)) { -#if defined(__amd64) /* * 32 bit address spaces on 64 bit kernels need to check * for overflow of the 32 bit address space @@ -1305,7 +1299,6 @@ htable_lookup(hat_t *hat, uintptr_t vaddr, level_t level) if ((hat->hat_flags & HAT_COPIED_32) && vaddr >= ((uint64_t)1 << 32)) return (NULL); -#endif base = 0; } else { base = vaddr & LEVEL_MASK(level + 1); @@ -1550,16 +1543,12 @@ htable_attach( if (offset > kernelbase) offset -= kernelbase; offset <<= MMU_PAGESHIFT; -#if defined(__amd64) offset += mmu.hole_start; /* something in VA hole */ -#else - offset += 1ULL << 40; /* something > 4 Gig */ -#endif ASSERT(page_exists(&kvp, offset) == NULL); (void) page_hashin(pp, &kvp, offset, NULL); } page_downgrade(pp); -#if defined(__xpv) && defined(__amd64) +#if defined(__xpv) /* * Record in the page_t that is a pagetable for segkpm setup. */ @@ -1655,13 +1644,11 @@ htable_scan(htable_t *ht, uintptr_t *vap, uintptr_t eaddr) found_pte = GET_PTE((x86pte_t *)pte_ptr); x86pte_release_pagetable(ht); -#if defined(__amd64) /* * deal with VA hole on amd64 */ if (l == mmu.max_level && va >= mmu.hole_start && va <= mmu.hole_end) va = mmu.hole_end + va - mmu.hole_start; -#endif /* __amd64 */ *vap = va; return (found_pte); @@ -1843,11 +1830,7 @@ htable_init() * To save on kernel VA usage, we avoid debug information in 32 bit * kernels. */ -#if defined(__amd64) int kmem_flags = KMC_NOHASH; -#elif defined(__i386) - int kmem_flags = KMC_NOHASH | KMC_NODEBUG; -#endif /* * initialize kmem caches @@ -1886,10 +1869,8 @@ htable_e2va(htable_t *ht, uint_t entry) /* * Need to skip over any VA hole in top level table */ -#if defined(__amd64) if (ht->ht_level == mmu.max_level && va >= mmu.hole_start) va += ((mmu.hole_end - mmu.hole_start) + 1); -#endif return (va); } @@ -1923,26 +1904,6 @@ x86pte_cpu_fini(cpu_t *cpu) cpu->cpu_hat_info = NULL; } -#ifdef __i386 -/* - * On 32 bit kernels, loading a 64 bit PTE is a little tricky - */ -x86pte_t -get_pte64(x86pte_t *ptr) -{ - volatile uint32_t *p = (uint32_t *)ptr; - x86pte_t t; - - ASSERT(mmu.pae_hat != 0); - for (;;) { - t = p[0]; - t |= (uint64_t)p[1] << 32; - if ((t & 0xffffffff) == p[0]) - return (t); - } -} -#endif /* __i386 */ - /* * Disable preemption and establish a mapping to the pagetable with the * given pfn. This is optimized for there case where it's the same @@ -2205,7 +2166,6 @@ x86pte_cas(htable_t *ht, uint_t entry, x86pte_t old, x86pte_t new) t[0].ptr = ma | MMU_NORMAL_PT_UPDATE; t[0].val = new; -#if defined(__amd64) /* * On the 64-bit hypervisor we need to maintain the user mode * top page table too. @@ -2217,7 +2177,6 @@ x86pte_cas(htable_t *ht, uint_t entry, x86pte_t old, x86pte_t new) t[1].val = new; ++cnt; } -#endif /* __amd64 */ if (HYPERVISOR_mmu_update(t, cnt, &count, DOMID_SELF)) panic("HYPERVISOR_mmu_update() failed"); @@ -2430,13 +2389,11 @@ x86pte_copy(htable_t *src, htable_t *dest, uint_t entry, uint_t count) if (pte != 0) { set_pteval(pfn_to_pa(dest->ht_pfn), entry, dest->ht_level, pte); -#ifdef __amd64 if (dest->ht_level == mmu.max_level && htable_e2va(dest, entry) < HYPERVISOR_VIRT_END) set_pteval( pfn_to_pa(dest->ht_hat->hat_user_ptable), entry, dest->ht_level, pte); -#endif } --count; ++entry; @@ -2484,12 +2441,7 @@ x86pte_zero(htable_t *dest, uint_t entry, uint_t count) size = count << mmu.pte_size_shift; ASSERT(size > BLOCKZEROALIGN); -#ifdef __i386 - if (!is_x86_feature(x86_featureset, X86FSET_SSE2)) - bzero(dst_va, size); - else -#endif - block_zero_no_xmm(dst_va, size); + block_zero_no_xmm(dst_va, size); #ifdef __xpv if (kpm_vbase == NULL) { diff --git a/usr/src/uts/i86pc/vm/kboot_mmu.c b/usr/src/uts/i86pc/vm/kboot_mmu.c index 76193b3d86..6ff8d5c810 100644 --- a/usr/src/uts/i86pc/vm/kboot_mmu.c +++ b/usr/src/uts/i86pc/vm/kboot_mmu.c @@ -101,11 +101,7 @@ kbm_init(struct xboot_info *bi) ptes_per_table = 512; pte_size = 8; lpagesize = TWO_MEG; -#ifdef __amd64 top_level = 3; -#else - top_level = 2; -#endif } else { shift_amt = shift_amt_nopae; ptes_per_table = 1024; @@ -268,7 +264,7 @@ restart_new_va: probe_va = mmu.hole_end; if (IN_HYPERVISOR_VA(probe_va)) -#if defined(__amd64) && defined(__xpv) +#if defined(__xpv) probe_va = HYPERVISOR_VIRT_END; #else return (0); diff --git a/usr/src/uts/i86pc/vm/vm_machdep.c b/usr/src/uts/i86pc/vm/vm_machdep.c index fe8b806e82..6bca3d2540 100644 --- a/usr/src/uts/i86pc/vm/vm_machdep.c +++ b/usr/src/uts/i86pc/vm/vm_machdep.c @@ -775,7 +775,6 @@ map_addr_proc( ASSERT32(userlimit == as->a_userlimit); base = p->p_brkbase; -#if defined(__amd64) if (p->p_model == DATAMODEL_NATIVE) { if (userlimit < as->a_userlimit) { /* @@ -811,9 +810,9 @@ map_addr_proc( slen = p->p_usrstack - base - ((p->p_stk_ctl + PAGEOFFSET) & PAGEMASK); } - } else -#endif /* defined(__amd64) */ + } else { slen = userlimit - base; + } /* Make len be a multiple of PAGESIZE */ len = (len + PAGEOFFSET) & PAGEMASK; @@ -943,7 +942,6 @@ valid_va_range_aligned(caddr_t *basep, size_t *lenp, size_t minlen, int dir, return (0); } -#if defined(__amd64) /* * Deal with a possible hole in the address range between * hole_start and hole_end that should never be mapped. @@ -984,7 +982,6 @@ valid_va_range_aligned(caddr_t *basep, size_t *lenp, size_t minlen, int dir, if (lo < hole_end) lo = hole_end; } -#endif if (hi - lo < tot_len) return (0); @@ -1043,13 +1040,11 @@ valid_usr_range(caddr_t addr, size_t len, uint_t prot, struct as *as, secflag_enabled(as->a_proc, PROC_SEC_FORBIDNULLMAP)) return (RANGE_BADADDR); -#if defined(__amd64) /* * Check for the VA hole */ if (eaddr > (caddr_t)hole_start && addr < (caddr_t)hole_end) return (RANGE_BADADDR); -#endif return (RANGE_OKAY); } @@ -1577,31 +1572,6 @@ mtype_init(vnode_t *vp, caddr_t vaddr, uint_t *flags, size_t pgsz) int mtype = mtypetop; #if !defined(__xpv) -#if defined(__i386) - /* - * set the mtype range - * - kmem requests need to be below 4g if restricted_kmemalloc is set. - * - for non kmem requests, set range to above 4g if memory below 4g - * runs low. - */ - if (restricted_kmemalloc && VN_ISKAS(vp) && - (caddr_t)(vaddr) >= kernelheap && - (caddr_t)(vaddr) < ekernelheap) { - ASSERT(physmax4g); - mtype = mtype4g; - if (RESTRICT16M_ALLOC(freemem4g - btop(pgsz), - btop(pgsz), *flags)) { - *flags |= PGI_MT_RANGE16M; - } else { - VM_STAT_ADD(vmm_vmstats.unrestrict16mcnt); - VM_STAT_COND_ADD((*flags & PG_PANIC), - vmm_vmstats.pgpanicalloc); - *flags |= PGI_MT_RANGE0; - } - return (mtype); - } -#endif /* __i386 */ - if (RESTRICT4G_ALLOC) { VM_STAT_ADD(vmm_vmstats.restrict4gcnt); /* here only for > 4g systems */ @@ -1826,10 +1796,6 @@ page_coloring_init(uint_t l2_sz, int l2_linesz, int l2_assoc) i = memrange_num(plat_dr_physmax); else i = memrange_num(physmax); -#if defined(__i386) - if (i > MRI_4G) - restricted_kmemalloc = 0; -#endif /* physmax greater than 4g */ if (i == MRI_4G) physmax4g = 1; @@ -4082,11 +4048,7 @@ page_get_physical(uintptr_t seed) if (offset > kernelbase) offset -= kernelbase; offset <<= MMU_PAGESHIFT; -#if defined(__amd64) offset += mmu.hole_start; /* something in VA hole */ -#else - offset += 1ULL << 40; /* something > 4 Gig */ -#endif if (page_resv(1, KM_NOSLEEP) == 0) return (NULL); diff --git a/usr/src/uts/i86xpv/io/privcmd_hcall.c b/usr/src/uts/i86xpv/io/privcmd_hcall.c index 85ab0ed707..d8b122d311 100644 --- a/usr/src/uts/i86xpv/io/privcmd_hcall.c +++ b/usr/src/uts/i86xpv/io/privcmd_hcall.c @@ -291,11 +291,7 @@ privcmd_HYPERVISOR_domctl(xen_domctl_t *opp) } case XEN_DOMCTL_gethvmcontext: { -#if !defined(__GNUC__) && defined(__i386__) - if (op.u.hvmcontext.buffer.u.p != NULL) -#else if (op.u.hvmcontext.buffer.p != NULL) -#endif error = import_handle(&sub_ie, &op.u.hvmcontext.buffer, op.u.hvmcontext.size, IE_EXPORT); break; diff --git a/usr/src/uts/i86xpv/ml/hyperevent.s b/usr/src/uts/i86xpv/ml/hyperevent.s index 745ff57b96..3e25b32190 100644 --- a/usr/src/uts/i86xpv/ml/hyperevent.s +++ b/usr/src/uts/i86xpv/ml/hyperevent.s @@ -48,10 +48,10 @@ * * On amd64 the stack frame for events is exactly that of an hardware * interrupt with the addition of rcx and r11. - * + * * The stack frame for a failsafe callback is augmented with saved * values for segment registers: - * + * * amd64 * %rcx, %r11, %ds, %es, %fs, %gs, %rip, %cs, %rflags, * [, %oldrsp, %oldss ] @@ -65,8 +65,6 @@ * with a #gp fault. */ -#if defined(__amd64) - ENTRY(xen_failsafe_callback) /* @@ -128,54 +126,6 @@ jmp _sys_rtt SET_SIZE(xen_failsafe_callback) -#elif defined(__i386) - - ENTRY(xen_failsafe_callback) - - /* - * drop ds, es, fs and gs - */ - addl $_CONST(_MUL(4, CLONGSIZE)), %esp /* see comment for 64-bit */ - - pushl $0 /* dummy error (see comment for 64-bit) */ - pushl $T_GPFLT - - INTR_PUSH - INTGATE_INIT_KERNEL_FLAGS /* (set kernel flag values) */ - - /* - * The fact were here is because HYPERVISOR_IRET to userland - * failed due to a bad %cs value. Rewrite %cs, %ss and %eip - * on the stack so trap will know to handle this with - * kern_gpfault and kill the currently running process. - */ - movl $KCS_SEL, REGOFF_CS(%esp) - movl $KDS_SEL, REGOFF_SS(%esp) - leal nopop_sys_rtt_syscall, %edi - movl %edi, REGOFF_EIP(%esp) - - TRACE_PTR(%edi, %ebx, %ebx, %ecx, $TT_EVENT) /* Uses labels 8 and 9 */ - TRACE_REGS(%edi, %esp, %ebx, %ecx) /* Uses label 9 */ - TRACE_STAMP(%edi) /* Clobbers %eax, %edx, uses 9 */ - - movl %esp, %ebp - - TRACE_STACK(%edi) - - ENABLE_INTR_FLAGS - - pushl %gs:CPU_ID - pushl $0 - pushl %ebp - call trap /* trap(rp, addr, cpuid) handles all traps */ - addl $12, %esp - jmp _sys_rtt - SET_SIZE(xen_failsafe_callback) - -#endif /* __i386 */ - -#if defined(__amd64) - ENTRY(xen_callback) XPV_TRAP_POP @@ -201,32 +151,3 @@ /*NOTREACHED*/ SET_SIZE(xen_callback) - -#elif defined(__i386) - - ENTRY(xen_callback) - pushl $0 /* dummy error */ - pushl $T_AST - - INTR_PUSH - INTGATE_INIT_KERNEL_FLAGS /* (set kernel flag values) */ - - TRACE_PTR(%edi, %ebx, %ebx, %ecx, $TT_EVENT) /* Uses labels 8 and 9 */ - TRACE_REGS(%edi, %esp, %ebx, %ecx) /* Uses label 9 */ - TRACE_STAMP(%edi) /* Clobbers %eax, %edx, uses 9 */ - - movl %esp, %ebp - - TRACE_STACK(%edi) - - pushl %edi /* pass trap trace record pointer */ - pushl %ebp /* pass struct regs pointer */ - call xen_callback_handler - addl $8, %esp - - jmp _sys_rtt_ints_disabled - /*NOTREACHED*/ - - SET_SIZE(xen_callback) - -#endif /* __i386 */ diff --git a/usr/src/uts/i86xpv/ml/panic_asm.s b/usr/src/uts/i86xpv/ml/panic_asm.s index 4060eb739c..3e5ccecf67 100644 --- a/usr/src/uts/i86xpv/ml/panic_asm.s +++ b/usr/src/uts/i86xpv/ml/panic_asm.s @@ -37,7 +37,6 @@ #include "assym.h" -#if defined(__amd64) ENTRY_NP(xpv_panic_getcr3) movq %cr3, %rax ret @@ -143,106 +142,6 @@ iretq SET_SIZE(xpv_timer_trap) -#elif defined(__i386) - - ENTRY_NP(xpv_panic_setcr3) - movl 4(%esp), %eax - movl %eax, %cr3 - ret - SET_SIZE(xpv_panic_setcr3) - - ENTRY(xpv_panic_reload_cr3) - movl %cr3, %eax - movl %eax, %cr3 - ret - SET_SIZE(xpv_panic_reload_cr3) - - /* - * Stack on entry: - * +------------+ - * | EFLAGS | - * | CS | - * | EIP | - * | Error | - * | Trap | <---- %esp - * +------------+ - */ - ENTRY_NP(xpv_panic_prep) - pushl %ebp - movl %esp, %ebp - - subl $REGSIZE, %esp - movl %eax, REGOFF_EAX(%esp) - movl %ebx, REGOFF_EBX(%esp) - movl %esp, %eax - addl $REGSIZE, %eax - movl (%eax), %ebx - movl %ebx, REGOFF_EBP(%esp) - movl 4(%eax), %ebx - movl %ebx, REGOFF_TRAPNO(%esp) - movl 8(%eax), %ebx - movl %ebx, REGOFF_ERR(%esp) - movl 12(%eax), %ebx - movl %ebx, REGOFF_EIP(%esp) - movl 16(%eax), %ebx - movl %ebx, REGOFF_CS(%esp) - movl 20(%eax), %ebx - movl %ebx, REGOFF_EFL(%esp) - addl $28, %eax - movl %eax, REGOFF_ESP(%esp) - xorl %eax, %eax - movw %gs, %ax - mov %eax, REGOFF_GS(%esp) - movw %fs, %ax - mov %eax, REGOFF_FS(%esp) - movw %es, %ax - mov %eax, REGOFF_ES(%esp) - movw %ds, %ax - mov %eax, REGOFF_DS(%esp) - movw %ss, %ax - mov %eax, REGOFF_SS(%esp) - movl %ecx, REGOFF_ECX(%esp) - movl %edx, REGOFF_EDX(%esp) - movl %edi, REGOFF_EDI(%esp) - movl %esi, REGOFF_ESI(%esp) - pushl %esp - call xpv_die - SET_SIZE(xpv_panic_prep) - - /* - * Switch to the Solaris panic stack and jump into the Xen panic - * handling code. - */ - ENTRY_NP(xpv_panic_hdlr) - movl 4(%esp), %eax - lea panic_stack, %esp - add $PANICSTKSIZE, %esp - pushl %eax - call xpv_do_panic - SET_SIZE(xpv_panic_hdlr) - - ENTRY_NP(xpv_surprise_intr) - push %ebp - movl %esp, %ebp - pusha - call xpv_interrupt - popa - pop %ebp - iret - SET_SIZE(xpv_surprise_intr) - - ENTRY_NP(xpv_timer_trap) - push %ebp - movl %esp, %ebp - pusha - call xpv_timer_tick - popa - pop %ebp - iret - SET_SIZE(xpv_timer_trap) - -#endif /* __i386 */ - ENTRY_NP(xpv_panic_sti) sti ret @@ -264,7 +163,7 @@ push $0xbad0 push $0x0bad jmp xpv_panic_prep - SET_SIZE(xpv_invaltrap) + SET_SIZE(xpv_invaltrap) ENTRY_NP(xpv_div0trap) push $0 @@ -366,4 +265,3 @@ push $T_SIMDFPE jmp xpv_panic_prep SET_SIZE(xpv_xmtrap) - diff --git a/usr/src/uts/i86xpv/ml/xenguest.s b/usr/src/uts/i86xpv/ml/xenguest.s index 1aba3d1171..79cfac1599 100644 --- a/usr/src/uts/i86xpv/ml/xenguest.s +++ b/usr/src/uts/i86xpv/ml/xenguest.s @@ -48,7 +48,4 @@ NOTE("Xen", XEN_ELFNOTE_GUEST_OS, .string, "Solaris") NOTE("Xen", XEN_ELFNOTE_VIRT_BASE, .4byte, 0x40000000) NOTE("Xen", XEN_ELFNOTE_PADDR_OFFSET, .4byte, 0x40000000) -#if defined(__i386) - NOTE("Xen", XEN_ELFNOTE_PAE_MODE, .string, "yes,bimodal") -#endif diff --git a/usr/src/uts/i86xpv/os/mach_kdi.c b/usr/src/uts/i86xpv/os/mach_kdi.c index b12d30722d..09e3796fce 100644 --- a/usr/src/uts/i86xpv/os/mach_kdi.c +++ b/usr/src/uts/i86xpv/os/mach_kdi.c @@ -23,8 +23,6 @@ * Use is subject to license terms. */ -#pragma ident "%Z%%M% %I% %E% SMI" - /* * Kernel/Debugger Interface (KDI) routines. Called during debugger under * various system states (boot, while running, while the debugger has control). @@ -160,7 +158,6 @@ kdi_slave_wait(void) * Note that kmdb entry relies on the fake cpu_t having zero cpu_idt/cpu_id. */ -#if defined(__amd64) void * boot_kdi_tmpinit(void) @@ -207,56 +204,3 @@ boot_kdi_tmpfini(void *old) load_segment_registers(B64CODE_SEL, 0, KMDBGS_SEL, B32DATA_SEL); #endif } - -#elif defined(__i386) - -/* - * Sigh. We're called before we've initialized the kernels GDT, living - * off the hypervisor's default GDT. For kmdb's sake, we switch now to - * a GDT that looks like dboot's GDT; very shortly we'll initialize and - * switch to the kernel's GDT. - */ - -void * -boot_kdi_tmpinit(void) -{ - cpu_t *cpu = kobj_zalloc(sizeof (*cpu), KM_TMP); - user_desc_t *bgdt; - uint64_t gdtpa; - ulong_t ma[1]; - - cpu->cpu_self = cpu; - - /* - * (Note that we had better switch to a -new- GDT before - * we discard the KM_TMP mappings, or disaster will ensue.) - */ - bgdt = kobj_zalloc(PAGESIZE, KM_TMP); - - ASSERT(((uintptr_t)bgdt & PAGEOFFSET) == 0); - gdtpa = pfn_to_pa(va_to_pfn(bgdt)); - - init_boot_gdt(bgdt); - - set_usegd(&bgdt[GDT_BGSTMP], - cpu, sizeof (*cpu), SDT_MEMRWA, SEL_KPL, SDP_BYTES, SDP_OP32); - - ma[0] = (ulong_t)(pa_to_ma(gdtpa) >> PAGESHIFT); - kbm_read_only((uintptr_t)bgdt, gdtpa); - if (HYPERVISOR_set_gdt(ma, PAGESIZE / sizeof (user_desc_t))) - panic("boot_kdi_tmpinit:HYPERVISOR_set_gdt() failed"); - - load_segment_registers(B32CODE_SEL, B32DATA_SEL, B32DATA_SEL, 0, - KMDBGS_SEL, B32DATA_SEL); - return (0); -} - -/*ARGSUSED*/ -void -boot_kdi_tmpfini(void *old) -{ - load_segment_registers(B32CODE_SEL, B32DATA_SEL, B32DATA_SEL, 0, - 0, B32DATA_SEL); -} - -#endif /* __i386 */ diff --git a/usr/src/uts/i86xpv/os/mp_xen.c b/usr/src/uts/i86xpv/os/mp_xen.c index d430ad8735..b54c1c5610 100644 --- a/usr/src/uts/i86xpv/os/mp_xen.c +++ b/usr/src/uts/i86xpv/os/mp_xen.c @@ -232,11 +232,7 @@ mp_set_cpu_context(vcpu_guest_context_t *vgc, cpu_t *cp) * sse_initial into it anyway. */ -#if defined(__amd64) vgc->user_regs.cs = KCS_SEL | SEL_KPL; /* force to ring 3 */ -#else - vgc->user_regs.cs = KCS_SEL; -#endif vgc->user_regs.ds = KDS_SEL; vgc->user_regs.es = KDS_SEL; vgc->user_regs.ss = KDS_SEL; @@ -250,17 +246,9 @@ mp_set_cpu_context(vcpu_guest_context_t *vgc, cpu_t *cp) else iopl = 0; -#if defined(__amd64) vgc->user_regs.fs = 0; vgc->user_regs.gs = 0; vgc->user_regs.rflags = F_OFF | iopl; -#elif defined(__i386) - vgc->user_regs.fs = KFS_SEL; - vgc->user_regs.gs = KGS_SEL; - vgc->user_regs.eflags = F_OFF | iopl; - vgc->event_callback_cs = vgc->user_regs.cs; - vgc->failsafe_callback_cs = vgc->user_regs.cs; -#endif /* * Initialize the trap_info_t from the IDT @@ -295,14 +283,8 @@ mp_set_cpu_context(vcpu_guest_context_t *vgc, cpu_t *cp) vgc->ctrlreg[0] = CR0_ENABLE_FPU_FLAGS(getcr0()); -#if defined(__i386) - if (mmu.pae_hat) - vgc->ctrlreg[3] = - xen_pfn_to_cr3(pfn_to_mfn(kas.a_hat->hat_htable->ht_pfn)); - else -#endif - vgc->ctrlreg[3] = - pa_to_ma(mmu_ptob(kas.a_hat->hat_htable->ht_pfn)); + vgc->ctrlreg[3] = + pa_to_ma(mmu_ptob(kas.a_hat->hat_htable->ht_pfn)); vgc->ctrlreg[4] = getcr4(); @@ -310,7 +292,6 @@ mp_set_cpu_context(vcpu_guest_context_t *vgc, cpu_t *cp) vgc->failsafe_callback_eip = (uintptr_t)xen_failsafe_callback; vgc->flags |= VGCF_failsafe_disables_events; -#if defined(__amd64) /* * XXPV should this be moved to init_cpu_syscall? */ @@ -319,7 +300,6 @@ mp_set_cpu_context(vcpu_guest_context_t *vgc, cpu_t *cp) ASSERT(vgc->user_regs.gs == 0); vgc->gs_base_kernel = (uintptr_t)cp; -#endif return (xen_vcpu_initialize(cp->cpu_id, vgc)); } @@ -369,15 +349,9 @@ mach_cpucontext_alloc(struct cpu *cp) bzero(&vgc, sizeof (vgc)); -#ifdef __amd64 vgc.user_regs.rip = tp->t_pc; vgc.user_regs.rsp = tp->t_sp; vgc.user_regs.rbp = tp->t_sp - 2 * sizeof (greg_t); -#else - vgc.user_regs.eip = tp->t_pc; - vgc.user_regs.esp = tp->t_sp; - vgc.user_regs.ebp = tp->t_sp - 2 * sizeof (greg_t); -#endif /* * XXPV Fix resume, if Russ didn't already fix it. * @@ -449,7 +423,6 @@ mach_cpucontext_reset(cpu_t *cp) static void pcb_to_user_regs(label_t *pcb, vcpu_guest_context_t *vgc) { -#ifdef __amd64 vgc->user_regs.rip = pcb->val[REG_LABEL_PC]; vgc->user_regs.rsp = pcb->val[REG_LABEL_SP]; vgc->user_regs.rbp = pcb->val[REG_LABEL_BP]; @@ -458,14 +431,6 @@ pcb_to_user_regs(label_t *pcb, vcpu_guest_context_t *vgc) vgc->user_regs.r13 = pcb->val[REG_LABEL_R13]; vgc->user_regs.r14 = pcb->val[REG_LABEL_R14]; vgc->user_regs.r15 = pcb->val[REG_LABEL_R15]; -#else /* __amd64 */ - vgc->user_regs.eip = pcb->val[REG_LABEL_PC]; - vgc->user_regs.esp = pcb->val[REG_LABEL_SP]; - vgc->user_regs.ebp = pcb->val[REG_LABEL_BP]; - vgc->user_regs.ebx = pcb->val[REG_LABEL_EBX]; - vgc->user_regs.esi = pcb->val[REG_LABEL_ESI]; - vgc->user_regs.edi = pcb->val[REG_LABEL_EDI]; -#endif /* __amd64 */ } /* @@ -490,13 +455,8 @@ mach_cpucontext_restore(cpu_t *cp) * stack pointer to account for the pop of xIP that returning from * longjmp() normally would do, and set the return value in xAX to 1. */ -#ifdef __amd64 vgc.user_regs.rax = 1; vgc.user_regs.rsp += sizeof (ulong_t); -#else - vgc.user_regs.eax = 1; - vgc.user_regs.esp += sizeof (ulong_t); -#endif vgc.kernel_sp = cp->cpu_thread->t_sp; diff --git a/usr/src/uts/i86xpv/os/xen_machdep.c b/usr/src/uts/i86xpv/os/xen_machdep.c index 949ac0293d..fd81d6d0e8 100644 --- a/usr/src/uts/i86xpv/os/xen_machdep.c +++ b/usr/src/uts/i86xpv/os/xen_machdep.c @@ -234,7 +234,6 @@ xen_hypervisor_supports_solaris(xen_hypervisor_check_t check) static void xen_pte_workaround(void) { -#if defined(__amd64) extern int pt_kern; if (XENVER_CURRENT(xv_major) != 3) @@ -248,7 +247,6 @@ xen_pte_workaround(void) return; pt_kern = PT_USER; -#endif } void @@ -257,12 +255,7 @@ xen_set_callback(void (*func)(void), uint_t type, uint_t flags) struct callback_register cb; bzero(&cb, sizeof (cb)); -#if defined(__amd64) cb.address = (ulong_t)func; -#elif defined(__i386) - cb.address.cs = KCS_SEL; - cb.address.eip = (ulong_t)func; -#endif cb.type = type; cb.flags = flags; @@ -297,10 +290,8 @@ xen_init_callbacks(void) * system call handler * XXPV move to init_cpu_syscall? */ -#if defined(__amd64) xen_set_callback(sys_syscall, CALLBACKTYPE_syscall, CALLBACKF_mask_events); -#endif /* __amd64 */ } @@ -1043,7 +1034,6 @@ xen_set_trap_table(trap_info_t *table) return (err); } -#if defined(__amd64) void xen_set_segment_base(int reg, ulong_t value) { @@ -1058,7 +1048,6 @@ xen_set_segment_base(int reg, ulong_t value) reg, value, -(int)err); } } -#endif /* __amd64 */ /* * Translate a hypervisor errcode to a Solaris error code. @@ -1119,19 +1108,15 @@ int xen_gdt_setprot(cpu_t *cp, uint_t prot) { int err; -#if defined(__amd64) int pt_bits = PT_VALID; if (prot & PROT_WRITE) pt_bits |= PT_WRITABLE; -#endif if ((err = as_setprot(&kas, (caddr_t)cp->cpu_gdt, MMU_PAGESIZE, prot)) != 0) goto done; -#if defined(__amd64) err = xen_kpm_page(mmu_btop(cp->cpu_m.mcpu_gdtpa), pt_bits); -#endif done: if (err) { @@ -1148,17 +1133,14 @@ xen_ldt_setprot(user_desc_t *ldt, size_t lsize, uint_t prot) { int err; caddr_t lva = (caddr_t)ldt; -#if defined(__amd64) int pt_bits = PT_VALID; pgcnt_t npgs; if (prot & PROT_WRITE) pt_bits |= PT_WRITABLE; -#endif /* __amd64 */ if ((err = as_setprot(&kas, (caddr_t)ldt, lsize, prot)) != 0) goto done; -#if defined(__amd64) ASSERT(IS_P2ALIGNED(lsize, PAGESIZE)); npgs = mmu_btop(lsize); @@ -1168,7 +1150,6 @@ xen_ldt_setprot(user_desc_t *ldt, size_t lsize, uint_t prot) break; lva += PAGESIZE; } -#endif /* __amd64 */ done: if (err) { diff --git a/usr/src/uts/i86xpv/os/xpv_panic.c b/usr/src/uts/i86xpv/os/xpv_panic.c index 3778f526ef..27d1180d9a 100644 --- a/usr/src/uts/i86xpv/os/xpv_panic.c +++ b/usr/src/uts/i86xpv/os/xpv_panic.c @@ -52,11 +52,7 @@ #include <vm/hat_i86.h> /* XXX: need to add a PAE version too, if we ever support both PAE and non */ -#if defined(__i386) -#define XPV_FILENAME "/boot/xen-syms" -#else #define XPV_FILENAME "/boot/amd64/xen-syms" -#endif #define XPV_MODNAME "xpv" int xpv_panicking = 0; @@ -464,13 +460,11 @@ xpv_traceback(void *fpreg) return (showstack(fpreg, 1)); } -#if defined(__amd64) static void xpv_panic_hypercall(ulong_t call) { panic("Illegally issued hypercall %d during panic!\n", (int)call); } -#endif void xpv_die(struct regs *rp) @@ -557,11 +551,9 @@ switch_to_xpv_panic_idt() idtr.dtr_limit = sizeof (xpv_panic_idt) - 1; wr_idtr(&idtr); -#if defined(__amd64) /* Catch any hypercalls. */ wrmsr(MSR_AMD_LSTAR, (uintptr_t)xpv_panic_hypercall); wrmsr(MSR_AMD_CSTAR, (uintptr_t)xpv_panic_hypercall); -#endif } static void @@ -666,9 +658,7 @@ xpv_do_panic(void *arg) struct panic_info *pip = (struct panic_info *)arg; int l; struct cregs creg; -#if defined(__amd64) extern uintptr_t postbootkernelbase; -#endif if (xpv_panicking++ > 0) panic("multiple calls to xpv_do_panic()"); @@ -685,7 +675,6 @@ xpv_do_panic(void *arg) */ (void) panic_trigger(&panic_quiesce); -#if defined(__amd64) /* * bzero() and bcopy() get unhappy when asked to operate on * addresses outside of the kernel. At this point Xen is really a @@ -693,7 +682,6 @@ xpv_do_panic(void *arg) * the kernel starts. */ postbootkernelbase = xen_virt_start; -#endif #if defined(HYPERVISOR_VIRT_END) xpv_end = HYPERVISOR_VIRT_END; @@ -729,7 +717,6 @@ xpv_do_panic(void *arg) xpv_panic_info = pip; -#if defined(__amd64) kpm1_low = (uintptr_t)xpv_panic_info->pi_ram_start; if (xpv_panic_info->pi_xen_start == NULL) { kpm1_high = (uintptr_t)xpv_panic_info->pi_ram_end; @@ -738,16 +725,13 @@ xpv_do_panic(void *arg) kpm2_low = (uintptr_t)xpv_panic_info->pi_xen_end; kpm2_high = (uintptr_t)xpv_panic_info->pi_ram_end; } -#endif /* * Make sure we are running on the Solaris %gs. The Xen panic code * should already have set up the GDT properly. */ xpv_panic_resetgs(); -#if defined(__amd64) wrmsr(MSR_AMD_GSBASE, (uint64_t)&cpus[0]); -#endif xpv_panic_time_init(); @@ -771,10 +755,6 @@ xpv_do_panic(void *arg) xpv_panic_cr3 = creg.cr_cr3; for (l = mmu.max_level; l >= 0; l--) xpv_panic_nptes[l] = mmu.ptes_per_table; -#ifdef __i386 - if (mmu.pae_hat) - xpv_panic_nptes[mmu.max_level] = 4; -#endif /* Add the fake Xen module to the module list */ if (xpv_module != NULL) { @@ -823,11 +803,7 @@ init_xen_module() Shdr *shp, *ctf_shp; char *names = NULL; size_t n, namesize, text_align, data_align; -#if defined(__amd64) const char machine = EM_AMD64; -#else - const char machine = EM_386; -#endif /* Allocate and init the module structure */ mp = kmem_zalloc(sizeof (*mp), KM_SLEEP); diff --git a/usr/src/uts/intel/amd64/krtld/doreloc.c b/usr/src/uts/intel/amd64/krtld/doreloc.c index aac6f6dcc7..8fb49e4f1d 100644 --- a/usr/src/uts/intel/amd64/krtld/doreloc.c +++ b/usr/src/uts/intel/amd64/krtld/doreloc.c @@ -51,7 +51,7 @@ * target and linker host use different byte ordering, * but such code is a waste when running natively. */ -#if !defined(DO_RELOC_LIBLD) || defined(__i386) || defined(__amd64) +#if !defined(DO_RELOC_LIBLD) || defined(__x86) #define DORELOC_NATIVE #endif @@ -183,6 +183,7 @@ const Rel_entry reloc_table[R_AMD64_NUM] = { #define ZEROEXBITS 0xffffffff00000000ULL #define SIGNEXBITS 0xffffffff80000000ULL +/* BEGIN CSTYLED */ #if defined(_KERNEL) #define lml 0 /* Needed by arglist of REL_ERR_* macros */ int @@ -200,6 +201,7 @@ do_reloc_rtld(uchar_t rtype, uchar_t *off, Xword *value, const char *sym, const char *file, void *lml) #endif { +/* END CSTYLED */ #ifdef DO_RELOC_LIBLD #define sym (* rel_desc_sname_func)(rdesc) uchar_t rtype = rdesc->rel_rtype; diff --git a/usr/src/uts/intel/dtrace/dtrace_isa.c b/usr/src/uts/intel/dtrace/dtrace_isa.c index ee87d5feb9..898c3681d9 100644 --- a/usr/src/uts/intel/dtrace/dtrace_isa.c +++ b/usr/src/uts/intel/dtrace/dtrace_isa.c @@ -418,29 +418,16 @@ dtrace_getarg(int arg, int aframes) struct frame *fp = (struct frame *)dtrace_getfp(); uintptr_t *stack; int i; -#if defined(__amd64) /* * A total of 6 arguments are passed via registers; any argument with * index of 5 or lower is therefore in a register. */ int inreg = 5; -#endif for (i = 1; i <= aframes; i++) { fp = (struct frame *)(fp->fr_savfp); if (fp->fr_savpc == (pc_t)dtrace_invop_callsite) { -#if !defined(__amd64) - /* - * If we pass through the invalid op handler, we will - * use the pointer that it passed to the stack as the - * second argument to dtrace_invop() as the pointer to - * the stack. When using this stack, we must step - * beyond the EIP that was pushed when the trap was - * taken -- hence the "+ 1" below. - */ - stack = ((uintptr_t **)&fp[1])[1] + 1; -#else /* * In the case of amd64, we will use the pointer to the * regs structure that was pushed when we took the @@ -463,7 +450,6 @@ dtrace_getarg(int arg, int aframes) stack = (uintptr_t *)(rp->r_rsp); arg -= inreg; } -#endif goto load; } @@ -479,7 +465,6 @@ dtrace_getarg(int arg, int aframes) */ arg++; -#if defined(__amd64) if (arg <= inreg) { /* * This shouldn't happen. If the argument is passed in a @@ -491,7 +476,6 @@ dtrace_getarg(int arg, int aframes) } arg -= (inreg + 1); -#endif stack = (uintptr_t *)&fp[1]; load: @@ -547,7 +531,6 @@ dtrace_getstackdepth(int aframes) return (depth - aframes); } -#if defined(__amd64) static const int dtrace_regmap[] = { REG_GS, /* GS */ REG_FS, /* FS */ @@ -569,13 +552,11 @@ static const int dtrace_regmap[] = { REG_RSP, /* UESP */ REG_SS /* SS */ }; -#endif ulong_t dtrace_getreg(struct regs *rp, uint_t reg) { -#if defined(__amd64) if (reg <= SS) { if (reg >= sizeof (dtrace_regmap) / sizeof (int)) { DTRACE_CPUFLAG_SET(CPU_DTRACE_ILLOP); @@ -645,20 +626,11 @@ dtrace_getreg(struct regs *rp, uint_t reg) return (0); } -#else - if (reg > SS) { - DTRACE_CPUFLAG_SET(CPU_DTRACE_ILLOP); - return (0); - } - - return ((&rp->r_gs)[reg]); -#endif } void dtrace_setreg(struct regs *rp, uint_t reg, ulong_t val) { -#if defined(__amd64) if (reg <= SS) { ASSERT(reg < (sizeof (dtrace_regmap) / sizeof (int))); @@ -721,37 +693,6 @@ dtrace_setreg(struct regs *rp, uint_t reg, ulong_t val) return; } -#else /* defined(__amd64) */ - switch (reg) { - case EAX: - rp->r_eax = val; - break; - case ECX: - rp->r_ecx = val; - break; - case EDX: - rp->r_edx = val; - break; - case EBX: - rp->r_ebx = val; - break; - case ESP: - rp->r_esp = val; - break; - case EBP: - rp->r_ebp = val; - break; - case ESI: - rp->r_esi = val; - break; - case EDI: - rp->r_edi = val; - break; - default: - DTRACE_CPUFLAG_SET(CPU_DTRACE_ILLOP); - return; - } -#endif /* defined(__amd64) */ } static int diff --git a/usr/src/uts/intel/dtrace/fasttrap_isa.c b/usr/src/uts/intel/dtrace/fasttrap_isa.c index 1b93869a73..9318fd5e9b 100644 --- a/usr/src/uts/intel/dtrace/fasttrap_isa.c +++ b/usr/src/uts/intel/dtrace/fasttrap_isa.c @@ -24,8 +24,6 @@ * Use is subject to license terms. */ -#pragma ident "%Z%%M% %I% %E% SMI" - #include <sys/fasttrap_isa.h> #include <sys/fasttrap_impl.h> #include <sys/dtrace.h> @@ -177,16 +175,10 @@ * Map between instruction register encodings and the kernel constants which * correspond to indicies into struct regs. */ -#ifdef __amd64 static const uint8_t regmap[16] = { REG_RAX, REG_RCX, REG_RDX, REG_RBX, REG_RSP, REG_RBP, REG_RSI, REG_RDI, REG_R8, REG_R9, REG_R10, REG_R11, REG_R12, REG_R13, REG_R14, REG_R15, }; -#else -static const uint8_t regmap[8] = { - EAX, ECX, EDX, EBX, UESP, EBP, ESI, EDI -}; -#endif static ulong_t fasttrap_getreg(struct regs *, uint_t); @@ -196,7 +188,6 @@ fasttrap_anarg(struct regs *rp, int function_entry, int argno) uint64_t value; int shift = function_entry ? 1 : 0; -#ifdef __amd64 if (curproc->p_model == DATAMODEL_LP64) { uintptr_t *stack; @@ -212,14 +203,11 @@ fasttrap_anarg(struct regs *rp, int function_entry, int argno) value = dtrace_fulword(&stack[argno - 6 + shift]); DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR); } else { -#endif uint32_t *stack = (uint32_t *)rp->r_sp; DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT); value = dtrace_fuword32(&stack[argno + shift]); DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR); -#ifdef __amd64 } -#endif return (value); } @@ -322,13 +310,11 @@ fasttrap_tracepoint_init(proc_t *p, fasttrap_tracepoint_t *tp, uintptr_t pc, break; } -#ifdef __amd64 /* * Identify the REX prefix on 64-bit processes. */ if (p->p_model == DATAMODEL_LP64 && (instr[start] & 0xf0) == 0x40) rex = instr[start++]; -#endif /* * Now that we're pretty sure that the instruction is okay, copy the @@ -411,11 +397,9 @@ fasttrap_tracepoint_init(proc_t *p, fasttrap_tracepoint_t *tp, uintptr_t pc, * modes, there is a 32-bit operand. */ if (mod == 0 && rm == 5) { -#ifdef __amd64 if (p->p_model == DATAMODEL_LP64) tp->ftt_base = REG_RIP; else -#endif tp->ftt_base = FASTTRAP_NOREG; sz = 4; } else { @@ -513,7 +497,6 @@ fasttrap_tracepoint_init(proc_t *p, fasttrap_tracepoint_t *tp, uintptr_t pc, break; case FASTTRAP_NOP: -#ifdef __amd64 ASSERT(p->p_model == DATAMODEL_LP64 || rex == 0); /* @@ -523,7 +506,6 @@ fasttrap_tracepoint_init(proc_t *p, fasttrap_tracepoint_t *tp, uintptr_t pc, * (e.g. xchgl %r8d, %eax or xcghq %r8, %rax). */ if (FASTTRAP_REX_B(rex) == 0) -#endif tp->ftt_type = FASTTRAP_T_NOP; break; @@ -550,7 +532,6 @@ fasttrap_tracepoint_init(proc_t *p, fasttrap_tracepoint_t *tp, uintptr_t pc, } } -#ifdef __amd64 if (p->p_model == DATAMODEL_LP64 && tp->ftt_type == FASTTRAP_T_COMMON) { /* * If the process is 64-bit and the instruction type is still @@ -596,7 +577,6 @@ fasttrap_tracepoint_init(proc_t *p, fasttrap_tracepoint_t *tp, uintptr_t pc, } } } -#endif return (0); } @@ -631,7 +611,6 @@ fasttrap_tracepoint_remove(proc_t *p, fasttrap_tracepoint_t *tp) return (0); } -#ifdef __amd64 static uintptr_t fasttrap_fulword_noerr(const void *uaddr) { @@ -642,7 +621,6 @@ fasttrap_fulword_noerr(const void *uaddr) return (0); } -#endif static uint32_t fasttrap_fuword32_noerr(const void *uaddr) @@ -721,7 +699,6 @@ fasttrap_sigsegv(proc_t *p, kthread_t *t, uintptr_t addr) aston(t); } -#ifdef __amd64 static void fasttrap_usdt_args64(fasttrap_probe_t *probe, struct regs *rp, int argc, uintptr_t *argv) @@ -742,7 +719,6 @@ fasttrap_usdt_args64(fasttrap_probe_t *probe, struct regs *rp, int argc, argv[i] = 0; } } -#endif static void fasttrap_usdt_args32(fasttrap_probe_t *probe, struct regs *rp, int argc, @@ -907,9 +883,7 @@ fasttrap_pid_probe(struct regs *rp) curthread->t_dtrace_npc = 0; curthread->t_dtrace_scrpc = 0; curthread->t_dtrace_astpc = 0; -#ifdef __amd64 curthread->t_dtrace_regv = 0; -#endif /* * Treat a child created by a call to vfork(2) as if it were its @@ -953,7 +927,6 @@ fasttrap_pid_probe(struct regs *rp) if (tp->ftt_ids != NULL) { fasttrap_id_t *id; -#ifdef __amd64 if (p->p_model == DATAMODEL_LP64) { for (id = tp->ftt_ids; id != NULL; id = id->fti_next) { fasttrap_probe_t *probe = id->fti_probe; @@ -995,7 +968,6 @@ fasttrap_pid_probe(struct regs *rp) } } } else { -#endif uintptr_t s0, s1, s2, s3, s4, s5; uint32_t *stack = (uint32_t *)rp->r_sp; @@ -1050,9 +1022,7 @@ fasttrap_pid_probe(struct regs *rp) t[2], t[3], t[4]); } } -#ifdef __amd64 } -#endif } /* @@ -1107,19 +1077,15 @@ fasttrap_pid_probe(struct regs *rp) * instruction including what happens if the load from %esp * fails; in that case, we send a SIGSEGV. */ -#ifdef __amd64 if (p->p_model == DATAMODEL_NATIVE) { -#endif ret = fasttrap_fulword((void *)rp->r_sp, &dst); addr = rp->r_sp + sizeof (uintptr_t); -#ifdef __amd64 } else { uint32_t dst32; ret = fasttrap_fuword32((void *)rp->r_sp, &dst32); dst = dst32; addr = rp->r_sp + sizeof (uint32_t); } -#endif if (ret == -1) { fasttrap_sigsegv(p, curthread, rp->r_sp); @@ -1209,11 +1175,7 @@ fasttrap_pid_probe(struct regs *rp) case FASTTRAP_T_LOOP: { uint_t taken; -#ifdef __amd64 greg_t cx = rp->r_rcx--; -#else - greg_t cx = rp->r_ecx--; -#endif switch (tp->ftt_code) { case FASTTRAP_LOOPNZ: @@ -1238,11 +1200,7 @@ fasttrap_pid_probe(struct regs *rp) case FASTTRAP_T_JCXZ: { -#ifdef __amd64 greg_t cx = rp->r_rcx; -#else - greg_t cx = rp->r_ecx; -#endif if (cx == 0) new_pc = tp->ftt_dest; @@ -1255,18 +1213,14 @@ fasttrap_pid_probe(struct regs *rp) { int ret; uintptr_t addr; -#ifdef __amd64 if (p->p_model == DATAMODEL_NATIVE) { -#endif addr = rp->r_sp - sizeof (uintptr_t); ret = fasttrap_sulword((void *)addr, rp->r_fp); -#ifdef __amd64 } else { addr = rp->r_sp - sizeof (uint32_t); ret = fasttrap_suword32((void *)addr, (uint32_t)rp->r_fp); } -#endif if (ret == -1) { fasttrap_sigsegv(p, curthread, addr); @@ -1310,9 +1264,7 @@ fasttrap_pid_probe(struct regs *rp) break; } -#ifdef __amd64 if (p->p_model == DATAMODEL_NATIVE) { -#endif if (fasttrap_fulword((void *)addr, &value) == -1) { fasttrap_sigsegv(p, curthread, @@ -1321,7 +1273,6 @@ fasttrap_pid_probe(struct regs *rp) break; } new_pc = value; -#ifdef __amd64 } else { uint32_t value32; addr = (uintptr_t)(uint32_t)addr; @@ -1334,7 +1285,6 @@ fasttrap_pid_probe(struct regs *rp) } new_pc = value32; } -#endif } else { new_pc = addr; } @@ -1349,19 +1299,15 @@ fasttrap_pid_probe(struct regs *rp) if (tp->ftt_type == FASTTRAP_T_CALL) { int ret; uintptr_t addr; -#ifdef __amd64 if (p->p_model == DATAMODEL_NATIVE) { addr = rp->r_sp - sizeof (uintptr_t); ret = fasttrap_sulword((void *)addr, pc + tp->ftt_size); } else { -#endif addr = rp->r_sp - sizeof (uint32_t); ret = fasttrap_suword32((void *)addr, (uint32_t)(pc + tp->ftt_size)); -#ifdef __amd64 } -#endif if (ret == -1) { fasttrap_sigsegv(p, curthread, addr); @@ -1377,11 +1323,7 @@ fasttrap_pid_probe(struct regs *rp) case FASTTRAP_T_COMMON: { uintptr_t addr; -#if defined(__amd64) uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 22]; -#else - uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 7]; -#endif uint_t i = 0; klwp_t *lwp = ttolwp(curthread); @@ -1391,7 +1333,6 @@ fasttrap_pid_probe(struct regs *rp) * thread pointer is very different on 32- and 64-bit * kernels. */ -#if defined(__amd64) if (p->p_model == DATAMODEL_LP64) { addr = lwp->lwp_pcb.pcb_fsbase; addr += sizeof (void *); @@ -1399,10 +1340,6 @@ fasttrap_pid_probe(struct regs *rp) addr = lwp->lwp_pcb.pcb_gsbase; addr += sizeof (caddr32_t); } -#else - addr = USEGD_GETBASE(&lwp->lwp_pcb.pcb_gsdesc); - addr += sizeof (void *); -#endif /* * Generic Instruction Tracing @@ -1426,9 +1363,9 @@ fasttrap_pid_probe(struct regs *rp) * jmp 0(%rip) 6 * <pc + tp->ftt_size> 8 * b: <original instruction> <= 15 - * int T_DTRACE_RET 2 - * ----- - * <= 46 + * int T_DTRACE_RET 2 + * ----- + * <= 46 * * The %pc is set to a, and curthread->t_dtrace_astpc is set * to b. If we encounter a signal on the way out of the @@ -1478,9 +1415,9 @@ fasttrap_pid_probe(struct regs *rp) * movq $<value>, %<scratch> 6 * jmp 0(%rip) 6 * <pc + tp->ftt_size> 8 - * b: <modified instruction> <= 15 - * int T_DTRACE_RET 2 - * ----- + * b: <modified instruction> <= 15 + * int T_DTRACE_RET 2 + * ----- * 52 * * We set curthread->t_dtrace_regv so that upon receiving @@ -1493,7 +1430,6 @@ fasttrap_pid_probe(struct regs *rp) bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size); i += tp->ftt_size; -#ifdef __amd64 if (tp->ftt_ripmode != 0) { greg_t *reg; @@ -1545,7 +1481,6 @@ fasttrap_pid_probe(struct regs *rp) *reg = pc + tp->ftt_size; i += sizeof (uint64_t); } -#endif /* * Generate the branch instruction to what would have @@ -1554,7 +1489,6 @@ fasttrap_pid_probe(struct regs *rp) * %rip-relative branch that loads the 64-bit pc value * immediately after the jmp instruction. */ -#ifdef __amd64 if (p->p_model == DATAMODEL_LP64) { scratch[i++] = FASTTRAP_GROUP5_OP; scratch[i++] = FASTTRAP_MODRM(0, 4, 5); @@ -1565,7 +1499,6 @@ fasttrap_pid_probe(struct regs *rp) *(uint64_t *)&scratch[i] = pc + tp->ftt_size; i += sizeof (uint64_t); } else { -#endif /* * Set up the jmp to the next instruction; note that * the size of the traced instruction cancels out. @@ -1574,9 +1507,7 @@ fasttrap_pid_probe(struct regs *rp) /* LINTED - alignment */ *(uint32_t *)&scratch[i] = pc - addr - 5; i += sizeof (uint32_t); -#ifdef __amd64 } -#endif curthread->t_dtrace_astpc = addr + i; bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size); @@ -1702,7 +1633,6 @@ fasttrap_usdt_getarg(void *arg, dtrace_id_t id, void *parg, int argno, static ulong_t fasttrap_getreg(struct regs *rp, uint_t reg) { -#ifdef __amd64 switch (reg) { case REG_R15: return (rp->r_r15); case REG_R14: return (rp->r_r14); @@ -1736,10 +1666,4 @@ fasttrap_getreg(struct regs *rp, uint_t reg) panic("dtrace: illegal register constant"); /*NOTREACHED*/ -#else - if (reg >= _NGREG) - panic("dtrace: illegal register constant"); - - return (((greg_t *)&rp->r_gs)[reg]); -#endif } diff --git a/usr/src/uts/intel/dtrace/fbt.c b/usr/src/uts/intel/dtrace/fbt.c index 5df2d8b803..2e97650133 100644 --- a/usr/src/uts/intel/dtrace/fbt.c +++ b/usr/src/uts/intel/dtrace/fbt.c @@ -44,11 +44,7 @@ #define FBT_RET_IMM16 0xc2 #define FBT_LEAVE 0xc9 -#ifdef __amd64 #define FBT_PATCHVAL 0xcc -#else -#define FBT_PATCHVAL 0xf0 -#endif #define FBT_ENTRY "entry" #define FBT_RETURN "return" @@ -97,7 +93,6 @@ fbt_invop(uintptr_t addr, uintptr_t *stack, uintptr_t rval) */ DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT); CPU->cpu_dtrace_caller = stack[i++]; -#ifdef __amd64 /* * On amd64, stack[0] contains the dereferenced * stack pointer, stack[1] contains savfp, @@ -105,7 +100,6 @@ fbt_invop(uintptr_t addr, uintptr_t *stack, uintptr_t rval) * over these entries. */ i += 2; -#endif stack0 = stack[i++]; stack1 = stack[i++]; stack2 = stack[i++]; @@ -119,7 +113,6 @@ fbt_invop(uintptr_t addr, uintptr_t *stack, uintptr_t rval) CPU->cpu_dtrace_caller = 0; } else { -#ifdef __amd64 /* * On amd64, we instrument the ret, not the * leave. We therefore need to set the caller @@ -130,7 +123,6 @@ fbt_invop(uintptr_t addr, uintptr_t *stack, uintptr_t rval) CPU->cpu_dtrace_caller = stack[0]; DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR); -#endif dtrace_probe(fbt->fbtp_id, fbt->fbtp_roffset, rval, 0, 0, 0); @@ -284,7 +276,6 @@ fbt_provide_module(void *arg, struct modctl *ctl) instr = (uint8_t *)sym->st_value; limit = (uint8_t *)(sym->st_value + sym->st_size); -#ifdef __amd64 while (instr < limit) { if (*instr == FBT_PUSHL_EBP) break; @@ -303,16 +294,6 @@ fbt_provide_module(void *arg, struct modctl *ctl) */ continue; } -#else - if (instr[0] != FBT_PUSHL_EBP) - continue; - - if (!(instr[1] == FBT_MOVL_ESP_EBP0_V0 && - instr[2] == FBT_MOVL_ESP_EBP1_V0) && - !(instr[1] == FBT_MOVL_ESP_EBP0_V1 && - instr[2] == FBT_MOVL_ESP_EBP1_V1)) - continue; -#endif fbt = kmem_zalloc(sizeof (fbt_probe_t), KM_SLEEP); fbt->fbtp_name = name; @@ -344,7 +325,6 @@ again: if ((size = dtrace_instr_size(instr)) <= 0) continue; -#ifdef __amd64 /* * We only instrument "ret" on amd64 -- we don't yet instrument * ret imm16, largely because the compiler doesn't seem to @@ -354,15 +334,6 @@ again: instr += size; goto again; } -#else - if (!(size == 1 && - (*instr == FBT_POPL_EBP || *instr == FBT_LEAVE) && - (*(instr + 1) == FBT_RET || - *(instr + 1) == FBT_RET_IMM16))) { - instr += size; - goto again; - } -#endif /* * We (desperately) want to avoid erroneously instrumenting a @@ -412,22 +383,10 @@ again: fbt->fbtp_ctl = ctl; fbt->fbtp_loadcnt = ctl->mod_loadcnt; -#ifndef __amd64 - if (*instr == FBT_POPL_EBP) { - fbt->fbtp_rval = DTRACE_INVOP_POPL_EBP; - } else { - ASSERT(*instr == FBT_LEAVE); - fbt->fbtp_rval = DTRACE_INVOP_LEAVE; - } - fbt->fbtp_roffset = - (uintptr_t)(instr - (uint8_t *)sym->st_value) + 1; - -#else ASSERT(*instr == FBT_RET); fbt->fbtp_rval = DTRACE_INVOP_RET; fbt->fbtp_roffset = (uintptr_t)(instr - (uint8_t *)sym->st_value); -#endif fbt->fbtp_savedval = *instr; fbt->fbtp_patchval = FBT_PATCHVAL; diff --git a/usr/src/uts/intel/dtrace/sdt.c b/usr/src/uts/intel/dtrace/sdt.c index 3c84aeed5c..067d4bb0f6 100644 --- a/usr/src/uts/intel/dtrace/sdt.c +++ b/usr/src/uts/intel/dtrace/sdt.c @@ -61,14 +61,12 @@ sdt_invop(uintptr_t addr, uintptr_t *stack, uintptr_t eax) int i = 0; sdt_probe_t *sdt = sdt_probetab[SDT_ADDR2NDX(addr)]; -#ifdef __amd64 /* * On amd64, stack[0] contains the dereferenced stack pointer, * stack[1] contains savfp, stack[2] contains savpc. We want * to step over these entries. */ i += 3; -#endif for (; sdt != NULL; sdt = sdt->sdp_hashnext) { if ((uintptr_t)sdt->sdp_patchpoint == addr) { @@ -305,27 +303,16 @@ sdt_getarg(void *arg, dtrace_id_t id, void *parg, int argno, int aframes) struct frame *fp = (struct frame *)dtrace_getfp(); uintptr_t *stack; int i; -#if defined(__amd64) /* * A total of 6 arguments are passed via registers; any argument with * index of 5 or lower is therefore in a register. */ int inreg = 5; -#endif for (i = 1; i <= aframes; i++) { fp = (struct frame *)(fp->fr_savfp); if (fp->fr_savpc == (pc_t)dtrace_invop_callsite) { -#if !defined(__amd64) - /* - * If we pass through the invalid op handler, we will - * use the pointer that it passed to the stack as the - * second argument to dtrace_invop() as the pointer to - * the stack. - */ - stack = ((uintptr_t **)&fp[1])[1]; -#else /* * In the case of amd64, we will use the pointer to the * regs structure that was pushed when we took the @@ -348,7 +335,6 @@ sdt_getarg(void *arg, dtrace_id_t id, void *parg, int argno, int aframes) stack = (uintptr_t *)(rp->r_rsp); argno -= (inreg + 1); } -#endif goto load; } } @@ -363,7 +349,6 @@ sdt_getarg(void *arg, dtrace_id_t id, void *parg, int argno, int aframes) */ argno++; -#if defined(__amd64) if (argno <= inreg) { /* * This shouldn't happen. If the argument is passed in a @@ -375,7 +360,6 @@ sdt_getarg(void *arg, dtrace_id_t id, void *parg, int argno, int aframes) } argno -= (inreg + 1); -#endif stack = (uintptr_t *)&fp[1]; load: diff --git a/usr/src/uts/intel/ia32/krtld/doreloc.c b/usr/src/uts/intel/ia32/krtld/doreloc.c index 9537cd3eac..191edb6d6d 100644 --- a/usr/src/uts/intel/ia32/krtld/doreloc.c +++ b/usr/src/uts/intel/ia32/krtld/doreloc.c @@ -56,7 +56,7 @@ * target and linker host use different byte ordering, * but such code is a waste when running natively. */ -#if !defined(DO_RELOC_LIBLD) || defined(__i386) || defined(__amd64) +#if !defined(DO_RELOC_LIBLD) || defined(__x86) #define DORELOC_NATIVE #endif @@ -186,6 +186,7 @@ const Rel_entry reloc_table[R_386_NUM] = { * been performed before calling this function except for the addition of * the addresses in the instructions. */ +/* BEGIN CSTYLED */ #if defined(DO_RELOC_LIBLD) /*ARGSUSED5*/ int @@ -198,6 +199,7 @@ do_reloc_rtld(uchar_t rtype, uchar_t *off, Xword *value, const char *sym, const char *file, void *lml) #endif { +/* END CSTYLED */ #ifdef DO_RELOC_LIBLD #define sym (* rel_desc_sname_func)(rdesc) uchar_t rtype = rdesc->rel_rtype; diff --git a/usr/src/uts/intel/ia32/os/archdep.c b/usr/src/uts/intel/ia32/os/archdep.c index 99b9777858..14d20bb487 100644 --- a/usr/src/uts/intel/ia32/os/archdep.c +++ b/usr/src/uts/intel/ia32/os/archdep.c @@ -99,17 +99,8 @@ fnsave_to_fxsave(const struct fnsave_state *fn, struct fxsave_state *fx) fx->fx_fop = fn->f_fop; -#if defined(__amd64) fx->fx_rip = (uint64_t)fn->f_eip; fx->fx_rdp = (uint64_t)fn->f_dp; -#else - fx->fx_eip = fn->f_eip; - fx->fx_cs = fn->f_cs; - fx->__fx_ign0 = 0; - fx->fx_dp = fn->f_dp; - fx->fx_ds = fn->f_ds; - fx->__fx_ign1 = 0; -#endif } /* @@ -167,17 +158,10 @@ fxsave_to_fnsave(const struct fxsave_state *fx, struct fnsave_state *fn) fn->f_fop = fx->fx_fop; fn->__f_ign2 = 0; -#if defined(__amd64) fn->f_eip = (uint32_t)fx->fx_rip; fn->f_cs = U32CS_SEL; fn->f_dp = (uint32_t)fx->fx_rdp; fn->f_ds = UDS_SEL; -#else - fn->f_eip = fx->fx_eip; - fn->f_cs = fx->fx_cs; - fn->f_dp = fx->fx_dp; - fn->f_ds = fx->fx_ds; -#endif fn->__f_ign3 = 0; } @@ -187,15 +171,7 @@ fxsave_to_fnsave(const struct fxsave_state *fx, struct fnsave_state *fn) static void fpregset_to_fxsave(const fpregset_t *fp, struct fxsave_state *fx) { -#if defined(__amd64) bcopy(fp, fx, sizeof (*fx)); -#else - const struct _fpchip_state *fc = &fp->fp_reg_set.fpchip_state; - - fnsave_to_fxsave((const struct fnsave_state *)fc, fx); - fx->fx_mxcsr = fc->mxcsr; - bcopy(&fc->xmm[0], &fx->fx_xmm[0], sizeof (fc->xmm)); -#endif /* * avoid useless #gp exceptions - mask reserved bits */ @@ -208,15 +184,7 @@ fpregset_to_fxsave(const fpregset_t *fp, struct fxsave_state *fx) static void fxsave_to_fpregset(const struct fxsave_state *fx, fpregset_t *fp) { -#if defined(__amd64) bcopy(fx, fp, sizeof (*fx)); -#else - struct _fpchip_state *fc = &fp->fp_reg_set.fpchip_state; - - fxsave_to_fnsave(fx, (struct fnsave_state *)fc); - fc->mxcsr = fx->fx_mxcsr; - bcopy(&fx->fx_xmm[0], &fc->xmm[0], sizeof (fc->xmm)); -#endif } #if defined(_SYSCALL32_IMPL) @@ -290,12 +258,6 @@ setfpregs(klwp_t *lwp, fpregset_t *fp) */ switch (fp_save_mech) { -#if defined(__i386) - case FP_FNSAVE: - bcopy(fp, fpu->fpu_regs.kfpu_u.kfpu_fn, - sizeof (*fpu->fpu_regs.kfpu_u.kfpu_fn)); - break; -#endif case FP_FXSAVE: fpregset_to_fxsave(fp, fpu->fpu_regs.kfpu_u.kfpu_fx); fpu->fpu_regs.kfpu_xstatus = @@ -355,12 +317,6 @@ getfpregs(klwp_t *lwp, fpregset_t *fp) * Cases 1 and 3. */ switch (fp_save_mech) { -#if defined(__i386) - case FP_FNSAVE: - bcopy(fpu->fpu_regs.kfpu_u.kfpu_fn, fp, - sizeof (*fpu->fpu_regs.kfpu_u.kfpu_fn)); - break; -#endif case FP_FXSAVE: fxsave_to_fpregset(fpu->fpu_regs.kfpu_u.kfpu_fx, fp); fp->fp_reg_set.fpchip_state.xstatus = @@ -382,11 +338,6 @@ getfpregs(klwp_t *lwp, fpregset_t *fp) * Case 2. */ switch (fp_save_mech) { -#if defined(__i386) - case FP_FNSAVE: - bcopy(&x87_initial, fp, sizeof (x87_initial)); - break; -#endif case FP_FXSAVE: case FP_XSAVE: /* @@ -442,7 +393,6 @@ void getgregs(klwp_t *lwp, gregset_t grp) { struct regs *rp = lwptoregs(lwp); -#if defined(__amd64) struct pcb *pcb = &lwp->lwp_pcb; int thisthread = lwptot(lwp) == curthread; @@ -485,9 +435,6 @@ getgregs(klwp_t *lwp, gregset_t grp) grp[REG_SS] = rp->r_ss; grp[REG_RFL] = rp->r_rfl; grp[REG_RSP] = rp->r_rsp; -#else - bcopy(&rp->r_gs, grp, sizeof (gregset_t)); -#endif } #if defined(_SYSCALL32_IMPL) @@ -638,7 +585,6 @@ fix_segreg(greg_t sr, int iscs, model_t datamodel) else return (0); -#if defined(__amd64) /* * If lwp attempts to switch data model then force their * code selector to be null selector. @@ -652,9 +598,6 @@ fix_segreg(greg_t sr, int iscs, model_t datamodel) case UCS_SEL: if (datamodel == DATAMODEL_ILP32) return (0 | SEL_UPL); -#elif defined(__i386) - case UCS_SEL: -#endif /*FALLTHROUGH*/ case UDS_SEL: case LWPFS_SEL: @@ -674,7 +617,6 @@ fix_segreg(greg_t sr, int iscs, model_t datamodel) * 64-bit processes get the null gdt selector since they * are not allowed to have a private LDT. */ -#if defined(__amd64) if (datamodel == DATAMODEL_ILP32) { return (sr | SEL_TI_LDT | SEL_UPL); } else { @@ -684,9 +626,6 @@ fix_segreg(greg_t sr, int iscs, model_t datamodel) return (0); } -#elif defined(__i386) - return (sr | SEL_TI_LDT | SEL_UPL); -#endif } /* @@ -698,12 +637,10 @@ setgregs(klwp_t *lwp, gregset_t grp) struct regs *rp = lwptoregs(lwp); model_t datamodel = lwp_getdatamodel(lwp); -#if defined(__amd64) struct pcb *pcb = &lwp->lwp_pcb; int thisthread = lwptot(lwp) == curthread; if (datamodel == DATAMODEL_NATIVE) { - if (thisthread) (void) save_syscall_args(); /* copy the args */ @@ -803,27 +740,6 @@ setgregs(klwp_t *lwp, gregset_t grp) */ rp->r_rfl = (rp->r_rfl & ~PSL_USERMASK) | (grp[REG_RFL] & PSL_USERMASK); - -#elif defined(__i386) - - /* - * Only certain bits of the flags register can be modified. - */ - grp[EFL] = (rp->r_efl & ~PSL_USERMASK) | (grp[EFL] & PSL_USERMASK); - - /* - * Copy saved registers from user stack. - */ - bcopy(grp, &rp->r_gs, sizeof (gregset_t)); - - rp->r_cs = fix_segreg(rp->r_cs, IS_CS, datamodel); - rp->r_ss = fix_segreg(rp->r_ss, IS_NOT_CS, datamodel); - rp->r_ds = fix_segreg(rp->r_ds, IS_NOT_CS, datamodel); - rp->r_es = fix_segreg(rp->r_es, IS_NOT_CS, datamodel); - rp->r_fs = fix_segreg(rp->r_fs, IS_NOT_CS, datamodel); - rp->r_gs = fix_segreg(rp->r_gs, IS_NOT_CS, datamodel); - -#endif /* __i386 */ } /* @@ -916,10 +832,8 @@ elfheadcheck( { if (e_data != ELFDATA2LSB) return (0); -#if defined(__amd64) if (e_machine == EM_AMD64) return (1); -#endif return (e_machine == EM_386); } @@ -953,7 +867,6 @@ bind_hwcap(void) auxv_hwcap_2 = (auxv_hwcap_include_2 | cpu_hwcap_flags[1]) & ~auxv_hwcap_exclude_2; -#if defined(__amd64) /* * On AMD processors, sysenter just doesn't work at all * when the kernel is in long mode. On IA-32e processors @@ -964,12 +877,6 @@ bind_hwcap(void) * 32-bit lwp ... */ auxv_hwcap &= ~AV_386_SEP; -#else - /* - * 32-bit processes can -always- use the lahf/sahf instructions - */ - auxv_hwcap |= AV_386_AHF; -#endif if (auxv_hwcap_include || auxv_hwcap_exclude || auxv_hwcap_include_2 || auxv_hwcap_exclude_2) { @@ -999,7 +906,6 @@ bind_hwcap(void) auxv_hwcap32_2 = (auxv_hwcap32_include_2 | cpu_hwcap_flags[1]) & ~auxv_hwcap32_exclude_2; -#if defined(__amd64) /* * If this is an amd64 architecture machine from Intel, then * syscall -doesn't- work in compatibility mode, only sysenter does. @@ -1018,7 +924,6 @@ bind_hwcap(void) * 32-bit processes can -never- use fsgsbase instructions. */ auxv_hwcap32_2 &= ~AV_386_2_FSGSBASE; -#endif if (auxv_hwcap32_include || auxv_hwcap32_exclude || auxv_hwcap32_include_2 || auxv_hwcap32_exclude_2) { @@ -1071,7 +976,6 @@ panic_saveregs(panic_data_t *pdp, struct regs *rp) getcregs(&creg); -#if defined(__amd64) PANICNVADD(pnv, "rdi", rp->r_rdi); PANICNVADD(pnv, "rsi", rp->r_rsi); PANICNVADD(pnv, "rdx", rp->r_rdx); @@ -1104,29 +1008,6 @@ panic_saveregs(panic_data_t *pdp, struct regs *rp) PANICNVADD(pnv, "gdt_lo", (uint64_t)(creg.cr_gdt._l[0])); PANICNVADD(pnv, "idt_hi", (uint64_t)(creg.cr_idt._l[3])); PANICNVADD(pnv, "idt_lo", (uint64_t)(creg.cr_idt._l[0])); -#elif defined(__i386) - PANICNVADD(pnv, "gs", (uint32_t)rp->r_gs); - PANICNVADD(pnv, "fs", (uint32_t)rp->r_fs); - PANICNVADD(pnv, "es", (uint32_t)rp->r_es); - PANICNVADD(pnv, "ds", (uint32_t)rp->r_ds); - PANICNVADD(pnv, "edi", (uint32_t)rp->r_edi); - PANICNVADD(pnv, "esi", (uint32_t)rp->r_esi); - PANICNVADD(pnv, "ebp", (uint32_t)rp->r_ebp); - PANICNVADD(pnv, "esp", (uint32_t)rp->r_esp); - PANICNVADD(pnv, "ebx", (uint32_t)rp->r_ebx); - PANICNVADD(pnv, "edx", (uint32_t)rp->r_edx); - PANICNVADD(pnv, "ecx", (uint32_t)rp->r_ecx); - PANICNVADD(pnv, "eax", (uint32_t)rp->r_eax); - PANICNVADD(pnv, "trapno", (uint32_t)rp->r_trapno); - PANICNVADD(pnv, "err", (uint32_t)rp->r_err); - PANICNVADD(pnv, "eip", (uint32_t)rp->r_eip); - PANICNVADD(pnv, "cs", (uint32_t)rp->r_cs); - PANICNVADD(pnv, "eflags", (uint32_t)rp->r_efl); - PANICNVADD(pnv, "uesp", (uint32_t)rp->r_uesp); - PANICNVADD(pnv, "ss", (uint32_t)rp->r_ss); - PANICNVADD(pnv, "gdt", creg.cr_gdt); - PANICNVADD(pnv, "idt", creg.cr_idt); -#endif /* __i386 */ PANICNVADD(pnv, "ldt", creg.cr_ldt); PANICNVADD(pnv, "task", creg.cr_task); @@ -1141,56 +1022,6 @@ panic_saveregs(panic_data_t *pdp, struct regs *rp) #define TR_ARG_MAX 6 /* Max args to print, same as SPARC */ -#if !defined(__amd64) - -/* - * Given a return address (%eip), determine the likely number of arguments - * that were pushed on the stack prior to its execution. We do this by - * expecting that a typical call sequence consists of pushing arguments on - * the stack, executing a call instruction, and then performing an add - * on %esp to restore it to the value prior to pushing the arguments for - * the call. We attempt to detect such an add, and divide the addend - * by the size of a word to determine the number of pushed arguments. - * - * If we do not find such an add, we punt and return TR_ARG_MAX. It is not - * possible to reliably determine if a function took no arguments (i.e. was - * void) because assembler routines do not reliably perform an add on %esp - * immediately upon returning (eg. _sys_call()), so returning TR_ARG_MAX is - * safer than returning 0. - */ -static ulong_t -argcount(uintptr_t eip) -{ - const uint8_t *ins = (const uint8_t *)eip; - ulong_t n; - - enum { - M_MODRM_ESP = 0xc4, /* Mod/RM byte indicates %esp */ - M_ADD_IMM32 = 0x81, /* ADD imm32 to r/m32 */ - M_ADD_IMM8 = 0x83 /* ADD imm8 to r/m32 */ - }; - - if (eip < KERNELBASE || ins[1] != M_MODRM_ESP) - return (TR_ARG_MAX); - - switch (ins[0]) { - case M_ADD_IMM32: - n = ins[2] + (ins[3] << 8) + (ins[4] << 16) + (ins[5] << 24); - break; - - case M_ADD_IMM8: - n = ins[2]; - break; - - default: - return (TR_ARG_MAX); - } - - n /= sizeof (long); - return (MIN(n, TR_ARG_MAX)); -} - -#endif /* !__amd64 */ /* * Print a stack backtrace using the specified frame pointer. We delay two @@ -1205,7 +1036,6 @@ argcount(uintptr_t eip) extern char *dump_stack_scratch; -#if defined(__amd64) void traceback(caddr_t fpreg) @@ -1297,142 +1127,6 @@ out: } } -#elif defined(__i386) - -void -traceback(caddr_t fpreg) -{ - struct frame *fp = (struct frame *)fpreg; - struct frame *nextfp, *minfp, *stacktop; - uintptr_t pc, nextpc; - uint_t offset = 0; - uint_t next_offset = 0; - char stack_buffer[1024]; - - cpu_t *cpu; - - /* - * args[] holds TR_ARG_MAX hex long args, plus ", " or '\0'. - */ - char args[TR_ARG_MAX * 2 + 8], *p; - - int on_intr; - ulong_t off; - char *sym; - - if (!panicstr) - printf("traceback: %%fp = %p\n", (void *)fp); - - if (panicstr && !dump_stack_scratch) { - printf("Warning - stack not written to the dumpbuf\n"); - } - - /* - * If we are panicking, all high-level interrupt information in - * CPU was overwritten. panic_cpu has the correct values. - */ - kpreempt_disable(); /* prevent migration */ - - cpu = (panicstr && CPU->cpu_id == panic_cpu.cpu_id)? &panic_cpu : CPU; - - if ((on_intr = CPU_ON_INTR(cpu)) != 0) - stacktop = (struct frame *)(cpu->cpu_intr_stack + SA(MINFRAME)); - else - stacktop = (struct frame *)curthread->t_stk; - - kpreempt_enable(); - - fp = (struct frame *)plat_traceback(fpreg); - if ((uintptr_t)fp < KERNELBASE) - goto out; - - minfp = fp; /* Baseline minimum frame pointer */ - pc = fp->fr_savpc; - fp = (struct frame *)fp->fr_savfp; - - while ((uintptr_t)fp >= KERNELBASE) { - ulong_t argc; - long *argv; - - if (fp <= minfp || fp >= stacktop) { - if (on_intr) { - /* - * Hop from interrupt stack to thread stack. - */ - stacktop = (struct frame *)curthread->t_stk; - minfp = (struct frame *)curthread->t_stkbase; - on_intr = 0; - continue; - } - break; /* we're outside of the expected range */ - } - - if ((uintptr_t)fp & (STACK_ALIGN - 1)) { - printf(" >> mis-aligned %%fp = %p\n", (void *)fp); - break; - } - - nextpc = fp->fr_savpc; - nextfp = (struct frame *)fp->fr_savfp; - argc = argcount(nextpc); - argv = (long *)((char *)fp + sizeof (struct frame)); - - args[0] = '\0'; - p = args; - while (argc-- > 0 && argv < (long *)stacktop) { - p += snprintf(p, args + sizeof (args) - p, - "%s%lx", (p == args) ? "" : ", ", *argv++); - } - - if ((sym = kobj_getsymname(pc, &off)) != NULL) { - printf("%08lx %s:%s+%lx (%s)\n", (uintptr_t)fp, - mod_containing_pc((caddr_t)pc), sym, off, args); - (void) snprintf(stack_buffer, sizeof (stack_buffer), - "%s:%s+%lx (%s) | ", - mod_containing_pc((caddr_t)pc), sym, off, args); - - } else { - printf("%08lx %lx (%s)\n", - (uintptr_t)fp, pc, args); - (void) snprintf(stack_buffer, sizeof (stack_buffer), - "%lx (%s) | ", pc, args); - - } - - if (panicstr && dump_stack_scratch) { - next_offset = offset + strlen(stack_buffer); - if (next_offset < STACK_BUF_SIZE) { - bcopy(stack_buffer, dump_stack_scratch + offset, - strlen(stack_buffer)); - offset = next_offset; - } else { - /* - * In attempting to save the panic stack - * to the dumpbuf we have overflowed that area. - * Print a warning and continue to printf the - * stack to the msgbuf - */ - printf("Warning: stack in the dumpbuf" - " may be incomplete\n"); - offset = next_offset; - } - } - - minfp = fp; - pc = nextpc; - fp = nextfp; - } -out: - if (!panicstr) { - printf("end of traceback\n"); - DELAY(2 * MICROSEC); - } else if (dump_stack_scratch) { - dump_stack_scratch[offset] = '\0'; - } - -} - -#endif /* __i386 */ /* * Generate a stack backtrace from a saved register set. @@ -1487,7 +1181,6 @@ gethrestime(timespec_t *tp) gethrestimef(tp); } -#if defined(__amd64) /* * Part of the implementation of hres_tick(); this routine is * easier in C than assembler .. called with the hres_lock held. @@ -1530,7 +1223,6 @@ __adj_hrestime(void) hrestime.tv_nsec -= NANOSEC; } } -#endif /* * Wrapper functions to maintain backwards compability diff --git a/usr/src/uts/intel/ia32/os/comm_page_util.c b/usr/src/uts/intel/ia32/os/comm_page_util.c index 4150853813..f286bee7f6 100644 --- a/usr/src/uts/intel/ia32/os/comm_page_util.c +++ b/usr/src/uts/intel/ia32/os/comm_page_util.c @@ -37,7 +37,7 @@ caddr_t comm_page_mapin() { -#if defined(__amd64) && !defined(__xpv) +#if !defined(__xpv) proc_t *p = curproc; caddr_t addr = NULL; size_t len = COMM_PAGE_SIZE; @@ -56,7 +56,7 @@ comm_page_mapin() return (NULL); } return (addr); -#else /* defined(__amd64) && !defined(__xpv) */ +#else /* !defined(__xpv) */ return (NULL); -#endif /* defined(__amd64) && !defined(__xpv) */ +#endif /* !defined(__xpv) */ } diff --git a/usr/src/uts/intel/ia32/os/ddi_i86.c b/usr/src/uts/intel/ia32/os/ddi_i86.c index 6fc5dd8788..f135d0673c 100644 --- a/usr/src/uts/intel/ia32/os/ddi_i86.c +++ b/usr/src/uts/intel/ia32/os/ddi_i86.c @@ -74,7 +74,7 @@ ddi_dmae_1stparty(dev_info_t *dip, int chnl) int ddi_dmae_prog(dev_info_t *dip, struct ddi_dmae_req *dmaereqp, - ddi_dma_cookie_t *cookiep, int chnl) + ddi_dma_cookie_t *cookiep, int chnl) { return (ddi_dma_mctl(dip, dip, 0, DDI_DMA_E_PROG, (off_t *)dmaereqp, (size_t *)cookiep, (caddr_t *)(uintptr_t)chnl, 0)); @@ -82,7 +82,7 @@ ddi_dmae_prog(dev_info_t *dip, struct ddi_dmae_req *dmaereqp, int ddi_dmae_swsetup(dev_info_t *dip, struct ddi_dmae_req *dmaereqp, - ddi_dma_cookie_t *cookiep, int chnl) + ddi_dma_cookie_t *cookiep, int chnl) { return (ddi_dma_mctl(dip, dip, 0, DDI_DMA_E_SWSETUP, (off_t *)dmaereqp, (size_t *)cookiep, (caddr_t *)(uintptr_t)chnl, 0)); @@ -567,7 +567,7 @@ i_ddi_vaddr_swap_put64(ddi_acc_impl_t *hdlp, uint64_t *addr, uint64_t value) /*ARGSUSED*/ void i_ddi_vaddr_rep_get8(ddi_acc_impl_t *hdlp, uint8_t *host_addr, - uint8_t *dev_addr, size_t repcount, uint_t flags) + uint8_t *dev_addr, size_t repcount, uint_t flags) { uint8_t *h, *d; @@ -585,7 +585,7 @@ i_ddi_vaddr_rep_get8(ddi_acc_impl_t *hdlp, uint8_t *host_addr, /*ARGSUSED*/ void i_ddi_vaddr_rep_get16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, - uint16_t *dev_addr, size_t repcount, uint_t flags) + uint16_t *dev_addr, size_t repcount, uint_t flags) { uint16_t *h, *d; @@ -603,7 +603,7 @@ i_ddi_vaddr_rep_get16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, /*ARGSUSED*/ void i_ddi_vaddr_swap_rep_get16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, - uint16_t *dev_addr, size_t repcount, uint_t flags) + uint16_t *dev_addr, size_t repcount, uint_t flags) { uint16_t *h, *d; @@ -621,7 +621,7 @@ i_ddi_vaddr_swap_rep_get16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, /*ARGSUSED*/ void i_ddi_io_swap_rep_get16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, - uint16_t *dev_addr, size_t repcount, uint_t flags) + uint16_t *dev_addr, size_t repcount, uint_t flags) { uint16_t *h; uintptr_t port; @@ -640,7 +640,7 @@ i_ddi_io_swap_rep_get16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, /*ARGSUSED*/ void i_ddi_vaddr_rep_get32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, - uint32_t *dev_addr, size_t repcount, uint_t flags) + uint32_t *dev_addr, size_t repcount, uint_t flags) { uint32_t *h, *d; @@ -658,7 +658,7 @@ i_ddi_vaddr_rep_get32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, /*ARGSUSED*/ void i_ddi_vaddr_swap_rep_get32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, - uint32_t *dev_addr, size_t repcount, uint_t flags) + uint32_t *dev_addr, size_t repcount, uint_t flags) { uint32_t *h, *d; @@ -676,7 +676,7 @@ i_ddi_vaddr_swap_rep_get32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, /*ARGSUSED*/ void i_ddi_io_swap_rep_get32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, - uint32_t *dev_addr, size_t repcount, uint_t flags) + uint32_t *dev_addr, size_t repcount, uint_t flags) { uint32_t *h; uintptr_t port; @@ -695,7 +695,7 @@ i_ddi_io_swap_rep_get32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, /*ARGSUSED*/ void i_ddi_vaddr_rep_get64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, - uint64_t *dev_addr, size_t repcount, uint_t flags) + uint64_t *dev_addr, size_t repcount, uint_t flags) { uint64_t *h, *d; @@ -713,7 +713,7 @@ i_ddi_vaddr_rep_get64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, /*ARGSUSED*/ void i_ddi_vaddr_swap_rep_get64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, - uint64_t *dev_addr, size_t repcount, uint_t flags) + uint64_t *dev_addr, size_t repcount, uint_t flags) { uint64_t *h, *d; @@ -731,7 +731,7 @@ i_ddi_vaddr_swap_rep_get64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, /*ARGSUSED*/ void i_ddi_vaddr_rep_put8(ddi_acc_impl_t *hdlp, uint8_t *host_addr, - uint8_t *dev_addr, size_t repcount, uint_t flags) + uint8_t *dev_addr, size_t repcount, uint_t flags) { uint8_t *h, *d; @@ -749,7 +749,7 @@ i_ddi_vaddr_rep_put8(ddi_acc_impl_t *hdlp, uint8_t *host_addr, /*ARGSUSED*/ void i_ddi_vaddr_rep_put16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, - uint16_t *dev_addr, size_t repcount, uint_t flags) + uint16_t *dev_addr, size_t repcount, uint_t flags) { uint16_t *h, *d; @@ -767,7 +767,7 @@ i_ddi_vaddr_rep_put16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, /*ARGSUSED*/ void i_ddi_vaddr_swap_rep_put16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, - uint16_t *dev_addr, size_t repcount, uint_t flags) + uint16_t *dev_addr, size_t repcount, uint_t flags) { uint16_t *h, *d; @@ -785,7 +785,7 @@ i_ddi_vaddr_swap_rep_put16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, /*ARGSUSED*/ void i_ddi_io_swap_rep_put16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, - uint16_t *dev_addr, size_t repcount, uint_t flags) + uint16_t *dev_addr, size_t repcount, uint_t flags) { uint16_t *h; uintptr_t port; @@ -804,7 +804,7 @@ i_ddi_io_swap_rep_put16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, /*ARGSUSED*/ void i_ddi_vaddr_rep_put32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, - uint32_t *dev_addr, size_t repcount, uint_t flags) + uint32_t *dev_addr, size_t repcount, uint_t flags) { uint32_t *h, *d; @@ -822,7 +822,7 @@ i_ddi_vaddr_rep_put32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, /*ARGSUSED*/ void i_ddi_vaddr_swap_rep_put32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, - uint32_t *dev_addr, size_t repcount, uint_t flags) + uint32_t *dev_addr, size_t repcount, uint_t flags) { uint32_t *h, *d; @@ -840,7 +840,7 @@ i_ddi_vaddr_swap_rep_put32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, /*ARGSUSED*/ void i_ddi_io_swap_rep_put32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, - uint32_t *dev_addr, size_t repcount, uint_t flags) + uint32_t *dev_addr, size_t repcount, uint_t flags) { uint32_t *h; uintptr_t port; @@ -859,7 +859,7 @@ i_ddi_io_swap_rep_put32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, /*ARGSUSED*/ void i_ddi_vaddr_rep_put64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, - uint64_t *dev_addr, size_t repcount, uint_t flags) + uint64_t *dev_addr, size_t repcount, uint_t flags) { uint64_t *h, *d; @@ -877,7 +877,7 @@ i_ddi_vaddr_rep_put64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, /*ARGSUSED*/ void i_ddi_vaddr_swap_rep_put64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, - uint64_t *dev_addr, size_t repcount, uint_t flags) + uint64_t *dev_addr, size_t repcount, uint_t flags) { uint64_t *h, *d; @@ -1226,7 +1226,7 @@ i_ddi_prot_vaddr_swap_put64(ddi_acc_impl_t *hdlp, uint64_t *addr, /*ARGSUSED*/ void i_ddi_prot_io_rep_get8(ddi_acc_impl_t *hdlp, uint8_t *host_addr, - uint8_t *dev_addr, size_t repcount, uint_t flags) + uint8_t *dev_addr, size_t repcount, uint_t flags) { int fail = 0; uint8_t *h; @@ -1253,7 +1253,7 @@ i_ddi_prot_io_rep_get8(ddi_acc_impl_t *hdlp, uint8_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_io_rep_get16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, - uint16_t *dev_addr, size_t repcount, uint_t flags) + uint16_t *dev_addr, size_t repcount, uint_t flags) { int fail = 0; uint16_t *h; @@ -1280,7 +1280,7 @@ i_ddi_prot_io_rep_get16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_io_rep_get32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, - uint32_t *dev_addr, size_t repcount, uint_t flags) + uint32_t *dev_addr, size_t repcount, uint_t flags) { int fail = 0; uint32_t *h; @@ -1307,7 +1307,7 @@ i_ddi_prot_io_rep_get32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_vaddr_rep_get8(ddi_acc_impl_t *hdlp, uint8_t *host_addr, - uint8_t *dev_addr, size_t repcount, uint_t flags) + uint8_t *dev_addr, size_t repcount, uint_t flags) { int fail = 0; uint8_t *h, *d; @@ -1333,7 +1333,7 @@ i_ddi_prot_vaddr_rep_get8(ddi_acc_impl_t *hdlp, uint8_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_vaddr_rep_get16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, - uint16_t *dev_addr, size_t repcount, uint_t flags) + uint16_t *dev_addr, size_t repcount, uint_t flags) { int fail = 0; uint16_t *h, *d; @@ -1359,7 +1359,7 @@ i_ddi_prot_vaddr_rep_get16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_vaddr_swap_rep_get16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, - uint16_t *dev_addr, size_t repcount, uint_t flags) + uint16_t *dev_addr, size_t repcount, uint_t flags) { int fail = 0; uint16_t *h, *d; @@ -1385,7 +1385,7 @@ i_ddi_prot_vaddr_swap_rep_get16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_io_swap_rep_get16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, - uint16_t *dev_addr, size_t repcount, uint_t flags) + uint16_t *dev_addr, size_t repcount, uint_t flags) { int fail = 0; uint16_t *h; @@ -1412,7 +1412,7 @@ i_ddi_prot_io_swap_rep_get16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_vaddr_rep_get32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, - uint32_t *dev_addr, size_t repcount, uint_t flags) + uint32_t *dev_addr, size_t repcount, uint_t flags) { int fail = 0; uint32_t *h, *d; @@ -1438,7 +1438,7 @@ i_ddi_prot_vaddr_rep_get32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_vaddr_swap_rep_get32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, - uint32_t *dev_addr, size_t repcount, uint_t flags) + uint32_t *dev_addr, size_t repcount, uint_t flags) { int fail = 0; uint32_t *h, *d; @@ -1464,7 +1464,7 @@ i_ddi_prot_vaddr_swap_rep_get32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_io_swap_rep_get32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, - uint32_t *dev_addr, size_t repcount, uint_t flags) + uint32_t *dev_addr, size_t repcount, uint_t flags) { int fail = 0; uint32_t *h; @@ -1491,7 +1491,7 @@ i_ddi_prot_io_swap_rep_get32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_vaddr_rep_get64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, - uint64_t *dev_addr, size_t repcount, uint_t flags) + uint64_t *dev_addr, size_t repcount, uint_t flags) { int fail = 0; uint64_t *h, *d; @@ -1517,7 +1517,7 @@ i_ddi_prot_vaddr_rep_get64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_vaddr_swap_rep_get64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, - uint64_t *dev_addr, size_t repcount, uint_t flags) + uint64_t *dev_addr, size_t repcount, uint_t flags) { int fail = 0; uint64_t *h, *d; @@ -1543,7 +1543,7 @@ i_ddi_prot_vaddr_swap_rep_get64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_vaddr_rep_put8(ddi_acc_impl_t *hdlp, uint8_t *host_addr, - uint8_t *dev_addr, size_t repcount, uint_t flags) + uint8_t *dev_addr, size_t repcount, uint_t flags) { uint8_t *h, *d; @@ -1563,7 +1563,7 @@ i_ddi_prot_vaddr_rep_put8(ddi_acc_impl_t *hdlp, uint8_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_io_rep_put8(ddi_acc_impl_t *hdlp, uint8_t *host_addr, - uint8_t *dev_addr, size_t repcount, uint_t flags) + uint8_t *dev_addr, size_t repcount, uint_t flags) { uint8_t *h; uintptr_t port; @@ -1584,7 +1584,7 @@ i_ddi_prot_io_rep_put8(ddi_acc_impl_t *hdlp, uint8_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_vaddr_rep_put16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, - uint16_t *dev_addr, size_t repcount, uint_t flags) + uint16_t *dev_addr, size_t repcount, uint_t flags) { uint16_t *h, *d; @@ -1604,7 +1604,7 @@ i_ddi_prot_vaddr_rep_put16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_io_rep_put16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, - uint16_t *dev_addr, size_t repcount, uint_t flags) + uint16_t *dev_addr, size_t repcount, uint_t flags) { uint16_t *h; uintptr_t port; @@ -1625,7 +1625,7 @@ i_ddi_prot_io_rep_put16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_vaddr_swap_rep_put16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, - uint16_t *dev_addr, size_t repcount, uint_t flags) + uint16_t *dev_addr, size_t repcount, uint_t flags) { uint16_t *h, *d; @@ -1645,7 +1645,7 @@ i_ddi_prot_vaddr_swap_rep_put16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_io_swap_rep_put16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, - uint16_t *dev_addr, size_t repcount, uint_t flags) + uint16_t *dev_addr, size_t repcount, uint_t flags) { uint16_t *h; uintptr_t port; @@ -1666,7 +1666,7 @@ i_ddi_prot_io_swap_rep_put16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_vaddr_rep_put32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, - uint32_t *dev_addr, size_t repcount, uint_t flags) + uint32_t *dev_addr, size_t repcount, uint_t flags) { uint32_t *h, *d; @@ -1686,7 +1686,7 @@ i_ddi_prot_vaddr_rep_put32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_io_rep_put32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, - uint32_t *dev_addr, size_t repcount, uint_t flags) + uint32_t *dev_addr, size_t repcount, uint_t flags) { uint32_t *h; uintptr_t port; @@ -1707,7 +1707,7 @@ i_ddi_prot_io_rep_put32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_vaddr_swap_rep_put32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, - uint32_t *dev_addr, size_t repcount, uint_t flags) + uint32_t *dev_addr, size_t repcount, uint_t flags) { uint32_t *h, *d; @@ -1727,7 +1727,7 @@ i_ddi_prot_vaddr_swap_rep_put32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_io_swap_rep_put32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, - uint32_t *dev_addr, size_t repcount, uint_t flags) + uint32_t *dev_addr, size_t repcount, uint_t flags) { uint32_t *h; uintptr_t port; @@ -1748,7 +1748,7 @@ i_ddi_prot_io_swap_rep_put32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_vaddr_rep_put64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, - uint64_t *dev_addr, size_t repcount, uint_t flags) + uint64_t *dev_addr, size_t repcount, uint_t flags) { uint64_t *h, *d; @@ -1768,7 +1768,7 @@ i_ddi_prot_vaddr_rep_put64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, /*ARGSUSED*/ void i_ddi_prot_vaddr_swap_rep_put64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, - uint64_t *dev_addr, size_t repcount, uint_t flags) + uint64_t *dev_addr, size_t repcount, uint_t flags) { uint64_t *h, *d; @@ -1787,7 +1787,7 @@ i_ddi_prot_vaddr_swap_rep_put64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, void ddi_io_rep_get8(ddi_acc_handle_t handle, - uint8_t *host_addr, uint8_t *dev_addr, size_t repcount) + uint8_t *host_addr, uint8_t *dev_addr, size_t repcount) { (((ddi_acc_impl_t *)handle)->ahi_rep_get8) ((ddi_acc_impl_t *)handle, host_addr, dev_addr, @@ -1796,7 +1796,7 @@ ddi_io_rep_get8(ddi_acc_handle_t handle, void ddi_io_rep_get16(ddi_acc_handle_t handle, - uint16_t *host_addr, uint16_t *dev_addr, size_t repcount) + uint16_t *host_addr, uint16_t *dev_addr, size_t repcount) { (((ddi_acc_impl_t *)handle)->ahi_rep_get16) ((ddi_acc_impl_t *)handle, host_addr, dev_addr, @@ -1805,7 +1805,7 @@ ddi_io_rep_get16(ddi_acc_handle_t handle, void ddi_io_rep_get32(ddi_acc_handle_t handle, - uint32_t *host_addr, uint32_t *dev_addr, size_t repcount) + uint32_t *host_addr, uint32_t *dev_addr, size_t repcount) { (((ddi_acc_impl_t *)handle)->ahi_rep_get32) ((ddi_acc_impl_t *)handle, host_addr, dev_addr, @@ -1815,14 +1815,14 @@ ddi_io_rep_get32(ddi_acc_handle_t handle, /*ARGSUSED*/ void i_ddi_io_rep_get64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, - uint64_t *dev_addr, size_t repcount, uint_t flags) + uint64_t *dev_addr, size_t repcount, uint_t flags) { cmn_err(CE_PANIC, "ddi_rep_get64 from i/o space"); } void ddi_io_rep_put8(ddi_acc_handle_t handle, - uint8_t *host_addr, uint8_t *dev_addr, size_t repcount) + uint8_t *host_addr, uint8_t *dev_addr, size_t repcount) { (((ddi_acc_impl_t *)handle)->ahi_rep_put8) ((ddi_acc_impl_t *)handle, host_addr, dev_addr, @@ -1831,7 +1831,7 @@ ddi_io_rep_put8(ddi_acc_handle_t handle, void ddi_io_rep_put16(ddi_acc_handle_t handle, - uint16_t *host_addr, uint16_t *dev_addr, size_t repcount) + uint16_t *host_addr, uint16_t *dev_addr, size_t repcount) { (((ddi_acc_impl_t *)handle)->ahi_rep_put16) ((ddi_acc_impl_t *)handle, host_addr, dev_addr, @@ -1840,7 +1840,7 @@ ddi_io_rep_put16(ddi_acc_handle_t handle, void ddi_io_rep_put32(ddi_acc_handle_t handle, - uint32_t *host_addr, uint32_t *dev_addr, size_t repcount) + uint32_t *host_addr, uint32_t *dev_addr, size_t repcount) { (((ddi_acc_impl_t *)handle)->ahi_rep_put32) ((ddi_acc_impl_t *)handle, host_addr, dev_addr, @@ -1850,76 +1850,12 @@ ddi_io_rep_put32(ddi_acc_handle_t handle, /*ARGSUSED*/ void i_ddi_io_rep_put64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, - uint64_t *dev_addr, size_t repcount, uint_t flags) + uint64_t *dev_addr, size_t repcount, uint_t flags) { cmn_err(CE_PANIC, "ddi_rep_put64 to i/o space"); } /* - * We need to separate the old interfaces from the new ones and leave them - * in here for a while. Previous versions of the OS defined the new interfaces - * to the old interfaces. This way we can fix things up so that we can - * eventually remove these interfaces. - * e.g. A 3rd party module/driver using ddi_io_rep_get8 and built against S10 - * or earlier will actually have a reference to ddi_io_rep_getb in the binary. - */ -#ifdef _ILP32 -void -ddi_io_rep_getb(ddi_acc_handle_t handle, - uint8_t *host_addr, uint8_t *dev_addr, size_t repcount) -{ - (((ddi_acc_impl_t *)handle)->ahi_rep_get8) - ((ddi_acc_impl_t *)handle, host_addr, dev_addr, - repcount, DDI_DEV_NO_AUTOINCR); -} - -void -ddi_io_rep_getw(ddi_acc_handle_t handle, - uint16_t *host_addr, uint16_t *dev_addr, size_t repcount) -{ - (((ddi_acc_impl_t *)handle)->ahi_rep_get16) - ((ddi_acc_impl_t *)handle, host_addr, dev_addr, - repcount, DDI_DEV_NO_AUTOINCR); -} - -void -ddi_io_rep_getl(ddi_acc_handle_t handle, - uint32_t *host_addr, uint32_t *dev_addr, size_t repcount) -{ - (((ddi_acc_impl_t *)handle)->ahi_rep_get32) - ((ddi_acc_impl_t *)handle, host_addr, dev_addr, - repcount, DDI_DEV_NO_AUTOINCR); -} - -void -ddi_io_rep_putb(ddi_acc_handle_t handle, - uint8_t *host_addr, uint8_t *dev_addr, size_t repcount) -{ - (((ddi_acc_impl_t *)handle)->ahi_rep_put8) - ((ddi_acc_impl_t *)handle, host_addr, dev_addr, - repcount, DDI_DEV_NO_AUTOINCR); -} - -void -ddi_io_rep_putw(ddi_acc_handle_t handle, - uint16_t *host_addr, uint16_t *dev_addr, size_t repcount) -{ - (((ddi_acc_impl_t *)handle)->ahi_rep_put16) - ((ddi_acc_impl_t *)handle, host_addr, dev_addr, - repcount, DDI_DEV_NO_AUTOINCR); -} - -void -ddi_io_rep_putl(ddi_acc_handle_t handle, - uint32_t *host_addr, uint32_t *dev_addr, size_t repcount) -{ - (((ddi_acc_impl_t *)handle)->ahi_rep_put32) - ((ddi_acc_impl_t *)handle, host_addr, dev_addr, - repcount, DDI_DEV_NO_AUTOINCR); -} -#endif /* _ILP32 */ - -/* * These next two functions could be translated into assembler someday */ int diff --git a/usr/src/uts/intel/ia32/os/desctbls.c b/usr/src/uts/intel/ia32/os/desctbls.c index 93eca48708..35345c3fe8 100644 --- a/usr/src/uts/intel/ia32/os/desctbls.c +++ b/usr/src/uts/intel/ia32/os/desctbls.c @@ -104,30 +104,20 @@ desctbr_t gdt0_default_r; #endif gate_desc_t *idt0; /* interrupt descriptor table */ -#if defined(__i386) -desctbr_t idt0_default_r; /* describes idt0 in IDTR format */ -#endif tss_t *ktss0; /* kernel task state structure */ -#if defined(__i386) -tss_t *dftss0; /* #DF double-fault exception */ -#endif /* __i386 */ user_desc_t zero_udesc; /* base zero user desc native procs */ user_desc_t null_udesc; /* null user descriptor */ system_desc_t null_sdesc; /* null system descriptor */ -#if defined(__amd64) user_desc_t zero_u32desc; /* 32-bit compatibility procs */ -#endif /* __amd64 */ -#if defined(__amd64) user_desc_t ucs_on; user_desc_t ucs_off; user_desc_t ucs32_on; user_desc_t ucs32_off; -#endif /* __amd64 */ /* * If the size of this is changed, you must update hat_pcp_setup() and the @@ -438,9 +428,7 @@ xen_idt_to_trap_info(uint_t vec, gate_desc_t *sgd, void *ti_arg) TI_SET_IF(ti, 1); } ti->cs = sgd->sgd_selector; -#if defined(__amd64) ti->cs |= SEL_KPL; /* force into ring 3. see KCS_SEL */ -#endif ti->address = GATESEG_GETOFFSET(sgd); return (1); } @@ -462,7 +450,6 @@ xen_idt_write(gate_desc_t *sgd, uint_t vec) #endif /* __xpv */ -#if defined(__amd64) /* * Build kernel GDT. @@ -708,194 +695,6 @@ init_gdt(void) #endif /* __xpv */ -#elif defined(__i386) - -static void -init_gdt_common(user_desc_t *gdt) -{ - int i; - - /* - * Text and data for both kernel and user span entire 32 bit - * address space. - */ - - /* - * kernel code segment. - */ - set_usegd(&gdt[GDT_KCODE], NULL, -1, SDT_MEMERA, SEL_KPL, SDP_PAGES, - SDP_OP32); - - /* - * kernel data segment. - */ - set_usegd(&gdt[GDT_KDATA], NULL, -1, SDT_MEMRWA, SEL_KPL, SDP_PAGES, - SDP_OP32); - - /* - * user code segment. - */ - set_usegd(&gdt[GDT_UCODE], NULL, -1, SDT_MEMERA, SEL_UPL, SDP_PAGES, - SDP_OP32); - - /* - * user data segment. - */ - set_usegd(&gdt[GDT_UDATA], NULL, -1, SDT_MEMRWA, SEL_UPL, SDP_PAGES, - SDP_OP32); - -#if !defined(__xpv) - - /* - * TSS for T_DBLFLT (double fault) handler - */ - set_syssegd((system_desc_t *)&gdt[GDT_DBFLT], dftss0, - sizeof (*dftss0) - 1, SDT_SYSTSS, SEL_KPL); - - /* - * TSS for kernel - */ - set_syssegd((system_desc_t *)&gdt[GDT_KTSS], ktss0, - sizeof (*ktss0) - 1, SDT_SYSTSS, SEL_KPL); - -#endif /* !__xpv */ - - /* - * %gs selector for kernel - */ - set_usegd(&gdt[GDT_GS], &cpus[0], sizeof (struct cpu) -1, SDT_MEMRWA, - SEL_KPL, SDP_BYTES, SDP_OP32); - - /* - * Initialize lwp private descriptors. - * Only attributes and limits are initialized, the effective - * base address is programmed via fsbase/gsbase. - */ - set_usegd(&gdt[GDT_LWPFS], NULL, (size_t)-1, SDT_MEMRWA, SEL_UPL, - SDP_PAGES, SDP_OP32); - set_usegd(&gdt[GDT_LWPGS], NULL, (size_t)-1, SDT_MEMRWA, SEL_UPL, - SDP_PAGES, SDP_OP32); - - /* - * Initialize the descriptors set aside for brand usage. - * Only attributes and limits are initialized. - */ - for (i = GDT_BRANDMIN; i <= GDT_BRANDMAX; i++) - set_usegd(&gdt0[i], NULL, (size_t)-1, SDT_MEMRWA, SEL_UPL, - SDP_PAGES, SDP_OP32); - /* - * Initialize convenient zero base user descriptor for clearing - * lwp private %fs and %gs descriptors in GDT. See setregs() for - * an example. - */ - set_usegd(&zero_udesc, NULL, -1, SDT_MEMRWA, SEL_UPL, - SDP_BYTES, SDP_OP32); -} - -#if defined(__xpv) - -static user_desc_t * -init_gdt(void) -{ - uint64_t gdtpa; - ulong_t ma[1]; /* XXPV should be a memory_t */ - -#if !defined(__lint) - /* - * Our gdt is never larger than a single page. - */ - ASSERT((sizeof (*gdt0) * NGDT) <= PAGESIZE); -#endif - gdt0 = (user_desc_t *)BOP_ALLOC(bootops, (caddr_t)GDT_VA, - PAGESIZE, PAGESIZE); - bzero(gdt0, PAGESIZE); - - init_gdt_common(gdt0); - gdtpa = pfn_to_pa(va_to_pfn(gdt0)); - - /* - * XXX Since we never invoke kmdb until after the kernel takes - * over the descriptor tables why not have it use the kernel's - * selectors? - */ - if (boothowto & RB_DEBUG) { - set_usegd(&gdt0[GDT_B32DATA], NULL, -1, SDT_MEMRWA, SEL_KPL, - SDP_PAGES, SDP_OP32); - set_usegd(&gdt0[GDT_B32CODE], NULL, -1, SDT_MEMERA, SEL_KPL, - SDP_PAGES, SDP_OP32); - } - - /* - * Clear write permission for page containing the gdt and install it. - */ - ma[0] = (ulong_t)(pa_to_ma(gdtpa) >> PAGESHIFT); - kbm_read_only((uintptr_t)gdt0, gdtpa); - xen_set_gdt(ma, NGDT); - - /* - * Reload the segment registers to use the new GDT - */ - load_segment_registers( - KCS_SEL, KDS_SEL, KDS_SEL, KFS_SEL, KGS_SEL, KDS_SEL); - - return (gdt0); -} - -#else /* __xpv */ - -static user_desc_t * -init_gdt(void) -{ - desctbr_t r_bgdt, r_gdt; - user_desc_t *bgdt; - -#if !defined(__lint) - /* - * Our gdt is never larger than a single page. - */ - ASSERT((sizeof (*gdt0) * NGDT) <= PAGESIZE); -#endif - /* - * XXX this allocation belongs in our caller, not here. - */ - gdt0 = (user_desc_t *)BOP_ALLOC(bootops, (caddr_t)GDT_VA, - PAGESIZE, PAGESIZE); - bzero(gdt0, PAGESIZE); - - init_gdt_common(gdt0); - - /* - * Copy in from boot's gdt to our gdt entries. - * Entry 0 is null descriptor by definition. - */ - rd_gdtr(&r_bgdt); - bgdt = (user_desc_t *)r_bgdt.dtr_base; - if (bgdt == NULL) - panic("null boot gdt"); - - gdt0[GDT_B32DATA] = bgdt[GDT_B32DATA]; - gdt0[GDT_B32CODE] = bgdt[GDT_B32CODE]; - gdt0[GDT_B16CODE] = bgdt[GDT_B16CODE]; - gdt0[GDT_B16DATA] = bgdt[GDT_B16DATA]; - - /* - * Install our new GDT - */ - r_gdt.dtr_limit = (sizeof (*gdt0) * NGDT) - 1; - r_gdt.dtr_base = (uintptr_t)gdt0; - wr_gdtr(&r_gdt); - - /* - * Reload the segment registers to use the new GDT - */ - load_segment_registers( - KCS_SEL, KDS_SEL, KDS_SEL, KFS_SEL, KGS_SEL, KDS_SEL); - - return (gdt0); -} - -#endif /* __xpv */ -#endif /* __i386 */ /* * Build kernel IDT. @@ -1238,14 +1037,6 @@ init_desctbls(void) PAGESIZE, PAGESIZE); bzero(ktss0, PAGESIZE); -#if defined(__i386) -#if !defined(__lint) - ASSERT(sizeof (*dftss0) <= PAGESIZE); -#endif - dftss0 = (tss_t *)BOP_ALLOC(bootops, (caddr_t)DFTSS_VA, - PAGESIZE, PAGESIZE); - bzero(dftss0, PAGESIZE); -#endif /* * Setup and install our GDT. @@ -1272,13 +1063,6 @@ init_desctbls(void) wr_idtr(&idtr); CPU->cpu_idt = idt0; -#if defined(__i386) - /* - * We maintain a description of idt0 in convenient IDTR format - * for #pf's on some older pentium processors. See pentium_pftrap(). - */ - idt0_default_r = idtr; -#endif /* __i386 */ init_tss(); CPU->cpu_tss = ktss0; @@ -1320,17 +1104,10 @@ reset_gdtr_limit(void) void init_boot_gdt(user_desc_t *bgdt) { -#if defined(__amd64) set_usegd(&bgdt[GDT_B32DATA], SDP_LONG, NULL, -1, SDT_MEMRWA, SEL_KPL, SDP_PAGES, SDP_OP32); set_usegd(&bgdt[GDT_B64CODE], SDP_LONG, NULL, -1, SDT_MEMERA, SEL_KPL, SDP_PAGES, SDP_OP32); -#elif defined(__i386) - set_usegd(&bgdt[GDT_B32DATA], NULL, -1, SDT_MEMRWA, SEL_KPL, - SDP_PAGES, SDP_OP32); - set_usegd(&bgdt[GDT_B32CODE], NULL, -1, SDT_MEMERA, SEL_KPL, - SDP_PAGES, SDP_OP32); -#endif /* __i386 */ } /* @@ -1354,7 +1131,6 @@ brand_interpositioning_enable(void) #endif } -#if defined(__amd64) #if defined(__xpv) /* @@ -1378,7 +1154,6 @@ brand_interpositioning_enable(void) } #endif -#endif /* __amd64 */ if (is_x86_feature(x86_featureset, X86FSET_SEP)) { if (kpti_enable == 1) { @@ -1411,7 +1186,6 @@ brand_interpositioning_disable(void) #endif } -#if defined(__amd64) #if defined(__xpv) /* @@ -1433,7 +1207,6 @@ brand_interpositioning_disable(void) } #endif -#endif /* __amd64 */ if (is_x86_feature(x86_featureset, X86FSET_SEP)) { if (kpti_enable == 1) { diff --git a/usr/src/uts/intel/ia32/os/fpu.c b/usr/src/uts/intel/ia32/os/fpu.c index 9a02806b66..0037f49f85 100644 --- a/usr/src/uts/intel/ia32/os/fpu.c +++ b/usr/src/uts/intel/ia32/os/fpu.c @@ -513,17 +513,8 @@ const struct fxsave_state sse_initial = { 0, /* fx_fsw */ 0, /* fx_fctw */ 0, /* fx_fop */ -#if defined(__amd64) 0, /* fx_rip */ 0, /* fx_rdp */ -#else - 0, /* fx_eip */ - 0, /* fx_cs */ - 0, /* __fx_ign0 */ - 0, /* fx_dp */ - 0, /* fx_ds */ - 0, /* __fx_ign1 */ -#endif /* __amd64 */ SSE_MXCSR_INIT /* fx_mxcsr */ /* rest of structure is zero */ }; @@ -541,17 +532,8 @@ const struct xsave_state avx_initial = { 0, /* fx_fsw */ 0, /* fx_fctw */ 0, /* fx_fop */ -#if defined(__amd64) 0, /* fx_rip */ 0, /* fx_rdp */ -#else - 0, /* fx_eip */ - 0, /* fx_cs */ - 0, /* __fx_ign0 */ - 0, /* fx_dp */ - 0, /* fx_ds */ - 0, /* __fx_ign1 */ -#endif /* __amd64 */ SSE_MXCSR_INIT /* fx_mxcsr */ /* rest of structure is zero */ }, diff --git a/usr/src/uts/intel/ia32/os/sendsig.c b/usr/src/uts/intel/ia32/os/sendsig.c index b7b79f38ca..e3d60eb62b 100644 --- a/usr/src/uts/intel/ia32/os/sendsig.c +++ b/usr/src/uts/intel/ia32/os/sendsig.c @@ -99,7 +99,6 @@ * are correct on the error return from on_fault().) */ -#if defined(__amd64) /* * An amd64 signal frame looks like this on the stack: @@ -588,211 +587,3 @@ badstack: } #endif /* _SYSCALL32_IMPL */ - -#elif defined(__i386) - -/* - * An i386 SVR4/ABI signal frame looks like this on the stack: - * - * old %esp: - * <a siginfo32_t [optional]> - * <a ucontext32_t> - * <pointer to that ucontext32_t> - * <pointer to that siginfo32_t> - * <signo> - * new %esp: <return address (deliberately invalid)> - */ -struct sigframe { - void (*retaddr)(); - uint_t signo; - siginfo_t *sip; - ucontext_t *ucp; -}; - -int -sendsig(int sig, k_siginfo_t *sip, void (*hdlr)()) -{ - volatile int minstacksz; - int newstack; - label_t ljb; - volatile caddr_t sp; - caddr_t fp; - struct regs *rp; - volatile greg_t upc; - volatile proc_t *p = ttoproc(curthread); - klwp_t *lwp = ttolwp(curthread); - ucontext_t *volatile tuc = NULL; - ucontext_t *uc; - siginfo_t *sip_addr; - volatile int watched; - - rp = lwptoregs(lwp); - upc = rp->r_pc; - - minstacksz = SA(sizeof (struct sigframe)) + SA(sizeof (*uc)); - if (sip != NULL) - minstacksz += SA(sizeof (siginfo_t)); - ASSERT((minstacksz & (STACK_ALIGN - 1ul)) == 0); - - /* - * Figure out whether we will be handling this signal on - * an alternate stack specified by the user. Then allocate - * and validate the stack requirements for the signal handler - * context. on_fault will catch any faults. - */ - newstack = sigismember(&PTOU(curproc)->u_sigonstack, sig) && - !(lwp->lwp_sigaltstack.ss_flags & (SS_ONSTACK|SS_DISABLE)); - - if (newstack) { - fp = (caddr_t)(SA((uintptr_t)lwp->lwp_sigaltstack.ss_sp) + - SA(lwp->lwp_sigaltstack.ss_size) - STACK_ALIGN); - } else if ((rp->r_ss & 0xffff) != UDS_SEL) { - user_desc_t *ldt; - /* - * If the stack segment selector is -not- pointing at - * the UDS_SEL descriptor and we have an LDT entry for - * it instead, add the base address to find the effective va. - */ - if ((ldt = p->p_ldt) != NULL) - fp = (caddr_t)rp->r_sp + - USEGD_GETBASE(&ldt[SELTOIDX(rp->r_ss)]); - else - fp = (caddr_t)rp->r_sp; - } else - fp = (caddr_t)rp->r_sp; - - /* - * Force proper stack pointer alignment, even in the face of a - * misaligned stack pointer from user-level before the signal. - * Don't use the SA() macro because that rounds up, not down. - */ - fp = (caddr_t)((uintptr_t)fp & ~(STACK_ALIGN - 1ul)); - sp = fp - minstacksz; - - /* - * Make sure lwp hasn't trashed its stack. - */ - if (sp >= (caddr_t)USERLIMIT || fp >= (caddr_t)USERLIMIT) { -#ifdef DEBUG - printf("sendsig: bad signal stack cmd=%s, pid=%d, sig=%d\n", - PTOU(p)->u_comm, p->p_pid, sig); - printf("sigsp = 0x%p, action = 0x%p, upc = 0x%lx\n", - (void *)sp, (void *)hdlr, (uintptr_t)upc); - printf("sp above USERLIMIT\n"); -#endif - return (0); - } - - watched = watch_disable_addr((caddr_t)sp, minstacksz, S_WRITE); - - if (on_fault(&ljb)) - goto badstack; - - if (sip != NULL) { - zoneid_t zoneid; - - fp -= SA(sizeof (siginfo_t)); - uzero(fp, sizeof (siginfo_t)); - if (SI_FROMUSER(sip) && - (zoneid = p->p_zone->zone_id) != GLOBAL_ZONEID && - zoneid != sip->si_zoneid) { - k_siginfo_t sani_sip = *sip; - - sani_sip.si_pid = p->p_zone->zone_zsched->p_pid; - sani_sip.si_uid = 0; - sani_sip.si_ctid = -1; - sani_sip.si_zoneid = zoneid; - copyout_noerr(&sani_sip, fp, sizeof (sani_sip)); - } else - copyout_noerr(sip, fp, sizeof (*sip)); - sip_addr = (siginfo_t *)fp; - - if (sig == SIGPROF && - curthread->t_rprof != NULL && - curthread->t_rprof->rp_anystate) { - /* - * We stand on our head to deal with - * the real time profiling signal. - * Fill in the stuff that doesn't fit - * in a normal k_siginfo structure. - */ - int i = sip->si_nsysarg; - - while (--i >= 0) - suword32_noerr(&(sip_addr->si_sysarg[i]), - (uint32_t)lwp->lwp_arg[i]); - copyout_noerr(curthread->t_rprof->rp_state, - sip_addr->si_mstate, - sizeof (curthread->t_rprof->rp_state)); - } - } else - sip_addr = NULL; - - /* save the current context on the user stack */ - fp -= SA(sizeof (*tuc)); - uc = (ucontext_t *)fp; - tuc = kmem_alloc(sizeof (*tuc), KM_SLEEP); - savecontext(tuc, &lwp->lwp_sigoldmask); - copyout_noerr(tuc, uc, sizeof (*tuc)); - kmem_free(tuc, sizeof (*tuc)); - tuc = NULL; - - lwp->lwp_oldcontext = (uintptr_t)uc; - - if (newstack) { - lwp->lwp_sigaltstack.ss_flags |= SS_ONSTACK; - if (lwp->lwp_ustack) - copyout_noerr(&lwp->lwp_sigaltstack, - (stack_t *)lwp->lwp_ustack, sizeof (stack_t)); - } - - /* - * Set up signal handler arguments - */ - { - struct sigframe frame; - - frame.sip = sip_addr; - frame.ucp = uc; - frame.signo = sig; - frame.retaddr = (void (*)())0xffffffff; /* never return! */ - copyout_noerr(&frame, sp, sizeof (frame)); - } - - no_fault(); - if (watched) - watch_enable_addr((caddr_t)sp, minstacksz, S_WRITE); - - rp->r_sp = (greg_t)sp; - rp->r_pc = (greg_t)hdlr; - rp->r_ps = PSL_USER | (rp->r_ps & PS_IOPL); - - if ((rp->r_cs & 0xffff) != UCS_SEL || - (rp->r_ss & 0xffff) != UDS_SEL) { - rp->r_cs = UCS_SEL; - rp->r_ss = UDS_SEL; - } - - /* - * Don't set lwp_eosys here. sendsig() is called via psig() after - * lwp_eosys is handled, so setting it here would affect the next - * system call. - */ - return (1); - -badstack: - no_fault(); - if (watched) - watch_enable_addr((caddr_t)sp, minstacksz, S_WRITE); - if (tuc) - kmem_free(tuc, sizeof (*tuc)); -#ifdef DEBUG - printf("sendsig: bad signal stack cmd=%s, pid=%d, sig=%d\n", - PTOU(p)->u_comm, p->p_pid, sig); - printf("on fault, sigsp = 0x%p, action = 0x%p, upc = 0x%lx\n", - (void *)sp, (void *)hdlr, (uintptr_t)upc); -#endif - return (0); -} - -#endif /* __i386 */ diff --git a/usr/src/uts/intel/ia32/os/sundep.c b/usr/src/uts/intel/ia32/os/sundep.c index 8a5562f4ad..80e149f01b 100644 --- a/usr/src/uts/intel/ia32/os/sundep.c +++ b/usr/src/uts/intel/ia32/os/sundep.c @@ -389,7 +389,6 @@ lwp_setsp(klwp_t *lwp, caddr_t sp) void lwp_forkregs(klwp_t *lwp, klwp_t *clwp) { -#if defined(__amd64) struct pcb *pcb = &clwp->lwp_pcb; struct regs *rp = lwptoregs(lwp); @@ -402,7 +401,6 @@ lwp_forkregs(klwp_t *lwp, klwp_t *clwp) lwptot(clwp)->t_post_sys = 1; } ASSERT(lwptot(clwp)->t_post_sys); -#endif fp_lwp_dup(clwp); @@ -461,7 +459,6 @@ lwp_pcb_exit(void) void lwp_segregs_save(klwp_t *lwp) { -#if defined(__amd64) pcb_t *pcb = &lwp->lwp_pcb; struct regs *rp; @@ -485,7 +482,6 @@ lwp_segregs_save(klwp_t *lwp) PCB_SET_UPDATE_SEGS(pcb); lwp->lwp_thread->t_post_sys = 1; } -#endif /* __amd64 */ #if !defined(__xpv) /* XXPV not sure if we can re-read gdt? */ ASSERT(bcmp(&CPU->cpu_gdt[GDT_LWPFS], &lwp->lwp_pcb.pcb_fsdesc, @@ -495,8 +491,6 @@ lwp_segregs_save(klwp_t *lwp) #endif } -#if defined(__amd64) - /* * Update the segment registers with new values from the pcb. * @@ -675,7 +669,6 @@ reset_sregs(void) __set_fs(KFS_SEL); } -#endif /* __amd64 */ #ifdef _SYSCALL32_IMPL @@ -870,12 +863,7 @@ lwp_installctx(klwp_t *lwp) * it to the lwp's kernel stack pointer (kstktop). */ if (is_x86_feature(x86_featureset, X86FSET_SEP)) { -#if defined(__amd64) caddr_t kstktop = (caddr_t)lwp->lwp_regs; -#elif defined(__i386) - caddr_t kstktop = ((caddr_t)lwp->lwp_regs - MINFRAME) + - SA(sizeof (struct regs) + MINFRAME); -#endif ASSERT(removectx(t, kstktop, sep_save, sep_restore, NULL, NULL, NULL, NULL) == 0); @@ -926,8 +914,6 @@ setregs(uarg_t *args) rp->r_pc = args->entry; rp->r_ps = PSL_USER; -#if defined(__amd64) - pcb->pcb_fs = pcb->pcb_gs = 0; pcb->pcb_fsbase = pcb->pcb_gsbase = 0; @@ -979,27 +965,6 @@ setregs(uarg_t *args) pcb->pcb_es = rp->r_es; PCB_SET_UPDATE_SEGS(pcb); -#elif defined(__i386) - - rp->r_cs = UCS_SEL; - rp->r_ds = rp->r_es = UDS_SEL; - - /* - * Arrange that the virtualized %fs and %gs GDT descriptors - * have a well-defined initial state (present, ring 3 - * and of type data). - */ - pcb->pcb_fsdesc = pcb->pcb_gsdesc = zero_udesc; - - /* - * For %gs we need to reset LWP_GSBASE in pcb and the - * per-cpu GDT descriptor. thrptr is either NULL - * or a value used by DTrace. - */ - if (args->thrptr) - (void) lwp_setprivate(lwp, _LWP_GSBASE, args->thrptr); -#endif - lwp->lwp_eosys = JUSTRETURN; t->t_post_sys = 1; diff --git a/usr/src/uts/intel/ia32/os/syscall.c b/usr/src/uts/intel/ia32/os/syscall.c index 379b4d0e35..6cf4293ff4 100644 --- a/usr/src/uts/intel/ia32/os/syscall.c +++ b/usr/src/uts/intel/ia32/os/syscall.c @@ -1100,14 +1100,12 @@ syscall_ap(void) callp = LWP_GETSYSENT(lwp) + t->t_sysnum; -#if defined(__amd64) /* * If the arguments don't fit in registers %rdi-%r9, make sure they * have been copied to the lwp_arg array. */ if (callp->sy_narg > 6 && save_syscall_args()) return ((int64_t)set_errno(EFAULT)); -#endif rval.r_val1 = 0; rval.r_val2 = rp->r_r1; diff --git a/usr/src/uts/intel/ia32/os/sysi86.c b/usr/src/uts/intel/ia32/os/sysi86.c index 03796bc9e9..b107afddfb 100644 --- a/usr/src/uts/intel/ia32/os/sysi86.c +++ b/usr/src/uts/intel/ia32/os/sysi86.c @@ -268,11 +268,7 @@ usd_to_ssd(user_desc_t *usd, struct ssd *ssd, selector_t sel) */ ssd->acc2 = usd->usd_avl; -#if defined(__amd64) ssd->acc2 |= usd->usd_long << 1; -#else - ssd->acc2 |= usd->usd_reserved << 1; -#endif ssd->acc2 |= usd->usd_def32 << (1 + 1); ssd->acc2 |= usd->usd_gran << (1 + 1 + 1); @@ -304,11 +300,7 @@ ssd_to_usd(struct ssd *ssd, user_desc_t *usd) * 64-bit code selectors are never allowed in the LDT. * Reserved bit is always 0 on 32-bit systems. */ -#if defined(__amd64) usd->usd_long = 0; -#else - usd->usd_reserved = 0; -#endif /* * set avl, DB and granularity bits. @@ -319,31 +311,6 @@ ssd_to_usd(struct ssd *ssd, user_desc_t *usd) } -#if defined(__i386) - -static void -ssd_to_sgd(struct ssd *ssd, gate_desc_t *sgd) -{ - - ASSERT(bcmp(sgd, &null_sdesc, sizeof (*sgd)) == 0); - - sgd->sgd_looffset = ssd->bo; - sgd->sgd_hioffset = ssd->bo >> 16; - - sgd->sgd_selector = ssd->ls; - - /* - * set type, dpl and present bits. - */ - sgd->sgd_type = ssd->acc1; - sgd->sgd_dpl = ssd->acc1 >> 5; - sgd->sgd_p = ssd->acc1 >> 7; - ASSERT(sgd->sgd_type == SDT_SYSCGT); - ASSERT(sgd->sgd_dpl == SEL_UPL); - sgd->sgd_stkcpy = 0; -} - -#endif /* __i386 */ /* * Load LDT register with the current process's LDT. @@ -396,7 +363,6 @@ ldt_savectx(proc_t *p) ASSERT(p->p_ldt != NULL); ASSERT(p == curproc); -#if defined(__amd64) /* * The 64-bit kernel must be sure to clear any stale ldt * selectors when context switching away from a process that @@ -415,7 +381,6 @@ ldt_savectx(proc_t *p) * ldtr register pointing to the private ldt. */ reset_sregs(); -#endif ldt_unload(); cpu_fast_syscall_enable(); @@ -618,16 +583,13 @@ setdscr(struct ssd *ssd) do { klwp_t *lwp = ttolwp(t); struct regs *rp = lwp->lwp_regs; -#if defined(__amd64) pcb_t *pcb = &lwp->lwp_pcb; -#endif if (ssd->sel == rp->r_cs || ssd->sel == rp->r_ss) { bad = 1; break; } -#if defined(__amd64) if (PCB_NEED_UPDATE_SEGS(pcb)) { if (ssd->sel == pcb->pcb_ds || ssd->sel == pcb->pcb_es || @@ -636,9 +598,7 @@ setdscr(struct ssd *ssd) bad = 1; break; } - } else -#endif - { + } else { if (ssd->sel == rp->r_ds || ssd->sel == rp->r_es || ssd->sel == rp->r_fs || diff --git a/usr/src/uts/intel/ia32/promif/prom_enter.c b/usr/src/uts/intel/ia32/promif/prom_enter.c index ba61f1e767..12da5a6903 100644 --- a/usr/src/uts/intel/ia32/promif/prom_enter.c +++ b/usr/src/uts/intel/ia32/promif/prom_enter.c @@ -39,10 +39,6 @@ void prom_enter_mon(void) { -#if defined(I386BOOT) - return; -#endif - #if defined(_KMDB) prom_exit_to_mon(); #endif diff --git a/usr/src/uts/intel/ia32/promif/prom_exit.c b/usr/src/uts/intel/ia32/promif/prom_exit.c index a197cdc165..e4027448fa 100644 --- a/usr/src/uts/intel/ia32/promif/prom_exit.c +++ b/usr/src/uts/intel/ia32/promif/prom_exit.c @@ -48,18 +48,13 @@ prom_exit_to_mon(void) #if !defined(_KMDB) prom_poll_enter(); #endif -#ifdef I386BOOT - prom_printf("[spinning forever]\n"); - for (;;) - continue; -#else + #if !defined(_KMDB) if (boothowto & RB_DEBUG) kmdb_enter(); #endif /* !_KMDB */ prom_reboot_prompt(); prom_reboot(NULL); -#endif /* !I386BOOT */ } #if !defined(_KMDB) diff --git a/usr/src/uts/intel/ia32/promif/prom_panic.c b/usr/src/uts/intel/ia32/promif/prom_panic.c index 7fbd81cec2..2893281fdc 100644 --- a/usr/src/uts/intel/ia32/promif/prom_panic.c +++ b/usr/src/uts/intel/ia32/promif/prom_panic.c @@ -39,12 +39,7 @@ prom_panic(char *s) if (s == NULL) s = "unknown panic"; -#if defined(I386BOOT) - prom_printf(fmt, "boot", s); - for (;;) - continue; - /*NOTREACHED*/ -#elif defined(_KMDB) +#if defined(_KMDB) prom_printf(fmt, "kmdb", s); #elif defined(_KERNEL) prom_printf(fmt, "kernel", s); diff --git a/usr/src/uts/intel/ia32/syscall/lwp_private.c b/usr/src/uts/intel/ia32/syscall/lwp_private.c index 479a800d9a..50331a2899 100644 --- a/usr/src/uts/intel/ia32/syscall/lwp_private.c +++ b/usr/src/uts/intel/ia32/syscall/lwp_private.c @@ -48,7 +48,6 @@ lwp_setprivate(klwp_t *lwp, int which, uintptr_t base) if (thisthread) kpreempt_disable(); -#if defined(__amd64) /* * 32-bit compatibility processes point to the per-cpu GDT segment @@ -117,37 +116,6 @@ lwp_setprivate(klwp_t *lwp, int which, uintptr_t base) break; } -#elif defined(__i386) - - /* - * 32-bit processes point to the per-cpu GDT segment - * descriptors that are virtualized to the lwp. - */ - - switch (which) { - case _LWP_FSBASE: - set_usegd(&pcb->pcb_fsdesc, (void *)base, -1, - SDT_MEMRWA, SEL_UPL, SDP_PAGES, SDP_OP32); - if (thisthread) - gdt_update_usegd(GDT_LWPFS, &pcb->pcb_fsdesc); - - rval = rp->r_fs = LWPFS_SEL; - break; - case _LWP_GSBASE: - set_usegd(&pcb->pcb_gsdesc, (void *)base, -1, - SDT_MEMRWA, SEL_UPL, SDP_PAGES, SDP_OP32); - if (thisthread) - gdt_update_usegd(GDT_LWPGS, &pcb->pcb_gsdesc); - - rval = rp->r_gs = LWPGS_SEL; - break; - default: - rval = -1; - break; - } - -#endif /* __i386 */ - if (thisthread) kpreempt_enable(); return (rval); @@ -165,8 +133,6 @@ lwp_getprivate(klwp_t *lwp, int which, uintptr_t base) kpreempt_disable(); switch (which) { -#if defined(__amd64) - case _LWP_FSBASE: if ((sbase = pcb->pcb_fsbase) != 0) { if (lwp_getdatamodel(lwp) == DATAMODEL_NATIVE) { @@ -212,24 +178,6 @@ lwp_getprivate(klwp_t *lwp, int which, uintptr_t base) error = EINVAL; break; -#elif defined(__i386) - - case _LWP_FSBASE: - if (rp->r_fs == LWPFS_SEL) { - sbase = USEGD_GETBASE(&pcb->pcb_fsdesc); - break; - } - error = EINVAL; - break; - case _LWP_GSBASE: - if (rp->r_gs == LWPGS_SEL) { - sbase = USEGD_GETBASE(&pcb->pcb_gsdesc); - break; - } - error = EINVAL; - break; - -#endif /* __i386 */ default: error = ENOTSUP; diff --git a/usr/src/uts/intel/io/dktp/disk/cmdk.c b/usr/src/uts/intel/io/dktp/disk/cmdk.c index 628b0a60af..3d0ba2842d 100644 --- a/usr/src/uts/intel/io/dktp/disk/cmdk.c +++ b/usr/src/uts/intel/io/dktp/disk/cmdk.c @@ -139,20 +139,20 @@ static int cmdkawrite(dev_t dev, struct aio_req *aio, cred_t *credp); */ static struct cb_ops cmdk_cb_ops = { - cmdkopen, /* open */ - cmdkclose, /* close */ - cmdkstrategy, /* strategy */ - nodev, /* print */ - cmdkdump, /* dump */ - cmdkread, /* read */ - cmdkwrite, /* write */ - cmdkioctl, /* ioctl */ - nodev, /* devmap */ - nodev, /* mmap */ - nodev, /* segmap */ - nochpoll, /* poll */ - cmdk_prop_op, /* cb_prop_op */ - 0, /* streamtab */ + cmdkopen, /* open */ + cmdkclose, /* close */ + cmdkstrategy, /* strategy */ + nodev, /* print */ + cmdkdump, /* dump */ + cmdkread, /* read */ + cmdkwrite, /* write */ + cmdkioctl, /* ioctl */ + nodev, /* devmap */ + nodev, /* mmap */ + nodev, /* segmap */ + nochpoll, /* poll */ + cmdk_prop_op, /* cb_prop_op */ + 0, /* streamtab */ D_64BIT | D_MP | D_NEW, /* Driver comaptibility flag */ CB_REV, /* cb_rev */ cmdkaread, /* async read */ @@ -171,15 +171,15 @@ static int cmdksuspend(dev_info_t *dip); static int cmdkpower(dev_info_t *dip, int component, int level); struct dev_ops cmdk_ops = { - DEVO_REV, /* devo_rev, */ - 0, /* refcnt */ + DEVO_REV, /* devo_rev, */ + 0, /* refcnt */ cmdkinfo, /* info */ - nulldev, /* identify */ - cmdkprobe, /* probe */ - cmdkattach, /* attach */ + nulldev, /* identify */ + cmdkprobe, /* probe */ + cmdkattach, /* attach */ cmdkdetach, /* detach */ - nodev, /* reset */ - &cmdk_cb_ops, /* driver operations */ + nodev, /* reset */ + &cmdk_cb_ops, /* driver operations */ (struct bus_ops *)0, /* bus operations */ cmdkpower, /* power */ ddi_quiesce_not_needed, /* quiesce */ @@ -193,7 +193,7 @@ struct dev_ops cmdk_ops = { static struct modldrv modldrv = { &mod_driverops, /* Type of module. This one is a driver */ "Common Direct Access Disk", - &cmdk_ops, /* driver ops */ + &cmdk_ops, /* driver ops */ }; static struct modlinkage modlinkage = { @@ -243,7 +243,7 @@ cmdk_isopen(struct cmdk *dkp, dev_t dev) int _init(void) { - int rval; + int rval; if (rval = ddi_soft_state_init(&cmdk_state, sizeof (struct cmdk), 7)) return (rval); @@ -274,7 +274,7 @@ _info(struct modinfo *modinfop) static int cmdkprobe(dev_info_t *dip) { - int instance; + int instance; int status; struct cmdk *dkp; @@ -328,9 +328,9 @@ cmdkprobe(dev_info_t *dip) static int cmdkattach(dev_info_t *dip, ddi_attach_cmd_t cmd) { - int instance; + int instance; struct cmdk *dkp; - char *node_type; + char *node_type; switch (cmd) { case DDI_ATTACH: @@ -365,18 +365,6 @@ cmdkattach(dev_info_t *dip, ddi_attach_cmd_t cmd) if (dadk_open(DKTP_DATA, 0) != DDI_SUCCESS) goto fail2; -#ifdef _ILP32 - { - struct tgdk_geom phyg; - (void) dadk_getphygeom(DKTP_DATA, &phyg); - if ((phyg.g_cap - 1) > DK_MAX_BLOCKS) { - (void) dadk_close(DKTP_DATA); - goto fail2; - } - } -#endif - - /* mark as having opened target */ dkp->dk_flag |= CMDK_TGDK_OPEN; @@ -443,7 +431,7 @@ static int cmdkdetach(dev_info_t *dip, ddi_detach_cmd_t cmd) { struct cmdk *dkp; - int instance; + int instance; int max_instance; switch (cmd) { @@ -518,7 +506,7 @@ static int cmdkinfo(dev_info_t *dip, ddi_info_cmd_t infocmd, void *arg, void **result) { dev_t dev = (dev_t)arg; - int instance; + int instance; struct cmdk *dkp; #ifdef lint @@ -711,7 +699,7 @@ cmdk_prop_op(dev_t dev, dev_info_t *dip, ddi_prop_op_t prop_op, int mod_flags, static int cmdkdump(dev_t dev, caddr_t addr, daddr_t blkno, int nblk) { - int instance; + int instance; struct cmdk *dkp; diskaddr_t p_lblksrt; diskaddr_t p_lblkcnt; @@ -754,7 +742,7 @@ cmdkdump(dev_t dev, caddr_t addr, daddr_t blkno, int nblk) } /* - * Copy in the dadkio_rwcmd according to the user's data model. If needed, + * Copy in the dadkio_rwcmd according to the user's data model. If needed, * convert it for our internal use. */ static int @@ -842,10 +830,10 @@ rwcmd_copyout(struct dadkio_rwcmd *rwcmdp, caddr_t outaddr, int flag) static int cmdkioctl(dev_t dev, int cmd, intptr_t arg, int flag, cred_t *credp, int *rvalp) { - int instance; + int instance; struct scsi_device *devp; struct cmdk *dkp; - char data[NBPSCTR]; + char data[NBPSCTR]; instance = CMDKUNIT(dev); if (!(dkp = ddi_get_soft_state(cmdk_state, instance))) @@ -863,7 +851,7 @@ cmdkioctl(dev_t dev, int cmd, intptr_t arg, int flag, cred_t *credp, int *rvalp) case DKIOCGMEDIAINFO: { struct dk_minfo media_info; - struct tgdk_geom phyg; + struct tgdk_geom phyg; /* dadk_getphygeom always returns success */ (void) dadk_getphygeom(DKTP_DATA, &phyg); @@ -1039,7 +1027,7 @@ cmdkclose(dev_t dev, int flag, int otyp, cred_t *credp) { int part; ulong_t partbit; - int instance; + int instance; struct cmdk *dkp; int lastclose = 1; int i; @@ -1102,9 +1090,9 @@ static int cmdkopen(dev_t *dev_p, int flag, int otyp, cred_t *credp) { dev_t dev = *dev_p; - int part; + int part; ulong_t partbit; - int instance; + int instance; struct cmdk *dkp; diskaddr_t p_lblksrt; diskaddr_t p_lblkcnt; @@ -1238,7 +1226,7 @@ cmdkmin(struct buf *bp) static int cmdkrw(dev_t dev, struct uio *uio, int flag) { - int instance; + int instance; struct cmdk *dkp; instance = CMDKUNIT(dev); @@ -1257,7 +1245,7 @@ cmdkrw(dev_t dev, struct uio *uio, int flag) static int cmdkarw(dev_t dev, struct aio_req *aio, int flag) { - int instance; + int instance; struct cmdk *dkp; instance = CMDKUNIT(dev); @@ -1279,8 +1267,8 @@ cmdkarw(dev_t dev, struct aio_req *aio, int flag) static int cmdkstrategy(struct buf *bp) { - int instance; - struct cmdk *dkp; + int instance; + struct cmdk *dkp; long d_cnt; diskaddr_t p_lblksrt; diskaddr_t p_lblkcnt; @@ -1517,7 +1505,7 @@ cmdk_lb_getinfo(dev_info_t *dip, int cmd, void *arg, void *tg_cookie) /* * If the controller returned us something that doesn't * really fit into an Int 13/function 8 geometry - * result, just fail the ioctl. See PSARC 1998/313. + * result, just fail the ioctl. See PSARC 1998/313. */ if (capacity < 0 || capacity >= 63 * 254 * 1024) return (EINVAL); @@ -1758,7 +1746,7 @@ err: static int cmdk_devid_fabricate(struct cmdk *dkp) { - ddi_devid_t devid = NULL; /* devid made by ddi_devid_init */ + ddi_devid_t devid = NULL; /* devid made by ddi_devid_init */ struct dk_devid *dkdevidp; /* devid struct stored on disk */ diskaddr_t blk; tgdk_iob_handle handle = NULL; @@ -1833,7 +1821,7 @@ cmdk_bbh_free_alts(struct cmdk *dkp) static void cmdk_bbh_reopen(struct cmdk *dkp) { - tgdk_iob_handle handle = NULL; + tgdk_iob_handle handle = NULL; diskaddr_t slcb, slcn, slce; struct alts_parttbl *ap; struct alts_ent *enttblp; @@ -2012,12 +2000,12 @@ cmdk_bbh_freehandle(opaque_t bbh_data, opaque_t handle) * case 1: ddddd * case 2: -d----- * case 3: ddddd - * case 4: dddddddddddd + * case 4: dddddddddddd * case 5: ddddddd----- - * case 6: ---ddddddd - * case 7: ddddddd + * case 6: ---ddddddd + * case 7: ddddddd * - * where: g = good sector, b = bad sector + * where: g = good sector, b = bad sector * d = sector in disk section * - = disk section may be extended to cover those disk area */ diff --git a/usr/src/uts/intel/kdi/kdi_idt.c b/usr/src/uts/intel/kdi/kdi_idt.c index 58be698975..1505c7bfcf 100644 --- a/usr/src/uts/intel/kdi/kdi_idt.c +++ b/usr/src/uts/intel/kdi/kdi_idt.c @@ -98,13 +98,6 @@ static kdi_main_t kdi_kmdb_main; kdi_drreg_t kdi_drreg; -#ifndef __amd64 -/* Used to track the current set of valid kernel selectors. */ -uint32_t kdi_cs; -uint32_t kdi_ds; -uint32_t kdi_fs; -uint32_t kdi_gs; -#endif uintptr_t kdi_kernel_handler; @@ -331,12 +324,6 @@ kdi_activate(kdi_main_t main, kdi_cpusave_t *cpusave, uint_t ncpusave) else kdi_idt_init(KCS_SEL); - /* The initial selector set. Updated by the debugger-entry code */ -#ifndef __amd64 - kdi_cs = B32CODE_SEL; - kdi_ds = kdi_fs = kdi_gs = B32DATA_SEL; -#endif - kdi_memranges[0].mr_base = kdi_segdebugbase; kdi_memranges[0].mr_lim = kdi_segdebugbase + kdi_segdebugsize - 1; kdi_nmemranges = 1; diff --git a/usr/src/uts/intel/os/arch_kdi.c b/usr/src/uts/intel/os/arch_kdi.c index 9677013ea5..9fda4475ce 100644 --- a/usr/src/uts/intel/os/arch_kdi.c +++ b/usr/src/uts/intel/os/arch_kdi.c @@ -78,13 +78,11 @@ kdi_gdt2cpu(uintptr_t gdtbase) return (NULL); } -#if defined(__amd64) uintptr_t kdi_gdt2gsbase(uintptr_t gdtbase) { return ((uintptr_t)kdi_gdt2cpu(gdtbase)); } -#endif static uintptr_t kdi_get_userlimit(void) diff --git a/usr/src/uts/intel/sys/x86_archext.h b/usr/src/uts/intel/sys/x86_archext.h index 1e63b80cab..31b63dfe69 100644 --- a/usr/src/uts/intel/sys/x86_archext.h +++ b/usr/src/uts/intel/sys/x86_archext.h @@ -1272,8 +1272,6 @@ extern const char *cpuid_getchiprevstr(struct cpu *); extern uint32_t cpuid_getsockettype(struct cpu *); extern const char *cpuid_getsocketstr(struct cpu *); -extern int cpuid_have_cr8access(struct cpu *); - extern int cpuid_opteron_erratum(struct cpu *, uint_t); struct cpuid_info; diff --git a/usr/src/uts/sun/io/dada/impl/dcd_resource.c b/usr/src/uts/sun/io/dada/impl/dcd_resource.c index 233ab63f75..a571cce107 100644 --- a/usr/src/uts/sun/io/dada/impl/dcd_resource.c +++ b/usr/src/uts/sun/io/dada/impl/dcd_resource.c @@ -24,8 +24,6 @@ * Use is subject to license terms. */ -#pragma ident "%Z%%M% %I% %E% SMI" - #include <sys/dada/dada.h> #include <sys/vtrace.h> @@ -56,12 +54,12 @@ static ddi_dma_attr_t standard_dma_attr = { struct buf * dcd_alloc_consistent_buf(struct dcd_address *ap, - struct buf *in_bp, size_t datalen, uint_t bflags, - int (*callback)(caddr_t), caddr_t callback_arg) + struct buf *in_bp, size_t datalen, uint_t bflags, + int (*callback)(caddr_t), caddr_t callback_arg) { dev_info_t *pdip; - struct buf *bp; + struct buf *bp; int kmflag; size_t rlen; @@ -117,29 +115,29 @@ dcd_free_consistent_buf(struct buf *bp) struct dcd_pkt * dcd_init_pkt(struct dcd_address *ap, struct dcd_pkt *in_pktp, - struct buf *bp, int cmdlen, int statuslen, int pplen, - int flags, int (*callback)(caddr_t), caddr_t callback_arg) + struct buf *bp, int cmdlen, int statuslen, int pplen, + int flags, int (*callback)(caddr_t), caddr_t callback_arg) { struct dcd_pkt *pktp; dcd_hba_tran_t *tranp = ap->a_hba_tran; int (*func)(caddr_t); -#if defined(__i386) || defined(__amd64) +#if defined(__x86) if (flags & PKT_CONSISTENT_OLD) { flags &= ~PKT_CONSISTENT_OLD; flags |= PKT_CONSISTENT; } -#endif /* __i386 || __amd64 */ +#endif /* __x86 */ func = (callback == SLEEP_FUNC) ? SLEEP_FUNC : NULL_FUNC; pktp = (*tranp->tran_init_pkt)(ap, in_pktp, bp, cmdlen, - statuslen, pplen, flags, func, NULL); + statuslen, pplen, flags, func, NULL); if (pktp == NULL) { if (callback != NULL_FUNC && callback != SLEEP_FUNC) { ddi_set_callback(callback, callback_arg, - &dcd_callback_id); + &dcd_callback_id); } } @@ -162,7 +160,7 @@ dcd_destroy_pkt(struct dcd_pkt *pkt) struct dcd_pkt * dcd_resalloc(struct dcd_address *ap, int cmdlen, int statuslen, - ataopaque_t dmatoken, int (*callback)()) + ataopaque_t dmatoken, int (*callback)()) { register struct dcd_pkt *pkt; @@ -172,7 +170,7 @@ dcd_resalloc(struct dcd_address *ap, int cmdlen, int statuslen, func = (callback == SLEEP_FUNC) ? SLEEP_FUNC: NULL_FUNC; pkt = (*tranp->tran_init_pkt) (ap, NULL, (struct buf *)dmatoken, - cmdlen, statuslen, 0, 0, func, NULL); + cmdlen, statuslen, 0, 0, func, NULL); if (pkt == NULL) { if (callback != NULL_FUNC && callback != SLEEP_FUNC) { @@ -185,18 +183,18 @@ dcd_resalloc(struct dcd_address *ap, int cmdlen, int statuslen, struct dcd_pkt * dcd_pktalloc(struct dcd_address *ap, int cmdlen, int statuslen, - int (*callback)()) + int (*callback)()) { - struct dcd_pkt *pkt; + struct dcd_pkt *pkt; struct dcd_hba_tran *tran = ap->a_hba_tran; - register int (*func)(caddr_t); + register int (*func)(caddr_t); func = (callback == SLEEP_FUNC) ? SLEEP_FUNC: NULL_FUNC; pkt = (*tran->tran_init_pkt) (ap, NULL, NULL, cmdlen, statuslen, - 0, 0, func, NULL); + 0, 0, func, NULL); if (pkt == NULL) { if (callback != NULL_FUNC && callback != SLEEP_FUNC) { ddi_set_callback(callback, NULL, &dcd_callback_id); @@ -216,7 +214,7 @@ dcd_dmaget(struct dcd_pkt *pkt, ataopaque_t dmatoken, int (*callback)()) func = (callback == SLEEP_FUNC) ? SLEEP_FUNC : NULL_FUNC; new_pkt = (*P_TO_TRAN(pkt)->tran_init_pkt) (&pkt->pkt_address, - pkt, (struct buf *)dmatoken, 0, 0, 0, 0, func, NULL); + pkt, (struct buf *)dmatoken, 0, 0, 0, 0, func, NULL); ASSERT(new_pkt == pkt || new_pkt == NULL); if (new_pkt == NULL) { |