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| author | Jerry Jelinek <jerry.jelinek@joyent.com> | 2019-01-11 16:14:51 +0000 |
|---|---|---|
| committer | Jerry Jelinek <jerry.jelinek@joyent.com> | 2019-01-11 16:14:51 +0000 |
| commit | f71ba392979f4bf986e8f5c217d8821e27552356 (patch) | |
| tree | f0f891eb95a85fe32809d1462945d9c39aba9c44 | |
| parent | 882fee1ee6c160a1c4cb56a4874b0039ff1410c0 (diff) | |
| download | illumos-joyent-f71ba392979f4bf986e8f5c217d8821e27552356.tar.gz | |
9747 Implement CPU autoreplace based on Intel PPIN [fis mismerge]
| -rw-r--r-- | usr/src/uts/intel/sys/x86_archext.h | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/usr/src/uts/intel/sys/x86_archext.h b/usr/src/uts/intel/sys/x86_archext.h index ca629c0a79..13f488457c 100644 --- a/usr/src/uts/intel/sys/x86_archext.h +++ b/usr/src/uts/intel/sys/x86_archext.h @@ -907,19 +907,6 @@ extern "C" { #define INTC_MODEL_DENVERTON 0x5f #define INTC_MODEL_GEMINI_LAKE 0x7a - -/* - * Definitions for Intel processor models. Note, these model values can overlap - * in a given family. Processor models are added here on an as needed basis. The - * Xeon extension here is to refer to what has been called the EP/EX lines or - * E5/E7, generally multi-socket capable processors. - */ -#define INTC_MODEL_IVYBRIDGE_XEON 0x3E -#define INTC_MODEL_HASWELL_XEON 0x3F -#define INTC_MODEL_BROADWELL_XEON 0x4F -#define INTC_MODEL_BROADWELL_XEON_D 0x56 -#define INTC_MODEL_SKYLAKE_XEON 0x55 - /* * xgetbv/xsetbv support * See section 13.3 in vol. 1 of the Intel devlopers manual. |