14578 bhyve upstream sync 2022 March

14493 Three small memory leaks in bhyve
Reviewed by: Patrick Mooney <pmooney@pfmooney.com>
Approved by: Dan McDonald <danmcd@mnx.io>

1 files changed, 91 insertions, 20 deletions

diff --git a/usr/src/contrib/bhyve/dev/nvme/nvme.h b/usr/src/contrib/bhyve/dev/nvme/nvme.h
index 6fbf2b758f..2f393ea1d1 100644
--- a/usr/src/contrib/bhyve/dev/nvme/nvme.h
+++ b/usr/src/contrib/bhyve/dev/nvme/nvme.h
@@ -251,6 +251,35 @@
 #define NVME_CTRLR_DATA_MIC_ANAR_SHIFT			(3)
 #define NVME_CTRLR_DATA_MIC_ANAR_MASK			(0x1)
 
+/** OAES - Optional Asynchronous Events Supported */
+/* supports Namespace Attribute Notices event */
+#define NVME_CTRLR_DATA_OAES_NS_ATTR_SHIFT		(8)
+#define NVME_CTRLR_DATA_OAES_NS_ATTR_MASK		(0x1)
+/* supports Firmware Activation Notices event */
+#define NVME_CTRLR_DATA_OAES_FW_ACTIVATE_SHIFT		(9)
+#define NVME_CTRLR_DATA_OAES_FW_ACTIVATE_MASK		(0x1)
+/* supports Asymmetric Namespace Access Change Notices event */
+#define NVME_CTRLR_DATA_OAES_ASYM_NS_CHANGE_SHIFT	(11)
+#define NVME_CTRLR_DATA_OAES_ASYM_NS_CHANGE_MASK	(0x1)
+/* supports Predictable Latency Event Aggregate Log Change Notices event */
+#define NVME_CTRLR_DATA_OAES_PREDICT_LATENCY_SHIFT	(12)
+#define NVME_CTRLR_DATA_OAES_PREDICT_LATENCY_MASK	(0x1)
+/* supports LBA Status Information Notices event */
+#define NVME_CTRLR_DATA_OAES_LBA_STATUS_SHIFT		(13)
+#define NVME_CTRLR_DATA_OAES_LBA_STATUS_MASK		(0x1)
+/* supports Endurance Group Event Aggregate Log Page Changes Notices event */
+#define NVME_CTRLR_DATA_OAES_ENDURANCE_GROUP_SHIFT	(14)
+#define NVME_CTRLR_DATA_OAES_ENDURANCE_GROUP_MASK	(0x1)
+/* supports Normal NVM Subsystem Shutdown event */
+#define NVME_CTRLR_DATA_OAES_NORMAL_SHUTDOWN_SHIFT	(15)
+#define NVME_CTRLR_DATA_OAES_NORMAL_SHUTDOWN_MASK	(0x1)
+/* supports Zone Descriptor Changed Notices event */
+#define NVME_CTRLR_DATA_OAES_ZONE_DESC_CHANGE_SHIFT	(27)
+#define NVME_CTRLR_DATA_OAES_ZONE_DESC_CHANGE_MASK	(0x1)
+/* supports Discovery Log Page Change Notification event */
+#define NVME_CTRLR_DATA_OAES_LOG_PAGE_CHANGE_SHIFT	(31)
+#define NVME_CTRLR_DATA_OAES_LOG_PAGE_CHANGE_MASK	(0x1)
+
 /** OACS - optional admin command support */
 /* supports security send/receive commands */
 #define NVME_CTRLR_DATA_OACS_SECURITY_SHIFT		(0)
@@ -547,6 +576,9 @@ enum nvme_critical_warning_state {
 #define	NVME_SS_PAGE_SSTAT_GDE_SHIFT			(8)
 #define	NVME_SS_PAGE_SSTAT_GDE_MASK			(0x1)
 
+/* Helper macro to combine *_MASK and *_SHIFT defines */
+#define NVMEB(name)	(name##_MASK << name##_SHIFT)
+
 /* CC register SHN field values */
 enum shn_value {
 	NVME_SHN_NORMAL		= 0x1,
@@ -560,8 +592,7 @@ enum shst_value {
 	NVME_SHST_COMPLETE	= 0x2,
 };
 
-struct nvme_registers
-{
+struct nvme_registers {
 	uint32_t	cap_lo; /* controller capabilities */
 	uint32_t	cap_hi;
 	uint32_t	vs;	/* version */
@@ -593,13 +624,12 @@ struct nvme_registers
 	struct {
 	    uint32_t	sq_tdbl; /* submission queue tail doorbell */
 	    uint32_t	cq_hdbl; /* completion queue head doorbell */
-	} doorbell[1] __packed;
-} __packed;
+	} doorbell[1];
+};
 
 _Static_assert(sizeof(struct nvme_registers) == 0x1008, "bad size for nvme_registers");
 
-struct nvme_command
-{
+struct nvme_command {
 	/* dword 0 */
 	uint8_t opc;		/* opcode */
 	uint8_t fuse;		/* fused operation */
@@ -628,7 +658,7 @@ struct nvme_command
 	uint32_t cdw13;		/* command-specific */
 	uint32_t cdw14;		/* command-specific */
 	uint32_t cdw15;		/* command-specific */
-} __packed;
+};
 
 _Static_assert(sizeof(struct nvme_command) == 16 * 4, "bad size for nvme_command");
 
@@ -646,7 +676,7 @@ struct nvme_completion {
 	/* dword 3 */
 	uint16_t		cid;	/* command identifier */
 	uint16_t		status;
-} __packed;
+} __aligned(8);	/* riscv: nvme_qpair_process_completions has better code gen */
 
 _Static_assert(sizeof(struct nvme_completion) == 4 * 4, "bad size for nvme_completion");
 
@@ -654,7 +684,7 @@ struct nvme_dsm_range {
 	uint32_t attributes;
 	uint32_t length;
 	uint64_t starting_lba;
-} __packed;
+};
 
 /* Largest DSM Trim that can be done */
 #define NVME_MAX_DSM_TRIM		4096
@@ -1297,7 +1327,7 @@ enum nvme_log_page {
 	NVME_LOG_ENDURANCE_GROUP_INFORMATION = 0x09,
 	NVME_LOG_PREDICTABLE_LATENCY_PER_NVM_SET = 0x0a,
 	NVME_LOG_PREDICTABLE_LATENCY_EVENT_AGGREGATE = 0x0b,
-	NVME_LOG_ASYMMETRIC_NAMESPAVE_ACCESS = 0x0c,
+	NVME_LOG_ASYMMETRIC_NAMESPACE_ACCESS = 0x0c,
 	NVME_LOG_PERSISTENT_EVENT_LOG	= 0x0d,
 	NVME_LOG_LBA_STATUS_INFORMATION	= 0x0e,
 	NVME_LOG_ENDURANCE_GROUP_EVENT_AGGREGATE = 0x0f,
@@ -1413,6 +1443,31 @@ struct nvme_command_effects_page {
 _Static_assert(sizeof(struct nvme_command_effects_page) == 4096,
     "bad size for nvme_command_effects_page");
 
+struct nvme_device_self_test_page {
+	uint8_t			curr_operation;
+	uint8_t			curr_compl;
+	uint8_t			rsvd2[2];
+	struct {
+		uint8_t		status;
+		uint8_t		segment_num;
+		uint8_t		valid_diag_info;
+		uint8_t		rsvd3;
+		uint64_t	poh;
+		uint32_t	nsid;
+		/* Define as an array to simplify alignment issues */
+		uint8_t		failing_lba[8];
+		uint8_t		status_code_type;
+		uint8_t		status_code;
+		uint8_t		vendor_specific[2];
+	} __packed result[20];
+} __packed __aligned(4);
+
+/* Currently sparse/smatch incorrectly packs this struct in some situations. */
+#ifndef __CHECKER__
+_Static_assert(sizeof(struct nvme_device_self_test_page) == 564,
+    "bad size for nvme_device_self_test_page");
+#endif
+
 struct nvme_res_notification_page {
 	uint64_t		log_page_count;
 	uint8_t			log_page_type;
@@ -1441,8 +1496,7 @@ struct nvme_sanitize_status_page {
 _Static_assert(sizeof(struct nvme_sanitize_status_page) == 512,
     "bad size for nvme_sanitize_status_page");
 
-struct intel_log_temp_stats
-{
+struct intel_log_temp_stats {
 	uint64_t	current;
 	uint64_t	overtemp_flag_last;
 	uint64_t	overtemp_flag_life;
@@ -1456,8 +1510,7 @@ struct intel_log_temp_stats
 
 _Static_assert(sizeof(struct intel_log_temp_stats) == 13 * 8, "bad size for intel_log_temp_stats");
 
-struct nvme_resv_reg_ctrlr
-{
+struct nvme_resv_reg_ctrlr {
 	uint16_t		ctrlr_id;	/* Controller ID */
 	uint8_t			rcsts;		/* Reservation Status */
 	uint8_t			reserved3[5];
@@ -1467,8 +1520,7 @@ struct nvme_resv_reg_ctrlr
 
 _Static_assert(sizeof(struct nvme_resv_reg_ctrlr) == 24, "bad size for nvme_resv_reg_ctrlr");
 
-struct nvme_resv_reg_ctrlr_ext
-{
+struct nvme_resv_reg_ctrlr_ext {
 	uint16_t		ctrlr_id;	/* Controller ID */
 	uint8_t			rcsts;		/* Reservation Status */
 	uint8_t			reserved3[5];
@@ -1479,8 +1531,7 @@ struct nvme_resv_reg_ctrlr_ext
 
 _Static_assert(sizeof(struct nvme_resv_reg_ctrlr_ext) == 64, "bad size for nvme_resv_reg_ctrlr_ext");
 
-struct nvme_resv_status
-{
+struct nvme_resv_status {
 	uint32_t		gen;		/* Generation */
 	uint8_t			rtype;		/* Reservation Type */
 	uint8_t			regctl[2];	/* Number of Registered Controllers */
@@ -1492,8 +1543,7 @@ struct nvme_resv_status
 
 _Static_assert(sizeof(struct nvme_resv_status) == 24, "bad size for nvme_resv_status");
 
-struct nvme_resv_status_ext
-{
+struct nvme_resv_status_ext {
 	uint32_t		gen;		/* Generation */
 	uint8_t			rtype;		/* Reservation Type */
 	uint8_t			regctl[2];	/* Number of Registered Controllers */
@@ -2033,4 +2083,25 @@ void	nvme_resv_status_ext_swapbytes(struct nvme_resv_status_ext *s __unused,
 #endif
 }
 
+static inline void
+nvme_device_self_test_swapbytes(struct nvme_device_self_test_page *s __unused)
+{
+#ifndef _LITTLE_ENDIAN
+	uint8_t *tmp;
+	uint32_t r, i;
+	uint8_t b;
+
+	for (r = 0; r < 20; r++) {
+		s->result[r].poh = le64toh(s->result[r].poh);
+		s->result[r].nsid = le32toh(s->result[r].nsid);
+		/* Unaligned 64-bit loads fail on some architectures */
+		tmp = s->result[r].failing_lba;
+		for (i = 0; i < 4; i++) {
+			b = tmp[i];
+			tmp[i] = tmp[7-i];
+			tmp[7-i] = b;
+		}
+	}
+#endif
+}
 #endif /* __NVME_H__ */