Merge branch 'master' into vpcvpc

6 files changed, 33 insertions, 24 deletions

diff --git a/usr/src/uts/i86pc/os/cpuid.c b/usr/src/uts/i86pc/os/cpuid.c
index fc0cf6622f..ae450f1d9b 100644
--- a/usr/src/uts/i86pc/os/cpuid.c
+++ b/usr/src/uts/i86pc/os/cpuid.c
@@ -1431,7 +1431,7 @@ static char *x86_feature_names[NUM_X86_FEATURES] = {
 	"tbm",
 	"avx512_vnni",
 	"amd_pcec",
-	"mb_clear",
+	"md_clear",
 	"mds_no",
 	"core_thermal",
 	"pkg_thermal",
diff --git a/usr/src/uts/i86pc/os/gipt.c b/usr/src/uts/i86pc/os/gipt.c
index ace7e03438..7bff5c3897 100644
--- a/usr/src/uts/i86pc/os/gipt.c
+++ b/usr/src/uts/i86pc/os/gipt.c
@@ -355,7 +355,8 @@ gipt_map_next_page(gipt_map_t *map, uint64_t va, uint64_t max_va, gipt_t **ptp)
 			ASSERT3P(pt, !=, NULL);
 			break;
 		} else {
-			panic("unexpected PTE type %x @ va %p", ptet, cur_va);
+			panic("unexpected PTE type %x @ va %p", ptet,
+			    (void *)cur_va);
 		}
 	}
 
@@ -387,7 +388,8 @@ gipt_map_next_page(gipt_map_t *map, uint64_t va, uint64_t max_va, gipt_t **ptp)
 			pt = gipt_map_lookup(map, cur_va, pt->gipt_level - 1);
 			ASSERT3P(pt, !=, NULL);
 		} else {
-			panic("unexpected PTE type %x @ va %p", ptet, cur_va);
+			panic("unexpected PTE type %x @ va %p", ptet,
+			    (void *)cur_va);
 		}
 	}
 
diff --git a/usr/src/uts/i86pc/os/hma.c b/usr/src/uts/i86pc/os/hma.c
index a41ff3e0d1..0e84030ac1 100644
--- a/usr/src/uts/i86pc/os/hma.c
+++ b/usr/src/uts/i86pc/os/hma.c
@@ -11,6 +11,7 @@
 
 /*
  * Copyright 2019 Joyent, Inc.
+ * Copyright 2020 OmniOS Community Edition (OmniOSce) Association.
  */
 
 #include <sys/cpuvar.h>
@@ -33,6 +34,7 @@ struct hma_reg {
 static kmutex_t hma_lock;
 static list_t hma_registrations;
 static boolean_t hma_exclusive = B_FALSE;
+int hma_disable = 0;
 
 static boolean_t hma_vmx_ready = B_FALSE;
 static const char *hma_vmx_error = NULL;
@@ -89,6 +91,11 @@ hma_init(void)
 	list_create(&hma_registrations, sizeof (struct hma_reg),
 	    offsetof(struct hma_reg, hr_node));
 
+	if (hma_disable != 0) {
+		cmn_err(CE_CONT, "?hma_init: disabled");
+		return;
+	}
+
 	switch (cpuid_getvendor(CPU)) {
 	case X86_VENDOR_Intel:
 		(void) hma_vmx_init();
diff --git a/usr/src/uts/i86pc/os/mp_implfuncs.c b/usr/src/uts/i86pc/os/mp_implfuncs.c
index 2d0bd3eb53..c61e6216b0 100644
--- a/usr/src/uts/i86pc/os/mp_implfuncs.c
+++ b/usr/src/uts/i86pc/os/mp_implfuncs.c
@@ -21,6 +21,7 @@
 /*
  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
+ * Copyright 2020 Oxide Computer Company
  */
 #define	PSMI_1_7
 
@@ -32,6 +33,7 @@
 #include <sys/psm_modctl.h>
 #include <sys/smp_impldefs.h>
 #include <sys/reboot.h>
+#include <sys/prom_debug.h>
 #if defined(__xpv)
 #include <sys/hypervisor.h>
 #include <vm/kboot_mmu.h>
@@ -390,12 +392,6 @@ psm_modload(void)
 	close_mach_list();
 }
 
-#if defined(__xpv)
-#define	NOTSUP_MSG "This version of Solaris xVM does not support this hardware"
-#else
-#define	NOTSUP_MSG "This version of Solaris does not support this hardware"
-#endif	/* __xpv */
-
 void
 psm_install(void)
 {
@@ -406,14 +402,18 @@ psm_install(void)
 
 	mutex_enter(&psmsw_lock);
 	for (swp = psmsw->psw_forw; swp != psmsw; ) {
+		PRM_DEBUGS(swp->psw_infop->p_mach_idstring);
 		opsp = swp->psw_infop->p_ops;
 		if (opsp->psm_probe) {
+			PRM_POINT("psm_probe()");
 			if ((*opsp->psm_probe)() == PSM_SUCCESS) {
+				PRM_POINT("psm_probe() PSM_SUCCESS");
 				psmcnt++;
 				swp->psw_flag |= PSM_MOD_IDENTIFY;
 				swp = swp->psw_forw;
 				continue;
 			}
+			PRM_POINT("psm_probe() FAILURE");
 		}
 		/* remove the unsuccessful psm modules */
 		cswp = swp;
@@ -429,7 +429,8 @@ psm_install(void)
 	}
 	mutex_exit(&psmsw_lock);
 	if (psmcnt == 0)
-		halt(NOTSUP_MSG);
+		halt("the operating system does not yet support this hardware");
+	PRM_POINT("psminitf()");
 	(*psminitf)();
 }
 
diff --git a/usr/src/uts/i86pc/os/mp_machdep.c b/usr/src/uts/i86pc/os/mp_machdep.c
index f36f5f052d..f017995ac8 100644
--- a/usr/src/uts/i86pc/os/mp_machdep.c
+++ b/usr/src/uts/i86pc/os/mp_machdep.c
@@ -26,6 +26,7 @@
  * Copyright (c) 2009-2010, Intel Corporation.
  * All rights reserved.
  * Copyright 2018 Joyent, Inc.
+ * Copyright 2020 Oxide Computer Company
  */
 
 #define	PSMI_1_7
@@ -63,6 +64,8 @@
 #include <sys/sunddi.h>
 #include <sys/sunndi.h>
 #include <sys/cpc_pcbe.h>
+#include <sys/prom_debug.h>
+
 
 #define	OFFSETOF(s, m)		(size_t)(&(((s *)0)->m))
 
@@ -978,6 +981,7 @@ mach_init()
 {
 	struct psm_ops  *pops;
 
+	PRM_POINT("mach_construct_info()");
 	mach_construct_info();
 
 	pops = mach_set[0];
@@ -1017,6 +1021,7 @@ mach_init()
 		notify_error = pops->psm_notify_error;
 	}
 
+	PRM_POINT("psm_softinit()");
 	(*pops->psm_softinit)();
 
 	/*
@@ -1034,6 +1039,7 @@ mach_init()
 #ifndef __xpv
 	non_deep_idle_disp_enq_thread = disp_enq_thread;
 #endif
+	PRM_DEBUG(idle_cpu_use_hlt);
 	if (idle_cpu_use_hlt) {
 		idle_cpu = cpu_idle_adaptive;
 		CPU->cpu_m.mcpu_idle_cpu = cpu_idle;
@@ -1068,6 +1074,7 @@ mach_init()
 #endif
 	}
 
+	PRM_POINT("mach_smpinit()");
 	mach_smpinit();
 }
 
diff --git a/usr/src/uts/i86pc/os/startup.c b/usr/src/uts/i86pc/os/startup.c
index 636e58280a..dd2b5d703b 100644
--- a/usr/src/uts/i86pc/os/startup.c
+++ b/usr/src/uts/i86pc/os/startup.c
@@ -25,6 +25,7 @@
  * Copyright 2017 Nexenta Systems, Inc.
  * Copyright (c) 2018 Joyent, Inc.
  * Copyright (c) 2015 by Delphix. All rights reserved.
+ * Copyright 2020 Oxide Computer Company
  */
 /*
  * Copyright (c) 2010, Intel Corporation.
@@ -74,6 +75,7 @@
 #include <sys/memlist_plat.h>
 #include <sys/varargs.h>
 #include <sys/promif.h>
+#include <sys/prom_debug.h>
 #include <sys/modctl.h>
 
 #include <sys/sunddi.h>
@@ -464,7 +466,7 @@ static pgcnt_t kphysm_init(page_t *, pgcnt_t);
  *			|			|
  * 0xFFFFFXXX.XXX00000  |-----------------------|- segkvmm_base (floating)
  *			|	 segkp		|
- * 			|-----------------------|- segkp_base (floating)
+ *			|-----------------------|- segkp_base (floating)
  *			|   page_t structures	|  valloc_base + valloc_sz
  *			|   memsegs, memlists,	|
  *			|   page hash, etc.	|
@@ -623,21 +625,8 @@ size_t		toxic_bit_map_len = 0;	/* in bits */
 
 #endif	/* __i386 */
 
-/*
- * Simple boot time debug facilities
- */
-static char *prm_dbg_str[] = {
-	"%s:%d: '%s' is 0x%x\n",
-	"%s:%d: '%s' is 0x%llx\n"
-};
-
 int prom_debug;
 
-#define	PRM_DEBUG(q)	if (prom_debug)		\
-	prom_printf(prm_dbg_str[sizeof (q) >> 3], "startup.c", __LINE__, #q, q);
-#define	PRM_POINT(q)	if (prom_debug)		\
-	prom_printf("%s:%d: %s\n", "startup.c", __LINE__, q);
-
 /*
  * This structure is used to keep track of the intial allocations
  * done in startup_memlist(). The value of NUM_ALLOCATIONS needs to
@@ -2273,6 +2262,7 @@ startup_end(void)
 	 * We can now setup for XSAVE because fpu_probe is done in configure().
 	 */
 	if (fp_save_mech == FP_XSAVE) {
+		PRM_POINT("xsave_setup_msr()");
 		xsave_setup_msr(CPU);
 	}
 
@@ -2281,7 +2271,9 @@ startup_end(void)
 	 * support.
 	 */
 	setx86isalist();
+	PRM_POINT("cpu_intr_alloc()");
 	cpu_intr_alloc(CPU, NINTR_THREADS);
+	PRM_POINT("psm_install()");
 	psm_install();
 
 	/*