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authorJoshua M. Clulow <jmc@joyent.com>2015-10-24 17:27:39 -0700
committerJoshua M. Clulow <jmc@joyent.com>2015-10-25 00:27:39 +0000
commit68d22acb17ba841eaed6acb462db7f90439de0dc (patch)
treed52a3dfe055182e2d79718ee82205dbef6e26cdf /usr/src/uts/intel/io/pci
parent6bc4ae771112eb9fe63ee2e964790238f27f76a5 (diff)
downloadillumos-joyent-68d22acb17ba841eaed6acb462db7f90439de0dc.tar.gz
OS-4646 missing MCFG table should lead to I/O PCIe config access (fix DEBUG)
Diffstat (limited to 'usr/src/uts/intel/io/pci')
-rw-r--r--usr/src/uts/intel/io/pci/pci_boot.c17
1 files changed, 0 insertions, 17 deletions
diff --git a/usr/src/uts/intel/io/pci/pci_boot.c b/usr/src/uts/intel/io/pci/pci_boot.c
index ef9fa0cd7c..826b715502 100644
--- a/usr/src/uts/intel/io/pci/pci_boot.c
+++ b/usr/src/uts/intel/io/pci/pci_boot.c
@@ -139,7 +139,6 @@ static void pciex_slot_names_prop(dev_info_t *, ushort_t);
static void populate_bus_res(uchar_t bus);
static void memlist_remove_list(struct memlist **list,
struct memlist *remove_list);
-static boolean_t is_pcie_platform(void);
static void ck804_fix_aer_ptr(dev_info_t *, pcie_req_id_t);
static void pci_scan_bbn(void);
@@ -3346,22 +3345,6 @@ pciex_slot_names_prop(dev_info_t *dip, ushort_t slot_num)
}
/*
- * This is currently a hack, a better way is needed to determine if it
- * is a PCIE platform.
- */
-static boolean_t
-is_pcie_platform()
-{
- uint8_t bus;
-
- for (bus = 0; bus < pci_bios_maxbus; bus++) {
- if (look_for_any_pciex_device(bus))
- return (B_TRUE);
- }
- return (B_FALSE);
-}
-
-/*
* Enable reporting of AER capability next pointer.
* This needs to be done only for CK8-04 devices
* by setting NV_XVR_VEND_CYA1 (offset 0xf40) bit 13