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| author | John Levon <john.levon@joyent.com> | 2018-02-22 18:05:13 -0800 |
|---|---|---|
| committer | John Levon <john.levon@joyent.com> | 2018-03-13 20:33:26 +0000 |
| commit | 60f89b42cd13d6888f948d7ffe4edcfa535e02a6 (patch) | |
| tree | c60e2fa99bc8572c457a0908105f8570c56b834c /usr/src/uts/intel/sys | |
| parent | 0e957fcabecc0abb13226b12f474359f4ea711ea (diff) | |
| download | illumos-joyent-60f89b42cd13d6888f948d7ffe4edcfa535e02a6.tar.gz | |
OS-6546 Use PCID if KPTI is enabled
Reviewed by: Jerry Jelinek <jerry.jelinek@joyent.com>
Reviewed by: Alex Wilson <alex.wilson@joyent.com>
Reviewed by: Robert Mustacchi <rm@joyent.com>
Approved by: Alex Wilson <alex.wilson@joyent.com>
Diffstat (limited to 'usr/src/uts/intel/sys')
| -rw-r--r-- | usr/src/uts/intel/sys/controlregs.h | 14 | ||||
| -rw-r--r-- | usr/src/uts/intel/sys/x86_archext.h | 12 |
2 files changed, 19 insertions, 7 deletions
diff --git a/usr/src/uts/intel/sys/controlregs.h b/usr/src/uts/intel/sys/controlregs.h index 6ae1afb3eb..fe0cf687b4 100644 --- a/usr/src/uts/intel/sys/controlregs.h +++ b/usr/src/uts/intel/sys/controlregs.h @@ -20,9 +20,7 @@ */ /* * Copyright (c) 2004, 2010, Oracle and/or its affiliates. All rights reserved. - * Copyright 2015, Joyent, Inc. - * - * Copyright 2018 Joyent, Inc. + * Copyright 2018, Joyent, Inc. */ #ifndef _SYS_CONTROLREGS_H @@ -90,8 +88,14 @@ extern "C" { #define CR3_PCD 0x00000010 /* cache disable */ #define CR3_PWT 0x00000008 /* write through */ - -#define FMT_CR3 "\20\5pcd\4pwt" +#if defined(_ASM) +#define CR3_NOINVL_BIT 0x8000000000000000 +#else +#define CR3_NOINVL_BIT 0x8000000000000000ULL /* no invalidation */ +#endif +#define PCID_NONE 0x000 /* generic PCID */ +#define PCID_KERNEL 0x000 /* kernel's PCID */ +#define PCID_USER 0x001 /* user-space PCID */ /* CR4 Register */ diff --git a/usr/src/uts/intel/sys/x86_archext.h b/usr/src/uts/intel/sys/x86_archext.h index 475bb85738..bfd6f14289 100644 --- a/usr/src/uts/intel/sys/x86_archext.h +++ b/usr/src/uts/intel/sys/x86_archext.h @@ -27,7 +27,7 @@ * All rights reserved. */ /* - * Copyright 2017 Joyent, Inc. + * Copyright 2018 Joyent, Inc. * Copyright 2012 Jens Elkner <jel+illumos@cs.uni-magdeburg.de> * Copyright 2012 Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org> * Copyright 2014 Josef 'Jeff' Sipek <jeffpc@josefsipek.net> @@ -210,6 +210,7 @@ extern "C" { #define CPUID_INTC_EBX_7_0_AVX2 0x00000020 /* AVX2 supported */ #define CPUID_INTC_EBX_7_0_SMEP 0x00000080 /* SMEP in CR4 */ #define CPUID_INTC_EBX_7_0_BMI2 0x00000100 /* BMI2 instrs */ +#define CPUID_INTC_EBX_7_0_INVPCID 0x00000400 /* invpcid instr */ #define CPUID_INTC_EBX_7_0_MPX 0x00004000 /* Mem. Prot. Ext. */ #define CPUID_INTC_EBX_7_0_AVX512F 0x00010000 /* AVX512 foundation */ #define CPUID_INTC_EBX_7_0_AVX512DQ 0x00020000 /* AVX512DQ */ @@ -433,6 +434,8 @@ extern "C" { #define X86FSET_UMIP 66 #define X86FSET_PKU 67 #define X86FSET_OSPKE 68 +#define X86FSET_PCID 69 +#define X86FSET_INVPCID 70 /* * Intel Deep C-State invariant TSC in leaf 0x80000007. @@ -691,7 +694,7 @@ extern "C" { #if defined(_KERNEL) || defined(_KMEMUSER) -#define NUM_X86_FEATURES 69 +#define NUM_X86_FEATURES 71 extern uchar_t x86_featureset[]; extern void free_x86_featureset(void *featureset); @@ -725,6 +728,9 @@ struct cpuid_regs { uint32_t cp_edx; }; +extern int x86_use_pcid; +extern int x86_use_invpcid; + /* * Utility functions to get/set extended control registers (XCR) * Initial use is to get/set the contents of the XFEATURE_ENABLED_MASK. @@ -870,6 +876,8 @@ extern void determine_platform(void); extern int get_hwenv(void); extern int is_controldom(void); +extern void enable_pcid(void); + extern void xsave_setup_msr(struct cpu *); /* |