6392837 move sram to usr/src

6393316 move fcgp2 to usr/src
6393416 move gptwo_pci to usr/src
6393420 move gptwo_wci to usr/src
6393421 move sc_gptwocfg to usr/src
6393424 move axq to usr/src
6393425 move dman to usr/src
6393426 move iosram to usr/src
6393427 move mboxsc to usr/src
6393428 move sbdp to usr/src
6393429 move schpc to usr/src
6393432 move sckmdrv to usr/src
6393435 move scosmb to usr/src
6393437 move driver sgcn to usr/src
6393438 move sgenv to usr/src
6393439 move sgfru to usr/src
6393440 move driver sghsc to usr/src
6393441 move driver sgsbbc to usr/src
6393442 move driver ssm to usr/src
6393452 move pcf8574_nct to usr/src
6393453 move pcf8591_nct to usr/src
6393454 move acebus to usr/src
6393455 move scsb to usr/src
6393462 move lw8 to usr/src
6393463 move driver rmc_comm to usr/src
6393464 move driver rmcadm to usr/src
6393475 move todsg to usr/src
6393889 move libprtdiag to usr/src
6393890 move libprtdiag_psr to usr/src
6393896 move librsc to usr/src
6393898 move scadm to usr/src
6399766 move serengeti platform to usr/src
6399770 move starcat platform to usr/src
6400949 daktari platmod Makefile references incorrect platmod directory

14 files changed, 2407 insertions, 0 deletions

diff --git a/usr/src/uts/sun4u/serengeti/sys/sbdp_error.h b/usr/src/uts/sun4u/serengeti/sys/sbdp_error.h
new file mode 100644
index 0000000000..4477bab3f7
--- /dev/null
+++ b/usr/src/uts/sun4u/serengeti/sys/sbdp_error.h
@@ -0,0 +1,58 @@
+/*
+ * CDDL HEADER START
+ *
+ * The contents of this file are subject to the terms of the
+ * Common Development and Distribution License (the "License").
+ * You may not use this file except in compliance with the License.
+ *
+ * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
+ * or http://www.opensolaris.org/os/licensing.
+ * See the License for the specific language governing permissions
+ * and limitations under the License.
+ *
+ * When distributing Covered Code, include this CDDL HEADER in each
+ * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
+ * If applicable, add the following below this CDDL HEADER, with the
+ * fields enclosed by brackets "[]" replaced with your own identifying
+ * information: Portions Copyright [yyyy] [name of copyright owner]
+ *
+ * CDDL HEADER END
+ */
+
+/*
+ * Copyright 2002 Sun Microsystems, Inc.  All rights reserved.
+ * Use is subject to license terms.
+ */
+
+#ifndef	_SYS_SBDP_ERROR_H
+#define	_SYS_SBDP_ERROR_H
+
+#pragma ident	"%Z%%M%	%I%	%E% SMI"
+
+#ifdef	__cplusplus
+extern "C" {
+#endif
+
+#include <sys/sbd_ioctl.h>
+#include <sys/sbd.h>
+
+/*
+ * sbdp error injection
+ */
+
+extern int sbdp_inject_error(const char *, uint_t);
+
+#ifdef DEBUG
+#define	SBDP_INJECT_ERROR	sbdp_inject_error
+#else /* DEBUG */
+#define	SBDP_INJECT_ERROR(f, e)	0
+#endif /* DEBUG */
+
+extern int sbdp_passthru_inject_error(sbdp_handle_t *, void *);
+extern int sbdp_passthru_reset_error(sbdp_handle_t *, void *);
+
+#ifdef	__cplusplus
+}
+#endif
+
+#endif /* _SYS_SBDP_ERROR_H */
diff --git a/usr/src/uts/sun4u/serengeti/sys/sbdp_mbox.h b/usr/src/uts/sun4u/serengeti/sys/sbdp_mbox.h
new file mode 100644
index 0000000000..b85c3b92bf
--- /dev/null
+++ b/usr/src/uts/sun4u/serengeti/sys/sbdp_mbox.h
@@ -0,0 +1,105 @@
+/*
+ * CDDL HEADER START
+ *
+ * The contents of this file are subject to the terms of the
+ * Common Development and Distribution License (the "License").
+ * You may not use this file except in compliance with the License.
+ *
+ * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
+ * or http://www.opensolaris.org/os/licensing.
+ * See the License for the specific language governing permissions
+ * and limitations under the License.
+ *
+ * When distributing Covered Code, include this CDDL HEADER in each
+ * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
+ * If applicable, add the following below this CDDL HEADER, with the
+ * fields enclosed by brackets "[]" replaced with your own identifying
+ * information: Portions Copyright [yyyy] [name of copyright owner]
+ *
+ * CDDL HEADER END
+ */
+
+/*
+ * Copyright 2001 Sun Microsystems, Inc.  All rights reserved.
+ * Use is subject to license terms.
+ */
+
+#ifndef _SBDP_MBOX_H
+#define	_SBDP_MBOX_H
+
+#pragma ident	"%Z%%M%	%I%	%E% SMI"
+
+#ifdef	__cplusplus
+extern "C" {
+#endif
+
+#define	SBDP_POWER_OFF		0x0
+#define	SBDP_POWER_ON		0x1
+#define	SBDP_UNASSIGN		0x0
+#define	SBDP_ASSIGN		0x1
+
+/*
+ * DR Mailbox definitions
+ */
+#define	DR_MBOX_SHOW_BOARD	0x2002
+#define	DR_MBOX_POWER		0x2003
+#define	DR_MBOX_ASSIGN		0x2004
+#define	DR_MBOX_TEST_BD		0x2005
+#define	DR_MBOX_STICK_ADM	0x2006
+#define	DR_MBOX_SWAP_SLICES	0x2007
+#define	DR_MBOX_START_CPU	0x2008
+#define	DR_MBOX_STOP_CPU	0x2009
+#define	DR_MBOX_START_CPU_PAIRS	0x2010
+#define	DR_MBOX_CLAIM		0x2011
+#define	DR_MBOX_UNCLAIM		0x2012
+#define	DR_MBOX_NOOP		0x2013
+
+/*
+ * DR Mailbox data structures
+ */
+typedef struct {
+	int	revision;	/* temp */
+	int	node;		/* Node ID */
+	int	board;		/* Board number */
+	int	extra;		/* for assign and power */
+} info2_t;
+
+typedef struct {
+	info2_t		info;	/* Normal information */
+	uint32_t	flag;	/* Force operation */
+} testb_t;
+
+typedef struct {
+	int revision;	/* temp */
+	int node;	/* Node ID */
+	int board;	/* Board number */
+} info_t;
+
+typedef struct {
+	int	revision;
+	int	s_cond;		/* 0 = unknown, 1 = ok, 2 =  failing,	*/
+				/* 3 = failed, 4 = unusable		*/
+	int	s_power;	/* 0 = off, 1 = on */
+	int	s_assigned;	/* 0 = unassigned, 1 = assigned */
+	int	s_claimed;	/* 0 = unclaimed, 1 = claimed */
+	int	s_present;	/* 0 = slot empty 1 = present */
+	int	s_ledstatus;	/* LEDs status */
+	char	s_type[12];	/* type of board */
+	char	s_info[64];	/* TBD */
+} show_board_t;
+
+typedef struct {
+	int	board1;
+	int	board2;
+} swap_slices_t;
+
+
+int sbdp_start_cpu(processorid_t);
+int sbdp_start_cpu_pairs(processorid_t);
+int sbdp_stop_cpu(processorid_t);
+
+#ifdef	__cplusplus
+}
+#endif
+
+#endif	/* _SBDP_MBOX_H */
diff --git a/usr/src/uts/sun4u/serengeti/sys/sbdp_mem.h b/usr/src/uts/sun4u/serengeti/sys/sbdp_mem.h
new file mode 100644
index 0000000000..31fb658c84
--- /dev/null
+++ b/usr/src/uts/sun4u/serengeti/sys/sbdp_mem.h
@@ -0,0 +1,193 @@
+/*
+ * CDDL HEADER START
+ *
+ * The contents of this file are subject to the terms of the
+ * Common Development and Distribution License (the "License").
+ * You may not use this file except in compliance with the License.
+ *
+ * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
+ * or http://www.opensolaris.org/os/licensing.
+ * See the License for the specific language governing permissions
+ * and limitations under the License.
+ *
+ * When distributing Covered Code, include this CDDL HEADER in each
+ * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
+ * If applicable, add the following below this CDDL HEADER, with the
+ * fields enclosed by brackets "[]" replaced with your own identifying
+ * information: Portions Copyright [yyyy] [name of copyright owner]
+ *
+ * CDDL HEADER END
+ */
+
+/*
+ * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
+ * Use is subject to license terms.
+ */
+
+#ifndef _SBDP_MEM_H
+#define	_SBDP_MEM_H
+
+#pragma ident	"%Z%%M%	%I%	%E% SMI"
+
+#ifdef	__cplusplus
+extern "C" {
+#endif
+
+#include <sys/sbd.h>
+#include <sys/sbdp_priv.h>
+
+#define	SBDP_MAX_MCS_PER_NODE		4
+#define	SBDP_MAX_MEM_NODES_PER_BOARD	4
+
+typedef uint64_t mc_dc_regs_t[SBDP_MAX_MCS_PER_NODE];
+
+typedef struct {
+	int	board;
+	pnode_t	*nodes;
+	int	nmem;
+} mem_op_t;
+
+typedef struct {
+	uint_t	regspec_addr_hi;
+	uint_t	regspec_addr_lo;
+	uint_t	regspec_size_hi;
+	uint_t	regspec_size_lo;
+} mc_regspace;
+
+typedef struct {
+	uint64_t	mc_decode[SBDP_MAX_MCS_PER_NODE];
+	uint64_t	mc_memctl;
+} mc_regs_t;
+
+/*
+ * Memory controller register offsets
+ */
+#define	SG_MEM_TIMING1_CTL	0x400000
+#define	SG_MEM_TIMING2_CTL	0x400008
+#define	SG_MEM_TIMING3_CTL	0x400038
+#define	SG_MEM_TIMING4_CTL	0x400040
+#define	SG_MEM_DECODE0_ADR	0x400028
+#define	SG_MEM_DECODE1_ADR	0x400010
+#define	SG_MEM_DECODE2_ADR	0x400018
+#define	SG_MEM_DECODE3_ADR	0x400020
+#define	SG_MEM_CONTROL_ADR	0x400030
+#define	SG_EMU_ACTIVITY_STATUS	0x400050
+
+/*
+ * Bit fields for the decode registers
+ */
+#define	SG_DECODE_VALID		0x8000000000000000ull
+#define	SG_DECODE_UK		0x001ffe0000000000ull
+#define	SG_DECODE_UM		0x000001fffff00000ull
+#define	SG_DECODE_LK		0x00000000000fc000ull
+#define	SG_DECODE_LM		0x0000000000003f00ull
+#define	SG_INVAL_UM		0x0000000ffff00000ull
+#define	SG_SLICE_INFO		0x000001fc00000000ull
+#define	SG_ALIGNMENT		0x800000000ULL
+
+
+/*
+ * Memory Macros
+ */
+#define	MC_MEMDEC0(mc_addr) \
+	(mc_addr) | SG_MEM_DECODE0_ADR
+#define	MC_MEMDEC1(mc_addr) \
+	(mc_addr) | SG_MEM_DECODE1_ADR
+#define	MC_MEMDEC2(mc_addr) \
+	(mc_addr) | SG_MEM_DECODE2_ADR
+#define	MC_MEMDEC3(mc_addr) \
+	(mc_addr) | SG_MEM_DECODE3_ADR
+#define	MC_ACTIVITY_STATUS(mc_addr) \
+	(mc_addr) | SG_EMU_ACTIVITY_STATUS
+
+
+/*
+ * Mappings to the array for the decode registers only
+ */
+#define	SG_MC_DECODE_I		0
+#define	SG_MC_DECODE_II		1
+#define	SG_MC_DECODE_III	2
+#define	SG_MC_DECODE_IV		3
+/*
+ * Memory Macros
+ */
+#define	SG_REG_2_OFFSET(num) \
+	    ((num) == SG_MC_DECODE_I ? (uint64_t)SG_MEM_DECODE0_ADR : \
+	    (num) == SG_MC_DECODE_II ? (uint64_t)SG_MEM_DECODE1_ADR : \
+	    (num) == SG_MC_DECODE_III ? (uint64_t)SG_MEM_DECODE2_ADR : \
+	    (num) == SG_MC_DECODE_IV ? (uint64_t)SG_MEM_DECODE3_ADR : \
+	    (uint64_t)-1)
+
+#define	MC_VALID_SHIFT		63
+#define	MC_UK_SHIFT		41
+#define	MC_UM_SHIFT		20
+#define	MC_LK_SHIFT		14
+#define	MC_LM_SHIFT		8
+#define	PHYS2UM_SHIFT		26
+#define	MC_UK(memdec)		(((memdec) >> MC_UK_SHIFT) & 0xfffu)
+#define	MC_LK(memdec)		(((memdec) >> MC_LK_SHIFT)& 0x3fu)
+#define	MC_INTLV(memdec)	((~(MC_LK(memdec)) & 0xfu) + 1)
+#define	MC_UK2SPAN(memdec)	((MC_UK(memdec) + 1) << PHYS2UM_SHIFT)
+#define	MC_SPANMB(memdec)	(MC_UK2SPAN(memdec) >> 20)
+#define	MC_UM(memdec)		(((memdec) >> MC_UM_SHIFT) & 0x1fffffu)
+#define	MC_LM(memdec)		(((memdec) >> MC_LM_SHIFT) & 0x3f)
+#define	MC_BASE(memdec)		(MC_UM(memdec) & ~(MC_UK(memdec)))
+#define	MC_BASE2UM(base)	(((base) & 0x1fffffu) << MC_UM_SHIFT)
+#define	SAF_MASK		0x000007ffff800000ull
+#define	MC_OFFSET_MASK		0xffu
+
+/*
+ * Memory Slice information
+ */
+#define	SG_SLICE_16G_SIZE	0x400000000ULL
+#define	SG_SLICE_32G_SIZE	0x800000000ULL
+#define	SG_SLICE_64G_SIZE	0x1000000000ULL
+
+/*
+ * Copy-rename info
+ */
+
+#define	SBDP_RENAME_MAXOP	(PAGESIZE / sizeof (sbdp_rename_script_t))
+
+/*
+ * Must be same size as sbdp_rename_script_t.
+ */
+typedef struct {
+	uint64_t	addr;
+	uint_t		bd_id;
+	pnode_t		node;
+	uint_t		asi;
+	uint_t		_filler;
+} sbdp_mc_idle_script_t;
+
+typedef struct {
+	uint64_t	masr_addr;
+	uint64_t	masr;
+	uint_t		asi;
+	uint_t		_filler;
+} sbdp_rename_script_t;
+
+typedef struct {
+	sbdp_bd_t	*s_bdp;	/* pointer to src bd info */
+	sbdp_bd_t	*t_bdp;	/* pointer to tgt bd info */
+	sbdp_rename_script_t *script; 	/* points to the actual script */
+	uint64_t	ret;
+	sbdp_mc_idle_script_t *busy_mc;
+} sbdp_cr_handle_t;
+
+
+extern uint64_t lddsafaddr(uint64_t physaddr);
+extern uint64_t lddmcdecode(uint64_t physaddr);
+extern void stdmcdecode(uint64_t, uint64_t);
+
+int sbdp_is_mem(pnode_t node, void *arg);
+#ifdef DEBUG
+int sbdp_passthru_readmem(sbdp_handle_t *hp, void *);
+int sbdp_passthru_prep_script(sbdp_handle_t *hp, void *);
+#endif
+
+#ifdef	__cplusplus
+}
+#endif
+
+#endif	/* _SBDP_MEM_H */
diff --git a/usr/src/uts/sun4u/serengeti/sys/sbdp_priv.h b/usr/src/uts/sun4u/serengeti/sys/sbdp_priv.h
new file mode 100644
index 0000000000..d9fc5de892
--- /dev/null
+++ b/usr/src/uts/sun4u/serengeti/sys/sbdp_priv.h
@@ -0,0 +1,264 @@
+/*
+ * CDDL HEADER START
+ *
+ * The contents of this file are subject to the terms of the
+ * Common Development and Distribution License (the "License").
+ * You may not use this file except in compliance with the License.
+ *
+ * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
+ * or http://www.opensolaris.org/os/licensing.
+ * See the License for the specific language governing permissions
+ * and limitations under the License.
+ *
+ * When distributing Covered Code, include this CDDL HEADER in each
+ * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
+ * If applicable, add the following below this CDDL HEADER, with the
+ * fields enclosed by brackets "[]" replaced with your own identifying
+ * information: Portions Copyright [yyyy] [name of copyright owner]
+ *
+ * CDDL HEADER END
+ */
+
+/*
+ * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
+ * Use is subject to license terms.
+ */
+
+#ifndef _SBDP_PRIV_H
+#define	_SBDP_PRIV_H
+
+#pragma ident	"%Z%%M%	%I%	%E% SMI"
+
+#ifdef	__cplusplus
+extern "C" {
+#endif
+
+#include <sys/sbd.h>
+#include <sys/sbdp_mbox.h>
+#include <sys/conf.h>
+#include <sys/ddi_impldefs.h>
+#include <sys/serengeti.h>
+
+#ifdef DEBUG
+#define	SBDPDBG_STATE	0x00000001
+#define	SBDPDBG_QR	0x00000002
+#define	SBDPDBG_CPU	0x00000004
+#define	SBDPDBG_MEM	0x00000008
+#define	SBDPDBG_IO	0x00000010
+#define	SBDPDBG_MBOX	0x00000020
+#define	SBDPDBG_ERR	0x00000040
+#define	SBDPDBG_MISC	0x00000080
+#define	SBDPDBG_FUNC	0x00000100
+
+extern uint_t sbdp_debug;
+
+#define	SBDP_DBG_ALL	if (sbdp_debug)				prom_printf
+#define	SBDP_DBG_STATE	if (sbdp_debug & SBDPDBG_STATE)		prom_printf
+#define	SBDP_DBG_QR	if (sbdp_debug & SBDPDBG_QR)		prom_printf
+#define	SBDP_DBG_CPU	if (sbdp_debug & SBDPDBG_CPU)		prom_printf
+#define	SBDP_DBG_MEM	if (sbdp_debug & SBDPDBG_MEM)		prom_printf
+#define	SBDP_DBG_IO	if (sbdp_debug & SBDPDBG_IO)		prom_printf
+#define	SBDP_DBG_MBOX	if (sbdp_debug & SBDPDBG_MBOX)		prom_printf
+#define	SBDP_DBG_ERR	if (sbdp_debug & SBDPDBG_ERR)		prom_printf
+#define	SBDP_DBG_MISC	if (sbdp_debug & SBDPDBG_MISC)		prom_printf
+#define	SBDP_DBG_FUNC	if (sbdp_debug & SBDPDBG_FUNC)		prom_printf
+
+#else /* DEBUG */
+
+#define	SBDP_DBG_ALL
+#define	SBDP_DBG_STATE
+#define	SBDP_DBG_QR
+#define	SBDP_DBG_CPU
+#define	SBDP_DBG_MEM
+#define	SBDP_DBG_IO
+#define	SBDP_DBG_MBOX
+#define	SBDP_DBG_ERR
+#define	SBDP_DBG_MISC
+#define	SBDP_DBG_FUNC
+#endif /* DEBUG */
+
+#define	PORTID_BAD	-1
+#define	OBP_PORTID	"portid"
+#define	SBDP_MAX_BOARDS  plat_max_boards()
+#define	SBDP_MAX_MEM_NODES_PER_BOARD	4
+#define	SBDP_MAX_NODES	32
+#define	SBDP_MAX_WNODES	16
+
+/*
+ * CPU present macros
+ */
+#define	SBDP_SET_CPU_PRESENT(bdp, unit)\
+			((bdp)->cpus_present |= (1 << (unit)))
+
+#define	SBDP_IS_CPU_PRESENT(bdp, unit)\
+			(((bdp)->cpus_present & (1 << (unit))) != 0)
+
+/*
+ * CPU reset macros
+ */
+#define	SBDP_SET_CPU_IN_RESET(bdp, unit)\
+			((bdp)->cpus_in_reset |= (1 << (unit)))
+#define	SBDP_UNSET_CPU_IN_RESET(bdp, unit)\
+			((bdp)->cpus_in_reset &= ~(1 << (unit)))
+#define	SBDP_IS_CPU_IN_RESET(bdp, unit)\
+			(((bdp)->cpus_in_reset & (1 << (unit))) != 0)
+#define	SBDP_SET_ALL_CPUS_IN_RESET(bdp)\
+			((bdp)->cpus_in_reset |= 0xf)
+#define	SBDP_UNSET_ALL_CPUS_IN_RESET(bdp)\
+			((bdp)->cpus_in_reset = 0x0)
+#define	SBDP_ALL_CPUS	-1
+
+/*
+ * These definitions come from the SC. Should the SC change them
+ * then we need to changed them
+ */
+#define	SBDP_DIAG_OFF		0x00
+#define	SBDP_DIAG_INIT		0x07
+#define	SBDP_DIAG_QUICK		0x10
+#define	SBDP_DIAG_MIN		0x20
+#define	SBDP_DIAG_DEFAULT	0x40
+#define	SBDP_DIAG_MEM1		0x60
+#define	SBDP_DIAG_MEM2		0x7f
+#define	SBDP_DIAG_NVCI		0xffff	/* Use stored value in nvci */
+
+int		*slices;
+
+#define	SBDP_INIT_PLATOPTS	(uint_t)-1
+#define	SBDP_PLATFORM_OPTS(s_platopts)  ((s_platopts) = SBDP_INIT_PLATOPTS, \
+		SBD_SET_PLATOPTS(SBD_CMD_TEST, (s_platopts)), \
+		SBD_SET_PLATOPTS(SBD_CMD_PASSTHRU, (s_platopts)))
+
+typedef struct sbdp_bank {
+	int			id;
+	ushort_t		valid;
+	ushort_t		uk;
+	uint_t			um;
+	uchar_t			lk;
+	uchar_t			lm;
+	struct sbdp_bank	*bd_next;	/* in the board */
+	struct sbdp_bank	*seg_next;	/* in the segment */
+} sbdp_bank_t;
+
+typedef struct sbdp_segs {
+	int			id;
+	int			intlv;	/* interleave for this segment */
+	uint64_t		base;	/* base address for this segment */
+	uint64_t		size;	/* size of this segment */
+	int			nbanks;	/* number of banks in this segment */
+	sbdp_bank_t		*banks;	/* pointer to the banks of this seg */
+	struct sbdp_segs	*next;
+} sbdp_seg_t;
+
+typedef struct {
+	int		bd;
+	int		wnode;
+	uint64_t	bpa;	/* base physical addr for this board */
+	int		nnum;	/* number of nodes */
+	struct memlist	*ml;	/* memlist for this board */
+	pnode_t		nodes[SBDP_MAX_MEM_NODES_PER_BOARD];
+	kmutex_t	bd_mutex; /* mutex for this board */
+	show_board_t	*bd_sc;	/* info obtained from the SC */
+	int		valid_cp; /* Is this a valid copy of show_board */
+	sbdp_bank_t	*banks;	/* Banks for this board */
+	int		cpus_in_reset;
+	int		cpus_present;
+} sbdp_bd_t;
+
+typedef struct sbdp_wnode {
+	int			wnode;	/* wildcat node */
+	int			nbds;	/* number of bds for this node */
+	sbdp_bd_t		*bds;	/* pointer to the list of bds */
+	struct sbdp_wnode	*next;	/* ptr to nex wnode */
+	struct sbdp_wnode	*prev;	/* ptr to prev node */
+} sbdp_wnode_t;
+
+typedef struct {
+	uint_t  regspec_addr_hi;
+	uint_t  regspec_addr_lo;
+	uint_t  regspec_size_hi;
+	uint_t  regspec_size_lo;
+} regspace_t;
+
+/*
+ * Suspend states used internally by sbdp_suspend and
+ * sbdp_resume
+ */
+typedef enum sbd_suspend_state {
+	SBDP_SRSTATE_BEGIN = 0,
+	SBDP_SRSTATE_USER,
+	SBDP_SRSTATE_DRIVER,
+	SBDP_SRSTATE_FULL
+} suspend_state_t;
+
+/*
+ * specific suspend/resume interface handle
+ */
+typedef struct {
+	sbd_error_t		sep;
+	dev_info_t		*sr_failed_dip;
+	suspend_state_t		sr_suspend_state;
+	uint_t			sr_flags;
+	uint_t			sh_ndi;
+} sbdp_sr_handle_t;
+
+typedef struct sbdp_shutdown {
+	uint64_t	estack;
+	uint64_t	flushaddr;
+	uint32_t	size;
+	uint32_t	linesize;
+	uint64_t	physaddr;
+} sbdp_shutdown_t;
+
+extern int plat_max_boards();
+
+typedef struct {
+	int		node;		/* wildcat node */
+	int		board;
+	pnode_t		nodes[SBDP_MAX_NODES];
+	int		num_of_nodes;
+	int		flags;
+	int		error;
+	dev_info_t	*top_node;
+	char		*errstr;
+} attach_pkt_t;
+
+extern uint64_t *sbdp_valp;
+
+sbdp_sr_handle_t *sbdp_get_sr_handle(void);
+void sbdp_release_sr_handle(sbdp_sr_handle_t *);
+int sbdp_suspend(sbdp_sr_handle_t *);
+void sbdp_resume(sbdp_sr_handle_t *);
+void sbdp_set_err(sbd_error_t *ep, int ecode, char *rsc);
+int sbdp_is_node_bad(pnode_t);
+void sbdp_walk_prom_tree(pnode_t, int(*)(pnode_t, void *, uint_t), void *);
+int sbdp_detach_bd(int node, int board, sbd_error_t *sep);
+void sbdp_attach_bd(int, int);
+int sbdp_get_bd_and_wnode_num(pnode_t, int *, int *);
+void sbdp_update_bd_info(sbdp_bd_t *);
+sbdp_bd_t *sbdp_get_bd_info(int, int);
+int sbdp_make_bd_mem_contigous(int);
+sbd_cond_t sbdp_get_comp_status(pnode_t);
+void sbdp_init_bd_banks(sbdp_bd_t *);
+void sbdp_swap_list_of_banks(sbdp_bd_t *, sbdp_bd_t *);
+void sbdp_fini_bd_banks(sbdp_bd_t *);
+void sbdp_print_bd_banks(sbdp_bd_t *);
+void sbdp_add_new_bd_info(int, int);
+void sbdp_cleanup_bd(int, int);
+void sbdp_cpu_in_reset(int, int, int, int);
+int sbdp_is_cpu_in_reset(int, int, int);
+int sbdp_set_cpu_present(int, int, int);
+int sbdp_is_cpu_present(int, int, int);
+int sbdp_swap_slices(int, int);
+#ifdef DEBUG
+void sbdp_print_all_segs(void);
+int sbdp_passthru_test_quiesce(sbdp_handle_t *hp, void *);
+#endif
+int sbdp_select_top_nodes(pnode_t, void *, uint_t);
+pnode_t sbdp_find_nearby_cpu_by_portid(pnode_t, processorid_t);
+int sbdp_board_non_panther_cpus(int, int);
+
+#ifdef	__cplusplus
+}
+#endif
+
+#endif	/* _SBDP_PRIV_H */
diff --git a/usr/src/uts/sun4u/serengeti/sys/serengeti.h b/usr/src/uts/sun4u/serengeti/sys/serengeti.h
new file mode 100644
index 0000000000..04f7ec674a
--- /dev/null
+++ b/usr/src/uts/sun4u/serengeti/sys/serengeti.h
@@ -0,0 +1,278 @@
+/*
+ * CDDL HEADER START
+ *
+ * The contents of this file are subject to the terms of the
+ * Common Development and Distribution License, Version 1.0 only
+ * (the "License").  You may not use this file except in compliance
+ * with the License.
+ *
+ * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
+ * or http://www.opensolaris.org/os/licensing.
+ * See the License for the specific language governing permissions
+ * and limitations under the License.
+ *
+ * When distributing Covered Code, include this CDDL HEADER in each
+ * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
+ * If applicable, add the following below this CDDL HEADER, with the
+ * fields enclosed by brackets "[]" replaced with your own identifying
+ * information: Portions Copyright [yyyy] [name of copyright owner]
+ *
+ * CDDL HEADER END
+ */
+/*
+ * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
+ * Use is subject to license terms.
+ */
+
+#ifndef _SYS_SERENGETI_H
+#define	_SYS_SERENGETI_H
+
+#pragma ident	"%Z%%M%	%I%	%E% SMI"
+
+#ifdef	__cplusplus
+extern "C" {
+#endif
+
+/*
+ * serengeti.h - Serengeti/WildCat common header file
+ *
+ * This header file contains the common definitions and macros for the
+ * Serengeti and WildCat platforms. We define them all here to avoid them
+ * being redefined in numerous different drivers.
+ */
+
+#include <sys/dditypes.h>
+
+/*
+ * Definitions
+ * ===========
+ */
+
+#ifndef	TRUE
+#define	TRUE	1
+#endif
+
+#ifndef	FALSE
+#define	FALSE	0
+#endif
+
+
+#define	SG_MAX_IO_PER_BD		5	/* 4 pci buses + cpci */
+#define	SG_MAX_CMPS_PER_BD		4
+#define	SG_MAX_CPUS_PER_BD		8
+#define	SG_MAX_MEM_PER_BD		1
+#define	SG_MAX_CPU_BDS			6
+#define	SG_MAX_IO_BDS			4
+#define	SG_MAX_POWER_SUPPLIES		6
+#define	SG_MAX_FAN_TRAYS		6
+#define	SG_MAX_REPEATER_BDS		4
+#define	SG_MAX_BDS			(SG_MAX_CPU_BDS + SG_MAX_IO_BDS)
+#define	SG_MAX_CPUS			(SG_MAX_CPUS_PER_BD * SG_MAX_CPU_BDS)
+
+#define	SG_MAX_SLOTS_PER_IO_BD		8
+#define	SG_SCHIZO_PER_IO_BD		2
+
+#define	SSM_MAX_INSTANCES		16
+#define	SSM_MAX_BDS			(SSM_MAX_INSTANCES * SG_MAX_BDS)
+
+#define	SG_MIN_CPU_SAFARI_ID		0	/* 0x00 */
+#define	SG_MAX_CPU_SAFARI_ID		23	/* 0x17 */
+#define	SG_MIN_IO_SAFARI_ID		24	/* 0x18 */
+#define	SG_MAX_IO_SAFARI_ID		31	/* 0x1F */
+
+
+/*
+ * possible states for the Keyswitch Position.
+ */
+#define	SG_KEYSWITCH_POSN_UNKNOWN	(-1)
+#define	SG_KEYSWITCH_POSN_ON		2
+#define	SG_KEYSWITCH_POSN_DIAG		3
+#define	SG_KEYSWITCH_POSN_SECURE	4
+
+
+
+/*
+ * Macros
+ * ======
+ */
+
+/* we only need the 5 LSB of the portid to calculate the board number */
+#define	SG_SAFARI_ID_MASK		0x1F	/* 5 bits */
+#define	SG_CPU_ID_MASK			0x21F	/* bit 9 and bits 0-4 */
+#define	SG_CORE_ID_MASK			0x200	/* bit 9 */
+#define	SG_NODE_MASK			0x0F	/* 4 bits */
+#define	SG_PORTID_NODE_SHIFT		5
+
+/*
+ * For Serengeti and WildCat the portid consists of 10 bits.
+ *
+ * [9] [8 -------- 5][4 --------- 0]
+ *  ^      NodeID        AgentID
+ *  |___ Used in CMP to identify core 1.  Unused with non-CMP.
+ *
+ * For CPU boards:
+ *	Aid <4:2>			: Board ID/Number
+ *	Aid <1:0>			: CPU ID
+ * For IO boards:
+ *	(Aid <4:0> - 24) / 2 + 6	: Board ID/Number
+ * 	(Aid <4:0> - 24) % 2		: Schizo ID
+ */
+
+/*
+ * For Jaguar there are two CPU IDs the can be derived from portid
+ * and coreid.  On Serengeti, bit 9 is set for core 1, resulting in
+ * the cpuid for core 1 being 512 off from the one for core 0.
+ */
+#define	SG_JG_CORE1_SHIFT		9
+#define	SG_JG_CORE1_OFFSET		(1 << SG_JG_CORE1_SHIFT)
+#define	SG_PORTID_TO_CPUID(p, c)	((p) + ((c) << SG_JG_CORE1_SHIFT))
+#define	SG_PORTID_TO_CPU_UNIT(p, c)	((p % SG_MAX_CMPS_PER_BD) | \
+					    ((c) * SG_MAX_CMPS_PER_BD))
+#define	SG_CPUID_TO_PORTID(c)		((c) & SG_SAFARI_ID_MASK)
+#define	SG_CPUID_TO_COREID(c)		(((c) & SG_CORE_ID_MASK) >> \
+					    SG_JG_CORE1_SHIFT)
+#define	SG_CPUID_TO_CPU_UNIT(c)		SG_PORTID_TO_CPU_UNIT( \
+					    SG_CPUID_TO_PORTID(c), \
+					    SG_CPUID_TO_COREID(c))
+
+/*
+ * SG_PORTID_TO_NODEID
+ *
+ * Calculates the SSM NodeID from the portid
+ */
+#define	SG_PORTID_TO_NODEID(portid)	(((portid) >> SG_PORTID_NODE_SHIFT) & \
+						SG_NODE_MASK)
+
+/*
+ * SG_PORTID_TO_SAFARI_ID
+ *
+ * Calculates the Safari Agent ID from the portid.
+ */
+#define	SG_PORTID_TO_SAFARI_ID(portid)	((portid) & SG_SAFARI_ID_MASK)
+
+
+/*
+ * SG_PORTID_TO_BOARD_NUM
+ *
+ * If a valid portid is passed in, this macro returns the board number
+ * associated with it, otherwise it returns -1.
+ */
+#define	SG_PORTID_TO_BOARD_NUM(portid) \
+	((SG_PORTID_IS_CPU_TYPE(portid)) ? \
+		(SG_CPU_BD_PORTID_TO_BD_NUM(portid)) : \
+	((SG_PORTID_IS_IO_TYPE(portid)) ? \
+		SG_IO_BD_PORTID_TO_BD_NUM(portid) : (-1)))
+
+/*
+ * SG_BOARD_IS_CPU_TYPE
+ *
+ * If the board number of a board of CPU type is passed in, TRUE is returned,
+ * otherwise FALSE.
+ */
+#define	SG_BOARD_IS_CPU_TYPE(board_num) \
+	((((board_num) >= 0) && ((board_num) < SG_MAX_CPU_BDS)) ? TRUE: FALSE)
+
+/*
+ * SG_BOARD_IS_IO_TYPE
+ *
+ * If the board number of a board of IO type is passed in, TRUE is returned,
+ * otherwise FALSE.
+ */
+#define	SG_BOARD_IS_IO_TYPE(board_num) \
+	((((board_num) >= SG_MAX_CPU_BDS) && \
+		((board_num) < SG_MAX_BDS)) ? TRUE: FALSE)
+
+/*
+ * SG_PORTID_IS_CPU_TYPE
+ *
+ * If the portid associated with a CPU board is passed in, TRUE is returned,
+ * otherwise FALSE.
+ */
+#define	SG_PORTID_IS_CPU_TYPE(portid) \
+	(((((portid) & SG_SAFARI_ID_MASK) >= SG_MIN_CPU_SAFARI_ID) && \
+	(((portid) & SG_SAFARI_ID_MASK) <= SG_MAX_CPU_SAFARI_ID)) ? TRUE: FALSE)
+
+/*
+ * SG_PORTID_IS_IO_TYPE
+ *
+ * If the portid associated with an IO board is passed in, TRUE is returned,
+ * otherwise FALSE.
+ */
+#define	SG_PORTID_IS_IO_TYPE(portid) \
+	(((((portid) & SG_SAFARI_ID_MASK) >= SG_MIN_IO_SAFARI_ID) && \
+	(((portid) & SG_SAFARI_ID_MASK) <= SG_MAX_IO_SAFARI_ID)) ? TRUE: FALSE)
+
+/*
+ * SG_CPU_BD_PORTID_TO_BD_NUM
+ *
+ * If the portid associated with a CPU board is passed in, the board number
+ * associated with this portid is returned, otherwise -1.
+ */
+#define	SG_CPU_BD_PORTID_TO_BD_NUM(portid) \
+	((SG_PORTID_IS_CPU_TYPE(portid)) ? \
+		(((portid) & SG_SAFARI_ID_MASK) / 4) : (-1))
+
+/*
+ * SG_IO_BD_PORTID_TO_BD_NUM
+ *
+ * If the portid associated with an IO board is passed in, the board number
+ * associated with this portid is returned, otherwise -1.
+ */
+#define	SG_IO_BD_PORTID_TO_BD_NUM(portid) \
+	(SG_PORTID_IS_IO_TYPE(portid) ? \
+		(((((portid) & SG_SAFARI_ID_MASK) - 24) / 2) + 6) : (-1))
+
+/*
+ * SG_PORTID_TO_CPU_POSN
+ *
+ * If the portid associated with a CPU board is passed in, the position
+ * of the CPU module for this portid is returned, otherwise -1.
+ */
+#define	SG_PORTID_TO_CPU_POSN(portid) \
+	((SG_PORTID_IS_CPU_TYPE(portid)) ? \
+		(((portid) & SG_SAFARI_ID_MASK) % 4) : (-1))
+
+/*
+ * Serengeti slices are defined by bits 34..41 of the physical address
+ * space, and can contain Safari agent ID bits depending upon the SC
+ * firmware being used.
+ */
+
+#define	PA_SLICE_SHIFT		(34)
+#define	PFN_SLICE_SHIFT		(PA_SLICE_SHIFT - MMU_PAGESHIFT)
+#define	PA_2_SLICE(pa)		(((pa) >> PA_SLICE_SHIFT) & SG_SLICE_MASK)
+#define	PFN_2_SLICE(pfn)	(((pfn) >> PFN_SLICE_SHIFT) & SG_SLICE_MASK)
+
+/* Define the max memory banks per CPU board */
+#define	SG_MAX_BANKS_PER_MC	(4)
+
+/* Define the number of possible slices for the span of slice bits */
+#define	SG_SLICE_MASK		(0xff)
+#define	SG_MAX_SLICE		(SG_SLICE_MASK + 1)
+
+/*
+ * b represents the SB and c represents the processor (P)
+ * in relation to the SB.
+ */
+#define	MAKE_CPUID(b, c)	((b*4) + c)
+
+/* Each physical CPU has 2 ecache DIMMs */
+#define	SG_NUM_ECACHE_DIMMS_PER_CPU	2
+
+/* Bit 4 of the physical address indicates ecache dimm 0 or 1 */
+#define	SG_ECACHE_DIMM_SHIFT	4
+#define	SG_ECACHE_DIMM_MASK	0x10
+
+extern	dev_info_t	*find_chosen_dip(void);
+
+extern int sg_get_prom_version(int *sysp, int *intfp, int *bldp);
+extern int sg_prom_sb_dr_check(void);
+extern int sg_prom_cpci_dr_check(void);
+extern int sg_get_ecacheunum(int cpuid, uint64_t physaddr, char *buf,
+    uint_t buflen, int *lenp);
+
+#ifdef	__cplusplus
+}
+#endif
+
+#endif	/* _SYS_SERENGETI_H */
diff --git a/usr/src/uts/sun4u/serengeti/sys/sgcn.h b/usr/src/uts/sun4u/serengeti/sys/sgcn.h
new file mode 100644
index 0000000000..94e8f026ea
--- /dev/null
+++ b/usr/src/uts/sun4u/serengeti/sys/sgcn.h
@@ -0,0 +1,162 @@
+/*
+ * CDDL HEADER START
+ *
+ * The contents of this file are subject to the terms of the
+ * Common Development and Distribution License (the "License").
+ * You may not use this file except in compliance with the License.
+ *
+ * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
+ * or http://www.opensolaris.org/os/licensing.
+ * See the License for the specific language governing permissions
+ * and limitations under the License.
+ *
+ * When distributing Covered Code, include this CDDL HEADER in each
+ * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
+ * If applicable, add the following below this CDDL HEADER, with the
+ * fields enclosed by brackets "[]" replaced with your own identifying
+ * information: Portions Copyright [yyyy] [name of copyright owner]
+ *
+ * CDDL HEADER END
+ */
+
+/*
+ * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
+ * Use is subject to license terms.
+ */
+
+#ifndef	_SGCN_H
+#define	_SGCN_H
+
+#pragma ident	"%Z%%M%	%I%	%E% SMI"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * Console driver
+ *
+ * There is no hardware serial port is provided. A standalone
+ * co-processor SC acts as console device. The communication
+ * between SC and a domain is via SRAM on the choosen I/O board.
+ *
+ * This driver manipulates SRAM from domain Solaris side.
+ */
+
+/*
+ * Logically there are two sets of interfaces defined here.
+ * The first part describes IOSRAM structures and will be
+ * exposed to all relevant clients, like SC, OBP.
+ * The second part defines internal driver data structure
+ * used by sgcn dirver.
+ */
+
+#include <sys/types.h>
+#include <sys/stream.h>
+#include <sys/tty.h>
+#include <sys/ddi.h>
+#include <sys/sunddi.h>
+
+/*
+ * IOSRAM structure
+ *
+ * Solaris and OBP use separate console buffers. But they share
+ * the same console buffer structure.
+ *
+ *              +---------------+ <- console buffer base address (BASE)
+ *              |   header      |
+ *              +---------------+ <- cnsram_in_begin + BASE
+ *              |   input       |
+ *              |   buffer      | <- cnsram_in_rdptr + BASE
+ *              |               | <- cnsram_in_wrptr + BASE
+ *              |               |
+ *              +---------------+ <- cnsram_in_end + BASE
+ *              |///////////////|
+ *              |///////////////| <- reserved for future expansion
+ *              |///////////////|
+ *              +---------------+ <- cnsram_out_begin + BASE
+ *              |   output      |
+ *              |   buffer      | <- cnsram_out_rdptr + BASE
+ *              |               | <- cnsram_out_wrptr + BASE
+ *              +---------------+ <- cnsram_out_end + BASE
+ *              |///////////////|
+ *              |///////////////| <- reserved for future expansion
+ *              |///////////////|
+ *              +---------------+ <- cnsram_size + BASE
+ */
+
+/*
+ * Console IOSRAM header structure
+ * The header size is fixed, despite of 32-bit or 64-bit Solaris
+ */
+typedef struct {
+	int32_t cnsram_magic;		/* magic number, CNSRAM_MAGIC	*/
+	int32_t cnsram_version;		/* verison number		*/
+	int32_t cnsram_size;		/* console buffer size		*/
+
+	/*
+	 * the followings are all relative to beginning of console buffer
+	 */
+	int32_t cnsram_in_begin;
+	int32_t cnsram_in_end;
+	int32_t cnsram_in_rdptr;
+	int32_t cnsram_in_wrptr;
+
+	int32_t cnsram_out_begin;
+	int32_t cnsram_out_end;
+	int32_t cnsram_out_rdptr;
+	int32_t cnsram_out_wrptr;
+} cnsram_header;
+
+#define	CNSRAM_MAGIC		0x434F4E00		/* "CON" */
+#define	CNSRAM_VERSION_1	1
+
+/*
+ * sgcn driver's soft state structure
+ */
+typedef struct sgcn {
+	/* mutexes */
+	kmutex_t sgcn_lock;		/* protects sgcn_t (soft state)	*/
+
+	/* these are required by sbbc driver */
+	kmutex_t sgcn_sbbc_in_lock;	/* input data lock 		*/
+	kmutex_t sgcn_sbbc_outspace_lock; /* output data lock 		*/
+	kmutex_t sgcn_sbbc_brk_lock;	/* break sequence lock 		*/
+	uint_t sgcn_sbbc_in_state;	/* input data state		*/
+	uint_t sgcn_sbbc_outspace_state; /* output data state		*/
+	uint_t sgcn_sbbc_brk_state;	/* break sequence state		*/
+
+	/* stream queues */
+	queue_t *sgcn_writeq;		/* stream write queue		*/
+	queue_t	*sgcn_readq;		/* stream read queue		*/
+
+	/* pre-allocated console input buffer */
+	char *sgcn_inbuf;		/* console input buffer		*/
+	uint_t sgcn_inbuf_size;		/* buffer size			*/
+
+	/* dev info */
+	dev_info_t	*sgcn_dip;	/* dev_info			*/
+
+	/* for handling IOCTL messages */
+	bufcall_id_t	sgcn_wbufcid;	/* for console ioctl	*/
+	tty_common_t	sgcn_tty;	/* for console ioctl	*/
+
+	/* for console output timeout */
+	time_t sgcn_sc_active;		/* last time (sec) SC was active */
+
+} sgcn_t;
+
+/* Constants used by promif routines */
+#define	SGCN_CLNT_STR	"CON_CLNT"
+#define	SGCN_OBP_STR	"CON_OBP"
+
+/* alternate break sequence */
+extern void (*abort_seq_handler)();
+
+extern struct mod_ops mod_driverops;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif	/* _SGCN_H */
diff --git a/usr/src/uts/sun4u/serengeti/sys/sghsc.h b/usr/src/uts/sun4u/serengeti/sys/sghsc.h
new file mode 100644
index 0000000000..04bd5bdbef
--- /dev/null
+++ b/usr/src/uts/sun4u/serengeti/sys/sghsc.h
@@ -0,0 +1,297 @@
+/*
+ * CDDL HEADER START
+ *
+ * The contents of this file are subject to the terms of the
+ * Common Development and Distribution License (the "License").
+ * You may not use this file except in compliance with the License.
+ *
+ * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
+ * or http://www.opensolaris.org/os/licensing.
+ * See the License for the specific language governing permissions
+ * and limitations under the License.
+ *
+ * When distributing Covered Code, include this CDDL HEADER in each
+ * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
+ * If applicable, add the following below this CDDL HEADER, with the
+ * fields enclosed by brackets "[]" replaced with your own identifying
+ * information: Portions Copyright [yyyy] [name of copyright owner]
+ *
+ * CDDL HEADER END
+ */
+
+/*
+ * Copyright 2001 Sun Microsystems, Inc.  All rights reserved.
+ * Use is subject to license terms.
+ */
+
+#ifndef	_SYS_SGHSC_H
+#define	_SYS_SGHSC_H
+
+#pragma ident	"%Z%%M%	%I%	%E% SMI"
+
+#ifdef	__cplusplus
+extern "C" {
+#endif
+
+/*
+ * Serengeti CompactPCI Hot Swap Controller Driver header file. This file is
+ * structured in a following way: common, sghsc data (defines and structures)
+ * and mailbox related data (defines and structures).
+ */
+
+#include <sys/hotplug/hpctrl.h>
+#include <sys/hotplug/hpcsvc.h>
+#include <sys/sgsbbc_mailbox.h>
+
+/*
+ * sghsc node path with insert placeholders
+ */
+#define	SGHSC_PATH		"/ssm@%x,0/pci@%x,%x00000"
+
+/*
+ * Mutex short hands
+ */
+#define	SGHSC_MUTEX(sghsc) \
+	(&sghsc->sghsc_mutex)
+#define	SGHSC_MUTEX_OWNED(sghsc) \
+	mutex_owned(SGHSC_MUTEX(sghsc))
+#define	SGHSC_MUTEX_ENTER(sghsc) \
+	mutex_enter(SGHSC_MUTEX(sghsc))
+#define	SGHSC_MUTEX_EXIT(sghsc) \
+	mutex_exit(SGHSC_MUTEX(sghsc))
+
+#define	SGHSC_SLOT_MUTEX(sghsc, slot_num) \
+	(&sghsc->sghsc_slot_table[slot_num]->slot_mutex)
+#define	SGHSC_SLOT_MUTEX_OWNED(sghsc, slot_num) \
+	mutex_owned(SGHSC_SLOT_MUTEX(sghsc, slot_num));
+#define	SGHSC_SLOT_MUTEX_ENTER(sghsc, slot_num) \
+	mutex_enter(SGHSC_SLOT_MUTEX(sghsc, slot_num));
+#define	SGHSC_SLOT_MUTEX_EXIT(sghsc, slot_num) \
+	mutex_exit(SGHSC_SLOT_MUTEX(sghsc, slot_num));
+
+/*
+ * Misc definitions
+ */
+#define	SGHSC_ALL_SLOTS_ENABLE	0x3F
+#define	SGHSC_SLOT_ENABLE	0x01
+#define	SGHSC_ALL_SLOTS_DISABLE	0x02
+#define	SGHSC_SLOT_DISABLE	0x03
+#define	SGHSC_ALL_LEDS_ENABLE	0x3F3F
+#define	SGHSC_LED_ENABLE	0x04
+#define	SGHSC_ALL_LEDS_DISABLE	0x05
+#define	SGHSC_LED_DISABLE	0x06
+#define	SGHSC_LED_BLINKING	0x07
+#define	SGHSC_SLOT_ISOLATE	0x08
+#define	SGHSC_SLOT_POWER	0x09
+#define	SGHSC_LED_ENABLE_MASK	0x0000FFFF
+#define	SGHSC_SAFARI_ID_EVEN	0x3fe
+
+
+/* Individual events definitions */
+#define	SGHSC_EVENT_CARD_INSERT		0x1
+#define	SGHSC_EVENT_CARD_REMOVE		0x2
+#define	SGHSC_EVENT_LEVER_ACTION	0x3
+#define	SGHSC_EVENT_HEALTHY_LOST	0x4
+#define	SGHSC_EVENT_POWER_ON		0x5
+#define	SGHSC_EVENT_POWER_OFF		0x6
+
+/* Slot flags */
+#define	SGHSC_SLOT_AUTO_CFG_EN	0x1
+#define	SGHSC_SLOT_HEALTHY_LOST	0x2
+
+/* LED definitions */
+#define	SGHSC_POWER_LED		0x10
+#define	SGHSC_FAULT_LED		0x20
+#define	SGHSC_ACTIVE_LED	0x40
+#define	SGHSC_ATTN_LED		0x80
+
+/* Ring buffer size, has to be power of 2 */
+#define	SGHSC_RING_BUFFER_SZ	0x10
+
+/*
+ * Per Hot Swappable Slot info
+ */
+typedef struct sghsc_slot {
+
+	/*
+	 * Mutex for each slots for state change
+	 */
+	kmutex_t		slot_mutex;
+
+	/*
+	 * pathname of bus node
+	 */
+	char nexus_path[MAXPATHLEN];
+
+	/*
+	 * property, status, cap  for each slot
+	 */
+	hpc_slot_info_t		slot_info;
+	hpc_slot_state_t	slot_status;
+	uint32_t		slot_capb;
+
+	/*
+	 * PCI Bus number for each slot
+	 */
+	uint8_t			pci_device_num;
+
+	/*
+	 * dynamically allocated hpc_slot_ops_t
+	 * and register slot handle
+	 */
+	hpc_slot_ops_t		*slot_ops;
+	hpc_slot_t		handle;
+
+	/*
+	 * Leds for each slot are not cached
+	 */
+
+	/*
+	 * slot state, flags, board type
+	 */
+	uint32_t		flags;
+	uint32_t		state;
+	uint32_t		board_type;
+
+} sghsc_slot_t;
+
+/*
+ * Per Serenget CompactPCI HSC instance soft state structure
+ */
+typedef struct sghsc {
+	dev_info_t	*sghsc_dip;
+	kmutex_t	sghsc_mutex;
+	uint32_t	sghsc_instance;
+	uint32_t	sghsc_board;
+	uint32_t	sghsc_node_id;
+	uint32_t	sghsc_portid;
+	uint32_t	sghsc_num_slots;
+	uint32_t	sghsc_valid;
+	sghsc_slot_t	*sghsc_slot_table;
+} sghsc_t;
+
+/*
+ * Slot map descriptor (slot to bus segment mapping)
+ */
+typedef struct sdesc {
+	uint32_t	agent_delta;
+	uint32_t	off;
+	uint32_t	pcidev;
+	uint32_t	slot_type;
+} sdesc_t;
+
+/*
+ * Mailbox related data and structures
+ */
+#define	CPCI_GET_SLOT_STATUS		0x5000
+#define	CPCI_SET_SLOT_FAULT_LED		0x5001
+#define	CPCI_SET_SLOT_STATUS		0x5002
+#define	CPCI_SET_SLOT_POWER		0x5003
+#define	CPCI_GET_NUM_SLOTS		0x5004
+#define	CPCI_SET_ENUM_CLEARED		0x5005
+#define	CPCI_BOARD_TYPE			0x5006
+
+/*
+ * Bit definition for Boat Type
+ */
+#define	NO_BOARD_TYPE			0
+#define	PCI_BOARD			1
+#define	CPCI_BOARD			2
+#define	SP_CPCI_BOARD			3
+#define	WCI_CPCI_BOARD			4
+#define	WCI_SP_CPCI_BOARD		5
+
+/*
+ * Shifts definition for CPCI_GET_SLOT_STATUS
+ */
+#define	ONE_BIT				1
+#define	TWO_BITS			3
+#define	THREE_BITS			7
+#define	CPCI_STAT_POWER_ON_SHIFT	0
+#define	CPCI_STAT_LED_POWER_SHIFT	1
+#define	CPCI_STAT_LED_FAULT_SHIFT	2
+#define	CPCI_STAT_LED_HP_SHIFT		3
+#define	CPCI_STAT_SLOT_EMPTY_SHIFT	4
+#define	CPCI_STAT_HOT_SWAP_STATUS_SHIFT	5
+#define	CPCI_STAT_HEALTHY_SHIFT		12	/* One bit */
+#define	CPCI_STAT_RESET_SHIFT		13	/* One bit */
+
+/*
+ * Bit definition for CPCI_SET_SLOT_STATUS
+ */
+#define	CPCI_SET_STATUS_SLOT_RESET	0x00001
+#define	CPCI_SET_STATUS_SLOT_READY	0x00000
+/*
+ * Bit definition for CPCI_SET_SLOT_STATUS_FAULT_LED
+ */
+#define	CPCI_SET_FAULT_LED_OFF		0x00000
+#define	CPCI_SET_FAULT_LED_ON		0x00001
+#define	CPCI_SET_FAULT_LED_KEEP		0x00002
+#define	CPCI_SET_FAULT_LED_TOGGLE	0x00003
+
+/*
+ * Bit definition for CPCI_SET_SLOT_POWER
+ */
+#define	CPCI_POWER_OFF	0x0
+#define	CPCI_POWER_ON	0x1
+
+/*
+ * Mailbox timeout
+ */
+#define	SGHSC_MBX_TIMEOUT		600
+
+/*
+ * cPCI command codes (internal)
+ */
+#define	_SGHSC_CODE			('N' << 16)
+
+#define	SGHSC_GET_SLOT_STATUS		(_SGHSC_CODE | 0x14)
+#define	SGHSC_SET_SLOT_STATUS_RESET	(_SGHSC_CODE | 0x15)
+#define	SGHSC_SET_SLOT_STATUS_READY	(_SGHSC_CODE | 0x16)
+#define	SGHSC_SET_SLOT_FAULT_LED_ON	(_SGHSC_CODE | 0x17)
+#define	SGHSC_SET_SLOT_FAULT_LED_OFF	(_SGHSC_CODE | 0x18)
+#define	SGHSC_SET_SLOT_FAULT_LED_KEEP	(_SGHSC_CODE | 0x19)
+#define	SGHSC_SET_SLOT_FAULT_LED_TOGGLE	(_SGHSC_CODE | 0x1a)
+#define	SGHSC_SET_SLOT_POWER_OFF	(_SGHSC_CODE | 0x1b)
+#define	SGHSC_SET_SLOT_POWER_ON		(_SGHSC_CODE | 0x1c)
+#define	SGHSC_GET_NUM_SLOTS		(_SGHSC_CODE | 0x1d)
+#define	SGHSC_SET_ENUM_CLEARED		(_SGHSC_CODE | 0x1e)
+#define	SGHSC_GET_CPCI_BOARD_TYPE	(_SGHSC_CODE | 0x1f)
+
+typedef struct {
+	uint32_t	cmd_id;
+	uint32_t	node_id;
+	uint32_t	board;
+	uint32_t	slot;
+	uint32_t	info;
+} bitcmd_info_t;
+
+typedef struct {
+	uint32_t	cmd_id;
+	uint32_t	result;
+} bitcmd_resp_t;
+
+typedef enum { SGHSC_RB_EMPTY, SGHSC_RB_FLOAT,
+	SGHSC_RB_FULL } sghsc_rb_state_t;
+
+typedef struct sghsc_event {
+	int type;
+	int node_id;
+	int board;
+	int slot;
+	int info;
+} sghsc_event_t;
+
+typedef struct sghsc_rb_head {
+	sghsc_event_t *buf;
+	int put_idx;
+	int get_idx;
+	int size;
+	sghsc_rb_state_t state;
+} sghsc_rb_head_t;
+
+#ifdef	__cplusplus
+}
+#endif
+
+#endif	/* _SYS_SGHSC_H */
diff --git a/usr/src/uts/sun4u/serengeti/sys/sgsbbc.h b/usr/src/uts/sun4u/serengeti/sys/sgsbbc.h
new file mode 100644
index 0000000000..10ea0a8d53
--- /dev/null
+++ b/usr/src/uts/sun4u/serengeti/sys/sgsbbc.h
@@ -0,0 +1,80 @@
+/*
+ * CDDL HEADER START
+ *
+ * The contents of this file are subject to the terms of the
+ * Common Development and Distribution License (the "License").
+ * You may not use this file except in compliance with the License.
+ *
+ * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
+ * or http://www.opensolaris.org/os/licensing.
+ * See the License for the specific language governing permissions
+ * and limitations under the License.
+ *
+ * When distributing Covered Code, include this CDDL HEADER in each
+ * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
+ * If applicable, add the following below this CDDL HEADER, with the
+ * fields enclosed by brackets "[]" replaced with your own identifying
+ * information: Portions Copyright [yyyy] [name of copyright owner]
+ *
+ * CDDL HEADER END
+ */
+
+/*
+ * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
+ * Use is subject to license terms.
+ */
+
+#ifndef	_SYS_SGSBBC_H
+#define	_SYS_SGSBBC_H
+
+#pragma ident	"%Z%%M%	%I%	%E% SMI"
+
+#ifdef	__cplusplus
+extern "C" {
+#endif
+
+/*
+ * Serengeti SBBC Driver
+ *
+ * The Serengeti SBBC driver handles communication between the
+ * System Controller Software (ScApp) and Solaris via SBBC
+ * registers and IOSRAM.
+ *
+ */
+#include <sys/serengeti.h>
+
+/*
+ * OS <-> SC Interrupt Reasons
+ */
+#define	SBBC_CONSOLE_IN			0x1 	/* console input available */
+#define	SBBC_CONSOLE_OUT		0x2	/* console output available */
+#define	SBBC_CONSOLE_BRK		0x4	/* break */
+#define	SBBC_CONSOLE_SPACE_IN		0x8	/* console has in space */
+#define	SBBC_CONSOLE_SPACE_OUT		0x10	/* console has out space */
+#define	SBBC_MAILBOX_IN 		0x20	/* mailbox message in */
+#define	SBBC_MAILBOX_OUT		0x40	/* mailbox message out */
+#define	SBBC_MAILBOX_SPACE_IN		0x80	/* mailbox has in space */
+#define	SBBC_MAILBOX_SPACE_OUT		0x100	/* mailbox has out space */
+
+/*
+ * SBBC needs to know what softint handlers are doing
+ */
+#define	SBBC_INTR_IDLE			0
+#define	SBBC_INTR_RUNNING		1
+
+typedef const char *const fn_t;
+
+typedef uint_t (*sbbc_intrfunc_t)(caddr_t);
+
+/* For printing out warning and panic messages */
+#define	SBBC_ERR(err, msg) \
+	{ prom_printf(msg); cmn_err(err, msg); }
+#define	SBBC_ERR1(err, msg, arg) \
+	{ prom_printf(msg, arg); cmn_err(err, msg, arg); }
+
+
+#ifdef	__cplusplus
+}
+#endif
+
+#endif	/* _SYS_SGSBBC_H */
diff --git a/usr/src/uts/sun4u/serengeti/sys/sgsbbc_iosram.h b/usr/src/uts/sun4u/serengeti/sys/sgsbbc_iosram.h
new file mode 100644
index 0000000000..1972b60ca8
--- /dev/null
+++ b/usr/src/uts/sun4u/serengeti/sys/sgsbbc_iosram.h
@@ -0,0 +1,109 @@
+/*
+ * CDDL HEADER START
+ *
+ * The contents of this file are subject to the terms of the
+ * Common Development and Distribution License (the "License").
+ * You may not use this file except in compliance with the License.
+ *
+ * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
+ * or http://www.opensolaris.org/os/licensing.
+ * See the License for the specific language governing permissions
+ * and limitations under the License.
+ *
+ * When distributing Covered Code, include this CDDL HEADER in each
+ * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
+ * If applicable, add the following below this CDDL HEADER, with the
+ * fields enclosed by brackets "[]" replaced with your own identifying
+ * information: Portions Copyright [yyyy] [name of copyright owner]
+ *
+ * CDDL HEADER END
+ */
+
+/*
+ * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
+ * Use is subject to license terms.
+ */
+
+#ifndef	_SYS_SGSBBC_IOSRAM_H
+#define	_SYS_SGSBBC_IOSRAM_H
+
+#pragma ident	"%Z%%M%	%I%	%E% SMI"
+
+#ifdef	__cplusplus
+extern "C" {
+#endif
+
+#include <sys/types.h>
+#include <sys/errno.h>
+#include <sys/sgsbbc.h>
+
+/*
+ * IOSRAM TOC as laid out for the OS by the SC/POST
+ *
+ * NB Any changes in the way POST/SC lays out the SRAM
+ * must be reflected here.
+ */
+#define	SBBC_MAX_KEYS		32
+
+#define	SBBC_CONSOLE_KEY	1	/* Solaris Console Buffer */
+#define	SBBC_TOD_KEY		2	/* Solaris TOD struct */
+#define	SBBC_INTR_SC_KEY	3	/* Solaris -> SC Interrupts reason */
+#define	SBBC_SC_INTR_KEY	4	/* SC -> Solaris Interrupts reason */
+#define	SBBC_DOMAIN_KEY		5	/* Domain state */
+#define	SBBC_KEYSWITCH_KEY	6	/* Keyswitch */
+#define	SBBC_MAILBOX_KEY	7	/* Solaris<->SC Mailbox */
+#define	SBBC_ENVCTRL_KEY	8	/* environmental data */
+#define	SBBC_SC_INTR_ENABLED_KEY	9	/* SC -> Solaris Interrupts */
+#define	SBBC_INTR_SC_ENABLED_KEY	10	/* Solaris -> SC  Interrupts */
+#define	SBBC_SIGBLCK_KEY	11	/* Signature block */
+
+/*
+ * size of the IOSRAM key
+ */
+#define	KEY_SIZE	8
+#define	MAGIC_SIZE	8
+
+typedef struct iosram_key {
+	char		key[KEY_SIZE];	/* Key value as defined above */
+	uint32_t	size;		/* length of this SRAM chunk */
+	uint32_t	offset;		/* Offset from base of SRAM */
+} iosram_key_t;
+
+struct iosram_toc {
+	char		iosram_magic[MAGIC_SIZE];	/* magic: TOCSRAM */
+	uint8_t		resvd;				/* reserved */
+	/* sram type: cpu, local io, global io, etc */
+	uint8_t		iosram_type;
+	uint16_t	iosram_version;			/* structure version */
+	uint32_t	iosram_tagno;			/* # of tags used */
+	iosram_key_t	iosram_keys[SBBC_MAX_KEYS];
+};
+
+
+/*
+ * interrupt related routines
+ */
+extern int	iosram_reg_intr(uint32_t, sbbc_intrfunc_t, caddr_t,
+			uint_t	*, kmutex_t *);
+extern int	iosram_unreg_intr(uint32_t);
+extern int	iosram_send_intr(uint32_t);
+
+/*
+ * IOSRAM read write routines
+ */
+extern int	iosram_read(int, uint32_t, caddr_t, uint32_t);
+extern int	iosram_write(int, uint32_t, caddr_t, uint32_t);
+
+/*
+ * Misc routines
+ */
+extern int	iosram_size(int);
+
+/* cached chosen node_id */
+extern pnode_t chosen_nodeid;
+
+#ifdef	__cplusplus
+}
+#endif
+
+#endif	/* _SYS_SGSBBC_IOSRAM_H */
diff --git a/usr/src/uts/sun4u/serengeti/sys/sgsbbc_iosram_priv.h b/usr/src/uts/sun4u/serengeti/sys/sgsbbc_iosram_priv.h
new file mode 100644
index 0000000000..0f82aac4ed
--- /dev/null
+++ b/usr/src/uts/sun4u/serengeti/sys/sgsbbc_iosram_priv.h
@@ -0,0 +1,152 @@
+/*
+ * CDDL HEADER START
+ *
+ * The contents of this file are subject to the terms of the
+ * Common Development and Distribution License (the "License").
+ * You may not use this file except in compliance with the License.
+ *
+ * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
+ * or http://www.opensolaris.org/os/licensing.
+ * See the License for the specific language governing permissions
+ * and limitations under the License.
+ *
+ * When distributing Covered Code, include this CDDL HEADER in each
+ * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
+ * If applicable, add the following below this CDDL HEADER, with the
+ * fields enclosed by brackets "[]" replaced with your own identifying
+ * information: Portions Copyright [yyyy] [name of copyright owner]
+ *
+ * CDDL HEADER END
+ */
+
+/*
+ * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
+ * Use is subject to license terms.
+ */
+
+#ifndef	_SYS_SGSBBC_IOSRAM_PRIV_H
+#define	_SYS_SGSBBC_IOSRAM_PRIV_H
+
+#pragma ident	"%Z%%M%	%I%	%E% SMI"
+
+#ifdef	__cplusplus
+extern "C" {
+#endif
+
+#include <sys/types.h>
+#include  <sys/errno.h>
+#include <sys/sgsbbc_priv.h>
+#include <sys/sgsbbc_iosram.h>
+
+/*
+ * The following keys are in I/O SRAM TOC
+ * and  used by the OS and SC-APP
+ * These are mapped to the numeric values below
+ *
+ * NB These must be kept in sync with POST/SC keys.
+ */
+#define	TOCKEY_DOMSTAT	"DOMSTAT"	/* SBBC_DOMAIN_KEY */
+#define	TOCKEY_KEYSWPO	"KEYSWPO"	/* SBBC_KEYSWITCH_KEY */
+#define	TOCKEY_TODDATA	"TODDATA"	/* SBBC_TOD_KEY */
+#define	TOCKEY_SOLCONS	"SOLCONS"	/* SBBC_CONSOLE_KEY */
+#define	TOCKEY_SOLMBOX	"SOLMBOX"	/* SBBC_MAILBOX_KEY */
+#define	TOCKEY_SOLSCIR	"SOLSCIR"	/* SBBC_INTR_SC_KEY */
+#define	TOCKEY_SCSOLIR	"SCSOLIR"	/* SBBC_SC_INTR_KEY */
+#define	TOCKEY_ENVINFO	"ENVINFO"	/* SBBC_ENVCTRL_KEY */
+/*
+ * Interrupts enabled that SC can send to OS
+ * read/only for SC
+ */
+#define	TOCKEY_SOLSCIE	"SOLSCIE"	/* SBBC_SC_INTR_ENABLED_KEY */
+/*
+ * Interrupts enabled that OS can send to SC
+ * read/only for OS
+ */
+#define	TOCKEY_SCSOLIE	"SCSOLIE"	/* SBBC_INTR_SC_ENABLED_KEY */
+/*
+ * CPU/Domain signatures block
+ */
+#define	TOCKEY_SIGBLCK	"SIGBLCK"	/* SBBC_SIGBLCK_KEY */
+
+
+/*
+ * different sram types
+ */
+#define	CPU_SRAM		1
+#define	LOCAL_IO_SRAM		2
+#define	GLOBAL_IO_SRAM		3
+#define	WCI_SRAM		4
+
+#define	INVALID_KEY(tunnel, x)  (tunnel->tunnel_keys[(x)].key == 0)
+
+/*
+ * Macros used for version checking
+ * The SBBC driver will check the major version number in the IOSRAM
+ * TOC entry.  If the major version number in the TOC entry is larger
+ * than the maximum number Solaris supports, Solaris will panic.
+ */
+#define	IOSRAM_TOC_VER_SHIFT	0x8	/* top 8 bit for major */
+#define	IOSRAM_TOC_VER_MASK	0xff	/* 8-bit for major, 8-bit for minor */
+
+/*
+ * IOSRAM/TOC propertes on chosen node
+ */
+#define	IOSRAM_CHOSEN_PROP	"iosram"
+#define	IOSRAM_TOC_PROP		"iosram-toc"
+
+typedef struct tunnel_key {
+	int			key;
+	caddr_t			base;	/* VA of this tunnel SRAM area */
+	int			size;
+	ddi_acc_handle_t	reg_handle;
+} tunnel_key_t;
+
+typedef struct tunnel {
+	tunnel_key_t	tunnel_keys[SBBC_MAX_KEYS];
+} tunnel_t;
+
+struct chosen_iosram {
+	/*
+	 * Global IOSRAM lock
+	 */
+	kmutex_t	iosram_lock;
+	/*
+	 * Tunnel lock to synchronize IOSRAM access
+	 */
+	krwlock_t	tunnel_lock;
+	/*
+	 * 'chosen' SBBC
+	 */
+	sbbc_softstate_t *iosram_sbbc;
+	sbbc_softstate_t *sgsbbc;	/* cross reference */
+
+	/*
+	 * pointer to an array of SBBC_MAX_KEYS tunnel entries
+	 */
+	tunnel_t	*tunnel;
+	/*
+	 * interrupt handlers
+	 */
+	sbbc_intrs_t	intrs[SBBC_MAX_INTRS];
+};
+
+
+extern void	iosram_init(void);
+extern void	iosram_fini(void);
+extern int	sgsbbc_iosram_is_chosen(sbbc_softstate_t *);
+
+/*
+ * tunnel switch related routines
+ */
+extern int	iosram_tunnel_init(sbbc_softstate_t *);
+extern int	sgsbbc_iosram_switchfrom(sbbc_softstate_t *);
+extern int	iosram_switch_tunnel(int);
+
+extern struct chosen_iosram *master_iosram;
+extern struct sbbc_softstate *sgsbbc_instances;
+
+#ifdef	__cplusplus
+}
+#endif
+
+#endif	/* _SYS_SGSBBC_IOSRAM_PRIV_H */
diff --git a/usr/src/uts/sun4u/serengeti/sys/sgsbbc_mailbox.h b/usr/src/uts/sun4u/serengeti/sys/sgsbbc_mailbox.h
new file mode 100644
index 0000000000..74cbe5a38e
--- /dev/null
+++ b/usr/src/uts/sun4u/serengeti/sys/sgsbbc_mailbox.h
@@ -0,0 +1,175 @@
+/*
+ * CDDL HEADER START
+ *
+ * The contents of this file are subject to the terms of the
+ * Common Development and Distribution License (the "License").
+ * You may not use this file except in compliance with the License.
+ *
+ * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
+ * or http://www.opensolaris.org/os/licensing.
+ * See the License for the specific language governing permissions
+ * and limitations under the License.
+ *
+ * When distributing Covered Code, include this CDDL HEADER in each
+ * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
+ * If applicable, add the following below this CDDL HEADER, with the
+ * fields enclosed by brackets "[]" replaced with your own identifying
+ * information: Portions Copyright [yyyy] [name of copyright owner]
+ *
+ * CDDL HEADER END
+ */
+
+/*
+ * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
+ * Use is subject to license terms.
+ */
+
+#ifndef	_SYS_SGSBBC_MAILBOX_H
+#define	_SYS_SGSBBC_MAILBOX_H
+
+#pragma ident	"%Z%%M%	%I%	%E% SMI"
+
+#include <sys/sgsbbc.h>
+
+#ifdef	__cplusplus
+extern "C" {
+#endif
+
+/*
+ * Message types - one per client!
+ */
+#define	SBBC_BROADCAST_MSG		0x0
+#define	OBP_MBOX			0x1
+#define	DR_MBOX				0x2
+#define	WILDCAT_RSM_MBOX		0x3
+#define	SG_ENV				0x4	/* environmental data */
+#define	CPCI_MBOX			0x5
+#define	INFO_MBOX			0x6	/* for passing info to the SC */
+#define	SGFRU_MBOX			0x7	/* FRUID messages */
+#define	MBOX_EVENT_GENERIC		0x8
+#define	MBOX_EVENT_KEY_SWITCH		0x9
+#define	MBOX_EVENT_PANIC_SHUTDOWN	0xb
+#define	MBOX_EVENT_ENV			0xc
+#define	MBOX_EVENT_CPCI_ENUM		0xd
+#define	LW8_MBOX			0xe
+#define	MBOX_EVENT_LW8			0xf
+#define	MBOX_EVENT_DP_ERROR		0x10	/* datapath error */
+#define	MBOX_EVENT_DP_FAULT		0x11	/* datapath fault */
+
+#ifdef	DEBUG
+#define	DBG_MBOX		0x1f	/* debug messages */
+#endif	/* DEBUG */
+
+/*
+ * INFO_MBOX message sub-types
+ */
+#define	INFO_MBOX_NODENAME	0x6000	/* for passing nodename to SC */
+#define	INFO_MBOX_ERROR_NOTICE	0x6001	/* for logging ECC errors to SC */
+#define	INFO_MBOX_ERROR_ECC	0x6003	/* updated interface for logging */
+					/* ECC errors to SC */
+#define	INFO_MBOX_ERROR_INDICT	0x6004	/* for logging ECC indictments to SC */
+#define	INFO_MBOX_ECC		0x6005	/* new interface for logging */
+#define	INFO_MBOX_ECC_CAP	0x6006	/* capability message */
+
+/*
+ * Message status values returned by the SC to the various mailbox clients.
+ *
+ * These values need to be kept in sync with MailboxProtocol.java
+ * in the SCAPP source code.
+ */
+#define	SG_MBOX_STATUS_SUCCESS				0
+#define	SG_MBOX_STATUS_COMMAND_FAILURE			(-1)
+#define	SG_MBOX_STATUS_HARDWARE_FAILURE			(-2)
+#define	SG_MBOX_STATUS_ILLEGAL_PARAMETER		(-3)
+#define	SG_MBOX_STATUS_BOARD_ACCESS_DENIED		(-4)
+#define	SG_MBOX_STATUS_STALE_CONTENTS			(-5)
+#define	SG_MBOX_STATUS_STALE_OBJECT			(-6)
+#define	SG_MBOX_STATUS_NO_SEPROM_SPACE			(-7)
+#define	SG_MBOX_STATUS_NO_MEMORY			(-8)
+#define	SG_MBOX_STATUS_NOT_SUPPORTED			(-9)
+#define	SG_MBOX_STATUS_ILLEGAL_NODE			(-10)
+#define	SG_MBOX_STATUS_ILLEGAL_SLOT			(-11)
+
+
+/*
+ * Time out values in seconds.
+ *
+ * These definitions should not be used directly except by the
+ * sbbc_mbox_xxx_timeout variables. All clients should then use
+ * these variables to allow running kernels to modify wait times.
+ */
+#define	MBOX_MIN_TIMEOUT	1	/* min time to wait before timeout */
+#define	MBOX_DEFAULT_TIMEOUT	30	/* suggested wait time */
+
+/*
+ * Timeout variables
+ */
+extern int	sbbc_mbox_min_timeout;		/* minimum wait time */
+extern int	sbbc_mbox_default_timeout;	/* suggested wait time */
+
+
+/*
+ * Message type consists of two parts
+ * type - client ID
+ * sub_type - client defined message type
+ */
+typedef struct {
+	uint16_t	sub_type;
+	uint16_t	type;
+} sbbc_msg_type_t;
+
+/*
+ * this struct is used by client programs to request
+ * mailbox message services
+ */
+typedef struct sbbc_msg {
+	sbbc_msg_type_t	msg_type;	/* message type */
+	int	msg_status;		/* message return value */
+	int	msg_len;		/* size of message buffer */
+	int	msg_bytes;		/* number of bytes returned */
+	caddr_t	msg_buf;		/* message buffer */
+	int32_t	msg_data[2];		/* for junk mail */
+} sbbc_msg_t;
+
+/*
+ * This data structure is used for queueing up ECC event mailbox
+ * messages through the SBBC taskq.
+ */
+
+typedef struct sbbc_ecc_mbox {
+	sbbc_msg_t	ecc_req;	/* request */
+	sbbc_msg_t	ecc_resp;	/* response */
+	int		ecc_log_error;	/* Log errors to /var/adm/messages */
+} sbbc_ecc_mbox_t;
+
+/*
+ * ECC event mailbox taskq parameters
+ */
+#define	ECC_MBOX_TASKQ_MIN	2	/* minimum number of jobs */
+#define	ECC_MBOX_TASKQ_MAX	512	/* maximum number of jobs */
+
+/*
+ * These are used to throttle error messages that may appear if
+ * the attempt to enqueue an ECC event message to the SC fails.
+ * If set to N > 0, then only every Nth message will be output.
+ * Set to 0 or 1 to disable this throttling and allow all error
+ * messages to appear.
+ *
+ * ECC_MBOX_TASKQ_ERR_THROTTLE is the default value for
+ * sbbc_ecc_mbox_err_throttle, which may be overridden in
+ * /etc/system or at run time via debugger.
+ */
+#define	ECC_MBOX_TASKQ_ERR_THROTTLE	64
+extern int	sbbc_ecc_mbox_err_throttle;
+
+extern int	sbbc_mbox_reg_intr(uint32_t, sbbc_intrfunc_t,
+		sbbc_msg_t *, uint_t *, kmutex_t *);
+extern int	sbbc_mbox_unreg_intr(uint32_t, sbbc_intrfunc_t);
+extern int	sbbc_mbox_request_response(sbbc_msg_t *,
+		sbbc_msg_t *, time_t);
+
+#ifdef	__cplusplus
+}
+#endif
+
+#endif	/* _SYS_SGSBBC_MAILBOX_H */
diff --git a/usr/src/uts/sun4u/serengeti/sys/sgsbbc_mailbox_priv.h b/usr/src/uts/sun4u/serengeti/sys/sgsbbc_mailbox_priv.h
new file mode 100644
index 0000000000..b8c073f0b5
--- /dev/null
+++ b/usr/src/uts/sun4u/serengeti/sys/sgsbbc_mailbox_priv.h
@@ -0,0 +1,205 @@
+/*
+ * CDDL HEADER START
+ *
+ * The contents of this file are subject to the terms of the
+ * Common Development and Distribution License (the "License").
+ * You may not use this file except in compliance with the License.
+ *
+ * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
+ * or http://www.opensolaris.org/os/licensing.
+ * See the License for the specific language governing permissions
+ * and limitations under the License.
+ *
+ * When distributing Covered Code, include this CDDL HEADER in each
+ * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
+ * If applicable, add the following below this CDDL HEADER, with the
+ * fields enclosed by brackets "[]" replaced with your own identifying
+ * information: Portions Copyright [yyyy] [name of copyright owner]
+ *
+ * CDDL HEADER END
+ */
+
+/*
+ * Copyright 2001 Sun Microsystems, Inc.  All rights reserved.
+ * Use is subject to license terms.
+ */
+
+#ifndef	_SYS_SGSBBC_MAILBOX_PRIV_H
+#define	_SYS_SGSBBC_MAILBOX_PRIV_H
+
+#pragma ident	"%Z%%M%	%I%	%E% SMI"
+
+#include <sys/sgsbbc_mailbox.h>
+
+#ifdef	__cplusplus
+extern "C" {
+#endif
+
+/*
+ * Internal flags for message processing
+ */
+#define	WAIT_FOR_REPLY		0x1
+#define	NOWAIT_FOR_REPLY	0x2
+#define	WAIT_FOR_SPACE		0x4
+#define	NOWAIT_FOR_SPACE	0x8
+
+#define	MBOX_INTRS		4
+#define	MBOX_MSGIN_INTR		0
+#define	MBOX_MSGOUT_INTR	1
+#define	MBOX_SPACEIN_INTR	2
+#define	MBOX_SPACEOUT_INTR	3
+
+
+#define	SBBC_MAILBOXES		2	/* InBox & OutBox */
+#define	SBBC_INBOX		0
+#define	SBBC_OUTBOX		1
+#define	SBBC_MBOX_MSG_TYPES	32	/* this will do for now */
+#define	SBBC_MBOX_INTR_TYPES	4	/* see below */
+
+
+#define	SBBC_MSG_TYPE_MASK	0xffff
+
+/* Number of bytes the mailbox messages align at */
+#define	MBOX_ALIGN_BYTES	8	/* align at 8-byte boundary */
+
+#define	PANIC_ENV_EVENT_MSG		"SC triggered Domain shutdown due to " \
+					"temperature exceeding limits.\n"
+
+/*
+ * This struct is used internally by both the SC & OS mailbox
+ * handlers. Every message in the mailbox is made up
+ * of a fragment struct followed immediately by some optional
+ * user data. (We will allow zero-length messages.)
+ *
+ * Note: ID == 0 => unsolicited
+ *
+ * make them all 32-bit ints and add a bit of
+ * user-data padding to make life easy for the SC
+ */
+struct sbbc_fragment {
+	uint32_t	f_id;		/* msg_id */
+	sbbc_msg_type_t	f_type;		/* msg_type */
+	uint32_t	f_status;	/* not used yet */
+	uint32_t	f_total_len;
+	uint32_t	f_frag_len;
+	uint32_t	f_frag_offset;	/* offset into msg_buf */
+	uint32_t	f_data[2];	/* for junk mail */
+};
+
+
+typedef enum { INBOX, OUTBOX } mb_type_t;
+
+/*
+ * this describes the In/Out mailboxes
+ */
+typedef struct sbbc_mbox {
+	kmutex_t	mb_lock;	/* global lock for this mailbox */
+	mb_type_t	mb_type;	/* read-only/read-write */
+	/*
+	 * If the mailbox is full, we can either block waiting
+	 * for space or just return an error. We will make this
+	 * dependent on the message flag
+	 */
+	kcondvar_t	mb_full;	/* protected by mb_lock */
+} sbbc_mbox_t;
+
+
+/*
+ * When a message requires a reply, it is put on a waitlist
+ * until a message of that type with a matching ID comes in.
+ */
+struct sbbc_msg_waiter {
+	uint32_t		w_id;	/* ID */
+	sbbc_msg_t		*w_msg;	/* message we are waiting for */
+	kcondvar_t		w_cv;	/* protected by wait_list lock */
+	time_t			w_timeout;
+	struct sbbc_msg_waiter	*w_next;
+};
+
+
+/*
+ * this struct describes the mailbox as seen by the OS
+ */
+typedef struct sbbc_mailbox {
+	/*
+	 * Two mailboxes, SC -> OS mbox_in
+	 *		  OS -> SC mbox_out
+	 */
+	sbbc_mbox_t		*mbox_in;
+	sbbc_mbox_t		*mbox_out;
+	/*
+	 * Interrupt handlers. Mailbox registers itself with
+	 * the SBBC for the following interrupt types
+	 *
+	 * SBBC_MAILBOX_IN
+	 * SBBC_MAILBOX_OUT
+	 * SBBC_MAILBOX_SPACE_IN
+	 * SBBC_MAILBOX_SPACE_OUT
+	 *
+	 * Of course, we should only ever see the *-IN interrupts
+	 * but we will register the *-OUT ones as ours anyway to ensure
+	 * no-one else tries to overload these interrupt types.
+	 *
+	 */
+	struct {
+		kmutex_t	mbox_intr_lock;
+		uint_t		mbox_intr_state;
+	} intr_state[SBBC_MBOX_INTR_TYPES];
+
+	/*
+	 * Message handlers - one per message type
+	 * These are used for incoming unsolicited messages
+	 */
+	sbbc_intrs_t		*intrs[SBBC_MBOX_MSG_TYPES];
+
+	/*
+	 * Next message ID
+	 */
+	uint32_t		mbox_msg_id;
+
+	/*
+	 * List of 'waiters' for each incoming message type
+	 */
+	kmutex_t		mbox_wait_lock[SBBC_MBOX_MSG_TYPES];
+	struct sbbc_msg_waiter	*mbox_wait_list[SBBC_MBOX_MSG_TYPES];
+
+} sbbc_mailbox_t;
+
+
+/*
+ * This data will be written by the SC at the
+ * start of the mailbox in IOSRAM.
+ * This is read from offset 0 with key SBBC_MAILBOX_KEY
+ *
+ * make them all 32-bit ints and add a bit of
+ * user-data padding to make life easy for the SC
+ */
+struct sbbc_mbox_header {
+	uint32_t	mbox_magic;
+	uint32_t	mbox_version;
+	struct mbox {
+		uint32_t	mbox_type;	/* SBBC_{IN|OUT}BOX */
+		uint32_t	mbox_offset;	/* from start of mailbox */
+						/* SRAM area */
+		uint32_t	mbox_len;	/* size in bytes */
+		uint32_t	mbox_producer;	/* producer offset from */
+						/* start of this mailbox */
+		uint32_t	mbox_consumer;  /* consumer offset from */
+						/* start of this mailbox */
+	} mailboxes[SBBC_MAILBOXES];
+	uint32_t	mbox_data[4];		/* pad */
+};
+
+
+extern void	sbbc_mbox_init();
+extern void	sbbc_mbox_fini();
+extern int	sbbc_mbox_create(sbbc_softstate_t *);
+extern int	sbbc_mbox_switch(sbbc_softstate_t *);
+
+extern sbbc_mailbox_t	*master_mbox;
+
+#ifdef	__cplusplus
+}
+#endif
+
+#endif	/* _SYS_SGSBBC_MAILBOX_PRIV_H */
diff --git a/usr/src/uts/sun4u/serengeti/sys/sgsbbc_priv.h b/usr/src/uts/sun4u/serengeti/sys/sgsbbc_priv.h
new file mode 100644
index 0000000000..3f5e745a83
--- /dev/null
+++ b/usr/src/uts/sun4u/serengeti/sys/sgsbbc_priv.h
@@ -0,0 +1,226 @@
+/*
+ * CDDL HEADER START
+ *
+ * The contents of this file are subject to the terms of the
+ * Common Development and Distribution License (the "License").
+ * You may not use this file except in compliance with the License.
+ *
+ * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
+ * or http://www.opensolaris.org/os/licensing.
+ * See the License for the specific language governing permissions
+ * and limitations under the License.
+ *
+ * When distributing Covered Code, include this CDDL HEADER in each
+ * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
+ * If applicable, add the following below this CDDL HEADER, with the
+ * fields enclosed by brackets "[]" replaced with your own identifying
+ * information: Portions Copyright [yyyy] [name of copyright owner]
+ *
+ * CDDL HEADER END
+ */
+
+/*
+ * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
+ * Use is subject to license terms.
+ */
+
+#ifndef	_SYS_SGSBBC_PRIV_H
+#define	_SYS_SGSBBC_PRIV_H
+
+#pragma ident	"%Z%%M%	%I%	%E% SMI"
+
+#ifdef	__cplusplus
+extern "C" {
+#endif
+
+/*
+ * Private structures used by the Serengeti SBBC Driver
+ *
+ * The Serengeti SBBC driver handles communication between the
+ * System Controller Software (ScApp) and Solaris via SBBC
+ * registers and IOSRAM.
+ *
+ * This header file contains necessary definitions to enable
+ * such communication.
+ *
+ * Register offsets and definitions can be found in
+ * Serengeti Architecture Programmer's Reference
+ * Revision 1.3 11/16/1999
+ * Section 2.5 to 2.8
+ */
+
+#include <sys/types.h>
+#include <sys/dditypes.h>
+#include <sys/sgsbbc.h>
+
+/*
+ * SBBC Interrupt registers
+ */
+#define	SBBC_MAX_INTRS		32
+
+/*
+ * Different interrupts
+ */
+#define	INTERRUPT_ON	0x1	/* bit 0 */
+/*
+ * EPLD Interrupt Register Offset for communication with the SC
+ */
+#define	EPLD_INTERRUPT	0x13
+
+/*
+ * register numbers for mapping in OBP reg properties
+ */
+#define	RNUM_SBBC_REGS		1
+
+/*
+ * SBBC registers and devices on CPU/memory board
+ */
+#define	SBBC_REGS_OFFSET	0x800000
+#define	SBBC_REGS_SIZE		0x6230
+#define	SBBC_EPLD_OFFSET	0x8e0000
+#define	SBBC_EPLD_SIZE		0x20
+#define	SBBC_SRAM_OFFSET	0x900000
+#define	SBBC_SRAM_SIZE		0x20000		/* max. 128KB of SRAM */
+/*
+ * Register Offsets
+ */
+#define	SBBC_PCI_INT_STATUS	0x2320
+#define	SBBC_PCI_INT_ENABLE	0x2330
+
+/*
+ * Port Interrupt Enable Register
+ *
+ * Field	Bits	Reset	Type	Description
+ *			State
+ * Resvd	<31:8>	0	R	Reserved
+ * PINT1_EN	<7:4>	0	RW	Enables for each of the 4 PCI
+ *					interrupt lines for Port Interrupt
+ *					Generation register 1.  Bit 7
+ *					corresponds to PCI Interrupt D,
+ *					bit 4 corresponds to PCI Interrupt A.
+ * PINT0_EN	<3:0>	0	RW	Same as above, but for register 0.
+ */
+#define	SBBC_PCI_ENABLE_INT_A	0x11	/* Enable both PCI Interrupt A */
+#define	SBBC_PCI_ENABLE_MASK	0xff	/* Mask for the two enable registers */
+
+#ifdef	DEBUG
+#define	SGSBBC_DBG_MASK_MBOX		0x00000001
+#define	SGSBBC_DBG_MASK_INTR		0x00000002
+#define	SGSBBC_DBG_MASK_EVENT		0x00000004
+
+extern uint_t sgsbbc_debug;
+#define	SGSBBC_DBG_ALL	if (sgsbbc_debug)	prom_printf
+#define	SGSBBC_DBG_MBOX \
+	if (sgsbbc_debug & SGSBBC_DBG_MASK_MBOX) printf
+#define	SGSBBC_DBG_INTR \
+	if (sgsbbc_debug & SGSBBC_DBG_MASK_INTR) cmn_err
+#define	SGSBBC_DBG_EVENT \
+	if (sgsbbc_debug & SGSBBC_DBG_MASK_EVENT) cmn_err
+
+#else	/* DEBUG */
+#define	SGSBBC_DBG_ALL
+#define	SGSBBC_DBG_MBOX
+#define	SGSBBC_DBG_INTR
+#define	SGSBBC_DBG_EVENT
+
+#endif	/* DEBUG */
+
+
+typedef struct sbbc_intrs {
+	sbbc_intrfunc_t		sbbc_handler;	/* interrupt handler */
+	caddr_t			sbbc_arg;	/* interrupt argument */
+	ddi_softintr_t		sbbc_intr_id;
+	kmutex_t		*sbbc_intr_lock;	/* for state flag */
+	uint_t			*sbbc_intr_state;	/* handler state */
+	struct sbbc_intrs	*sbbc_intr_next;
+	int			registered;
+} sbbc_intrs_t;
+
+struct sbbc_epld_regs {
+	uchar_t		epld_reg[32];
+};
+
+/*
+ * device soft state
+ */
+typedef struct sbbc_softstate {
+	struct sbbc_softstate	*prev;
+	struct sbbc_softstate	*next;
+
+	struct chosen_iosram    *iosram; /* back reference */
+	dev_info_t 		*dip;
+
+	/*
+	 * Tunnel Info.
+	 */
+	void			*sram;
+
+	/*
+	 * SBBC Register Info.
+	 */
+	caddr_t				sbbc_regs;	/* common device regs */
+	uint32_t			*port_int_regs; /* interrupt regs */
+	struct sbbc_epld_regs		*epld_regs;	/* EPLD regs */
+	uint32_t			sram_toc;	/* SRAM TOC */
+
+	/*
+	 * device map handles for register mapping
+	 */
+	ddi_acc_handle_t		sbbc_reg_handle1;
+	ddi_acc_handle_t		sbbc_reg_handle2;
+	/*
+	 * SBBC Interrupts
+	 */
+	uint_t			inumber;
+	ddi_iblock_cookie_t 	iblock;
+	ddi_idevice_cookie_t 	idevice;
+
+	sbbc_intrs_t		*intr_hdlrs;
+
+	/*
+	 * misc.
+	 */
+	kmutex_t		sbbc_lock;	/* mutex for this struct */
+	uchar_t			suspended;	/* TRUE if instance suspended */
+	uchar_t			chosen;		/* TRUE if instance 'chosen' */
+	int			sbbc_instance;
+	int			sbbc_state;	/* see below */
+} sbbc_softstate_t;
+/* sbbc iosram state */
+#define	SBBC_STATE_INIT 0x0001		/* initialization */
+#define	SBBC_STATE_DETACH 0x0002	/* IOSRAM instance being detached */
+
+/*
+ * Structure used for tunnel switch
+ */
+typedef struct {
+	dev_info_t	*cur_dip;	/* current dip that we compare to */
+	dev_info_t	*new_dip;	/* new dip that fits the condition */
+} sbbc_find_dip_t;
+
+/*
+ * Routines for mapping and unmapping SBBC internal registers
+ */
+extern int	sbbc_map_regs(sbbc_softstate_t *);
+
+/*
+ * Interrupt related routines
+ */
+extern int	sbbc_add_intr(sbbc_softstate_t *);
+extern void	sbbc_enable_intr(sbbc_softstate_t *);
+extern void	sbbc_disable_intr(sbbc_softstate_t *);
+extern int	sbbc_send_intr(sbbc_softstate_t *, int);
+extern uint_t	sbbc_intr_handler();
+
+extern sbbc_softstate_t	*sbbc_get_soft_state(int);
+
+/*
+ * To protect master_chosen
+ */
+extern kmutex_t chosen_lock;
+
+#ifdef	__cplusplus
+}
+#endif
+
+#endif	/* _SYS_SGSBBC_PRIV_H */
diff --git a/usr/src/uts/sun4u/serengeti/sys/ssm.h b/usr/src/uts/sun4u/serengeti/sys/ssm.h
new file mode 100644
index 0000000000..98a79d7d35
--- /dev/null
+++ b/usr/src/uts/sun4u/serengeti/sys/ssm.h
@@ -0,0 +1,103 @@
+/*
+ * CDDL HEADER START
+ *
+ * The contents of this file are subject to the terms of the
+ * Common Development and Distribution License (the "License").
+ * You may not use this file except in compliance with the License.
+ *
+ * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
+ * or http://www.opensolaris.org/os/licensing.
+ * See the License for the specific language governing permissions
+ * and limitations under the License.
+ *
+ * When distributing Covered Code, include this CDDL HEADER in each
+ * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
+ * If applicable, add the following below this CDDL HEADER, with the
+ * fields enclosed by brackets "[]" replaced with your own identifying
+ * information: Portions Copyright [yyyy] [name of copyright owner]
+ *
+ * CDDL HEADER END
+ */
+
+/*
+ * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
+ * Use is subject to license terms.
+ */
+
+#ifndef	_SYS_SSM_H
+#define	_SYS_SSM_H
+
+#pragma ident	"%Z%%M%	%I%	%E% SMI"
+
+#ifdef	__cplusplus
+extern "C" {
+#endif
+
+#include <sys/types.h>		/* needed by <sys/dditypes.h> */
+#include <sys/dditypes.h>	/* needed for definition of dev_info_t */
+#include <sys/mutex.h>
+
+/*
+ * ssm soft state macros: IIIIMMMM
+ *                 instance-minor no
+ */
+#define	SSM_INSTANCE_SHIFT	4
+#define	SSM_BOARD_MASK		0xff
+
+
+struct ssm_soft_state {
+	dev_info_t	*dip;		/* own dev info */
+	int		ssm_nodeid;	/* node id */
+	dev_info_t	*top_node;
+	int		initialized;	/* instance has been initialized */
+	kmutex_t	ssm_sft_lock;	/* protects this struct */
+	ddi_iblock_cookie_t ssm_fm_ibc; /* returned ibc from our parent */
+	int		ssm_fm_cap;	/* our fm capability */
+};
+
+typedef struct {
+	int	instance;	/* instance for this wildcat node */
+	int	wnode;		/* node num */
+} ssm_sbdp_info_t;
+
+/*
+ * useful debugging stuff
+ */
+#define	SSM_ATTACH_DEBUG	0x0002
+#define	SSM_CTLOPS_DEBUG	0x0004
+#define	SSM_EVENT_DEBUG		0x0008
+
+#define	_SSM_IOCTL		(('m' << 16) | ('p' << 8))
+#define	SSM_TEARDOWN_SBD	(_SSM_IOCTL | 0x1)
+
+#ifdef DEBUG
+#define	CMD2EVNT(m)	((m) == SGDR_BD_ABSENT	? SG_EVT_BOARD_ABSENT :	\
+			    (m) == SGDR_BD_PRESENT ? SG_EVT_BOARD_PRESENT :\
+			    (m) == SGDR_UNASSIGN ? SG_EVT_UNASSIGN : 	\
+			    (m) == SGDR_ASSIGN ? SG_EVT_ASSIGN :	\
+			    (m) == SGDR_UNAVAILABLE ? SG_EVT_UNAVAILABLE :\
+			    (m) == SGDR_AVAILABLE ? SG_EVT_AVAILABLE : 	\
+			    (m) == SGDR_POWER_OFF ? SG_EVT_POWER_OFF : 	\
+			    (m) == SGDR_POWER_ON ? SG_EVT_POWER_ON :	\
+			    (m) == SGDR_PASSED_TEST ? SG_EVT_PASSED_TEST :\
+			    (m) == SGDR_FAILED_TEST ? SG_EVT_FAILED_TEST :\
+			    0)
+
+#define	EVNT2STR(c)	((c) == SG_EVT_BOARD_ABSENT ? "board_absent" :\
+			    (c) == SG_EVT_BOARD_PRESENT ? "board_present" :\
+			    (c) == SG_EVT_UNASSIGN ? "unassign" :	\
+			    (c) == SG_EVT_ASSIGN ? "assign" :		\
+			    (c) == SG_EVT_UNAVAILABLE ? "unavailable" :	\
+			    (c) == SG_EVT_AVAILABLE ? "available" :	\
+			    (c) == SG_EVT_POWER_OFF ? "power_off" :	\
+			    (c) == SG_EVT_POWER_ON	? "power_on" :	\
+			    (c) == SG_EVT_PASSED_TEST ? "passed_test" :	\
+			    (c) == SG_EVT_FAILED_TEST ? "failed_test" :	\
+			    NULL)
+#endif
+
+#ifdef	__cplusplus
+}
+#endif
+
+#endif /* _SYS_SSM_H */