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| author | Robert Mustacchi <rm@fingolfin.org> | 2022-06-29 15:10:11 +0000 |
|---|---|---|
| committer | Robert Mustacchi <rm@fingolfin.org> | 2022-07-20 00:20:40 +0000 |
| commit | 1bcd6a1a4eeaf2fd7a90ce8b8cebd4f34baf049f (patch) | |
| tree | 2742d36c9e87cce3b4b6a4689f42140671a25335 /usr/src | |
| parent | 708bde8c8780e5414779e4d9e7a7648886a4700e (diff) | |
| download | illumos-joyent-1bcd6a1a4eeaf2fd7a90ce8b8cebd4f34baf049f.tar.gz | |
14776 pcieadm typos bytes to byes
Reviewed by: Andy Fiddaman <andy@omnios.org>
Reviewed by: Garrett D'Amore <garrett@damore.org>
Approved by: Garrett D'Amore <garrett@damore.org>
Diffstat (limited to 'usr/src')
| -rw-r--r-- | usr/src/cmd/pcieadm/pcieadm_cfgspace.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/usr/src/cmd/pcieadm/pcieadm_cfgspace.c b/usr/src/cmd/pcieadm/pcieadm_cfgspace.c index bdc04bbe2d..0eb16312ff 100644 --- a/usr/src/cmd/pcieadm/pcieadm_cfgspace.c +++ b/usr/src/cmd/pcieadm/pcieadm_cfgspace.c @@ -1336,7 +1336,7 @@ static pcieadm_regdef_t pcieadm_regdef_pcie_cap[] = { static pcieadm_regdef_t pcieadm_regdef_pcie_devcap[] = { { 0, 2, "mps", "Max Payload Size Supported", PRDV_STRVAL, .prd_val = { .prdv_strval = { "128 bytes", "256 bytes", - "512 bytes", "1024 byes", "2048 bytes", "4096 bytes" } } }, + "512 bytes", "1024 bytes", "2048 bytes", "4096 bytes" } } }, { 3, 4, "pfunc", "Phantom Functions Supported", PRDV_STRVAL, .prd_val = { .prdv_strval = { "No", "1-bit", "2-bits", "3-bits" } } }, @@ -1374,7 +1374,7 @@ static pcieadm_regdef_t pcieadm_regdef_pcie_devctl[] = { .prd_val = { .prdv_strval = { "disabled", "enabled" } } }, { 5, 7, "mps", "Max Payload Size", PRDV_STRVAL, .prd_val = { .prdv_strval = { "128 bytes", "256 bytes", - "512 bytes", "1024 byes", "2048 bytes", "4096 bytes" } } }, + "512 bytes", "1024 bytes", "2048 bytes", "4096 bytes" } } }, { 8, 8, "exttag", "Extended Tag Field", PRDV_STRVAL, .prd_val = { .prdv_strval = { "disabled", "enabled" } } }, { 9, 9, "pfunc", "Phantom Functions", PRDV_STRVAL, @@ -1385,7 +1385,7 @@ static pcieadm_regdef_t pcieadm_regdef_pcie_devctl[] = { .prd_val = { .prdv_strval = { "disabled", "enabled" } } }, { 12, 14, "mrrs", "Max Read Request Size", PRDV_STRVAL, .prd_val = { .prdv_strval = { "128 bytes", "256 bytes", - "512 bytes", "1024 byes", "2048 bytes", "4096 bytes" } } }, + "512 bytes", "1024 bytes", "2048 bytes", "4096 bytes" } } }, { 15, 15, "bcrflr", "Bridge Configuration Retry / Function Level Reset", PRDV_HEX }, { -1, -1, NULL } @@ -2979,7 +2979,7 @@ static pcieadm_regdef_t pcieadm_regdef_pcix_dev_ctl[] = { .prd_val = { .prdv_strval = { "disabled", "enabled" } } }, { 2, 3, "maxread", "Maximum Memory Read Byte Count", PRDV_STRVAL, .prd_val = { .prdv_strval = { "512 bytes", "1024 bytes", - "2048 byes", "4096 bytes" } } }, + "2048 bytes", "4096 bytes" } } }, { 4, 6, "maxsplit", "Maximum Outstanding Split Transactions", PRDV_STRVAL, .prd_val = { .prdv_strval = { "1", "2", "3", "4", "8", "12", "16", "32" } } }, @@ -3004,7 +3004,7 @@ static pcieadm_regdef_t pcieadm_regdef_pcix_dev_sts[] = { .prd_val = { .prdv_strval = { "simple", "bridge" } } }, { 21, 22, "maxread", "Designed Maximum Memory Read Byte Count", PRDV_STRVAL, .prd_val = { .prdv_strval = { "512 bytes", - "1024 bytes", "2048 byes", "4096 bytes" } } }, + "1024 bytes", "2048 bytes", "4096 bytes" } } }, { 23, 25, "maxsplit", "Designed Maximum Outstanding Split Transactions", PRDV_STRVAL, .prd_val = { .prdv_strval = { "1", "2", "3", "4", "8", "12", "16", "32" } } }, |